JPS6227548B2 - - Google Patents
Info
- Publication number
- JPS6227548B2 JPS6227548B2 JP54070345A JP7034579A JPS6227548B2 JP S6227548 B2 JPS6227548 B2 JP S6227548B2 JP 54070345 A JP54070345 A JP 54070345A JP 7034579 A JP7034579 A JP 7034579A JP S6227548 B2 JPS6227548 B2 JP S6227548B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor element
- element fixing
- fixing plate
- resin
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004065 semiconductor Substances 0.000 claims description 21
- 239000011347 resin Substances 0.000 claims description 10
- 229920005989 resin Polymers 0.000 claims description 10
- 238000007789 sealing Methods 0.000 claims 2
- 238000004519 manufacturing process Methods 0.000 description 3
- 238000005520 cutting process Methods 0.000 description 2
- 238000005336 cracking Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 238000010008 shearing Methods 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
【発明の詳細な説明】
本発明は半導体装置に係り、特に樹脂封止型半
導体装置に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device, and particularly to a resin-sealed semiconductor device.
従来、樹脂封止型半導体装置特にフラツトパツ
ケージにおいて、第１図の如く半導体素子固着部
１の支持リード２は、半導体素子３の基板電位導
出リードと共通な端子として他の端子と共に外部
へ導出されている。 Conventionally, in a resin-sealed semiconductor device, particularly in a flat package, as shown in FIG. 1, the support lead 2 of the semiconductor element fixing portion 1 is led out to the outside together with other terminals as a common terminal with the substrate potential deriving lead of the semiconductor element 3. has been done.
このような状態のパツケージにおいて素子固着
部１を安定に支持する為には、最低２本の支持リ
ード２が必要であり、このため、支持リード２本
中１本は直接電気的接続に供しない無駄な端子と
なる。 In order to stably support the element fixing part 1 in a package in such a state, at least two support leads 2 are required, and for this reason, one of the two support leads is not used for direct electrical connection. It becomes a useless terminal.
この無駄を解消する為に、第２図の如く素子固
着部１のコーナ部４より支持リード２ａを導出し
これをモールドパツケージ５のコーナー部６より
外部へ導出する事が考案された。このリードは電
気的接続に供しない為、半導体装置の製造工程で
パツケージの極近傍で切断されて製品となる。こ
の切断工程において該支持リード２ａは 断力に
より切断されるが、この時パツケージのコーナー
部６に応力が集中し、樹脂５にクラツクがはいつ
たり、又は割れるという問題が発生する。この為
製品歩留又は品質の低下等を招く事があつた。 In order to eliminate this waste, it was devised to lead out the support lead 2a from the corner part 4 of the element fixing part 1 and lead it out from the corner part 6 of the mold package 5 as shown in FIG. Since this lead is not used for electrical connection, it is cut very close to the package during the manufacturing process of the semiconductor device and becomes a product. In this cutting step, the support lead 2a is cut by shearing force, but at this time stress is concentrated on the corner portion 6 of the package, causing a problem that the resin 5 is cracked or broken. This sometimes led to a decline in product yield or quality.
本発明は上記の問題を解消する事を目的とした
ものである。 The present invention aims to solve the above problems.
本発明は、樹脂封止型半導体装置の樹脂外形の
主たる四側面の各終端部の少なくとも一ケ所に面
取りを施こし、該面取り部より少なくとも一本の
半導体素子固着部支持リードを導出する事を特徴
とする樹脂封止型半導体装置である。 According to the present invention, at least one end portion of each of the four main side surfaces of the resin-sealed semiconductor device is chamfered at one place, and at least one semiconductor element fixing portion support lead is led out from the chamfered portion. This is a characteristic resin-sealed semiconductor device.
以下、詳細な説明を本発明の実施例に基づき行
なう。第３図に本発明に係る一実施例を示す。第
３図において、半導体素子３が固着された素子固
着部１より導出された素子固着部支持リード２ａ
は、樹脂外形の四側面のコーナー面取り部７を通
りフレーム８に接続される。 A detailed explanation will be given below based on embodiments of the present invention. FIG. 3 shows an embodiment according to the present invention. In FIG. 3, an element fixing part support lead 2a led out from an element fixing part 1 to which a semiconductor element 3 is fixed.
are connected to the frame 8 through the corner chamfered portions 7 on the four sides of the resin outer shape.
製品外形を形成する際に支持リード２ａは、樹
脂コーナー面取部７の部分において切断される。 When forming the product outer shape, the support lead 2a is cut at the resin corner chamfered portion 7.
この時、例えばコーナー面取部の長さl1を支持
リード２ａが面取り部でとる巾l2よりも大きくし
ておけば、切断の際に樹脂に加わる応力は均一と
なり、樹脂のクラツクや割れ等は防止する事が可
能である。 At this time, for example, if the length l 1 of the corner chamfer is made larger than the width l 2 taken by the support lead 2a at the chamfer, the stress applied to the resin during cutting will be uniform, preventing cracks and cracks in the resin. etc. can be prevented.
この面取り部は封入金型の製作時に作つておけ
ばよく、製造工程内に何ら特殊な工程も設けずに
製品を作る事が可能である。 This chamfer can be created at the time of manufacturing the encapsulation mold, and the product can be manufactured without any special steps in the manufacturing process.
以上の如く、本発明によればパツケージを効率
良く使用する事が可能であると共に、樹脂のクラ
ツク割れ等の問題が起らず、高品質の半導体装置
を提供する事が可能である。 As described above, according to the present invention, it is possible to use the package efficiently, and problems such as resin cracking do not occur, and it is possible to provide a high quality semiconductor device.
第１図、第２図は従来製品外形を説明するため
の透視して示した平面図、第３図は本発明の一実
施例を透視して示した平面図である。
尚、図において、１……半導体素子固着部、
２，２ａ……半導体素子固着部支持リード、３…
…半導体素子、４……半導体素子固着部コーナ
ー、５……樹脂外形、６……樹脂外形コーナー、
７……面取り部、８……フレーム。
1 and 2 are perspective plan views for explaining the external shape of a conventional product, and FIG. 3 is a perspective plan view of an embodiment of the present invention. In addition, in the figure, 1...semiconductor element fixing part,
2, 2a...Semiconductor element fixing part support lead, 3...
...Semiconductor element, 4...Semiconductor element fixing part corner, 5...Resin outer shape, 6...Resin outer shape corner,
7... Chamfered portion, 8... Frame.
Claims (1)
素子を固着する素子固着板と、該素子固着板に連
らなる帯状部材と、該素子固着板近傍に先端部を
有し、該先端部に前記半導体素子の電極が電気的
に接続された複数の端子と、前記半導体素子、前
記素子固着板を封止し、外形が４つの主たる側辺
を有する概略四辺形で、前記複数の端子が前記主
たる側辺から外部に導出される樹脂封止部材とを
有する半導体装置において、前記樹脂封止部材は
２つの前記主たる側辺間の角部において面取り部
を有し、該面取り部の長さは前記帯状部材の幅よ
りも長くなつており、該帯状部材が前記面取り部
表面で切断面を有していることを特徴とする半導
体装置。1. A semiconductor element having a large number of electrodes, an element fixing plate for fixing the semiconductor element, a band-shaped member continuous to the element fixing plate, a tip part near the element fixing plate, and the tip part has the above-mentioned part. A plurality of terminals to which electrodes of a semiconductor element are electrically connected, the semiconductor element, and the element fixing plate are sealed, and the outer shape is approximately quadrilateral with four main sides, and the plurality of terminals are the main sides. In a semiconductor device having a resin sealing member led out from a side, the resin sealing member has a chamfered portion at a corner between the two main sides, and the length of the chamfer is equal to the length of the chamfered portion. A semiconductor device that is longer than the width of the band-like member, and the band-like member has a cut surface at the surface of the chamfered portion.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7034579A JPS55162252A (en) | 1979-06-05 | 1979-06-05 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7034579A JPS55162252A (en) | 1979-06-05 | 1979-06-05 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS55162252A JPS55162252A (en) | 1980-12-17 |
| JPS6227548B2 true JPS6227548B2 (en) | 1987-06-15 |
Family
ID=13428731
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7034579A Granted JPS55162252A (en) | 1979-06-05 | 1979-06-05 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS55162252A (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5861654A (en) * | 1981-10-09 | 1983-04-12 | Toshiba Corp | Semiconductor device |
| JPS58111966U (en) * | 1982-01-25 | 1983-07-30 | 松下電器産業株式会社 | integrated circuit components |
| US7989933B1 (en) * | 2008-10-06 | 2011-08-02 | Amkor Technology, Inc. | Increased I/O leadframe and semiconductor device including same |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS505329U (en) * | 1973-05-16 | 1975-01-21 | ||
| JPS5116698U (en) * | 1974-07-24 | 1976-02-06 | ||
| JPS52106674A (en) * | 1976-03-05 | 1977-09-07 | Hitachi Ltd | Semiconductor device |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS54180668U (en) * | 1978-06-09 | 1979-12-20 |
-
1979
- 1979-06-05 JP JP7034579A patent/JPS55162252A/en active Granted
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS505329U (en) * | 1973-05-16 | 1975-01-21 | ||
| JPS5116698U (en) * | 1974-07-24 | 1976-02-06 | ||
| JPS52106674A (en) * | 1976-03-05 | 1977-09-07 | Hitachi Ltd | Semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS55162252A (en) | 1980-12-17 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5891759A (en) | Method of making a multiple heat sink resin sealing type semiconductor device | |
| US4012765A (en) | Lead frame for plastic encapsulated semiconductor assemblies | |
| DE102011053871A1 (en) | Multichip semiconductor packages and their assembly | |
| US4712127A (en) | High reliability metal and resin container for a semiconductor device | |
| JPS6227548B2 (en) | ||
| JPH0254665B2 (en) | ||
| JPH05343271A (en) | Molded chip type solid electrolytic capacitor | |
| JPH0424856B2 (en) | ||
| JPS58199547A (en) | lead frame | |
| JPS63110763A (en) | Lead frame | |
| JPH01257361A (en) | Resin-sealed semiconductor device | |
| JPS5930538Y2 (en) | semiconductor equipment | |
| JPH10150127A (en) | Semiconductor device and its manufacture | |
| JPH0318741B2 (en) | ||
| KR200331874Y1 (en) | Multi-pin Package of Semiconductor | |
| JPH02202042A (en) | Resin-sealed semiconductor device | |
| JPS6227549B2 (en) | ||
| JPH02246143A (en) | Lead frame | |
| JPS624857B2 (en) | ||
| JPH01114058A (en) | Resin-sealed semiconductor device | |
| JPH0346358A (en) | Resin-sealed semiconductor device and manufacture thereof | |
| JPH04192421A (en) | Semiconductor device | |
| JPS60250659A (en) | Composite semiconductor device | |
| JPH0249445A (en) | Manufacture of resin sealed type semiconductor device | |
| JPH0426215B2 (en) |