JPS6039991B2 - load control device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention comprises a clocking means such as a BI for a timer, a counting means such as a shift register that receives a control signal from a control output terminal of the clocking means, and a clocking means that operates a load at predetermined intervals. Alternatively, the present invention relates to a load control device that controls the counting means by a fast-forward signal from a fast-forward signal generation source upon power outage recovery, and makes the load inoperable.

An embodiment of the present invention will be described based on the drawings.

In Fig. 1, 1 is a first-class time-measuring means for a timer;
4 is a switching means that performs switching operation based on a control signal from the output terminal 3 of the timekeeping means 1; 4 is a switching means 2;
It is a counting means such as a shift register that counts switching signals from the load 5 and turns the load 5 on or off at predetermined time intervals. The timing means 1 includes a pulse generator 6 that sets the output terminal 3 to a low level at regular intervals and inputs the control means to the switching means 2, a fast-forward pulse generator 7 for fast-forwarding the counting means 4 when the power is restored, and a power outage. A contact 8 that switches from the pulse generator 6 to the fast-forward pulse generator 7 at the time of return is built-in. 9 is an AC power supply for applying a fast-forward signal, that is, a fast-forward pulse signal, to the fast-forward pulse generator 7 when the power is restored, and instantaneously fast-forwards the counting means 4;
This is a fast forward signal generation source such as an oscillator.

FIG. 2 is a timing chart of the load control device shown in FIG. 1, in which a indicates a timing chart during normal operation, and b indicates a timing chart during power recovery.

Next, the operation of the load control device according to the present invention having the above configuration will be explained.

First, the operation during normal operation will be explained. During normal operation, the contact 3 of the clock means 1 is switched to the pulse generator 6 side, and the output terminal 3 of the clock means 1 goes to a low level at regular intervals as shown in FIG. Then, a control signal is input to the switching means 2. It is assumed that the load 5 is operating from the beginning. By applying a control signal,
The switching means 2 performs a switching operation, and the counting means 4
A switching signal is applied to the counter 4, and the counting means 4 counts the first switching signal. How many times does the output terminal 3 of the timer 1 go low? For example, the nth time, etc.
When a predetermined time nxt, which is set in advance, has elapsed after the start of the operation, an output signal is output from the counting means 4 to the load 5, and the load 5 stops operating. During the operation of the load control device according to the present invention, when there is a power outage in the middle and the power supply is restarted, that is, when the power is restored, the following operation is performed.

When the power is restored, the contact 8 of the timing means 1 is switched from the pulse generator 6 side to the fast-forward pulse generator 7 side, and as shown in FIG.
As shown in the timing chart, a pulse signal is released from the fast-forward pulse generator 7 to the switching means 2 at every time t2, and the switching means 2 performs a switching operation. A switching signal is input to the counting means 4 by repeating the switching operation of the switching means 2, but at the same time as a fast-forward pulse signal from the fast-forward pulse generator 7, a fast-forward signal from the desk-feed signal source 9 is frequently input to the switching means 2. As a result, the switching means 2 performs extremely frequent switching operations, and the counting means W instantaneously shifts up and stops the operation of the load 5 within an instant. In this circuit example, reference numeral 1 denotes a timing means consisting of a timer LSI, and its output terminal 101 is connected to the base of the transistor blade 1 constituting the switching means 2, and the output terminal 12 is connected to the transistor angle 3 of the switching means 2. Connect the base of.

The emitter of the transistor 11 constituting the switching means 2 is connected to the collector of the transistor 13, the base of the transistor 13 is connected to a desk feed signal source 9 consisting of an AC source or an oscillation circuit, and the collector of the transistor 11 of the switching means 2 is connected to the base of the transistor 13. It is connected to input terminals Q and N of counting means 4 consisting of a shift register. The counting means 4 has an output terminal Q. , Q2...Qn (where n is the maximum count number), and have respective output terminals Q,, Q2...
・Qn has contacts S, S2 of the rotary switch 14...
Sn is connected. In this embodiment, for example, the three common contacts Sc of the rotary switch 14 are connected to the contact Sn-3,
A case will be described in which the load 5 is set to be controlled when an output signal is output from the output terminal Qn-3 of the counting means 4 (after (n-3) x time has elapsed). Incidentally, this setting can be arbitrarily determined by switching the rotary switch 14. Furthermore,. -Common contact S of tally switch 14
c is a switching transistor 15 that constitutes the load 5;
connected to the base of. The load 5 is composed of a switching transistor 15 and an excitation winding 17 driven by a driving transistor 16 which is turned on and off by the switching operation of the transistor 15.The embodiment of the load control device according to the present invention shown in FIG. The operation of the basic circuit example is generally the same as the basic circuit example shown in Figure 1, but the timing chart is as shown in Figures 4a and b.During normal operation , the timekeeping means 1
The output terminal 12 of the switching means 02 is always at a high level, so the base of the transistor 13 of the switching means 02 is always at a zero level. Output terminal 1 of clocking means 1 becomes low level to emit a pulse signal every time t elapses, and whenever the pulse signal is cut off, transistor 1 is turned off, and the collector of transistor 1 becomes high level. Become. When the collector of the transistor 11 becomes high level, a pulse signal is applied to the input terminals Q and N of the counting means 4, and the output state Q becomes the /.
When the output terminal 10 of the timer 1 instantaneously changes to a low level, the output terminal 10 instantaneously changes to a low level after a period of time elapses, the transistor 1 turns off, and the counting device 4 changes to a low level.
A pulse signal is applied to input terminals Q and N of
2 becomes high level. In this way, when the output terminal Qn-3 of the counting means 4 reaches the /. 17 is turned off.In other words, the load 5 stops its operation after the time (n-3>x) has elapsed (when the output terminal Qn-3 of the counting means 4 reaches the Next, when the load control device according to the present invention is in operation, the power is cut off due to a power outage, and then the power is restarted, that is, when the power is restored, as shown in Fig. 3. The specific circuit example of the load control device according to the present invention shown in 1 operates as follows.

As shown in FIG. 4b, an output pulse is outputted from the output terminal 12 of the timing means 1 at every very short time t2, and each time the transistors li, 13 of the switching means 2 are outputted.
will repeat on and off, but furthermore, due to the fast-forward pulse from the fast-forward signal generation source 9, the transistor lj
, 13 are instantaneously turned on and off many times, and therefore,
A very large number of pulse signals are instantaneously applied to the input terminal QIN of the counting means 4, and its output terminals Q, , Q2, Qn are instantaneously shifted up, the switching transistor 5 is turned on, the driving transistor 16 is turned off, Excitation winding 17 will be turned off.

As described above, the load control device according to the present invention applies a control signal from the control output terminal of the timer to the counting means to make the load inoperable at predetermined time intervals. If a power outage occurs during the counting operation of the means, and then the power is restored, the counting means is instantly shifted up using a fast-forward signal from a fast-forward signal source to stop the operation of the load. This makes it possible to control the load extremely accurately and safely.

[Brief explanation of the drawing]

FIG. 1 shows an embodiment of the basic circuit of the load control device according to the present invention, FIG. 2 shows a timing chart of the load control device of FIG. 1, and FIG. 3 shows an embodiment of the load control device according to the present invention. Specific Example: FIG. 4 is a timing chart of the load control device shown in FIG. 3. DESCRIPTION OF SYMBOLS 1... Timing means, 2... Switching means, 4... Counting means, 5... Load, 9.
...Fast-forward signal generation source. Figure 1 Figure 2 Figure 3 Figure 4

Claims (1)

[Claims] 1. A clock means having a control output terminal and outputting a switching signal of a predetermined cycle; a fast-forward pulse generator that outputs a switching signal of a faster cycle than the clock means when the power is restored; and a switching signal of the pulse generator and the clock means. 1. A load control device comprising: a counting means for counting the number and disabling the load when the count value exceeds a set number.