JPS60225824A - Optical shutter elememt - Google Patents

Abstract

PURPOSE:To narrow down electrode width and to lower an operating voltage, and to improve light transmissivity by providing an internal laminar electrode which extends in a light transmission direction between chip substrates laminated in an array. CONSTITUTION:Metallic electrodes 2' with thickness W/2 are vapor-deposited on both top and reverse surfaces of a wafer 1' with thickness (g) in out-of-phase relation and diced to width (t) to form a number of chip substrates 1, which are rearranged and laminated so that electrodes 2' and 2' come into contact with each other. Then, the electrodes 2' and 2' are bonded together by compression into an internal laminar electrode 2, an electric insulating agent 3 is charged in and outside of the gap between chip substrates 1 and 1, and flank electrodes 4 and 4 are fitted to constitute a couple of comb-shaped electrodes having opposed electrodes 2, 2.... Consequently, the thickness W of electrodes 2 and the electrode gap (g) are reduced to obtain a low operating voltage and high light transmissivity.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to an optical shutter element using transparent ferroelectric ceramics having an electro-optic effect, and more specifically,
The present invention relates to an optical shutter element formed by arranging a large number of chip substrates made of the above-mentioned ceramic fuchs in a line.

[Prior art]

In this type of optical shutter element, between a pair of polarizers whose polarization directions are perpendicular to each other, the direction of the electric field forms an angle of 45° with the polarization direction of the incident light.
A substrate made of transparent ferroelectric ceramic material such as Ti, Ti) is disposed.

For example, as shown in FIG. 4, comb-shaped planar electrodes 22 are provided on both the front and back surfaces of a substrate (wafer) 21 made of PLZT.
．． It has a structure in which 22 are provided.

However, in such conventional devices, the electric field distribution varies with parameters such as the thickness t of the substrate 21, the width W of the electrode 22, and the electrode spacing g, so the operating voltage and light transmittance are greatly affected. In particular, if the electrode spacing g is narrowed in an attempt to lower the operating voltage, the electric field distribution will be concentrated only on the surface, so the operating voltage may not decrease but rather increase.

In addition, the electrode width W is determined by photolithography (photoetching process).
Due to technological limitations (approximately 10 μm), there are drawbacks such as the inability to increase light transmittance because the aperture ratio (light transmitting area/total area) cannot be increased, especially when the electrode spacing g is narrowed. Teshita, ta.

In addition, in order to improve the non-uniformity of the electric field distribution due to the flat electrode 22 as described above, a structure in which groove-shaped electrodes 32 are provided on the surface of a light-transmitting substrate (wafer) 31 as shown in FIG. Things are also being considered.

However, in such a device, the operating voltage can be lower than that of the planar electrode 22, but since the groove is formed by dicing, the electrode W is limited by the groove width and has a thickness of about 20 to 40 μm. However, if the electrode spacing g is made narrower, the aperture ratio decreases and the light transmittance decreases.

[Purpose of the invention]

An object of the present invention is to eliminate the drawbacks of the conventional devices as described above, further improve the non-uniformity of electric field distribution, and provide an optical shutter element with improved characteristics.

[Summary of the Invention] In order to achieve the above object, the optical shutter element of the present invention has a large number of chip substrates made of transparent ferroelectric ceramics stacked in a row, and a light beam that penetrates between each chip substrate along the light transmission direction. An internal layered electrode is provided, which makes it possible to reduce the electrode width, thereby lowering the operating voltage and increasing the light transmittance.

[Embodiments of the invention]

Embodiments of the invention shown in the drawings will be described below.

FIG. 1 shows an embodiment of an optical shutter element according to the present invention, and this optical shutter element has an array structure in which a large number of chip substrates made of transparent ferroelectric ceramics such as PLZT are laminated in a row. It has a structure in which an internal layered electrode 2 is provided between the chip substrates 1 and penetrates along the light transmission direction, where t is the thickness of the chip substrate 1, W is the width of the electrode 2, and g is the electrode spacing. It is.

The manufacturing process of this optical shutter element is shown in FIG. 2. First, a PLZT ceramic wafer l' with a thickness g is prepared (see FIGS. 2(a) and (b)), and this wafer l' is Metal electrodes 2' with a thickness of W/2 are placed on both the front and back surfaces with their phases shifted from each other (so that the opposing sides in the plane direction are parallel non-adhered regions of the metal electrodes 2').
2(c) and 2(d)), and diced with a width t to form a large number of 1,000-knob substrates 1 (see FIG. 2(e)).
<r)), then rearrange the peeling so that the electrodes 2', 2' are in contact with each other, and remove every other chip substrate 1.
As shown in FIG. g
) (f)), then the electrodes 2', 2' are brought into close contact with each other by pressure bonding to form the inner layered electrode 2 (see FIG. 2(i)).
j)) Fill the gap and the outside of the 1,000-knob board 1.1 with electrical insulating material 3, then cover both sides (the plane parallel to the plane of the drawing).
(see Fig. 2 (k))) Furthermore, side electrodes 4.4 are attached on both sides to form electrodes 2.2- into a pair of facing comb-shaped Yamabushi electrodes (see Fig. 2 (β) (m). )reference)
.

Next, the operation of the above will be explained.

With the above structure, the thickness W of the electrode 2 can be reduced to several μm or less as shown in FIG. 2(n), and the electrode spacing g is determined by the thickness of the wafer l'. For example, it can be made as narrow as about 300 μm, and therefore both low operating voltage and high light transmittance can be obtained.

FIG. 3 shows the manufacturing process of another embodiment of the optical shutter element according to the present invention.

That is, a wafer 11' having a thickness g (Fig. 3(a)(b)
First, form the tapered surface 15 on the surface (see Figure 5('C)(
d)), then the wafer 11 including the tapered surface 15
Metal electrodes 12' having a thickness of W/2 are deposited on both the front and back surfaces of the metal electrode 12' with a phase shift from each other (see FIGS. 3(e) and 3(f)), and this is diced with a width t (see FIG. 3(g)). b. Next, the directions of the electrodes 12' and 12' are changed so that they are in contact with each other, and a large number of chimp substrates 11 of thickness t are stacked in rows from the wafer 11' of thickness g, and 12' and 12' are pressed together to form an internal layered electrode 12 (see FIG. 3(h)), and a substrate 11 without a tapered surface.
．． 11 and the outside thereof are filled with electrical insulating material 13, and side electrodes 14.14 are attached to both sides of electrode 12.14.
The electrodes 12- are formed into opposing comb-like electrodes, and both surfaces are mirror-polished (see FIG. 3 (+)).

In this case, in addition to having the same effect as that shown in FIG.
connection can be made easily and reliably.

In the embodiment shown in FIG. 3, the tapered surface 15 is formed in the part where the electrode 12' is deposited, but it goes without saying that a tapered surface may also be formed in advance in the part where the electrical insulating material 13 is to be filled. It is.

Further, in the embodiment, a long chip substrate in which chip substrates are arranged in a single row is shown, but it goes without saying that a large number of arrays of these rows can be combined to form a planar shape.

[Effects of the Invention] By having the above-described structure, the electrode width can be made sufficiently narrow, and therefore, the electrode spacing can be made narrow without reducing the aperture ratio, and therefore the operating voltage can be lowered. In addition, it has excellent effects such as being able to increase the light transmittance and improving both of the two most important characteristics of the optical shutter element.

[Brief explanation of the drawing]

FIG. 1 is a sectional view showing one embodiment of the present invention, FIG. 2 is a manufacturing process of the one shown in FIG. 1, (a) and (b) are front and end views of the wafer, (C) and are a front view and an end view of the electrode deposition process, (e) and (f) are a front view and an end view of the guising process, (g> (h) are a front view and an end view of the rearranged process, (i) and (j ) is a front view and perspective view of the electrode adhesion process, (k) is a front view of the electrical insulation and mirror polishing process, (7ri (m) (n) is a front view and perspective view of the process for attaching the electrode on the side) A cross-sectional view taken along line -n, FIG. 3 shows the manufacturing process of another embodiment of the present invention, (a)
(b) A front view and an end view of the wafer, (C) (d) a front view and an end view of the tapered surface forming process, (e) (f>
are the front view and end view of the electrode deposition process, <g) is the front view of the guising process, (h) is the front view of the rearranging and electrode bonding process, and (i) is the electrical insulation, mirror polishing, and side electrode removal. Figure 4('a) is a front view showing an example of the conventional process, Figure 4(b) is the front view of the process, and Figure 4(b) is the 41st! ] (a) bb
FIG. 5 is an enlarged cross-sectional view taken along the line, and is a cross-sectional view showing another example of the conventional one. 1.1t--Chip substrate 1', 11'--Wafer 2.12--
・-Inner layered electrodes 2', 12'---One metal electrode 3.13---Electrical insulating material 4, I't---One side electrode 15---Tapered surface 211 .31 ---- One substrate (wafer) 22 ---- One plane electrode 32 ---- One groove electrode Figure 1 (light) Figure 2 (j)

Claims (1)

[Claims] A large number of chip substrates made of transparent ferroelectric ceramics are stacked in a row, and an inner layered electrode made of Ni1N is provided between each chip substrate along the same direction of light transmission, and the inner layered electrode is connected to a pair of opposing combs. A light shutter element characterized in that internal layered electrodes between every other chip substrate are electrically connected at a pair of opposing surfaces along the light transmission direction so as to form tooth-shaped electrodes.