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JPS54127689A - Semiconductor integrated circuit - Google Patents

Semiconductor integrated circuit

Info

Publication number
JPS54127689A
JPS54127689A JP3517878A JP3517878A JPS54127689A JP S54127689 A JPS54127689 A JP S54127689A JP 3517878 A JP3517878 A JP 3517878A JP 3517878 A JP3517878 A JP 3517878A JP S54127689 A JPS54127689 A JP S54127689A
Authority
JP
Japan
Prior art keywords
layer
type
featuring
dielectric strength
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3517878A
Other languages
Japanese (ja)
Other versions
JPS5628019B2 (en
Inventor
Shuichi Kameyama
Osamu Ozawa
Hiroshi Iwasaki
Yoshitaka Sasaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP3517878A priority Critical patent/JPS54127689A/en
Publication of JPS54127689A publication Critical patent/JPS54127689A/en
Publication of JPS5628019B2 publication Critical patent/JPS5628019B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/65—Integrated injection logic
    • H10D84/658—Integrated injection logic integrated in combination with analog structures

Landscapes

  • Bipolar Transistors (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Logic Circuits (AREA)

Abstract

PURPOSE:To obtain a semiconductor integrated circuit in which the elements such as I<2>L and the high dielectric strength bipolar transistor featuring the different dielectric strength to each other coexist without impairing each characteristics. CONSTITUTION:Sb, As and the like are diffused selectively on the surface of P-type Si substrate 1 to obtain n<+>-type buried layer 21 and 22 featuring a high density, and n<->-type layer 3 is epitaxial-grown on the entire surface. Layer 21 and 22 become the high dielectric strength bipolar Jr formation region and the I<2>L formation region respectively. After this, Sb, As or the like are diffused selectively again only at the I<2>L region to obtain high-density n<+>-type buried layer 4, and then n<->-type layer 5 is epitaxial-grown. The phosphorus or the like is diffused selectively at the I<2>L region on the surface of layer 5 to obtain n-type layer 6 featuring higher density than layer 5, and then P<+>-type layer 7 reaching substrate 1 in depth is formed by diffusion.
JP3517878A 1978-03-27 1978-03-27 Semiconductor integrated circuit Granted JPS54127689A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3517878A JPS54127689A (en) 1978-03-27 1978-03-27 Semiconductor integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3517878A JPS54127689A (en) 1978-03-27 1978-03-27 Semiconductor integrated circuit

Publications (2)

Publication Number Publication Date
JPS54127689A true JPS54127689A (en) 1979-10-03
JPS5628019B2 JPS5628019B2 (en) 1981-06-29

Family

ID=12434588

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3517878A Granted JPS54127689A (en) 1978-03-27 1978-03-27 Semiconductor integrated circuit

Country Status (1)

Country Link
JP (1) JPS54127689A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57164559A (en) * 1981-04-02 1982-10-09 Toshiba Corp Semiconductor integrated circuit device
JPS58142564A (en) * 1982-02-18 1983-08-24 Nec Corp Semiconductor device and manufacture thereof
US4692784A (en) * 1983-04-12 1987-09-08 Nec Corporation Dielectric insulation type semiconductor integrated circuit having low withstand voltage devices and high withstand voltage devices

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52154383A (en) * 1976-06-18 1977-12-22 Hitachi Ltd Semiconductor integrated circuit device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52154383A (en) * 1976-06-18 1977-12-22 Hitachi Ltd Semiconductor integrated circuit device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57164559A (en) * 1981-04-02 1982-10-09 Toshiba Corp Semiconductor integrated circuit device
JPS58142564A (en) * 1982-02-18 1983-08-24 Nec Corp Semiconductor device and manufacture thereof
US4692784A (en) * 1983-04-12 1987-09-08 Nec Corporation Dielectric insulation type semiconductor integrated circuit having low withstand voltage devices and high withstand voltage devices

Also Published As

Publication number Publication date
JPS5628019B2 (en) 1981-06-29

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