JPH10198455A - System and method for power consumption control - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the power consumption of equipment, to reduce the power capacity of power supply part an to use a small sized parts small in current capacity for a power source component by controlling the frequency of clock based on whether a peripheral device is operated or not. SOLUTION: A CPU clock frequency control block 5 inside a system controller 4 always monitors operation request signals from devices 1 and 2. First of all, when there is no operation request from the devices 1 and 2, corresponding to a CPU clock frequency control signal 13, the CPU clock frequency control block 5 sets a CPU clock at a clock frequency in ordinary state to a frequency divider 6. Next, while the device 1 is operated, the device 1 issues a device-1 operation request signal 9. When this operation request signal is received, corresponding to the CPU clock frequency control signal 13, the CPU clock frequency control block 5 sets the CPU clock at the 1/4 frequency in ordinary state to the frequency divider 6.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power consumption control method and method for controlling power consumption of a device having a CPU and a peripheral device, particularly a device such as a portable information terminal which can be carried and used. .

[0002]

2. Description of the Related Art The power consumption of a conventional portable information terminal will be described with reference to FIG. FIG. 4 shows the HDD, FD
D, a device 1, which is a peripheral device such as a CD-ROM,
2 is a diagram showing the power consumption of two portable information terminals connected to each other, wherein (a) shows that the power consumption of the portable information terminal when the devices 1 and 2 are not operating is A (W); (B) shows B (W) when the device 1 is operating, and (c)
Indicates that C (W) when the device 2 is operating, and D (W) when both the devices 1 and 2 are operating. As shown in the figure, in a conventional electronic device such as a portable information terminal, the power consumed by the main body increases with the number of operating devices. On the other hand, the power capacity of the power supply of the portable electronic device has been determined in accordance with the maximum power of the main body in the maximum load state. Therefore, the power capacity in the case of FIG.
(W) + the margin is determined.

The prior art disclosed in Japanese Patent Application Laid-Open No. 7-20968 determines a minimum power level required for a task to be performed, and a voltage and a clock speed for providing the minimum power. Is determined to reduce the power consumption of the computer system.
However, in this conventional technique, no upper limit value of the power consumption is provided, and when the peripheral device operates as in the example of FIG. 4, the power consumption of the entire device increases.

[0004]

FIG. 5 shows the power consumption when word processing software is used. As shown in the figure, during a certain period of time, the period during which a peripheral device such as an HDD is used and the power consumption is large is small, and the power consumption in most of the time is about A (W). This value is
(W), and further, a smaller value than D (W) in FIG. However, in consideration of the withstand current value of the components, the power capacity of the power supply needs to be determined according to the power capacity larger than that in the normal operation so as to be D (W) + the margin at the time of the maximum power. In general, a component having a large power capacity (current capacity) has a larger cost / size than a component having a small power capacity (current capacity). Therefore, it is necessary to use a component whose cost / size is larger than that of the component corresponding to the power capacity in the normal operation, which leads to an increase in the whole area and an increase in cost.
In addition, recent devices are equipped with a high-performance CPU, a color liquid crystal, and the like, so that power consumption is increasing. Since a portable information terminal that is used by carrying it is supplied with power by a battery, when the power consumption when using the portable information terminal increases,
There is a problem that the battery driving operation time is shortened.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problems. By reducing the power consumption of equipment, the power capacity of a power supply unit such as a DC / DC converter can be reduced. It is another object of the present invention to make the power supply unit a small component having a small current capacity. It is another object of the present invention to extend the battery driving operation time by suppressing the power consumption of the system when the peripheral device operates.

[0006]

According to a first aspect of the present invention, there is provided a power consumption control method for controlling the power consumption of a device including a CPU and a peripheral device. CPU based on whether or not
System control means for controlling the frequency of the clock supplied to the system.

According to a second aspect of the present invention, there is provided a power consumption control system having an upper limit value of power consumption of the whole device,
A system control means for controlling a frequency of a clock supplied to U so that power consumption by the CPU and the peripheral device does not exceed the upper limit value.

According to a third aspect of the present invention, there is provided the power consumption control method, wherein the CPU operates when the peripheral device operates.
And system control means for reducing the frequency of the clock supplied to the CPU and reducing the power consumption of the CPU by the power consumption of the peripheral device.

According to a fourth aspect of the present invention, there is provided a power consumption control method for controlling power consumption of a device including a CPU and a peripheral device, wherein the monitoring step monitors the operation of the peripheral device. Controlling the frequency of the clock supplied to the CPU based on whether or not the peripheral device operates.

According to a fifth aspect of the present invention, in the power consumption control method, when the peripheral device operates,
And a control step of reducing a frequency of a clock supplied to the CPU so that power consumption by the peripheral device does not exceed an upper limit value of power consumption of the entire device.

[0011]

BEST MODE FOR CARRYING OUT THE INVENTION

Embodiment 1 FIG. Hereinafter, a first embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing the configuration of the portable information terminal according to the first embodiment. In the figure, reference numerals 1 and 2 denote peripheral devices such as HDDs, FDDs, and CD-ROMs attached to the portable information terminal; Denotes a system controller as system control means for controlling the entire system of the portable information terminal, 5 monitors a request signal from the devices 1 and 2, and outputs a CPU clock frequency control signal for changing the operating frequency of the CPU 3. CPU clock frequency control block, 6 a frequency divider for dividing the clock supplied to the CPU 3, 7 a clock generator for generating a basic clock and outputting it to the frequency divider 6, 8 a CPU 3, a system controller 4, a device 1 , An internal bus for exchanging data between the devices 2, 9 an operation request signal from the device 1, and 10 an operation request signal for the device 1. A permission signal, 11 is an operation request signal from the device 2, 12 is an operation permission signal for the device 2, 13 is a CPU clock frequency control signal output from the CPU clock frequency control block 5 to the frequency divider 6, and 14 is a clock generator. Reference numeral 15 denotes a basic clock output from the frequency divider 6 to the frequency divider 6, and reference numeral 15 denotes a CPU clock output from the frequency divider 6 to the CPU 3.

FIG. 2 is a diagram showing the power consumption of the portable information terminal of FIG. 1. FIG. 2 (a) shows that the power consumption when the devices 1 and 2 are not operating is A (W). ,
(B) shows the power consumption when the device 1 operates, (c) shows the power consumption when the device 2 operates, and (d) shows the power consumption when the devices 1 and 2 operate together. As shown in the figure, in the portable information terminal of this embodiment, the power consumed by the system is A (W) when the devices 1 and 2 are not operating.
And the power consumption is controlled not to exceed A (W) even when the devices 1 and 2 operate.

Next, the operation will be described with reference to the flowchart of FIG. The CPU clock frequency control block 5 in the system controller 4 constantly monitors operation request signals from the devices 1 and 2 (step S1). First, when there is no operation request from the devices 1 and 2, the CPU clock frequency control block 5 sends the CPU clock to the frequency divider 6 in the normal state (the devices 1 and 2 are both operating) by the CPU clock frequency control signal 13. (No state) (step S7). Divider 6
Changes the CPU clock 15 having the normal frequency to the CPU 3
(Step S8). At this time, the power consumption of the entire system has a value as shown in FIG.

Next, when the device 1 operates, the device 1 issues a device 1 operation request signal 9. Upon receiving this operation request signal, the CPU clock frequency control block 5 checks whether or not one device is operating (step S2). Since there is only one, the CPU clock is set to the frequency divider 6 so that the frequency becomes 6 times lower than the normal state by the CPU clock frequency control signal 13 (step S3). Thereafter, the CPU clock frequency control block 5 notifies the device 1 of the device 1 operation permission signal 10 (step S4), and the device 1 starts operating. The frequency divider 6 supplies the CPU 3 with the CPU clock 15 having a frequency 1/4 that of the normal state (step S8). The power consumption of the entire system at this time is shown in FIG.
This is shown in FIG. If device 1 operates, C
By reducing the clock speed of the PU 3 to 1/4 of the normal state, the power consumption of the CPU unit is reduced as much as the power consumption of the device 1 is increased, and the power consumption of the entire system is increased more than that in FIG. It is controlled so that it does not become.

Next, when the device 2 operates, the device 2 issues a device 2 operation request signal 11. CPU
Upon receiving the operation request signal, the clock frequency control block 5 checks whether or not one device is operating (step S2). Since there is only one, the CPU clock is set to the frequency divider 6 so that the frequency becomes 6 times lower than the normal state by the CPU clock frequency control signal 13 (step S3). Thereafter, the CPU clock frequency control block 5 notifies the device 2 of the device 2 operation permission signal 12 (step S4), and the device 2 starts operating. The frequency divider 6 supplies the CPU 3 with the CPU clock 15 having a frequency 1/4 that of the normal state (step S8). The power consumption of the entire system at this time is shown in FIG.
(C). When the device 2 operates, similarly to the case where the device 1 operates, the clock speed of the CPU 3 is reduced to ４ of the normal state, so that the power consumption of the CPU unit is reduced by an amount corresponding to an increase in the power consumption of the device 2. FIG. 2A shows the power consumption of the entire system in a normal state.
It is controlled so that it does not increase more.

Next, when the devices 1 and 2 operate together,
The device 1 issues a device 1 operation request signal 9, and the device 2 issues a device 2 operation request signal 11. The clock frequency control block 5 receives these two operation request signals and checks whether or not one device is operating (step S2). Since there are two, the CPU clock is set to the frequency of the frequency divider 6 so that the frequency becomes 1/8 of the normal state by the CPU clock frequency control signal 13 (step S5). Thereafter, the CPU clock frequency control block 5 notifies the device 1 of the device 1 operation permission signal 10 and notifies the device 2 of the device 2 operation permission signal 12 (step S6). As a result, the devices 1 and 2 start operating. The frequency divider 6
CPU clock 15 of 1/8 frequency of normal state
It is supplied to U3 (step S8). FIG. 2D shows the power consumption of the entire system at this time. When the devices 1 and 2 operate, the clock speed of the CPU is reduced to 1/8 of the normal state, whereby the devices 1 and 2 are operated.
The power consumption of the CPU unit is reduced as much as the power consumption of the system increases, and the power consumption of the entire system is controlled so as not to be higher than that in FIG. 2A in the normal state.

As described above, according to this embodiment,
Whether the peripheral device operates or not is monitored. When the peripheral device operates, the frequency of the clock supplied to the CPU is set lower than usual, so that even if the peripheral device operates, the peripheral device operates. Since only the same power is consumed as in the case where no power is consumed, the power can always be controlled so as not to exceed the power consumption during normal operation, regardless of the number of operating devices. As a result, the power capacity of the power supply can be made smaller than in the past, and in the power supply unit such as a DC / DC converter, small parts having a smaller current capacity can be used as compared with the past, and the component area of the entire system can be increased. / It is also possible to reduce costs.

In this embodiment, the number of devices is 2.
However, the same control can be performed even when there are two or more devices, and the same effect can be obtained.

Embodiment 2 In the first embodiment, when one peripheral device operates, the CPU clock frequency is set to 1/4 of the normal, and when two peripheral devices operate, the CPU clock frequency is set to 1/8 of the normal. Although the mode has been described, it is also possible to control so that the power consumption of the entire system is kept below a predetermined maximum value. For example, the CPU clock frequency may be reduced so that the power consumption of the CPU is reduced by the power consumption of the peripheral device that has requested the operation.

[0020]

According to the first or fourth aspect of the present invention, the frequency of the clock supplied to the CPU is controlled based on whether the peripheral device operates or not, so that the power consumption of the device when the peripheral device operates is controlled. Therefore, the power capacity of the power supply can be made smaller than before, and a small component having a small current capacity can be used in the power supply unit. Further, when the peripheral device operates, C
Since the power consumption of the PU is reduced, the battery driving operation time can be extended.

According to the second or fifth aspect of the invention, when the peripheral device operates, the power is supplied to the CPU so that the power consumption by the CPU and the peripheral device does not exceed the upper limit value of the power consumption of the entire apparatus. Since the frequency of the clock is controlled, the power consumption of the device can be kept below a certain value.

According to the third aspect of the present invention, when the peripheral device operates, the frequency of the clock supplied to the CPU is reduced, and the power consumption of the CPU is reduced by the power consumption of the peripheral device. Power consumption can be kept below a certain value.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a portable information terminal according to a first embodiment.

FIG. 2 is a diagram illustrating power consumption in the portable information terminal according to the first embodiment.

FIG. 3 is a flowchart showing an operation of the portable information terminal according to the first embodiment.

FIG. 4 is a diagram showing power consumption in a conventional portable information terminal.

FIG. 5 is a diagram illustrating power consumption when a word processing software is used in a conventional portable information terminal.

[Explanation of symbols]

1, 2 devices, 3 CPU, 4 system controller, 5 CPU clock frequency control block, 6 frequency divider, 7 clock generator, 8 internal bus, 9 device 1 operation request signal, 10 device 1 operation enable signal, 11
Device 2 operation request signal, 12 Device 2 operation permission signal, 13 CPU clock frequency control signal, 14 basic clock, 15 CPU clock.

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Hidenobu Fukushima 2-3-2 Marunouchi, Chiyoda-ku, Tokyo Mitsubishi Electric Corporation

Claims (5)

[Claims] 1. A power consumption control method for controlling power consumption of a device including a CPU and a peripheral device, wherein the CP is controlled based on whether the peripheral device operates.
A power consumption control method comprising a system control means for controlling a frequency of a clock supplied to U. 2. The system control means has an upper limit value of the power consumption of the entire device, and sets a frequency of a clock supplied to the CPU such that power consumption by the CPU and the peripheral device exceeds the upper limit value. 2. The power consumption control method according to claim 1, wherein the control is performed so as not to occur. 3. The system control means, when the peripheral device operates, reduces the frequency of a clock supplied to the CPU to reduce the power consumption of the CPU by the power consumption of the peripheral device. 3. The power consumption control method according to claim 2, wherein: 4. A power consumption control method for controlling power consumption of a device including a CPU and a peripheral device, comprising: a monitoring step of monitoring operation of the peripheral device; and determining whether the peripheral device operates. The above CP
A control step of controlling a frequency of a clock supplied to U. 5. The control step includes: when the peripheral device operates, supplying the power to the CPU such that power consumption by the CPU and the peripheral device does not exceed an upper limit value of power consumption of the entire device. 5. The power consumption control method according to claim 4, wherein the frequency of the clock to be used is reduced.