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JPH10144827A - Resin sealed semiconductor device, production thereof and die therefor - Google Patents

Resin sealed semiconductor device, production thereof and die therefor

Info

Publication number
JPH10144827A
JPH10144827A JP30210996A JP30210996A JPH10144827A JP H10144827 A JPH10144827 A JP H10144827A JP 30210996 A JP30210996 A JP 30210996A JP 30210996 A JP30210996 A JP 30210996A JP H10144827 A JPH10144827 A JP H10144827A
Authority
JP
Japan
Prior art keywords
resin
semiconductor device
semiconductor chip
sealed
low
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP30210996A
Other languages
Japanese (ja)
Inventor
Noriko Murakami
紀子 村上
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP30210996A priority Critical patent/JPH10144827A/en
Publication of JPH10144827A publication Critical patent/JPH10144827A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B29WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29CSHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
    • B29C45/00Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor
    • B29C45/16Making multilayered or multicoloured articles
    • B29C45/1671Making multilayered or multicoloured articles with an insert
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B29WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29CSHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
    • B29C45/00Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor
    • B29C45/02Transfer moulding, i.e. transferring the required volume of moulding material by a plunger from a "shot" cavity into a mould cavity
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B29WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29CSHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
    • B29C45/00Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor
    • B29C45/14Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles
    • B29C45/14639Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles for obtaining an insulating effect, e.g. for electrical components
    • B29C45/14655Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles for obtaining an insulating effect, e.g. for electrical components connected to or mounted on a carrier, e.g. lead frame

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Mechanical Engineering (AREA)
  • Moulds For Moulding Plastics Or The Like (AREA)
  • Injection Moulding Of Plastics Or The Like (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To realize a resin sealed semiconductor device in which reflow resistance is enhanced while decreasing thermal resistance by arranging a low stress and high thermally conductive sealing resins on the opposite sides of a lead frame die bonded with a semiconductor chip. SOLUTION: Since the upper and lower transfer molding dies 11, 12 are provided, respectively, with gates 13, 14 and pots 15, 16, a lead frame 2 can be sealed with different resins on the opposite sides thereof. More specifically, a resin sealed semiconductor device having low stress and low thermal resistance can be obtained by sealing a semiconductor chip 1 with a low stress resin 3 on the mounting side and with a high thermally conductive resin 4 on the opposite side. Consequently, stress is suppressed on the interface between the semiconductor chip and the low stress resin at the time of heating the resin sealed semiconductor device and reflow resistance can be enhanced while decreasing thermal resistance by dissipating heat to be generated on the semiconductor chip during operation efficiently through the high thermally conductive resin.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、樹脂封止半導体装
置の構造、その製造方法及びその金型に関するものであ
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure of a resin-sealed semiconductor device, a method of manufacturing the same, and a mold thereof.

【0002】[0002]

【従来の技術】従来、このような分野の技術としては、
例えば、文献名 VLSIパッケージング技術(下)、
日経BP社、P.200に記載されるものがあった。そ
して、上記文献のP.200の図15.3.1に示され
るものがあり、「材料」と「構造」の二つの面から低熱
抵抗化が行われてきた。
2. Description of the Related Art Conventionally, techniques in such a field include:
For example, literature title VLSI packaging technology (below),
Nikkei BP, P.K. 200. The P.S. 200, shown in FIG. 15.3.1, the thermal resistance has been reduced from two aspects of “material” and “structure”.

【0003】その「材料」面では、リードフレーム材料
として、Cuを用いたり、モールド樹脂中のフィラーを
工夫するなどして、材料の高熱伝導化を図ってきた。ま
た、「構造」面では、ダイパッドサイズを大きくするな
ど、リードフレーム形状を工夫したり、装置内部に放熱
板を内蔵するという手法をとっていた。
On the "material" side, Cu has been used as a lead frame material, or a filler in a molding resin has been devised to improve the thermal conductivity of the material. On the “structure” side, the lead frame shape has been devised, for example, by increasing the die pad size, or a method of incorporating a heat sink inside the device has been adopted.

【0004】[0004]

【発明が解決しようとする課題】しかしながら、上記し
た従来の方法であっても、それぞれの問題点、欠点があ
り、技術的に満足できるものは得られなかった。以下に
それについて述べる。 (1)高熱伝導化した材料を用いた場合、装置内に発生
する応力が大きくなり、リフロー耐性、T/C(温度サ
イクル:Temperature Cycle)性に弱
い。因みに、T/C試験について述べると、半導体装置
の信頼性試験の1つに温度サイクル試験があり、この温
度サイクル試験は、半導体装置を高温雰囲気(125℃
〜150℃)と低温雰囲気(−55℃〜−65℃)とに
交互に30分ずつ晒す試験で、半導体装置内に熱応力を
発生させ、良否を見る。
However, even the above-mentioned conventional methods have respective problems and disadvantages, and have not been technically satisfactory. This is described below. (1) When a material having high thermal conductivity is used, the stress generated in the device increases, and the reflow resistance and the T / C (Temperature Cycle) property are weak. Incidentally, as for the T / C test, one of the reliability tests of the semiconductor device is a temperature cycle test. In this temperature cycle test, the semiconductor device is placed in a high-temperature atmosphere (125 ° C.).
(150 ° C.) and a low-temperature atmosphere (−55 ° C. to −65 ° C.) alternately for 30 minutes to generate a thermal stress in the semiconductor device and check the quality.

【0005】(2)ダイパッドサイズの拡大には限界が
あり、また放熱板を内蔵した場合は、薄型化に限界があ
る。本発明は、上記問題点を除去し、リフロー耐性が高
く、かつ熱抵抗を低くすることができる樹脂封止半導体
装置、その製造方法及びその金型を提供することを目的
とする。
(2) There is a limit to the enlargement of the die pad size, and when a heat sink is built in, there is a limit to the reduction in thickness. SUMMARY OF THE INVENTION An object of the present invention is to provide a resin-sealed semiconductor device capable of eliminating the above-mentioned problems and having high reflow resistance and low thermal resistance, a method of manufacturing the same, and a mold thereof.

【0006】[0006]

【課題を解決するための手段】本発明は、上記目的を達
成するために、 (1)樹脂封止半導体装置において、半導体チップがダ
イボンドされたリードフレームを挟んで、前記半導体チ
ップを搭載した側に封止される低応力樹脂と、前記半導
体チップを搭載した側の反対側に封止される高熱伝導樹
脂とを設けるようにしたものである。
According to the present invention, there is provided a resin-encapsulated semiconductor device, comprising: a lead frame on which a semiconductor chip is die-bonded; And a high thermal conductive resin sealed on the side opposite to the side on which the semiconductor chip is mounted.

【0007】このように、リードフレームの上側、つま
り、半導体チップを搭載した側に低応力樹脂、リードフ
レームの下側に高熱伝導樹脂を有するようにしたので、
リフロー耐性が高く、かつ熱抵抗を低くすることができ
る樹脂封止半導体装置を得ることができる。 (2)樹脂封止半導体装置の製造方法において、半導体
チップがダイボンドされたリードフレームを挟んで、前
記半導体チップを搭載した側は低応力樹脂で封止し、前
記半導体チップを搭載した側の反対側は高熱伝導樹脂で
封止するようにしたものである。
As described above, the low-stress resin is provided above the lead frame, that is, the side on which the semiconductor chip is mounted, and the high thermal conductive resin is provided below the lead frame.
A resin-sealed semiconductor device having high reflow resistance and low thermal resistance can be obtained. (2) In the method of manufacturing a resin-encapsulated semiconductor device, the side on which the semiconductor chip is mounted is sealed with a low-stress resin with the lead frame to which the semiconductor chip is die-bonded interposed therebetween, and the side opposite to the side on which the semiconductor chip is mounted is opposite. The side is sealed with a high thermal conductive resin.

【0008】このように、リードフレームの上側、つま
り、半導体チップを搭載した側に低応力樹脂、リードフ
レームの下側に高熱伝導樹脂で封止するようにしたの
で、樹脂封止半導体装置の加熱時に半導体チップと低応
力樹脂の界面に発生する応力を低減することができ、動
作時に半導体チップ上に発生する熱を、高熱伝導樹脂を
介して効率良く放熱することができ、リフロー耐性が高
く、かつ熱抵抗を低くすることができる。
As described above, the upper portion of the lead frame, that is, the side on which the semiconductor chip is mounted is sealed with a low stress resin, and the lower side of the lead frame is sealed with a high thermal conductive resin. Stress generated at the interface between the semiconductor chip and the low-stress resin at the time can be reduced, and the heat generated on the semiconductor chip during operation can be efficiently radiated through the high thermal conductive resin, and the reflow resistance is high, In addition, the thermal resistance can be reduced.

【0009】(3)樹脂封止半導体装置のトランスファ
ーモールド用金型において、上金型用ポットと上金型用
ゲートと上金型キャビティとを具備する上金型と、下金
型用ポットと下金型用ゲートと下金型キャビティとを具
備する下金型とを備え、半導体チップがダイボンドされ
たリードフレームを前記上金型と下金型とで挟んで、別
の樹脂で封止するようにしたものである。
(3) In a mold for transfer molding of a resin-sealed semiconductor device, an upper mold having an upper mold pot, an upper mold gate, and an upper mold cavity, and a lower mold pot are provided. A lower mold having a lower mold gate and a lower mold cavity is provided, and a lead frame to which a semiconductor chip is die-bonded is sandwiched between the upper mold and the lower mold, and sealed with another resin. It is like that.

【0010】したがって、簡単な構造で、リードフレー
ムを挟んで上下に別々の樹脂、つまり、半導体チップを
搭載した側は低応力樹脂でその反対側は高熱伝導樹脂で
封止することにより、低応力性かつ低熱抵抗性を有する
樹脂封止半導体装置を製造することができる金型を得る
ことができる。
[0010] Therefore, by using a simple structure, separate resins are provided vertically above and below the lead frame, that is, the side on which the semiconductor chip is mounted is sealed with a low-stress resin and the opposite side is sealed with a high-thermal-conductivity resin. It is possible to obtain a mold capable of manufacturing a resin-encapsulated semiconductor device having high heat resistance and low heat resistance.

【0011】[0011]

【発明の実施の形態】以下、本発明の実施の形態につい
て図面を参照して詳細に説明する。図1は本発明の実施
例を示す樹脂封止半導体装置の断面図である。この図に
示すように、リードフレーム2より上側(半導体チップ
1側)は低応力樹脂3で封止し、リードフレーム2より
下側は高熱伝導樹脂4にて封止されている。なお、低応
力樹脂3と高熱伝導樹脂4の間にもエポキシ樹脂結合が
行われており、隙間は存在しない。
Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 is a sectional view of a resin-sealed semiconductor device showing an embodiment of the present invention. As shown in this figure, the upper side (the semiconductor chip 1 side) of the lead frame 2 is sealed with a low stress resin 3, and the lower side of the lead frame 2 is sealed with a high thermal conductive resin 4. Note that the epoxy resin bonding is also performed between the low stress resin 3 and the high thermal conductive resin 4, and there is no gap.

【0012】ここで、低応力樹脂3と高熱伝導樹脂4に
ついて具体的に説明すると、一般に半導体の封止樹脂
は、骨格となるエポキシ樹脂にさまざまな材料が混合さ
れている。低応力樹脂と高熱伝導樹脂とは混合されてい
る材料が若干異なる。例えば、低応力樹脂は、エポキシ
樹脂、充填材(シリカ)、低応力材(シリコーン)、顔
料、その他からなる。また、高熱伝導樹脂は、エポキシ
樹脂、充填材(アルミナ)、顔料、その他からなる。
Here, the low-stress resin 3 and the high-thermal-conductivity resin 4 will be described in detail. In general, a semiconductor encapsulating resin is composed of a skeleton epoxy resin mixed with various materials. The mixed materials of the low stress resin and the high thermal conductive resin are slightly different. For example, the low stress resin includes an epoxy resin, a filler (silica), a low stress material (silicone), a pigment, and the like. The high thermal conductive resin is made of an epoxy resin, a filler (alumina), a pigment, and others.

【0013】因みに、低応力樹脂、高熱伝導樹脂とも骨
格がエポキシ樹脂であることに変わりは無いので界面は
存在しない。リードフレームを境にシリカ、シリコーン
が含まれる低応力樹脂領域と、アルミナが含まれる高熱
伝導樹脂領域が形成される。このように、リードフレー
ム2の上側(半導体チップ1側)を低応力樹脂3で封止
したので、リフロー時など、加熱時に半導体チップ1と
低応力樹脂3の界面に発生する応力を低くすることがで
きる。
Incidentally, since the skeleton of the low-stress resin and the high-thermal-conductivity resin remains an epoxy resin, there is no interface. A low-stress resin region containing silica and silicone and a high-thermal-conductivity resin region containing alumina are formed on the border of the lead frame. Since the upper side of the lead frame 2 (semiconductor chip 1 side) is sealed with the low-stress resin 3 as described above, the stress generated at the interface between the semiconductor chip 1 and the low-stress resin 3 during heating, such as during reflow, can be reduced. Can be.

【0014】また、リードフレーム2の下側を高熱伝導
樹脂4で封止するようにしたので、動作時、半導体チッ
プ1上に発生する熱を効率良く放熱することが可能であ
る。このように、この実施例によれば、リードフレーム
2の上側(半導体チップ1側)を低応力樹脂3、リード
フレーム2の下側を高熱伝導樹脂4で封止するようにし
たので、樹脂封止半導体装置の加熱時に、半導体チップ
1と低応力樹脂3の界面に発生する応力を低減し、動作
時に半導体チップ1上に発生する熱を、高熱伝導樹脂4
を介して効率良く放熱することができ、リフロー耐性が
高く、かつ熱抵抗を低くすることができる。
Further, since the lower side of the lead frame 2 is sealed with the high thermal conductive resin 4, it is possible to efficiently radiate heat generated on the semiconductor chip 1 during operation. As described above, according to this embodiment, the upper side (semiconductor chip 1 side) of the lead frame 2 is sealed with the low stress resin 3 and the lower side of the lead frame 2 is sealed with the high thermal conductive resin 4. When the semiconductor device is heated, the stress generated at the interface between the semiconductor chip 1 and the low stress resin 3 is reduced, and the heat generated on the semiconductor chip 1 during operation is reduced by the high thermal conductive resin 4.
, Heat can be efficiently dissipated, the reflow resistance is high, and the thermal resistance is low.

【0015】次に、本発明の実施例を示す樹脂封止半導
体装置の製造方法について説明する。図2は本発明の実
施例を示す樹脂封止半導体装置を製造するためのトラン
スファーモールド用金型の断面図、図3はそのトランス
ファーモールド用金型の平面図、図4はそのトランスフ
ァーモールド用金型によるトランスファーモールドの状
態を示す図である。
Next, a method of manufacturing a resin-sealed semiconductor device according to an embodiment of the present invention will be described. 2 is a cross-sectional view of a transfer mold for manufacturing a resin-encapsulated semiconductor device according to an embodiment of the present invention, FIG. 3 is a plan view of the transfer mold, and FIG. 4 is a transfer mold. It is a figure showing the state of transfer mold by a type.

【0016】これらの図において、11は上金型、12
は下金型、13は上金型用ゲート、14は下金型用ゲー
ト、15は上金型用ポット、16は下金型用ポット、1
7はキャビティである。このように、上金型11、下金
型12にそれぞれ上金型用ゲート13、下金型用ゲート
14及びそれらにつながる上金型用ポット15、下金型
用ポット16を設け、半導体チップ1をダイスボンドし
たリードフレーム2の上下に、それぞれ別の樹脂が流し
込めるようにする。
In these figures, 11 is an upper mold, 12
Is a lower mold gate, 13 is an upper mold gate, 14 is a lower mold gate, 15 is an upper mold pot, 16 is a lower mold pot,
7 is a cavity. As described above, the upper die 11 and the lower die 12 are provided with the upper die gate 13, the lower die gate 14, and the upper die pot 15 and the lower die pot 16 connected thereto, respectively. Different resins can be poured above and below the lead frame 2 on which the die 1 is die-bonded.

【0017】上金型用ポット15からは低応力樹脂3
を、下型用ポット16からは高熱伝導樹脂4を同時に流
し込み成形する。このように、この実施例によれば、ト
ランスファーモールド用金型の上金型11と下金型12
に、それぞれ別の上金型用ゲート13、下金型用ゲート
14と上金型用ポット15、下金型用ポット16を設け
るようにしたので、リードフレーム2を挟んで上下に別
々の樹脂で封止することができる。すなわち、図4に示
すように、半導体チップ1を搭載した側は低応力樹脂3
でその反対側は高熱伝導樹脂4で封止することにより、
低応力性かつ低熱抵抗性を有する樹脂封止半導体装置を
得ることができる。
From the upper mold pot 15, a low-stress resin 3
The high heat conductive resin 4 is simultaneously poured from the lower mold pot 16 and molded. As described above, according to this embodiment, the upper mold 11 and the lower mold 12 for the transfer mold are used.
Are provided with separate upper and lower mold gates 13, lower mold gates 14, upper mold pots 15, and lower mold pots 16, respectively. Can be sealed. That is, as shown in FIG. 4, the side on which the semiconductor chip 1 is mounted
By sealing the other side with the high thermal conductive resin 4,
A resin-encapsulated semiconductor device having low stress and low thermal resistance can be obtained.

【0018】なお、本発明は上記実施例に限定されるも
のではなく、本発明の趣旨に基づいて種々の変形が可能
であり、これらを本発明の範囲から排除するものではな
い。
It should be noted that the present invention is not limited to the above embodiment, and various modifications are possible based on the spirit of the present invention, and these are not excluded from the scope of the present invention.

【0019】[0019]

【発明の効果】以上、詳細に説明したように、本発明に
よれば、以下のような効果を奏することができる。 (1)請求項1記載の発明によれば、リードフレームの
上側、つまり、半導体チップを搭載した側に低応力樹
脂、リードフレームの下側に高熱伝導樹脂を有するよう
にしたので、リフロー耐性が高く、かつ熱抵抗を低くす
ることができる樹脂封止半導体装置を得ることができ
る。
As described above, according to the present invention, the following effects can be obtained. (1) According to the first aspect of the present invention, a low stress resin is provided on the upper side of the lead frame, that is, a side on which the semiconductor chip is mounted, and a high thermal conductive resin is provided on the lower side of the lead frame. It is possible to obtain a resin-encapsulated semiconductor device that is high and can reduce thermal resistance.

【0020】(2)請求項2記載の発明によれば、リー
ドフレームの上側、つまり、半導体チップを搭載した側
に低応力樹脂、リードフレームの下側を高熱伝導樹脂で
封止するようにしたので、樹脂封止半導体装置の加熱時
に半導体チップと樹脂の界面に発生する応力を低減し、
動作時に半導体チップ上に発生する熱を、高熱伝導樹脂
を介して効率良く放熱することができ、リフロー耐性が
高く、かつ熱抵抗を低くすることができる。
(2) According to the second aspect of the invention, the upper side of the lead frame, that is, the side on which the semiconductor chip is mounted, is sealed with a low stress resin, and the lower side of the lead frame is sealed with a high thermal conductive resin. Therefore, the stress generated at the interface between the semiconductor chip and the resin when the resin-encapsulated semiconductor device is heated is reduced,
The heat generated on the semiconductor chip during operation can be efficiently radiated through the high thermal conductive resin, and the reflow resistance can be high and the thermal resistance can be low.

【0021】(3)請求項3記載の発明によれば、簡単
な構造で、リードフレームを挟んで上下を別々の樹脂、
つまり、半導体チップを搭載した側は低応力樹脂でその
反対側は高熱伝導樹脂で封止することにより、低応力性
かつ低熱抵抗性を有する樹脂封止半導体装置を製造する
ことができる金型を得ることができる。
(3) According to the third aspect of the invention, the upper and lower parts of the resin are separated by a simple structure,
In other words, the mold on which the semiconductor chip mounted side is sealed with a low-stress resin and the opposite side with a high-thermal-conductivity resin is used to manufacture a resin-encapsulated semiconductor device having low stress and low thermal resistance. Obtainable.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の実施例を示す樹脂封止半導体装置の断
面図である。
FIG. 1 is a sectional view of a resin-sealed semiconductor device showing an embodiment of the present invention.

【図2】本発明の実施例を示す樹脂封止半導体装置を製
造するためのトランスファーモールド用金型の断面図で
ある。
FIG. 2 is a cross-sectional view of a transfer mold for manufacturing a resin-sealed semiconductor device according to an embodiment of the present invention.

【図3】本発明の実施例を示す樹脂封止半導体装置を製
造するためのトランスファーモールド用金型の平面図で
ある。
FIG. 3 is a plan view of a transfer molding die for manufacturing a resin-sealed semiconductor device according to an embodiment of the present invention.

【図4】本発明の実施例を示すトランスファーモールド
用金型による半導体装置のトランスファーモールドの状
態を示す図である。
FIG. 4 is a diagram showing a state of transfer molding of a semiconductor device using a transfer mold according to an embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1 半導体チップ 2 リードフレーム 3 低応力樹脂 4 高熱伝導樹脂 11 上金型 12 下金型 13 上金型用ゲート 14 下金型用ゲート 15 上金型用ポット 16 下金型用ポット 17 キャビティ REFERENCE SIGNS LIST 1 semiconductor chip 2 lead frame 3 low stress resin 4 high thermal conductive resin 11 upper mold 12 lower mold 13 upper mold gate 14 lower mold gate 15 upper mold pot 16 lower mold pot 17 cavity

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.6 識別記号 FI B29C 45/26 H01L 21/56 R H01L 21/56 // B29L 31:34 ──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. 6 Identification code FI B29C 45/26 H01L 21/56 R H01L 21/56 // B29L 31:34

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 樹脂封止半導体装置において、 半導体チップがダイボンドされたリードフレームを挟ん
で、前記半導体チップを搭載した側に封止される低応力
樹脂と、前記半導体チップを搭載した側の反対側に封止
される高熱伝導樹脂とを具備することを特徴とする樹脂
封止半導体装置。
In a resin-encapsulated semiconductor device, a low-stress resin encapsulated on a side on which the semiconductor chip is mounted and a side opposite to the side on which the semiconductor chip is mounted are sandwiched by a lead frame to which the semiconductor chip is die-bonded. And a high thermal conductive resin sealed on the side.
【請求項2】 樹脂封止半導体装置の製造方法におい
て、 半導体チップがダイボンドされたリードフレームを挟ん
で、前記半導体チップを搭載した側は低応力樹脂で封止
し、前記半導体チップを搭載した側の反対側は高熱伝導
樹脂で封止することを特徴とする樹脂封止半導体装置の
製造方法。
2. A method for manufacturing a resin-encapsulated semiconductor device, comprising: a side on which the semiconductor chip is mounted is sealed with a low-stress resin; The other side of the semiconductor device is sealed with a high thermal conductive resin.
【請求項3】 樹脂封止半導体装置のトランスファーモ
ールド用金型において、(a)上金型用ポットと上金型
用ゲートと上金型キャビティとを具備する上金型と、
(b)下金型用ポットと下金型用ゲートと下金型キャビ
ティとを具備する下金型とを備え、(c)半導体チップ
がダイボンドされたリードフレームを前記上金型と下金
型とで挟んで、別の樹脂で封止することを特徴とする樹
脂封止半導体装置製造用金型。
3. A transfer mold for a resin-encapsulated semiconductor device, comprising: (a) an upper mold having an upper mold pot, an upper mold gate, and an upper mold cavity;
(B) a lower mold having a lower mold pot, a lower mold gate, and a lower mold cavity; and (c) a lead frame to which a semiconductor chip is die-bonded. And sealing with another resin.
JP30210996A 1996-11-13 1996-11-13 Resin sealed semiconductor device, production thereof and die therefor Withdrawn JPH10144827A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP30210996A JPH10144827A (en) 1996-11-13 1996-11-13 Resin sealed semiconductor device, production thereof and die therefor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP30210996A JPH10144827A (en) 1996-11-13 1996-11-13 Resin sealed semiconductor device, production thereof and die therefor

Publications (1)

Publication Number Publication Date
JPH10144827A true JPH10144827A (en) 1998-05-29

Family

ID=17905046

Family Applications (1)

Application Number Title Priority Date Filing Date
JP30210996A Withdrawn JPH10144827A (en) 1996-11-13 1996-11-13 Resin sealed semiconductor device, production thereof and die therefor

Country Status (1)

Country Link
JP (1) JPH10144827A (en)

Cited By (7)

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JP2004014896A (en) * 2002-06-10 2004-01-15 Fuji Electric Holdings Co Ltd Resin sealed semiconductor device and its manufacturing method
JP2005191064A (en) * 2003-12-24 2005-07-14 Nec Electronics Corp Method and apparatus of sealing with resin
JP2013004848A (en) * 2011-06-20 2013-01-07 Semiconductor Components Industries Llc Semiconductor device and manufacturing method of the same
JP2014506395A (en) * 2010-12-14 2014-03-13 ローベルト ボツシユ ゲゼルシヤフト ミツト ベシユレンクテル ハフツング Method for manufacturing an electronic unit having a molded body
WO2018154744A1 (en) * 2017-02-27 2018-08-30 三菱電機株式会社 Semiconductor device and method for manufacturing semiconductor device
JP2019181715A (en) * 2018-04-03 2019-10-24 三菱電機株式会社 Power module manufacturing device and manufacturing method of power module
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Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004014896A (en) * 2002-06-10 2004-01-15 Fuji Electric Holdings Co Ltd Resin sealed semiconductor device and its manufacturing method
JP2005191064A (en) * 2003-12-24 2005-07-14 Nec Electronics Corp Method and apparatus of sealing with resin
JP2014506395A (en) * 2010-12-14 2014-03-13 ローベルト ボツシユ ゲゼルシヤフト ミツト ベシユレンクテル ハフツング Method for manufacturing an electronic unit having a molded body
JP2013004848A (en) * 2011-06-20 2013-01-07 Semiconductor Components Industries Llc Semiconductor device and manufacturing method of the same
WO2018154744A1 (en) * 2017-02-27 2018-08-30 三菱電機株式会社 Semiconductor device and method for manufacturing semiconductor device
KR20190105639A (en) * 2017-02-27 2019-09-17 미쓰비시덴키 가부시키가이샤 Semiconductor device, manufacturing method of semiconductor device
CN110326102A (en) * 2017-02-27 2019-10-11 三菱电机株式会社 The manufacturing method of semiconductor device, semiconductor device
JPWO2018154744A1 (en) * 2017-02-27 2019-11-07 三菱電機株式会社 Semiconductor device and method for manufacturing semiconductor device
CN110326102B (en) * 2017-02-27 2023-06-09 三菱电机株式会社 Semiconductor device and method for manufacturing semiconductor device
JP2019181715A (en) * 2018-04-03 2019-10-24 三菱電機株式会社 Power module manufacturing device and manufacturing method of power module
WO2020021667A1 (en) * 2018-07-25 2020-01-30 日立化成株式会社 Electronic-component-device manufacturing method, electronic component device, and sealing material

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