JPH09331323A - Bulk communication system - Google Patents
Bulk communication systemInfo
- Publication number
- JPH09331323A JPH09331323A JP8152431A JP15243196A JPH09331323A JP H09331323 A JPH09331323 A JP H09331323A JP 8152431 A JP8152431 A JP 8152431A JP 15243196 A JP15243196 A JP 15243196A JP H09331323 A JPH09331323 A JP H09331323A
- Authority
- JP
- Japan
- Prior art keywords
- delay
- channel
- delay difference
- control processor
- pattern
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000004891 communication Methods 0.000 title claims abstract description 34
- 238000012937 correction Methods 0.000 claims abstract description 31
- 238000001514 detection method Methods 0.000 claims abstract description 24
- 238000000034 method Methods 0.000 claims description 11
- 238000000926 separation method Methods 0.000 claims description 6
- 238000012545 processing Methods 0.000 abstract description 4
- 238000010586 diagram Methods 0.000 description 5
- 230000005540 biological transmission Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 238000009432 framing Methods 0.000 description 2
- 230000006835 compression Effects 0.000 description 1
- 238000007906 compression Methods 0.000 description 1
- 238000012790 confirmation Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
Landscapes
- Data Exchanges In Wide-Area Networks (AREA)
- Telephonic Communication Services (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、統合デジタル網の
通信方式に関し、特に複数のチャネルを使用して、デー
タを分離して送受信を行うバルク通信方式に属する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a communication system for an integrated digital network, and more particularly to a bulk communication system for separating and transmitting data by using a plurality of channels.
【０００２】[0002]
【従来の技術】特開平６−１２５３４３はデータの遅延
補正の範囲広げるため、または、バルク通信する速度に
融通を持たせるためのものであり、本発明のバルク通信
時の遅延時間を少くする目的とは根本的に異なる。特開
平５−２３６０５５は、バルク通信時の接続待ち時間を
少くする目的のものであり、本発明は接続後のデータ通
信遅延時間を小さくする目的のものであり、根本的に異
なる。2. Description of the Related Art Japanese Unexamined Patent Publication No. 6-125343 is intended to widen the range of data delay correction or to provide flexibility in bulk communication speed, and to reduce the delay time during bulk communication according to the present invention. Is fundamentally different from. Japanese Unexamined Patent Publication No. 5-236055 is intended to reduce the connection wait time during bulk communication, and the present invention is intended to reduce the data communication delay time after connection, which is fundamentally different.
【０００３】[0003]
【発明が解決しようとする課題】従来のバルク通信方式
では、バルク通信を行う為の遅延バッファでの遅延時間
規定値を設けていない為、最も大きな遅延時間をもつチ
ャネルに合わせる方式であり、大きな遅延が発生するこ
とである。その理由は、遅延補正バッファでの許容最大
遅延時間を定めていない為、最も大きな遅延時間を持つ
チャネルの遅延に、他のチャネルを合わせる方式をとっ
ているからである。In the conventional bulk communication system, since the delay time specified value in the delay buffer for performing bulk communication is not provided, it is a system adapted to the channel having the largest delay time. There is a delay. The reason is that the maximum allowable delay time in the delay correction buffer is not defined, and therefore the system adopts a method of matching the delay of the channel having the largest delay time with other channels.
【０００４】本発明の課題は、統合デジタル網でのバル
ク通信時の回線遅延時間を小さくすることである。特に
最近、フレームリレーや、ＡＴＭの発達において、音声
を圧縮し、かつフレーム化又はセル化して通信を行う需
要が増大している。このとき、圧縮遅延、及びフレーム
化／セル化遅延が生じる為、この様な音声を圧縮してフ
レーム化／セル化して通信を行う場合は特に、従来あま
り問題ではなかった回線の遅延が、大きな問題となりう
る。An object of the present invention is to reduce the line delay time during bulk communication in an integrated digital network. Particularly in recent years, with the development of frame relay and ATM, there is an increasing demand for compressing voice and converting it into frames or cells for communication. At this time, a compression delay and a framing / celling delay occur. Therefore, when such voices are compressed and framing / celling is performed for communication, the line delay, which has not been a problem so far, is large. Can be a problem.
【０００５】[0005]
【課題を解決するための手段】本発明によれば、ＩＳＤ
Ｎ網の複数のチャネルを使用してデータを分離して送受
信するバルク通信方式において、複数のチャネル間のデ
ータの遅延差を判定する手段と、該遅延差と、予め定め
られた遅延差規定値とを比較し、該遅延差規定値を越え
ると遅延差を持つチャネルに対して、回線の切断、再発
呼を遅延差規定値に収まるまで、又は規定回数まで繰り
返す手段を有し、バルク通信時の回線遅延時間を小さく
することを特徴とするバルク通信方式が得られる。According to the present invention, an ISD
In a bulk communication system in which data is separated and transmitted and received using a plurality of channels of N network, a means for determining a delay difference of data between a plurality of channels, the delay difference, and a predetermined delay difference prescribed value When the bulk communication is carried out, there is a means for repeating the line disconnection and the re-calling to the channel having the delay difference when the delay difference specified value is exceeded, until the delay difference is specified value or the specified number of times. It is possible to obtain a bulk communication method characterized by reducing the line delay time.
【０００６】又、本発明によれば、ＩＳＤＮ網に対して
ＩＳＤＮインターフェースにより複数のＢチャネルを発
呼、接続して使用し、高速通信を行うバルク通信方式に
おいて、所定のチャネルが接続した後、制御プロセッサ
により、第１のセレクタにパタン発生器の出力の選択が
行われ、該パタン発生器のパタン発生を開始させ、第２
のセレクタに対してアイドルパタン発生器の出力の選択
が行われ、Ｂ１チャネル遅延差検出部及びＢ２チャネル
遅延差検出部では相手局のパタン発生器で生成されたパ
タンを受信し、自局のパタン発生器で発生したパタンと
の差分比較を行い、前記制御プロセッサにて前記Ｂ１チ
ャネル遅延差検出部及び前記Ｂ２チャネル遅延差検出部
よりＢ１チャネルとＢ２チャネルの遅延差を読み出し、
Ｂ１チャネルとＢ２チャネルの遅延差が規定の遅延差以
内であれば、該遅延差をＢ１チャネル遅延補正バッファ
及びＢ２チャネル遅延補正バッファに設定し、前記第２
のセレクタに対して多重部の出力の選択が行われ、前記
制御プロセッサにより前記パタン発生器に対して自局に
て遅延補正が完了したことを示すパタンを発生させ、前
記Ｂ１チャネル遅延差検出部及び前記Ｂ２チャネル遅延
差検出部にて、相手局の遅延補正が完了したことを示す
パタンを検出した場合、前記制御プロセッサに対して通
知し、該制御プロセッサは前記第１のセレクタを分離部
の出力を選択するように指示してバルク通信を可能とす
ることを特徴とするバルク通信方式が得られる。Further, according to the present invention, in a bulk communication system for calling and connecting a plurality of B channels to an ISDN network through an ISDN interface and performing high speed communication, after a predetermined channel is connected, The control processor causes the first selector to select the output of the pattern generator, starts the pattern generation of the pattern generator, and
Selection of the output of the idle pattern generator is made to the selector of, and the B1 channel delay difference detection unit and the B2 channel delay difference detection unit receive the pattern generated by the pattern generator of the partner station, and the pattern of its own station is received. A difference comparison with a pattern generated by a generator is performed, and the control processor reads the delay difference between the B1 channel and the B2 channel from the B1 channel delay difference detection unit and the B2 channel delay difference detection unit,
If the delay difference between the B1 channel and the B2 channel is within the specified delay difference, the delay difference is set in the B1 channel delay correction buffer and the B2 channel delay correction buffer, and the second
Output of the multiplexing unit is selected by the selector, and the control processor causes the pattern generator to generate a pattern indicating that delay correction is completed in the local station, and the B1 channel delay difference detection unit When the B2 channel delay difference detection unit detects a pattern indicating that the delay correction of the partner station is completed, the B2 channel delay difference detection unit notifies the control processor, and the control processor notifies the first selector of the separation unit. A bulk communication system is obtained which is characterized by instructing to select an output and enabling bulk communication.
【０００７】さらに、本発明によれば、Ｂ１チャネルと
Ｂ２チャネルの遅延差が規定の遅延差を越える場合に
は、遅延の大きいＢチャネルの切断、再発呼を、遅延差
規定値に収まるまで、又は規定回数まで繰り返すことを
特徴とするバルク通信方式が得られる。Further, according to the present invention, when the delay difference between the B1 channel and the B2 channel exceeds the specified delay difference, disconnection and re-calling of the B channel with a large delay are performed until the delay difference is within the specified value. Alternatively, it is possible to obtain a bulk communication method characterized by repeating a specified number of times.
【０００８】[0008]
【作用】チャネル間の遅延差を検出する手段により遅延
差を検出し、該遅延差と最大許容遅延値と比較し、越え
ている場合は、再発呼して、もう一度最大許容値内に収
まるか否か判定し、これを繰り返す手段を有する為、遅
延の大きなチャネルが、小さな遅延となる機会を得るこ
とが可能となる。これにより、遅延時間の少いバルク通
信の提供が可能となる。Function: The delay difference is detected by the means for detecting the delay difference between the channels, and the delay difference is compared with the maximum allowable delay value. If the delay difference is exceeded, the call is recalled and is again within the maximum allowable value. Since it has a means for judging whether or not it is repeated and for repeating it, it becomes possible to obtain an opportunity for a channel with a large delay to have a small delay. This makes it possible to provide bulk communication with a short delay time.
【０００９】[0009]
【発明の実施の形態】次に本発明の実施の形態について
図面を参照して説明する。図１は、本発明の一実施の形
態を示した構成図である。ＩＳＤＮ網１１に対してＩＳ
ＤＮインタフェース１２を介して制御プロセッサ１５が
複数のチャネルを発呼し、送信データを分離して送信を
行い、複数のチャネルより受信した、受信データに対し
遅延補正を行い多重して受信データとするバルク通信方
式の構成図である。ここで、便宜上Ｂ１とＢ２の２つの
チャネルにつき示してあるが、以下で示すアルゴリズム
は、２つ以上のチャネルを使用する場合にも有効であ
る。Embodiments of the present invention will now be described with reference to the drawings. FIG. 1 is a configuration diagram showing an embodiment of the present invention. IS to ISDN network 11
The control processor 15 calls a plurality of channels via the DN interface 12, separates and transmits the transmission data, performs delay correction on the reception data received from the plurality of channels, and multiplexes them to obtain reception data. It is a block diagram of a bulk communication system. Here, two channels B1 and B2 are shown for the sake of convenience, but the algorithm shown below is also effective when two or more channels are used.
【００１０】送信データは分離部１６において２チャネ
ルに分離されセレクタ１３の一方となる。セレクタ１３
の他方の入力は、遅延差検出用パタン発生部１４の出力
である。セレクタ１３は制御プロセッサ１５により入力
の選択を指示され、その出力はＩＳＤＮインタフェース
１２の送信チャネル入力となる。The transmission data is separated into two channels by the separation unit 16 and becomes one of the selectors 13. Selector 13
The other input is the output of the delay difference detection pattern generation unit 14. The selector 13 is instructed to select an input by the control processor 15, and its output becomes the transmission channel input of the ISDN interface 12.
【００１１】ＩＳＤＮインタフェース１２の受信出力
は、Ｂ１／Ｂ２遅延補正バッファ１８とＢ１／Ｂ２遅延
差検出部１７の入力となる。Ｂ１／Ｂ２遅延差検出部１
７は、パタン発生部１４の出力する遅延差検出パタンを
も入力される。Ｂ１／Ｂ２遅延差検出部１７は制御プロ
セッサ１５より、各チャネルの遅延情報と相手局の遅延
補正完了情報を読み出すことが可能である。Ｂ１／Ｂ２
遅延補正バッファ１８は制御プロセッサ１５より、適正
な遅延補正値を設定され、各チャネルに遅延補正を与え
るバッファである。Ｂ１／Ｂ２遅延バッファで遅延補正
された出力は多重部１９に入力され１本の受信データに
多重されて、セレクタ２１の一方の入力となる。セレク
タ２１の他方の入力はアイドルパタン発生器２０の出力
するアイドルパタンが入力される。更にセレクタ２１は
制御プロセッサ１５により入力選択指示され、その出力
が端末への受信データとなる。The reception output of the ISDN interface 12 is input to the B1 / B2 delay correction buffer 18 and the B1 / B2 delay difference detection section 17. B1 / B2 delay difference detection unit 1
7 also receives the delay difference detection pattern output from the pattern generation unit 14. The B1 / B2 delay difference detector 17 can read the delay information of each channel and the delay correction completion information of the partner station from the control processor 15. B1 / B2
The delay correction buffer 18 is a buffer in which an appropriate delay correction value is set by the control processor 15 and a delay correction is given to each channel. The output delay-corrected by the B1 / B2 delay buffer is input to the multiplexing unit 19 and multiplexed on one received data to be one input of the selector 21. The other input of the selector 21 receives the idle pattern output from the idle pattern generator 20. Further, the selector 21 is instructed to input by the control processor 15, and its output becomes the received data to the terminal.
【００１２】次に図２のフローチャートを用いて本発明
の動作を説明する。本フローチャートは制御プロセッサ
１５の動作フローである。再発呼回数Ｎを初期化の為０
と設定する（ステップＳ１）。次にバルク通信の速度に
応じたチャネル数、例えば１２８Ｋｂｐｓであれば、２
つのチャネルの発呼、及び接続確認を行う（ステップＳ
２）。次にセレクタ１３に対しパタン発生部１４の出力
の遅延差検出パタンを選択指示を行う（ステップＳ
３）。次にパタン発生部１４に対し、遅延差検出パタン
の発生開始を指示する（ステップＳ４）。次にセレクタ
２１に対し、アイドルパタン発生器２０が発生するアイ
ドルパタンを選択出力する様指示する（ステップＳ
５）。次に遅延差検出部１７より各チャネルの遅延時間
Ｔ1 −Ｔn を読み出す（ステップＳ６）。次にＴi −Ｔ
min （ｉは各チャネル、Ｔmin は最小遅延時間）により
Ｂ１とＢ２の遅延差を計算する（ステップＳ７）。Next, the operation of the present invention will be described with reference to the flowchart of FIG. This flowchart is an operation flow of the control processor 15. 0 to reset the number of recalls N
Is set (step S1). Next, if the number of channels depends on the speed of bulk communication, for example, 128 Kbps, 2
Calling one channel and confirming connection (step S
2). Next, the selector 13 is instructed to select the delay difference detection pattern of the output of the pattern generation unit 14 (step S
3). Next, the pattern generation unit 14 is instructed to start generation of the delay difference detection pattern (step S4). Then, the selector 21 is instructed to selectively output the idle pattern generated by the idle pattern generator 20 (step S
5). Next, the delay time T 1 -T n of each channel is read from the delay difference detection unit 17 (step S6). Then T i −T
The delay difference between B1 and B2 is calculated by min (i is each channel, T min is the minimum delay time) (step S7).
【００１３】次にＴi −Ｔmin がＴ（Ｔは遅延差規定
値）以下であるか否か（Ｔi −Ｔmin≦Ｔ）を判定し、
全て、規定値以内であれば、ステップＳ９に，規定値を
越えるものがあれば、以下のステップ１５に従って処理
される（ステップＳ８）。次に遅延補正バッファ１８へ
遅延補正値Ｔmax −Ｔi （Ｔmax は全チャネルの最大遅
延値）を設定する（ステップＳ９）。次にセレクタ２１
に多重部１９の出力を選択指示する（ステップＳ１
０）。次にパタン発生部１４に遅延補正完了パタン送出
を指示する（ステップＳ１１）。次に遅延検出部１７よ
り相手先遅延補正完了情報を読み出す（ステップＳ１
２）。相手先の遅延補正が完了していれば、以下のステ
ップ１４に、していなければステップ１２に従って処理
される（ステップＳ１３）。[0013] Next T i -T min is T (T is the delay difference specified value) or not is less than (T i -T min ≦ T) ,
If all are within the specified value, step S9 is performed. If all exceed the specified value, processing is performed according to the following step 15 (step S8). Next, the delay correction value Tmax - Ti ( Tmax is the maximum delay value of all channels) is set in the delay correction buffer 18 (step S9). Next selector 21
To instruct to select the output of the multiplexing unit 19 (step S1).
0). Then, the pattern generation unit 14 is instructed to send the delay correction completion pattern (step S11). Next, the other party delay correction completion information is read from the delay detection unit 17 (step S1).
2). If the delay correction of the other party has been completed, the process proceeds to step 14 below, and if not, the process proceeds to step 12 (step S13).
【００１４】上記ステップＳ１３にて相手先の遅延補正
が完了していればセレクタ１３に対して分離部１６の出
力を選択指示する（ステップＳ１４）。上記ステップＳ
８にて、Ｔi −Ｔmin がＴ以下であるか否か（Ｔi −Ｔ
min ≦Ｔ）を判定し、規定値を越えるものがあれば再発
呼回数を１つカウントアップする（ステップＳ１５）。
次に、再発呼回数Ｎと最大再発呼回数Ｍとを比較して、
ＮがＭ以下（Ｎ≦Ｍ）ならば以下のステップＳ１７に、
ＮがＭより大きい（Ｎ＞Ｍ）場合は上記ステップＳ９に
従って処理される（ステップＳ１６）。ここで、上記ス
テップＳ１６にてＮがＭ以下の場合、Ｔi −Ｔmin ＞Ｔ
となったチャネルに対して切断、再発呼、接続確認を行
い、上記ステップＳ６へ戻る。If the delay correction of the other party is completed in step S13, the selector 13 is instructed to select the output of the separation section 16 (step S14). Step S above
At 8, whether or not T i −T min is less than or equal to T (T i −T
min ≤ T) is judged, and if there is a value exceeding the specified value, the number of re-calling is incremented by 1 (step S15).
Next, by comparing the number N of recalls and the maximum number M of recalls,
If N is equal to or less than M (N ≦ M), the process proceeds to step S17 below.
If N is larger than M (N> M), the process is performed according to the above step S9 (step S16). Here, when N is equal to or less than M in step S16, T i −T min > T
Disconnection, re-calling, and connection confirmation are performed for the channel that has become, and the process returns to step S6.
【００１５】次に図１のパタン発生部１４が発生する遅
延差検出パタンの実施例を図３を用いて説明する。図３
は、パタン発生部１４が発生する遅延差検出パタンの実
施例である。本パタンはパタン発生部１４にて生成され
同一フレームにて各チャネルに送信される。２５０μｓ
ｅｃ１フレームで、１ビット目と９ビット目が同期パタ
ンであり１と０の交互パタンである。２ビット目のＣは
遅延差補正完了ビットであり、補正中の場合は、０を補
正完了後は１を立てる。３〜８、１０〜１６ビットはそ
れぞれ上位カウント値、下位カウント値であり、０から
２13までカウントし、、また０へ戻りカウントアップす
る。本例の場合２５０μｓｅｃ×２13まで遅延検出可能
である。Next, an embodiment of the delay difference detection pattern generated by the pattern generation section 14 of FIG. 1 will be described with reference to FIG. FIG.
Is an example of a delay difference detection pattern generated by the pattern generation unit 14. This pattern is generated by the pattern generation unit 14 and transmitted to each channel in the same frame. 250 μs
In the ec1 frame, the 1st bit and the 9th bit are a synchronization pattern and an alternating pattern of 1 and 0. The second bit C is a delay difference correction completion bit, which is set to 0 during correction and set to 1 after completion of correction. Bits 3 to 8 and 10 to 16 are a high-order count value and a low-order count value, respectively, counting from 0 to 2 13 , and returning to 0 and counting up. In the case of this example, the delay can be detected up to 250 μsec × 2 13 .
【００１６】[0016]
【発明の効果】第１の効果は、回線遅延の少いバルク通
信を提供することにある。これにより、フレーム化／セ
ル化された音声通信にできる限り遅延による話者の異和
感を無くす効果がある。The first effect is to provide bulk communication with less line delay. This has the effect of eliminating the discomfort of the speaker due to the delay in framed / cellized voice communication as much as possible.
【００１７】その理由は、複数のチャネル内で最小遅延
のチャネルから遅延規定値内に他の全チャネルの遅延を
押えるからである。The reason is that the delay of all the other channels is suppressed within the delay specified value from the channel having the minimum delay in the plurality of channels.
【図１】本発明の一実施の形態の構成図である。FIG. 1 is a configuration diagram of an embodiment of the present invention.
【図２】本発明の一実施の形態の動作を示すフローチャ
ートである。FIG. 2 is a flowchart showing the operation of the embodiment of the present invention.
【図３】本発明の遅延差検出を行う為のパタンの一例を
示した図である。FIG. 3 is a diagram showing an example of a pattern for performing delay difference detection according to the present invention.
【図４】従来技術の構成図である。FIG. 4 is a configuration diagram of a conventional technique.
１１ ＩＳＤＮ網 １２ ＩＳＤＮインタフェース １３ セレクタ １４ パタン発生部 １５ 制御プロセッサ １６ 分離部 １７ 遅延差検出部 １８ 遅延補正バッファ １９ 多重部 ２０ アイドルパタン発生器 ２１ セレクタ ３１ 分離回路 ３２ 多重回路 ３３，３４ パタン符号器 ３５ 可変遅延回路 ３６，３７ パタン復号器 ３８ 制御プロセッサ ３９ ＬＡＰ−Ｄ処理部 ４０，４１，４２，４３ セレクタ ４４ 回線インタフェース 11 ISDN Network 12 ISDN Interface 13 Selector 14 Pattern Generation Unit 15 Control Processor 16 Separation Unit 17 Delay Difference Detection Unit 18 Delay Correction Buffer 19 Multiplexing Unit 20 Idle Pattern Generator 21 Selector 31 Separation Circuit 32 Multiplexing Circuit 33, 34 Pattern Encoder 35 Variable delay circuit 36, 37 Pattern decoder 38 Control processor 39 LAP-D processing unit 40, 41, 42, 43 Selector 44 Line interface
Claims (3)
データを分離して送受信するバルク通信方式において、
複数のチャネル間のデータの遅延差を判定する手段と、
該遅延差と、予め定められた遅延差規定値とを比較し、
該遅延差規定値を越える遅延差を持つチャネルに対し
て、回線の切断、再発呼を遅延差規定値に収まるまで、
又は規定回数まで繰り返す手段を有し、バルク通信時の
回線遅延時間を小さくすることを特徴とするバルク通信
方式。1. A bulk communication system for separating and transmitting data using a plurality of channels of an ISDN network,
Means for determining a data delay difference between a plurality of channels,
Comparing the delay difference and a predetermined delay difference specified value,
For a channel with a delay difference exceeding the specified delay difference value, disconnection of the line and re-calling until it falls within the specified delay difference value,
Alternatively, the bulk communication method is characterized in that it has means for repeating up to a prescribed number of times and reduces the line delay time during bulk communication.
ェースにより複数のＢチャネルを発呼、接続して使用
し、高速通信を行うバルク通信方式において、所定のチ
ャネルが接続した後、制御プロセッサにより、第１のセ
レクタにパタン発生器の出力の選択が行われ、該パタン
発生器のパタン発生を開始させ、第２のセレクタに対し
てアイドルパタン発生器の出力の選択が行われ、Ｂ１チ
ャネル遅延差検出部及びＢ２チャネル遅延差検出部では
相手局のパタン発生器で生成されたパタンを受信し、自
局のパタン発生器で発生したパタンとの差分比較を行
い、前記制御プロセッサにて前記Ｂ１チャネル遅延差検
出部及び前記Ｂ２チャネル遅延差検出部よりＢ１チャネ
ルとＢ２チャネルの遅延差を読み出し、Ｂ１チャネルと
Ｂ２チャネルの遅延差が規定の遅延差以内であれば、該
遅延差をＢ１チャネル遅延補正バッファ及びＢ２チャネ
ル遅延補正バッファに設定し、前記第２のセレクタに対
して多重部の出力の選択が行われ、前記制御プロセッサ
により前記パタン発生器に対して自局にて遅延補正が完
了したことを示すパタンを発生させ、前記Ｂ１チャネル
遅延差検出部及び前記Ｂ２チャネル遅延差検出部にて、
相手局の遅延補正が完了したことを示すパタンを検出し
た場合、前記制御プロセッサに対して通知し、該制御プ
ロセッサは前記第１のセレクタを分離部の出力を選択す
るように指示してバルク通信を可能とすることを特徴と
するバルク通信方式。2. In a bulk communication system in which a plurality of B channels are called and connected to an ISDN network by an ISDN interface and used for high-speed communication, after a predetermined channel is connected, a first processor is used by a control processor. The selector selects the output of the pattern generator, starts the pattern generation of the pattern generator, selects the output of the idle pattern generator for the second selector, and selects the B1 channel delay difference detection unit. The B2 channel delay difference detection unit receives the pattern generated by the pattern generator of the partner station and compares the difference with the pattern generated by the pattern generator of the own station, and the control processor causes the B1 channel delay difference. The delay difference between the B1 channel and the B2 channel is read from the detecting unit and the B2 channel delay difference detecting unit, and the delay difference between the B1 channel and the B2 channel is detected. If it is within the specified delay difference, the delay difference is set in the B1 channel delay correction buffer and the B2 channel delay correction buffer, the output of the multiplexer is selected by the second selector, and the control processor A pattern indicating that delay correction has been completed in the local station is generated for the pattern generator, and the B1 channel delay difference detection unit and the B2 channel delay difference detection unit
When a pattern indicating that the delay correction of the partner station is completed is detected, the control processor is notified, and the control processor instructs the first selector to select the output of the separation unit and performs bulk communication. A bulk communication method that enables the following.
規定の遅延差を越える場合には、遅延の大きいＢチャネ
ルの切断、再発呼を、遅延差規定値に収まるまで、又は
規定回数まで繰り返すことを特徴とする請求項２記載の
バルク通信方式。3. When the delay difference between the B1 channel and the B2 channel exceeds a prescribed delay difference, disconnection and re-calling of the B channel having a large delay are repeated until the delay difference falls within a prescribed delay difference value or a prescribed number of times. The bulk communication method according to claim 2, wherein
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8152431A JP2930096B2 (en) | 1996-06-13 | 1996-06-13 | Bulk communication method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8152431A JP2930096B2 (en) | 1996-06-13 | 1996-06-13 | Bulk communication method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH09331323A true JPH09331323A (en) | 1997-12-22 |
| JP2930096B2 JP2930096B2 (en) | 1999-08-03 |
Family
ID=15540387
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8152431A Expired - Fee Related JP2930096B2 (en) | 1996-06-13 | 1996-06-13 | Bulk communication method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2930096B2 (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6604237B1 (en) | 1999-12-14 | 2003-08-05 | International Business Machines Corporation | Apparatus for journaling during software deployment and method therefor |
| US6615274B1 (en) | 1999-12-09 | 2003-09-02 | International Business Machines Corporation | Computer network control systems and methods |
| US6704782B1 (en) | 1999-12-09 | 2004-03-09 | International Business Machines Corporation | System and methods for real time progress monitoring in a computer network |
| US6772158B1 (en) | 1999-12-14 | 2004-08-03 | International Business Machines Corporation | Apparatus for data depoting and method therefor |
| US6912586B1 (en) * | 1999-11-12 | 2005-06-28 | International Business Machines Corporation | Apparatus for journaling during software deployment and method therefor |
| US7191208B1 (en) | 1999-12-14 | 2007-03-13 | International Business Machines Corporation | Methods of selectively distributing data in a computer network and systems using the same |
| CN100342694C (en) * | 1999-04-01 | 2007-10-10 | 艾利森电话股份有限公司 | Base station subsystem and method for handling an increase in traffic volume that overloads a terrestrial link in an internet protocol network |
-
1996
- 1996-06-13 JP JP8152431A patent/JP2930096B2/en not_active Expired - Fee Related
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100342694C (en) * | 1999-04-01 | 2007-10-10 | 艾利森电话股份有限公司 | Base station subsystem and method for handling an increase in traffic volume that overloads a terrestrial link in an internet protocol network |
| US6912586B1 (en) * | 1999-11-12 | 2005-06-28 | International Business Machines Corporation | Apparatus for journaling during software deployment and method therefor |
| US6615274B1 (en) | 1999-12-09 | 2003-09-02 | International Business Machines Corporation | Computer network control systems and methods |
| US6704782B1 (en) | 1999-12-09 | 2004-03-09 | International Business Machines Corporation | System and methods for real time progress monitoring in a computer network |
| US6604237B1 (en) | 1999-12-14 | 2003-08-05 | International Business Machines Corporation | Apparatus for journaling during software deployment and method therefor |
| US6772158B1 (en) | 1999-12-14 | 2004-08-03 | International Business Machines Corporation | Apparatus for data depoting and method therefor |
| US7191208B1 (en) | 1999-12-14 | 2007-03-13 | International Business Machines Corporation | Methods of selectively distributing data in a computer network and systems using the same |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2930096B2 (en) | 1999-08-03 |
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