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JPH07263273A - Formation method of terminal electrode - Google Patents

Formation method of terminal electrode

Info

Publication number
JPH07263273A
JPH07263273A JP6053561A JP5356194A JPH07263273A JP H07263273 A JPH07263273 A JP H07263273A JP 6053561 A JP6053561 A JP 6053561A JP 5356194 A JP5356194 A JP 5356194A JP H07263273 A JPH07263273 A JP H07263273A
Authority
JP
Japan
Prior art keywords
plate
electronic component
holding
holding plate
terminal electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP6053561A
Other languages
Japanese (ja)
Inventor
Yasuhiro Shiyatou
康弘 社藤
Hisashi Yamaguchi
尚志 山口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Materials Corp
Original Assignee
Mitsubishi Materials Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Materials Corp filed Critical Mitsubishi Materials Corp
Priority to JP6053561A priority Critical patent/JPH07263273A/en
Publication of JPH07263273A publication Critical patent/JPH07263273A/en
Withdrawn legal-status Critical Current

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  • Apparatuses And Processes For Manufacturing Resistors (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)

Abstract

PURPOSE:To obtain a terminal electrode whose dimensional accuracy is good by a method wherein a thin-film formation treatment is conducted in a state that an electronic component is flush with a holding plate or protrudes a little and a thin-film electrode is formed only on the edge of the electronic component or on the edge and on a part which is extremely close to it. CONSTITUTION:A plate 7 is overlapped with a holding plate 6 having many square holding holes 5. Electronic components are inserted into the individual holding holes 5. The first edge 8a of every electronic component 8 is made to protrude from the plate face of the holding plate 6. Vertical wall parts 7a are formed at peripheral edge parts of the plate 7. This assembly is put into a vacuum apparatus, and a thin- film formation treatment conducted. A thin film is applied both to the first edge 8a of every electronic component 8 and to the plate face on the upper side of the holding plate 6. Thereby, terminal electrodes whose dimensional accuracy is good can be formed. In addition, when the terminal electrodes are formed on opposite-side edges after the terminal electrodes have been formed on edges on one side, the terminal electrodes can be formed also on the opposite-side edges only by turning over the holding plate itself without reinserting the chip-shaped electronic components into the holding holes. As a result, a process is extremely simple.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は端子電極の形成方法に係
り、特に積層セラミックコンデンサ、チップ形セラミッ
クサーミスタ等のチップ形電子部品の端子電極の形成に
好適な方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of forming a terminal electrode, and more particularly to a method suitable for forming a terminal electrode of a chip type electronic component such as a laminated ceramic capacitor or a chip type ceramic thermistor.

【0002】[0002]

【従来の技術】従来、チップ形電子部品の端子電極を形
成するには、電極ペーストに素子の端子電極形成面を浸
し、乾燥焼成することにより端子電極を形成するように
している。第4図はこの従来法により端子電極が形成さ
れた積層セラミックコンデンサの断面図であり、内部電
極1を有するコンデンサ本体2の両端面に端子電極(外
部電極)3が形成されている。
2. Description of the Related Art Conventionally, in order to form a terminal electrode of a chip-type electronic component, the terminal electrode forming surface of the element is dipped in an electrode paste and dried and baked to form the terminal electrode. FIG. 4 is a cross-sectional view of a monolithic ceramic capacitor in which terminal electrodes are formed by this conventional method, and terminal electrodes (external electrodes) 3 are formed on both end surfaces of a capacitor body 2 having internal electrodes 1.

【0003】[0003]

【発明が解決しようとする課題】従来技術では、ペース
ト塗付厚みのバラツキ、ペースト塗付後のたれ等によ
り、端子電極の寸法精度が低いものとなっていた。即
ち、第4図の電極はみ出し長さLが大きなものとなって
いた。なお、この電極はみ出し長さLを本明細書では以
下、「電極長さ」という。
In the prior art, the dimensional accuracy of the terminal electrode is low due to variations in the thickness of paste coating, sagging after paste coating, and the like. That is, the protruding length L of the electrode in FIG. 4 was large. It should be noted that this protruding length L of the electrode is hereinafter referred to as "electrode length".

【0004】[0004]

【課題を解決するための手段】請求項1の端子電極の形
成方法は、電子部品の平行な一対の第1及び第2の端面
に対し気相法により薄膜状の端子電極を形成する方法で
あって、該電子部品が該端面と垂直方向に嵌入される保
持孔が、複数個、板厚方向に貫設され、且つ板厚が該電
子部品の該嵌入方向の長さと等しいか又は若干それより
も小となっている保持板と、該保持板に重ね合わされる
プレートとを用い、まず、該保持板の保持孔に電子部品
を嵌入させ、この際、該保持板の一方の板面に前記プレ
ートを重ね合わせ、各電子部品の第2の端面を該プレー
トに当接させ、これによって各電子部品の第1の端面を
該保持板の他方の板面と面一か又はそれよりも突出さ
せ、この状態で該他方の板面側に対し気相法による薄膜
形成処理を施して各電子部品の第1の端面に端子電極を
形成し、次に、プレートを該保持板の前記他方の板面に
重ね合わせると共に、各電子部品の第1の端面を該プレ
ートに当接させ、これによって各電子部品の第2の端面
を該保持板の前記一方の板面と面一か又はそれよりも突
出させ、この状態で該一方の板面側に対し気相法による
薄膜形成処理を施して各電子部品の第2の端面に端子電
極を形成するようにしたことを特徴とするものである。
A method of forming a terminal electrode according to claim 1 is a method of forming a thin film terminal electrode on a pair of first and second parallel end faces of an electronic component by a vapor phase method. A plurality of holding holes through which the electronic component is fitted in a direction perpendicular to the end face are provided so as to penetrate in the plate thickness direction, and the plate thickness is equal to or slightly longer than the length of the electronic component in the fitting direction. Using a holding plate that is smaller than the holding plate and a plate that is superposed on the holding plate. First, an electronic component is fitted into the holding hole of the holding plate, and at this time, one plate surface of the holding plate is attached. The plates are superposed on each other, and the second end faces of the respective electronic components are brought into contact with the plates, whereby the first end faces of the respective electronic components are flush with the other plate face of the holding plate or project therefrom. Then, in this state, the other plate surface side is subjected to a thin film forming treatment by a vapor phase method. A terminal electrode is formed on the first end face of the child component, and then the plate is superposed on the other plate face of the holding plate, and the first end face of each electronic component is brought into contact with the plate. The second end surface of each electronic component is made flush with the one plate surface of the holding plate or protrudes more than that, and in this state, the one plate surface side is subjected to a thin film forming treatment by a vapor phase method. Thus, the terminal electrode is formed on the second end face of each electronic component.

【0005】請求項2の端子電極の形成方法は、電子部
品が積層セラミックコンデンサ又はチップ形セラミック
サーミスタ素子であることを特徴とするものである。
The method of forming a terminal electrode according to claim 2 is characterized in that the electronic component is a monolithic ceramic capacitor or a chip-type ceramic thermistor element.

【0006】本発明において、この保持板の厚さを電子
部品の嵌入方向の長さよりも小とする場合には、両者の
差は、電子部品の嵌入方向の長さの45%以内とりわけ
23%以内とするのが好ましい。
In the present invention, when the thickness of the holding plate is made smaller than the length of the electronic component in the fitting direction, the difference between the two is within 45% of the length of the electronic component in the fitting direction, especially 23%. It is preferably within the range.

【0007】保持板及びプレートの材質はステンレス、
銅などが好適である。
The material of the holding plate and the plate is stainless steel,
Copper or the like is preferable.

【0008】[0008]

【作用】電子部品を保持板と面一または若干突出した状
態で薄膜形成処理を行うことにより、電子部品の端面の
み又は該端面とその極く近傍のみに薄膜電極を形成でき
る。
By performing the thin film forming process with the electronic component flush with the holding plate or slightly protruding, the thin film electrode can be formed only on the end face of the electronic component or only on the end face and its immediate vicinity.

【0009】[0009]

【実施例】以下、図面を参照して実施例について説明す
る。第1図に示すように、多数の方形の保持孔5を有す
る保持板6に対しプレート7を重ね合わせる。各保持孔
5に電子部品を挿入する。
EXAMPLES Examples will be described below with reference to the drawings. As shown in FIG. 1, a plate 7 is superposed on a holding plate 6 having a large number of rectangular holding holes 5. An electronic component is inserted into each holding hole 5.

【0010】第2図は、この電子部品8を保持孔5に挿
入した状態における第1図のII−II線断面図であり、本
実施例では電子部品8の第1の端面8aが保持板6の板
面から若干突出している。なお、プレート7の周縁部に
は立壁部7aが設けられている。
FIG. 2 is a sectional view taken along line II-II of FIG. 1 in a state where the electronic component 8 is inserted into the holding hole 5, and in the present embodiment, the first end face 8a of the electronic component 8 is a holding plate. 6 is slightly projected from the plate surface. A standing wall portion 7a is provided on the peripheral portion of the plate 7.

【0011】この第2図に示す状態のものを真空装置に
入れ、薄膜形成処理を施す。なお、薄膜は、電子部品8
の第1の端面8aと保持板6の上側の板面の双方に付着
する。
The state shown in FIG. 2 is put in a vacuum apparatus and a thin film forming process is performed. In addition, the thin film is an electronic component 8
Adheres to both the first end surface 8a of the above and the upper plate surface of the holding plate 6.

【0012】次いで、電子部品8を保持した保持板6と
プレート7とを真空装置外に取り出し、別のプレート7
を保持板6の上に被せた後、保持板6を上下逆にする。
そして、上側にきたプレート7を取り外す。この状態
で、電子部品8を保持した保持板6とプレート7とを真
空装置に入れ、薄膜形成処理を施す。この状態において
は、第2図とは上下逆に、第2の端面8bが保持板6の
上面から若干突出している。
Next, the holding plate 6 holding the electronic component 8 and the plate 7 are taken out of the vacuum apparatus, and another plate 7 is taken out.
After it is put on the holding plate 6, the holding plate 6 is turned upside down.
Then, the plate 7 coming to the upper side is removed. In this state, the holding plate 6 holding the electronic component 8 and the plate 7 are placed in a vacuum device, and a thin film forming process is performed. In this state, the second end surface 8b slightly projects from the upper surface of the holding plate 6, upside down from FIG.

【0013】第2の端面8bへの薄膜端子電極形成が終
了した後、保持板6及びプレート7を真空装置外に取り
出し、保持板6から電子部品8を取り出す。
After the formation of the thin film terminal electrodes on the second end face 8b is completed, the holding plate 6 and the plate 7 are taken out of the vacuum apparatus, and the electronic component 8 is taken out from the holding plate 6.

【0014】このように、一旦電子部品8を保持孔5に
嵌入させると、電子部品8を保持孔5から出し入れする
ことなくその両端面に端子電極を形成することができ
る。
In this way, once the electronic component 8 is fitted into the holding hole 5, the terminal electrodes can be formed on both end surfaces of the electronic component 8 without removing it from the holding hole 5.

【0015】次に上記方法により積層セラミックコンデ
ンサに端子電極を形成する具体的な実施例について説明
する。
Next, a concrete example of forming the terminal electrode on the monolithic ceramic capacitor by the above method will be described.

【0016】端子電極形成前の積層セラミックコンデン
サチップの寸法は幅3.15mm、厚さ1.13mm、
長さ4.40mmである。保持板6の保持孔5の寸法
は、幅3.23mm、高さ1.15mm、長さ3.90
mmである。
The dimensions of the monolithic ceramic capacitor chip before forming the terminal electrodes are 3.15 mm in width and 1.13 mm in thickness.
The length is 4.40 mm. The dimensions of the holding holes 5 of the holding plate 6 are 3.23 mm in width, 1.15 mm in height, and 3.90 in length.
mm.

【0017】先ず、この保持孔5に積層セラミックコン
デンサを収納し、その後、プレート7にのせ、真空装置
に入れる。保持板6の厚さは3.90mmであり、積層
セラミックコンデンサよりも長さ寸法を0.5mm短く
してある。その後、0.2[Pa]の真空度で、投入電
力をDC1.0[kW]一定として、付着層にVまたは
Cr、バリア層にNiまたはCu、表面層にSnまたは
Sn/Pb等を用いて端子電極を形成した。次に、別の
プレート7を端子電極を形成した面にあて、保持板6を
裏返しにし、上記と同様にして他方の端面にも端子電極
を形成した。この様にして出来たチップは、図3に示す
ように寸法精度の良好なチップ形電子部品になる。4は
薄膜端子電極を示す。
First, the monolithic ceramic capacitor is housed in the holding hole 5, then placed on the plate 7 and placed in a vacuum device. The holding plate 6 has a thickness of 3.90 mm, and the length dimension thereof is 0.5 mm shorter than that of the monolithic ceramic capacitor. After that, with a vacuum degree of 0.2 [Pa] and a constant input power of DC 1.0 [kW], V or Cr is used for the adhesion layer, Ni or Cu is used for the barrier layer, and Sn or Sn / Pb is used for the surface layer. To form a terminal electrode. Next, another plate 7 was placed on the surface on which the terminal electrodes were formed, the holding plate 6 was turned upside down, and terminal electrodes were formed on the other end surface in the same manner as above. The chip thus produced becomes a chip-type electronic component having good dimensional accuracy as shown in FIG. Reference numeral 4 represents a thin film terminal electrode.

【0018】表1に[Sn/Cu/V]、[Sn/Ni
/V]構造の薄膜端子電極品の寸法精度を従来電極品と
比較して示す。表1のチップ長さは、第3、4図のCで
あり、電極長さは第3、4図のLである。表1を見ても
本作製法により寸法精度が向上したことが分かる。
In Table 1, [Sn / Cu / V], [Sn / Ni]
The dimensional accuracy of the / V] structure thin film terminal electrode product is shown in comparison with the conventional electrode product. The chip length in Table 1 is C in FIGS. 3 and 4, and the electrode length is L in FIGS. It can be seen from Table 1 that the dimensional accuracy is improved by this manufacturing method.

【0019】[0019]

【表1】 [Table 1]

【0020】[0020]

【発明の効果】以上の通り、本発明によると、寸法精度
の良い端子電極を形成することが出来る。また、一方の
端面に端子電極を形成した後、対向側端面に端子電極を
形成する際、チップ形電子部品を保持孔に入れ直すこと
なく、保持板自体を裏返すだけで対向側端面にも端子電
極を形成することが出来るため、工程が至極簡単であ
る。
As described above, according to the present invention, it is possible to form a terminal electrode having high dimensional accuracy. Also, after forming the terminal electrode on one end face, when forming the terminal electrode on the opposite end face, it is only necessary to turn over the holding plate itself without reinserting the chip type electronic component into the holding hole, and the terminal electrode on the opposite end face as well. Can be formed, so the process is extremely simple.

【0021】本発明方法は、積層セラミックコンデンサ
やチップ形セラミックサーミスタの端子電極形成法に極
めて好適である。
The method of the present invention is very suitable for forming a terminal electrode of a monolithic ceramic capacitor or a chip-type ceramic thermistor.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明方法に用いられる保持板及びプレートの
斜視図である。
FIG. 1 is a perspective view of a holding plate and a plate used in the method of the present invention.

【図2】保持孔に電子部品を挿入した状態における図1
のII−II線に沿う断面図である。
FIG. 2 is a view showing a state in which an electronic component is inserted into a holding hole.
2 is a sectional view taken along line II-II of FIG.

【図3】本発明方法による端子電極形成後の積層セラミ
ックコンデンサチップの断面図である。
FIG. 3 is a cross-sectional view of a monolithic ceramic capacitor chip after forming a terminal electrode by the method of the present invention.

【図4】従来方法による端子電極形成後の積層セラミッ
クコンデンサチップの断面図である。
FIG. 4 is a cross-sectional view of a monolithic ceramic capacitor chip after forming a terminal electrode by a conventional method.

【符号の説明】[Explanation of symbols]

1 内部電極 2 コンデンサ本体 3,4 端子電極 5 保持孔 6 保持板 7 プレート 1 Internal electrode 2 Capacitor body 3, 4 Terminal electrode 5 Holding hole 6 Holding plate 7 Plate

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 電子部品の平行な一対の第1及び第2の
端面に対し気相法により薄膜状の端子電極を形成する方
法であって、 該電子部品が該端面と垂直方向に嵌入される保持孔が、
複数個、板厚方向に貫設され、且つ板厚が該電子部品の
該嵌入方向の長さと等しいか又は若干それよりも小とな
っている保持板と、 該保持板に重ね合わされるプレートとを用い、 まず、該保持板の保持孔に電子部品を嵌入させ、この
際、該保持板の一方の板面に前記プレートを重ね合わ
せ、各電子部品の第2の端面を該プレートに当接させ、
これによって各電子部品の第1の端面を該保持板の他方
の板面と面一か又はそれよりも突出させ、この状態で該
他方の板面側に対し気相法による薄膜形成処理を施して
各電子部品の第1の端面に端子電極を形成し、 次に、プレートを該保持板の前記他方の板面に重ね合わ
せると共に、各電子部品の第1の端面を該プレートに当
接させ、これによって各電子部品の第2の端面を該保持
板の前記一方の板面と面一か又はそれよりも突出させ、 この状態で該一方の板面側に対し気相法による薄膜形成
処理を施して各電子部品の第2の端面に端子電極を形成
するようにしたことを特徴とする端子電極の形成方法。
1. A method for forming a thin film terminal electrode on a pair of first and second parallel end faces of an electronic component by a vapor phase method, wherein the electronic component is inserted in a direction perpendicular to the end face. Holding hole
A plurality of holding plates that penetrate in the plate thickness direction and have a plate thickness that is equal to or slightly smaller than the length of the electronic component in the fitting direction; and a plate that is superposed on the holding plate. First, the electronic component is fitted into the holding hole of the holding plate, at this time, the plate is superposed on one plate surface of the holding plate, and the second end face of each electronic component is brought into contact with the plate. Let
As a result, the first end surface of each electronic component is made flush with the other plate surface of the holding plate or protrudes therefrom, and in this state, the thin film forming process by the vapor phase method is applied to the other plate surface side. A terminal electrode is formed on the first end face of each electronic component, and then the plate is superposed on the other plate face of the holding plate, and the first end face of each electronic component is brought into contact with the plate. By this, the second end surface of each electronic component is made to be flush with the one plate surface of the holding plate or protruding more than that, and in this state, the thin film forming process is performed on the one plate surface side by the vapor phase method. A terminal electrode is formed on the second end face of each electronic component by applying the above method.
【請求項2】 電子部品が積層セラミックコンデンサ又
はチップ形セラミックサーミスタ素子である請求項1の
端子電極の形成方法。
2. The method of forming a terminal electrode according to claim 1, wherein the electronic component is a monolithic ceramic capacitor or a chip-type ceramic thermistor element.
JP6053561A 1994-03-24 1994-03-24 Formation method of terminal electrode Withdrawn JPH07263273A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6053561A JPH07263273A (en) 1994-03-24 1994-03-24 Formation method of terminal electrode

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6053561A JPH07263273A (en) 1994-03-24 1994-03-24 Formation method of terminal electrode

Publications (1)

Publication Number Publication Date
JPH07263273A true JPH07263273A (en) 1995-10-13

Family

ID=12946235

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6053561A Withdrawn JPH07263273A (en) 1994-03-24 1994-03-24 Formation method of terminal electrode

Country Status (1)

Country Link
JP (1) JPH07263273A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002056323A1 (en) * 2001-01-11 2002-07-18 Vishay Sprague, Inc. Method of forming termination of chip components
CN113539921A (en) * 2021-07-30 2021-10-22 深圳市宇阳科技发展有限公司 Chip end capping positioning device and positioning method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002056323A1 (en) * 2001-01-11 2002-07-18 Vishay Sprague, Inc. Method of forming termination of chip components
CN113539921A (en) * 2021-07-30 2021-10-22 深圳市宇阳科技发展有限公司 Chip end capping positioning device and positioning method

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