JPH06333744A - Laminated chip bead array - Google Patents

Abstract

PURPOSE:To realize a chip bead array having a large impedance and/or a large current resistance by extending both the end portions of a conductor pattern to two side surfaces essentially normal to laminating direction and forming external electrode terminals on the two side surfaces. CONSTITUTION:A green sheet 1 is produced by a slurry made by mixing an organic binder, a plasticizer and an organic solvent to Ni-Zn-Cu ferrite powder. And two green sheets 1 on which a conductive pattern A is formed are laminated inside a lamination mold, and six green sheets 1, on which no conductive pattern and through hole are formed, are laminated at the same time. Next, there stacked green sheets are laminated between the two green sheets and above and below the two green sheets at the same time. Next, these laminated green sheets are subjected to thermal compression bonding under pressure to produce a laminated body. Then, the laminated body is separated to chip forms, the binder is eliminated, baking is performed, external electrodes with silver as a principal component and a solder fixing metallization are formed and measuring terminals are connected to the external electrodes.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to the structure of a laminated chip bead array.

[0002]

2. Description of the Related Art Conventionally, a chip bead array having 4 to 8 circuits for EMI countermeasures is known. Since the chip bead array has a smaller mounting area per circuit than a chip inductor having only one circuit, it is used for high-density mounting. FIG. 5 shows an example of the appearance. In this example, one element contains six circuits. As shown in FIG. 6, the internal structure has a structure in which the internal electrodes penetrate through a pair of external electrodes and are connected to each other, and in order to suppress the interaction between each circuit, the internal electrodes are shielded from each other. Second internal electrode is provided.

[0003]

In the above-mentioned conventional device, since a plurality of circuits are built in one device, the interaction between the circuits and the restriction of the geometrical space cause the following problems.
The shape of one circuit is limited to the through type, and the impedance effective as an EMI countermeasure is 100Ω at the maximum (100M
Hz), and it was difficult to obtain a sufficient effect.
Further, the circuit, that is, the internal electrode is formed by screen printing of silver paste or the like, but the thickness of the electrode cross section is limited to about 20 μm at the maximum, and the width is 200 when considering the interaction with the adjacent circuit. The limit was ˜300 μm, and the withstand current value of the circuit was small. The present invention solves the above problems and provides a chip bead array having a relatively large impedance and / or a chip bead array having a large withstand current value.

[0004]

As a method for solving the above problems, the present invention provides a laminated chip bead array in which a magnetic printed layer or a magnetic green sheet and a printed conductor pattern are laminated and integrally fired, In the layer on which the conductor pattern is formed, both ends of the conductor pattern extend to two side faces substantially perpendicular to the stacking direction, and the two side faces have
The external electrode terminals are formed.

[0005]

According to the present invention, since one conductor pattern is formed in one layer, various conductor patterns can be formed, and an element having a higher impedance than the through type can be obtained. Further, since the conductor pattern can be widened and the conductor patterns can be connected in parallel to the external electrodes over a plurality of layers, a chip bead array having a large withstand current value of the circuit can be obtained.

[0006]

The present invention will be described in detail below with reference to examples. Ni-Zn-Cu ferrite powder containing Fe ₂ O ₃ , NiO, ZnO, and CuO as main components (permeability μ = 120)
PVB (polyvinyl butyral) as an organic binder, BPBG (butyl phthalyl butyl glycolate) as a plasticizer, and ethanol and butanol as an organic solvent were added and mixed to prepare a slurry. A 200-thickness of this slurry was formed on a polyester carrier film that had been siliconized by the doctor blade method.
It was formed in a sheet shape of μm. This was peeled from the film, cut into a sheet of about 50 mm square, and the green sheet 1 was attached to a stainless frame 5 having alignment guide holes 6 as shown in FIG. The frame 5 to which the green sheet 1 is attached is set on a printing stage provided with guide pins for alignment so that the guide holes 6 of the frame 5 are aligned, and the conductive pattern 2 is placed at a predetermined position. The conductive pattern 2 was printed with a silver paste so that the positions would match. FIG. 4A shows the positions of the conductive patterns 2 and the through holes 3 formed on the green sheet 1 used for the production. Further, (B) shows an example of a conductive pattern when the withstand current value is very large. Next, the printed green sheet 1 is cut into a predetermined size by a positioning method using a guide pin and a guide hole in the same manner as described above, and is cut into a laminated die as shown in FIG. Two green sheets 1 on which the conductive pattern (A) was formed were laminated, and six green sheets 1 on which no conductive pattern and through holes were formed were simultaneously laminated between them and above and below the whole. Next, the stacked green sheets were heated at a temperature of 120 ° C. and a pressure of 200 kg / c.
Thermocompression bonding was performed under the condition of m ² to produce a laminate. Next, the laminated body was cut into a chip shape with a dicing saw. FIG. 2 shows a part of the internal structure of the chip-shaped laminated body (corresponding to ab in FIG. 1). This was debindered in the air at 500 ° C., and subsequently baked at 900 ° C. for 1 hour. Further, an external electrode containing silver as a main component and a metallization for fixing a solder were applied and baked at 600 ° C. Ni plating and solder plating were applied on the external electrodes and the solder fixing metallization by electrolytic barrel plating. When a measurement terminal of an impedance analyzer was connected to four pairs of external electrodes 4 of the obtained device and the impedance at 100 MHz was measured, all four pairs were 120Ω. Further, the withstand current value was twice as high as that of the element of the prior art.

[0007]

As described above, according to the present invention, a chip bead array having a large impedance and a large withstand current value of a circuit can be obtained.

[Brief description of drawings]

FIG. 1 is a perspective view of a multilayer chip bead array manufactured according to the present invention.

FIG. 2 is a diagram showing a part of an internal structure of a laminated body cut into chips according to the present invention.

FIG. 3 is an explanatory diagram after printing a conductive pattern according to the present invention.

FIG. 4 is a diagram showing a conductive pattern of a laminated chip bead array according to the present invention.

FIG. 5 is a perspective view showing an example of a laminated chip bead array according to a conventional technique.

FIG. 6 is a diagram showing an example of an internal structure of a laminated chip bead array in a conventional technique.

[Explanation of symbols]

 1 Green Sheet 2 Conductive Pattern 3 External Electrode 4 Stainless Steel Frame 5 Positioning Guide Hole 6 Solder Fixation Metallization 7 Shielding Internal Electrode

Claims (2)

[Claims] 1. A laminated chip bead array in which a magnetic printed layer or a magnetic green sheet and a printed conductor pattern are laminated and integrally fired, and both ends of the conductor pattern are formed in a layer in which the conductor pattern is formed. A multilayer chip bead array, which is extended to two side faces substantially perpendicular to the stacking direction, and external electrode terminals are formed on the two side faces. 2. The magnetic material according to claim 1, wherein the magnetic material is Ni—Z.
A laminated chip bead array, which is an n-ferrite, a Ni-Zn-Cu ferrite, or a Cu-Zn ferrite.