JPH0620177B2 - Internal bias generation circuit for semiconductor device - Google Patents

Description

Description: TECHNICAL FIELD OF THE INVENTION The present invention relates to an internal bias generation circuit of a semiconductor device using a ring oscillator and a charge pump circuit.

[Technical Background of the Invention and Problems Thereof] A ring oscillator is conventionally used in an internal bias generation circuit of an integrated circuit, for example, a substrate bias generation circuit.
FIG. 1 shows a conventional substrate bias generating circuit. 1 is MO
Ring oscillator with S inverter connected in multiple stages, 2a
And 2b are clock generators, and 3a and 3b are charge pump circuits.

In FIG. 1, when the drain power supply voltage V _DD and the source power supply voltage V _SS are turned on, the ring oscillator 1 operates. When two types of ring oscillator outputs φ _A and φ _B whose phases are different from each other by 180 ° are input to the clock generators 2a and 2b, respectively, the clock generators 2a and 2b are input.
The output waveforms of the output nodes Na and Nb of
It is output differently by 0 °. Therefore, the capacitors Ca and Cb of 3 3 and 3b of the charge pump circuit alternately repeat charging and discharging, and work to keep the output voltage V _BB of the substrate bias generating circuit constant.

However, the voltage of the integrated circuit board fluctuates greatly when the integrated circuit operates. One of the causes is capacitive coupling between the substrate and the impurity diffusion layer used for wiring. For example, in the case of a MOS-DRAM, the voltage of the N ⁺ impurity diffusion layer used for wiring abruptly changes from a high level to a low level during a sense amplifier operation in an active cycle.
Therefore, the voltage of the P-type substrate also becomes low due to the capacitive coupling of the PN junction. In the conventional substrate bias generating circuit as shown in FIG. 1, even if the voltage of the substrate fluctuates, the oscillation frequency of the ring oscillator does not change much following the fluctuation of the voltage of the substrate, so that the voltage of the substrate returns to the reference voltage. It took me a while to do it. For this reason, the threshold voltage of the MOSFET in the peripheral circuit fluctuates, the operating speed of the circuit also fluctuates, and problems such as malfunctions and loss of reliability occur.

Further, in the conventional substrate bias generating circuit, when the power is turned on, a phenomenon called power-on current rapidly flows because the threshold voltage of the driver transistor of the ring oscillator is low. Therefore, there is a problem that the ring oscillator does not oscillate.

[Object of the Invention] The present invention has been made in view of the above problems, and an object thereof is to provide a highly reliable internal bias generation circuit for a semiconductor device.

SUMMARY OF THE INVENTION The present invention controls the oscillation frequency of the ring oscillator by controlling the input voltage of the gate of the load MOSFET of the ring oscillator, and in an internal bias generation circuit using this ring oscillator, for example The bias output voltage is obtained, that is,
To achieve the above object, an internal bias generation circuit of a semiconductor device according to the present invention includes a ring oscillator including a plurality of stages of MOS inverters, and a charge pump circuit driven by the output of the ring oscillator. In the internal bias generation circuit of the load MOS of the MOS inverter that constitutes the ring oscillator
Of the FETs, an ON or OFF potential is selectively applied to the gate of a predetermined load MOSFET in accordance with the state of an operating circuit serving as a load of the internal bias generation circuit, and a fixed potential is applied to the gates of the remaining load MOSFETs. Is provided with a gate control means.

[Effects of the Invention] When the internal bias generating circuit of the present invention is used and the output voltage of the internal bias generating circuit controls the gate of the load MOSFET of the ring oscillator, when the output voltage of the internal bias generating circuit fluctuates from the reference voltage, the ring The oscillation frequency of the oscillator changed, which changed the operation speed of the internal bias generation circuit, and it became possible to immediately return the output voltage to the reference voltage. Further, the reference voltage of the output voltage of the internal bias generation circuit can be easily controlled by changing the input voltage of the gate of the load MOSFET forming the inverter of the ring oscillator and changing the oscillation frequency of the ring oscillator. It was As a result, it has become possible to realize a highly reliable internal bias generation circuit with low current consumption. Further, in the substrate bias generating circuit, the power-on current is reduced when the power is turned on, and the substrate bias generating circuit comes to operate reliably.

[Embodiment of the Invention] Prior to description of an embodiment of the present invention, a method of controlling an oscillation frequency of a ring oscillator according to the present invention will be described below with reference to the drawings.

FIG. 2 is a circuit diagram showing an example of such a ring oscillator, and FIG. 3 is a timing waveform of its name node.

Figure 2 shows the load MOSFET of each MOS inverter.
One of the gates is connected to the common node A, and the other gate is connected to the drain power supply voltage V _DD and is always in a conductive state. That is, the control voltage of the node A is low and the load MOSFETs-Q ₂₂₁ , Q ₂₂₂ , and Q
_{Even if 223} , Q ₂₂₄ , and Q ₂₂₅ are in the non-conduction state,
As shown in FIG. 3, the ring oscillator operates at a low frequency. However, if the voltage at node A increases, the load MO
SFET-Q ₂₂₁ , Q ₂₂₂ , Q ₂₂₃ , Q ₂₂₄ ,
_Q225 becomes conductive, and driver MOSFET-Q
The gates of ₂₁₁ , Q ₂₁₂ , Q ₂₁₃ , Q ₂₁₄ , and Q ₂₁₅ are charged and discharged quickly, and the ring oscillator operates at a high frequency.

Thus, by controlling the voltage of the node A, the load conductance can be controlled and the oscillation frequency of the ring oscillator can be easily changed.

FIG. 4 shows a load MOSFET in addition to the configuration of FIG.
This is an example in which -Q ₂₄₁ , Q ₂₄₂ , ..., Q ₂₄₅ are provided, and the oscillation frequency of the ring oscillator is controlled by both control voltages of the voltage of the node A and the voltage of the node B.

As described above, the oscillation frequency can be appropriately changed by controlling the gate of the load MOSFET of the ring oscillator.

2 and 4, the load MOSFETs-Q ₂₃₁ , Q ₂₃₂ , ..., Q ₂₃₅ whose gates are connected to V _DD are D
Either type or E type may be used, or it may not be provided. Further, it is also effective when the inverter is made of CMOS.

An embodiment of the internal bias generating circuit of the present invention using the above ring oscillator will be described with reference to FIG.

The internal bias generation circuit of FIG.
1, a voltage generating circuit 52 including a charge pump circuit controlled by its output, and a level detecting circuit 53 for detecting its output level. And a load MOSFET forming a MOS inverter of the ring oscillator 51
-Q _{521, Q} 522, ..., so that the gate A of _{Q 525} is controlled by the output of the level detecting circuit 53.

As described above, the voltage of the integrated circuit substrate largely changes during the operation of the integrated circuit due to the operating circuit that becomes the load of the internal bias generation circuit. For example, in the case of MOS-DRAM, when the sense amplifier is operating in the active cycle,
Since the voltage of the N ⁺ impurity diffusion layer used for the wiring abruptly changes from a high level to a low level, the voltage of the P-type substrate also becomes low due to the PN junction capacitance junction.

However, according to the present invention, the oscillation frequency of the ring oscillator 51 is controlled according to the output fluctuation of the voltage generating circuit 52, and the operation for compensating the output fluctuation of the voltage generating circuit 52 is performed.

In FIG. 5, the level detection circuit 53 is omitted and the output of the voltage generation circuit 52 is directly connected to the load M of the ring oscillator 52.
You may make it input into the gate A of OSFET. Further, the gate A can be independently controlled by the clock generator to operate the voltage generating circuit 52 for a required time, or the output voltage V _A thereof can be controlled to an arbitrary value.

As a reference example, FIG. 6 shows a substrate bias generating circuit using a substrate bias as a gate control signal of a load MOSFET.

The parts corresponding to those in FIG. 1 are designated by the same reference numerals as those in FIG. 1 and their detailed description is omitted. The difference from FIG. 1 is that the substrate bias output voltage V _BB of the charge pump circuits 3a and 3b is directly input to the gate of the load MOSFET of the ring oscillator 1.

In the case of an N-channel MOS integrated circuit, this substrate bias generating circuit has a negative substrate bias voltage V _BB during steady operation. If V _BB fluctuates in the more negative direction, it acts to lower the conductance of the load MOSFET of the ring oscillator, and as a result, the frequency of the ring oscillator 1 becomes lower and the pumping ability of the charge pump circuits 3a, 3b. Decrease and V
It works to restore _BB to a steady state. Further, V _BB is zero in the initial stage of precharge, and at this time, the load MOSFET of the ring oscillator 1 has a higher conductance than the steady state, so that oscillation starts at a high oscillation frequency, and thus V _BB changes in the negative direction quickly. To work like.
As a result, there is little power-on current when the power is turned on,
It becomes a highly reliable substrate bias generation circuit.

[Brief description of drawings]

FIG. 1 is a diagram showing a conventional substrate bias generation circuit, FIG. 2 is a diagram for explaining an example of an oscillation frequency control system of a ring oscillator in the present invention, and FIG. 3 is a diagram showing voltage waveforms at respective nodes thereof. FIG. 4 is a diagram for explaining another control method, FIG. 5 is a diagram showing an internal bias generation circuit according to an embodiment of the present invention, and FIG. 6 is a diagram showing a substrate bias as a gate control signal of a load MOSFET. It is a reference diagram of a substrate bias generation circuit used. 1 ... Ring oscillator, 2a, 2b ... Clock generator, 3a, 3b ... Charge pump circuit, 51 ...
… Ring oscillator, 52 …… Voltage generator, 53 ……
Level detection circuit.

Claims (3)

[Claims] 1. An internal bias generation circuit for a semiconductor device, comprising: a ring oscillator including a plurality of stages of MOS inverters; and a charge pump circuit driven by the output of the ring oscillator. Of the load MOSFETs, the ON or OFF potential is selectively applied to the gates of the remaining load MOSFETs in accordance with the state of the operating circuit serving as the load of the internal bias generation circuit. An internal bias generation circuit for a semiconductor device, comprising gate control means for applying a fixed potential. 2. The internal bias of a semiconductor device according to claim 1, wherein the predetermined load MOSFET is composed of a plurality of load MOSFET groups which are controlled independently of each other by the gate control means. Generator circuit. 3. The gate control means comprises a circuit for detecting the output voltage level of the charge pump circuit, and controls the gate of the load MOSFET by the output of the level detection circuit. An internal bias generation circuit for a semiconductor device according to the item.