JPH05108407A - System for debugging computer program - Google Patents

Abstract

PURPOSE:To provide the debug system of a computer program which can improve debugging processing efficiency by allowing the register value of CPU to correspond to a comparison register value as a condition and setting a braking point. CONSTITUTION:This system is constituted of a computer 1 provided with CPU 3 which is emulated based on a prescribed operation program and an emulator 2 emulating the computer 1. The computer 1 is a target system by the emulator 2. A register value comparison means 5 decides whether the computer 1 is a stop condition or not by comparing the respective register values of CPU 3 obtained sequentially by a register supervisory means 4 with the respective comparison register values stored in a comparison register value storage means 6 based on respective comparison methods stored in a comparison method storage means 7.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a debugging system for a computer program, which targets a computer and debugs an operation program of the computer.

[0002]

2. Description of the Related Art Conventionally, this type of computer program debugging system targets a computer having a CPU emulated according to a predetermined operation program and sets a breakpoint based on a specific register value. Therefore, the debug process for the predetermined operation program is performed.

[0003]

In the conventional debug system for computer programs, since it is not possible to set a breakpoint based on an arbitrary register value,
As a result, it is not possible to set multiple breakpoints and perform debug processing. This means that it is difficult for the conventional debug system to trace the CPU based on a specific register value, resulting in deterioration of debug processing efficiency.

In view of the above drawbacks, a technical object of the present invention is to provide a debugging system for a computer program which can set a breakpoint based on an arbitrary register value and has excellent debugging processing efficiency.

[0005]

According to the present invention, there is provided a debugging system for a computer program, which targets a computer having a CPU emulated based on a predetermined operation program and debugs the operation program of the CPU. Register monitoring means for monitoring the register value of the operating program, comparison register value storage means for storing the comparison register value, comparison method storage means for storing the comparison method for comparing the register value with the comparison register value,
By comparing the register value with the comparison register value based on the comparison method, it is possible to obtain the debug system of the computer program provided with the register value comparison means for determining whether or not the computer is in the stop condition.

Of these, the register value comparing means may determine that the debugging process is completed when the register value cannot be obtained from the register monitoring means. Also, in such a computer program debug system,
The comparison register value storage means stores a plurality of comparison register values, and the comparison method storage means compares a plurality of register values corresponding to each comparison register value and sequentially designated with each comparison register value. The register value comparison means stores a plurality of comparison methods for enabling the comparison, and the register value comparison means compares each register value with each comparison register value based on each comparison method to determine whether the computer is in a stop condition. It is even better to determine whether or not.

[0007]

[Embodiments] The debugging system for computer programs of the present invention will be described in detail below with reference to embodiments. FIG. 1 is a block diagram showing the basic configuration of a debug system which is an embodiment of the present invention.

The debug system is composed of a computer 1 having a CPU 3 which is emulated based on a predetermined operation program, and an emulator 2 which emulates the computer 1 as a target. Calculator 1
May be called a target system because it is targeted by the emulator 2.

The emulator 2 corresponds to each register value and a register monitor means 4 for monitoring the register value of the CPU 3, a comparison register value storage means 6 for storing a plurality of comparison register values, and an operation program. A comparison method storage unit 7 storing a plurality of comparison methods for comparing a plurality of register values sequentially selected with each comparison register value, and each register value sequentially acquired by the register monitoring unit 4 There is provided a register value comparing means 5 for judging whether or not the computer 1 is in the stop condition by comparing with each comparison register value based on the comparison method.

FIG. 2 is a flow chart showing an operation program (register monitoring algorithm) for performing debug processing by the debug system of the present invention. When the predetermined operation program is started, the register monitoring means 4 first monitors the register value of the CPU 3 (step S).
1) On the other hand, the register value comparison means 5 is the comparison method storage means 7
Of the plurality of comparison methods stored in the comparison method storage area, a specific comparison method (one comparison method) is extracted, and the comparison register value storage means 6 is associated with the specific comparison method.
The comparison register value stored in is designated and the comparison register value to be compared is judged (step S2).

Next, the register value comparing means 5 acquires the target register value from the register monitoring means 4 (step S3). Subsequently, the register value comparison means 5 compares the register value of the CPU 3 drawn out via the register monitoring means 4 with the comparison register value drawn out from the comparison register value storage means 6 based on a specific comparison method (step S4). ).

Next, as a result of the comparison, it is checked whether or not the register value is collated with the comparison register value to be truly compared (step S5), and if it is collated, the computer 1 (target) is stopped ( In step S8), the computer 1 at that time is inspected, and the inspection result (register value) is used as the debug process for the CPU 3. On the other hand, if the register value is not actually compared with the comparison register value to be compared, it is determined whether or not the register value comparison unit 5 has a comparison target register (comparison register value) to be compared in the comparison register value storage unit 6. Is checked (step S6).

As a result, when the comparison target registers remain, the comparison register value is determined so that each register value can be sequentially compared with each comparison register value based on each comparison method (step). The process returns before S2), but if there is no remaining, the debug process ends (step S7). That is, the debug processing in the debug system of the present invention is performed by the register value comparison means 5 through the comparison method storage means 7 to determine the comparison register value based on the extraction (specific) comparison method (step S2).
Acquisition processing of the target register value via the register monitoring means 4 by the register value comparison means 5 (step S3), comparison processing of the register value and comparison register value based on the comparison method by the register value comparison means 5 (step S4), register At the time when the comparison register value storage means 6 runs out of comparison register values, the comparison check processing (step S5) of the value and the comparison register value and the remaining state check processing (step S6) of the comparison register value are repeatedly repeated. Complete with.

In the debug system having such a configuration, the breakpoint can be set by making the comparison register value correspond to the register value of the CPU 3, so that the efficiency of debug processing is improved.
In addition, such a debug system performs debug processing based on a predetermined operation program when the number of comparison register values stored in the comparison register value storage means 6 is equal to or smaller than the number of register values of the CPU 3. Will be effective.

FIG. 3 illustrates the correspondence between the comparison register value storage means 6 and the comparison method storage means 7 when the number of comparison register values is the same as the number of register values. The comparison register value storage means 6 has a plurality of comparison register value storage areas 1
~ N are allocated, and the comparison method storage means 7 is allocated with the comparison method storage areas 1-n corresponding to the comparison register value storage areas 1-n on a one-to-one basis. In the debug process in this case, since the number of comparison register values and the number of comparison methods (n) are the same as the number of register values, the comparison method is configured to have relatively distinguishable unique information. is there.

4 shows the correspondence between the comparison register value storage means 6 and the comparison method storage means 7 when the number of comparison register values is smaller than the number of register values. A plurality of comparison register value storage areas 1 to m are assigned to the comparison register value storage means 6 here, and each comparison register value storage area 1 to m is assigned to the comparison method storage means 7.
Comparison method storage areas 1 to m corresponding to each of the
Has been assigned. In the debug processing in this case, since the number of comparison register values and the number of comparison methods is smaller than the number of register values, the comparison method itself may have register mapping information. That is, the single structure in the comparison method storage area m of the comparison method storage means 7 is composed of the comparison method storage field and the register mapping information storage field.

In the debug system of FIG. 1, the comparison register value storage means 6 stores a single comparison register value, and the comparison method storage means 7 compares a specific register value with the comparison register value. By storing a single comparison method and by causing the register monitoring means 4 to monitor a specific register value of the operation program, the register value comparison means 5 displays the specific register value based on the single comparison method. The present invention is not limited to the embodiment, because the computer 1 may be configured to determine whether or not it is in the stop condition by comparing with a single comparison register value.

[0018]

As described above, according to the present invention, the CPU
Correspond the comparison register value with the register value of
Since a breakpoint can be set, a debugging system for a computer program can be obtained which can improve the efficiency of debugging processing of operating programs (basic software / BIOS, device driver, etc.). That is, since the register value of the best efficiency can be used in the debug processing, the trace ability for the CPU can be remarkably improved.

[Brief description of drawings]

FIG. 1 is a block diagram showing a basic configuration of a debug system that is an embodiment of the present invention.

FIG. 2 is a flowchart showing an operation program (register monitoring algorithm) for performing debug processing by the debug system.

FIG. 3 is a diagram illustrating a correspondence between a comparison register value storage unit and a comparison method storage unit when the number of comparison register values is the same as the number of register values.

FIG. 4 is a diagram illustrating a correspondence between a comparison register value storage unit and a comparison method storage unit when the number of comparison register values is smaller than the number of register values.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 computer 2 emulator 3 CPU 4 register monitoring means 5 register value comparison means 6 comparison register value storage means 7 comparison method storage means

Claims (3)

[Claims] 1. A debug program system for a computer, which targets a computer having a CPU emulated based on a predetermined operation program and debugs the operation program of the CPU, monitors a register value of the operation program. Register monitoring means; comparison register value storage means for storing a comparison register value; comparison method storage means for storing a comparison method for comparing the register value with the comparison register value; and, based on the comparison method, A debug program system for a computer, comprising: a register value comparison means for determining whether or not the computer is in a stop condition by comparing a register value with the comparison register value. 2. The register value comparing means determines that the debug processing is completed when the register value cannot be acquired from the register monitoring means.
Debug system of the computer program described. 3. The comparison register value storage means stores a plurality of comparison register values, and the comparison method storage means stores a plurality of register values corresponding to each of the comparison register values and sequentially designated. A plurality of comparison methods for enabling comparison with each comparison register value are stored, and the register value comparison means compares each register value with each comparison register value based on each comparison method. The debug system for a computer program according to claim 1, wherein it is determined whether or not the computer is in a stop condition by comparing.