JPH02125643A - Resin seal type semiconductor device - Google Patents
Resin seal type semiconductor deviceInfo
- Publication number
- JPH02125643A JPH02125643A JP63279850A JP27985088A JPH02125643A JP H02125643 A JPH02125643 A JP H02125643A JP 63279850 A JP63279850 A JP 63279850A JP 27985088 A JP27985088 A JP 27985088A JP H02125643 A JPH02125643 A JP H02125643A
- Authority
- JP
- Japan
- Prior art keywords
- resin
- semiconductor device
- metal net
- electromagnetic wave
- shielding material
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3025—Electromagnetic shielding
Landscapes
- Physics & Mathematics (AREA)
- Health & Medical Sciences (AREA)
- Electromagnetism (AREA)
- Toxicology (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
Abstract
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は樹脂封止型半導体装置に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to a resin-sealed semiconductor device.
従来、樹脂封止・型半導体装置は、第４図に示すように
、リードフレームのアイランド９に半導体素子（ペレッ
ト）７を固着した後、金属細線（Ａｕ、Ｃｕ、ＡＩなど
）８でペレット７とり−ド３とをボンディングし、さら
にエポキシ樹脂がシリコン樹脂などの封止用樹脂材２で
ペレット、リード部を含む半導体全域を封止した後、フ
レーム５やタイバーを切離す方法で製造されていた。Conventionally, as shown in FIG. 4, in a resin-sealed semiconductor device, a semiconductor element (pellet) 7 is fixed to an island 9 of a lead frame, and then the pellet 7 is bonded with a thin metal wire (Au, Cu, AI, etc.) 8. It is manufactured by bonding with the lead 3 and sealing the whole area of the semiconductor including the pellet and lead part with the epoxy resin and the sealing resin material 2 such as silicone resin, and then separating the frame 5 and the tie bar. Ta.
上述した従来の樹脂封止型半導体装置は、樹脂が自由電
子をもたないために（樹脂に導電性がない）、電磁波妨
害（Ｅｌｅｃｔｒｏｍａｇｎｅｔｉｃ Ｉｎｔｅｒｆｅ
ｒｅｎｃｅ）に対し、特に蛍光灯などのスイッチングに
代表される大気中を輻射してくる電磁波妨害に対して妨
害を受は易いという欠点がある。The conventional resin-sealed semiconductor device described above suffers from electromagnetic interference because the resin does not have free electrons (the resin has no conductivity).
However, it has the disadvantage that it is particularly susceptible to interference from electromagnetic interference radiated into the atmosphere, typified by switching from fluorescent lamps and the like.
本発明の樹脂封止型半導体装置は、半導体素子を封止す
る封止樹脂材の外表面に電磁波を遮蔽する塗料膜または
電磁波を遮蔽する金属製ネットが設けられている構造を
有している。The resin-sealed semiconductor device of the present invention has a structure in which a paint film for shielding electromagnetic waves or a metal net for shielding electromagnetic waves is provided on the outer surface of a sealing resin material for sealing a semiconductor element. .
次に、本発明の実施例について図面を参照して説明する
。Next, embodiments of the present invention will be described with reference to the drawings.
第１図は本発明の第１の実施例の断面図である。FIG. 1 is a sectional view of a first embodiment of the invention.
電磁波シールド材１は樹脂封止型半導体装置の樹脂材２
の外表面にリードと接触することなしに塗布される。こ
こで、電磁波シールド材は、ニッケル系、銅系、銀糸、
などの塗料を使用することができるが、パーソナルコン
ピュータ等の汎用機器が発生する３００ＭＨｚ以下の電
磁波に対するシールド性を考えた場合は、銅系塗料が優
れており、この銅系塗料を２５μｍ程度塗布するならば
電磁波を遮蔽する効果は十分上げられる。The electromagnetic shielding material 1 is the resin material 2 of the resin-sealed semiconductor device.
is applied to the outer surface of the lead without contact with the lead. Here, the electromagnetic shielding material is nickel-based, copper-based, silver thread,
However, when considering shielding properties against electromagnetic waves of 300 MHz or less generated by general-purpose equipment such as personal computers, copper-based paint is superior, and this copper-based paint should be applied to a thickness of about 25 μm. If so, the effect of shielding electromagnetic waves can be sufficiently increased.
次に、この電磁波シールド材の塗布方法を説明する。Next, a method of applying this electromagnetic shielding material will be explained.
第２図（ａ）、（ｂ）は第１図に示す実施例の電磁波シ
ールド材の塗布方法を説明するための平面図及びＡ−Ａ
’線断面図である。2(a) and 2(b) are plan views and A-A for explaining the method of applying the electromagnetic shielding material of the embodiment shown in FIG.
'It is a line cross-sectional view.
リードフレームに樹脂材２を封止した後、リード３、フ
レーム５に樹脂等で出来ているマスク６を被せ、ノズル
１０から電磁波シールド材原料液１１を塗布する。ここ
で、注意しなければならないことは、電磁波シールド材
は導電性のため、リード間の樹脂材表面に塗布された場
合、リード間に導通がとられることになり、半導体装置
を短絡させることになる。マスク６を被せることにより
上述した危険性を回避できる。After the lead frame is sealed with the resin material 2, the leads 3 and the frame 5 are covered with a mask 6 made of resin or the like, and an electromagnetic shielding material raw material liquid 11 is applied from a nozzle 10. The thing to keep in mind here is that electromagnetic shielding material is conductive, so if it is applied to the surface of the resin material between the leads, there will be continuity between the leads, which may cause a short circuit in the semiconductor device. Become. By covering with the mask 6, the above-mentioned danger can be avoided.
第３図は本発明の第２の実施例の斜視図である。FIG. 3 is a perspective view of a second embodiment of the invention.
樹脂封止半導体装置の樹脂材２の殆んど全域を被うよう
に金属性ネット１３を貼付ける。この実施例でも金属性
ネット１３はリード３と接触しないようにする。A metal net 13 is attached so as to cover almost the entire area of the resin material 2 of the resin-sealed semiconductor device. In this embodiment as well, the metal net 13 is prevented from coming into contact with the leads 3.
以上説明したように、本発明は、封止樹脂材表面に電磁
波シールド材を塗布すること、あるいは金属製ネットを
貼付けることにより電磁波妨害からの影響を軽減できる
効果がある。As explained above, the present invention has the effect of reducing the influence of electromagnetic interference by applying an electromagnetic shielding material to the surface of the sealing resin material or by pasting a metal net.
第１図は本発明の第１の実施例の断面図、第２図（ａ）
、（ｂ）は第１図に示す実施例の電磁波シールド材の塗
布方法を説明するための平面図及びＡ−Ａ′線断面図、
第３図は本発明の第２の実施例の斜視図、第４図は従来
の樹脂封止型半導体の断面図である。
１・・・電磁波シールド材、２・・・樹脂材、３・・・
リード、５・・・クレーム、６・・・マスク、７・・・
半導体素子、７・・・金属細線、９・・・アイランド、
１０・・・ノズル、１１・・・電磁波シールド材原料液
、１３・・・金属ネット。Fig. 1 is a sectional view of the first embodiment of the present invention, Fig. 2(a)
, (b) is a plan view and a cross-sectional view taken along the line A-A' for explaining the method of applying the electromagnetic shielding material of the embodiment shown in FIG.
FIG. 3 is a perspective view of a second embodiment of the present invention, and FIG. 4 is a sectional view of a conventional resin-sealed semiconductor. 1... Electromagnetic shielding material, 2... Resin material, 3...
Lead, 5...Claim, 6...Mask, 7...
Semiconductor element, 7... Metal thin wire, 9... Island,
10... Nozzle, 11... Electromagnetic shielding material raw material liquid, 13... Metal net.
Claims (1)
に電磁波を遮蔽する塗料膜または電磁波を遮蔽する金属
製ネットが設けられていることを特徴とする樹脂封止型
半導体装置。1. A resin-sealed semiconductor device, characterized in that a paint film for shielding electromagnetic waves or a metal net for shielding electromagnetic waves is provided on the outer surface of a sealing resin material.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63279850A JPH02125643A (en) | 1988-11-04 | 1988-11-04 | Resin seal type semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63279850A JPH02125643A (en) | 1988-11-04 | 1988-11-04 | Resin seal type semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02125643A true JPH02125643A (en) | 1990-05-14 |
Family
ID=17616810
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63279850A Pending JPH02125643A (en) | 1988-11-04 | 1988-11-04 | Resin seal type semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02125643A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5399902A (en) * | 1993-03-04 | 1995-03-21 | International Business Machines Corporation | Semiconductor chip packaging structure including a ground plane |
| US5932927A (en) * | 1996-07-24 | 1999-08-03 | Nec Corporation | High-frequency device package |
-
1988
- 1988-11-04 JP JP63279850A patent/JPH02125643A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5399902A (en) * | 1993-03-04 | 1995-03-21 | International Business Machines Corporation | Semiconductor chip packaging structure including a ground plane |
| US5480841A (en) * | 1993-03-04 | 1996-01-02 | International Business Machines Corporation | Process of multilayer conductor chip packaging |
| US5932927A (en) * | 1996-07-24 | 1999-08-03 | Nec Corporation | High-frequency device package |
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