JP2013201600A - Automatic gain control circuit - Google Patents

Abstract

An automatic gain adjusting circuit capable of adjusting a gain in a short time is provided.
An output signal of the variable gain amplifier 11 the amplitude of the (amplified signal) detected by the amplitude monitor unit 12, the amplitude of the desired amplified signal amplitude monitor unit 12 is obtained in advance and amplitude monitor signal A _m was detected an amplitude monitor signal a _des that corresponds to the gain G _o set in the variable gain amplifier 11 calculates the gain G _opt for obtaining a desired amplified signal by _{(a des / a m) G} o, the variable gain amplifier 11 Set to.
[Selection] Figure 1

Description

  The present invention relates to a technique for automatically adjusting a gain.

  An automatic gain adjustment circuit is used for a device that handles an input signal whose strength changes by a digit, such as wireless communication or a measuring instrument, that is, a device that requires a wide dynamic range of an input signal. The automatic gain adjustment circuit adjusts to an appropriate gain so that the amplitude of the output signal does not exceed a predetermined value. Specifically, the gain is maximized when the amplitude of the input signal is small, and the gain is decreased until the amplitude of the output signal reaches a predetermined value when the amplitude of the input signal increases.

  FIG. 19 shows a functional block diagram of a conventional automatic gain adjustment circuit. The amplitude of the output signal of the variable gain amplifier 101 is acquired by the amplitude detection circuit 102, and a deviation from a reference signal set in advance corresponding to the obtained amplitude value is calculated by the comparison circuit 103. An output signal having a predetermined amplitude is obtained by using negative feedback control in which the gain of the variable gain amplifier 101 is changed by the adjustment circuit 104 until the deviation between the amplitude of the output signal of the variable gain amplifier 101 and the reference signal becomes zero.

James Staley, “Low frequency AGC circuit with a wide dynamic range of 60 dB using one VGA”, [online], Analog Devices, Inc., [March 2, 2012 search], Internet <URL: http: //www.analog.com/static/imported-files/jp/application_notes/AN-934.pdf>

  However, the feedback control of the negative feedback has a problem that it takes time to obtain an optimum gain when the gain is adjusted by stable control.

  The present invention has been made in view of the above, and an object thereof is to provide an automatic gain adjustment circuit capable of adjusting a gain in a short time.

The automatic gain adjustment circuit according to the first aspect of the present invention includes a variable gain amplifying means for outputting an output signal obtained by amplifying an input signal with a set gain, and the output when the variable gain amplifying means is set to a gain _Go. signal amplitude | V _out | and a by detecting amplitude monitor means for outputting an amplitude monitor signal a _m, the amplitude monitor signal a _m and advance amplitude monitor signal corresponding to the amplitude of the desired of the output signal that has been determined a _Des and the gain _Go

(However, A _mL represents the lower limit of the amplitude monitor signal, | V _mL | represents the lower limit of the amplitude of the output signal, and k = (A _m −A _mL ) / (| V _out | − | V _mL |)) And gain setting means for obtaining the optimum gain and setting it in the variable gain amplification means.

The automatic gain adjustment circuit according to the second aspect of the present invention includes variable gain amplifying means for outputting an output signal obtained by amplifying an input signal with a set gain, and amplitude | V _{in of the} input signal input to the variable gain amplifying means. | amplitude monitoring means for outputting an amplitude monitor signal a _m and by detecting the amplitude monitor signal a _des expressions corresponding to the amplitude of the desired said output signal said previously obtained the amplitude monitor signal a _m

(However, A _mL represents the lower limit of the amplitude monitor signal, | V _mL | represents the lower limit of the amplitude of the output signal, and k = (A _m −A _mL ) / (| V _in | − | V _mL |)) And gain setting means for obtaining the optimum gain and setting it in the variable gain amplification means.

  In the automatic gain adjustment circuit, the automatic gain adjustment circuit includes gain switching amplification means for amplifying the input signal by setting gain in stages before the variable gain amplification means with the set gain, and the gain setting means includes the amplitude monitor When the amplitude detected by the means is larger than a predetermined threshold value, the gain of the gain switching amplification means is switched.

  In the automatic gain adjustment circuit, the gain switching amplification means includes a plurality of fixed gain amplifiers having different gains and a selector for selecting one from output signals of the plurality of fixed gain amplifiers.

  A plurality of automatic gain adjustment circuits; and a selector that selects one of the output signals of the plurality of automatic gain adjustment circuits that is not saturated in output. And

  In the automatic gain adjustment circuit, when the amplitude of the output signal detected by the amplitude monitor means is compared with a reference amplitude signal, and the amplitude of the output signal is larger than the reference amplitude signal, it is optimal for the gain setting means It is characterized by having start determination means for obtaining a large gain.

  In the automatic gain adjustment circuit, the amplitude monitor means includes a peak hold circuit that holds a peak value of an input signal and outputs a peak value signal.

  According to the present invention, an automatic gain adjustment circuit capable of adjusting a gain in a short time can be provided.

It is a functional block diagram which shows the structure of the automatic gain adjustment circuit in 1st Embodiment. It is a figure which shows the timing of the signal input into each part of the automatic gain adjustment circuit of FIG. 1, and the process of each part. It is a functional block diagram which shows the structure of the modification of the automatic gain adjustment circuit in 1st Embodiment. It is a figure which shows the timing of the signal input into each part of the automatic gain adjustment circuit of FIG. 3, and the process of each part. It is a functional block diagram which shows the structure of the modification of a start determination part. It is a figure which shows the signal which each part of an input signal, an output signal, and a start determination part outputs. It is a functional block diagram which shows the structure of another modification of a start determination part. It is a figure which shows the timing of the signal input into each part of the automatic gain adjustment circuit of FIG. 7, and the process of each part. It is a functional block diagram which shows the structure of the automatic gain adjustment circuit including the amplitude monitor part provided with the peak hold part with a clear. It is a figure which shows the timing of the signal input into each part of the automatic gain adjustment circuit of FIG. 9, and the process of each part. It is a functional block diagram which shows the structure of the amplitude monitor part of another modification. It is a functional block diagram which shows the structure of the automatic gain adjustment circuit in 2nd Embodiment. It is a functional block diagram which shows the structure of the automatic gain adjustment circuit in 3rd Embodiment. It is a figure which shows the timing of the signal input into each part of the automatic gain adjustment circuit of FIG. 13, and the process of each part. It is a functional block diagram which shows the structure of another automatic gain adjustment circuit in 3rd Embodiment. It is a functional block diagram showing a configuration of an automatic gain adjustment circuit in which a gain switching amplification unit is configured by N fixed gain amplifiers having different gains. It is a functional block diagram which shows the structure of another automatic gain adjustment circuit in 3rd Embodiment. It is a figure which shows the relationship between the amplitude monitor signal and amplitude signal in an amplitude monitor part. It is a functional block diagram which shows the structure of the conventional automatic gain adjustment circuit.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

[First Embodiment]
FIG. 1 is a functional block diagram showing a configuration of an automatic gain adjustment circuit in the first embodiment.

  The automatic gain adjustment circuit shown in FIG. 1 includes a variable gain amplifier 11, an amplitude monitor unit 12, and a division processing / control unit 13.

  The variable gain amplifier 11 has a maximum gain (maximum gain), amplifies the input signal with a gain equal to or less than the maximum gain set by the gain control signal, and outputs a signal (hereinafter referred to as an amplified signal).

  The amplitude monitor unit 12 acquires the amplitude of the amplified signal and outputs an amplitude data signal. The amplitude monitor unit 12 includes an amplitude detection circuit 121 that detects the amplitude of an AC signal and outputs a detection signal, and an analog-digital conversion / timing control unit 122 that converts the detection signal into a digital signal and controls the conversion timing. Is done. The amplitude detection circuit 121 may detect either diode detection or square detection.

  The division processing / control unit 13 performs division processing for obtaining an optimum gain based on the amplitude data signal of the amplified signal detected when the variable gain amplifier 11 has the maximum gain and the amplitude data signal having a desired amplitude of the predetermined amplified signal. And a gain control / signal generation unit 132 that controls the variable gain amplifier 11 with a gain control signal that starts processing based on the state control signal and sets the optimum gain obtained by the division processing unit 131. .

  Here, the operation principle of the automatic gain adjustment circuit will be described.

The input signal of the variable gain amplifier 11 is V _in , the amplified signal is V _out , and the maximum gain is _Go . Further, the relationship between the amplitude data signal A _m and V _out of the amplitude monitor unit 12 is A _m = k | V _out |. | V _out | represents the amplitude of the amplified signal V _out . The target value of the amplitude of the amplified signal is | V _des |, and the amplitude data signal at this time is A _des = k | V _des |.

When the state control signal is not input, the gain of the variable gain amplifier 11 is set to an initial value (maximum gain _Go ). Consider a case where a state control signal is input to the division processing / control unit 13 while a signal is input to the variable gain amplifier 11. When the amplitude of the input signal V _in is | V _in |, the optimum gain G _{opt at which} the amplitude of the amplified signal V _out becomes the target value | V _des | is expressed by the following equation.

Since the following formulas (2) and (3) hold according to the definition, the optimum gain G _opt is expressed as the following formula (4).

In the formula (4), the target value of the amplitude of the amplified signal | V _des | amplitude data signal corresponding to the A _des and maximum gain G _o is the amplitude of the input signal | V _in | can predetermine regardless of the variable gain amplifier 11 the amplitude data signal a _m corresponding to the amplitude of the amplified signal when the gain of the maximum gain G _o can be obtained from the amplitude monitor unit 12. Therefore, the optimum output amplitude can be obtained by obtaining the amplitude data signal _Am from the amplitude monitor unit 12 and determining the optimum gain _Gopt by the equation (4). At this time, it is not necessary to gradually bring the gain of the variable gain amplifier 11 close to the optimum gain while observing the deviation between the amplitude of the amplified signal and the target value, and the time until the optimum gain is obtained with fewer processing iterations. Can be shortened.

In the present embodiment, the maximum gain _Go is set as the initial value of the gain of the variable gain amplifier 11. However, the initial value may be a predetermined gain instead of the maximum gain _Go .

  Next, the operation of the automatic gain adjustment circuit in the first embodiment will be described using signals input to each part of the automatic gain adjustment circuit.

  FIG. 2 is a diagram illustrating a signal input to each unit and processing timing of each unit.

When a signal is input to the variable gain amplifier 11 (FIG. 2 (a)), the variable gain amplifier 11 amplifies the input signal with a set gain (here, maximum gain _Go ) and outputs an amplified signal (FIG. 2). 2 (b)).

At this time, when a state control signal is input to the division processing / control unit 13 (FIG. 2C), a processing start signal is output from the gain control / signal generation unit 132 to initialize the division processing unit 131, The division processing unit 131 outputs a monitor start signal to the amplitude monitor unit 12, and the amplitude monitor process is started (FIG. 2 (d)). In the amplitude monitoring process, the amplitude detection circuit 121 detects the amplitude of the amplified signal for a predetermined period including the period during which the output is stabilized, and the analog-digital conversion / timing control unit 122 converts the detection signal into a digital signal. The analog - digital converter and timing control unit 122 outputs the amplitude data signal A _m to the amplitude detection circuit 121 corresponds to the amplitude of the amplified signal by detecting the division processing section 131 (FIG. 2 (e)).

Division processing unit 131, amplitude data signal A _m, and by executing calculation of Equation (4) using the maximum gain G _o set in the amplitude data signal A _des and the variable gain amplifier 11, a predetermined target optimal The gain G _opt is determined (FIG. 2 (f)). Operation of equation (4) may be performed using a division operation can be computer, but since the G _opt and A _m is a one-to-one correspondence, we obtain a correspondence table in advance G _opt and A _m, wherein (4) the calculation of the may be calculated G _opt from a _m conducted by this index.

The gain control / signal generation unit 132 outputs a gain control signal corresponding to the optimum gain G _opt to the variable gain amplifier 11 (FIG. 2 (g)). After the optimum gain setting, the amplitude of the amplified signal is | V _des |.

<Modification with start determination unit>
Next, a modified example of the automatic gain adjustment circuit in the first embodiment will be described.

  FIG. 3 is a functional block diagram showing a configuration of a modified example of the automatic gain adjustment circuit in the first embodiment.

  In the automatic gain adjustment circuit shown in FIG. 1, a state control signal is input from the outside. However, in the automatic gain adjustment circuit of FIG. 3, it is detected that a signal is input to the variable gain amplifier 11 and outputs a state control signal. A start determination unit 14 is provided.

  The start determination unit 14 includes a comparison unit 141 and a determination logic processing unit 142. The comparison unit 141 receives and compares the detection signal obtained by the amplitude detection circuit 121 detecting the amplitude of the amplified signal and the start reference amplitude signal, and outputs the comparison result to the determination logic processing unit 142. When the amplitude of the amplified signal becomes larger than the starting reference amplitude signal, the determination logic processing unit 142 outputs a state control signal to the division processing / control unit 13 to start processing for calculating an optimum gain. Further, after the variable gain amplifier 11 is set to the optimum gain, the optimum gain is maintained when the amplitude of the amplified signal is larger than the starting reference amplitude signal. Further, when no signal is input to the variable gain amplifier 11 and the amplitude of the amplified signal becomes smaller than the starting reference amplitude signal, the gain of the variable gain amplifier 11 is returned to the maximum gain.

  Next, a process in which the start determination unit 14 outputs a state control signal will be described.

  FIG. 4 is a diagram illustrating a signal input to each unit and processing timing of each unit.

When a signal is input to the variable gain amplifier 11 (FIG. 4 (a)) and the amplitude of the amplified signal becomes larger than the starting reference amplitude signal _Ar1 (FIG. 4 (b)), the start determination unit 14 sends a state control signal. Is changed from a low potential to a high potential (FIG. 4C), and the amplitude monitoring process is started (FIG. 4D).

In the start determination unit 14, the comparison unit 141 compares the detection signal A _md of the amplitude monitor unit 12 with the reference amplitude signal A _r1 for start. Based on the comparison result of the comparison unit 141, the determination logic processing unit 142 controls the potential of the state control signal. When the comparison result is A _md > A _r1 , the state control signal is set to a high potential, and when A _md ≦ A _r1 , the state control signal is set to a low potential.

  Since the operation of the process of calculating the optimum gain in FIGS. 4D to 4G is the same as that in FIG. 2, the description thereof is omitted here.

When no signal is input to the variable gain amplifier 11 and the amplitude of the amplified signal becomes equal to or smaller than the reference amplitude signal for start, that is, when the comparison result of the comparison unit 141 is A _md ≦ A _r1 , the determination logic processing unit 142 outputs the state control signal. Is returned to a low potential, the gain control / signal generation unit 132 is initialized, and the gain control signal is returned to the set value at which the maximum gain _Go is obtained (FIG. 4 (g)).

  Next, a modified example of the start determination unit will be described.

  FIG. 5 is a functional block diagram showing a configuration of a modified example of the start determination unit 14 of FIG.

  In the automatic gain adjustment circuit of FIG. 3, the detection signal output from the amplitude detection circuit 121 is input to the comparison unit 141, but in the automatic gain adjustment circuit of FIG. 5, the amplified signal is input to the comparison unit 141. The start determination unit 14 illustrated in FIG. 5 includes a low-pass filter 143 between the comparison unit 141 and the determination logic processing unit 142.

  Here, a process in which the start determination unit 14 in FIG. 5 outputs a state control signal will be described.

  FIG. 6 is a diagram illustrating an input signal, an output signal, and a signal output from each unit of the start determination unit.

When a signal is input to the variable gain amplifier 11 (FIG. 6A), a time occurs when the amplified signal becomes larger than the starting reference amplitude signal _Ar1 (FIG. 6B). The output signal of the comparison unit 141 has a low potential when the amplified signal is smaller than the start reference amplitude signal _Ar1, and has a high potential when the amplified signal is larger (FIG. 6C).

  When the output signal of the comparison unit 141 is passed through the low-pass filter 143, the signal is increased when the signal is input to the variable gain amplifier 11, and a signal that returns to the original state is obtained when the signal is not input (FIG. 6 ( d)).

  A state control signal is obtained by inputting the output of the low-pass filter 143 to the decision logic processing unit 142 and shaping the waveform (FIG. 6E).

  Next, another modification of the start determination unit will be described.

  FIG. 7 is a functional block diagram showing a configuration of another modification of the start determination unit in FIG.

The start determination unit 14 in FIG. 7 includes a comparison unit 144 that inputs a start reference amplitude signal A _r1 , a comparison unit 145 that inputs a return reference amplitude signal A _r2 , and a determination logic processing unit 142, and an optimum gain setting. This corresponds to the case where the amplitude of the amplified signal changes later.

The division processing / control unit 13 has three states: a state for calculating an optimum gain, a state for maintaining an optimum gain, and a state for achieving a maximum gain. The start determination unit 14 in FIG. 7 uses a starting reference amplitude signal A _{r1 that} is a reference for starting the process of calculating the optimum gain, and a return reference amplitude signal A _r2 that is a reference for returning to the maximum gain. The comparison unit 144 compares the detection signal A _md of the amplitude monitor unit 12 with the start reference amplitude signal A _r1 , and the comparison unit 145 compares the detection signal A _md with the return reference amplitude signal A _r2 . Based on the comparison result of the comparison unit 144 and the comparison unit 145, the determination logic processing unit 142 controls the state of the division processing / control unit 13. Specifically, when A _md > A _r1 , a signal for starting the process of calculating the optimum gain is output, when A _r1 ≧ A _md ≧ A _r2 , the optimum gain is maintained, and when A _md <A _r2 , the maximum gain is obtained. Let me.

  The operation of the automatic gain adjustment circuit of FIG. 7 will be described using signals input to each part of the automatic gain adjustment circuit.

  FIG. 8 is a diagram illustrating signals input to each unit and processing timing of each unit.

When a signal is input to the variable gain amplifier 11 (FIG. 8 (a)) and A _md > A _r1 and A _md > A _r2 are _satisfied (FIG. 8 (b)), the start determination unit 14 detects the state control signals A and B. Both are set to a high potential (FIG. 8C), and processing for calculating an optimum gain is started (FIGS. 8D to 8G). Since the process of calculating the optimum gain is the same as that in FIG. 2, the description thereof is omitted here.

When the optimum gain is set in the variable gain amplifier 11 and A _r1 ≧ A _md ≧ A _r2 (FIG. 8B), the state control signal A is kept at a high potential and the state control signal B is kept at a low potential ( FIG. 8C) maintains the optimum gain.

When no signal is input to the variable gain amplifier 11 (FIG. 8A), and A _md <A _r1 and A _md <A _r2 (FIG. 8B), the state control signals A and B are both set to a low potential. Te (FIG. 8 (c)), the gain of the variable gain amplifier 11 back to the maximum gain G _o (FIG. 8 (g)).

  In FIG. 10, the detection signal is input to the comparison units 144 and 145, but the amplified signal may be input to the comparison units 144 and 145.

<Modification of amplitude monitor>
In the amplitude monitor unit 12 described so far, the amplitude of the amplified signal is acquired by the amplitude detection circuit 121, but the amplitude may be acquired by a peak hold circuit.

  FIG. 9 is a functional block diagram illustrating a configuration of an automatic gain adjustment circuit including the amplitude monitor unit 12 including the peak hold unit 123 with clear.

  The clear peak hold unit 123 holds the peak value of the input signal and outputs a peak value signal. When the clear signal is input, the internal state is initialized and the output peak value is cleared.

  The analog-digital conversion / timing control unit 122 converts the peak value signal into a digital signal and controls the conversion timing.

  The operation of the automatic gain adjustment circuit of FIG. 9 will be described using signals input to each part of the automatic gain adjustment circuit.

  FIG. 10 is a diagram illustrating a signal input to each unit and processing timing of each unit.

When a signal is input to the variable gain amplifier 11 (FIG. 10 (a)) and A _md > A _r1 and A _md > A _r2 are _satisfied (FIG. 10 (b)), the start determination unit 14 detects the state control signals A and B. Are both set to a high potential (FIG. 10E), and the process of calculating the optimum gain is started. The processing for obtaining the state control signals A and B from the outputs of the comparison units 144 and 145 as shown in FIGS. 10C and 10D is the same as that described with reference to FIG.

  In the process of calculating the optimum gain, first, the division processing / control unit 13 outputs a monitor start signal to the amplitude monitor unit 12.

  Then, a clear signal is output from the analog-digital conversion / timing control unit 122 to the clear peak hold unit 123 (FIG. 10 (f)), the clear peak hold unit 123 is initialized, and a peak hold operation is started. (FIG. 10 (g)).

  Subsequently, after a certain period T1 from the start of the peak hold operation, the analog-to-digital conversion / timing control unit 122 performs analog-to-digital conversion on the peak value signal to acquire amplitude data, and the division processing / control unit 13 serves as the amplitude data signal. (FIG. 10 (h)). The fixed period T1 only needs to be longer than the period of the carrier wave, and the amplitude can be monitored in a shorter period than when the amplitude detection unit is used.

  The division processing unit 131 determines the optimum gain by performing the calculation of the equation (4) (FIG. 10 (i)), and the gain control / signal generation unit 132 changes the gain control signal corresponding to the optimum gain to the variable gain. The signal is output to the amplifier 11 (FIG. 10 (j)).

Thereafter, when no signal is input to the variable gain amplifier 11 (FIG. 10 (a)), and A _md <A _r1 and A _md <A _r2 (FIG. 10 (b)), the start determination unit 14 causes the state control signal A , B is together to a low potential (FIG. 10 (e)), the gain of the variable gain amplifier 11 back to the maximum gain G _o (FIG. 10 (j)).

  In the above description, the amplitude data is determined by performing the peak hold operation only once, but an average value obtained a plurality of times may be output as the amplitude data.

  Next, another modification of the amplitude monitor unit 12 will be described.

  FIG. 11 is a functional block diagram showing a configuration of the amplitude monitor unit 12 of another modification. In the amplitude monitor unit 12 of FIG. 9, only the peak value, that is, the maximum value in the period T1 is measured to acquire the amplitude, but the amplitude monitor unit 12 of FIG. 11 acquires the amplitude from the maximum value and the minimum value.

  The amplitude monitor unit 12 of FIG. 11 includes a differential output buffer unit 124, two clear peak hold units 123-1, 123-2, and an analog-digital conversion / timing control unit 122.

  The differential output buffer unit 124 has a non-inverted output and an inverted output, and a signal in phase with the input amplified signal is output from the non-inverted output to the clear peak hold unit 123-1 and is a signal obtained by inverting the input amplified signal. Is output from the inverted output to the peak hold unit 123-2 with clear.

  During the amplitude monitor process, the peak hold unit with clear 123-1 holds the maximum output value of the differential output buffer unit 124 within the period T1, and the peak hold unit with clear 123-2 performs differential within the period T1. The minimum value of the output of the output buffer unit 124 is held and output to the analog-digital conversion / timing control unit 122 as a maximum value signal and a minimum value signal, respectively.

  The analog-to-digital conversion / timing control unit 122 performs analog-to-digital conversion on the maximum value signal and the minimum value signal after the lapse of the period T1 from the start of the peak hold operation, and sets the maximum value and minimum value of the output of the differential output buffer unit 124 obtain. After obtaining the amplitude data based on the difference between the maximum value and the minimum value, an amplitude data signal is output. The method for obtaining the amplitude data may be a difference between the maximum value and the minimum value as the amplitude data, or a half of the difference between the maximum value and the minimum value may be the amplitude data. In addition, the amplitude data may be obtained by obtaining the difference between the maximum value and the minimum value or half the difference between the maximum value and the maximum value once, but the difference between the maximum value and the minimum value or the difference between the maximum value and the minimum value may be obtained. An average value obtained by obtaining the half multiple times may be used as the amplitude data.

As described above, according to this embodiment, the amplitude of the output signal of the variable gain amplifier 11 (amplification signal) detected by the amplitude monitor unit 12 in advance and amplitude monitor signal A _m to the amplitude monitor unit 12 detects from the gain G _o set in the amplitude monitor signal a _des and the variable gain amplifier 11 corresponding to the amplitude of the desired amplified signal that has been determined, the gain G _opt for obtaining a desired amplified signal (a _des / a _m) calculated by G _o, by setting the variable gain amplifier 11, it is possible to adjust the short time gain.

  According to the present embodiment, the amplitude of the amplified signal is compared with the starting reference amplitude signal, and when the amplitude of the amplified signal is larger than the starting reference amplitude signal, the process of calculating the optimum gain is started. By including the start determination unit 14 that outputs the state control signal, it is not necessary to input the state control signal from the outside of the automatic gain adjustment circuit.

  According to the present embodiment, the amplitude monitor unit 12 includes the peak hold unit 123 with clear that holds the peak value of the input signal and outputs the peak value signal, so that the amplitude monitor unit 12 detects the amplitude of the amplified signal. The fixed period T1 can be shortened.

[Second Embodiment]
In the first embodiment, the optimum gain is determined by monitoring the amplitude of the output signal (amplified signal) of the variable gain amplifier 11, but the optimum gain is monitored by monitoring the amplitude of the input signal of the variable gain amplifier 11. It is also possible to decide.

  FIG. 12 is a functional block diagram showing the configuration of the automatic gain adjustment circuit in the second embodiment.

  The automatic gain adjustment circuit shown in FIG. 12 includes a variable gain amplifier 11, an amplitude monitor unit 12, and a division processing / control unit 13, as in the first embodiment. The difference from the first embodiment is that the amplitude monitor unit 12 detects the amplitude of the input signal.

  The variable gain amplifier 11 amplifies the input signal with a gain set by the gain control signal and outputs an amplified signal. The amplitude monitor unit 12 acquires the amplitude of the input signal of the variable gain amplifier 11 and outputs the amplitude data signal to the division processing / control unit 13. The division processing / control unit 13 derives an optimum gain based on the amplitude data signal, and outputs a gain control signal corresponding to the optimum gain.

  Here, the operation principle of the automatic gain adjustment circuit in the second embodiment will be described.

The input signal of the variable gain amplifier 11 is V _in and the amplified signal is V _out . Further, the relationship between the amplitude data signal A _m and V _in of the amplitude monitor unit 12 is A _m = k | V _in |. Let the target value of the amplitude of the amplified signal be | V _des |.

Consider a case where a state control signal is input to the division processing / control unit 13 while a signal is input to the variable gain amplifier 11. When the amplitude of the input signal V _in is | V _in |, the optimum gain G _{opt at} which the amplitude of the amplified signal V _out is | V _des | is the same as that in the equation (1). Since the following equation (5) is established from the definition, the optimum gain G _opt is expressed as equation (6).

If A _des = k | V _des |, the equation (6) becomes the following equation (7).

In the formula (7) and equation _{(6), k | V des} | or A _des amplitude of the input signal | V _in | can a predetermined regardless amplitude data signal A _m can be obtained from the amplitude monitor unit 12. The amplitude data signal A _m of the variable gain amplifier 11 is input to the input signal obtained from the amplitude monitor unit 12, optimum output amplitude when determining the optimum gain G _opt by the expression (6) or (7) is obtained It is done. At this time, it is not necessary to gradually bring the gain of the variable gain amplifier 11 close to the optimum gain while observing the deviation between the amplitude of the amplified signal and the target value, and the time until the optimum gain is obtained with fewer processing iterations. Can be shortened.

In the automatic gain adjustment circuit of FIG. 12, a state control signal is input from the outside. However, as in the first embodiment, a start determination unit 14 is added to generate a state control signal from the amplitude of the input signal. It is also possible to do. At this time, in order to cope with a configuration in which only the reference amplitude signal A _r1 for start is used to start processing for obtaining an optimum gain, or when the amplitude of the amplified signal changes after the optimum gain is set, the reference for start It is possible to employ a configuration in which the amplitude signal A _r1 and the return reference amplitude signal A _r2 are used.

  In addition, the amplitude monitor unit 12 uses the amplitude detection circuit 121 and the clear peak hold unit 123 shown in the first embodiment.

As described above, according to this embodiment, the amplitude of the input signal to be input to the variable gain amplifier 11 detects the amplitude monitor unit 12, it is previously obtained the amplitude monitor signal A _m to the amplitude monitor unit 12 detects A gain G _opt for obtaining a desired amplified signal is calculated from A _des / A _m from the amplitude monitor signal A _des corresponding to the amplitude of the desired amplified signal, and is set in the variable gain amplifier 11. Gain can be adjusted over time. Calculation of the equation (7) may be performed using a division operation can be computer, but since the G _opt and A _m is a one-to-one correspondence, we obtain a correspondence table in advance G _opt and A _m, wherein (7) calculation of may be calculated G _opt from performed a _m by this index.

[Third Embodiment]
The variable gain amplifier 11 used in the example of the above embodiment is based on the premise that the amplitude of the amplified signal is not saturated even if the input signal is large. However, if the power supply voltage applied to the circuit is lowered to reduce the power, the amplitude of the amplified signal of the variable gain amplifier 11 is saturated and the dynamic range of the amplitude monitor unit 12 is reduced. That is, the linear region of the input / output characteristics is limited. Is done. Therefore, in the third embodiment, an automatic gain adjustment circuit corresponding to the saturation of the amplified signal is shown.

  FIG. 13 is a functional block diagram showing the configuration of the automatic gain adjustment circuit according to the third embodiment.

  The automatic gain adjustment circuit shown in FIG. 13 includes a variable gain amplifier 11, an amplitude monitor unit 12, and a division processing / control unit 13.

  The variable gain amplifier 11 includes a gain switching amplifier 111 that changes the gain discretely in N stages according to a selection signal and a fine gain variable gain amplifier 112 that is set with a gain control signal.

  The amplitude monitor unit 12 monitors the amplitude of the output signal (amplified signal) of the variable gain amplifier 11 and outputs it to the division processing / control unit 13 as an amplitude data signal.

When the state control signal is input, the division processing / control unit 13 outputs a monitor start signal to the amplitude monitoring unit 12 to start the amplitude monitoring process. Thereafter, if the amplitude of the amplified signal represented by the amplitude data signal output from the amplitude monitor unit 12 is greater than a predetermined threshold value V _th representing the upper limit of the amplified signal or the linear region of the amplitude monitor unit 12, The gain of the gain switching amplification unit 111 is reduced, and the monitor start signal is output to the amplitude monitor unit 12 again to start the amplitude monitor process. When the amplitude of the amplified signal is equal to or less than the threshold value V _th , the optimum gain is obtained according to the equation (4), and the fine gain variable gain amplifying unit 112 is set to the optimum gain by the gain control signal.

  Next, the operation of the automatic gain adjustment circuit in the third embodiment will be described using signals input to the respective parts of the automatic gain adjustment circuit.

  FIG. 14 is a diagram illustrating a signal input to each unit and processing timing of each unit. When no signal is input to the automatic gain adjustment circuit, it is assumed that the gains of the gain switching amplification unit 111 and the fine adjustment variable gain amplification unit 112 are set to the maximum.

When a signal is input to the variable gain amplifier 11 (FIG. 14A), the variable gain amplifier 11 amplifies the input signal and outputs an amplified signal (FIG. 14B). Here, an example is shown in which an amplified signal having an amplitude larger than the threshold value _Vth is output.

  When a state control signal is input to the division processing / control unit 13 in this state (FIG. 14 (c)), a monitor start signal is output from the division processing / control unit 13 to the amplitude monitoring unit 12 and the amplitude monitoring processing starts. (FIG. 14D). When the amplitude monitoring process is completed, the amplitude monitoring unit 12 outputs an amplitude data signal obtained by detecting the amplitude of the amplified signal to the division processing / control unit 13 (FIG. 14 (e)).

Since the amplitude value of the amplified signal indicated by the amplitude data signal is larger than the threshold value V _th , the division processing / control unit 13 performs a process of decreasing the gain of the gain switching amplification unit 111 by the selection signal in the gain determination process. (FIG. 14 (f)). In the example of FIG. 14, since the amplitude of the amplified signal detected by the first and second amplitude monitoring processes is larger than the threshold value _Vth , the gain of the gain switching amplification unit 111 is decreased in the gain determination process.

When the amplitude of the amplified signal is equal to or less than the threshold value V _th (in FIG. _14D , the third amplitude monitoring process), the fine gain variable gain amplification unit 112 is set based on the amplitude of the amplified signal indicated by the amplitude data signal. An optimum gain is obtained, and a gain control signal corresponding to the optimum gain is output to the fine gain variable gain amplifying unit 112 (FIG. 14 (g)). The optimum gain is obtained by calculating equation (4).

  In the automatic gain adjustment circuit of FIG. 13, the amplitude of the output signal (amplified signal) of the variable gain amplifier 11 is monitored, but the amplitude of the input signal of the variable gain amplifier 11 may be monitored. Further, as shown in FIG. 15, the amplitude of the signal input to the fine adjustment variable gain amplifier 112, that is, the output signal of the gain switching amplifier 111 may be monitored.

<Variation of variable gain amplifier>
FIG. 16 is a functional block diagram illustrating a configuration of an automatic gain adjustment circuit in which the gain switching amplification unit 111 is configured by N fixed gain amplifiers 111-1 to 111-N having different gains.

  The gain switching amplification unit is composed of N fixed gain amplifiers 111-1 to 111-N having different gains, and the amplitude of the output signal of each fixed gain amplifier 111-1 to 111-N is an intermediate amplitude monitoring unit 12-1. Monitor at ~ 12-N each.

  In the division processing / control unit 13, among the amplitude data signals received from the intermediate amplitude monitor units 12-1 to 12-N, the amplitude data signal indicated by the amplitude data signal is optimal using an amplitude data signal having a predetermined threshold V or less. A selection signal is output to the selector 113 so as to select the output signal of the fixed gain amplifiers 111-1 to 111 -N that has output the amplitude data signal used to derive the optimum gain. The fine gain variable gain amplifying unit 112 is set to the optimum gain derived from the gain control signal.

  FIG. 17 is a functional block diagram showing a configuration of still another automatic gain adjustment circuit according to the third embodiment.

  The automatic gain adjustment circuit shown in FIG. 17 includes automatic gain adjustment units 21-1 to 21 -N having N characteristics having variable gain amplifiers 11, amplitude monitor units 12, and division processing / control units 13. In this configuration, output signals and selection signals of the gain adjustment units 21-1 to 21 -N are input to the selector 22. Even in the configuration of FIG. 17, the dynamic range can be widened even when the linear regions of the input / output characteristics of the variable gain amplifier 11 and the amplitude monitor unit 12 of each of the automatic gain adjustment units 21-1 to 21-N are limited.

  In the automatic gain adjustment circuit of FIG. 17, the selector 22 reads the selection signal indicating the amplitude of the maximum output signal among the automatic gain adjustment units 21-1 to 21 -N whose outputs are not saturated, and corresponds to the selection signal. The output signals of the automatic gain adjusters 21-1 to 21-N to be output from the selector 22 as amplified signals.

  In the automatic gain adjustment circuit according to the third embodiment, the state control signal is input from the outside. However, similarly to the first embodiment, the start determination unit 14 is added to determine the state control signal from the amplitude of the input signal. Can also be generated. At this time, in order to cope with the configuration in which only the starting reference amplitude signal is used to start the process for obtaining the optimum gain, or when the amplitude of the amplified signal changes after the optimum gain setting, the starting reference amplitude signal is used. And a reference amplitude signal for return can be used.

  In addition, in the amplitude monitor unit 12 or the intermediate amplitude monitor units 12-1 to 12-N, the amplitude detection circuit 121 and the clear peak hold unit 123 shown in the first embodiment are used.

As described above, according to the present embodiment, the gain switching amplification unit 111 that changes the gain in N stages by the selection signal is provided, and the amplitude of the amplified signal detected by the amplitude monitoring unit 12 is the predetermined threshold value V. _When larger than _th , the gain of the gain switching amplification unit 111 is reduced, and when the amplitude of the amplified signal is equal to or less than a predetermined threshold V _th , the optimum gain set in the fine gain variable gain amplification unit 112 , It is possible to cope with saturation of the amplified signal.

<When the amplitude monitor is not ideal>
In the embodiment shown in FIGS. 1, 3, 5, 7, and 9 for monitoring the amplitude of the amplified signal, the input / output relationship of the amplitude monitor unit, that is, the relationship between the amplitude data signal _Am and the amplified signal _Vout is handled linearly. and has, it is possible to find the optimal gain Gopt from the amplitude data signal even if the relationship between the amplitude data signal a _m and the amplified signal V _out is represented by a straight line which does not pass through the origin. Figure 18 shows an example of the relationship between A _m and V _out of this case. In this example | V _out | is | V _mL | more not to size the A _m is not changed. The characteristics of the diodes and transistors used in the amplitude detection circuit and peak hold circuit of the amplitude monitor unit are not ideal, and this relationship is obtained when biased near the threshold value. Further, considering A _mL lower limit of A _m for that may be included is an offset voltage at the output of the amplitude detection circuit and a peak hold circuit. In gain control, | V _mL | and A _mL are treated as constants.

The relational expression in | V _out |> | V _mL | of the characteristic shown in FIG. 18 represented by a straight line not passing through the origin is as shown in the following expression (8).

Similarly, the relationship between | V _des | and A _des is expressed by the following equation (9).

From the equations (8) and (9), the following equations (10) and (11) can be derived.

Substituting Expression (10) and Expression (11) into Expression (1) using | V _out | = G _o | V _in |, the following Expression (12) is obtained.

Except A _m in equation (12) | V _in | for a constant that does not change in, as long obtained A _m the amplitude monitor unit is represented by a straight line relationship between the input and output of the amplitude monitor unit does not pass through the origin Even in this case, the optimum gain G _opt can be obtained. Calculation of the equation (12) may be performed using a division operation can be computer, but since the G _opt and A _m is a one-to-one correspondence, obtains a correspondence table in advance G _opt and A _m, wherein (12) the calculation of the may be calculated G _opt from performed a _m by this index.

In the case of monitoring the amplitude of the input signal shown in FIG. 12, Equation (8) is as follows.

The following equation (14) can be derived from the equation (13).

Substituting Equation (14) and Equation (11) into Equation (1) yields Equation (15) below.

In this case other than A _m is | V _in | because it is the unchanged constant, optimum gain G _opt is obtained as long obtained A _m the amplitude monitor unit. Calculation of the equation (15) may be performed using a division operation can be computer, but since the G _opt and A _m is a one-to-one correspondence, obtains a correspondence table in advance G _opt and A _m, wherein (15) the calculation of the may be calculated G _opt from performed a _m by this index.

DESCRIPTION OF SYMBOLS 11 ... Variable gain amplifier 111 ... Gain switching amplification part 111-1 to 111-N ... Fixed gain amplifier 112 ... Fine adjustment variable gain amplification part 113 ... Selector 12 ... Amplitude monitoring part 121 ... Amplitude detection circuit 122 ... Digital conversion and timing Control unit 123: Peak hold unit with clear 124 ... Differential output buffer unit 12-1 to 12-N ... Intermediate amplitude monitor unit 13 ... Division processing / control unit 131 ... Division processing unit 132 ... Gain control / signal generation unit 14 ... Start determination unit 141 ... comparison unit 142 ... determination logic processing unit 143 ... low pass filter 144,145 ... comparison unit 21-1 to 21-N ... automatic gain adjustment unit 22 ... selector 101 ... variable gain amplifier 102 ... amplitude detection circuit 103: Comparison circuit 104: Adjustment circuit

Claims (7)

Variable gain amplification means for outputting an output signal obtained by amplifying an input signal with a set gain;
An amplitude monitor unit for outputting an amplitude monitor signal A _m by detecting the, | V _out | amplitude of the output signal when setting the variable gain amplifying means to a gain G _o
The amplitude monitor signal _Am and the amplitude monitor signal A _des corresponding to the amplitude of the desired output signal obtained in advance and the gain _Go

(However, A _mL represents the lower limit of the amplitude monitor signal, | V _mL | represents the lower limit of the amplitude of the output signal, and k = (A _m −A _mL ) / (| V _out | − | V _mL |)) A gain setting means for substituting in any of the above to obtain an optimum gain and set the variable gain amplifying means;
An automatic gain adjustment circuit comprising: Variable gain amplification means for outputting an output signal obtained by amplifying an input signal with a set gain;
An amplitude monitor unit for outputting an amplitude monitor signal A _m by detecting the, | V _in | amplitude of the input signal input to the variable gain amplifying means
The amplitude monitor signal _Am and the amplitude monitor signal A _des corresponding to the desired amplitude of the output signal obtained in advance

(However, A _mL represents the lower limit of the amplitude monitor signal, | V _mL | represents the lower limit of the amplitude of the output signal, and k = (A _m −A _mL ) / (| V _in | − | V _mL |)) A gain setting means for substituting in any of the above to obtain an optimum gain and set the variable gain amplifying means;
An automatic gain adjustment circuit comprising: Gain switching amplification means for amplifying the input signal by setting the gain stepwise in the previous stage of the variable gain amplification means,
3. The automatic gain adjustment circuit according to claim 1, wherein the gain setting means switches the gain of the gain switching amplification means when the amplitude detected by the amplitude monitoring means is larger than a predetermined threshold value. .   4. The automatic gain adjustment circuit according to claim 3, wherein the gain switching amplification means includes a plurality of fixed gain amplifiers having different gains and a selector for selecting one from output signals of the plurality of fixed gain amplifiers. A plurality of automatic gain adjustment circuits according to claim 1 or 2,
A selector that selects one of the output signals of the plurality of automatic gain adjustment circuits, the maximum output signal among the output signals that are not saturated;
An automatic gain adjustment circuit comprising:   A start determination for comparing the amplitude of the output signal detected by the amplitude monitor means with a reference amplitude signal and causing the gain setting means to obtain an optimum gain when the amplitude of the output signal is greater than the reference amplitude signal 6. The automatic gain adjustment circuit according to claim 1, further comprising means.   The automatic gain adjustment circuit according to claim 1, wherein the amplitude monitor means includes a peak hold circuit that holds a peak value of an input signal and outputs a peak value signal.

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