CN209249081U - A kind of eMMC host controller and eMMC control system - Google Patents

Abstract

The present disclosure proposes a kind of eMMC host controller and eMMC control systems, in host controller, individual order access is set, order access includes direct command channel and caching queue command channel, in such a way that state of a control machine is mixed in direct command channel and caching queue command channel, command portion is eliminated to the occupancy of external Installed System Memory, the function of CQE is realized inside master controller simultaneously, it saves Installed System Memory and is easily achieved hardware design under the premise of assurance function, the sphere of action of software and hardware is divided in host side, and give the control processing of data to hardware components to handle as far as possible more, to share the processing task of CPU.

Description

A kind of eMMC host controller and eMMC control system

Technical field

This disclosure relates to which embedded multi-media card controls correlative technology field, in particular to a kind of eMMC host Controller and eMMC control system.

Background technique

The statement of this part only there is provided background technical information relevant to the disclosure, not necessarily constitutes first skill Art.

Multimedia card (MMC) is according to the certain types of flash memory cards being defined using standard, eMMC (Embedded Multi Media Card) it is embedded multi-media card, eMMC (Embedded Multi Media Card) is that MMC association orders It stands, mainly for the embedded memory standard specification of the products such as mobile phone or tablet computer, is defined according to using standard It is embedded in or is inserted into the device memory that the electronic equipments such as host equipment such as mobile phone or plate use.EMMC agreement is MMC association The embedded memory standard agreement mainly for mobile device that can be formulated, is locally deposited using very extensive mobile device Solution is stored up, the design of mobile device memory is greatly simplified.Embedded multi-media card eMMC configuration in use, EMMC is inserted into (or " being embedded into ") into mobile host equipments such as such as smart phones, and eMMC is set by bus and connected host Standby transmission data-signal, control signal, order, clock and/or power supply signal.

With the development of science and technology mobile device constantly updates, read-write of the mobile device for in-memory data The requirement of rate is in the continuous improvement.But since some time, before eMMC controller is written from host side in data and read It after eMMC controller is handled and is controlled by software.With the increase of data transmission bauds, the system resource of host side It can largely be occupied by the reading and writing data of eMMC.

For above situation, eMMC5.1 agreement gives some design specifications and guideline, by host controller The outer mode for increasing command queue's engine (Command Queueing Engine, abbreviation CQE) solves the above problems. As shown in Fig. 2, CQE is responsible for interface and data transmission between managing main frame software and multimedia storage card eMMC.CQE passes through Task descriptor list (TDL) and a doorbell register in system memory is stored to obtain task from software.To reality Existing above-mentioned function, it is necessary first to have one piece of biggish memory in host, the TDL in memory by 32 fixed sizes slot group At, and each slot be by a task descriptor and a transmission set of descriptors at.Task descriptor mainly includes to need to send To the command information of multimedia storage card eMMC, transmits descriptor and mainly provide the position for needing the data transmitted.Doorbell deposit Device is then by the state response of each slot to CQE.It can be seen that although the design guidance function that eMMC5.1 agreement provides is very perfect, But need to occupy more on piece storage resource, while the complexity designed is very big.

Utility model content

The disclosure to solve the above-mentioned problems, proposes a kind of eMMC host controller and eMMC control system, in host Individual order access is arranged in controller, and order access includes direct command channel and caching queue command channel, by direct The mode of state of a control machine is mixed in command channel and caching queue command channel, eliminates command portion to external Installed System Memory It occupies, while the function of CQE being realized inside master controller, save Installed System Memory and make under the premise of assurance function and is hard Part design is easily achieved, and divides the sphere of action of software and hardware in host side, and as far as possible give the control processing of data more Hardware components are handled, to share the processing task of CPU.

To achieve the goals above, the disclosure adopts the following technical scheme that

A kind of multimedia storage card eMMC host controller, for realizing host side and the data of eMMC, order or/and sound The transmission of induction signal, including command response channel and data transmission channel, command response channel include bus interface, control unit Module and response synchronous control unit and command synchronization control unit, the bus interface, control unit module and command synchronization The transmission that control unit is sequentially connected for realizing order, the bus interface, control unit module and response synchronously control list The transmission that member is sequentially connected for realizing response, the bus interface are connect with bus, and the command response channel and data pass Defeated channel will be connect by physical layer interface with multimedia storage card eMMC；

Described control unit module includes order access and state of a control machine interconnected, and the order access includes straight Command channel and caching command channel are connect, two channels of the order access are connect with command synchronization control unit respectively；Institute Transmission of the direct command channel for direct command is stated, cache command channel is used for transmission the order in addition to direct command.This The open mentality of designing provided using eMMC5.1 agreement is different from, is added inside host controller with direct command channel all the way The mode of host state machine is mixed in buffer queue command channel all the way, eliminates command portion to the occupancy of external Installed System Memory, together When the function of CQE is realized inside master controller.It saves Installed System Memory and makes hardware design under the premise of assurance function It is easily achieved.

Compared with prior art, the disclosure has the beneficial effect that

(1) for the disclosure by the way that individual order access is arranged in host controller, order access includes direct command channel It is saved in such a way that state of a control machine is mixed in direct command channel and caching queue command channel with caching queue command channel It has gone command portion to the occupancy of external Installed System Memory, while the function of CQE having been realized inside master controller, saved system Memory is simultaneously easily achieved hardware design under the premise of assurance function, divides the sphere of action of software and hardware in host side, And give the control processing of data to hardware components to handle, to share the processing task of CPU as far as possible more.

(2) disclosure greatly reduces design under the premise of assurance function and performance by double command channels mode Complexity reduces the realization difficulty of eMMC host controller.

(3) disclosure buffer queue command channel adds the structure of FIFO using register group, instead of traditional Installed System Memory Command description accords with mode, reduces the occupancy of Installed System Memory.

(4) disclosure gives the total solution of eMMC host controller, to host undefined in eMMC agreement The realization of end part has instructs reference well.

Detailed description of the invention

The accompanying drawings constituting a part of this application is used to provide further understanding of the present application, and the application's shows Meaning property embodiment and its explanation do not constitute the restriction to the application for explaining the application.

Fig. 1 is the block diagram according to the eMMC control system 100 of one or more embodiments；

Fig. 2 is that eMMC control system data transmission eMMC5.1 Protocol Design instructs block diagram；

Fig. 3 is 310 structural schematic diagram of embodiment of the present disclosure eMMC host controller；

Fig. 4 is the structural schematic diagram of embodiment of the present disclosure control unit module 311；

Fig. 5 is the state transition diagram of the state of a control machine of the embodiment of the present disclosure；

Wherein: 100, eMMC control system, 200, multimedia storage card eMMC, 210, multimedia storage card eMMC control Device, 220, flash memory, 300, host side, 310, host controller, 311, control unit module, 311.1, direct command it is logical Road, 311.2, cache command channel, 311.3, command analysis module, 311.4, response contrast module, 311.5, state of a control machine, 311.6, status register.

Specific embodiment:

The disclosure is described further with embodiment with reference to the accompanying drawing.

It is noted that described further below be all exemplary, it is intended to provide further instruction to the application.Unless another It indicates, all technical and scientific terms used herein has usual with the application person of an ordinary skill in the technical field The identical meanings of understanding.

It should be noted that term used herein above is merely to describe specific embodiment, and be not intended to restricted root According to the illustrative embodiments of the application.As used herein, unless the context clearly indicates otherwise, otherwise singular Also it is intended to include plural form, additionally, it should be understood that, when in the present specification using term "comprising" and/or " packet Include " when, indicate existing characteristics, step, operation, device, component and/or their combination.It should be noted that not conflicting In the case where, the feature in embodiment and embodiment in the disclosure can be combined with each other.Below in conjunction with attached drawing to embodiment It is described in detail.

Fig. 1 is the block diagram of the eMMC control system 100 of some embodiments of the disclosure, and eMMC control system 100 includes master Generator terminal 300 and from generator terminal 200, it is described from generator terminal be slave devices, can be with multimedia storage card eMMC200.Multimedia storage card EMMC200 may include multimedia storage card eMMC controller 210 interconnected and flash memory 220, multimedia storage Card eMMC200 receives the data or/and order transmission of host side 300, multimedia by multimedia storage card eMMC controller 210 The control of storage card eMMC controller 210 according to the order of host side 300 writes data into flash memory 220 or from flash memory Data are read in reservoir 220.

Host side 300 is the equipment for being capable of handling data, and the equipment for being capable of handling data can be central processing list First CPU, processor, microprocessor any of them.Host side 300 is constituted after connecting with multimedia storage card eMMC200 EMMC control system 100 can be set in electronic equipment, and storing and transmitting for data is realized in electronic equipment.Electronic equipment It may include arbitrary equipment in the prior art, can be personal computer, mobile phone, tablet computer, audio & video equipment (as imaged Machine, camera and recorder etc.), game terminal, player, navigation equipment etc..

In the technical solution disclosed in one or more embodiments, as shown in figure 3, a kind of multimedia storage card eMMC Host controller 310, for realizing data, order or/and the transmission of response signal of host side 300 and eMMC200, including life Enable response channel, data transmission channel and physical layer interface, command response channel include bus interface, control unit module 311, Synchronous control unit and command synchronization control unit are responded, the bus interface, control unit module 311 and command synchronization control The transmission that unit is sequentially connected for realizing order, the bus interface, control unit module 311 and response synchronous control unit It is sequentially connected the transmission for realizing response, the bus interface is connect with system bus, the command response channel and data Transmission channel will be connect by physical layer interface with multimedia storage card eMMC200；The response of transmission and the order of data is adopted It carrying out with different channels, command response channel parallel transmission order, reduces the waiting time while realizing data transmission, Improve the efficiency of transmission.

The transmission of transmission and the order of data can be transmitted by different buses respectively, the host control of the present embodiment The bus interface of device 310 processed may include AHB and AXI two systems bus interface, be respectively used to the transmission and data of order Transmission.The transmission of data can be transmitted by AXI bus, and the transmission of order can be transmitted by ahb bus.To master 310 related register of machine controller is configured and read and sends commands to multimedia storage card eMMC200 can be from Ahb bus enters.Command information is sent to command synchronization control after control unit module 311 (Control Unit) processing Unit (CMD CTRL) does synchronization, is then given to physical layer (PHY) and is sent to multimedia storage card eMMC200 (eMMC device).Response is received from multimedia storage card eMMC200 again, enters response synchronous control unit (RESP by physical layer CTRL) synchronous, it then gives back to control unit and compares or be supplied to software.

The specific hardware structure of response synchronous control unit may include: that single bit data synchronization module, response length are sentenced Disconnected state machine and 7 bit cyclic redundancy check modules (CRC-7), the single bit data synchronization module, response length judge shape State machine and 7 bit cyclic redundancy check modules (CRC-7) are sequentially connected.Command synchronization control unit specific hardware structure can wrap It includes: single bit data synchronization module and 7 bit cyclic redundancy check modules (CRC-7), the single bit data synchronization module and 7 Bit cyclic redundancy check module (CRC-7) connection.Response synchronous control unit and command synchronization control unit are each responsible for ringing It should and cyclic redundancy check synchronous with order.

Data transmission channel may include sequentially connected bus interface, read DCU data control unit, write DCU data control unit And physical layer interface.Write-in multimedia storage card eMMC200 can be directly from the data that multimedia storage card eMMC200 is read Connected AXI bus transfer.The control of data transmission is mainly band data transmission in 311 pairs of order accesses of control unit module The parsing of order carry out.Read DCU data control unit, write DCU data control unit receive respectively control unit module 311 transmission Data transmission information, control data and physical interface be transmitted to by bus interface, sent data to by physical interface more Media storage card eMMC200.The Data Transmission Controlling information may include the type of data transmission, read the address of data and write Enter the address of data and the action signal of data transmission.The type of data transmission may include writing data and reading data, data The action signal of transmission can be defined as the rising edge of clock signal.

As shown in figure 4, the present embodiment control unit module 311 includes order access interconnected and state of a control machine 311.5, the order access include direct command channel 311.1 and caching command channel 311.2, two of the order access Channel is connect with command synchronization control unit respectively；The direct command channel 311.1 is used for the transmission of direct command, caching life Channel 311.2 is enabled to be used for transmission the order in addition to direct command.The direct command is the order that need to be immediately performed, including but It is not limited to order, multimedia storage card eMMC state reading order and the stopping data transmission of initialization multimedia storage card eMMC Order.Preferential execution is needed for the order being immediately performed, the order for withouting waiting for front has executed to be executed again, for example, In normal reading and writing data order implementation procedure, system needs to read the state of equipment, which can directly " jumping the queue " pass through Order is directly transmitted and is executed by direct command channel 311.1 by direct command, directly reads the operating status of slave devices.

The present embodiment is provided with two command channels, and the quantity of command channel can be configured according to the classification of order, The present embodiment can be realized as the transmission of order by the way that two command channels are arranged, while hardware setting is simple, easy to operate.

Specifically, two channels of the order access are single with command synchronization control after being handled by state of a control machine 311.5 Member connection；The direct command channel 311.1 is used for the transmission of direct command, can only transmit an order every time；Cache command Channel is cached in the synchronization fifo in caching channel, is sent out one by one according to the sequencing of order with a plurality of order is once sent It send.If having order to transmit in two channels, state of a control machine 311.5 preferentially sends the life in direct command channel 311.1 It enables, judges to determine to send next command again after waiting Wait Orders to be transmitted.Order in two channels, which can be transmitted, to be had Order with data transmission or/and the order for having response.

In some embodiments of the disclosure, direct command channel 311.1 and caching command channel 311.2 can be by setting It sets register and builds corresponding order transmission channel.Mainly the transmission of order needs continuous read in transmission process With write-in or continuous confirmation respective response state, the processing load of processor is aggravated, it is right by the way that dedicated order access is arranged It is directly transmitted in direct command, the caching of caching after being read by directly high-volume for the order for not needing to be immediately performed Command channel 311.2 executes one by one again, releases the memory headroom of system.By real in the hardware access for caching bright channel That now orders executes the circulation execution for not needing software one by one, alleviates the data processing load of the CPU of host side.

Direct command channel 311.1 may include direct command byte count register, direct command parameter register and Direct command controls register.A kind of implementation of direct command transmission is realized in direct command channel 311.1, the present embodiment 311.1 3, direct command channel register stores an instruction cluster, under could sending after the current command is sent completely One instruction cluster.Numerical value in direct command byte count register is to be mainly used for non-data block biography as unit of byte The transmission of defeated or small data quantity, the register configuration is full 0 when eMMC opens read-write.Direct command parameter register is used to connect The command parameter of the eMMC from software is received, command parameter not will be dealt with, and meeting direct splicing is sent to multimedia into order Storage card eMMC200.The information that direct command controls in register mainly includes command type, and whether order needs data to pass It is defeated, data transfer direction, if having command response, the length etc. of response.These information are that jumping for state of a control machine 311.5 mentions For foundation, while data controlling signal can be generated.Direct command instructs cluster as shown in table 1.

1 direct command of table instructs cluster

The present embodiment cache command channel 311.2 may include cache command parameter register, cache command control deposit Device, cache command response register, cache command response bit mask register and synchronization fifo.Using register group plus FIFO Mode, the order that the needs in system are sent can be with Batch sending to cache command channel 311.2, in cache command channel It caches and is transmitted in 311.2, accord with mode instead of traditional Installed System Memory command description, reduce the occupancy of Installed System Memory.

Realize the implementation of order transmission for each write buffer command response bit mask deposit in cache command channel 311.2 While device, four registers can be spliced into 128 data write-ins synchronization fifo (First Input First Output) to realize caching.It is slow It deposits order cluster and writes four registers in sequentially last write buffer command response bit mask register.Cache command parameter register Effect it is similar with direct command parameter register, for receiving the command parameter of the eMMC from software, command parameter will not Processed, meeting direct splicing is sent to multimedia storage card eMMC200 into order.Cache command controls the 16 high of register It is used to store the block number of data transmission, each data block is 512 bytes.The register is 16 high when eMMC opens read-write It needs to be configured to 0 entirely.Low 16 effects that cache command controls register are similar with direct command control register, and information is main Including command type, whether order needs data to transmit, data transfer direction, if having command response, the length etc. of response.It is slow Command response register is deposited mainly for the order that response is transmitted and had with data, cache command response register is soft for receiving Then the correct response without exception that part provides cooperates cache command response bit mask register to come and multimedia storage card The response that eMMC200 is returned compares, if having abnormal with regard to reporting interruption.Cache command instructs cluster can be as shown in table 2.

2 cache command of table instructs cluster

Control unit module 311 further includes command analysis module 311.3, and the command analysis module 311.3 is for parsing Command information, command analysis module 311.3 connect the control information sent for providing order with state of a control machine 311.5.Control Unit module 311 processed further include response contrast module 311.4, the response contrast module 311.4 respectively with respond synchronously control Unit and caching command channel 311.2 connect.

Order that send by different channel realized in a manner of the register for writing different address by ahb bus.Two A channel can send order simultaneously, and it is by control shape that multimedia storage card eMMC200 is first issued in the order in which specific channel State machine 311.5 (Control FSM) controls.Direct command channel 311.1 is defined respectively and caches posting for command channel 311.2 Storage address；Before sending command information, the address information of the order transmission channel, the address letter are written according to command type Breath is the register address in direct command channel 311.1 or the register address in cache command channel 311.2；Believed according to address Corresponding order is sent to corresponding command channel by breath.

The control transfer figure of state of a control machine 311.5 is as shown in Figure 5.State of a control machine 311.5 is in host controller 310 The core control logic of command channel, specific control process can be such that state of a control machine 311.5 can be according to current hosts The transmission state of controller 310 carrys out reading order from one in two channels, then allows command analysis module 311.3 (Command Analysis) 311.3 parses command information, then determines when send information.If order has response pair Than information, the comparison of hardware internal response is supported in the order in cache command channel 311.2, then receives the current command of eMMC return Response after, response can enter response contrast module 311.4 (Response Contrast) 311.4 and cache command channel The correct response that order carries in 311.2 compares, and comparing result is reflected to the status register of host controller 310 311.6.If information of the order with data transmission, command analysis module 311.3 can generate data control information and be given to data Access, with determination data be read or write, data transmission number etc., and can according to data path return information feed back to control State machine 311.5 and status register 311.6 processed.State of a control machine 311.5 allows direct command logical in data transmission procedure Road 311.1 sends data and terminates order or multimedia storage card eMMC state reading order.It is ordered if terminating, then state machine Idle state can be jumped to, if read states order, state machine can return to data transmission state after sending read states order.

The foregoing is merely preferred embodiment of the present application, are not intended to limit this application, for the skill of this field For art personnel, various changes and changes are possible in this application.Within the spirit and principles of this application, made any to repair Change, equivalent replacement, improvement etc., should be included within the scope of protection of this application.

Although above-mentioned be described in conjunction with specific embodiment of the attached drawing to the disclosure, model not is protected to the disclosure The limitation enclosed, those skilled in the art should understand that, on the basis of the technical solution of the disclosure, those skilled in the art are not Need to make the creative labor the various modifications or changes that can be made still within the protection scope of the disclosure.

Claims (7)

1. a kind of multimedia storage card eMMC host controller, for realizing host side and the data of eMMC, order or/and response The transmission of signal, it is characterized in that: include command response channel and data transmission channel, command response channel include bus interface, Control unit module and response synchronous control unit and command synchronization control unit, the bus interface, control unit module with The transmission that command synchronization control unit is sequentially connected for realizing order, the bus interface, control unit module and response are same Step control unit is sequentially connected the transmission for realizing response, and the bus interface is connect with bus, the command response channel It will be connect by physical layer interface with multimedia storage card eMMC with data transmission channel；

Described control unit module includes order access and state of a control machine interconnected, and the order access includes directly ordering Channel and caching command channel are enabled, two channels of the order access are connect with command synchronization control unit respectively；It is described straight Transmission of the command channel for direct command is connect, cache command channel is used for transmission the order in addition to direct command.

2. a kind of multimedia storage card eMMC host controller as described in claim 1, it is characterized in that: the direct command is logical Road includes direct command byte count register, direct command parameter register and direct command control register.

3. a kind of multimedia storage card eMMC host controller as described in claim 1, it is characterized in that: the cache command is logical Road includes cache command parameter register, cache command control register, cache command response register, cache command response bit Mask register and synchronous fifo.

4. a kind of multimedia storage card eMMC host controller as described in claim 1, it is characterized in that: the direct command is The order that need to be immediately performed, the including but not limited to order of initialization multimedia storage card eMMC, multimedia storage card eMMC shape State reading order and the order for stopping data transmission.

5. a kind of multimedia storage card eMMC host controller as described in claim 1, it is characterized in that: described control unit mould Block further includes command analysis module, and the command analysis module is used for resolve command information, command analysis module and state of a control The control information that machine connection is sent for providing order.

6. a kind of multimedia storage card eMMC host controller as described in claim 1, it is characterized in that: described control unit mould Block further includes response contrast module, and the response contrast module connects with response synchronous control unit and caching command channel respectively It connects.

7. a kind of eMMC control system, it is characterized in that: the host side setting is weighed including host side interconnected and from generator terminal Benefit requires a kind of described in any item multimedia storage card eMMC host controllers of 1-6, described to store from generator terminal setting multimedia Block eMMC, eMMC host controller is connect with multimedia storage card eMMC.