CN207039447U - Fault detection circuit - Google Patents
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- CN207039447U CN207039447U CN201720946850.XU CN201720946850U CN207039447U CN 207039447 U CN207039447 U CN 207039447U CN 201720946850 U CN201720946850 U CN 201720946850U CN 207039447 U CN207039447 U CN 207039447U
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- 238000001514 detection method Methods 0.000 title claims abstract description 90
- 238000012360 testing method Methods 0.000 claims abstract description 53
- 239000004065 semiconductor Substances 0.000 claims abstract description 28
- 238000004891 communication Methods 0.000 claims description 7
- 238000012937 correction Methods 0.000 claims description 2
- 208000033999 Device damage Diseases 0.000 abstract description 2
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- 238000010586 diagram Methods 0.000 description 5
- 230000008878 coupling Effects 0.000 description 3
- 238000010168 coupling process Methods 0.000 description 3
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- 239000003990 capacitor Substances 0.000 description 2
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- 238000012986 modification Methods 0.000 description 2
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
The utility model discloses a fault detection circuit. Wherein, this fault detection circuit includes: a fault detection object, a test element and a switch unit connected in series with the fault detection object, and a main chip connected with the test element; and under the condition that the current flowing through the test element in the preset time period is greater than the first preset value, the main chip controls the switch unit to be switched off. The utility model provides a because the power semiconductor device damages the technical problem that the product that causes can't continue to use.
Description
Technical Field
The utility model relates to a circuit fault detection field particularly, relates to a fault detection circuit.
Background
The PFC (Power Factor Correction) circuit has functions of improving a Power Factor and raising a bus voltage, and has a structure as shown in fig. 1, in which AC-L, N respectively represent a live line and a zero line of a single-phase alternating current, D1 to D4 are rectifier diodes, C1 is a bus capacitor, and L is a PFC inductor. The basic principle of the PFC circuit is that the inductor L is charged and discharged by controlling the on-off time ratio of the power semiconductor device Q1, so that the bus voltage is increased.
However, the power semiconductor device Q1 is vulnerable, and when the power semiconductor device Q1 is damaged (for example, short-circuited), the product cannot be used continuously, and a new module needs to be replaced.
In view of the above problems, no effective solution has been proposed.
SUMMERY OF THE UTILITY MODEL
An embodiment of the utility model provides a fault detection circuit to solve at least because the power semiconductor device damages the technical problem that the product that causes can't continue to use.
According to an aspect of the embodiments of the present invention, there is provided a fault detection circuit, including a fault detection object, a test element and a switch unit connected in series with the fault detection object, and a main chip connected to the test element; and under the condition that the current flowing through the test element in a preset time period is greater than a first preset value, the main chip controls the switch unit to be switched off.
Optionally, the fault detection circuit is a PFC circuit.
Optionally, when the current flowing through the test element in the preset time period is a second preset value, the main chip adjusts that the bus voltage protection value is smaller than a preset voltage protection value, and does not output a shutdown instruction.
Optionally, when the currents flowing through the test elements in the preset time period are all greater than the first preset value, the main chip outputs first fault information, where the first fault information is used to indicate that the fault detection object is short-circuited; and under the condition that the current flowing through the test element in the preset time period is a second preset value, the main chip outputs second fault information, and the second fault information is used for indicating that the fault detection object is broken.
Optionally, the switch unit includes at least one of: normally closed contacts of the relay and fuse wires.
Optionally, the main chip includes a driving chip and a main control chip connected to the driving chip; the driving chip transmits a short-circuit fault identifier or a broken-circuit fault identifier to the main control chip, and the main control chip converts the short-circuit fault identifier into the first fault information or converts the short-circuit fault identifier into the second fault information.
Optionally, the fault detection circuit further comprises: and the inner machine display board is connected with the driving chip and is used for displaying the first fault information or the second fault information.
Optionally, the fault detection circuit further comprises: and a communication circuit arranged between the drive chip and the inner machine display panel and used for transmitting the first fault information or the second fault information.
Optionally, the input terminal of the switch unit is connected to the bus bar, and the output terminal of the test element is grounded.
Optionally, the fault detection object includes a power semiconductor device, and the test element includes at least one of: resistance and an ammeter.
The embodiment of the utility model provides an, including the fault detection object, test element and the switch unit of being connected in series with the fault detection object, the main chip of being connected with test element; the main chip controls the switch unit to be switched off under the condition that currents flowing through the test element in a preset time period are all larger than a first preset value, whether a fault detection object has a short-circuit fault or not is determined by detecting the currents flowing through the test element, and the switch unit is switched off under the condition that the short-circuit fault occurs, so that a product works under the state of no fault detection object, the purpose that the product can be continuously used even if the fault detection object damages the product is achieved, the technical effect of improving the product performance is achieved, and the technical problem that the product cannot be continuously used due to the fact that a power semiconductor device is damaged is solved.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the invention and together with the description serve to explain the invention without undue limitation to the invention. In the drawings:
fig. 1 is a schematic diagram of a PFC circuit according to the prior art;
fig. 2 is a schematic flow diagram of an alternative fault detection method according to an embodiment of the present invention;
fig. 3 is a schematic flow diagram of another alternative fault detection method according to an embodiment of the present invention;
fig. 4 is a schematic diagram of an alternative fault detection circuit according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of another alternative fault detection circuit according to an embodiment of the present invention.
Detailed Description
In order to make the technical solution of the present invention better understood, the technical solution of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts shall belong to the protection scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
Example 1
In accordance with an embodiment of the present invention, there is provided a method embodiment of a fault detection method, it should be noted that the steps illustrated in the flowchart of the accompanying drawings may be performed in a computer system such as a set of computer executable instructions, and that while a logical order is illustrated in the flowchart, in some cases the steps illustrated or described may be performed in an order different than that presented herein.
Fig. 2 is a fault detection method according to an embodiment of the present invention, as shown in fig. 2, the method includes the following steps:
in step S102, a current flowing through the test element is detected.
In step S102, the test element is connected in series with the fault detection object, and the current flowing through the test element is detected to determine whether the fault detection object is damaged (for example, short circuit or open circuit), the current flowing through the test element is large when a short circuit fault occurs, and the current flowing through the test element is zero when an open circuit fault occurs.
Optionally, the test element may comprise at least one of: a resistor and an ammeter; the fault detection object may include a power semiconductor device.
It should be noted that the fault detection method of the present embodiment can be applied to a PFC circuit.
And step S104, if the currents detected in the preset time period are all larger than the first preset value, controlling the switch unit connected with the fault detection object in series to be disconnected.
In the above step S104 of the present embodiment, when it is detected that the value of the current flowing through the test element is large (larger than the first preset value) within the preset time period, the switch unit may be controlled to be turned off, so that the fault detection object is separated from the circuit, wherein the switch unit is connected in series with the fault detection object.
In this embodiment, the switch unit includes at least one of: normally closed contacts of the relay and fuse wires.
As an alternative implementation, in the case where the switching unit is a normally closed contact of a relay, controlling the switching unit connected in series with the fault detection object to be turned off includes: and controlling the coil of the relay to be electrified so as to open the normally closed contact of the relay, namely if a large current value (larger than a first preset value) flowing through the test element is detected in a preset time period (for example, a plurality of continuous PFC cycles), changing the level of a relevant I/O (input/output) port, electrifying the coil of the relay, and opening the normally closed contact of the relay.
And step S106, outputting the first fault information.
In the above step S106 of this embodiment, the first failure information is used to indicate that the failure detection object is short-circuited. When the current flowing through the test element is detected to be larger than a first preset value in a preset time period (for example, a plurality of continuous PFC cycles), the short-circuit fault of the fault detection object is indicated, and first fault information is output and used for indicating the short circuit of the fault detection object. Meanwhile, a corresponding fault code can be displayed on the internal display board to remind a user that a circuit possibly fails, the fault code should be fed back to after-sales personnel in time to replace the module in time, but a shutdown instruction cannot be sent out, and the product can continue to work.
Optionally, if the detected currents are all the second preset values within the preset time period, outputting second fault information, where the second fault information is used to indicate that the fault detection object is open-circuited.
When the current of the test element is detected to be a second preset value (for example, zero) within a preset time period (for example, several continuous PFC cycles), the fault detection object is indicated to have an open-circuit fault, and second fault information is output. Meanwhile, a corresponding fault code can be displayed on the internal display board to remind a user that a circuit possibly fails, the fault code should be fed back to after-sales personnel in time, the module is replaced in time, a shutdown instruction cannot be sent, and the product continues to work.
Through the steps, whether the fault detection object has the short-circuit fault or not can be determined by detecting the current flowing through the test element, and the switch unit is disconnected under the condition that the short-circuit fault occurs, so that the product works under the state of no fault detection object, the aim of continuously using the product even if the fault detection object damages the product is achieved, the technical effect of improving the product performance is achieved, and the technical problem that the product cannot be continuously used due to the damage of the power semiconductor device is solved.
As an optional implementation manner, in the case that the fault detection object is short-circuited or open-circuited, the method further includes: and adjusting the bus voltage protection value to be smaller than the preset voltage protection value.
Because the PFC circuit has the function of boosting, when the PFC circuit is normal, the bus voltage is kept constant under a certain voltage. Once the PFC circuit breaks down, the direct current bus voltage is uncontrolled, the magnitude of the direct current bus voltage is only related to the peak value of the input alternating current voltage, so that the bus voltage is bound to be reduced, and at the moment, if the original preset voltage protection value is still adopted, the product can not work, so that the bus voltage protection value can be modified, particularly the low-voltage protection value, and the normal work can be guaranteed when the power grid voltage fluctuates. When no PFC circuit exists, the voltage value of the direct current bus is the peak value of the alternating current voltage, the bus voltage protection value is changed correspondingly, the bus voltage protection value can be adjusted to be smaller than the preset voltage protection value (for example, the bus voltage protection value is adjusted to be 30V-50V smaller than the preset voltage protection value), and the product can still be normally used when the power grid fluctuates.
As an optional implementation manner, in the case that the fault detection object is short-circuited or open-circuited, the method further includes: no shutdown command is sent to the drive circuit.
For better experience of a user, under the condition that a fault detection object is detected to be short-circuited or disconnected, a corresponding fault code can be transmitted to an inner machine display panel through a communication circuit, the fault code only reminds a user circuit of being out of order and timely applies for replacement of a module after sale, a shutdown instruction cannot be sent to a driving circuit, and the product can still be used.
As shown in fig. 3, taking an example that a fault detection object is a power semiconductor and a test element is a resistor, the fault detection method of the embodiment includes:
and a, starting.
And b, judging whether the power semiconductor device is damaged or not.
In the above step b of this embodiment, a resistor and a normally closed relay contact connected in series with the power semiconductor device are added to the circuit. By detecting the current flowing through the resistor, it is determined whether the power semiconductor device is broken (i.e., short-circuited or open-circuited). If the power semiconductor device is judged to be damaged, executing the step c; if not, executing the step e.
And c, controlling the normally closed contact of the relay to be opened, and outputting first fault information.
In step c of this embodiment, if it is detected that the currents flowing through the resistors are all greater than a first preset value within a preset time period, the normally closed contact of the relay is controlled to be disconnected, and first fault information is output, where the first fault information is used to indicate that the power semiconductor device is short-circuited; and if the current flowing through the resistor is detected to be zero in the preset time period, outputting second fault information, wherein the second fault information is used for indicating the power semiconductor device to be disconnected.
And d, modifying the bus voltage protection value, and displaying a fault code on a display panel.
In step d, the bus voltage protection value is adjusted to be smaller than the preset voltage protection value. Because the PFC circuit has the function of boosting, when the PFC circuit is normal, the bus voltage is kept constant under a certain voltage. Once the PFC circuit breaks down, the direct current bus voltage is uncontrolled, the magnitude of the direct current bus voltage is only related to the peak value of the input alternating current voltage, so that the bus voltage is bound to be reduced, and at the moment, if the original preset voltage protection value is still adopted, the product can not work, so that the bus voltage protection value can be modified, particularly the low-voltage protection value, and the normal work can be guaranteed when the power grid voltage fluctuates. When no PFC circuit exists, the voltage value of the direct current bus is the peak value of the alternating current voltage, the bus voltage protection value is changed correspondingly, the bus voltage protection value can be adjusted to be smaller than the preset voltage protection value (for example, the bus voltage protection value is adjusted to be 30V-50V smaller than the preset voltage protection value), and the product can still be normally used when the power grid fluctuates.
And e, ending the step.
In the embodiment, the normally closed relay contact is added to be connected with the power semiconductor device in series, when the power semiconductor device is detected to have a fault, the normally closed relay contact is immediately disconnected, so that the power semiconductor device is disconnected, the short-circuit fault of the power semiconductor device is converted into an open circuit, the bus voltage protection value is changed, the product works in a non-PFC state, and a user can still normally use the product before a maintenance worker arrives.
Example 2
According to the embodiment of the present invention, an embodiment of a fault detection circuit is provided, fig. 4 is a fault detection circuit according to the embodiment of the present invention, as shown in fig. 4, the fault detection circuit includes a fault detection object 20, a test element 22 and a switch unit 24 connected in series with the fault detection object 20, and a main chip 26 connected to the test element 22; wherein, in case that the current flowing through the test element 22 in the preset time period is greater than the first preset value, the main chip 26 controls the switch unit 24 to be turned off.
In the fault detection circuit of the embodiment, the test element 22 and the switch unit 24 which are connected with the fault detection object 20 in series are arranged in the circuit, the main chip 26 detects the current flowing through the test element 22, determines whether the fault detection object 20 has a short-circuit fault, and under the condition that the short-circuit fault occurs, the switch unit 24 is disconnected, so that the product works under the state of no fault detection object 20, the purpose that the product can be continuously used even if the fault detection object 20 damages the product is achieved, the technical effect of improving the product performance is achieved, and the technical problem that the product cannot be continuously used due to the damage of a power semiconductor device is solved.
Optionally, the fault detection circuit of this embodiment is a PFC circuit.
Optionally, in a case that the currents flowing through the test element 22 in the preset time period are all the second preset values, the main chip 26 adjusts the bus voltage protection value to be smaller than the preset voltage protection value.
Optionally, in a case that the currents flowing through the test element 22 in the preset time period are all greater than a first preset value, the main chip 26 outputs first fault information, where the first fault information is used to indicate that the fault detection object 20 is short-circuited; in the case where the currents flowing through the test element 22 during the preset time period are all the second preset values, the main chip 26 outputs second fault information indicating that the fault detection object 20 is open-circuited.
The test element 22 is connected in series with the fault detection object 20, and the main chip 26 detects the magnitude of the current flowing through the test element 22 to determine whether the fault detection object 20 is damaged (e.g., short-circuited or open-circuited), the current flowing through the test element 22 when a short-circuit fault occurs is large, and the current flowing through the test element 22 when an open-circuit fault occurs is zero.
When the current flowing through the test element is detected to be larger than a first preset value in a preset time period (for example, a plurality of continuous PFC cycles), the short-circuit fault of the fault detection object is indicated, and first fault information is output and used for indicating the short circuit of the fault detection object. Meanwhile, a corresponding fault code can be displayed on the internal display board to remind a user that a circuit possibly fails, the fault code should be fed back to after-sales personnel in time to replace the module in time, but a shutdown instruction cannot be sent out, and the product can continue to work.
When the current of the test element is detected to be a second preset value (for example, zero) within a preset time period (for example, several continuous PFC cycles), the fault detection object is indicated to have an open-circuit fault, and second fault information is output. Meanwhile, a corresponding fault code can be displayed on the internal display board to remind a user that a circuit possibly fails, the fault code should be fed back to after-sales personnel in time, the module is replaced in time, a shutdown instruction cannot be sent, and the product continues to work.
Optionally, the switching unit 24 comprises at least one of: normally closed contacts of the relay and fuse wires.
Alternatively, in the case where the switch unit 24 includes a relay normally closed contact, the main chip 26 is connected to the relay normally closed contact, and the main chip 26 is used to control the relay coil to be energized so as to open the relay normally closed contact.
In the case that the switch unit 24 is a normally closed relay contact, the main chip 26 controls the relay coil to be energized, so that the normally closed relay contact is opened, that is, if a large current value (larger than a first preset value) flowing through the test element 22 is detected within a preset time period (for example, several consecutive PFC cycles), the main chip 26 changes the level of an associated I/O (input/output) port, so that the relay coil is energized, and the normally closed relay contact is opened.
Alternatively, in the case where the switching unit 24 includes a fuse, when the fault detection object 20 has a short-circuit fault, the current flowing through the fuse increases sharply, and reaches a current value at which the fuse is blown, the fuse is blown quickly, and the blowing speed is generally within 10 ms.
Alternatively, in the case where the fault detection object is short-circuited or open-circuited, the main chip 26 adjusts the bus voltage protection value to be smaller than the preset voltage protection value, and does not output the shutdown instruction.
Alternatively, as shown in fig. 5, the fault detection object includes a power semiconductor device Q1, and the test element includes a resistor R1.
In fig. 5, taking a switch unit as a normally closed relay contact K1 as an example, AC-L, N respectively represents live and neutral lines of single-phase alternating current, D1 to D4 are rectifier diodes, C1 is a bus capacitor, L is a PFC inductor, and the normally closed relay contact K1 and a resistor R1 are connected in series with a power semiconductor device Q1.
When the current value flowing through the resistor R1 is detected to be large (larger than a first preset value) in a plurality of continuous PFC periods, the power semiconductor device Q1 is indicated to have short-circuit fault, the normally closed contact K1 of the relay is opened by controlling the relay, so that the power semiconductor device Q1 is separated from the circuit, and then first fault information is output. For better experience of users, corresponding fault codes are transmitted to the inner machine display panel through the communication circuit. The code only reminds a user that the PFC circuit has a fault, the PFC module is required to be applied for replacement after sale in time, a shutdown instruction is not sent to the driving circuit, and the product can still be used.
When the current flowing through the resistor R1 is detected to be zero in a plurality of continuous PFC periods, the power semiconductor device Q1 is indicated to have an open circuit fault, and second fault information is output. And displaying a corresponding fault code on an internal machine display panel to remind a user that the PFC circuit is possibly in fault, feeding back to after-sales personnel in time, and replacing the PFC module in time without sending a shutdown instruction to the driving circuit, so that the product continues to work.
Because the PFC circuit has the function of boosting, when the PFC circuit is normal, the bus voltage is kept constant under a certain voltage. Once the PFC circuit has a fault, the direct-current bus voltage is uncontrolled, the magnitude of the direct-current bus voltage is only related to the peak value of the input alternating-current voltage, so that the bus voltage is bound to be reduced, and the product can not work if the original protection value is still adopted, so that the bus voltage protection value can be modified, particularly the low-voltage protection value, and the normal work can be guaranteed when the power grid voltage fluctuates. When no PFC circuit exists, the voltage value of the direct current bus is the peak value of the alternating current voltage, the protection value of the bus voltage is changed correspondingly (the protection value of the bus voltage is adjusted to be smaller than the preset protection value of the voltage), and the product can still be used normally when the power grid fluctuates.
Optionally, the main chip includes a driving chip and a main control chip connected to the driving chip; the driving chip transmits the short-circuit fault identifier or the open-circuit fault identifier to the main control chip, and the main control chip converts the short-circuit fault identifier into first fault information or converts the short-circuit fault identifier into second fault information.
Optionally, the fault detection circuit of this embodiment further includes: and the inner machine display board is connected with the driving chip and is used for displaying the first fault information or the second fault information.
Optionally, the fault detection circuit of this embodiment further includes: and the communication circuit is arranged between the driving chip and the inner machine display panel and is used for transmitting the first fault information or the second fault information.
Optionally, the input terminal of the switching unit is connected to the bus bar, and the output terminal of the test element is grounded.
Optionally, the fault detection object comprises a power semiconductor device, and the test element comprises at least one of: resistance and an ammeter.
The above embodiment numbers of the present invention are only for description, and do not represent the advantages and disadvantages of the embodiments.
In the above embodiments of the present invention, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to the related descriptions of other embodiments.
In the embodiments provided in the present application, it should be understood that the disclosed technology can be implemented in other ways. The above-described embodiments of the apparatus are merely illustrative, and for example, the division of the units may be a logical division, and in actual implementation, there may be another division, for example, multiple units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, units or modules, and may be in an electrical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, a plurality of modifications and decorations can be made without departing from the principle of the present invention, and these modifications and decorations should also be regarded as the protection scope of the present invention.
Claims (10)
1. A fault detection circuit is characterized by comprising a fault detection object, a test element and a switch unit which are connected with the fault detection object in series, and a main chip which is connected with the test element; wherein,
and under the condition that the currents flowing through the test elements in the preset time period are all larger than a first preset value, the main chip controls the switch unit to be switched off.
2. The fault detection circuit of claim 1, wherein the fault detection circuit is a Power Factor Correction (PFC) circuit.
3. The fault detection circuit of claim 1, wherein if the current flowing through the test element in the preset time period is a second preset value, the main chip adjusts the bus voltage protection value to be smaller than a preset voltage protection value, and does not output a shutdown instruction.
4. The fault detection circuit according to claim 1, wherein in a case where the currents flowing through the test elements in the preset time period are both greater than the first preset value, the main chip outputs first fault information indicating that the fault detection object is short-circuited; and under the condition that the current flowing through the test element in the preset time period is a second preset value, the main chip outputs second fault information, and the second fault information is used for indicating that the fault detection object is broken.
5. The fault detection circuit of claim 1, wherein the switching unit comprises at least one of: normally closed contacts of the relay and fuse wires.
6. The fault detection circuit according to claim 4, wherein the main chip comprises a driving chip and a main control chip connected with the driving chip; wherein,
the driving chip transmits a short-circuit fault identifier or a broken-circuit fault identifier to the main control chip, and the main control chip converts the short-circuit fault identifier into the first fault information or converts the short-circuit fault identifier into the second fault information.
7. The fault detection circuit of claim 6, further comprising:
and the inner machine display board is connected with the driving chip and is used for displaying the first fault information or the second fault information.
8. The fault detection circuit of claim 7, further comprising:
and the communication circuit is arranged between the driving chip and the inner machine display panel and is used for transmitting the first fault information or the second fault information.
9. The fault detection circuit according to any one of claims 1 to 8, wherein the input terminal of the switching unit is connected to a bus bar, and the output terminal of the test element is grounded.
10. The fault detection circuit according to any one of claims 1 to 8, wherein the fault detection object includes a power semiconductor device, and the test element includes at least one of: resistance and an ammeter.
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| CN201720946850.XU CN207039447U (en) | 2017-07-31 | 2017-07-31 | Fault detection circuit |
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| CN201720946850.XU CN207039447U (en) | 2017-07-31 | 2017-07-31 | Fault detection circuit |
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| CN207039447U true CN207039447U (en) | 2018-02-23 |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN107450004A (en) * | 2017-07-31 | 2017-12-08 | 珠海格力电器股份有限公司 | Fault detection method and circuit |
| CN109143113A (en) * | 2018-07-24 | 2019-01-04 | 郑州云海信息技术有限公司 | A kind of method, apparatus and system monitoring PCIE outer plug-in card power supply |
| CN109473990A (en) * | 2019-01-10 | 2019-03-15 | 珠海格力电器股份有限公司 | Power supply fluctuation adjusting method and system of electric appliance and electric appliance |
| CN113285587A (en) * | 2021-05-06 | 2021-08-20 | 珠海格力电器股份有限公司 | Protection device of PFC circuit, control method thereof and motor system |
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2017
- 2017-07-31 CN CN201720946850.XU patent/CN207039447U/en active Active
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107450004A (en) * | 2017-07-31 | 2017-12-08 | 珠海格力电器股份有限公司 | Fault detection method and circuit |
| CN109143113A (en) * | 2018-07-24 | 2019-01-04 | 郑州云海信息技术有限公司 | A kind of method, apparatus and system monitoring PCIE outer plug-in card power supply |
| CN109473990A (en) * | 2019-01-10 | 2019-03-15 | 珠海格力电器股份有限公司 | Power supply fluctuation adjusting method and system of electric appliance and electric appliance |
| CN113285587A (en) * | 2021-05-06 | 2021-08-20 | 珠海格力电器股份有限公司 | Protection device of PFC circuit, control method thereof and motor system |
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