Disclosure of Invention
The present invention aims to solve at least to some extent one of the technical problems in the above-described technology. Therefore, the invention aims to provide a Damascus structure, a manufacturing method and application thereof, wherein the Damascus structure can realize a buried fine circuit layer with a fine line width spacing of 8/8 mu m without being limited by the resolving and attaching capacity of a corrosion-resistant layer, the manufacturing period of a substrate can be shortened, the packaging with higher circuit density can be realized, the cost is saved, the line type of a product circuit layer is better, and the loss is lower.
In order to achieve the above object, a first aspect of the present invention provides a method for manufacturing a damascene structure, which includes:
forming a first layer of photosensitive material covering an inner circuit pattern, wherein the inner circuit pattern is manufactured on a double-sided carrier board or a carrier board which can be manufactured on one side, and the inner circuit pattern comprises at least one inner layer bonding pad;
exposing, developing and post-curing the first layer of photosensitive material to manufacture at least one blind hole cavity penetrating through the first layer of photosensitive material, wherein the blind hole cavity exposes the top of the bonding pad;
Forming a second layer of photosensitive material overlying the first layer of photosensitive material;
exposing, developing and post-curing the second layer of photosensitive material to manufacture a pad cavity and a circuit cavity which penetrate through the second layer of photosensitive material, wherein the pad cavity is communicated with the blind hole cavity to expose the top of the inner layer pad, and the circuit cavity exposes the top of the first layer of photosensitive material;
Forming a conductive material filling the blind hole cavity, the pad cavity and the line cavity and covering the top of the first layer of photosensitive material and the inner layer pad;
the conductive material is thinned, polished, and etched such that the top of the second layer of photosensitive material is coplanar with the top of the conductive material.
According to the manufacturing method of the Damascus structure, the photosensitive material is used as the build-up insulating material, monopoly status of the ABF material can be avoided, the photosensitive material is good in physical property parameters, thermal stability, mechanical strength and structural stability, low loss can be achieved, holes and grooves are formed in a photoetching development mode, efficiency is higher, good physical appearance can be obtained, limit aperture can reach 5 mu m to manufacture a line-outgoing type better line layer, dry etching, wet copper etching and film removing processes are not needed, the embedded fine line layer with the fine line width spacing of 8/8 mu m can be achieved by using the photosensitive material without being limited by resolving and attaching capabilities of a resist layer, manufacturing cycle is short, copper line side etching problems in a traditional process can be avoided, cost is saved while fine line manufacturing capability is improved, in addition, the manufacturing method of the Damascus structure can be manufactured in a one-step mode, the manufacturing method is flexible, and compared with PLP packaging level semiconductor, and the manufacturing method is applicable to PLP level packaging level.
In addition, the manufacturing method of the Damascus structure provided by the invention can also have the following additional technical characteristics:
Optionally, the exposure dose of the first layer of photosensitive material and the second layer of photosensitive material is 100%. The exposure dose is 100% each time, so that the linear or hole type formed at one time is better, the required photoetching depth can be adjusted according to the thickness difference of the photosensitive material, the required size can be obtained by photoetching in place at one time without adjusting the exposure dose, the mask is not needed, the mask can be directly exposed at one time by means of single wavelength, the mask does not need to be manufactured again even if the pattern design of the exposure is changed, and the manufacturing cost of the mask is greatly saved.
Optionally, the first layer of photosensitive material is any one of photosensitive polyimide, photosensitive phenolic resin, photosensitive epoxy resin, photosensitive benzocyclobutene or photosensitive poly-p-phenylene benzobisoxazole, and the second layer of photosensitive material is any one of photosensitive polyimide, photosensitive phenolic resin, photosensitive epoxy resin, photosensitive benzocyclobutene or photosensitive poly-p-phenylene benzobisoxazole, but is not limited thereto.
Further, the photosensitive material comprises a dry film state or a liquid state, the photosensitive material in the dry film state is formed into the first layer of photosensitive material and the second layer of photosensitive material by adopting a vacuum film pressing process, and the liquid photosensitive material is formed into the first layer of photosensitive material and the second layer of photosensitive material by adopting a wet slit coating process.
Optionally, the method of forming the conductive material includes:
Forming a metal seed material layer on the surface of the second layer of photosensitive material and the surfaces of the blind hole cavity, the pad cavity, the circuit cavity and the inner layer pad;
and forming a metal interconnection material layer on the surface of the metal seed material layer, wherein the metal interconnection material layer fills the blind hole cavity, the bonding pad cavity and the circuit cavity and covers the top of the first layer of photosensitive material and the top of the inner bonding pad.
Further, the metal seed material layer is formed by adopting a physical vapor deposition process.
Further, the metal seed material layer comprises a titanium layer and a copper layer covered on the titanium layer, and the method for thinning, polishing and etching the conductive material comprises the following steps:
And after the metal interconnection material layer is thinned, polishing the metal seed material layer on the top of the metal interconnection material layer and the second photosensitive material layer to a titanium layer of the metal seed material layer, and etching the titanium layer by using a wet method.
In order to achieve the above object, a second aspect of the present invention provides a method for manufacturing a package substrate, which includes:
providing a double-sided carrier plate or a carrier plate which can be manufactured on one side;
Manufacturing an inner layer circuit pattern on the double-sided carrier board or the carrier board which can be manufactured on one side, wherein the inner layer circuit pattern comprises at least one inner layer bonding pad;
and manufacturing a Damascus structure on the inner layer circuit pattern by adopting the manufacturing method.
According to the manufacturing method of the packaging substrate, the manufacturing method of the Damascus structure is not limited by the resolving and attaching capacity of the corrosion-resistant layer, the embedded fine circuit layer with the fine line width spacing of 8/8 mu m can be realized, the manufacturing period of the packaging substrate can be shortened, packaging with higher circuit density can be realized, the cost is saved, the line type of the product circuit layer is better, the loss is lower, and the manufacturing method can be applied to manufacturing of PLP board-level packaging substrates.
In addition, according to the method for manufacturing the package substrate provided by the invention, the method further has the following additional technical characteristics:
Optionally, the double-sided carrier plate is a double-sided organic copper-coated carrier plate or an inorganic substrate, and the carrier plate capable of being manufactured on one side is a metal carrier plate or a ceramic carrier plate with a separation layer.
Further, the method for manufacturing the inner layer circuit pattern on the double-sided organic copper-clad carrier plate comprises the following steps:
Drilling the double-sided organic copper-clad carrier plate to form an interconnection hole penetrating through the double-sided organic copper-clad carrier plate;
Forming a conductive layer filling the interconnection hole and covering the first surface and the second surface of the double-sided organic copper-clad carrier plate which are opposite;
and manufacturing the inner layer circuit pattern on the conductive layer on the first surface and the conductive layer on the second surface.
In order to achieve the above object, a third aspect of the present invention provides a damascene structure, which is manufactured by the above-mentioned damascene structure manufacturing method.
In order to achieve the above object, a fourth aspect of the present invention provides a package substrate manufactured by the above method for manufacturing a package substrate.
Optionally, the package substrate includes:
A double-sided organic copper-clad carrier board with a first surface and a second surface opposite to each other, wherein the double-sided organic copper-clad carrier board is provided with a metal interconnection hole penetrating the first surface and the second surface, an inner layer circuit pattern is formed on the first surface and the second surface, the metal interconnection hole is connected with the inner layer circuit pattern, the inner layer circuit pattern is provided with an inner layer bonding pad and an inner layer circuit which are conducted, and
The dual-damascene structure comprises two damascene structures, wherein the two damascene structures are correspondingly covered on two inner layer circuit patterns, each damascene structure comprises a first photosensitive polyimide layer, a second photosensitive polyimide layer, an outer layer bonding pad and an outer layer circuit, the first photosensitive polyimide layer is covered on the inner layer circuit patterns, the second photosensitive polyimide layer is covered on the first photosensitive polyimide layer, the outer layer circuit is arranged on the second photosensitive polyimide layer and is communicated with the outer layer bonding pad, and the outer layer bonding pad downwards penetrates through the first photosensitive polyimide layer from the second photosensitive polyimide layer and is connected with the inner layer bonding pad of the inner layer circuit patterns.
Detailed Description
Embodiments of the present invention are described in detail below, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to like or similar elements or elements having like or similar functions throughout. The embodiments described below by referring to the drawings are illustrative and intended to explain the present invention and should not be construed as limiting the invention.
In order that the above-described aspects may be better understood, exemplary embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the present invention are shown in the drawings, it should be understood that the present invention may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art.
Please refer to fig. 1 to 13. Embodiments of the present application provide techniques that may facilitate fabrication of a package substrate for a damascene structure, board level package. The Damascus structure comprises a first photosensitive polyimide layer, a second photosensitive polyimide layer, an outer layer bonding pad and an outer layer circuit, wherein the first photosensitive polyimide layer is covered on an inner layer circuit pattern, the second photosensitive polyimide layer is covered on the first photosensitive polyimide layer, the outer layer circuit is arranged on the second photosensitive polyimide layer and is communicated with the outer layer bonding pad, and the outer layer bonding pad downwards penetrates through the first photosensitive polyimide layer from the second photosensitive polyimide layer and is connected with the inner layer bonding pad of the inner layer circuit pattern.
Referring to fig. 1, a process flow chart of the manufacturing method is shown, and the method includes the following steps:
s1, forming a first layer of photosensitive material covering an inner layer circuit pattern, wherein the inner layer circuit pattern is manufactured on a double-sided carrier plate or a carrier plate which can be manufactured on one side, and the inner layer circuit pattern comprises at least one inner layer bonding pad;
S2, exposing, developing and post-curing the first layer of photosensitive material to manufacture at least one blind hole cavity penetrating through the first layer of photosensitive material, wherein the blind hole cavity exposes the top of the inner layer bonding pad;
s3, forming a second layer of photosensitive material covering the first layer of photosensitive material;
S4, exposing, developing and post-curing the second layer of photosensitive material to manufacture a bonding pad cavity and a circuit cavity which penetrate through the second layer of photosensitive material, wherein the bonding pad cavity is communicated with the blind hole cavity to expose the top of the inner layer bonding pad, and the circuit cavity exposes the top of the first layer of photosensitive material;
s5, forming a conductive material which fills the blind hole cavity, the pad cavity and the circuit cavity and covers the top of the first layer of photosensitive material and the pad;
and S6, thinning, polishing and etching the conductive material so that the top of the second layer of photosensitive material is coplanar with the top of the conductive material.
The method uses a photosensitive material (e.g., photosensitive polyimide) in fabricating damascene structures. In the damasch structure, two layers of photosensitive polyimide are stacked (e.g., laminated) with each other, a first photosensitive polyimide layer is positioned below a second photosensitive polyimide layer, and each layer of photosensitive polyimide is exposed and developed separately to produce the desired pattern. And then, simultaneously electroplating the outer layer bonding pad of the outer layer circuit pattern and the outer layer circuit, and removing redundant conductive materials through thinning, polishing and etching processes. One advantage of the method is that the outer layer bonding pad and the outer layer circuit of the Damascus structure can be formed simultaneously in one operation, and the outer layer bonding pad, the grooves of the outer layer circuit and the holes of the first photosensitive material are formed by exposing and developing each photosensitive polyimide layer once and etching in place once. The efficiency is higher, good physical appearance can be obtained, and the limiting aperture can reach 5 mu m, so that a line layer with better line outgoing type can be manufactured. The embedded fine circuit layer with the fine line width spacing of 8/8 mu m can be realized by utilizing the photosensitive material without dry etching, wet copper etching and film removing processes and without being limited by the resolving and attaching capacity of the anti-corrosion layer, the multi-layer embedded circuit layer structure can be realized, the manufacturing period is short, the problem of side etching of a copper circuit in the traditional process can be avoided, and the cost saving is realized while the fine circuit manufacturing capacity is improved. The Damascus structure is flexible, can be manufactured on one side, can be manufactured on two sides at one time, and has larger yield.
In this embodiment, the damascene structure is fabricated on a carrier board having an inner layer wiring pattern.
First, referring to fig. 2-7, the step of providing a carrier board with an inner circuit pattern includes:
(1) Providing a double-sided carrier plate or a carrier plate which can be manufactured on one side, and specifically preparing the double-sided carrier plate or the carrier plate which can be manufactured on one side. A double-sided carrier plate such as an organic copper-clad plate or an inorganic glass substrate, etc. The single-sided carrier plate may be a carrier plate with a certain rigid support such as glass, ceramic substrate, etc., wherein the single-sided carrier plate may also be a temporary carrier plate such as a metal carrier plate with a separation layer or a glass substrate, etc., such as a stainless steel carrier plate, an aluminum plate, a copper plate or an aluminum alloy plate, etc., according to the product requirement, without being limited thereto. In this example, a double-sided organic copper-clad carrier plate was used.
Referring to fig. 2, as an example, the thickness of the double-sided organic copper-clad carrier 1 is 0.2mm.
(2) The double-sided organic copper-clad carrier 1 is drilled to form an interconnect hole 101 penetrating the double-sided organic copper-clad carrier 1. Specifically, for the double-sided organic copper-clad carrier 1, the upper and lower layers are required to be conducted after the material is cut, so that mechanical drilling is required, and as shown in fig. 3, the board edge positioning holes and the interconnection holes 101 are drilled. The aperture of the interconnect hole 101 is 0.15mm in the present embodiment, depending on the product design and the plate thickness.
(3) And filling holes on the double-sided organic copper-clad carrier plate 1. Specifically, the double-sided carrier plate has two types of hole filling processes, namely, the thinner organic copper-clad carrier plate and the glass substrate are drilled, chemically Desmear for removing glue residues, copper melting, electroplating, drying and plate grinding. The thickness of the double-sided organic copper-clad carrier 1 used in this embodiment is small, so that a plating hole filling method is adopted to form conductive layers (2 a,2 b) which fill the interconnection hole 101 and cover the first surface and the second surface of the double-sided organic copper-clad carrier 1 opposite to each other, the conductive layer 2 is surface copper, and the surface copper is plated to 15-20 μm, as shown in fig. 4.
In other examples, the thicker organic core (> 0.3 mm) is drilled, chemically Desmear desmutted, copper-plated, resin plugged, baked-on plate, ground-on plate.
Wherein, the processes of drilling, chemical Desmear removing glue residue, copper melting, electroplating, resin plugging, drying plate, grinding plate and the like adopt the prior art, and detailed description is omitted here.
(4) An inner layer wiring pattern 3 is formed on the conductive layer 2a on the first surface and the conductive layer 2b on the second surface. Specifically, the pattern transfer of the inner layer circuit adopts a subtractive method, namely film pasting pretreatment, film pasting, exposure, development, etching and film removal. The film pasting pretreatment is used for removing oxidation and oil stains on the copper surface, cleaning and roughening the copper surface so as to increase the adhesive force of the corrosion-resistant layer on the copper surface. The photoresist layer is also called a dry film, and the material includes acrylic acid, a resin type polymer binder, a photoactive material, and other solvents and additives, etc., and the present application is not particularly limited. Development typically uses a weak base series such as Na 2CO3 or K 2CO3 to dissolve the unpolymerized dry film portion. The pattern positions where copper needs to be etched are exposed after development, and other positions are protected by the resist layer 4 left after development, as shown in fig. 5. After development, the exposed copper needs to be removed by means of an acid etch. After the etching is completed, the resist layer 4 at the original copper pattern protecting position needs to be removed, so that the inner layer circuit pattern 3 can be manufactured. During film removal, naOH film removal liquid medicine is generally adopted to strip the residual resist layer 4, the remained copper forms an inner layer circuit pattern 3, the inner layer circuit pattern 3 comprises a plurality of inner layer bonding pads and inner layer circuits, and the inner layer bonding pads are communicated with the inner layer circuits.
Referring to fig. 7, a double-sided organic copper-clad carrier 1 with an inner circuit pattern 3 is provided. The double-sided organic copper-clad carrier plate 1 is provided with a first surface and a second surface which are opposite, the double-sided organic copper-clad carrier plate 1 is provided with a metal interconnection hole 2c penetrating through the first surface and the second surface, an inner layer circuit pattern 3 is formed on the first surface and the second surface, the metal interconnection hole 2c is connected with the inner layer circuit pattern 3, and the inner layer circuit pattern 3 is provided with an inner layer bonding pad and an inner layer circuit which are conducted.
Next, referring to fig. 8, step S1 is performed to form a first layer of photosensitive material 5 covering the inner layer wiring pattern 3.
Specifically, the photosensitive material, i.e., photosensitive dielectric layer, includes liquid and dry films, and is classified by main components such as Polyimides (PI), phenolic resins (Phenolic), epoxy resins (Epoxy), benzocyclobutenes (BCB), poly-p-Phenylene Benzobisoxazole (PBO), and the like. The photosensitive material is in a dry film state, and the photosensitive material is in a vacuum film pressing mode, and the photosensitive material is in a liquid state, namely the photosensitive medium layer photoresist, and the photosensitive material is in a wet slit coating mode. In this embodiment, dry film PI is used, and the schematic structure after lamination is shown in fig. 8. The lamination uses vacuum film pressing mode, the material is photosensitive medium layer in dry film state, the thickness can be selected according to different line width interval designs, the coating uses wet slit coating mode, the material is liquid photosensitive medium layer photoresist, and the thickness can be thinner. Because the damascene process is often used to manufacture finer buried lines, the embodiment uses an insulating layer with better thermal stability, mechanical strength and structural stability, i.e., photosensitive polyimide PI. The use of a photosensitive material enables breaking the monopoly of the supply of ABF (Ajinomoto Build-up Film).
As an example, as shown in fig. 8, two first layers of photosensitive materials 5 are laminated on the inner layer wiring patterns 3 on the opposite first and second surfaces of the double-sided organic copper-clad carrier 1 in one-to-one correspondence.
Thereafter, referring to fig. 9, step S2 is performed to expose, develop and post-cure the first layer of photosensitive material 5 to make at least one blind via cavity 501 penetrating the first layer of photosensitive material 5, wherein the blind via cavity 501 exposes the top of the inner layer pad.
Specifically, the first layer of photosensitive material 5 is used to make the blind hole cavity 501, and the exposure and development are adopted, so that laser drilling is not needed, the hole is directly formed after development, and the hole type is good (such as stable hole diameter capability and smooth hole wall). Compared with the traditional laser pore-forming technology, the high-density miniaturized pore can be formed by adopting the photoetching pore-forming technology without the subsequent treatment of dry etching/wet Desmear. This step is to interconnect the outer layer wiring pattern and the inner layer wiring pattern longitudinally.
As an example, the exposure of the step is 100% of exposure dose, so that the linear or hole type formed at one time is better, the required photoetching depth can be adjusted according to the thickness of the photosensitive material film, the required pattern size can be obtained by one-time photoetching in place without adjusting the exposure dose, in addition, the mask is not needed, the exposure is directly performed at a single wavelength each time, and even if the exposed pattern design is changed, the mask is not required to be manufactured again, so that the manufacturing cost is further saved.
Typically, an organic developer such as tetramethylammonium hydroxide (2.38% TMAH) developer is used for development.
It should be noted that the first layer of photosensitive material 5 may be a negative adhesive or a positive adhesive. In the case of a negative photoresist, the non-exposed areas (non-porous areas in fig. 9) are left after photochemical reaction and thermal curing, i.e. the non-porous areas of the first layer of photosensitive material 5 are subjected to a photo-curing and thermal curing process, so that they are already shaped, and the first layer of photosensitive material 5 is not affected during subsequent re-exposure and development of the second layer of photosensitive material 6. In the case of positive photoresist, the exposed area (the area of the hole in fig. 9) is subjected to photochemical or thermal curing reaction and is easily removed by the developer, that is, the area of the hole of the first layer of photosensitive material 5 becomes easily soluble in the developer through the photo-curing and thermal curing process, and the other part of the first layer of photosensitive material is insoluble in the developer after being thermally cured, so that the first layer of photosensitive material 5 is not affected when the second layer of photosensitive material 6 is re-exposed and developed. Specifically, post-curing is typically a thermal curing process, the post-curing of this example being at a temperature of 200 ℃ for 60 minutes with an oxygen content of <100ppm.
Alternatively, the blind hole cavity made in this embodiment has a pore diameter of 20 μm.
Next, referring to fig. 10, step S3 is performed to form a second layer of photosensitive material 6 covering the first layer of photosensitive material 5.
Specifically, the second layer of photosensitive material 6 may be vacuum film-pressed and wet-coated in the same manner as the first layer of photosensitive material 5, depending on the photosensitive material selected. In this embodiment, the second photosensitive material 6 is also a dry film PI, and the schematic structure of the laminated photosensitive material is shown in fig. 10. The lamination uses vacuum film pressing mode, and the thickness can be selected according to different line width and interval designs.
As an example, as shown in fig. 10, two second-layer photosensitive materials 6 are laminated on two first-layer photosensitive materials 5 in one-to-one correspondence.
Then, referring to fig. 11, step S4 is performed to expose, develop and post-cure the second layer of photosensitive material 6 to make a pad cavity 601 and a line cavity 602 penetrating the second layer of photosensitive material 6, wherein the pad cavity 601 is communicated with the blind hole cavity 501 to expose the top of the inner layer of pad, and the line cavity 602 exposes the top of the first layer of photosensitive material 5.
Specifically, the exposure, development, and post-curing of the second layer photosensitive material 6 are performed in the same manner as the first layer photosensitive material 5, the exposure is 100% of the exposure dose, and the first layer photosensitive material 5 is not affected when the second layer photosensitive material 6 is exposed and developed after the first layer photosensitive material 5 is post-cured as described above. Except that the pad cavities 601 and the line cavities 602 formed in this step are used to implement lateral interconnection of the outer pads of the outer line patterns with the outer line patterns, and the pad cavities 601 are in communication with the blind via cavities 501, so that the first layer of photosensitive material 5 can implement longitudinal interconnection of the outer line patterns with the inner line patterns.
As an example, the line of this embodiment is 5/5 μm and the disk is 30 μm.
Next, referring to fig. 12, step S5 is performed to form a conductive material filling the blind via cavity 501, the pad cavity 601 and the line cavity 602 and covering the top of the first layer of photosensitive material 5 and the inner layer pad.
By way of example, the method of forming the conductive material 7 includes forming a metal seed material layer on the surface of the second layer of photosensitive material 6 and the surfaces of the blind via cavity 501, the pad cavity 601, the line cavity 602 and the inner layer pad, and forming a metal interconnect material layer on the surface of the metal seed material layer, the metal interconnect material layer filling the blind via cavity 501, the pad cavity 601 and the line cavity 602 and covering the top of the first layer of photosensitive material 5 and the top of the inner layer pad.
Specifically, the metal seed material layer can be realized by electroless copper deposition or physical vapor deposition, the latter can be used for manufacturing fine circuits smaller than 8/8 mu m, and the deposited copper layer has finer grains, which is more beneficial to the post-flashing process.
More specifically, the metal seed material layer is generally a 50-100 nm titanium layer, the titanium layer is relatively stable, and the titanium can have excellent binding force with various organic and inorganic substrates. After the titanium layer is formed, a copper layer with the thickness of 100-500 nm is manufactured on the titanium layer, and the copper layer can adjust electroplating resistance, so that copper on the surface of the electroplated carrier plate is more uniform.
After the metal seed material layer is manufactured, a metal interconnection material layer 701 is formed on the metal seed material layer.
In the process of forming the metal interconnection material layer 701, the double-sided carrier plate process adopts double-sided whole-plate electroplating, the single-sided carrier plate adopts single-sided electroplating, and the electroplated structure is shown in fig. 12. The linearity of such fine lines generally requires high current density, low sulfur element (< 9.6 ppm) electroplating, among others. Because of the varying depth of the electroplated structure, the copper will need to be thicker than the actual electroplated copper if it is to be electroplated, for example, in fig. 12, the copper surface is higher than the top of the second layer of photosensitive material 6, and then the subsequent thinning and polishing are performed.
Finally, referring to fig. 13, step S6 is performed to thin, polish and etch the conductive material 7 so that the top of the second layer of photosensitive material 6 is coplanar with the top of the conductive material 7.
Specifically, in step S5, it is described that the electroplating needs to plate copper of the metal interconnection material layer 701 thicker to ensure the integrity of the filling holes and the filling discs, that is, in step S6, mechanical grinding or chemical thinning of the surface copper is required to be performed to 8-10 μm, CMP is performed, CMP polishing is stopped until the titanium layer in the metal seed material layer can be stopped, and then the liquid medicine is used to etch away the surface nano-scale titanium layer. The reason why the CMP is performed after the thinning is that the cost of the CMP is higher than that of the thinning process, the CMP is suitable for polishing a finer layer, the CMP can obtain better uniformity, and the embedded line type can also be good. Thus, a package substrate with a damascene structure is manufactured.
Referring to fig. 13, the package substrate includes a double-sided organic copper-clad carrier 1 having opposite first and second surfaces, the double-sided organic copper-clad carrier 1 having metal interconnection holes penetrating the first and second surfaces, each of the first and second surfaces having an inner layer wiring pattern 3 formed thereon, the metal interconnection holes being connected to the inner layer wiring pattern 3, the inner layer wiring pattern 3 having an inner layer pad and an inner layer wiring which are electrically connected thereto, and two damascene structures one-to-one covered on the two inner layer wiring patterns 3, each damascene structure including a first photosensitive polyimide layer (first photosensitive material 5), a second photosensitive polyimide layer (second photosensitive material 6), an outer layer pad and an outer layer wiring (outer layer wiring pattern 8), the first photosensitive polyimide layer being covered on the inner layer wiring pattern 3, the second photosensitive polyimide layer being covered on the first photosensitive polyimide layer, the outer layer being disposed on the second photosensitive polyimide layer and being electrically connected to the outer layer pad, the outer layer pad penetrating downward from the second photosensitive polyimide layer and being connected to the inner layer pad of the inner layer pattern 3.
In summary, for damascene structures, the application saves a lot of processes, equipment and materials, such as laser drilling, electroless copper plating, dry film pattern transfer, film removal and flash etching processes, equipment such as laser drilling equipment, electroless copper plating, flash etching lines and the like, and materials such as copper plating solution, fine line resist layers and the like, by combining the PVD process (smaller grain size) with the photoetching development process of photosensitive materials, compared with the traditional carrier plate process, shortens the production period and saves a lot of cost. Moreover, the application also improves the capacity of the circuit, and the Damascus structure can realize a buried fine circuit layer with a fine line width spacing of less than 8/8 mu m by utilizing the photosensitive polyimide without being limited by the resolving and attaching capacity of the anti-corrosion layer. In addition, the insulating layer has better thermal stability, mechanical strength and structural stability, and can improve the reliability of the whole substrate structure.
In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings are merely for convenience in describing the present invention and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present invention.
Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present invention, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.
In the present invention, unless explicitly specified and limited otherwise, the terms "mounted," "connected," "secured," and the like are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally formed, mechanically connected, electrically connected, directly connected, indirectly connected via an intervening medium, or in communication between two elements or in an interaction relationship between two elements. The specific meaning of the above terms in the present invention can be understood by those of ordinary skill in the art according to the specific circumstances.
In the present invention, unless expressly stated or limited otherwise, a first feature "above" or "below" a second feature may include both the first and second features being in direct contact, as well as the first and second features not being in direct contact but being in contact with each other through additional features therebetween. Moreover, a first feature being "above," "over" and "on" a second feature includes the first feature being directly above and obliquely above the second feature, or simply indicating that the first feature is higher in level than the second feature. The first feature being "under", "below" and "beneath" the second feature includes the first feature being directly under and obliquely below the second feature, or simply means that the first feature is less level than the second feature.
In the description of the present specification, a description referring to terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms should not be understood as necessarily being directed to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Further, one skilled in the art can engage and combine the different embodiments or examples described in this specification.
While embodiments of the present invention have been shown and described above, it will be understood that the above embodiments are illustrative and not to be construed as limiting the invention, and that variations, modifications, alternatives and variations may be made to the above embodiments by one of ordinary skill in the art within the scope of the invention.