CN118553297A - Bit flip detection method, device, electronic device and medium - Google Patents

Abstract

The present application is applicable to the field of equipment detection technology, and provides a bit flip detection method, device, electronic device and medium. The detection method includes: reading a first test file and a second test file from a flash memory; the first test file is obtained when the ECC check function is turned on, and the second test file is obtained when the ECC check function is turned off; the flash memory is divided into multiple sub-areas; the file data in the target area of the first test file is compared with the file data in the target area of the second test file to obtain the bit flip information of the flash memory; the target area is any one or more sub-areas of the multiple sub-areas. The present application realizes the detection of bit flips, supports the detection of partial areas in the flash memory, and helps to improve the flexibility of the solution.

Description

Bit flip detection method, device, electronic device and medium

Technical Field

The present application belongs to the field of device detection technology, and in particular, relates to a bit flip detection method, device, electronic device and medium.

Background Art

At present, all flash memory devices are troubled by the bit flip phenomenon. The so-called bit flip means that due to the limitations of the electrical characteristics of flash memory, after the flash memory is erased and written many times, the data value of a storage bit in the original flash memory may flip. If the flash memory is not adjusted and improved in a targeted manner, many bit flip errors will occur during use. When the flash memory is used to store configuration files and other sensitive information, the bit flip phenomenon of the flash memory will cause the system to crash. Therefore, it is necessary to detect the details of the flash memory after the bit flip occurs.

Summary of the invention

The embodiments of the present application provide a bit flip detection method, device, electronic device and medium, which can solve the problem of bit flip detection.

In a first aspect, an embodiment of the present application provides a method for detecting a bit flip, comprising:

Reading a first test file and a second test file from the flash memory; the first test file is obtained when the ECC check function is turned on, and the second test file is obtained when the ECC check function is turned off;

Dividing the flash memory into a plurality of sub-areas;

The file data in the target area of the first test file is compared with the file data in the target area of the second test file to obtain the bit flip information of the flash memory; the target area is any one or more sub-areas of the multiple sub-areas.

The embodiment of the present application reads files with bit flips and files with corrected bit flips from the flash memory by turning ECC on and off, then divides the flash memory into multiple sub-areas, obtains the target area from the multiple sub-areas, and then compares the data of different files in the same target area, and finally obtains the bit flip information of the flash memory, thereby realizing the detection of bit flips, supporting the detection of partial areas in the flash memory, and helping to improve the flexibility of the solution.

In a possible implementation manner of the first aspect, the step of comparing the file data in the target area of the first test file with the file data in the target area of the second test file to obtain the bit flip information of the flash memory includes:

Performing an XOR operation on the file data in the target area of the first test file and the file data in the target area of the second test file, and recording an abnormal bit when the data are inconsistent;

The bit flip information of the flash memory is obtained according to the number of abnormal bits and the abnormal bit addresses in the target area.

The embodiment of the present application uses an XOR operation to perform comparison when comparing data of two files, which greatly improves the comparison efficiency.

In a possible implementation manner of the first aspect, the step of obtaining the bit flip information of the flash memory according to the number of abnormal bits in the target area and the addresses of the abnormal bits includes:

When the number of sub-areas in the target area is multiple, determining the number of abnormal bits and the abnormal bit address of each sub-area in the target area as the bit flip information of the flash memory;

A target sub-area having the largest number of abnormal bits is determined, and a starting bit address of the target sub-area is determined as the bit flip information of the flash memory.

The embodiment of the present application can count the bit flip information in each sub-area, thereby obtaining the layout information of the bit flip, which is convenient for positioning. The embodiment of the present application compares the bit flip information of different sub-areas, and selects the target sub-area with the largest number of abnormal bits, which is convenient for subsequent targeted adjustments and improvements.

In a possible implementation manner of the first aspect, before the step of comparing the file data in the target area of the first test file with the file data in the target area of the second test file, the bit flip detection method further includes:

Identify bad blocks in the flash memory, and if the target area has bad blocks, determine replacement blocks other than the bad blocks from non-target areas other than the target area in the flash memory;

The data of the bad block is transferred to the replacement block.

This application can screen out bad blocks appearing in the flash memory, eliminate abnormal results caused by bad blocks, and improve robustness.

In a possible implementation manner of the first aspect, the bit flip detection method further includes:

Acquire an original test file corresponding to the flash memory, and a target test file read from the flash memory after writing the original test file into the flash memory;

The file data in the target area of the original test file is compared with the file data in the target area of the target test file to obtain the bit flip information of the flash memory; the target test file includes at least one of the first test file and the second test file.

The embodiment of the present application can use the original test file as a judgment standard to compare with the target test file read from the flash memory. When the ECC calibration capability is limited, the bit flipping situation of the flash memory can be compared in an all-round way. The obtained bit flipping information is more comprehensive and accurate. In addition, not only can it be known which positions of the flash memory are prone to bit flipping, but also the size of the ECC inspection function can be tested.

In a possible implementation manner of the first aspect, before the step of comparing the file data in the target area of the original test file with the file data in the target area of the target test file, the bit flip detection method further includes:

Acquire the storage data volume of the flash memory and the file data volume of the original test file;

Calculate the filling data amount based on the storage data amount and the file data amount;

The original test file is filled with additional data according to the amount of filled data.

The embodiment of the present application can ensure that the data size of the original test file and the target test file to be compared are consistent, thereby avoiding differences in the results.

In a possible implementation manner of the first aspect, before the step of reading the first test file and the second test file from the flash memory, the bit flip detection method further includes:

The flash memory is subjected to scenario-based processing; the scenario-based processing includes at least one of aging processing, placing in a physical environment with a temperature greater than a first temperature threshold, placing in a physical environment with a temperature less than a second temperature threshold, and placing in a physical environment with a humidity greater than a humidity threshold.

The embodiments of the present application can detect bit flipping situations that may occur in a flash memory under different scenarios, thereby making the bit flipping information of the flash memory more comprehensive.

In a possible implementation manner of the first aspect, the step of dividing the flash memory into a plurality of sub-areas includes:

Dividing the flash memory according to preset structural information of the flash memory to obtain a plurality of pages; the preset structural information represents the number of pages of the flash memory;

If the size of the page is larger than the preset size of the sub-area, dividing the page into a plurality of sub-areas according to the preset size of the sub-area;

If the size of the page is smaller than or equal to the preset size of the sub-region, the page is determined as the sub-region.

In the embodiment of the present application, the structural information of the flash memory can be used as a division standard, which not only makes the division result more reasonable, but also ensures that the layouts of the two files are consistent, thereby avoiding large differences in comparison results due to different layouts.

In a second aspect, an embodiment of the present application provides a bit flip detection device, comprising:

An acquisition module, used for reading a first test file and a second test file from the flash memory; the first test file is obtained when the ECC check function is turned on, and the second test file is obtained when the ECC check function is turned off;

A partitioning module, used for partitioning the flash memory into a plurality of sub-areas;

The detection module is used to compare the file data in the target area of the first test file with the file data in the target area of the second test file to obtain the bit flip information of the flash memory; the target area is any one or more sub-areas of the multiple sub-areas.

In a third aspect, an embodiment of the present application provides an electronic device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the bit flip detection method described in any one of the first aspects when executing the computer program.

In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the method for detecting a bit flip described in any one of the above-mentioned first aspects is implemented.

In a fifth aspect, an embodiment of the present application provides a computer program product. When the computer program product is run on a terminal device, the terminal device executes the bit flip detection method described in any one of the above-mentioned first aspects.

It can be understood that the beneficial effects of the second to fifth aspects mentioned above can be found in the relevant description of the first aspect mentioned above, and will not be repeated here.

BRIEF DESCRIPTION OF THE DRAWINGS

In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

FIG1 is a schematic flow chart of a method for detecting a bit flip provided in an embodiment of the present application;

FIG2 is a schematic diagram of the structure of a flash memory provided by an embodiment of the present application;

FIG3 is a schematic diagram of a storage layout of a flash memory provided by an embodiment of the present application;

FIG4 is a schematic flow chart of step S12 in a bit flip detection method provided in another embodiment of the present application;

FIG5 is a schematic flow chart of step S13 in a bit flip detection method provided in another embodiment of the present application;

FIG6 is a schematic diagram of a process for identifying bad blocks in a bit flip detection method provided by another embodiment of the present application;

FIG7 is a schematic flow chart of a method for detecting a bit flip provided in another embodiment of the present application;

FIG8 is a schematic diagram of a flow chart of filling additional data in a bit flip detection method provided in another embodiment of the present application;

FIG9 is a schematic diagram of the structure of a bit flip detection device provided in an embodiment of the present application;

FIG. 10 is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application.

DETAILED DESCRIPTION

In the following description, specific details such as specific system structures, technologies, etc. are provided for the purpose of illustration rather than limitation, so as to provide a thorough understanding of the embodiments of the present application. However, it should be clear to those skilled in the art that the present application may also be implemented in other embodiments without these specific details. In other cases, detailed descriptions of well-known systems, devices, circuits, and methods are omitted to prevent unnecessary details from obstructing the description of the present application.

It should be understood that when used in the present specification and the appended claims, the term "comprising" indicates the presence of described features, integers, steps, operations, elements and/or components, but does not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and/or combinations thereof.

It should also be understood that the term “and/or” used in the specification and appended claims refers to and includes any and all possible combinations of one or more of the associated listed items.

As used in the specification and appended claims of this application, the term "if" can be interpreted as "when" or "uponce" or "in response to determining" or "in response to detecting", depending on the context. Similarly, the phrase "if it is determined" or "if [described condition or event] is detected" can be interpreted as meaning "uponce it is determined" or "in response to determining" or "uponce [described condition or event] is detected" or "in response to detecting [described condition or event]", depending on the context.

In addition, in the description of the present application specification and the appended claims, the terms "first", "second", "third", etc. are only used to distinguish the descriptions and cannot be understood as indicating or implying relative importance.

References to "one embodiment" or "some embodiments" etc. described in the specification of this application mean that one or more embodiments of the present application include specific features, structures or characteristics described in conjunction with the embodiment. Therefore, the statements "in one embodiment", "in some embodiments", "in some other embodiments", "in some other embodiments", etc. that appear in different places in this specification do not necessarily refer to the same embodiment, but mean "one or more but not all embodiments", unless otherwise specifically emphasized in other ways. The terms "including", "comprising", "having" and their variations all mean "including but not limited to", unless otherwise specifically emphasized in other ways.

FIG1 shows a schematic flow chart of a bit flip detection method provided by the present application. As an example but not a limitation, the method may include the following steps:

S11. Read a first test file and a second test file from a flash memory.

The first test file is obtained when the ECC check function is turned on, and the second test file is obtained when the ECC check function is turned off. The ECC check function is used to correct data with bit flipping.

Specifically, both the first test file and the second test file are binary files, such as bin files, etc. The second test file may represent uncorrected data, and the first test file may represent corrected data.

Specifically, due to the physical characteristics of NAND FLASH, a certain probability of error will occur during the data reading and writing process, so there must be a corresponding error detection and correction mechanism, and ECC can be used to detect and correct data errors. For ECC in flash memory, common algorithms include Hamming code and BCH. The implementation of such algorithms can use corresponding software or hardware according to your needs.

It should be noted that ECC is usually enabled by default. The ECC calibration function will not restore the bit that has been flipped. It will only return the calibrated data to the user when reading the flash memory. The actual value in the flash memory has not changed. In other words, enabling the ECC function will only calibrate the read value, and the bit that has been flipped in the actual flash memory will not be actually flipped back to the normal value.

For example, suppose the original data in a flash memory is 0x1234, and then a bit flip occurs in the flash memory. At this time, the data in the flash memory is 0x1F34, that is, 2 (0010) flips to F (1111), flipping 3 bits. At this time, if the ECC calibration function of the flash memory is turned on, the value read out is 0x1234 within the ECC correction range of the flash memory. If the ECC calibration function of the flash memory is turned off, the value obtained by reading the flash memory is 0x1F34.

In a possible implementation, a serial port tool may be used to control the opening and closing of the ECC calibration function, thereby performing a comparison.

S12, dividing the flash memory into a plurality of sub-areas.

It should be noted that this will not affect the original structure and layout of the flash memory.

In a possible implementation, the size of the divided sub-area can be set in consideration of the ECC calibration function and the computing power of the flash memory. For example, ECC generally performs verification in groups of 256 bytes, so 256 bytes can be used as the minimum unit, and the sub-area can be set to n 256 bytes according to the computing power of the flash memory, where n is a positive integer greater than or equal to 1. As an example and not a limitation, based on some commonly used flash memories, when n is 2, that is, the sub-area is set to 512 bytes, the detection efficiency is relatively good.

S13: Compare the file data in the target area of the first test file and the file data in the target area of the second test file to obtain bit flip information of the flash memory.

Specifically, it can be understood that the second test file has a bit flip, and the first test file is used as the standard answer, and the details of the bit flip of the second test file are obtained by comparison as the bit flip information of the flash memory.

The embodiment of the present application reads files with bit flips and files with corrected bit flips from the flash memory by turning ECC on and off, then divides the flash memory into multiple sub-areas, obtains the target area from the multiple sub-areas, and then compares the data of different files in the same target area, and finally obtains the bit flip information of the flash memory, thereby realizing the detection of bit flips, supporting the detection of at least part of the area in the flash memory, and helping to improve the flexibility of the solution.

In one possible implementation, in response to the instruction of data preparation, multiple flash memories can be prepared, and the first test file and the second test file corresponding to each flash memory can be obtained, so as to prepare and save multiple test files in advance. Specifically, the file is commanded, and then the file is placed in the corresponding directory of the same level according to the naming, so as to facilitate the subsequent retrieval of the files that need to be compared. For example, assuming that the file is a bin file, the test files read can be A_before_ecc.bin, A_after_ecc.bin, B_before_ecc.bin and B_after_ecc.bin, etc., where the files starting with A belong to the same flash memory and can be placed in one directory, and the same is true for files starting with B.

In one possible implementation, after preparing the test file, in response to the data sorting instruction, the total data volume of the two files to be compared is compared to see if they are consistent. If they are inconsistent, direct comparison will cause incorrect offset positions, resulting in erroneous comparison results. In this case, some data can be supplemented to the file with less data to ensure that the offset of the valid data area is consistent.

In a possible implementation, in response to a partition instruction, the flash memory is partitioned to obtain a plurality of sub-areas.

In a possible implementation, referring to FIG. 2 , the entire flash memory content may be divided into multiple blocks of a certain size according to the characteristics of the flash memory, and each block may be divided into pages of a certain size, thereby facilitating addressing and area division.

Specifically, as shown in FIG. 2 , the storage structure of the flash memory is as follows: a flash memory is composed of many blocks, a block is composed of many pages, and a page is composed of a valid data area and a spare area (ie, OOB area).

In a possible implementation, some areas of the flash memory can be ignored, such as areas storing prototype hardware information, cache files temporarily generated by system operation, and other unimportant files. Errors in these areas will not cause serious problems. In order to further improve efficiency, in response to the screening instruction, some sub-areas are screened out from multiple sub-areas as target areas. Optionally, if the entire area of the flash memory is to be detected, this step can also be omitted, and the entire valid data area of the flash memory can be directly used as the target area.

Specifically, you can know the layout of the flash memory in advance, understand the starting address and ending address of each area, and the type of data stored. As an example, the flash memory shown in Figure 3 is divided into 9 areas. It can be seen that the ending address of the previous area is also the starting address of the next area. Therefore, you only need to know the starting address of each area, and you can also divide the different areas of the flash memory according to the total size of the flash memory. Taking Figure 3 as an example, assuming that the contents of the PARTITION_E, PARTITION_F, and PARTITION_G areas store the content necessary for the program to run. If there is an error in the content of the area, unpredictable problems will occur. Then for the flash memory in Figure 3, the PARTITION_E, PARTITION_F, and PARTITION_G areas are all target areas.

In a possible implementation, when comparing data, in order to improve efficiency, OOB data can be skipped, that is, the file data in this application refers to the data in the valid data area.

In a possible implementation, in response to the detection instruction, the bit flip information in each sub-area may be calculated first, and then the bit flip information of each sub-area may be counted to obtain the bit flip information of the flash memory. Optionally, when the target area is only one sub-area, the bit flip information of the sub-area is the bit flip information of the flash memory.

Optionally, referring to FIG. 4 , an implementation of step S12 may include:

S121 . Divide the flash memory according to preset structural information of the flash memory to obtain a plurality of pages.

The preset structure information represents the number of pages of the flash memory. The number of pages of the flash memory can be obtained according to the storage structure of the flash memory.

S122: If the size of the page is larger than the preset size of the sub-region, divide the page into a plurality of sub-regions according to the preset size of the sub-region.

S123: If the size of the page is smaller than or equal to the preset size of the sub-area, the page is determined as the sub-area.

As an optional implementation, the total size of the flash memory (64M, 128M, 256M, etc.), the block size, page size, and OOB size of the flash memory are saved in a format.

For example, when the preset size of the sub-area is 512 bytes, if the page size is 512 bytes or 256 bytes, etc., detection is performed directly in units of one page; if the page size is 2048 bytes, it is divided into four sub-areas of 512 bytes.

The advantage of doing this is that on the one hand it ensures the consistency of the output results as much as possible, and on the other hand it does not destroy the original page structure.

In the embodiment of the present application, the structural information of the flash memory can be used as a division standard, which not only makes the division result more reasonable, but also ensures that the layouts of the two files are consistent, thereby avoiding large differences in comparison results due to different layouts.

Optionally, referring to FIG. 5 , an implementation of step S13 may include:

S131 , performing an XOR operation on the file data in the target area of the first test file and the file data in the target area of the second test file, and recording an abnormal bit when the data are inconsistent.

Specifically, the file data in the target area of the first test file and the file data in the target area of the second test file are obtained respectively, and then an XOR operation is performed bit by bit. Among them, XOR is a logical operator, and its principle is that the value of the XOR operator is true only when exactly one of the two operands is true and the other is false. It is assumed that when the two data values are opposite, it is set to 1, so 1 indicates a bit flip.

For example, assuming that the content of an address in the first data is 0xFA=11111010, and the content of the same address in the second data is 0xFC=11111100, then the XOR result is 0xFA^0xFC=00000110. It can be seen that the number of bit flips here is 2.

As an optional implementation, all XOR results of the first data and the second data may be obtained, and then the number of bit flips occurring in the target area and the occurrence address of each bit flip may be counted.

S132. Obtain bit flip information of the flash memory according to the number of abnormal bits and the abnormal bit addresses in the target area.

The embodiment of the present application uses an XOR operation to compare the data of two files. The XOR operation has fast and accurate functions, which greatly improves the comparison efficiency.

Exemplarily, step S132 includes: when the number of sub-areas in the target area is multiple, determining the number of abnormal bits and the abnormal bit address of each sub-area in the target area as the bit flip information of the flash memory; determining the target sub-area with the largest number of abnormal bits, and determining the starting bit address of the target sub-area as the bit flip information of the flash memory.

For example, in the initial state, the starting bit address of the target sub-area is 0. When counting the number of bit flips in each sub-area, assuming that 8 bit flips occur in a sub-area, then the starting bit address of the sub-area with 8 bit flips is recorded. In subsequent statistics, it is found that 10 bit flips occur in another sub-area, then the record is corrected to the starting bit address of the sub-area with 10 bit flips, until all the target areas of the flash memory are detected.

As an example but not a limitation, the number of sub-areas with different numbers of flips can also be counted, and the total number of sub-areas with N bit flips. For example, there are 10 sub-areas with 2-byte bit flips, and 4 sub-areas with 5-byte bit flips, that is, during the detection process, 10 sub-areas have 2 bit flips, and 4 sub-areas have 5 bit flips. This bit flip information may better understand the distribution of the bit flip degree of the flash memory.

As an optional implementation, the flip information may be plotted in a chart form, so that the bit flipping of the flash memory can be observed more intuitively.

The embodiment of the present application can count the bit flip information in each sub-area, thereby obtaining the layout information of the bit flip, which is convenient for positioning. The embodiment of the present application compares the bit flip information of different sub-areas, and selects the target sub-area with the largest number of abnormal bits, which is convenient for subsequent targeted adjustments and improvements.

In some implementations of the present application, as shown in FIG6 , the bit flip detection method further includes:

S124, identifying bad blocks in the flash memory, and if there are bad blocks in the target area, executing step S125.

A bad block refers to an area of the flash memory that cannot be erased or written. The data that should have been written to this block cannot be written, so the data read from the bad block is likely not the original data of the test file. If the bad block is not identified, the comparison result will be affected because it is not known whether the inconsistency in the comparison is caused by bit flipping or bad blocks.

S125. Determine replacement blocks other than bad blocks from non-target areas other than the target area in the flash memory.

S126: Transfer the data of the bad block to the replacement block.

Specifically, if there is a bad block in the target area to be detected, then it is necessary to know where the content that should have been stored in the bad block has been transferred to. If it is transferred to a replacement block that is not a bad block in a non-target area outside the target area, then this replacement block is added to the target area.

In a possible implementation, if there is no replacement block that meets the conditions, then the bad block is directly skipped, that is, the area where the bad block is located is removed from the target area.

The embodiments of the present application can screen out bad blocks appearing in a flash memory, eliminate abnormal results caused by the bad blocks, and improve robustness.

In a possible implementation, step S124 includes checking the bad block mark of the OOB area of each block in the flash memory, and determining the block with the bad block mark in the OOB area as a bad block.

The OOB area is used to store data other than file data, and the bad block mark is located in a preset field in the OOB area.

As an optional implementation, it is a common method to identify bad blocks by reading a certain field in the OOB data. For example, for a flash memory with a common page size of 2K, the bad block mark is the first byte of the OOB start position of the first page in the block, while for a flash memory with a page size of 512B or even 256B, the bad block mark is the sixth byte of the OOB start position of the first page in the block.

As an example and not a limitation, if the preset field in the OOB area is not 0xFF, it means that the block is a bad block. Correspondingly, all normal blocks, good blocks, have data in the preset field of 0xFF.

Optionally, the bad block can be identified based on the characteristic that the bad block cannot be erased. For example, after erasing all the data in the block, check whether the block is full of 0xFF data; if it is not full of 0xFF data, it means that the block was not successfully erased, and the block is likely to be a bad block.

The embodiment of the present application can determine the bad block through the bad block mark in the OOB area of the block, so that only the data of certain fields needs to be obtained, and there is no need to check all the data in the block.

In some implementations of the present application, as shown in FIG7 , the bit flip detection method further includes:

S14, acquiring an original test file corresponding to the flash memory, and a target test file read from the flash memory after writing the original test file into the flash memory.

During the internal testing phase of the flash memory, the prepared data may include the original test file before being burned into the flash memory.

S15. Compare the file data in the target area of the original test file with the file data in the target area of the target test file to obtain bit flip information of the flash memory; the target test file includes at least one of the first test file and the second test file.

Specifically, during internal testing, the original test file can be compared with the second test file read after the ECC check function is turned off to obtain bit flip information such as which positions are prone to bit flips. Then the original test file can be compared with the first test file read after the ECC check function is turned on to obtain the functional effect of ECC correction of bit flips.

In a possible implementation, multiple flash memories of the same size and layout can be prepared from the same batch, and then the same original test file can be burned into each flash memory in turn and then read to obtain multiple target test files. By comparing the original test file with each target test file, the bit flip information of each flash memory in this batch can be obtained, so that the bit flip situation of the flash memory can be more comprehensively understood, such as which sub-areas often have bit flips.

As an optional implementation, the bit flip information of each flash memory may be displayed in a chart form.

The embodiment of the present application can use the original test file as a judgment standard to compare with the target test file read from the flash memory. When the ECC calibration capability is limited, the bit flipping situation of the flash memory can be compared in an all-round way. The obtained bit flipping information is more comprehensive and accurate. In addition, not only can it be known which positions of the flash memory are prone to bit flipping, but also the size of the ECC inspection function can be tested.

In some implementations of the present application, as shown in FIG8 , the bit flip detection method further includes:

S141. Obtain the storage data volume of the flash memory and the file data volume of the original test file.

S142: Calculate the filling data amount based on the storage data amount and the file data amount.

S145. Fill additional data into the original test file according to the amount of filled data.

Among them, the additional data filled in can be OOB data. Specifically, generally speaking, the original test file does not carry OOB data. The target test file generated by rereading after being written to the flash memory carries OOB data. Therefore, if compared directly, the offset position will be incorrect, resulting in an erroneous comparison result.

As an example but not a limitation, obtain the block size, page size, OOB size and other data of the flash memory, and calculate how large a file carrying OOB is theoretically, that is, flash memory size = total number of blocks * number of pages in a block * (valid data area + OOB data area) in a page. If the size of the original test file provided is smaller than the theoretical size of the flash memory, then it is necessary to fill the original test file with OOB data first to ensure that the OOB offset of the original test file and the target test file for subsequent comparison is consistent.

Of course, there may be an original test file that carries OOB data. If the actual size of the original test file meets the flash memory size, proceed to the next step.

For example, the original test file is divided according to the structural information of the flash memory, and then the OOB data that needs to be filled in each page is calculated. If the theoretical OOB number required by the flash memory is 128 bytes, and the data size is 2048 bytes, then the size of a page is 2176. The original test file carries part of the OOB data, assuming it carries 64 bytes, then it will be found that the OOB layout carried by the input original test file does not meet the requirements. At this time, the actual page size of the original test file (data + OOB data) needs to be entered, which is 2048 + 64 = 2112 bytes. Compared with the flash memory size, it is calculated that the original test file needs to be filled with 2176-2112 = 64 bytes of OOB data.

The embodiment of the present application can ensure that the data size of the original test file and the target test file to be compared are consistent, thereby avoiding differences in the results.

In some embodiments of the present application, before step S11, the bit flip detection method also includes: performing scenario processing on the flash memory; the scenario processing includes at least one of aging processing, placing in a physical environment with a temperature greater than a first temperature threshold, placing in a physical environment with a temperature less than a second temperature threshold, and placing in a physical environment with a humidity greater than a humidity threshold.

In one possible implementation, multiple flash memories of the same batch may be prepared, and then a portion of the flash memories may be selected for aging processing, a portion of the flash memories may be placed in a physical environment with a temperature greater than a first temperature threshold, a portion of the flash memories may be placed in a physical environment with a temperature less than a second temperature threshold, and a portion of the flash memories may be placed in a physical environment with a humidity greater than a humidity threshold. Of course, the embodiments of the present application are not limited to the above-mentioned scenario-based processing.

Specifically, a temperature greater than a first temperature threshold is used to characterize high temperature, and a temperature less than a second temperature threshold is used to characterize low temperature; a humidity greater than a humidity threshold is used to characterize high humidity, and the threshold value can be set according to actual needs.

Then, the original test file is compared with the test files read from the flash memory in different scenarios, so as to compare the bit flipping conditions of the flash memory in different scenarios.

In a possible implementation, for the same flash memory, test files before and after scenario processing may be obtained, thereby comparing the flash memory bit flipping conditions before and after a certain scenario.

The embodiments of the present application can detect bit flipping situations that may occur in a flash memory under different scenarios, thereby making the bit flipping information of the flash memory more comprehensive.

It should be understood that the size of the serial numbers of the steps in the above embodiments does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

Corresponding to the bit flip detection method described in the above embodiment, FIG9 shows a structural block diagram of a bit flip detection device provided in an embodiment of the present application. For ease of explanation, only the part related to the embodiment of the present application is shown.

Referring to FIG9 , the device comprises:

The acquisition module 21 is used to read the first test file and the second test file from the flash memory; the first test file is obtained when the ECC check function is turned on, and the second test file is obtained when the ECC check function is turned off. The ECC check function is used to correct the data with bit flipping.

The partitioning module 22 is used to partition the flash memory into a plurality of sub-areas.

The detection module 23 is used to compare the file data in the target area of the first test file with the file data in the target area of the second test file to obtain the bit flip information of the flash memory; the target area is any one or more sub-areas of the multiple sub-areas.

In one possible implementation, the partitioning module 22 includes: a first partitioning unit, used to partition the flash memory according to preset structural information of the flash memory to obtain multiple pages; the preset structural information represents the number of pages of the flash memory; a second partitioning unit, used to divide the page into multiple sub-areas according to the preset size of the sub-area if the size of the page is larger than the preset size of the sub-area; a second determination unit, used to determine the page as a sub-area if the size of the page is less than or equal to the preset size of the sub-area.

In one possible implementation, the detection module 23 includes: a comparison unit, which is used to perform an XOR operation on the file data in the target area of the first test file and the file data in the target area of the second test file, and record the abnormal bits when the data are inconsistent; a first determination unit, which is used to obtain the bit flip information of the flash memory based on the number of abnormal bits and the abnormal bit addresses in the target area.

In one possible implementation, the first determination unit includes: a first determination sub-unit, which is used to determine the number of abnormal bits and the abnormal bit address of each sub-area in the target area as the bit flip information of the flash memory when the number of sub-areas in the target area is multiple; and a second determination sub-unit, which is used to determine the target sub-area with the largest number of abnormal bits, and determine the starting bit address of the target sub-area as the bit flip information of the flash memory.

In one possible implementation, the bit flip detection device also includes: an identification module, which is used to identify bad blocks in the flash memory. If there are bad blocks in the target area, a search module and a transfer module are called; the search module is used to determine replacement blocks other than bad blocks from non-target areas other than the target area in the flash memory; and the transfer module is used to transfer the data of the bad blocks to the replacement area.

In one possible implementation, the identification unit is used to check the bad block mark of the OOB area of each block in the flash memory, and determine the block with the bad block mark in the OOB area as a bad block; wherein the OOB area is used to store data other than file data, and the bad block mark is located in a preset field in the OOB area.

In a possible implementation, the bit flip detection device also includes: a second acquisition module, used to acquire an original test file corresponding to the flash memory, and a target test file read from the flash memory after writing the original test file to the flash memory; a second detection module, used to compare the file data in the target area of the original test file with the file data in the target area of the target test file to obtain the bit flip information of the flash memory; the target test file includes at least one of the first test file and the second test file.

In one possible implementation, the bit flip detection device also includes: a third acquisition module, used to obtain the storage data volume of the flash memory and the file data volume of the original test file; a calculation module, used to calculate the filling data volume based on the storage data volume and the file data volume; and a filling module, used to fill additional data into the original test file according to the filling data volume.

In one possible implementation, the bit flip detection device also includes: a processing module for performing scenario-based processing on the flash memory; the scenario-based processing includes at least one of aging processing, placing in a physical environment with a temperature greater than a first temperature threshold, placing in a physical environment with a temperature less than a second temperature threshold, and placing in a physical environment with a humidity greater than a humidity threshold.

It should be noted that the information interaction, execution process, etc. between the above-mentioned devices/units are based on the same concept as the method embodiment of the present application. Their specific functions and technical effects can be found in the method embodiment part and will not be repeated here.

The technicians in the relevant field can clearly understand that for the convenience and simplicity of description, only the division of the above-mentioned functional units and modules is used as an example for illustration. In practical applications, the above-mentioned function allocation can be completed by different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiment can be integrated in a processing unit, or each unit can exist physically separately, or two or more units can be integrated in one unit. The above-mentioned integrated unit can be implemented in the form of hardware or in the form of software functional units. In addition, the specific names of the functional units and modules are only for the convenience of distinguishing each other, and are not used to limit the scope of protection of this application. The specific working process of the units and modules in the above-mentioned system can refer to the corresponding process in the aforementioned method embodiment, which will not be repeated here.

An embodiment of the present application also provides an electronic device, which network device includes: at least one processor, a memory, and a computer program stored in the memory and executable on the at least one processor, wherein the processor implements the steps in any of the above-mentioned method embodiments when executing the computer program.

The electronic device 30 shown in FIG. 10 is merely an example and should not limit the functions and scope of use of the embodiments of the present invention.

The electronic device 30 may be in the form of a general-purpose computing device, for example, it may be a server device. The components of the electronic device 30 may include, but are not limited to: at least one processor 31, at least one memory 32, and a bus 33 connecting different device components (including the memory 32 and the processor 31).

The bus 33 includes a data bus, an address bus, and a control bus.

The memory 32 may include a volatile memory, such as a random access memory (RAM) 321 and a cache memory 322 , and may further include a read only memory (ROM) 323 .

The memory 32 may also include a program tool 325 having a set (at least one) of program modules 324, such program modules 324 including but not limited to: operating means, one or more applications, other program modules and program data, each of which or some combination may include the implementation of a network environment.

The processor 31 executes various functional applications and data processing, such as the data association method of the above embodiment, by running the computer program stored in the memory 32 .

The electronic device 30 may also communicate with one or more external devices 34. Such communication may be performed via an input/output (I/O) interface 35. Furthermore, the model-generated device 30 may also communicate with one or more networks via a network adapter 36. As shown in FIG. 10 , the network adapter 36 communicates with other modules of the model-generated device 30 via a bus 33. It should be understood that, although not shown in FIG. 10 , other hardware and/or software modules may be used in conjunction with the model-generated device 30, including but not limited to: microcode, device drivers, redundant processors, external disk drive arrays, RAID (RAID) devices, tape drives, and data backup storage devices.

It should be noted that although several units/modules or sub-units/modules of the electronic device are mentioned in the above detailed description, this division is merely exemplary and not mandatory. In fact, according to an embodiment of the present invention, the features and functions of two or more units/modules described above can be embodied in one unit/module. Conversely, the features and functions of one unit/module described above can be further divided into multiple units/modules to be embodied.

An embodiment of the present application further provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps in the above-mentioned method embodiments can be implemented.

The readable storage medium may include but is not limited to: a portable disk, a hard disk, a random access memory, a read-only memory, an erasable programmable read-only memory, an optical storage device, a magnetic storage device or any suitable combination of the above.

An embodiment of the present application provides a computer program product. When the computer program product runs on a mobile terminal, the mobile terminal can implement the steps in the above-mentioned method embodiments when executing the computer program product.

If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the present application implements all or part of the processes in the above-mentioned embodiment method, which can be completed by instructing the relevant hardware through a computer program. The computer program can be stored in a computer-readable storage medium, and the computer program can implement the steps of the above-mentioned various method embodiments when executed by the processor. Among them, the computer program includes computer program code, and the computer program code can be in source code form, object code form, executable file or some intermediate form. The computer-readable medium can at least include: any entity or device that can carry the computer program code to the camera/terminal device, recording medium, computer memory, read-only memory (ROM, Read-Only Memory), random access memory (RAM, RandomAccess Memory), electric carrier signal, telecommunication signal and software distribution medium. For example, USB flash drive, mobile hard disk, disk or optical disk. In some jurisdictions, according to legislation and patent practice, computer-readable media cannot be electric carrier signals and telecommunication signals.

In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described or recorded in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

Those of ordinary skill in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

In the embodiments provided in the present application, it should be understood that the disclosed devices/network equipment and methods can be implemented in other ways. For example, the device/network equipment embodiments described above are merely schematic. For example, the division of the modules or units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

The embodiments described above are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, a person skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. Such modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application, and should all be included in the protection scope of the present application.

Claims (11)

1. A method for detecting bit flipping, comprising: Reading a first test file and a second test file from a flash memory; the first test file is obtained when an ECC check function is turned on, and the second test file is obtained when the ECC check function is turned off; Dividing the flash memory into a plurality of sub-areas; The file data in the target area of the first test file is compared with the file data in the target area of the second test file to obtain the bit flip information of the flash memory; the target area is any one or more sub-areas of the multiple sub-areas. 2. The bit flip detection method according to claim 1, wherein the step of comparing the file data in the target area of the first test file with the file data in the target area of the second test file to obtain the bit flip information of the flash memory comprises: Performing an XOR operation on the file data in the target area of the first test file and the file data in the target area of the second test file, and recording an abnormal bit when the data are inconsistent; The bit flip information of the flash memory is obtained according to the number of abnormal bits and the abnormal bit addresses in the target area. 3. The bit flip detection method according to claim 2, wherein the step of obtaining the bit flip information of the flash memory according to the number of abnormal bits in the target area and the address of the abnormal bit comprises: When the number of sub-areas in the target area is multiple, determining the number of abnormal bits and the abnormal bit address of each sub-area in the target area as the bit flip information of the flash memory; A target sub-area having the largest number of abnormal bits is determined, and a starting bit address of the target sub-area is determined as the bit flip information of the flash memory. 4. The bit flip detection method according to claim 1, characterized in that before the step of comparing the file data in the target area of the first test file with the file data in the target area of the second test file, the bit flip detection method further comprises: Identify bad blocks in the flash memory, and if the target area has bad blocks, determine replacement blocks other than the bad blocks from non-target areas other than the target area in the flash memory; The data of the bad block is transferred to the replacement block. 5. The bit flip detection method according to claim 1, characterized in that the bit flip detection method further comprises: Acquire an original test file corresponding to the flash memory, and a target test file read from the flash memory after writing the original test file into the flash memory; The file data in the target area of the original test file is compared with the file data in the target area of the target test file to obtain the bit flip information of the flash memory; the target test file includes at least one of the first test file and the second test file. 6. The bit flip detection method according to claim 5, characterized in that before the step of comparing the file data in the target area of the original test file with the file data in the target area of the target test file, the bit flip detection method further comprises: Acquire the storage data volume of the flash memory and the file data volume of the original test file; Calculate the filling data amount based on the storage data amount and the file data amount; The original test file is filled with additional data according to the amount of filled data. 7. The bit flip detection method according to claim 1, characterized in that before the step of reading the first test file and the second test file from the flash memory, the bit flip detection method further comprises: The flash memory is subjected to scenario-based processing; the scenario-based processing includes at least one of aging processing, placing in a physical environment with a temperature greater than a first temperature threshold, placing in a physical environment with a temperature less than a second temperature threshold, and placing in a physical environment with a humidity greater than a humidity threshold. 8. The bit flip detection method according to claim 1, wherein the step of dividing the flash memory into a plurality of sub-areas comprises: Dividing the flash memory according to preset structural information of the flash memory to obtain a plurality of pages; the preset structural information represents the number of pages of the flash memory; If the size of the page is larger than the preset size of the sub-area, dividing the page into a plurality of sub-areas according to the preset size of the sub-area; If the size of the page is smaller than or equal to the preset size of the sub-region, the page is determined as the sub-region. 9. A bit flip detection device, comprising: An acquisition module, used for reading a first test file and a second test file from a flash memory; the first test file is obtained when an ECC check function is turned on, and the second test file is obtained when the ECC check function is turned off, and the ECC check function is used for correcting data with bit flipping; A partitioning module, used for partitioning the flash memory into a plurality of sub-areas; A detection module is used to compare the file data in the target area of the first test file with the file data in the target area of the second test file to obtain the bit flip information of the flash memory; the target area is any one or more sub-areas of the multiple sub-areas. 10. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the bit flip detection method according to any one of claims 1 to 8 when executing the computer program. 11. A computer-readable storage medium storing a computer program, wherein the computer program, when executed by a processor, implements the bit flip detection method according to any one of claims 1 to 8.