Wearable biological information monitoring equipment and method based on artificial intelligence chip
Technical Field
The disclosure relates to the field of biological information monitoring, in particular to wearable biological information monitoring equipment and a method based on an artificial intelligence chip.
Background
Various physiological parameters of the human body, from the commonly used blood pressure, body temperature, heart rate, pulse, to more complex visceral activity, change in different physiological states or different pathological states. Physiological changes of various parameters are the reaction of the human body to adapt to the cooperative work of various organs and tissues in different states, and the change of various parameters in pathological states reflects the state of the disease process of the human body. Clinically, the parameters are usually obtained under the condition that various states are known, such as the change of blood pressure and heart rate after exercise, and the measurement is carried out immediately after the exercise, so that a specific examination position and examination time delay exist, and the physiological parameters under the specific state are not favorably reflected accurately. However, most of the existing technologies, namely cardiac ultrasonic examination, which is the most convenient and accurate technology for determining heart failure, need specific resting and lying position examination, and can not find the abnormal cardiac function which can be shown after the activity in time.
In order to solve the problems, wearable biological information monitoring equipment is used for acquiring heart rate, blood pressure and electrocardio signals. These devices either require multiple signal detection lines to cause cumbersome wearing and signal detection susceptible to interference, or the detection mode is too simple and less accurate. Currently, wearable physiological parameter measuring equipment comprises various types of equipment worn on the wrist, the chest and the like, and can detect heart rate, blood oxygen saturation, blood pressure, electrocardiosignals and the like. Generally, a PhotoPlethysmoGraphy (PhotoPlethysmoGraphy) method, which is abbreviated as a PPG method, is adopted, or an electrocardiosignal, pulse wave detection and korotkoff sound detection are adopted, or a combination of the methods is adopted. The inventor finds that the accuracy rate is low in the ubiquitous problem of the above scheme in the research and development process, and the existing solution is to increase the complexity of the device to obtain more comprehensive and accurate biological information, which means that the device must perform more information processing, which inevitably causes the volume of the device to increase, not only increases the power consumption of the device and is not beneficial to wearing, but also has poor wearing experience. In addition, hydrodynamic parameters such as tissue blood flow and intra-articular pressure are important parameters for evaluating the functions of organs, tissues and especially micro joints, and the indexes are difficult to realize by the existing wearable detection technology. More importantly, the collected biological information is visualized, such as the movement of blood vessels and the blood flow speed display, the collected information is required to be calculated, image reconstruction is required after signal processing, more hardware devices such as integrated circuits and board cards are required, and due to large calculation amount and large power consumption, even if some systems upload the collected information to a cloud or a network, and signal processing is performed by using a cloud computing or network platform, the problem of real-time transmission efficiency of a large amount of data still exists.
Disclosure of Invention
In order to overcome the defects of the prior art, the present disclosure provides a wearable biological information monitoring system based on an artificial intelligence chip and a working method thereof.
The technical scheme of the artificial intelligence chip provided by one aspect of the disclosure is as follows:
an artificial intelligence chip comprises a four-level composite instruction pipeline and an FPE (fixed point processing engine) array convolution computing unit;
the four-level composite instruction assembly line comprises a first instruction assembly line for acquiring a matrix operation instruction, a second instruction assembly line for processing the monitored biological information original data, a third instruction assembly line for performing matrix, arithmetic, fixed point multiplication and point multiplication operations on the processed biological information original data, and a fourth instruction assembly line for loading and storing the monitored biological information original data;
and the FPE array convolution calculating unit is used for performing accumulation processing on the biological information original data processed by the second instruction pipeline and the third instruction pipeline, and reconstructing an imaging mode, an imaging region of interest and a key structure point.
Further, the first instruction pipeline comprises an instruction pre-fetch buffer for pre-fetching instruction data received by the instruction interface; the fourth instruction pipeline includes a load store unit to read the monitored raw data of the biometric information stored by the off-chip mass memory through the data interface.
Furthermore, the second instruction pipeline comprises a decoder and a general purpose register, the decoder decodes the instruction data stored in the instruction prefetch buffer, the general purpose register obtains the data after the third instruction pipeline is executed, the monitored biological information original data stored in the fourth instruction pipeline and the calculation result of the FPE array convolution calculation unit, and performs logic operation processing on the data, and the data after the decoder decodes and the data after the general purpose register are executed are respectively input to the third instruction pipeline and the FPE array convolution calculation unit and are simultaneously fed back to the first instruction pipeline.
Furthermore, the third instruction pipeline comprises a current state register, an arithmetic logic unit, a fixed-point multiplication unit and a point multiplication calculation unit; and the current state register, the arithmetic logic unit, the fixed point multiplication unit and the point multiplication calculation unit are used for respectively carrying out matrix operation, logic operation, fixed point multiplication accumulation operation and point multiplication operation processing on the biological information original data processed by the second instruction pipeline.
Furthermore, the FPE array convolution calculating unit comprises a plurality of multiply-accumulate processing unit groups consisting of a plurality of multiply-accumulate processing units connected in series, each multiply-accumulate processing unit group is connected with a buffer, the buffers are connected with an SRAM (static random access memory) through a bus, and the SRAM is connected with a DMA (direct memory access) controller; the multiply-accumulate processing unit group respectively processes a plurality of input biological information original data, the processed biological information data are input to the DMA controller through the buffer and the SRAM memory, the DMA controller reconstructs an imaging mode, an imaging interested region and a key structure point according to the processed biological information data, and the imaging mode, the imaging interested region and the key structure point data are stored in the SRAM memory.
The technical scheme of the wearable biological information monitoring equipment based on the artificial intelligence chip provided by the disclosure on the one hand is as follows:
a wearable biological information monitoring device based on an artificial intelligence chip comprises an analog front end circuit module, a digital front end module and the artificial intelligence chip;
the analog front-end circuit module is used for generating voltage pulse for exciting the ultrasonic transducer, receiving echo electric signals collected by the ultrasonic area array transducer, performing impedance matching on the echo electric signals, and inputting the echo electric signals after the impedance matching into the digital front-end module after amplification and analog/digital conversion;
the artificial intelligence chip carries out different operations on the biological information original data according to the imaging purpose and the imaging mode to obtain an imaging region of interest and key structure points, and outputs a control instruction to the digital front-end module;
the digital front-end module is used for collecting echo signals of a required imaging point after receiving a control instruction output by the artificial intelligence chip and carrying out dynamic beam forming on the echo signals; and the signals after beam synthesis are subjected to filtering, orthogonal demodulation, batch processing and flow rate estimation, so that ultrasonic image reconstruction and real-time imaging are realized.
Further, the analog front-end circuit module comprises a high-voltage pulse chip, an ultrasonic transmitting unit and an analog front-end receiving unit;
the high-voltage pulse chip is connected with the ultrasonic area array transducer through an interface, receives an echo electric signal collected by the ultrasonic area array transducer and transmits the echo electric signal to the ultrasonic transmitting unit;
the ultrasonic transmitting unit comprises a transmitting/receiving change-over switch and a signal transmitter, wherein the input end of the signal transmitter is connected with a transmitting channel beam synthesizer in the digital front-end module, and the output end of the signal transmitter is connected with the transmitting/receiving change-over switch and is used for generating voltage pulses for exciting the ultrasonic transducer; the transmitting/receiving conversion switch is respectively connected with the high-voltage pulse chip and the analog front-end receiving module and is used for transmitting an electric pulse signal for exciting the ultrasonic transducer to the high-voltage pulse chip, receiving an echo electric signal sent by the high-voltage pulse chip, carrying out impedance matching and then transmitting the echo signal after impedance matching to the analog front-end receiving unit;
the analog front end receiving unit comprises a preamplifier and an analog/digital converter, and the echo electric signal after impedance matching is input into the digital front end module after being amplified by the preamplifier and converted by the analog/digital converter.
Further, the digital front-end module comprises a transmitting channel beam synthesizer, a time gain compensation, a receiving channel beam synthesizer, a direct current filter, a demodulator and a processor;
the time gain compensation is connected with the receiving channel beam synthesizer and is used for compensating the energy attenuation of the echo signal in the propagation process; the receiving channel beam synthesizer is connected with the analog front end receiving unit and the artificial intelligence chip and is used for receiving a control instruction sent by the artificial intelligence chip, acquiring an echo signal of a key point required to be imaged and carrying out dynamic beam synthesis; and the signals after beam synthesis are filtered by a direct current filter, orthogonally demodulated by a demodulator and processed by a processor, so that ultrasonic image reconstruction and real-time imaging are realized.
Furthermore, the analog front-end circuit module, the digital front-end module and the artificial intelligence chip respectively adopt flexible circuits.
The technical scheme of the working method of the wearable biological information monitoring equipment based on the artificial intelligence chip provided by the other aspect of the disclosure is as follows:
a working method of wearable biological information monitoring equipment based on an artificial intelligence chip comprises the following steps:
the ultrasonic transmitting unit generates voltage pulse for exciting the ultrasonic transducer and transmits the voltage pulse to the high-voltage pulse chip;
the high-voltage pulse chip receives an echo electric signal collected by the ultrasonic area array transducer and transmits the echo electric signal to the ultrasonic transmitting unit;
the ultrasonic transmitting unit receives the echo electric signal transmitted by the high-voltage pulse chip and performs impedance matching on the echo electric signal;
the echo electric signal after impedance matching is input into a digital front-end module after being amplified and subjected to analog/digital conversion by a front-end receiving unit;
the artificial intelligent chip performs different operations according to the imaging purpose and the imaging mode to obtain an imaging region of interest and a key structure point, and outputs a control instruction to the digital front-end module;
after receiving a control instruction output by the artificial intelligence chip, the digital front-end module acquires an echo signal of a required imaging point and performs dynamic beam forming on the echo signal;
and the signals after beam synthesis are filtered by a direct current filter, subjected to quadrature demodulation by a demodulator and processed by a processor, so that ultrasonic image reconstruction and real-time imaging are realized.
Through above-mentioned technical scheme, this disclosed beneficial effect is:
(1) the artificial intelligence chip has strong on-site computing capability, and can complete the computing process which can be completed by a traditional large-scale integrated circuit board card on a microchip, so that more complex and complete biological information can be obtained on wearable equipment and then processed immediately;
(2) the artificial intelligence chip disclosed by the invention has the advantages of reconfigurability, so that the chip is suitable for various artificial intelligence network structures such as RNN, CNN and FCN, and a chip user or an application party can easily use an artificial intelligence algorithm instruction to realize a brain-like function which simultaneously supports spatial distribution and time length memory without knowing the physical structure of the chip, so that a biological learning model of a human brain is better simulated, and the compatibility of the artificial intelligence chip on various information processing when the artificial intelligence chip is used on wearable monitoring equipment is increased;
(3) the method has the characteristics of on-chip increment training, continuously improves the calculation precision of the chip through self-adaptive learning capacity, can cope with different algorithm application environments, is suitable for calculation and processing of different biological information, and is suitable for different information visualization processes;
(4) the method has the advantages of having the function of sparse network calculation with adjustable fixed point number, achieving the calculation precision of approximate floating point number, and realizing the key requirements of high-precision calculation and low power consumption of the embedded system on chip.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this disclosure, are included to provide a further understanding of the disclosure, and are incorporated in and constitute a part of this specification, illustrate exemplary embodiments of the disclosure and together with the description serve to explain the application and not to limit the disclosure.
FIG. 1 is a block diagram of an SOC chip according to an embodiment;
FIG. 2 is a block diagram of an SOC chip pipeline architecture according to an embodiment;
FIG. 3 is a block diagram of an embodiment of a FPE array convolution calculation unit;
fig. 4 is a structural diagram of a wearable biological information monitoring device based on an SOC chip according to the second embodiment.
Detailed Description
The present disclosure is further described with reference to the following drawings and examples.
It should be noted that the following detailed description is exemplary and is intended to provide further explanation of the disclosure. Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs.
It is noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of example embodiments according to the present application. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, and it should be understood that when the terms "comprises" and/or "comprising" are used in this specification, they specify the presence of stated features, steps, operations, devices, components, and/or combinations thereof, unless the context clearly indicates otherwise.
Example one
In order to solve the problems of low power consumption and high throughput of the wearable biological information monitoring device, the defects of weak universality, low throughput, high power consumption and incapability of simultaneously supporting multiple different network types in the traditional artificial intelligence processing hardware system are overcome.
Referring to fig. 1, the SOC chip includes a four-level complex instruction pipeline and an FPE array convolution calculation unit; wherein:
the first instruction pipeline comprises an instruction pre-fetching buffer, the instruction pre-fetching buffer is used for pre-fetching instruction data received by the instruction interface, the instruction data comprises instructions and operation data used for matrix operation, and the instruction data is input to a decoder of the second instruction pipeline after being fetched.
The second instruction pipeline comprises a decoder and a general purpose register, wherein the decoder is used for decoding the instruction and the operation data used for the matrix operation after the instruction is fetched; the general purpose register is used for acquiring data after the execution of the third instruction assembly line, monitored biological information original data stored in the fourth instruction assembly line and a matrix operation result obtained by calculation of the FPE array convolution calculation unit, carrying out logic and arithmetic operation processing on the matrix operation result, inputting data decoded by the decoder and data after operation processing of the general purpose register into the third instruction assembly line and the FPE array convolution calculation unit respectively after execution, and feeding back the data decoded by the decoder and the data after analysis processing of the general purpose register to the first instruction assembly line.
The third instruction pipeline comprises a current state register, an arithmetic logic unit, a fixed point multiplication unit and a point multiplication calculation unit; the current state register is used for receiving the processed monitored biological information original data, performing matrix operation processing, and transmitting the processed data to an off-chip large-capacity memory through a data interface; the arithmetic logic unit is used for receiving the processed monitored biological information original data, performing logic operation processing, and inputting the processed data into a general purpose register of a second instruction pipeline; the fixed-point multiplication unit is used for receiving the processed monitored biological information original data, performing fixed-point number multiplication accumulation operation processing, and inputting the processed data into a general purpose register of a second instruction pipeline; and the point multiplication computing unit is used for receiving the processed monitored biological information original data, performing point multiplication operation processing on the vector, and inputting the processed data into a general purpose register of a second instruction pipeline.
The fourth instruction pipeline comprises a load-store unit, and the load-store unit is used for reading the monitored biological information original data stored in the off-chip mass storage through the data interface and inputting the biological information original data into a general purpose register of the second instruction pipeline.
In this embodiment, since the data transfer and computation time of the FPE array convolution computation unit far exceed a single clock cycle, even reach thousands of clock cycles, the conventional pipeline structure cannot be adopted, and the concept of the composite pipeline structure is adopted to solve the balance problem of the pipeline. The SOC chip of the composite pipeline structure adopts two different pipeline structures of a short calculation time pipeline and a long calculation time pipeline, the short time pipeline is a conventional single-cycle pipeline structure, and the long time pipeline structure averages data carrying and data calculation time of each layer according to the characteristics of an artificial intelligence deep learning algorithm, so that the efficiency of the pipeline is increased, and the probability of cavitation bubble generation is reduced, as shown in figure 2.
Referring to fig. 3, the FPE array convolution calculating unit includes 128 multiply-accumulate processing units PE, 32 buffers, SRAM memory, and DMA controller, each 4 multiply-accumulate processing units process 4 lines of monitored raw data of biological information, and a 192-byte buffer is connected every 4 multiply-accumulate processing units, the 32 buffers are connected with a 16 Mbyte global SRAM memory through a 64-bit bus, the SRAM is connected with a DMA controller for controlling the addressing and reading and writing operations of the SRAM, used for acquiring all biological information data processed by the multiply-accumulate processing unit, reconstructing an imaging mode, positioning an imaging region of interest and key structure points, and storing the imaging mode, the imaging region of interest and the critical structure point data in an SRAM memory, and controlling a receiving channel beam synthesizer unit to acquire signals of the required imaging points according to the imaging interesting area and the key structure points.
The array convolution calculating unit greatly reduces data carrying and interaction between the external high-capacity DDR of the SOC chip and the internal of the SOC chip, reduces the area of the chip, and greatly reduces the power consumption of the SOC chip on the processing of the cardiac ultrasonic data.
The SOC chip throughput rate provided by the embodiment exceeds 50GOP/s (under the clock frequency of 200 MHz), namely, more than 50 multiplied by 109 times of 16-bit multiplication and accumulation operation can be carried out every second; and the precision of the fixed point number can be changed into 8 bits to increase the processing speed by 4 times according to requirements, or even the clock frequency is changed into 400 MHz to increase the processing speed by 8 times compared with the initial state, and the error of the calculation precision does not exceed 2 percent. The method is suitable for various artificial intelligent network structures, realizes the calculation precision and high throughput rate which are similar to floating point numbers, and more importantly, keeps low power consumption.
Example two
Referring to fig. 4, the system includes an analog front end circuit module, a digital front end module, and the SOC chip according to the first embodiment.
Specifically, the analog front-end circuit module comprises a high-voltage pulse chip, an ultrasonic transmitting unit and an analog front-end receiving unit, wherein the high-voltage pulse chip is connected with the ultrasonic area array transducer through an interface, and is also connected with a transmitting/receiving conversion switch in the ultrasonic transmitting unit, and is used for receiving an echo electric signal acquired by the ultrasonic area array transducer and transmitting the echo electric signal to the ultrasonic transmitting unit; the ultrasonic transmitting unit comprises a transmitting/receiving change-over switch and a signal transmitter, wherein the input end of the signal transmitter is connected with a transmitting channel beam synthesizer in the digital front-end module, and the output end of the signal transmitter is connected with the transmitting/receiving change-over switch and is used for generating a voltage pulse of an exciting ultrasonic transducer with a peak value of 70V; the transmitting/receiving conversion switch is respectively connected with the high-voltage pulse chip and a preamplifier in the analog front-end receiving module and is used for transmitting an electric pulse signal for exciting the ultrasonic transducer to the high-voltage pulse chip, receiving an echo electric signal sent by the high-voltage pulse chip, carrying out impedance matching, and transmitting the echo signal after the impedance matching to the analog front-end receiving unit so as to realize flexible switching between a transmitting signal and a receiving signal; the analog front end receiving unit comprises a preamplifier and an analog/digital converter, and the echo electric signal after impedance matching enters a receiving channel beam synthesizer in the digital front end module for beam synthesis after being amplified by the preamplifier and converted by the analog/digital converter.
The digital front-end module is integrated in a Field Programmable Gate Array (FPGA) chip and comprises a transmitting channel beam synthesizer, a time gain compensation device, a receiving channel beam synthesizer, a direct current filter, a demodulator and a processor, wherein the transmitting channel beam synthesizer is connected with a signal transmitter and is used for delaying the pulse of the signal transmitter so as to realize focusing at a specific point in space and excite the pulse generation of the signal transmitter; the time gain compensation is connected with the receiving channel beam synthesizer and is used for compensating the energy attenuation of the echo signal in the propagation process; the receiving channel beam synthesizer is connected with the analog front end receiving unit and the SOC chip and is used for calculating the echo signal delay time of each point in space at a pre-adjusting stage and carrying out dynamic beam synthesis on the echo signal after time gain compensation; in the moving stage, receiving an instruction of an SOC chip and only carrying out beam synthesis on echo signals from key points; and the signals after beam synthesis are subjected to filtering by a direct current filter, orthogonal demodulation by a demodulator, Echo processing by a processor, blood flow velocity estimation and the like, so that ultrasonic image reconstruction and real-time imaging are realized.
In the embodiment, the SOC chip executes different operations of the artificial intelligence network according to the imaging purpose (e.g. cardiac imaging, blood vessel imaging) and the imaging mode (e.g. using a cloud architecture, a portable integrated imaging platform), and controls the receiving channel beam combiner unit to perform signal acquisition on the desired imaging point according to the imaging region of interest and the cardiac key structure points (e.g. annulus, apex, and wall).
The wearable biological information monitoring equipment provided by the embodiment integrates digital front end integration by using the FPGA, realizes field calculation and controls the FPGA by using the SOC chip, controls the analog front end circuit module, and realizes the functions of all parts of the traditional large-scale ultrasonic equipment framework on a miniaturized module group. Besides the miniaturization characteristic, low voltage and low power consumption are realized, and heat generation is reduced.
The circuit board and the connecting circuit of each module in the wearable biological information monitoring device provided by the embodiment all adopt flexible circuits, such as circuits of processes of films or bonding sheets of polymer materials such as polyimide, polyester, terylene and the like, or circuits of processes of vacuum spraying of metal materials such as copper, aluminum and the like, so that the wearable biological information monitoring device is realized. Including, but not limited to, Lead lines (Lead lines), Printed circuits (Printed circuits), connectors (connectors), and integrated systems of multiple functions (Integration).
EXAMPLE III
The embodiment provides a working method of wearable biological information monitoring equipment based on an SOC chip, which comprises the following steps:
step 1, a signal transmitter of an ultrasonic transmitting unit receives an excitation signal transmitted by a transmitting channel beam synthesizer in a digital front-end module, generates a voltage pulse for exciting an ultrasonic transducer, and transmits the voltage pulse to a high-voltage pulse chip through a transmitting/receiving change-over switch of the ultrasonic transmitting unit.
And 2, receiving the echo electric signals collected by the ultrasonic area array transducer by the high-voltage pulse chip and transmitting the echo electric signals to a transmitting/receiving conversion switch of the ultrasonic transmitting unit.
And 3, receiving the echo electric signal transmitted by the high-voltage pulse chip by a transmitting/receiving conversion switch of the ultrasonic transmitting unit, performing impedance matching on the echo electric signal, and transmitting the echo signal after impedance matching to the analog front-end receiving unit.
And 4, the echo electric signals after impedance matching are amplified by a preamplifier of the front-end receiving unit and converted by an analog-digital converter, and then enter a receiving channel beam synthesizer in the digital front-end module for beam synthesis.
And 5, the SOC performs different artificial intelligence network operations according to the imaging purpose and the imaging mode to obtain an imaging region of interest and key structure points, and outputs a control instruction to the digital front-end module.
Step 6, the digital front-end module receives a control instruction output by the SOC chip, acquires an echo signal of a required imaging point, and performs dynamic beam forming by using the acquired signal; the signals after beam synthesis are filtered by a direct current filter, demodulated and processed by a demodulator quadrature demodulator and a processor Echo, and processed by each unit of blood flow velocity estimation, so that ultrasonic image reconstruction and real-time imaging are realized.
From the above description, it can be seen that the above-described embodiments of the present application achieve the following technical effects:
(1) the artificial intelligence chip has strong on-site computing capability, and can complete the computing process which can be completed by a traditional large-scale integrated circuit board card on a microchip, so that more complex and complete biological information can be obtained on wearable equipment and then processed immediately;
(2) the artificial intelligence chip disclosed by the invention has the advantages of reconfigurability, so that the chip is suitable for various artificial intelligence network structures such as RNN, CNN and FCN, and a chip user or an application party can easily use an artificial intelligence algorithm instruction to realize a brain-like function which simultaneously supports spatial distribution and time length memory without knowing the physical structure of the chip, so that a biological learning model of a human brain is better simulated, and the compatibility of the artificial intelligence chip on various information processing when the artificial intelligence chip is used on wearable monitoring equipment is increased;
(3) the method has the characteristics of on-chip increment training, continuously improves the calculation precision of the chip through self-adaptive learning capacity, can cope with different algorithm application environments, is suitable for calculation and processing of different biological information, and is suitable for different information visualization processes;
(4) the method has the advantages of having the function of sparse network calculation with adjustable fixed point number, achieving the calculation precision of approximate floating point number, and realizing the key requirements of high-precision calculation and low power consumption of the embedded system on chip.
Although the present disclosure has been described with reference to specific embodiments, it should be understood that the scope of the present disclosure is not limited thereto, and those skilled in the art will appreciate that various modifications and changes can be made without departing from the spirit and scope of the present disclosure.