CN111883449A - Method for improving height uniformity of electroplated bump - Google Patents
Method for improving height uniformity of electroplated bump Download PDFInfo
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- CN111883449A CN111883449A CN202010560453.5A CN202010560453A CN111883449A CN 111883449 A CN111883449 A CN 111883449A CN 202010560453 A CN202010560453 A CN 202010560453A CN 111883449 A CN111883449 A CN 111883449A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
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- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D7/00—Electroplating characterised by the article coated
- C25D7/12—Semiconductors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/114—Manufacturing methods by blanket deposition of the material of the bump connector
- H01L2224/1146—Plating
- H01L2224/11462—Electroplating
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
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- H01L2224/117—Manufacturing methods involving monitoring, e.g. feedback loop
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Abstract
The invention discloses a method for improving the height uniformity of an electroplated bump, which is applied to a product with a bump opening smaller than the height, and comprises the following steps: providing a plurality of test wafers, coating photoresist with different thicknesses on the test wafers in sequence, and then carrying out exposure and development; electroplating each wafer, and obtaining first height information of the electroplated bump; the glue thickness corresponding to the test wafer with the best height uniformity of the electroplated bumps is a preset glue thickness; providing a test wafer, and carrying out electroplating bump operation according to the preset glue thickness to obtain second height information of the electroplating bumps; judging whether the height uniformity of the electroplated bumps exceeds a preset value or not; if so, defining the area of the wafer with the height uniformity of the electroplated bumps exceeding the preset value as an area to be optimized, and modifying the power line baffle area corresponding to the area to be optimized until the height uniformity of the electroplated bumps does not exceed the preset value.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a method for improving the height uniformity of an electroplated bump.
Background
In order to package a chip, a wafer (wafer) must have bumps (bumps) thereon to connect with a substrate of the package. Each wafer can be cut into whole dies (die) to form a single chip, a plurality of metal contact pads are formed on the wafer according to the number of the dies, the metal contact pads are separated by a passivation layer, when the bump is manufactured, a Under Bump Metallurgy (UBM) structure is formed on the metal contact pads, then a tin-silver metal layer is formed on the under bump metal layer, and the tin-silver metal layer is solidified to form the bump after reflow soldering.
However, with the development of miniaturization and high performance of packaging technology, uniformity of plated bumps (bump) is an important index for products, and poor uniformity of plated bump height affects subsequent manufacturing, and insufficient soldering and poor soldering can be caused by uneven bump height in the soldering process.
According to Faraday，The Law Law, the electroplating height is related to current density and electroplating area, because the lug opening of design generally appoints for the customer, then the electroplating area is the definite value, under the condition that the electroplating area is the definite value, the electroplating lug height of different openings of contrast, the opening is littleer, it is big more to the homogeneity of electroplating lug height, especially the stability of the product that is less than 1 at electroplating opening/height design is worse, simultaneously according to the requirement of different lug openings, the homogeneity of lug height also can be influenced to different photoresist thickness.
Therefore, a new technical solution is needed to solve the problem of poor uniformity of bump height when the bump opening/height is less than 1 in the prior art.
Disclosure of Invention
In view of the above problems in the prior art, it is an object of the present invention to provide a method for improving the uniformity of the height of plated bumps, which can improve the uniformity of the height of plated bumps with openings smaller than the height.
In order to solve the technical problems, the specific technical scheme of the invention is as follows:
the invention provides a method for improving the height uniformity of an electroplated bump, which is applied to a product with an electroplated opening smaller than the height and comprises the following steps:
providing a plurality of test wafers, coating photoresist with different thicknesses on the test wafers in sequence, and then carrying out exposure and development to obtain the photoresist thickness information of each test wafer;
sequentially carrying out electroplating bump processing on the test wafer, and obtaining first height information of the electroplating bumps;
comparing first height information of the electroplated bumps of the plurality of test wafers, wherein the photoresist thickness corresponding to the test wafer with the best electroplated bump height uniformity is a preset photoresist thickness;
providing a test wafer again, and performing gluing, exposure, development and bump electroplating on the test wafer according to the preset glue thickness to obtain second height information of the bump electroplating;
judging whether the height uniformity of the electroplating bumps exceeds a preset value or not according to the second height information of the electroplating bumps;
if so, defining the area of the test wafer, in which the height uniformity of the electroplated bumps exceeds the preset value, as an area to be optimized, and reconstructing the power line baffle area corresponding to the area to be optimized until the height uniformity of the electroplated bumps does not exceed the preset value.
Further, the providing a plurality of test wafers, coating the test wafers with photoresists with different thicknesses in sequence, and then performing exposure and development, wherein before obtaining the photoresist thickness information of each test wafer, the providing a plurality of test wafers comprises:
determining the size and the preset height of a preset opening of a test wafer electroplating bump;
and obtaining a plurality of photoresist thickness information according to the preset opening size and the preset height of the electroplating bump.
Optionally, the predetermined opening size of the electroplating bump is 50um-70um, the predetermined height of the electroplating bump is 80um-100um, the number of the test wafers is multiple, and the coating thickness of the photoresist on the test wafers is 80um-110 um.
Further, the obtaining the first height information of the electroplating bump or the obtaining the second height information of the electroplating bump comprises:
obtaining a plurality of measurement areas in the test wafer, wherein the measurement areas are arranged in a shape of a Chinese character mi;
obtaining height information of electroplated bumps in a plurality of measurement areas;
and acquiring first height information or second height information of the electroplating bumps in the test wafer according to the height information of the electroplating bumps in the plurality of measurement areas.
Further, a plurality of the measurement regions each contain the same number of individual chips.
Preferably, the acquiring of the height information of the plated bump in the measurement area comprises:
and acquiring the height information of the electroplating lug of each chip in the measuring area.
Preferably, the number of the measurement regions is 13.
Further, the modifying the power line baffle area corresponding to the area to be optimized includes:
and pasting an adhesive tape on the power line baffle area corresponding to the area to be optimized.
Preferably, the adhesive tape is a corrosion-resistant high-temperature adhesive tape.
Optionally, after the adhesive tape is pasted on the power line baffle area corresponding to the area to be optimized, the method includes:
and opening holes in the adhesive tape.
By adopting the technical scheme, the method for improving the height uniformity of the electroplated bump has the following beneficial effects:
1. according to the method for improving the height uniformity of the electroplated bumps, the height difference of the bumps of the whole wafer and the height difference of the bumps of the single chip can be kept within a reasonable range by reasonably selecting the thickness of the photoresist, so that the yield of products is improved.
2. According to the method for improving the height uniformity of the electroplated lug, the difference amplification of the height of the electroplated lug caused by uneven distribution of the power lines is reduced through the optimization of the point power line baffle, so that the stability of a product is improved, and the welding stability in the later product manufacturing process is improved.
3. The method for improving the height uniformity of the electroplated bump is simple and clear, and the power line baffle structure with the proper glue thickness can be quickly selected according to different customer requirements, so that the production efficiency and yield of finished products are improved.
Drawings
In order to more clearly illustrate the technical solution of the present invention, the drawings used in the description of the embodiment or the prior art will be briefly described below. It is obvious that the drawings in the following description are only some embodiments of the invention, and that for a person skilled in the art, other drawings can be derived from them without inventive effort.
FIG. 1 is a schematic representation of the steps of a method of improving the uniformity of the height of plated bumps according to the present invention;
FIG. 2 is a schematic diagram of a Mi-word thirteen-point measurement in the embodiment of the present specification;
fig. 3 is a schematic diagram of an embodiment of the present disclosure in which an adhesive tape is attached to a power line shield.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be obtained by a person skilled in the art without any inventive step based on the embodiments of the present invention, are within the scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in sequences other than those illustrated or described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, apparatus, article, or device that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or device.
Example 1
With the development of chip technology, the requirements for chip packaging technology are increasing, especially the stability of the plated bump (bump) directly affects the yield of wafer (wafer) production, and the instability of the plated bump is mainly reflected in uneven bump height, which may cause the phenomena of insufficient solder and weak solder in the soldering process.
Electroplating bump height is mainly influenced by photoresist thickness and current density, photoresist with different thicknesses can directly influence the electroplating bump height, and the photoresist thickness cannot be uniformly distributed when the photoresist is coated, so that the electroplating bump height is not uniform during electroplating, the current density can influence the electroplating height, and the electroplating area is a fixed value because a designed bump opening is specified by a customer, and the electroplating bump height with different openings is smaller and more influenced by the smaller opening under the condition that the electroplating area is the fixed value. The opening shape of the power line baffle, the position of the power line baffle in the plating tank, the edge effect in the plating process and the like all influence the distribution of the power lines, thereby influencing the height uniformity of the plating bump. The height of wafer edge die balls can be affected by the size of the ring (ring) of the power line baffle, and particularly for products with small electroplated bump openings, the ring of the conventional power line baffle is too large for products with 60um openings, so that the fluctuation of the uniformity of the electroplated balls is difficult to control.
In the aspect of wafer electroplating, the calculation formula of the height uniformity of the electroplating bumps of the whole wafer or a single chip is as follows:
wherein TTV is the height uniformity of plated bumps on wafer, HmaxElectroplating the wafer with the maximum bump height, HminElectroplating a minimum bump height, H, for a waferavePlating the average height of the bumps on the wafer; therefore, the uniformity of the height of the plated bumps as expressed in the embodiments of the present specification preferably means that the uniformity of the height of the plated bumps is minimal. When the uniformity of the height of the plated bumps on the wafer is the minimum, the uniformity of the plated bumps on the wafer is the best.
Embodiments of the present disclosure provide a method for improving uniformity of height of plated bumps, which is used for plated bump openings/products with height less than 1, i.e., products with aspect ratio greater than 1.
Specifically, as shown in fig. 1, which is a diagram illustrating steps of a method for improving uniformity of height of plated bumps according to an embodiment of the present invention, the present specification provides the method operations according to the embodiment or the flowchart, but based on the conventional method; or the inventive process may include additional or fewer steps. The sequence of steps recited in the embodiments is only one of many steps performed in sequence, and does not represent the only order of execution, and the method for improving the uniformity of the height of plated bumps may be performed according to the sequence of steps shown in the embodiments or the figures. The method comprises the following steps:
s101: providing a plurality of test wafers, coating photoresist with different thicknesses on the test wafers in sequence, and then carrying out exposure and development to obtain the photoresist thickness information of each test wafer;
it should be noted that, in the embodiments of the present disclosure, a method for influencing a height of an electroplating bump by a photoresist thickness is used, and therefore, processes of gluing, exposing, and developing at an early stage of a wafer are all conventional technical means. According to different electroplating bump opening and height requirements, different photoresist thicknesses are selected, the number of groups of test wafers (dummy wafers) is not limited, and the photoresist thicknesses of each group of test wafers are different, such as 80um, 100um and 110 um.
In addition, in some other embodiments, since the size of the wafer may affect the uniformity of the photoresist thickness, the photoresist thickness may be selected appropriately according to different wafer sizes, and specifically, when the wafer size is larger, for example, the wafer size is larger than 12 inches, the photoresist thickness may be selected to be smaller, so that the uniformity of the plating bump height may be further affected by the non-uniformity of the coating.
Since the size and height of the plating bump opening are generally specified by a customer, an appropriate photoresist thickness can be selected in the case of the determined size and height of the plating bump opening. Therefore, in some other embodiments, step S101 may further include, before:
s001: determining the size and the preset height of a preset opening of a test wafer electroplating bump;
s002: and obtaining a plurality of photoresist thickness information according to the preset opening size and the preset height of the electroplating bump.
Illustratively, the preset opening size of the electroplating bump is 50um-70um, the preset height of the electroplating bump is 80um-100um, the number of the test wafers is multiple, and the selection of the coating photoresist thickness of each test wafer is determined according to the preset height, specifically, when a customer selects the preset opening size of the electroplating bump to be 60um and the preset height to be 80um, three test wafers are provided, namely, the photoresist thickness information is three and is respectively 85um, 100um and 110um, therefore, under the condition that the opening size of the electroplating bump is small, the condition that the electroplating opening/height is less than 1 can occur, so that the condition of uneven height often occurs during electroplating, and the product yield is reduced.
S103: sequentially carrying out electroplating bump processing on the test wafer, and obtaining first height information of the electroplating bumps;
the wafer electroplating uses a cathode and an anode to generate power lines for electroplating, after the cathode and the anode are electrified, the power lines between the cathode and the anode are distributed dispersedly, and a power line baffle is arranged between the cathode and the anode to ensure that the power lines uniformly reach the surface of the wafer for electroplating, so that the uneven distribution of the power lines is prevented from causing the uneven bump height of electroplating.
After electroplating is finished, developing operation is carried out to remove the photoresist on the surface of the wafer, then the height of the electroplating bump on the wafer is measured, and particularly, the height uniformity of the electroplating bump can be quickly reflected by measuring through a measuring method of three cross points in a Chinese character 'mi'.
As shown in fig. 2, a schematic diagram of "three cross points in a shape of a Chinese character' mi" described in the embodiments of the present specification includes the following specific steps:
s301: obtaining a plurality of measurement areas in the test wafer, wherein the measurement areas are arranged in a shape of a Chinese character mi;
the measurement areas are regularly arranged in a shape of a Chinese character 'mi', all the areas of the test wafer are covered, specifically, the measurement areas are 13 and are arranged in the shape of the Chinese character 'mi', the area of each measurement area is the same, so that each measurement area is guaranteed to contain the same number of single chips, the height of the electroplating bump on each chip in each measurement area can be measured when the height of the electroplating bump opening is measured, and the quantity of data measured by each measurement area can be guaranteed to be the same.
In addition, the area of the measurement region may be selected according to different measurement requirements, alternatively, two adjacent measurement regions do not intersect, and of course, in some other embodiments, the measurement regions may overlap, which is not limited herein.
The range or the shape of the measurement region may be set according to different requirements, and optionally, the measurement region may be in a shape of a circle, a square, or the like, which is not described herein again.
S303: acquiring height information of the electroplating bumps in the plurality of measurement areas;
the measured height information is the electroplating bump height information of all the single chips in each measuring area, so that more electroplating bump heights can be obtained as much as possible, and the same electroplating bump height number can be obtained in each measuring area due to the fact that the number of the single chips in each measuring area is the same, and the height uniformity analysis is more accurate.
S305: and acquiring first height information/second height information of the electroplating bumps in the test wafer according to the height information of the electroplating bumps in the plurality of measurement areas.
And analyzing the electroplating bump height information of the whole test wafer to obtain the electroplating bump height uniformity characteristic of the whole test wafer, wherein the first height information of the electroplating bumps can be the electroplating bump height information of the whole test wafer, or the electroplating bump height information of a single chip, each measurement area and the whole test wafer in the measurement areas.
For example, as shown in fig. 2, 13 measurement regions are obtained in a test wafer, all the measurement regions are arranged in a meter shape and are uniformly distributed at the edge, the inside and the center of the test wafer, and two adjacent measurement regions do not intersect, in the embodiment of the present specification, the measurement regions are selected to be circular, and 50 single chips are in each measurement region, then one electroplating bump in each chip in the measurement region is selected as a measurement object to be measured, the selected electroplating bump in each measurement region is measured in a traversal manner, and then the electroplating bump height uniformity of each measurement region and the electroplating bump height uniformity of the whole test wafer can be obtained according to the obtained measurement data.
It should be noted that, in order to ensure the uniformity of the electroplating bump height of a single chip, the height information of all electroplating bumps in the single chip can be measured, so that the electroplating bump height uniformity of the single chip can be detected, and the electroplating bump height uniformity of each measurement area and the whole test wafer can also be detected.
S105: comparing first height information of the electroplated bumps of the plurality of test wafers, wherein the photoresist thickness corresponding to the test wafer with the best electroplated bump height uniformity is a preset photoresist thickness;
the electroplating bump height uniformity of a single chip, each measurement area and the whole test wafer under the condition of different glue thicknesses can be obtained through the steps, in the actual product production, the electroplating bump height uniformity of the single chip and the whole test wafer needs to be ensured within a certain error range, such as 3% -7%, certainly not limited to this, specifically, the error range is selected to be 5%, within the error range, the smaller the height uniformity or the height difference is, the better the height uniformity or the height difference is, therefore after a plurality of pieces of first height information are obtained, by comparing one group with the smallest height uniformity, the best bump uniformity performance, namely the best suitable glue thickness can be obtained, and the best and most stable electroplating bump height uniformity can be obtained under the glue thickness.
In addition, because the electroplating bump height uniformity is greatly influenced by the current density, in general practical operation, the current intensity between the cathode and the anode is relatively fixed, and only the distribution of current lines in the plating tank is different, for example, the position and the structure of a power line baffle in the plating tank influence the uniformity of the electroplating bump height. It is therefore also desirable to modify the power line baffle to obtain a more suitable plated bump.
S107: providing a test wafer again, and performing gluing, exposure, development and bump electroplating on the test wafer according to the preset glue thickness to obtain second height information of the bump electroplating;
for the optimization of the power line baffle, the electroplating of the test wafer needs to be carried out again, and the height information after electroplating is obtained by the method for detecting the Mi-word thirteen-point, wherein the second height information of the electroplating bump can be the electroplating bump height information of the whole test wafer, or the electroplating bump height information of a single chip in a measurement area, each measurement area and the whole test wafer.
S109: judging whether the height uniformity of the electroplating bumps exceeds a preset value or not according to the second height information of the electroplating bumps;
the preset value is a qualified value of the height uniformity of the electroplating bump, and may also be a requirement made by a customer, the preset value may be 2% to 10%, and is not limited thereto, specifically, the preset value is 3%, when the height uniformity of the electroplating bump does not exceed the preset value, it indicates that the height of the electroplating bump in the whole test wafer is qualified, and the power line baffle does not need to be modified.
S111: if so, defining the area of the test wafer, in which the height uniformity of the electroplated bumps exceeds the preset value, as an area to be optimized, and reconstructing the power line baffle area corresponding to the area to be optimized until the height uniformity of the electroplated bumps does not exceed the preset value.
In the embodiment of the specification, after the height uniformity exceeds the preset value, the electroplating device needs to be modified, and particularly, the power line baffle needs to be modified. Before transformation, a transformed area needs to be determined, namely a power line baffle area corresponding to an area to be optimized in a test wafer is transformed, so that the method is more pertinent, the transformation efficiency and the transformation speed are improved, and more areas to be optimized are generally present in the edge area of the wafer.
As shown in fig. 3, in order to reduce the height uniformity of the region to be optimized, the current density of the region needs to be reduced, that is, the distribution of the electric lines of force needs to be reduced, an adhesive tape a needs to be attached to the electric line baffle plate, the electric lines of force in the region can be prevented from passing through, and the distribution of the electric lines of force at the edge needs to be dispersed.
It should be noted that, here, reducing the height uniformity refers to adjusting the height uniformity so that the calculated height uniformity is smaller, and when the calculated height uniformity is reduced, the effect of "improving" the height uniformity of the plated bump is further improved, so that the plated bump is more uniform.
In some other embodiments, since the adhesive tape is adhered to the area of the baffle portion of the power line, although the distribution of the power line can be dispersed and the current density can be reduced, but insufficient plating may also occur, and therefore, holes may also be formed in the adhesive tape, specifically, holes may be formed according to the size of the bump opening according to the relationship between the size of the adhesive tape and the size of the plated bump opening, so that the plating effect in this area can be ensured.
It should be noted that the expectation to be optimized may be a measurement region determined by the mie-thirteen-point detection method, or may be a region determined on the entire test wafer, and the determination principle may be based on data obtained by the mie-thirteen-point detection method.
In some other embodiments, in addition to adhering the adhesive tape on the power line baffle, the position of the power line baffle in the plating tank or the size and shape of the ring (ring) of the power line baffle may be adjusted, which is not described herein again.
The method for improving the height uniformity of the electroplated bump can obtain the following beneficial effects:
1) according to the method for improving the height uniformity of the electroplated bumps, the height difference of the bumps of the whole wafer and the height difference of the bumps of the single chip can be kept within a reasonable range by reasonably selecting the thickness of the photoresist, so that the yield of products is improved.
2) According to the method for improving the height uniformity of the electroplated lug, the difference amplification of the height of the electroplated lug caused by uneven distribution of the power lines is reduced through the optimization of the point power line baffle, so that the stability of a product is improved, and the welding stability in the later product manufacturing process is improved.
3) The method for improving the height uniformity of the electroplated bump is simple and clear, and the power line baffle structure with the proper glue thickness can be quickly selected according to different customer requirements, so that the production efficiency and yield of finished products are improved.
While the invention has been described with reference to specific embodiments, it will be appreciated by those skilled in the art that the invention is not limited to the details of the foregoing illustrative embodiments, and that the invention can be embodied in other specific forms without departing from the spirit or essential attributes thereof. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.
Furthermore, it should be understood that although the present description refers to embodiments, not every embodiment may contain only a single embodiment, and such description is for clarity only, and those skilled in the art should integrate the description, and the embodiments may be combined as appropriate to form other embodiments understood by those skilled in the art.
Claims (10)
1. A method for improving the uniformity of the height of an electroplated bump is applied to a product with a bump opening smaller than the height, and is characterized by comprising the following steps:
providing a plurality of test wafers, coating photoresist with different thicknesses on the test wafers in sequence, and then carrying out exposure and development to obtain the photoresist thickness information of each test wafer;
sequentially carrying out electroplating bump processing on the test wafer, and obtaining first height information of the electroplating bumps;
comparing first height information of the electroplated bumps of the plurality of test wafers, wherein the photoresist thickness corresponding to the test wafer with the best electroplated bump height uniformity is a preset photoresist thickness;
providing a test wafer again, and performing gluing, exposure, development and bump electroplating on the test wafer according to the preset glue thickness to obtain second height information of the bump electroplating;
judging whether the height uniformity of the electroplating bumps exceeds a preset value or not according to the second height information of the electroplating bumps;
if so, defining the area of the test wafer, in which the height uniformity of the electroplated bumps exceeds the preset value, as an area to be optimized, and reconstructing the power line baffle area corresponding to the area to be optimized until the height uniformity of the electroplated bumps does not exceed the preset value.
2. The method of claim 1, wherein the providing a plurality of test wafers, sequentially coating the test wafers with the photoresists with different thicknesses, and then exposing and developing the test wafers comprises the following steps of:
determining the size and the preset height of a preset opening of a test wafer electroplating bump;
and obtaining a plurality of photoresist thickness information according to the preset opening size and the preset height of the electroplating bump.
3. The method of claim 2, wherein the predetermined opening size of the plated bump is 50um-70um, and the predetermined height of the plated bump is 80um-100 um.
4. The method of claim 1, wherein the obtaining the first height information of the plated bumps or the obtaining the second height information of the plated bumps comprises:
obtaining a plurality of measurement areas in the test wafer, wherein the measurement areas are arranged in a shape of a Chinese character mi;
obtaining height information of electroplated bumps in a plurality of measurement areas;
and acquiring first height information or second height information of the electroplating bumps in the test wafer according to the height information of the electroplating bumps in the plurality of measurement areas.
5. The method of claim 4, wherein a plurality of the measurement areas each comprise the same number of individual chips.
6. The method of claim 5, wherein the obtaining of plated bump height information in the measurement area comprises:
and acquiring the height information of the electroplating lug of each chip in the measuring area.
7. The method of claim 4, wherein the number of the measuring regions is 13.
8. The method of claim 1, wherein modifying the power line baffle region corresponding to the region to be optimized comprises:
and pasting an adhesive tape on the power line baffle area corresponding to the area to be optimized.
9. The method of claim 8, wherein the tape is a corrosion resistant high temperature tape.
10. The method as claimed in claim 8, wherein the step of applying the adhesive tape to the power line barrier region corresponding to the region to be optimized comprises:
and opening holes in the adhesive tape.
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