CN111314311A - Method, system, equipment and medium for improving performance of switch - Google Patents

Abstract

The invention discloses a method, system, device and storage medium for improving switch performance. The method includes the following steps: in response to receiving a data packet, adjusting the protocol stack of the switch to user mode; in response to the completion of user mode loading, based on CPU The number of cores, start different numbers of threads; determine the bound socket in the listening state in the thread, and establish a connection with the packet based on the bound socket; and based on the bound socket in the underlying hash layer Add an additional hash layer and process packets based on a double-layer hash layer. The method, system, device and medium for improving the performance of the switch proposed by the present invention effectively improve the performance of the switch by adjusting the protocol stack to the user state and adding an additional hash layer.

Description

A method, system, device and medium for improving switch performance

technical field

The present invention relates to the field of switches, and more particularly, to a method, a system, a computer device and a readable medium for improving the performance of a switch.

Background technique

As the network bandwidth gradually increases, the performance of processing packets using the Linux kernel degrades, and there is no particularly good way to handle it. At present, the hardware is getting cheaper and cheaper, but the TCP/IP protocol processing capability of the current Linux kernel does not increase linearly with the improvement of hardware performance. The PPS performance curve of the kernel protocol stack shows a serious upward convexity, and the CPS (TCP new connections per second) of the kernel protocol stack hardly changes with the increase of the number of CPU cores.

Part of the L2 protocol and L3 protocol of the switch needs to process the switching protocol through the OS (system). After the data packet is transmitted from the switching chip to the OS through PCIE (peripheral component interconnect express, a high-speed serial computer expansion bus standard), it first passes through the OS layer. The protocol stack is handed over to the protocol processing logic through the processing of the protocol stack. The protocol stack is the necessary channel for exchange protocol processing. Therefore, the TCP/IP protocol stack seriously affects the processing performance of the switch, and the current protocol stack has a bottleneck.

SUMMARY OF THE INVENTION

In view of this, the purpose of the embodiments of the present invention is to provide a method, system, computer device and computer-readable storage medium for improving switch performance. switch performance.

Based on the above purpose, one aspect of the embodiments of the present invention provides a method for improving the performance of a switch, including the following steps: in response to receiving a data packet, adjusting the protocol stack of the switch to a user mode; in response to the completion of the user mode loading , based on the number of CPU cores, start different numbers of threads; determine the binding socket in the listening state in the thread, and establish a connection with the data packet based on the binding socket; and based on the The binding socket adds an additional hash layer to the basic hash layer, and processes the data packet based on the double-layer hash layer.

In some embodiments, the adjusting the protocol stack of the switch to the user mode includes: converting the configuration file of the protocol stack into a format suitable for the user mode.

In some implementations, the determining the bound socket in the listening state in the thread includes sending a reset signal, and determining the bound socket in a hash table.

In some implementations, the determining a bound socket in a listening state in the thread comprises: iterating over target ports in a hash table to determine a matching bound socket.

In some embodiments, the processing of the data packet based on the double-layer hash layer includes: determining a type of the data packet, and adopting a corresponding response based on the type.

Another aspect of the embodiments of the present invention further provides a system for improving the performance of a switch, including: an adjustment module configured to adjust the protocol stack of the switch to a user state in response to receiving a data packet; a thread module configured to In response to the user state loading being completed, different numbers of threads are started based on the number of CPU cores; the connection module is configured to determine the binding socket in the listening state in the thread, and based on the binding a socket establishes a connection with the data packet; and a hash module configured to add an additional hash layer to the base hash layer based on the bound socket, and to perform an additional hash layer on the data based on the double-layer hash layer package is processed.

In some embodiments, the adjusting the protocol stack of the switch to the user mode includes: converting the configuration file of the protocol stack into a format suitable for the user mode.

In some implementations, the determining the bound socket in the listening state in the thread includes sending a reset signal, and determining the bound socket in a hash table.

In yet another aspect of the embodiments of the present invention, there is also provided a computer device, comprising: at least one processor; and a memory, where the memory stores computer instructions that can be executed on the processor, and the instructions are executed by the processor. The processor implements the steps of the above method when executed.

In yet another aspect of the embodiments of the present invention, a computer-readable storage medium is also provided, where the computer-readable storage medium stores a computer program that implements the above method steps when executed by a processor.

The invention has the following beneficial technical effects: by adjusting the protocol stack to the user state and adding an additional hash layer, the performance of the switch is effectively improved.

Description of drawings

In order to explain the embodiments of the present invention or the technical solutions in the prior art more clearly, the following briefly introduces the accompanying drawings that need to be used in the description of the embodiments or the prior art. Obviously, the accompanying drawings in the following description are only These are some embodiments of the present invention. For those of ordinary skill in the art, other embodiments can also be obtained according to these drawings without creative efforts.

FIG. 1 is a schematic diagram of an embodiment of a method for improving switch performance provided by the present invention;

FIG. 2 is a schematic diagram of a hardware structure of an embodiment of a method for improving switch performance provided by the present invention.

Detailed ways

In order to make the objectives, technical solutions and advantages of the present invention more clearly understood, the embodiments of the present invention will be further described in detail below with reference to the specific embodiments and the accompanying drawings.

It should be noted that all expressions using "first" and "second" in the embodiments of the present invention are for the purpose of distinguishing two entities with the same name but not the same or non-identical parameters. It can be seen that "first" and "second" It is only for the convenience of expression and should not be construed as a limitation to the embodiments of the present invention, and subsequent embodiments will not describe them one by one.

Based on the above objective, in the first aspect of the embodiments of the present invention, an embodiment of a method for improving the performance of a switch is provided. FIG. 1 shows a schematic diagram of an embodiment of a method for improving switch performance provided by the present invention. As shown in Figure 1, the embodiment of the present invention includes the following steps:

S1, in response to receiving the data packet, adjust the protocol stack of the switch to the user state;

S2. In response to the completion of user mode loading, different numbers of threads are started based on the number of CPU cores;

S3. Determine the bound socket in the listening state in the thread, and establish a connection with the data packet based on the bound socket; and

S4. An additional hash layer is added to the basic hash layer based on the binding socket, and the data packets are processed based on the double-layer hash layer.

The rapid development of the Internet requires high-performance network processing capabilities, and kernel bypass has attracted more and more attention. The main idea of kernel bypass is that Linux is only used to handle control flow, all data flow is handled in user space. Therefore, kernel bypass can avoid performance bottlenecks due to kernel packet copying, thread scheduling, system calls and interrupts. In addition, kernel bypass can achieve higher performance through various optimization methods. TCP/IP (Transmission Control Protocol/Internet Protocol, Transmission Control Protocol/Internet Protocol) refers to a protocol suite capable of realizing information transmission among multiple different networks. The TCP/IP protocol not only refers to the two protocols of TCP and IP, but also refers to a protocol cluster composed of FTP, SMTP, TCP, UDP, IP and other protocols, just because the TCP protocol and the IP protocol in the TCP/IP protocol The most representative, so it is called the TCP/IP protocol.

In response to receiving the data packet, the protocol stack of the switch is adjusted to user mode. After receiving the data packet, the TCP/IP protocol stack in the switch system can be modified, and the protocol stack can be adjusted from the kernel mode to the user mode. In some embodiments, the adjusting the protocol stack of the switch to the user mode includes: converting the configuration file of the protocol stack into a format suitable for the user mode. For example, the configuration file of the protocol stack can be converted to ko.

In response to the user mode loading being completed, different numbers of threads are started based on the number of CPU cores. After the user mode is loaded, different threads are started according to the number of CPU cores to ensure the processing capability of the protocol.

Determine the bound socket in the listening state in the thread, and establish a connection with the packet based on the bound socket. In some implementations, the determining the bound socket in the listening state in the thread includes sending a reset signal, and determining the bound socket in a hash table. In some implementations, the determining a bound socket in a listening state in the thread comprises: iterating over target ports in a hash table to determine a matching bound socket.

When the protocol is processed, the binding socket in the listening state will be determined. If the binding socket in the listening state is not found, a reset signal can be sent, such as RST, and the binding socket can be found in the hash table. This can be achieved by using the destination port as a hash, and selecting an appropriate channel in the hash table, then iterating linearly to determine the matching bound socket.

Based on the binding socket, an additional hash layer is added to the basic hash layer, and the data packet is processed based on the double-layer hash layer. In some embodiments, the processing of the data packet based on the double-layer hash layer includes: determining a type of the data packet, and adopting a corresponding response based on the type. If the packet is SYN and the bound socket in the listening state exists, a SYN+ACK response can be used.

It should be particularly pointed out that the steps in each embodiment of the above-mentioned method for improving switch performance can be crossed, replaced, added, and deleted. The protection scope of the present invention should not be limited to the embodiments.

Based on the above purpose, in a second aspect of the embodiments of the present invention, a system for improving the performance of a switch is proposed, including: an adjustment module configured to adjust the protocol stack of the switch to a user state in response to receiving a data packet; a thread The module is configured to start different numbers of threads based on the number of CPU cores in response to the completion of the user mode loading; the connection module is configured to determine the binding socket in the listening state in the thread, and based on the number of CPU cores the bound socket establishes a connection with the data packet; and a hash module configured to add an additional hash layer to the base hash layer based on the bound socket, and based on the double-layer hash layer The data packets are processed.

In some embodiments, the adjusting the protocol stack of the switch to the user mode includes: converting the configuration file of the protocol stack into a format suitable for the user mode.

In some implementations, the determining the bound socket in the listening state in the thread includes sending a reset signal, and determining the bound socket in a hash table.

In some implementations, the determining a bound socket in a listening state in the thread comprises: iterating over target ports in a hash table to determine a matching bound socket.

In some embodiments, the processing of the data packet based on the double-layer hash layer includes: determining a type of the data packet, and adopting a corresponding response based on the type.

Based on the above objective, in a third aspect of the embodiments of the present invention, a computer device is provided, including: at least one processor; and a memory, where the memory stores computer instructions that can be executed on the processor, and the instructions are executed by the processor to The following steps are implemented: S1, in response to receiving the data packet, adjust the protocol stack of the switch to the user mode; S2, in response to the completion of the user mode loading, start different numbers of threads based on the number of CPU cores; S3, determine in the thread The binding socket in the listening state, and establishing a connection with the data packet based on the binding socket; and S4, adding an additional hash layer to the basic hash layer based on the binding socket, and based on double-layer hashing Layers process packets.

In some embodiments, the adjusting the protocol stack of the switch to the user mode includes: converting the configuration file of the protocol stack into a format suitable for the user mode.

In some implementations, the determining the bound socket in the listening state in the thread includes sending a reset signal, and determining the bound socket in a hash table.

In some implementations, the determining a bound socket in a listening state in the thread comprises: iterating over target ports in a hash table to determine a matching bound socket.

In some embodiments, the processing of the data packet based on the double-layer hash layer includes: determining a type of the data packet, and adopting a corresponding response based on the type.

As shown in FIG. 2 , it is a schematic diagram of a hardware structure of an embodiment of the method for improving the performance of a switch provided by the present invention.

Taking the device shown in FIG. 2 as an example, the device includes a processor 301 and a memory 302 , and may further include an input device 303 and an output device 304 .

The processor 301 , the memory 302 , the input device 303 and the output device 304 may be connected by a bus or in other ways, and the connection by a bus is taken as an example in FIG. 2 .

As a non-volatile computer-readable storage medium, the memory 302 can be used to store non-volatile software programs, non-volatile computer-executable programs and modules, such as those corresponding to the method for improving switch performance in the embodiments of the present application. Program instructions/modules. The processor 301 executes various functional applications and data processing of the server by running the non-volatile software programs, instructions and modules stored in the memory 302, that is, implementing the method for improving switch performance in the above method embodiments.

The memory 302 may include a stored program area and a stored data area, wherein the stored program area may store an operating system, an application program required for at least one function; the stored data area may store data created according to the use of methods for improving switch performance, and the like. Additionally, memory 302 may include high speed random access memory, and may also include nonvolatile memory, such as at least one magnetic disk storage device, flash memory device, or other nonvolatile solid state storage device. In some embodiments, memory 302 may optionally include memory located remotely from processor 301, which may be connected to local modules via a network. Examples of such networks include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

The input device 303 can receive input information such as user name and password. The output device 304 may include a display device such as a display screen.

The program instructions/modules corresponding to one or more methods for improving switch performance are stored in the memory 302, and when executed by the processor 301, execute the method for improving switch performance in any of the foregoing method embodiments.

Any embodiment of the computer device that executes the above method for improving switch performance can achieve the same or similar effects as any of the foregoing method embodiments corresponding to it.

The present invention also provides a computer-readable storage medium, where the computer-readable storage medium stores a computer program that executes the above method when executed by a processor.

Finally, it should be noted that those of ordinary skill in the art can understand that all or part of the process in the method of the above-mentioned embodiments can be implemented by instructing the relevant hardware through a computer program, and the program of the method for improving the performance of the switch can be stored in a computer readable In the storage medium, when the program is executed, it may include the processes of the foregoing method embodiments. Wherein, the storage medium of the program may be a magnetic disk, an optical disk, a read only memory (ROM) or a random access memory (RAM) or the like. The above computer program embodiments can achieve the same or similar effects as any of the foregoing method embodiments corresponding thereto.

In addition, the methods disclosed according to the embodiments of the present invention may also be implemented as a computer program executed by a processor, and the computer program may be stored in a computer-readable storage medium. When the computer program is executed by the processor, the above-mentioned functions defined in the methods disclosed in the embodiments of the present invention are executed.

In addition, the above-mentioned method steps and system units can also be implemented by using a controller and a computer-readable storage medium for storing a computer program that enables the controller to implement the functions of the above-mentioned steps or units.

In addition, it should be understood that computer-readable storage media (eg, memory) herein can be volatile memory or non-volatile memory, or can include both volatile and non-volatile memory. By way of example and not limitation, nonvolatile memory may include read only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory memory. Volatile memory may include random access memory (RAM), which may act as external cache memory. By way of example and not limitation, RAM is available in various forms such as synchronous RAM (DRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous Link DRAM (SLDRAM), and Direct Rambus RAM (DRRAM). The storage devices of the disclosed aspects are intended to include, but not be limited to, these and other suitable types of memory.

Those skilled in the art will also appreciate that the various exemplary logical blocks, modules, circuits, and algorithm steps described in connection with the disclosure herein may be implemented as electronic hardware, computer software, or combinations of both. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps have been described generally in terms of their functionality. Whether such functionality is implemented as software or hardware depends on the specific application and design constraints imposed on the overall system. Those skilled in the art may implement the functions in various ways for each specific application, but such implementation decisions should not be interpreted as causing a departure from the scope of the disclosed embodiments of the present invention.

The various exemplary logical blocks, modules, and circuits described in connection with the disclosure herein can be implemented or executed using the following components designed to perform the functions herein: general purpose processors, digital signal processors (DSPs), application specific integrated circuits (ASIC), Field Programmable Gate Array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination of these components. A general-purpose processor may be a microprocessor, but in the alternative, the processor may be any conventional processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of computing devices, eg, a combination of a DSP and a microprocessor, multiple microprocessors, one or more microprocessors in combination with a DSP, and/or any other such configuration.

The steps of a method or algorithm described in connection with the disclosures herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module may reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor, such that the processor can read information from, and write information to, the storage medium. In an alternative, the storage medium may be integrated with the processor. The processor and storage medium may reside in an ASIC. The ASIC may reside in the user terminal. In an alternative, the processor and storage medium may reside in the user terminal as discrete components.

In one or more exemplary designs, functions may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored on or transmitted over as one or more instructions or code on a computer-readable medium. Computer-readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another. A storage medium can be any available medium that can be accessed by a general purpose or special purpose computer. By way of example and not limitation, the computer-readable medium may include RAM, ROM, EEPROM, CD-ROM or other optical disk storage devices, magnetic disk storage devices or other magnetic storage devices, or may be used to carry or store instructions in the form of or data structures and any other medium that can be accessed by a general purpose or special purpose computer or a general purpose or special purpose processor. Also, any connection is properly termed a computer-readable medium. For example, if coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or wireless technologies such as infrared, radio, and microwave are used to send software from a website, server, or other remote source, the above coaxial cable Cable, fiber optic cable, twisted pair, DSL or wireless technologies such as infrared, radio and microwave are all included in the definition of medium. As used herein, magnetic disks and optical disks include compact disks (CDs), laser disks, optical disks, digital versatile disks (DVDs), floppy disks, blu-ray disks, where disks usually reproduce data magnetically, while optical disks reproduce data optically with lasers . Combinations of the above should also be included within the scope of computer-readable media.

The above are exemplary embodiments of the present disclosure, but it should be noted that various changes and modifications may be made without departing from the scope of the disclosure of the embodiments of the present invention as defined in the claims. The functions, steps and/or actions of the method claims in accordance with the disclosed embodiments described herein need not be performed in any particular order. Furthermore, although elements disclosed in the embodiments of the present invention may be described or claimed in the singular, unless explicitly limited to the singular, the plural may also be construed.

It should be understood that, as used herein, the singular form "a" is intended to include the plural form as well, unless the context clearly supports an exception. It will also be understood that "and/or" as used herein is meant to include any and all possible combinations of one or more of the associated listed items.

The above-mentioned embodiments of the present invention disclose the serial numbers of the embodiments only for description, and do not represent the advantages and disadvantages of the embodiments.

Those of ordinary skill in the art can understand that all or part of the steps of implementing the above embodiments can be completed by hardware, or can be completed by instructing relevant hardware through a program, and the program can be stored in a computer-readable storage medium. The storage medium can be a read-only memory, a magnetic disk or an optical disk, and the like.

Those of ordinary skill in the art should understand that the discussion of any of the above embodiments is only exemplary, and is not intended to imply that the scope (including the claims) disclosed by the embodiments of the present invention is limited to these examples; under the idea of the embodiments of the present invention , the technical features in the above embodiments or different embodiments can also be combined, and there are many other changes in different aspects of the above embodiments of the present invention, which are not provided in detail for the sake of brevity. Therefore, any omission, modification, equivalent replacement, improvement, etc. made within the spirit and principle of the embodiments of the present invention should be included within the protection scope of the embodiments of the present invention.

Claims (10)

1. A method for improving the performance of a switch, comprising the steps of:

in response to receiving the data packet, adjusting a protocol stack of the switch to a user state;

in response to the user mode loading completion, starting different numbers of threads based on the number of CPU cores;

determining a binding socket in a monitoring state in the thread, and establishing connection with the data packet based on the binding socket; and

and adding an additional hash layer on the basis of the binding socket and processing the data packet on the basis of a double-layer hash layer.

2. The method of claim 1, wherein adjusting the protocol stack of the switch to the user state comprises:

and converting the configuration file of the protocol stack into a format suitable for a user mode.

3. The method of claim 1, wherein determining, in the thread, a bound socket in a listening state comprises:

and sending a reset signal, and determining the bound socket in a hash table.

4. The method of claim 1, wherein determining, in the thread, a bound socket in a listening state comprises:

the target port in the hash table is iterated to determine a matching bound socket.

5. The method of claim 1, wherein the processing the packet based on the two-layer hash layer comprises:

the type of the data packet is determined, and a corresponding response is taken based on the type.

6. A system for improving the performance of a switch, comprising:

an adjustment module configured to adjust a protocol stack of the switch to a user state in response to receiving the data packet;

the thread module is configured to respond to the completion of the user mode loading and start different numbers of threads based on the number of the CPU cores;

the connection module is configured to determine a binding socket in a monitoring state in the thread and establish connection with the data packet based on the binding socket; and

and the hash module is configured to add an additional hash layer on the basis of the binding socket and process the data packet on the basis of a double-layer hash layer.

7. The system of claim 6, wherein the adjusting the protocol stack of the switch to the user state comprises:

and converting the configuration file of the protocol stack into a format suitable for a user mode.

8. The system of claim 6, wherein the determining, in the thread, a bound socket in a listening state comprises:

and sending a reset signal, and determining the bound socket in a hash table.

9. A computer device, comprising:

at least one processor; and

a memory storing computer instructions executable on the processor, the instructions when executed by the processor implementing the steps of the method of any one of claims 1 to 5.

10. A computer-readable storage medium, in which a computer program is stored which, when being executed by a processor, carries out the steps of the method according to any one of claims 1 to 5.

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