CN111105763A - GOA circuit and display panel - Google Patents
GOA circuit and display panel Download PDFInfo
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- CN111105763A CN111105763A CN201911320660.7A CN201911320660A CN111105763A CN 111105763 A CN111105763 A CN 111105763A CN 201911320660 A CN201911320660 A CN 201911320660A CN 111105763 A CN111105763 A CN 111105763A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3674—Details of drivers for scan electrodes
- G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
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Abstract
A GOA circuit and a display panel comprise a plurality of cascaded GOA units, wherein the n-th-level GOA unit comprises: the device comprises a pull-up control module, a pull-down control module, a pull-up module, a pull-down holding module, a bootstrap capacitor and a signal transmission module; the pull-up control module comprises four switching tubes, namely a first switching tube, a second switching tube, a third switching tube and a fourth switching tube, and when the nth-4 stage transmission signal STn-4 is at a high potential and the current stage scanning signal Gn is at a low potential, a stable pull-up control signal is output; when the nth stage transmission signal STn is at a high potential, the third switching tube is also conducted, and residual charges in the first switching tube, the second switching tube and the third switching tube are released from the output end of the fourth switching tube, so that the influence of the residual charges on the performance of each switching tube is avoided; the beneficial effects are that: the switch tube is additionally arranged in the pull-up control module, residual charges in the pull-up control module are released through the switch tube, the performance of the switch tube is not influenced, and meanwhile the electrical property of the GOA circuit is more stable.
Description
Technical Field
The present application relates to the display field, and in particular, to a GOA circuit and a display panel.
Background
A Gate Driver on Array (GOA) circuit of an existing liquid crystal display panel includes a plurality of modules, wherein a pull-up control module is generally used for outputting a stable pull-up control signal to ensure the stability of the whole GOA circuit. However, in the existing pull-up control module, there are also problems that the residual charge of the switching tube cannot be released, the threshold voltage of the switching tube is affected, and the performance of the switching tube and the stability of the whole GOA circuit are affected.
Therefore, in the existing GOA circuit and display panel technologies, there are still problems that residual charges in the switch tube in the pull-up control module cannot be released, and the electrical property of the switch tube and the stability of the whole GOA circuit are affected, and improvement is urgently needed.
Disclosure of Invention
The application relates to a GOA circuit and a display panel, which are used for solving the problems that residual charges existing in a switch tube in a pull-up control module cannot be released, and the electrical property and the function of the switch tube are influenced in the prior art.
In order to solve the above problems, the technical solution provided by the present application is as follows:
the application provides a GOA circuit, includes a plurality of cascaded GOA units, and nth level GOA unit includes: the device comprises a pull-up control module, a pull-down control module, a pull-up module, a pull-down holding module, a bootstrap capacitor and a signal transmission module; wherein,
the pull-up control module comprises four switching tubes, namely a first switching tube, a second switching tube, a third switching tube and a fourth switching tube, and when an n-4 th-stage transmission signal STn-4 is at a high potential and a current-stage scanning signal Gn is at a low potential, a stable pull-up control signal is output; when the nth stage signal STn is at a high potential, the third switch tube is also turned on, and residual charges in the first switch tube, the second switch tube and the third switch tube are released from the output end of the fourth switch tube, so that the residual charges are prevented from influencing the performance of each switch tube.
According to an embodiment provided by the present application, the first switching tube is connected in series with the second switching tube, and the control end of the first switching tube and the control end of the second switching tube are electrically connected to the n-4 th stage transmission signal STn-4; the control end of the third switching tube is electrically connected with the (n +4) th-level transmission signal STn +4, and the output end of the third switching tube is electrically connected with the low-level signal VSS.
According to an embodiment provided by the present application, the output terminal of the first switch tube, the input terminal of the second switch tube, the input terminal of the third switch tube and the output terminal of the fourth switch tube are electrically connected to the Mn point, the input terminal of the fourth switch tube is electrically connected to the nth stage transmission signal STn, and the input terminal of the fourth switch tube is electrically connected to the present stage scanning signal Gn.
According to an embodiment provided by the present application, when the n-4 th stage transmission signal STn-4 is at a high potential and the present stage scanning signal Gn is at a low potential, the first switch tube and the second switch tube are turned on, and output a stable pull-up control signal to charge the Qn point, and the Qn point and the Mn point are at high potentials.
According to an embodiment provided by the present application, when the Qn point and the clock signal are at a high potential, the nth stage transmission signal STn is at a high potential, the present stage scan signal Gn obtains a high potential through the pull-up module, and the nth-4 stage transmission signal STn-4 is at a low potential, the first switch tube and the second switch tube are turned off, the third switch tube is turned on, the present stage scan signal Gn also passes to the Mn point, the (n +4) th stage transmission signal STn +4 is electrified to become a high potential, and charges obtained in the first switch tube, the second switch tube and the third switch tube are released from an output end of the fourth switch tube.
According to an embodiment provided by the present application, one end of the bootstrap capacitor is electrically connected to the pull-up module, and the other end of the bootstrap capacitor is electrically connected to the present-level scan signal Gn.
According to an embodiment provided by the present application, one end of the pull-up module is electrically connected to the clock signal, and the other end of the pull-up module is electrically connected to the pull-down module; one end of the pull-down module is electrically connected with the pull-up module, and the other end of the pull-down module is electrically connected with the low level signal VSS and outputs an n +4 th-level scanning signal Gn + 4.
According to an embodiment of the present disclosure, one end of the signal transmission module is electrically connected to the clock signal, and the other end of the signal transmission module is electrically connected to the low level signal VSS, and outputs the nth level transmission signal STn to control the third thin film transistor or the field effect transistor; one end of the pull-down holding module is electrically connected with the output end of the second thin film transistor or the field effect transistor, and the other end of the pull-down holding module is electrically connected with the low level signal VSS.
According to an embodiment provided by the present application, the first switch tube, the second switch tube, the third switch tube and the fourth switch tube are all thin film transistors or field effect transistors.
The application also provides a display panel, which comprises all the characteristics of the GOA circuit.
Compared with the prior art, the GOA circuit and the display panel provided by the application have the beneficial effects that:
the application provides a GOA circuit and display panel add a switch tube in the pull-up control module, through the switch tube release residual charge in the pull-up control module is not influencing make under the condition of switch tube performance pull-up control module stable output pull-up control signal makes the electrical property of GOA circuit is more stable.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a GOA circuit according to an embodiment of the present disclosure.
Fig. 2 is a schematic circuit diagram of a GOA unit in a GOA circuit according to an embodiment of the present disclosure.
Fig. 3 is a schematic circuit diagram of another GOA unit in the GOA circuit according to the embodiment of the present disclosure.
Fig. 4 is a timing signal diagram of a GOA unit in a GOA circuit according to an embodiment of the present disclosure.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In the description of the present application, it is to be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," and the like are used in the orientations and positional relationships indicated in the drawings for convenience in describing the present application and for simplicity in description, and are not intended to indicate or imply that the referenced devices or elements must have a particular orientation, be constructed in a particular orientation, and be operated in a particular manner, and are not to be construed as limiting the present application. Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, features defined as "first", "second", may explicitly or implicitly include one or more of the described features. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise.
The present application provides a GOA circuit and a display panel, and particularly refers to fig. 1 to 4.
The switching tube used in all embodiments of the present application may be a thin film transistor or a field effect transistor or other devices with the same characteristics, and since the source and the drain of the switching tube used herein are symmetrical, the source and the drain may be interchanged. In the embodiment of the present application, to separate the two poles of the switch except the gate, one pole is called a source, and the other pole is called a drain. The form in the drawing provides that the middle end of the switching transistor is a grid, the signal input end is a source, and the output end is a drain. In addition, the switch tubes adopted by the embodiment of the application are all N-type transistors or P-type transistors, wherein the N-type transistors are switched on when the grid electrodes are at a high level and switched off when the grid electrodes are at a low level; the P-type transistor is turned on when the gate is at a low level and turned off when the gate is at a high level.
Referring to fig. 1, fig. 1 is a schematic structural diagram of a GOA circuit according to an embodiment of the present disclosure. The GOA circuit provided by the embodiment of the application comprises a plurality of cascaded GOA units. Each grade of GOA unit is used for outputting a scanning signal and a grade of transmission signal. When the GOA circuit works, the first-stage GOA unit is connected to the start signal STV, and then the fourth-stage GOA unit, the seventh-stage GOA unit, … …, and the last-stage GOA unit is started according to the secondary transmission.
Referring to fig. 2, the GOA circuit includes: the device comprises a pull-up control module 11, a pull-up module 12, a bootstrap capacitor 13, a signal transmission module 14, a pull-down module 15 and a pull-down holding module 16.
Specifically, the pull-up control module 11 receives the n-4 th stage pass signal ST (n-4) and the present stage scan signal Gn, and outputs a pull-up control signal to a first node Qn for controlling the potential of the first node Qn according to the n-4 th stage pass signal ST (n-4) and the present stage scan signal Gn.
Specifically, the pull-up module 12 is connected to the current-stage clock signal CKn, and is electrically connected to the first node Qn, for outputting the current-stage scan signal Gn under the control of the potential of the first node Qn.
Specifically, a first end of the bootstrap capacitor 13 is electrically connected to the first node Qn, and a second end of the bootstrap capacitor 13 is electrically connected to the present-stage scan signal Gn.
Specifically, the signal transmission module 14 is connected to the current-stage clock signal CKn, and is electrically connected to the first node Qn, and configured to output the current-stage transmission signal STn under the control of the potential of the first node Qn.
Specifically, the pull-down module 15 is connected to the n +4 th scan signal G (n +4) and the reference low level signal VSS, and is electrically connected to the first node Qn and the present scan signal Gn, for pulling down the potential of the first node Qn and the present scan signal Gn to the potential of the reference low level signal VSS under the control of the n +4 th scan signal G (n + 4).
Specifically, the pull-down holding module 16 is connected to the current-stage clock signal CKn and the reference low-level signal VSS, and is electrically connected to the first node Qn and the second node Pn, for maintaining the potential of the first node Qn according to the current-stage clock signal CKn and the reference low-level signal VSS, and removing the residual charges of the pull-down holding module 16.
In some embodiments, the pull-up control module 11 comprises a first switch transistor T11-a, a second switch transistor T11-b, and a third switch transistor T11-c; control terminals of the first switch transistor T11-a and the second switch transistor T11-b are electrically connected to the n-4 th stage transmission signal ST (n-4), an output terminal of the second switch transistor T11-b is electrically connected to the first node Qn, a control terminal of the third switch transistor T11-c is electrically connected to the first node Qn, an input terminal of the third switch transistor T11-c is electrically connected to the present stage scanning signal Gn, and an output terminal of the first switch transistor T11-a, an input terminal of the second switch transistor T11-b and an output terminal of the third switch transistor T11-c are electrically connected to the third node Mn.
Specifically, when the stage signal STn-4 of the n-4 th stage is at a high level and the present-stage scan signal Gn is at a low level, the first switch transistor T11-a and the second switch transistor T11-b are turned on, the high level of the stage signal STn-4 of the n-4 th stage is transferred to the first node Qn along the first switch transistor T11-a and the second switch transistor T11-b, at this time, the first node Qn is precharged to a high level, the high level of the first node Qn turns on the third switch transistor T11-c, the present-stage scan signal Gn is still at a low level, and the charge of the third node Mn is transferred to the present-stage scan signal Gn; when the stage signal STn-4 of the nth-4 stage is at a low potential, the first node Qn is still at a high potential, the clock signal CKn is also at a high potential, the present stage scan signal Gn obtains a high potential through the pull-up module 12, and at this time, the first switch transistor T11-a and the second switch transistor T11-b are turned off, the third switch transistor T11-c is turned on, the present stage scan signal Gn is at a low potential, the first node Qn is also at a low potential, the stage signal STn-4 of the nth-4 stage is still at a low potential, the first switch transistor T11-a, the second switch transistor T11-b and the third switch transistor T11-c are all in a turned-off state, but the high potential of the third node Mn cannot be released, and the switch transistor connected thereto is affected, and the electrical property thereof is deteriorated, affecting its respective function.
Referring to fig. 3, a schematic structural diagram of a GOA circuit provided in the embodiment of the present application is shown. The GOA circuit provided in the embodiment of the present application includes a plurality of cascaded GOA units, where an nth-level GOA unit includes a pull-up control module 21, a pull-up module 22, a bootstrap capacitor 23, a signal transmission module 24, a pull-down module 25, and a pull-down holding module 26. Wherein n is greater than 4.
When the pull-up control module 21 is at a high level of the n-4 th stage signal ST (n-4), the first switch transistor T21-a and the second switch transistor T21-b are turned on, and the pull-up control signal Qn is output stably. The pull-up control signal Qn may be used to control the opening and closing of the pull-up module 22.
The output end of the pull-up control module 21 is electrically connected to the pull-up module 22, and outputs the current-stage scanning signal Gn according to the pull-up control signal Qn and the current-stage clock signal CKn.
Further, the pull-up control signal Qn output by the pull-up control module 21 is input to the pull-up module 22, and the pull-up module 22 inputs the current-stage clock signal CKn, so that the pull-up module 22 outputs the input current-stage clock signal CKn as the current-stage scan signal Gn according to the pull-up control signal Qn.
The bootstrap capacitor 23 is connected to the output terminal of the pull-up control module 21, and is configured to maintain the pull-up control signal Qn at a high potential during the output period of the present-stage scan signal Gn.
Further, one end of the bootstrap capacitor 23 is electrically connected to the pull-up control signal Qn, and the other end of the bootstrap capacitor 23 is electrically connected to the present-stage scan signal Gn.
The signal transmission module 24 is configured to output the current-stage transmission signal STn according to the current-stage clock signal CKn and the reference low-level signal VSS.
Further, the signal transmission module 24 inputs the current-stage clock signal CKn, and outputs the current-stage transmission signal STn by using the current-stage clock signal CKn according to the reference low-level signal VSS.
The pull-down module 25 is respectively connected to the output terminal of the pull-up control module 21 and the output terminal of the pull-up module 22, and configured to pull down the pull-up control signal Qn to the reference low level signal VSS according to the present-level scan signal Gn and the (n +4) -th-level scan signal G (n + 4).
The pull-down holding module 26 is respectively connected to the pull-down module 25 and the control end of the pull-up control module 21, and is configured to maintain the pull-up control signal Qn at a low potential.
Further, the pull-down holding module 26 accesses the pull-up control signal to the first node Qn, outputs a signal to a second node Pn, and transmits the signal of the second node Pn to the pull-down module 25. When the pull-up control signal is at a low potential, the second node Pn is at a high potential, the switch tube in the pull-down module 25 is turned on, and the pull-up control signal is pulled down and maintained at the low potential.
Further, the pull-up control module 21 comprises a first switch tube T21-a, a second switch tube T21-b, a third switch tube T21-c and a fourth switch tube T21-d, wherein the output end of the first switch tube T21-a, the input end of the second switch tube T21-b, the output end of the third switch tube T21-c and the input end of the fourth switch tube T21-d are electrically connected to the third node Mn; the control terminals of the first switch tube T21-a and the second switch tube T21-b are electrically connected to the (n-4) -th level transmission signal ST (n-4), the control terminal of the third switch tube T21-c is electrically connected to the present level transmission signal STn, the input terminal of the third switch tube T21-c is electrically connected to the present level scanning signal Gn, the control terminal of the fourth switch tube T21-d is electrically connected to the (n +4) -th level transmission signal ST (n +4), and the output terminal of the fourth switch tube T21-d is electrically connected to the reference low level signal VSS.
Further, the pull-up control module 21 is specifically configured to conduct the first switch tube and the second switch tube to output the pull-up control signal when the nth-4 stage transmission signal ST (n-4) is at a high potential; when the pull-up control signal is input to the pull-up module 22 and the current-stage clock signal CKn is also output to the pull-up module 22, the pull-up module 22 outputs the current-stage scan signal Gn according to the pull-up control signal and the current-stage clock signal CKn; when the current-stage scanning signal STn is at a high potential, the third switching tube T21-c is turned on, and the current-stage scanning signal Gn flows to the Mn point; when the n +4 th stage pass signal ST (n +4) is at a high level, the fourth switch tube T21-d is turned on, residual charges in the first, second and third switch tubes T21-a, T21-b and T21-c are released from the output end of the fourth switch tube T21-d to the reference low level signal VSS, and the turn-on voltages of the first, second and third switch tubes T21-a, T21-b and T21-c are adjusted according to the output pull-up control signal to output the stable pull-up control signal.
Further, the turning on of the pull-up control module 21 specifically means the turning on of the first switch transistor T21-a and the second switch transistor T21-b, and the pull-up control signal is output after the first switch transistor T21-a and the second switch transistor T21-b are turned on, and the electric potential of the output pull-up control signal is too high and the electric property is unstable, so that the voltages input to the control ends of the first switch transistor T21-a and the second switch transistor T21-b are adjusted, and further the voltages of the pull-up control signals output by the first switch transistor T21-a and the second switch transistor T21-b are adjusted, so that the pull-up control signal is at a stable high electric potential.
Further, the pull-up control module 21 further includes a third switching tube T21-c;
when the n-4 th stage transmission signal ST (n-4) is at a high potential, the pull-up control module 21 turns on the first switch tube T21-b to output a pull-up control signal at the high potential; when the pull-up control signal is at a high level, the third switch transistor T21-c is turned on to reduce the turn-on voltage of the first switch transistor T21-a, and a stable pull-up control signal is output.
Referring to fig. 3, the difference between the n-4 th stage transmission signal ST (n-4) and the current stage transmission signal STn is a half cycle, i.e., the current stage transmission signal STn is delayed from the n-4 th stage transmission signal ST (n-4) by a half cycle; the n-4 th scan signal G (n-4) is different from the present scan signal Gn by a half period, i.e., the present scan signal Gn is delayed by a half period from the n-4 th scan signal G (n-4). When the input n-4 th stage signal ST (n-4) is at a high level, the first switch transistor T21-a and the second switch transistor T21-b are turned on, the high level of the n-4 th stage signal ST (n-4) is transmitted to the pull-up module 12 through the first node Qn, so that the first switch transistor T11-b is turned on, and the pull-up control module 21 outputs the pull-up control signal at the high level. When the pull-up control signal is at a high level, the pull-up module 12 enables the present-stage scan signal Gn to output a high level under the action of the clock signal CKn, and when the present-stage transmission signal STn is at a high level, the third switching tube T21-c is turned on and feeds back to the first switching tube T21-a and the second switching tube T21-b, and a current flows from the input terminal of the third switching tube T21-c to the output terminal of the third switching tube T21-c, i.e., the third node Mn. When the second switch tube T21-a and the third switch tube T21-c are both conducted, the conducting voltage input to the first switch tube T21-a is reduced through voltage matching, but the first switch tube T21-a can still be conducted, so that the first switch tube T21-a is subjected to smaller current stress, and a stable pull-up control signal is output.
Specifically, the control terminals of the first switch transistor T21-a and the second switch transistor T21-b are electrically connected to the nth-4 stage transmission signal ST (n-4), the input terminal of the first switch transistor T21-a is also electrically connected to the nth-4 stage transmission signal ST (n-4), and the output terminal of the second switch transistor T21-b outputs the pull-up control signal.
Therefore, this application through add a switch tube in the pull-up control module, through the switch tube release residual electric charge in the pull-up control module is not influencing make under the circumstances of switch tube performance the stable output pull-up control signal of pull-up control module makes the electrical property of GOA circuit is more stable.
The foregoing describes in detail a GOA circuit and a display panel provided in an embodiment of the present application, and a specific example is applied in the description to explain the principle and the implementation of the present application, and the description of the foregoing embodiments is only used to help understand the technical solution and the core idea of the present application; those of ordinary skill in the art will understand that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications or substitutions do not depart from the spirit and scope of the present disclosure as defined by the appended claims.
Claims (10)
1. A GOA circuit comprising a plurality of cascaded GOA units, an nth level GOA unit comprising: the device comprises a pull-up control module, a pull-down control module, a pull-up module, a pull-down holding module, a bootstrap capacitor and a signal transmission module; wherein,
the pull-up control module comprises four switching tubes, namely a first switching tube, a second switching tube, a third switching tube and a fourth switching tube, and when an n-4 th-stage transmission signal STn-4 is at a high potential and a current-stage scanning signal Gn is at a low potential, a stable pull-up control signal is output; when the nth stage signal STn is at a high potential, the third switch tube is also turned on, and residual charges in the first switch tube, the second switch tube and the third switch tube are released from the output end of the fourth switch tube, so that the residual charges are prevented from influencing the performance of each switch tube.
2. The GOA circuit of claim 1, wherein the first switching tube is connected in series with the second switching tube, and a control end of the first switching tube and a control end of the second switching tube are electrically connected to the n-4 th stage transmission signal STn-4; the control end of the third switching tube is electrically connected with the (n +4) th-level transmission signal STn +4, and the output end of the third switching tube is electrically connected with the low-level signal VSS.
3. The GOA circuit of claim 1, wherein an output terminal of the first switch tube, an input terminal of the second switch tube, an input terminal of the third switch tube and an output terminal of the fourth switch tube are electrically connected to a point Mn, an input terminal of the fourth switch tube is electrically connected to the nth stage transmission signal STn, and an input terminal of the fourth switch tube is electrically connected to the present stage scanning signal Gn.
4. The GOA circuit as claimed in claim 1, wherein when the n-4 th stage transmission signal STn-4 is high and the present stage scanning signal Gn is low, the first switch and the second switch are turned on to output a stable pull-up control signal and charge the Qn point, and the Qn point and the Mn point are high.
5. The GOA circuit as claimed in claim 4, wherein when the Qn point and the clock signal are at a high level, the nth stage transmission signal STn is at a high level, the present stage scan signal Gn obtains a high level through the pull-up module, the n-4 th stage transmission signal STn-4 is at a low level, the first switch tube and the second switch tube are turned off, the third switch tube is turned on, the present stage scan signal Gn is also transmitted to the Mn point, the n +4 th stage transmission signal STn +4 is charged to a high level, and the charges obtained in the first switch tube, the second switch tube and the third switch tube are discharged from the output terminal of the fourth switch tube.
6. The GOA circuit of claim 1, wherein one end of the bootstrap capacitor is electrically connected to the pull-up module, and the other end of the bootstrap capacitor is electrically connected to the present-level scan signal Gn.
7. The GOA circuit of claim 1, wherein one end of the pull-up module is electrically connected to the clock signal, and the other end of the pull-up module is electrically connected to the pull-down module; one end of the pull-down module is electrically connected with the pull-up module, and the other end of the pull-down module is electrically connected with the low level signal VSS and outputs an n +4 th-level scanning signal Gn + 4.
8. The GOA circuit of claim 1, wherein one end of the signal transmission module is electrically connected to the clock signal, and the other end of the signal transmission module is electrically connected to the low level signal VSS, and outputs the nth stage transmission signal STn to control the third TFT or FET; one end of the pull-down holding module is electrically connected with the output end of the second thin film transistor or the field effect transistor, and the other end of the pull-down holding module is electrically connected with the low level signal VSS.
9. The GOA circuit of claim 1, wherein the first switch tube, the second switch tube, the third switch tube and the fourth switch tube are thin film transistors or field effect transistors.
10. A display panel comprising the GOA circuit of any one of claims 1-9.
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911320660.7A CN111105763A (en) | 2019-12-19 | 2019-12-19 | GOA circuit and display panel |
| PCT/CN2019/128933 WO2021120281A1 (en) | 2019-12-19 | 2019-12-27 | Goa circuit and display panel |
| US16/627,774 US10984696B1 (en) | 2019-12-19 | 2019-12-27 | Gate on array circuit and display panel |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911320660.7A CN111105763A (en) | 2019-12-19 | 2019-12-19 | GOA circuit and display panel |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN111105763A true CN111105763A (en) | 2020-05-05 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201911320660.7A Pending CN111105763A (en) | 2019-12-19 | 2019-12-19 | GOA circuit and display panel |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN111105763A (en) |
| WO (1) | WO2021120281A1 (en) |
Cited By (1)
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| CN113506543A (en) * | 2021-06-09 | 2021-10-15 | 深圳职业技术学院 | GOA circuit beneficial to narrow frame |
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| WO2021120281A1 (en) | 2021-06-24 |
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