CN110783317A - Photosensitive chip packaging structure - Google Patents

Abstract

The invention discloses a photosensitive chip packaging structure, comprising a photosensitive element, a hollow wall, a cavity and a substrate; the substrate is provided with a first surface and a second surface on both sides; a photosensitive area is provided on one side of the photosensitive element, and the other A bottom plate is installed on one side, a hollow wall and a cavity are arranged side by side on the photosensitive area, and the lower part of the photosensitive area is electrically connected with a pad, which is used to connect the internal circuit structure of the photosensitive element with the connection layer through the ceramic layer and the connection layer. The external bumps are electrically connected together; the connection between the cavity and the second surface is provided with a thin film, the thin film is provided with nano-patterns, and the cavity is provided with a lens. Compared with the traditional method, the invention is provided with a plurality of thin films, which can better collect image information. The bottom plate is wrapped with a protective layer against electromagnetic interference. The protective layer can protect the internal circuit of the photosensitive element from external electromagnetic interference when collecting.

Description

Photosensitive chip package structure

technical field

The invention relates to the technical field of photosensitive chip packaging, in particular to a photosensitive chip packaging structure.

Background technique

The photosensitive element is the core of a digital camera, and it is also the most critical technology. The development path of digital cameras can be said to be the development path of photosensitive elements. There are two core imaging components of digital cameras: one is a widely used CCD (charge coupled) element; the other is a CMOS (complementary metal oxide semiconductor) device. Compared with traditional cameras, traditional cameras use "film" as their carrier for recording information, and the "film" of digital cameras is its imaging sensor.

The existing wafer-level chip size packaging technology is a technology of packaging and testing the entire wafer and then cutting a single finished chip. The size of the packaged chip is exactly the same as that of the bare chip. Wafer-level chip-scale packaging technology has completely subverted the traditional packaging such as ceramic leadless chip carriers, organic leadless chip carriers and digital camera module models, and conforms to the market's increasingly light, small, short, and thin microelectronic products. and low price requirements. The chip size packaged by the wafer-level chip size packaging technology has reached a high degree of miniaturization, and the chip cost is significantly reduced with the reduction of the chip size and the increase of the wafer size. Wafer-level chip-scale packaging technology is a technology that can integrate IC design, wafer manufacturing, packaging and testing, and substrate manufacturing. The acquisition effect is not good, and the image acquisition is easily subject to external interference.

SUMMARY OF THE INVENTION

The present invention aims to solve one of the technical problems in the related art at least to a certain extent. Therefore, one purpose of the present invention is to propose a photosensitive chip packaging structure. The present invention is provided with a plurality of films, which can better collect and collect image information than the traditional one. The bottom plate is wrapped with a protective layer against electromagnetic interference. Protect the internal circuit of the photosensitive element from external electromagnetic interference when collecting.

A photosensitive chip package structure according to an embodiment of the present invention includes a photosensitive element, a hollow wall, a cavity and a substrate;

Both sides of the substrate are respectively provided with a first surface and a second surface;

The photosensitive element is provided with a photosensitive area on one side and a bottom plate on the other side. A hollow wall and a cavity are arranged side by side on the photosensitive area. The layer and the connection layer electrically connect the internal circuit structure of the photosensitive element and the external bump together;

The connection between the cavity and the second surface is provided with a thin film, the thin film is provided with nano-patterns, and the cavity is provided with a lens.

Preferably, external elements are mounted on the outside of the first surface, and conductive terminals are mounted on the inside of the first surface.

Preferably, a film with nano-textures is provided on the first surface or the second surface.

Preferably, the nano-patterns include a plurality of first nano-pattern groups and a plurality of second nano-pattern groups, and the first nano-pattern groups and the second nano-pattern groups are arranged to cross each other.

Preferably, the bottom plate is wrapped with a protective layer against electromagnetic interference, and the protective layer is used to protect the internal circuit of the photosensitive element.

Preferably, the cavity includes a first cavity and a second cavity, and the first cavity and the second cavity have the same structure.

Preferably, the thin film may specifically be an organic film or a nano film.

Preferably, the material of the substrate may be transparent glass.

Preferably, the material of the hollow wall can be ceramic material, organic material, glass material or silicon material.

The beneficial effects in the present invention are:

(1) Since the inner cavity of the photosensitive chip package structure has nano-pattern groups located on the film, before the external light enters the pixel unit of the photo-sensitive chip, it is divided into light rays with different polarization directions by different nano-pattern groups, and then is transmitted by the pixel unit. The reception and conversion of the unit is equivalent to obtaining multiple images of different angles in one imaging, and the information of the multiple images is correspondingly distributed in one image according to the distribution mode of different nano-pattern groups, and the photosensitive chip is provided with multiple thin films. The traditional method can better collect and collect image information;

(2) The bottom plate is wrapped with a protective layer against electromagnetic interference, and the protective layer can protect the internal circuit of the photosensitive element from external electromagnetic interference during collection.

Description of drawings

The accompanying drawings are used to provide a further understanding of the present invention, and constitute a part of the specification, and are used to explain the present invention together with the embodiments of the present invention, and do not constitute a limitation to the present invention. In the attached image:

1 is a schematic structural diagram of a photosensitive chip packaging structure proposed by the present invention;

Fig. 2 is the structural representation of the film distribution of Fig. 1;

FIG. 3 is a schematic structural diagram of the connection between the cavity of FIG. 1 and the hollow wall.

In the figure: 1-first surface, 2-substrate, 3-second surface, 4-photosensitive area, 5-photosensitive element, 6-bottom plate, 7-first cavity, 8-cavity wall, 9-second cavity Cavity, 10-film, 101-first nano-pattern group, 102-second nano-pattern group, 11-lens, 12-pad, 13-ceramic layer, 14-connection layer, 15-bump, 16-protective layer , 17-conductive terminal, 18-external components.

Detailed ways

The present invention will now be described in further detail with reference to the accompanying drawings. These drawings are all simplified schematic diagrams, and only illustrate the basic structure of the present invention in a schematic manner, so they only show the structures related to the present invention.

Examples of such embodiments are illustrated in the accompanying drawings, wherein the same or similar reference numerals refer to the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary, and are intended to explain the present invention and should not be construed as limiting the present invention.

In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", " Rear, Left, Right, Vertical, Horizontal, Top, Bottom, Inner, Outer, Clockwise, Counterclockwise, Axial, The orientations or positional relationships indicated by "radial direction", "circumferential direction", etc. are based on the orientations or positional relationships shown in the accompanying drawings, which are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying the indicated devices or elements. It must have a specific orientation, be constructed and operate in a specific orientation, and therefore should not be construed as a limitation of the present invention.

In addition, the terms "first" and "second" are only used for descriptive purposes, and should not be construed as indicating or implying relative importance or implying the number of indicated technical features. Thus, a feature defined as "first" or "second" may expressly or implicitly include one or more of that feature. In the description of the present invention, "plurality" means two or more, unless otherwise expressly and specifically defined.

In the present invention, unless otherwise expressly specified and limited, the terms "installed", "connected", "connected", "fixed" and other terms should be understood in a broad sense, for example, it may be a fixed connection or a detachable connection , or integrated; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, and it can be the internal connection of the two elements or the interaction relationship between the two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific situations.

1-3, a photosensitive chip package structure, including a photosensitive element 5, a hollow wall 8, a cavity and a substrate 2;

The photosensitive element 5 can be a CCD image sensor or a CMOS image sensor;

Both sides of the substrate 2 are respectively provided with a first surface 1 and a second surface 3;

The photosensitive element 5 is provided with a photosensitive area 4 on one side and a bottom plate 6 on the other side. The photosensitive area 4 is provided with a hollow wall 8 and a cavity side by side. The layer 13 and the connection layer 14 electrically connect the internal circuit structure of the photosensitive element 5 and the external bump 15 together;

There is a pixel unit on the photosensitive area 4, and a lens 11 is made on the pixel unit. The pixel unit may include structures such as a color filter layer and a photodiode. The color filter layer is located on the photodiode, and the lens 11 structure is located on the color filter layer. MOS transistors, floating diffusion regions, amplifying circuits and corresponding interconnecting structures are formed to cooperate with the photodiodes. On the one hand, these semiconductor devices and structures are electrically connected to the photodiodes to process the photoelectric signals generated by the photodiodes.

The connection between the cavity and the second surface 3 is provided with a thin film 10, the thin film 10 is provided with nano-patterns, and the cavity is provided with a lens 11;

External elements 18 are mounted on the outside of the first surface 1 , and conductive terminals 17 are mounted on the inside of the first surface 1 .

The first surface 1 or the second surface 3 is provided with a film with nano-textures.

The nano-patterns include a plurality of first nano-pattern groups 101 and a plurality of second nano-pattern groups 102 , and the first nano-pattern groups 101 and the second nano-pattern groups 102 are arranged to intersect.

The wavelength range of visible light is generally 380nm to 780nm, therefore, the widths of the first nanopattern group 101 and the second nanopattern group 102 can be correspondingly set to be twice, one time, one half and one quarter of the wavelength of the corresponding visible light Equal width, so as to realize the diffraction effect on visible light, to ensure that different nano-pattern groups receive light of different angles, or to convert the light into polarized light of different angles.

After obtaining the image information, the image display can be realized after corresponding display processing. The display processing can be displayed by using a corresponding stereoscopic electronic display device, or an image realized by making the corresponding image into a solid image. show.

The bottom plate 6 is wrapped with a protective layer 16 against electromagnetic interference. The protective layer 16 is used to protect the internal circuit of the photosensitive element 5. The cavity includes a first cavity 7 and a second cavity 9. The first cavity 7 and the second cavity The structure is the same, the thin film 10 can be an organic film or a nano film, the material of the substrate 2 can be transparent glass, and the material of the hollow wall 8 can be ceramic material, organic material, glass material or silicon material.

Since the inner cavity of the photosensitive chip package structure has the nano-pattern group located on the film 10, before the external light enters the pixel unit of the photo-sensitive chip, it is divided into light with different polarization directions by different nano-pattern groups, and then is received by the pixel unit. Conversion, which is equivalent to obtaining multiple images of different angles in one imaging, and the information of multiple images is correspondingly distributed in one image according to the distribution mode of different nano-pattern groups, and the photosensitive chip is provided with multiple thin films 10. Better collection and collection of image information;

The bottom plate 6 of the present invention is wrapped with a protective layer 16 for preventing electromagnetic interference. The protective layer 16 can protect the internal circuit of the photosensitive element 5 from external electromagnetic interference during acquisition.

The standard parts used in the present invention can be purchased from the market, the special-shaped parts can be customized according to the description in the specification and the drawings, and the specific connection methods of each part adopt mature bolts, rivets, welding, etc. in the prior art Conventional means, machinery, parts and equipment are all used in the prior art, conventional models, and the circuit connection adopts conventional connection methods in the prior art, which will not be described in detail here, and the content that is not described in detail in this specification belongs to State of the art known to those skilled in the art.

The above description is only a preferred embodiment of the present invention, but the protection scope of the present invention is not limited to this. The equivalent replacement or change of the inventive concept thereof shall be included within the protection scope of the present invention.

Claims (9)

1. The utility model provides a sensitization chip packaging structure which characterized in that: the device comprises a photosensitive element, a hollow wall, a cavity and a substrate;

a first surface and a second surface are respectively arranged on two sides of the substrate;

one side of the photosensitive element is provided with a photosensitive area, the other side of the photosensitive element is provided with a bottom plate, the photosensitive area is provided with a hollow wall and a cavity side by side, the lower part of the photosensitive area is electrically connected with a welding pad, and the welding pad is used for electrically connecting an internal circuit structure of the photosensitive element with an external lug through a ceramic layer and a connecting layer;

the connecting part of the cavity and the second surface is provided with a film, the film is provided with nano-grains, and the cavity is internally provided with a lens.

2. The photosensitive chip package structure of claim 1, wherein: an external element is mounted on the exterior of the first surface, and a conductive terminal is mounted on the interior of the first surface.

3. The photosensitive chip package structure of claim 1, wherein: and a film with nano grains is arranged on the first surface or the second surface.

4. The photosensitive chip package structure of claim 1, wherein: the nano-stripes comprise a plurality of first nano-stripe groups and a plurality of second nano-stripe groups, and the first nano-stripe groups and the second nano-stripe groups are arranged in a crossed mode.

5. The photosensitive chip package structure of claim 1, wherein: the bottom plate is externally wrapped with an electromagnetic interference prevention protective layer which is used for protecting an internal circuit of the photosensitive element.

6. The photosensitive chip package structure of claim 1, wherein: the cavity comprises a first cavity and a second cavity, and the first cavity and the second cavity are identical in structure.

7. The photosensitive chip package structure of claim 1, wherein: the thin film may be specifically an organic film or a nano film.

8. The photosensitive chip package structure of claim 1, wherein: the material of the substrate may be transparent glass.

9. The photosensitive chip package structure of claim 1, wherein: the material of the hollow wall can be ceramic material, organic material, glass material or silicon material.

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