CN105047720B - Silicon-on-insulator RF switching devices structure - Google Patents
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- CN105047720B CN105047720B CN201510491513.1A CN201510491513A CN105047720B CN 105047720 B CN105047720 B CN 105047720B CN 201510491513 A CN201510491513 A CN 201510491513A CN 105047720 B CN105047720 B CN 105047720B
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- 239000012212 insulator Substances 0.000 title claims abstract description 29
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 32
- 229920005591 polysilicon Polymers 0.000 claims abstract description 32
- 239000002184 metal Substances 0.000 claims abstract description 16
- 210000000746 body region Anatomy 0.000 claims abstract description 6
- 238000002955 isolation Methods 0.000 claims description 14
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 11
- 229910052710 silicon Inorganic materials 0.000 claims description 11
- 239000010703 silicon Substances 0.000 claims description 11
- 238000012986 modification Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 230000007547 defect Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 235000012431 wafers Nutrition 0.000 description 1
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
- H10D62/343—Gate regions of field-effect devices having PN junction gates
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Abstract
本发明提供了一种绝缘体上硅射频开关器件结构,包括:作为绝缘层的掩埋氧化物层、布置在掩埋氧化物层上的有源层中的器件区和体区;在器件区中形成有沟道区、源极区和漏极区;而且,其中,沟道区上依次布置有栅极氧化层和栅极多晶硅;在栅极多晶硅的延伸方向上的第一端,栅极多晶硅通过通孔连接至栅极金属布线;在栅极多晶硅的延伸方向上的第二端,与沟道区处于同一层且与沟道区邻接的第一重掺杂区通过通孔连接至金属连接布线的第一端;金属连接布线的第二端通过通孔连接至第二重掺杂区;与第二重掺杂区处于同一层且与处于同一层且与邻接地布置轻掺杂区;在轻掺杂区上布置有连接多晶硅;连接多晶硅通过通孔连接至栅极金属布线。
The invention provides a silicon-on-insulator radio frequency switching device structure, comprising: a buried oxide layer as an insulating layer, a device region and a body region arranged in an active layer on the buried oxide layer; a device region is formed in the device region a channel region, a source region and a drain region; and wherein, a gate oxide layer and a gate polysilicon are sequentially arranged on the channel region; at the first end in the extending direction of the gate polysilicon, the gate polysilicon passes through The hole is connected to the gate metal wiring; at the second end in the extending direction of the gate polysilicon, the first heavily doped region which is in the same layer as the channel region and adjacent to the channel region is connected to the metal connection wiring through the via hole The first end; the second end of the metal connection wiring is connected to the second heavily doped region through a through hole; it is in the same layer as the second heavily doped region and is in the same layer as and adjacent to the lightly doped region; in the lightly doped region The connection polysilicon is arranged on the doped region; the connection polysilicon is connected to the gate metal wiring through the through hole.
Description
技术领域technical field
本发明涉及半导体制造领域,更具体地说,本发明涉及一种绝缘体上硅射频开关器件结构。The invention relates to the field of semiconductor manufacturing, and more specifically, the invention relates to a silicon-on-insulator radio frequency switch device structure.
背景技术Background technique
硅材料是半导体行业应用最广泛的主要原材料,大多数芯片都是用硅片制造的。绝缘体上硅(SOI,Silicon-on-insulator)是一种特殊的硅片,其结构的主要特点是在有源层和衬底层之间插入绝缘层(掩埋氧化物层)来隔断有源层和衬底之间的电气连接,这一结构特点为绝缘体上硅类的器件带来了寄生效应小、速度快、功耗低、集成度高、抗辐射能力强等诸多优点。Silicon is the most widely used primary raw material in the semiconductor industry, and most chips are made of silicon wafers. Silicon-on-insulator (SOI, Silicon-on-insulator) is a special silicon chip, the main feature of its structure is to insert an insulating layer (buried oxide layer) between the active layer and the substrate layer to isolate the active layer and The electrical connection between substrates, this structural feature brings many advantages such as small parasitic effects, fast speed, low power consumption, high integration, and strong radiation resistance to silicon-on-insulator devices.
现在,已经采用绝缘体上硅技术来制造开关器件。一般来说,对于具体的电子电路应用,线性度是绝缘体上硅射频开关器件的一个重要指标。但是,对于一些特定应用,现有的绝缘体上硅射频开关器件的隔离性能和线性度还不能满足要求。因此,期望能够提供一种能够有效地提高绝缘体上硅射频开关器件的隔离性能和线性度的器件结构。Today, silicon-on-insulator technology has been used to fabricate switching devices. In general, for specific electronic circuit applications, linearity is an important specification for silicon-on-insulator RF switching devices. However, for some specific applications, the isolation performance and linearity of existing silicon-on-insulator RF switching devices cannot meet the requirements. Therefore, it is desired to provide a device structure that can effectively improve the isolation performance and linearity of silicon-on-insulator radio frequency switching devices.
发明内容Contents of the invention
本发明所要解决的技术问题是针对现有技术中存在上述缺陷,提供一种能够有效地提高绝缘体上硅射频开关器件的隔离性能和线性度的器件结构。The technical problem to be solved by the present invention is to provide a device structure capable of effectively improving the isolation performance and linearity of silicon-on-insulator radio frequency switching devices in view of the above-mentioned defects in the prior art.
为了实现上述技术目的,根据本发明,提供了一种绝缘体上硅射频开关器件结构,包括:作为绝缘层的掩埋氧化物层、布置在掩埋氧化物层上的有源层中的器件区和体区;在器件区中形成有沟道区、源极区和漏极区;而且,其中,沟道区上依次布置有栅极氧化层和栅极多晶硅;在栅极多晶硅的延伸方向上的第一端,栅极多晶硅通过通孔连接至栅极金属布线;在栅极多晶硅的延伸方向上的第二端,与沟道区处于同一层且与沟道区邻接的第一重掺杂区通过通孔连接至金属连接布线的第一端;金属连接布线的第二端通过通孔连接至第二重掺杂区;与第二重掺杂区处于同一层且与处于同一层且与邻接地布置轻掺杂区;在轻掺杂区上布置有连接多晶硅;连接多晶硅通过通孔连接至栅极金属布线。In order to achieve the above technical objectives, according to the present invention, a silicon-on-insulator radio frequency switching device structure is provided, including: a buried oxide layer as an insulating layer, a device region and a body arranged in the active layer on the buried oxide layer region; a channel region, a source region and a drain region are formed in the device region; and, wherein, a gate oxide layer and a gate polysilicon are sequentially arranged on the channel region; the first in the extending direction of the gate polysilicon At one end, the gate polysilicon is connected to the gate metal wiring through a via hole; at the second end in the extending direction of the gate polysilicon, the first heavily doped region that is in the same layer as the channel region and adjacent to the channel region passes through The through hole is connected to the first end of the metal connection wiring; the second end of the metal connection wiring is connected to the second heavily doped region through the through hole; it is in the same layer as the second heavily doped region and is in the same layer and adjacent to the ground The lightly doped region is arranged; the connection polysilicon is arranged on the lightly doped region; the connection polysilicon is connected to the gate metal wiring through the through hole.
优选地,轻掺杂区、第一重掺杂区和第二重掺杂区具有相同的掺杂类型。Preferably, the lightly doped region, the first heavily doped region and the second heavily doped region have the same doping type.
优选地,轻掺杂区、第一重掺杂区和第二重掺杂区的掺杂类型为P型掺杂。Preferably, the doping type of the lightly doped region, the first heavily doped region and the second heavily doped region is P-type doping.
优选地,连接多晶硅的掺杂类型与轻掺杂区、第一重掺杂区和第二重掺杂区的掺杂类型相反。Preferably, the doping type of the connecting polysilicon is opposite to that of the lightly doped region, the first heavily doped region and the second heavily doped region.
优选地,连接多晶硅的侧部布置有侧壁。Preferably, sidewalls are arranged on the side where the polysilicon is connected.
优选地,所述侧壁处于第二重掺杂区上方。Preferably, the sidewall is above the second heavily doped region.
优选地,体区中的硅层、沟道区、源极区和漏极区被隔离区包围。Preferably, the silicon layer in the body region, the channel region, the source region and the drain region are surrounded by isolation regions.
优选地,隔离区是浅沟槽隔离。Preferably, the isolation regions are shallow trench isolations.
优选地,掩埋氧化物层布置在硅基底层上。Preferably, the buried oxide layer is arranged on the silicon base layer.
附图说明Description of drawings
结合附图,并通过参考下面的详细描述,将会更容易地对本发明有更完整的理解并且更容易地理解其伴随的优点和特征,其中:A more complete understanding of the invention, and its accompanying advantages and features, will be more readily understood by reference to the following detailed description, taken in conjunction with the accompanying drawings, in which:
图1示意性地示出了根据本发明优选实施例的绝缘体上硅射频开关器件结构的俯视图。Fig. 1 schematically shows a top view of the structure of a silicon-on-insulator radio frequency switching device according to a preferred embodiment of the present invention.
图2示意性地示出了根据本发明优选实施例的绝缘体上硅射频开关器件结构沿图1的线A-A’的截面示意图。Fig. 2 schematically shows a schematic cross-sectional view of a silicon-on-insulator radio frequency switching device structure along line A-A' of Fig. 1 according to a preferred embodiment of the present invention.
图3示意性地示出了根据本发明优选实施例的绝缘体上硅射频开关器件结构沿图1的线B-B’的截面示意图。Fig. 3 schematically shows a schematic cross-sectional view of a silicon-on-insulator radio frequency switching device structure along line B-B' in Fig. 1 according to a preferred embodiment of the present invention.
需要说明的是,附图用于说明本发明,而非限制本发明。注意,表示结构的附图可能并非按比例绘制。并且,附图中,相同或者类似的元件标有相同或者类似的标号。It should be noted that the accompanying drawings are used to illustrate the present invention, but not to limit the present invention. Note that drawings showing structures may not be drawn to scale. And, in the drawings, the same or similar elements are marked with the same or similar symbols.
具体实施方式Detailed ways
为了使本发明的内容更加清楚和易懂,下面结合具体实施例和附图对本发明的内容进行详细描述。In order to make the content of the present invention clearer and easier to understand, the content of the present invention will be described in detail below in conjunction with specific embodiments and accompanying drawings.
图1示意性地示出了根据本发明优选实施例的绝缘体上硅射频开关器件结构的俯视图。图2示意性地示出了根据本发明优选实施例的绝缘体上硅射频开关器件结构沿图1的线A-A’的截面示意图。图3示意性地示出了根据本发明优选实施例的绝缘体上硅射频开关器件结构沿图1的线B-B’的截面示意图。Fig. 1 schematically shows a top view of the structure of a silicon-on-insulator radio frequency switching device according to a preferred embodiment of the present invention. Fig. 2 schematically shows a schematic cross-sectional view of a silicon-on-insulator radio frequency switching device structure along line A-A' of Fig. 1 according to a preferred embodiment of the present invention. Fig. 3 schematically shows a schematic cross-sectional view of a silicon-on-insulator radio frequency switching device structure along line B-B' in Fig. 1 according to a preferred embodiment of the present invention.
如图1、图2和图3所示,根据本发明优选实施例的绝缘体上硅射频开关器件结构包括:作为绝缘层的掩埋氧化物层60、布置在掩埋氧化物层60上的有源层中的器件区和体区。As shown in FIG. 1 , FIG. 2 and FIG. 3 , the silicon-on-insulator radio frequency switching device structure according to a preferred embodiment of the present invention includes: a buried oxide layer 60 as an insulating layer, an active layer disposed on the buried oxide layer 60 The device region and body region in .
其中,在器件区中形成有沟道区30、源极区31和漏极区32;而且,其中,沟道区30上依次布置有栅极氧化层41和栅极多晶硅10。Wherein, a channel region 30 , a source region 31 and a drain region 32 are formed in the device region; moreover, a gate oxide layer 41 and a gate polysilicon 10 are sequentially arranged on the channel region 30 .
在栅极多晶硅10的延伸方向上的第一端,栅极多晶硅10通过通孔连接至栅极金属布线21;在栅极多晶硅10的延伸方向上的第二端,与沟道区30处于同一层且与沟道区30邻接的第一重掺杂区91通过通孔连接至金属连接布线24的第一端;金属连接布线24的第二端通过通孔连接至第二重掺杂区92;与第二重掺杂区92处于同一层且与处于同一层且与邻接地布置轻掺杂区34;在轻掺杂区34上布置有连接多晶硅80;连接多晶硅80通过通孔连接至栅极金属布线21。At the first end in the extending direction of the gate polysilicon 10, the gate polysilicon 10 is connected to the gate metal wiring 21 through a via hole; at the second end in the extending direction of the gate polysilicon 10, it is at the same level as the channel region 30 The first heavily doped region 91 adjacent to the channel region 30 is connected to the first end of the metal connection wiring 24 through a via hole; the second end of the metal connection wiring 24 is connected to the second heavily doped region 92 through a via hole ; be in the same layer as the second heavily doped region 92 and be in the same layer and adjacently arranged with the lightly doped region 34 ; the connection polysilicon 80 is arranged on the lightly doped region 34 ; the connection polysilicon 80 is connected to the gate through a via hole pole metal wiring 21 .
由此,在根据本发明优选实施例的绝缘体上硅射频开关器件结构中,如图3的虚线二极管所示,在轻掺杂区34和连接多晶硅80之间形成一个垂直的二极管,从而增强绝缘体上硅射频开关器件的隔离性能和线性度。Therefore, in the silicon-on-insulator radio frequency switching device structure according to the preferred embodiment of the present invention, as shown by the dotted line diode in FIG. Isolation performance and linearity of RF switching devices on silicon.
轻掺杂区34、第一重掺杂区91和第二重掺杂区92具有相同的掺杂类型,例如P型掺杂。The lightly doped region 34 , the first heavily doped region 91 and the second heavily doped region 92 have the same doping type, such as P-type doping.
优选地,连接多晶硅80的掺杂类型与轻掺杂区34、第一重掺杂区91和第二重掺杂区92的掺杂类型相反,例如N型掺杂。Preferably, the doping type of the connecting polysilicon 80 is opposite to that of the lightly doped region 34 , the first heavily doped region 91 and the second heavily doped region 92 , such as N-type doping.
优选地,连接多晶硅80的侧部布置有侧壁81;而且,所述侧壁81处于第二重掺杂区92上方。Preferably, a sidewall 81 is arranged on the side connecting the polysilicon 80 ; moreover, the sidewall 81 is above the second heavily doped region 92 .
进一步地,具体地,体区200中的硅层、沟道区30、源极区31和漏极区32被隔离区50包围,以与其它器件隔开。Further, specifically, the silicon layer in the body region 200 , the channel region 30 , the source region 31 and the drain region 32 are surrounded by the isolation region 50 to be separated from other devices.
其中,具体地,例如,隔离区50是浅沟槽隔离。Wherein, specifically, for example, the isolation region 50 is a shallow trench isolation.
其中,具体地,如图2和图3所示,掩埋氧化物层60布置在硅基底层70上。其中硅基底层70为上面的掩埋氧化物层60和掩埋氧化物层60上的器件结构提供机械支撑。Wherein, specifically, as shown in FIGS. 2 and 3 , the buried oxide layer 60 is disposed on the silicon base layer 70 . The silicon base layer 70 provides mechanical support for the above buried oxide layer 60 and the device structure on the buried oxide layer 60 .
例如,如图3所示,轻掺杂区34和第二重掺杂区92布置在浅沟槽隔离51中,以与其它结构隔开。For example, as shown in FIG. 3 , the lightly doped region 34 and the second heavily doped region 92 are arranged in the shallow trench isolation 51 to be separated from other structures.
此外,需要说明的是,除非特别说明或者指出,否则说明书中的术语“第一”、“第二”、“第三”等描述仅仅用于区分说明书中的各个组件、元素、步骤等,而不是用于表示各个组件、元素、步骤之间的逻辑关系或者顺序关系等。In addition, it should be noted that, unless otherwise specified or pointed out, the terms “first”, “second”, “third” and other descriptions in the specification are only used to distinguish each component, element, step, etc. in the specification, and It is not used to represent the logical relationship or sequential relationship between various components, elements, and steps.
可以理解的是,虽然本发明已以较佳实施例披露如上,然而上述实施例并非用以限定本发明。对于任何熟悉本领域的技术人员而言,在不脱离本发明技术方案范围情况下,都可利用上述揭示的技术内容对本发明技术方案作出许多可能的变动和修饰,或修改为等同变化的等效实施例。因此,凡是未脱离本发明技术方案的内容,依据本发明的技术实质对以上实施例所做的任何简单修改、等同变化及修饰,均仍属于本发明技术方案保护的范围内。It can be understood that although the present invention has been disclosed above with preferred embodiments, the above embodiments are not intended to limit the present invention. For any person skilled in the art, without departing from the scope of the technical solution of the present invention, the technical content disclosed above can be used to make many possible changes and modifications to the technical solution of the present invention, or be modified to be equivalent to equivalent changes. Example. Therefore, any simple modifications, equivalent changes and modifications made to the above embodiments according to the technical essence of the present invention, which do not deviate from the technical solution of the present invention, still fall within the protection scope of the technical solution of the present invention.
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CN102683417A (en) * | 2012-05-17 | 2012-09-19 | 中国科学院微电子研究所 | Soi mos transistor |
CN103441131A (en) * | 2013-08-29 | 2013-12-11 | 上海宏力半导体制造有限公司 | Partially-depleted silicon-on-insulator device structure |
CN104766889A (en) * | 2015-04-17 | 2015-07-08 | 上海华虹宏力半导体制造有限公司 | Silicon-on-insulator RF switching device structure |
CN104810406A (en) * | 2015-04-17 | 2015-07-29 | 上海华虹宏力半导体制造有限公司 | Silicon-on-insulator radio frequency switching device structure |
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