CN104065255B - A kind of three-phase four-leg inverter circulation inhibition method in parallel based on the feedforward of zero sequence circulation - Google Patents

Abstract

A parallel three-phase four-leg inverter circulation suppression method based on zero-sequence circular current feedforward, through a distributed circulation suppression method based on voltage and current double-loop average current control, realizes multiple three-phase four-leg inverter parallel topology The parallel three-phase bridge arm output filter inductor current is shared to suppress interphase circulation; at the same time, the three-phase output filter current reference signal generated by the voltage outer loop shared by the inverter is added as the zero-sequence current reference signal, and each inverter The inductor current of the fourth bridge arm is compared with the zero-sequence current reference, and then the modulation signal of the fourth bridge arm is generated through a proportional integral link, and the fourth bridge arm of each inverter is controlled to realize the current sharing of the inductor current of the fourth bridge arm. This method effectively suppresses the three-phase zero-sequence circulating current between the inverters, and contributes to the power balance between the inverters; and the feed-forward loop to realize the zero-sequence circulating current suppression only needs the control signal of the control circuit of the unit, and does not rely on Signal exchange between paralleled units.

Description

A Method for Circulating Current Suppression of Parallel Three-phase Four-leg Inverters Based on Zero-Sequence Circulating Current Feedforward

technical field

The invention relates to a method for suppressing the circulation of parallel three-phase four-arm inverters based on zero-sequence circulation feedforward, which belongs to the control technology in electric energy conversion devices.

Background technique

As distributed power generation in new energy, aviation, electric vehicles and other fields puts higher and higher requirements on converter power capacity and power quality, multi-inverter parallel expansion technology has received more and more attention. Among them, the parallel connection of inverters using a common input bus is different from the parallel connection of traditional DC-DC converters. When multiple inverters are connected in parallel, in addition to achieving power balance, the parallel inverters also require the output voltage and amplitude phase of the same phase bridge arm. The dynamics are consistent to suppress the circulating current between parallel inverters with a common DC bus. Compared with the three-phase three-leg inverter, the three-phase four-leg inverter is widely used because of its advantages such as phase-to-phase control decoupling and unbalanced load capability.

DC voltage utilization is an inherent problem of inverters using PWM modulation, and third harmonic injection is currently a commonly used method for inverters to improve DC voltage utilization. The improvement of the utilization rate of DC voltage helps to reduce the voltage level of the input side of the inverter, reduce the switching loss, and improve the quality of the output waveform. For the three-phase four-leg inverter, the third harmonic can be synthesized by using the output error signal of the three-phase current loop, and injected into the control signals of the fourth bridge arm and the three-phase bridge arm to realize the third harmonic injection. This method is simple to control, Suitable for analog circuit implementation. When multiple inverters are connected in parallel, since the main circuit parameters and analog circuit control parameters of each inverter cannot be completely consistent, the output error signal of the current loop is instantaneously unbalanced, so the third harmonic synthesized by each inverter The wave signal is momentarily inconsistent. When the third harmonic signal generated inside each inverter is superimposed on the control signal of the inverter, it is equivalent to introducing an unbalanced disturbance component, and the phase and amplitude difference of the output bridge arm voltage is generated between the inverters . The disturbance finally appears in the form of zero-sequence circulating current between parallel units, and is superimposed on the output inductor current of the parallel inverter, increasing the peak value of the circulating current. Although this problem can be solved by superimposing the third harmonic signals independently generated by all parallel units and taking the average value, and using the average value as a common third harmonic signal to offset the zero-sequence component, this method increases the inverter The signal communication between the inverters, and if one or several inverters fail, the whole machine needs to be shut down, which affects the redundancy of the whole machine. Therefore, it is necessary to study a zero-sequence circulating current suppression method that does not rely on signal communication between parallel inverters, while ensuring the redundancy between parallel units, so as to ensure the parallel three-phase four-leg inverter based on third harmonic injection. circulation is effectively suppressed.

Contents of the invention

Purpose of the invention: Aiming at the above-mentioned prior art, a current-sharing control method for parallel three-phase four-leg inverters based on third harmonic injection is proposed, so that zero-sequence circulating current suppression does not depend on signal communication between parallel inverters, and at the same time Ensure redundancy between parallel inverters.

Technical solution: A parallel three-phase four-leg inverter circulation suppression method based on zero-sequence circulation feedforward, through a distributed circulation suppression method based on voltage and current double-loop average current control, multiple three-phase four-leg inverters are realized In the parallel connection of inverter parallel topology, the output filter inductor current of the three-phase bridge arm is current-balanced, and the circulating current between the parallel bridge arms is suppressed; at the same time, the three-phase output filter current reference signal generated by the voltage outer loop shared by the inverter is added as the zero of the parallel unit Sequence current reference signal, compare the inductor current of the fourth bridge arm of each inverter with the zero-sequence current reference, and then generate the modulation signal of the fourth bridge arm through the proportional integral link, and control the fourth bridge arm of each inverter to realize the fourth bridge Arm inductor current sharing.

As an improvement of the present invention, the following steps are also included:

Step 1), add the three-phase output filter inductor current reference signals generated by the shared voltage outer loop as the zero-sequence current reference signal, and add the three-phase output filter inductor current feedback values inside a parallel inverter as the current inverter The zero-sequence current feedback signal of the inverter, and then the difference between the zero-sequence current feedback signal and the zero-sequence current reference signal is amplified through the proportional link, and used as the zero-sequence circulating current suppression feedforward control signal of the inverter;

Step 2), the three-phase current loop output error signal of each inverter is superimposed on the said zero-sequence circulating current suppression feedforward control signal of this inverter to obtain the current loop three-phase modulation signal, and each inverter current loop The three-phase modulation signal synthesizes the corresponding third harmonic signal;

Step 3), superimposing each third harmonic signal into the three-phase modulation signal of the corresponding inverter, thereby generating the three-phase parallel bridge arm modulation signal of each inverter; simultaneously superimposing each third harmonic signal on the corresponding In the modulation signal of the fourth bridge arm of each inverter, the third harmonic injection of the whole machine is finally realized.

Beneficial effects: each inverter is controlled by a common voltage outer loop, the three-phase filter inductor current of the inverter tracks the three-phase output filter current reference signal generated by the voltage outer loop through the proportional integral link, and the fourth bridge arm inductor current tracks zero The sequence current reference realizes the parallel connection of three-phase and neutral inductors to balance the power of each inverter.

Add the three-phase output filter inductor current reference signals generated by the shared voltage outer loop as the zero-sequence current reference signal, and add the three-phase output filter inductor current feedback values inside a parallel inverter as the zero-sequence current feedback signal. Then the difference between the zero-sequence current feedback signal and the zero-sequence current reference signal is amplified through a proportional link, and used as the zero-sequence circulating current suppression feedforward control signal of the inverter. However, the zero-sequence circulating current suppression feedforward control signal contains not only the harmonic component of the zero-sequence circulating current, but also the high-frequency component composed of the carrier frequency and its harmonics. Feedforward to the control loop will cause multiple differences between the final modulation wave and the carrier wave. For the second delivery, increasing the switching frequency produces additional loss, so the proportional controller of the feedforward link needs to increase the high-frequency pole to eliminate the high-frequency carrier harmonic component. The signal obtained by the feedforward link is superimposed on the output error signal of the three-phase current loop of the parallel inverter, and a new three-phase modulation signal of the current loop is generated, and the third harmonic is synthesized with it. The function of the feedforward loop is equivalent to improving The gain of the current loop for the harmonic components of the zero-sequence circulating current. The third harmonic injection is realized by superimposing the newly generated third harmonic signal into the modulation signals of the three-phase bridge arm and the fourth bridge arm. Finally, the modulated signal and the carrier intersect to generate SPWM pulses of each bridge arm to control the switch of the main power transistor.

This method adds a feed-forward link on the basis of the original control method of each inverter. The feedback control quantity used in the feedforward link is the control signal inside the control loop of the inverter. Therefore, the zero-sequence circulating current suppression link in this method does not depend on the communication between parallel units. The feed-forward loop is combined with a current sharing control method based on voltage and current double-loop control, which can realize circulation suppression and redundant work between parallel inverters.

Description of drawings

Fig. 1 is a schematic diagram of the control method of the redundant three-phase harmonic injection three-phase four-arm inverter parallel zero-sequence circulating current suppression method of the present invention; the label name in the accompanying drawing 1: (1) parallel inverter three-phase distributed current sharing (2) two inverters connected in parallel with three-phase four-arm inverter main circuit unit; (3) three-phase current equalizing current reference signal generating unit; (4) fourth bridge arm current reference signal generating unit; ( 5) The current reference signal of the fourth bridge arm; (6) The current sharing control unit of the fourth bridge arm; (7) The third harmonic generation unit; (8) The zero-sequence circulating current reference signal generation unit of the feedforward link; (9) The front (10) Zero-sequence circulating current gain unit; (11) Feedforward signal injection; (12) Three-phase modulation signal third harmonic injection unit;

Names of main symbols in attached drawing 1: _Vin - input voltage, C ₁ , C ₂ - input filter capacitor, Q ₁ , Q ₂ , Q ₃ , Q ₄ , Q ₅ , Q ₆ , Q ₇ , Q ₈ ——Parallel inverter unit 1 main power tube switch signal of each bridge arm, L _A1 , L _B1 , L _C1 ——Parallel inverter unit 1 three-phase filter inductor, IL _A1 , IL _B1 , IL _C1 ——Parallel inverter unit 1 Three-phase filter inductor current, L _N1 —— parallel inverter unit 1 neutral inductance, IL _N1 —— parallel inverter unit 1 neutral inductor current, Q ₉ , Q ₁₀ , Q ₁₁ , Q ₁₂ , Q ₁₃ , Q ₁₄ , Q ₁₅ , Q ₁₆ ——Switch signals of main power tubes of each bridge arm of parallel inverter unit 2, L _A2 , L _B2 , L _{C2 ——Three} -phase filter inductor of parallel inverter unit 2, IL _A2 , IL _B2 , IL _C2 — —Parallel inverter unit 2 three-phase filter inductor current, L _N2 —Parallel inverter unit 2 neutral line inductance, IL _N2 —Inverter 1 neutral line inductor current, C _A , C _B , C _{C —Three} -phase output filter Capacitance, R _A , R _B , R _C —three-phase load impedance, VA, V _B , V _C —three _- phase output voltage, V _aref , V _bref , V _cref —three-phase output voltage reference signal, I _aref , I _bref , I _cref — three-phase output filter inductor current reference signal, M _a1 , M _b1 , M _c1 — three-phase current loop output error signal of parallel inverter unit 1, Ma2, Mb2, Mc2 — parallel inverter Transformer unit 2 three-phase current loop output error signal, V ₁ ——parallel inverter unit 1 zero-sequence circulation suppression feedforward signal, V ₂ —parallel inverter unit 2 zero-sequence circulation suppression feedforward signal, Ta1, Tb1, Tc1 ——the three-phase modulation signal after the current loop output error signal of parallel inverter unit 1 is superimposed on the zero-sequence circulating current suppression feedforward signal, Ta2, Tb2, Tc2 ——the three-phase modulation signal after the current loop output signal of parallel inverter unit 2 is superimposed on the feedforward signal Phase modulation signal, TFH1 - third harmonic signal of parallel inverter unit 1, TFH2 - third harmonic signal of parallel inverter unit 2, Inref - zero-sequence current reference signal in feedforward link, I ₁ , I ₂ - Zero-sequence current feedback signal in the feedforward link;

Figure 2 is the waveform of the three-phase four-leg inverter with a load of 10KW when the three-phase four-leg inverter is connected in parallel without the zero-sequence circulation suppression method;

Figure 3 is the three-phase inductive current waveform of the parallel unit with a load of 2KW when the three-phase four-leg inverter is connected in parallel without the zero-sequence circulation suppression method;

Figure 4 is the third harmonic signal waveform independently generated by two parallel inverters when the parallel three-phase four-leg inverter based on third harmonic injection does not adopt the zero-sequence circulating current suppression method;

Figure 5 is a parallel three-phase four-leg inverter based on the third harmonic injection and adopts the zero-sequence circulating current suppression method to load a 10KW three-phase circulating current waveform;

Figure 6 is the load 2KW three-phase inductor current waveform of the parallel three-phase four-leg inverter based on the third harmonic injection using the zero-sequence circulating current suppression method;

Figure 7 is the third harmonic signal waveform independently generated by the two parallel inverters after the zero-sequence circulating current suppression method is adopted for the parallel three-phase four-leg inverter based on third harmonic injection;

Figure 8 is the three-phase inductor current waveform under the unbalanced load state of one phase full load and two phases 1/3 load of a parallel three-phase four-leg inverter based on third harmonic injection using the zero-sequence circulating current suppression method;

Figure 9 shows the three-phase output voltage waveform under unbalanced load state when three-phase four-leg inverters with three-phase harmonic injection are connected in parallel and adopt zero-sequence circulating current suppression feed-forward control method.

detailed description

The present invention will be further explained below in conjunction with the accompanying drawings.

Taking the two-unit parallel three-phase four-leg inverter as an example, Figure 1 is a schematic structural diagram of the control method of the third harmonic injection zero-sequence circulating current redundant feed-forward suppression method of the parallel three-phase four-leg inverter, and its control circuit is mainly It consists of a parallel three-phase four-leg inverter main circuit, a three-phase current distributed current sharing controller, a fourth bridge arm current sharing controller, a zero-sequence circulating current suppression feedforward loop, and a third harmonic generator.

Wherein, the parallel three-phase four-leg inverter main circuit includes a parallel first three-phase four-leg inverter unit and a second three-phase four-leg inverter unit. In the three-phase current-sharing current reference signal generating unit, firstly, the feedback three-phase output voltages V _A , V _B , V _C are respectively compared with the reference voltages V _aref , V _bref , V _cref , and then through the operational amplifier and its The proportional-integral compensation link composed of peripheral circuits obtains the three-phase output filter inductor current reference signals I _aref , I _bref , and I _cref of the current loop. Then the feedback values IL _A1 , IL _B1 , IL _C1 of the three-phase filter inductor current of the first inverter unit and the feedback values IL _A2 , IL _B2 , IL B2 of the second inverter unit three-phase filter inductor current are obtained by sampling the current sensor. IL _C2 . After comparing the feedback values of the three-phase filter inductor currents of each inverter unit with the shared current reference signals I _aref , I _bref , and I _cref , the first inverters are obtained through the proportional-integral link composed of operational amplifiers and peripheral circuits. The three-phase current loop output error signals M _a1 , M _b1 , M _c1 of the inverter unit, and the three-phase current loop output error signals M _a2 , M _b2 , M _c2 of the second inverter unit.

Add the common three-phase output filter inductor current reference signals I _aref , I _bref , and I _cref to obtain the zero-sequence current reference signal I _nref in the feedforward link of the three-phase four-leg bridge arm, which is used as the fourth Reference signal for arm neutral inductor current. Add the three-phase filter inductor current values IL _A1 , IL _B1 , and IL _C1 fed back by the first inverter as the zero-sequence current feedback signal I ₁ in the feed-forward link of the inverter. The zero-sequence current feedback signal I ₁ passes through After the proportional link tracks the zero-sequence current reference signal _Inref , it is used as a feed-forward signal V ₁ for zero-sequence circulating current suppression of the first inverter. Then add the feed-forward signal V ₁ of the zero-sequence circulating current suppression to the output error signals M _a1 , M _b1 , M _c1 of the first inverter three-phase current loop respectively as new three-phase modulation signals T _a1 , T _b1 , T _c1 , namely the new current loop output error signal. Similarly, add the three-phase filter inductor current values IL _A2 , IL _B2 , and IL _C2 fed back by the second inverter as the zero-sequence current feedback signal I ₂ in the feed-forward link of the inverter. The zero-sequence current feedback signal I ₂ is used as the feed-forward signal V ₂ for zero-sequence circulating current suppression of the second inverter after tracking the zero-sequence current reference signal _Inref through the proportional link. Then add the feedforward signal V ₂ of the zero-sequence circulating current suppression to the second inverter three-phase current loop output error signals M _a2 , M _b2 , M _c2 respectively as new three-phase modulation signals T _a2 , T _b2 , T _c2 , namely the new current loop output error signal. In the first inverter, three sets of three-phase modulation signals T _a1 , T _b1 , T _c1 superimposed with feedforward signals pass through the third harmonic generation unit to generate the third harmonic TFH1 to be injected into the inverter. In the second inverter, three sets of three-phase modulation signals T _a2 , T _b2 , T _c2 superimposed with feedforward signals pass through the third harmonic generating unit to generate the third harmonic TFH2 to be injected into the inverter.

Add the three-phase output filter inductor current reference signals I _aref , I _bref , and I _cref of the current loop as the zero-sequence current reference signal Inref in the feedforward link, and track the neutral line inductor current _ILN1 of the first inverter to zero through the proportional link After the sequence current reference signal _Inref , the third harmonic TFH1 is superimposed to generate the modulation signal of the fourth bridge arm of the first inverter. Similarly, after the neutral line inductor current IL _N2 of the second inverter tracks the zero-sequence current reference signal Inref through a proportional link, the third harmonic TFH2 is superimposed to generate the modulation signal of the fourth bridge arm of the second inverter. At the same time, the third harmonic TFH1 is superimposed on the first inverter three-phase modulation signals T _a1 , T _b1 , T _c1 respectively, and the third harmonic TFH2 is respectively superimposed on the second inverter three-phase modulation signals T _a2 , T _b2 , T _c2 , so as to realize the third harmonic injection. The modulated signals finally obtained by all the bridge arms of each inverter are interleaved with the carrier to obtain the SPWM switching signal of the main power transistor in each inverter.

Working principle: For parallel three-phase three-leg inverters with a common DC bus, the distributed current sharing control method based on average current control is a common control method to realize redundant work of parallel units. In the parallel connection system of three-phase four-leg inverters, the fourth bridge arm will also have the circulation problem like the previous three bridge arms. The parallel unit topology targeted by the present invention is based on a three-phase four-leg inverter. In order to realize the ability to withstand unbalanced loads on the basis of the three-phase three-leg inverter, the fourth bridge arm is introduced as the load unbalanced inverter. The zero-sequence current provides a path, and the zero-sequence current is defined as the sum of the inductor currents of the three bridge arms. In order to realize the current sharing of the inductor current in the fourth arm of the parallel three-phase four-arm inverter, the sum of the three-phase current reference signals can be used as the zero-sequence current reference signal of the fourth arm. By feeding back the inductor current of the fourth arm and zero The sequence current reference signal is used as the difference value, and the modulation signal of the fourth bridge arm in parallel is obtained through the proportional integral link.

In order to improve the DC voltage utilization rate, improve the quality of the output waveform, increase the voltage stress of the switching tube and reduce the loss, the method superimposes the third harmonic signal in the parallel three-phase four-leg inverter. Taking the first parallel inverter as an example, the current loop error signal model is established. Let d _a1 , d _b1 , and d _c1 be the output error signals of the three-phase current loop, i _aref , i _bref , and i _cref are the reference signals of each phase current loop, and i _a1 , i _b1 , and i _c1 are the first inverse Inductor current feedback signal of each phase of the transformer, G _i is the transfer function of the difference between the reference signal and the feedback signal of the current loop to the output modulation signal of the current loop. in:

d _a1 =(i _aref -i _a1 )G _i

d _b1 ＝(i _bref -i _b1 )G _i

d _c1 ＝(i _cref -i _c1 )G _i

Similarly, let d _a2 , d _b2 , d _c2 be the output error signals of the three-phase current loop current loop of the first inverter connected in parallel respectively, and i _a2 , i _b2 , and i _c2 be the inductor current feedback signals of each phase of the first inverter , the current loop error signal model of the first inverter can be obtained:

d _a2 ＝(i _aref -i _a2 )G _i

d _b2 ＝(i _bref -i _b2 )G _i

d _c2 ＝(i _cref -i _c2 )G _i

When two parallel inverter units meet the conditions of filter unbalance and switching time asymmetry, although the common voltage loop current sharing method is adopted, there will be errors in the inductor current feedback value. Taking phase A as an example, assuming that the two inverters The average value of the inductor current is i _a , and the first inverter inductor current i _a1 = _{ia +Δi a is connected in parallel, then the inverter second inductor current i a2 = ia -Δi a} , and it can be deduced to phase B, C Mutually. Although the error amount can be balanced by the error PI regulator modulation to achieve current sharing, but when the third harmonic is injected, the third harmonic is generated by the error signal. Assuming that the third harmonic generation transfer function is G _s , then the parallel The third harmonics S ₁ and S ₂ of the first and second inverter units are respectively:

S ₁ =(d _a1 +d _b1 +d _c1 )×G _s

＝[(i _aref -i _a )+(i _bref -i _b )+(i _cref -i _c )]×G _i ×G _s +(Δi _a +Δi _b +Δi _c )×G _i ×G _s

S ₂ =(d _a2 +d _b2 +d _c2 )×G _s

＝[(i _aref -i _a )+(i _bref -i _b )+(i _cref -i _c )]×G _i ×G _s -(Δi _a +Δi _b +Δi _c )×G _i ×G _s

Both inverters have a disturbance expressed as (Δi _a +Δi _b +Δi _c )×G _i ×G _s . In the third harmonic signal waveform of the two parallel inverter units in Figure 2, it is shown that the uncontrolled disturbance component will cause the imbalance of the third harmonic signal between the inverters, and the amplitude of the disturbance signal of the parallel inverters is similar. Phase opposite. If the unbalanced third harmonic signal is superimposed on the three-phase current loop output error signal of each inverter and the fourth bridge arm, the disturbance signal will cause the problem of zero-sequence circulating current between the parallel bridge arms and increase the in-phase inductor current of the two inverters. peak circulation. At the same time, the zero-sequence circulating current component will not decrease due to load reduction.

As shown in Figure 2, Figure 3, and Figure 4, when the load decreases, the proportion of the zero-sequence circulating current component in the inductor current increases greatly, which will cause more obvious distortion of the inductor current.

According to the derivation results, the zero-sequence component is caused by the uncontrolled zero-sequence component in the superimposed third harmonic, and the zero-sequence components of the two inverters have equal amplitudes and opposite directions.

If the disturbance components in the third harmonic components of the two inverters are eliminated, the zero-sequence circulating current problem can be solved. The most direct method is to take the average value of the third harmonic signals generated by the two inverter units to offset the zero-sequence current modulation component. But this method needs to increase the signal communication between parallel units. Moreover, when multiple inverters are connected in parallel, if one or several inverters fail, it will be difficult to predict the number of failed units to calculate the average value of the third harmonic, thereby affecting the redundant operation of the system. The control method proposed by the present invention can suppress the zero-sequence circulation problem of the parallel bridge arm based on the control signal inside the inverter unit, without relying on the communication between the inverters.

According to the existing research, increasing the gain of the current loop based on the voltage-current double-loop current sharing control method can equivalently increase the closed-loop output impedance of the system, and the circulating current can be effectively suppressed by this method. However, blindly increasing the current loop amplification factor will also increase the gain of the intermediate frequency and high frequency of the control loop, which will not only introduce unnecessary harmonics into the modulation signal to affect the modulation, but also destroy the stability of the original system. Therefore, it is hoped to adopt a control method that can only increase the current loop gain of the fixed-frequency circulating current component, so as to equivalently add a virtual output impedance in series in the original parallel circuit output impedance equivalent circuit to suppress the circulating current of this frequency component.

The frequency component of the zero-sequence circulating current introduced by the third harmonic injection is determined by the symmetry of the main circuit and the control signal, and is not a signal with a fixed frequency component. Therefore, a method for decomposing the disturbance signal is needed. According to the definition of the zero-sequence component of the three-phase circuit, the zero-sequence current reference is the sum of the three-phase current references, and the three-phase zero-sequence current feedback value is the sum of the three-phase inductor current feedback values. The signal obtained by subtracting the three-phase zero-sequence current reference signal and the zero-sequence current feedback signal in a parallel unit contains the main harmonic components of the low-frequency zero-sequence circulating current, as well as the high-frequency switching frequency and its harmonic components. The extraction method is shown in units 8 and 9 of FIG. 1 .

The zero-sequence circulating current signal is passed through the feedforward amplifier to increase the gain of the zero-sequence circulating current harmonic component to obtain a zero-sequence circulating current feedforward signal, and the feedforward signal is added to the current loop output signal of each phase of the inverter to obtain a new set of control signals. This method is equivalent to connecting the virtual output impedance of the zero-sequence circulating current harmonic component introduced by the feed-forward loop in series with the original system output impedance, and the output impedance is only proportional to the size of the zero-sequence circulating current harmonic component, so as to achieve the effect of suppressing the imbalance. The purpose of the zero-sequence circulating current caused by the disturbance component brought by the third harmonic injection.

According to the waveforms in Fig. 5, Fig. 6, Fig. 7, Fig. 8, and Fig. 9, the zero-sequence circulating current feed-forward suppression method proposed by this method eliminates the inverter generated by the communication without relying on the communication between the inverters. The uncontrollable zero-sequence modulation component in the third harmonic component can effectively suppress the three-phase zero-sequence circulating current component between inverters, and does not affect the three-phase decoupling of parallel inverter units and the normal operation under unbalanced load .

The above is only a preferred embodiment of the present invention, it should be pointed out that, for those of ordinary skill in the art, without departing from the principle of the present invention, some improvements and modifications can also be made, and these improvements and modifications can also be made. It should be regarded as the protection scope of the present invention.

Claims (1)

1. a three-phase four-leg inverter circulation inhibition method in parallel based on the feedforward of zero sequence circulation, it is characterised in that:

By distributed circulation inhibition method based on voltage x current dicyclo Average Current Control, it is achieved multiple three-phase four-arms The three-phase brachium pontis output inductor electric current current-sharing in parallel of inverter parallel topology, suppresses alternate circulation；Simultaneously by inverter The three-phase output filtered circuit reference signal that the outer voltage shared produces is added as zero-sequence current reference signal, by each inverse Become device four bridge legs inductive current compare with described zero-sequence current benchmark afterwards through proportional integral link generate four bridge legs tune Signal processed, controls each inverter four bridge legs and realizes four bridge legs inductive current current-sharing；

Also comprise the steps:

Step 1), the three-phase output inductor current reference signal shared outer voltage produced is added as zero sequence electricity Stream reference signal, is added internal for shunt chopper three-phase output inductor current feedback values as this inverter Zero-sequence current feedback signal, then by the difference passing ratio of described zero-sequence current feedback signal Yu zero-sequence current reference signal After link is amplified, as the zero sequence loop current suppression feed-forward control signals of this inverter；

Step 2), the described zero sequence loop current suppression of this inverter that each inverter three-phase current ring output error signal is added to Electric current loop three-phase modulations signal is obtained in feed-forward control signals, and each inverter current ring three-phase modulations signal syntheses is corresponding Harmonic signal；

Step 3), described each harmonic signal is added in the three-phase modulations signal of corresponding inverter, thus generates each The parallel three phase brachium pontis modulated signal of inverter；Be added to each harmonic signal corresponding each inverter four bridge legs simultaneously In modulated signal, finally realize complete machine third-harmonic zero-sequence voltage.