CN100458662C - Device and method capable of dynamically adjusting execution efficiency of load device - Google Patents

Abstract

The invention relates to a device and a method capable of dynamically adjusting the execution efficiency of a central processing unit, a display wafer and other load devices. The method of the invention divides the execution performance of the load device into a plurality of performance levels, each performance level corresponds to a group of critical values and anti-hysteresis values, the load state of the load device is measured by the device of the invention, and the critical values and the anti-hysteresis values are used as the basis for determining whether to change the performance levels when the load state changes, so that the performance levels can be effectively and reasonably switched.

Description

Device and method capable of dynamically adjusting execution performance of load device

technical field

The present invention relates to a device and method capable of dynamically adjusting the execution performance of a load device, in particular to a device and method for adjusting the execution performance of a load device according to multiple sets of critical values and anti-hysteresis values.

Background technique

As shown in FIG. 1 , in a general electronic system, a power supply 10 is used to input AC power at a high voltage level (for example: 110 volts) and output DC power at a low voltage level (for example: 12 volts) to Supply power required by load devices such as CPU 30 , display chip, north-south bridge chip, memory or other electronic components. Since the voltage level (for example: 1.3 volts) required by the central processing unit 30 to consume power is lower than the voltage level provided by the power supply 10, the energy storage capacity of the energy storage inductor 24 and the energy storage capacitor 26, and Controlling the duty cycle (Duty Cycle) of the high gate control signal Ugate and the low gate control signal Lgate in conjunction with the change of the duty cycle (Duty Cycle) of the PWM (pulse width modulation) signal (output by the PWM controller 12) change, to control the open/closed state of the transistor switch 20 and the transistor switch 22, so that the power supply 10 can provide sufficient power (including operating voltage and current draw) to the central processing unit 30, and the transistor switch 20 draws The power is also provided by the power supply 10 . Among them, the PWM controller 12 can directly adjust the duty cycle of the PWM signal according to the instruction issued by the central processing unit 30, or adjust the duty cycle of the PWM signal according to the instruction of the voltage regulator 32, wherein the operation of the voltage regulator 32 is Subsequent actions are performed with reference to the signal provided by the central processing unit 30 . The buffer device 28 increases the voltage level of the PWM signal to form a high gate control signal Ugate and a low gate control signal Lgate, and finally, the transistor switch 20 is controlled by the high gate control signal Ugate and the low gate control signal Lgate And the enable/disable maintenance time of the transistor switch 22, so as to provide the power required by the central processing unit 30 regardless of the heavy load state or the light load state. Among them, the buffer device 28 is preferably a forwarder, more preferably a reverser, a buffer, or known electronic components that can provide similar functions.

Assuming that the central processing unit 30 is currently in a normal state, the load state is normal; when it executes a large amount of calculation processing applications, such as: image processing, the load on the central processing unit 30 will increase, thereby increasing its power consumption. If the user wants to further shorten the length of time required to perform a large number of calculations, the user can increase the operating frequency of the central processing unit 30 by adjusting the frequency of the clock signal output by the clock generator (not shown), so as to strengthen the central processing unit. 30% performance. Similarly, in order to further enhance the execution performance of the central processing unit 30, the user can also increase the operating voltage of the central processing unit 30 by adjusting the output voltage value of the voltage regulator 32, so as to strengthen the execution performance of the central processing unit 30 and achieve shortening. The purpose of the length of time required to perform a large amount of computational processing. On the contrary, when the system is idle, the central processing unit 30 will consume excess power, and the user can reduce the operating frequency or operating voltage of the central processing unit 30 by using a method similar to the above, so as to reduce the power consumption of the central processing unit 30, For portable electronic systems, this advantage will be even more important.

However, when the operating frequency or operating voltage of the central processing unit 30 is increased, a problem will arise, that is, after the adjustment of the operating frequency or operating voltage of the central processing unit 30 is completed, there is currently no good judgment mechanism for the central processing unit to The operating frequency or operating voltage of 30 returns to the original state, or this judgment mechanism is not perfect, especially when the central processing unit 30 continues to work at a higher operating frequency or operating voltage, the central processing unit 30 will consume too much power, which for This will be a serious problem for portable electronic systems. In addition, when the central processing unit 30 continues to work at a higher operating frequency or operating voltage, a large amount of heat will be generated, causing unnecessary troubles for portable electronic system designers. Similarly, the central processing unit 30 continues to work at a lower operating frequency. Frequency or working voltage also has the problem of poor performance.

Contents of the invention

The main purpose of the present invention is to provide a method and device for dynamically adjusting the performance of the load device, which divides the performance of the load device into multiple performance levels, and makes each performance level correspond to a set of critical values As well as the anti-hysteresis value, when the load state of the load device changes, the critical value and the anti-hysteresis value can be used as a basis for performing performance adjustment.

In the present invention, a device that can dynamically adjust the execution performance of the load device is to adjust an execution performance of the load device according to a load signal, and the load signal corresponds to the load state of the load device, and the dynamically adjustable load device The performance performance device is characterized in that the device that can dynamically adjust the performance performance of the load device includes:

A detection device is used to input and quantize the load signal to obtain a load quantization value, and output a control signal according to the comparison result of the load quantization value with a threshold value and an inverse hysteresis value; and

a performance controller, which adjusts the execution performance of the load device according to the control signal;

Wherein, the critical value is not equal to the inverse hysteresis value.

Wherein the load device is a central processing unit.

Wherein the loading device is a display chip.

Wherein the load device is a north-south bridge chip.

Wherein the detection device is a current load detection circuit.

Wherein the detection device is a voltage detection circuit.

Wherein the detection device is a current detection circuit.

Wherein the load signal is a voltage value of an operating voltage.

Wherein the load signal is a PWM signal.

Wherein the load signal is a gate control signal.

Wherein the load signal is a current value of an operating current.

Wherein the load signal is provided by a PWM controller.

Wherein the performance controller is a voltage regulator.

Wherein the performance controller is a clock generator.

Wherein the control signal is a voltage control signal, and the execution performance is adjusted by adjusting an operating voltage of the load device.

Wherein the control signal is a clock control signal, and the execution performance is adjusted by adjusting an operating frequency of the load device.

A method of the present invention that can dynamically adjust the execution performance of a load device is to adjust an execution performance of the load device according to a load signal, and the load signal corresponds to the load state of the load device, and it is characterized in that it includes:

(A) dividing the execution performance of the load device into a plurality of performance classes, and setting a working parameter, a critical value and an anti-hysteresis value corresponding to each said performance class;

(B) quantizing the load signal to obtain a load quantization value; and

(C) comparing the quantized value of the load with the critical value or the anti-hysteresis value, and deciding whether to adjust the working parameter of the load device according to the result of the comparison;

Wherein, the critical value is not equal to the inverse hysteresis value.

Wherein the load device is a central processing unit.

Wherein the loading device is a display chip.

Wherein the load device is a north-south bridge chip.

Wherein the working parameter is a working voltage.

Wherein the working parameter is a working frequency.

Wherein the working parameter is a working voltage and a working frequency.

Wherein the load signal is a PWM signal.

Wherein the load signal is a gate control signal.

Wherein the load signal is a voltage value of an operating voltage.

Wherein the load signal is a current value of an operating current.

Description of drawings

In order to allow the examiner to better understand the device of the present invention that can dynamically adjust the execution performance of the load device, the central processing unit 30 is used as an example of the load device, and three preferred specific embodiments are given and described as follows, wherein:

FIG. 1 is a schematic diagram of a power supply circuit and a central processing unit.

FIG. 2 is a circuit block diagram of a first embodiment of a device capable of dynamically adjusting the execution performance of a load device according to the present invention.

FIG. 3 is another circuit block diagram of the first embodiment of the device capable of dynamically adjusting the execution performance of the load device according to the present invention.

FIG. 4 is another circuit block diagram of the first embodiment of the device capable of dynamically adjusting the execution performance of the load device according to the present invention.

FIG. 5 is a circuit block diagram of a second embodiment of a device capable of dynamically adjusting the execution performance of a load device according to the present invention.

FIG. 6 is a circuit block diagram of a third embodiment of a device capable of dynamically adjusting the execution performance of a load device according to the present invention.

FIG. 7 is a flowchart of a method for dynamically adjusting the execution performance of a load device according to the present invention.

FIG. 8 is a schematic diagram of load quantization value, critical value and inverse hysteresis value.

Detailed ways

First embodiment:

As shown in FIG. 2 , in this embodiment, the device for dynamically adjusting the execution performance of the central processing unit 30 according to the present invention can adjust its operating voltage according to the load change of the central processing unit 30, which includes: a current load detection circuit 40 and a voltage regulator 32 . Among them, the current load detection circuit 40 and the voltage regulator 32 are all known components. The current load detection circuit 40 is such as the Chinese patent application No. 200510006259.8, the invention name is "current load detection device and power supply for assembling this device. As shown in the "system", you can input the PWM signal and compare the high-level hold time/low-level hold time (also known as the duty cycle) of the PWM signal with the critical value or anti-hysteresis value, and based on the comparison result And output the voltage control signal to the voltage regulator 32 . The voltage regulator 32 adjusts the operating voltage of the CPU 30 according to the voltage control signal.

In addition, in addition to adjusting the operating voltage of the CPU 30 , a similar effect can also be achieved by adjusting the operating frequency of the CPU 30 . As shown in FIG. 3 , the voltage regulator 32 can be replaced by a clock generator 36 , wherein the clock generator 36 is also a known element. In this way, the current load detection circuit 40 can input the PWM signal and compare the high-level holding time/low-level holding time (also called the duty cycle) of the PWM signal with the threshold value or the anti-hysteresis value, and According to the comparison result, the clock control signal is output instead of the voltage control signal to the clock generator 36, and the clock generator 36 can adjust the operating frequency (or external frequency) of the central processing unit 30 according to the clock control signal. ) to adjust the execution performance of the central processing unit 30.

It is conceivable that the user can also adjust the operating voltage and operating frequency of the central processing unit 30 at the same time to achieve the purpose of adjusting the execution performance of the central processing unit 30. As shown in FIG. 4, the user only needs to make the current load detection The circuit 40 can output the voltage control signal and the clock control signal to the voltage regulator 32 and the clock generator 36 respectively according to the result of the above comparison, and there is no technical trouble in practice. In addition, the current load detection circuit 40 can also input a signal similar to the PWM signal, for example: the high gate control signal Ugate or the low gate control signal Lgate, and perform similar processing. Since the working principle is similar, no more description will be given. .

Second embodiment:

As shown in FIG. 5, in this embodiment, the device for dynamically adjusting the execution performance of the central processing unit 30 according to the present invention can adjust its operating voltage according to the load change of the central processing unit 30, which includes: a voltage detection circuit 42 and voltage regulator 32 . Wherein, the voltage detection circuit 42 and the voltage regulator 32 are all known components. The voltage detection circuit 42 can measure the voltage value of the working voltage of the central processing unit 30, and compare the voltage value of the working voltage with the threshold value or the opposite. The hysteresis value, and then output a voltage control signal to the voltage regulator 32 according to the comparison result, and the voltage regulator 32 can adjust the operating voltage of the central processing unit 30 according to the voltage control signal. As described in the first embodiment, the user can also replace the voltage regulator 32 with the clock generator 36, or have the clock generator 36 and the voltage regulator 32 at the same time. Since the working principle is similar and there is no difficulty in implementation, therefore Not much to explain.

Third embodiment:

As shown in FIG. 6 , in this embodiment, the device for dynamically adjusting the execution performance of the load device according to the present invention is based on the amount of current drawn by the central processing unit 30 and the method for dynamically adjusting the execution performance of the load device according to the present invention. The predetermined critical value and anti-hysteresis value are used as the basis for adjusting the operating voltage of the load device, which includes: a current detection circuit 44 and a voltage regulator 32 . Wherein, the current detection circuit 44 and the voltage regulator 32 are known components, the current detection circuit 44 can measure the current value of the current drawn by the central processing unit 30, and compare the current value with the threshold value or the anti-hysteresis value , and then output a voltage control signal to the voltage regulator 32 according to the comparison result. The voltage regulator 32 adjusts the operating voltage of the CPU 30 according to the voltage control signal. As described in the first embodiment, the user can also replace the voltage regulator 32 with the clock generator 36, or have the clock generator 36 and the voltage regulator 32 at the same time. Since the working principle is similar and there is no difficulty in implementation, therefore Not much to explain.

In the above, the relationship between the critical value, the anti-hysteresis value and the operating frequency (or operating voltage) is as described in the method for dynamically adjusting the execution performance of the load device of the present invention. As shown in FIG. 7 , the method for dynamically adjusting the execution performance of the central processing unit 30 of the present invention includes the following steps:

Step S50: initialization.

Step S52: Divide the execution performance of the central processing unit 30 into multiple performance levels, and set the corresponding operating frequency, threshold value and anti-hysteresis value of each performance level. As shown in FIG. 8 , it is preferable to divide the execution performance of the central processing unit 30 into five performance classes, which are super high performance class I, high performance class II, normal performance class III (default value), and low performance class IV. , and ultra-low-efficiency V-order, and the threshold values are preferably 45, 35, 25, and 20 respectively, and the anti-hysteresis values are preferably 47, 37, 23, and 18, respectively, and their operating frequencies are respectively increased by 10 from the preset frequency %, the preset frequency increased by 6%, the preset frequency, the preset frequency decreased by 6%, and the preset frequency decreased by 10%, the operating voltages are 1.4, 1.35, 1.3, 1.25, and 1.2 volts, respectively. It can be seen from the above that if the operating frequency and operating voltage are increased, the anti-hysteresis value will be greater than the critical value; on the contrary, if the operating frequency and operating voltage are reduced, the anti-hysteresis value will be smaller than the critical value. This is because the change of the operating frequency and operating voltage of the central processing unit 30 will cause the execution performance of the central processing unit 30 to change, and the load generated by the change of the execution performance is not related to the calculation and processing of the central processing unit 30 (for example: executing large-scale applications) The load generated by the program) is irrelevant. In order to make the switching of the execution performance of the central processing unit 30 based on the same comparison basis, it is necessary to carry out the relevant comparison with the anti-hysteresis value to make the execution performance of the central processing unit 30 The switch is more in line with the actual situation. It is conceivable that the user can increase or decrease the number of performance levels of execution performance according to their needs, or change the threshold value and anti-hysteresis value, or change the operating frequency and working frequency corresponding to each performance level. voltage, not limited to the above.

Step S54: Quantize the load signal to obtain a load quantization value. Wherein, the load signal can be a PWM signal, a high gate control signal Ugate, a low gate control signal Lgate, the voltage value of the operating voltage, or the current value of the operating current, and the quantization process can be performed by the current load detection circuit 40, the voltage detection circuit 40 The detection circuit 42, or the current detection circuit 44 is preferably executed by the current load detection circuit 40.

Step S56: Compare the quantized load value with the critical value or the anti-hysteresis value, and decide whether to adjust the operating voltage and operating frequency of the central processing unit 30 according to the comparison result. Assuming that the execution performance of the central processing unit 30 is set to the normal performance level III, when the load quantization value increases, it means that the central processing unit 30 has a demand for strengthening the execution performance, so compare the load quantization value and the critical value to determine whether to use Normal performance level III is switched to super high performance level I or high performance level II, and it is determined whether to increase the operating voltage and operating frequency of the central processing unit 30; when the load quantization value decreases, it means that the central processing unit 30 has reduced execution performance Therefore, compare the load quantization value and the anti-hysteresis value to determine whether to switch from ultra-high-efficiency stage I or high-efficiency stage II to normal performance stage III, and to decide whether to lower the operating voltage and operating frequency of the central processing unit 30 . Assume that when the load quantization value continues to decrease, it means that the central processing unit 30 has a need to reduce the execution performance, so compare the load quantization value and the critical value to determine whether to switch from the normal performance III level to the low efficiency level IV or ultra-low performance V Step, and decide whether to lower the operating voltage and operating frequency of the central processing unit 30; when the load quantization value increases, it means that the central processing unit 30 has a demand for increasing execution performance, so compare the load quantization value and the inverse hysteresis value to determine Decide whether to provide from low performance 1V level or ultra-low performance V level to normal performance level III, and decide whether to increase the operating voltage and operating frequency of the central processing unit 30 .

Assume that the execution performance of the central processing unit 30 is set to the normal performance level III, and the load quantization value is 30. When the central processing unit 30 increases the load quantization value due to the execution of large-scale application programs, it means that the central processing unit 30 has a demand for enhanced execution performance. When the load quantization value increases beyond 35 (as shown in point A), in order to strengthen the central For the execution performance of the processor 30, the operating frequency of the central processing unit 30 is increased by 6%, and the operating voltage is adjusted to 1.35 volts, so that the central processing unit 30 is promoted from the normal performance III stage to the high performance II stage; assuming that the load quantization value continues to increase When the power exceeds 45 (i.e. shown in point B), then the operating frequency of the central processing unit 30 is promoted by 10%, and the operating voltage is adjusted to 1.4 volts, so that the central processing unit 30 is promoted from the high-efficiency II order to the ultra-high-efficiency I order . When the large-scale application program has been executed and the load quantization value is reduced, it means that the central processing unit 30 needs to reduce the execution performance. 30 execution performance, then the operating frequency of the central processing unit 30 is promoted by 6%, and the operating voltage is adjusted to 1.35 volts, so that the central processing unit 30 is switched from the ultra-high-efficiency I stage to the high-efficiency II stage; assuming that the accumulated value continues to decrease to a low level At 37 o'clock (i.e. shown in point D), the operating frequency of the central processing unit 30 is returned to the preset frequency, and the operating voltage is adjusted to 1.3 volts, so that the central processing unit 30 switches from high-efficiency II stage to normal performance Tier III rules.

Assume that when the load quantization value continues to decrease, it means that the central processing unit 30 needs to reduce the execution performance. Then the operating frequency of the central processing unit 30 is reduced by 6%, and the operating voltage is adjusted to 1.25 volts, so that the central processing unit 30 is switched from the normal performance III order to the low performance IV order; assuming that the accumulated value continues to decrease to less than 20 (ie Shown at point F), then the operating frequency of the central processing unit 30 is reduced by 10%, and the operating voltage is adjusted to 1.2 volts, so that the central processing unit 30 is switched from the low-efficiency IV order to the ultra-low-efficiency V order. When the central processing unit 30 starts to execute the application program, the load quantization value will start to increase, which means that the central processing unit 30 has a demand for enhanced execution performance. The operating frequency of the central processing unit 30 is reduced by 6%, and the operating voltage is adjusted to 1.25 volts, so that the central processing unit 30 is promoted from the ultra-low efficiency V stage to the low efficiency IV stage; assuming that the load quantization value increases to exceed 23 (i.e. point H As shown), the preset frequency of the central processing unit 30 is restored, and the operating voltage is adjusted to 1.35 volts, so that the central processing unit 30 is upgraded from low-efficiency stage IV to normal performance stage III.

Step S58: end.

In this embodiment, although step S54 is to simultaneously adjust the operating voltage and operating frequency, it is not limited to simultaneously adjusting the operating voltage and operating frequency. Users can also adjust only the operating voltage or only the operating frequency to achieve the present invention Similar functions, and the above-mentioned limitations have no practical and technical problems, so no further explanation is given.

When adjusting the operating frequency of the central processing unit 30, the clock generator 36 can be directly output the adjusted clock signal (gradually changing the frequency of the clock signal) to the central processing unit 30 without causing the central processing unit 30 to operate. The perplexity on, and reach the effect claimed by the present invention. And in order to adjust the operating voltage of the central processing unit 30, the user can enable the pause (halt) pin (pin) of the central processing unit 30, and after the adjustment of the operating voltage is completed, the user can disable the pause pin of the central processing unit 30. , in this way, the purpose of adjusting the operating voltage of the central processing unit 30 can be achieved.

The above-mentioned embodiments are only examples for convenience of description, and the scope of rights claimed by the present invention should be based on the scope of the patent application, rather than limited to the above-mentioned embodiments.

Claims (27)

1. A device that can dynamically adjust the execution performance of a load device is to adjust an execution performance of the load device according to a load signal, and the load signal corresponds to the load state of the load device, and the dynamically adjustable load device The performance performance device is characterized in that the device that can dynamically adjust the performance performance of the load device includes: A detection device is used to input and quantize the load signal to obtain a load quantization value, and output a control signal according to the comparison result of the load quantization value with a threshold value and an inverse hysteresis value; and a performance controller, which adjusts the execution performance of the load device according to the control signal; Wherein, the critical value is not equal to the inverse hysteresis value. 2. The device capable of dynamically adjusting the execution performance of a load device as claimed in claim 1, wherein the load device is a central processing unit. 3. The device capable of dynamically adjusting the execution performance of the loading device as claimed in claim 1, wherein the loading device is a display chip. 4. The device capable of dynamically adjusting the execution performance of the load device as claimed in claim 1, wherein the load device is a north-south bridge chip. 5. The device capable of dynamically adjusting the execution performance of the load device as claimed in claim 1, wherein the detection device is a current load detection circuit. 6. The device capable of dynamically adjusting the execution performance of the load device as claimed in claim 1, wherein the detection device is a voltage detection circuit. 7. The device capable of dynamically adjusting the execution performance of the load device as claimed in claim 1, wherein the detection device is a current detection circuit. 8. The device capable of dynamically adjusting the execution performance of the load device as claimed in claim 1, wherein the load signal is a voltage value of an operating voltage. 9. The device capable of dynamically adjusting the execution performance of a load device as claimed in claim 1, wherein the load signal is a PWM signal. 10. The device capable of dynamically adjusting the execution performance of a load device as claimed in claim 1, wherein the load signal is a gate control signal. 11. The device capable of dynamically adjusting the execution performance of a load device as claimed in claim 1, wherein the load signal is a current value of an operating current. 12. The device capable of dynamically adjusting the execution performance of the load device as claimed in claim 1, wherein the load signal is provided by a PWM controller. 13. The device capable of dynamically adjusting the execution performance of a load device as claimed in claim 1, wherein the performance controller is a voltage regulator. 14. The device capable of dynamically adjusting the execution performance of a load device as claimed in claim 1, wherein the performance controller is a clock generator. 15. The device capable of dynamically adjusting the execution performance of the load device as claimed in claim 1, wherein the control signal is a voltage control signal, and the execution performance is adjusted by adjusting an operating voltage of the load device. 16. The device capable of dynamically adjusting the execution performance of the load device as claimed in claim 1, wherein the control signal is a clock control signal, and the execution performance is adjusted by adjusting an operating frequency of the load device. 17. A method for dynamically adjusting the execution performance of a load device, which is to adjust an execution performance of the load device according to a load signal, and the load signal corresponds to the load state of the load device, characterized in that it comprises: (A) dividing the execution performance of the load device into a plurality of performance classes, and setting a working parameter, a critical value and an anti-hysteresis value corresponding to each said performance class; (B) quantizing the load signal to obtain a load quantization value; and (C) comparing the quantized value of the load with the critical value or the anti-hysteresis value, and deciding whether to adjust the working parameter of the load device according to the result of the comparison; Wherein, the critical value is not equal to the inverse hysteresis value. 18. The method for dynamically adjusting the execution performance of a load device as claimed in claim 17, wherein the load device is a central processing unit. 19. The method for dynamically adjusting the execution performance of a load device as claimed in claim 17, wherein the load device is a display chip. 20. The method for dynamically adjusting the execution performance of a load device as claimed in claim 17, wherein the load device is a north-south bridge chip. 21. The method for dynamically adjusting the execution performance of a load device as claimed in claim 17, wherein the operating parameter is an operating voltage. 22. The method for dynamically adjusting the execution performance of a load device as claimed in claim 17, wherein the operating parameter is an operating frequency. 23. The method for dynamically adjusting the execution performance of a load device as claimed in claim 17, wherein the operating parameters are an operating voltage and an operating frequency. 24. The method for dynamically adjusting the execution performance of a load device as claimed in claim 17, wherein the load signal is a PWM signal. 25. The method for dynamically adjusting the execution performance of a load device as claimed in claim 17, wherein the load signal is a gate control signal. 26. The method for dynamically adjusting the execution performance of a load device as claimed in claim 17, wherein the load signal is a voltage value of an operating voltage. 27. The method for dynamically adjusting the execution performance of a load device as claimed in claim 17, wherein the load signal is a current value of an operating current.

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