CN100367327C - Afterimage removal circuit - Google Patents

Abstract

An afterimage elimination circuit includes a diode, a charge storage device and an isolation element. The charge storage device stores charges when the voltage converter supplies power, and discharges the stored charges when the voltage converter suddenly stops supplying power. The isolation element is a P-type transistor, so that when the voltage converter is suddenly interrupted to supply power, the isolation element is turned on, charges can reach the grid driving line of the grid driving circuit through the isolation element, the potential on the grid driving line is increased, the switch element is turned on, and at the moment, the image charge storage device can release the stored image charges to the data driving line.

Description

Afterimage removal circuit

technical field

The present invention relates to an image elimination circuit, and in particular to a circuit for eliminating residual image of a display when the display is abnormally powered off.

Background technique

After the liquid crystal material was discovered in Europe, its practicality was researched and developed in the United States. Japan deeply explored its physical properties and application technologies in various fields, and continuously developed a new generation of liquid crystal flat-panel displays. At present, various liquid crystal technologies have been widely used in displays, especially liquid crystal flat panel displays (LCD), and various manufacturers have expanded from TN-LCD (Twisted Nematic-Liquid Crystal Display, Twisted Nematic-Liquid Crystal Display) to STN-LCD (Super TwistedNematic-Liquid Crystal Display, super-twisted nematic liquid crystal display), and expanded to amorphous silicon TFT-LCD (Thin Film Transistor LCD, thin film transistor liquid crystal display), and the scale has become more and more big trend. In addition, liquid crystal display manufacturers have begun to develop low temperature polysilicon flat panel display (LPTS-LCD, Low Temperature Poly-Si Liquid Crystal Display) production technology.

Please refer to FIG. 5, which shows a conventional display. The display 500 includes a gate driving circuit 510 , a data driving circuit 520 , a gate driving line 512 , a data driving line 522 , a transistor 532 , a capacitor 534 and a pixel unit 536 . Wherein, the gate driving line 512 and the data driving line 522 form a liquid crystal display unit 550 . When there is data to be written in the liquid crystal display unit 550 (that is, data is to be displayed on the display 500), the gate drive circuit 510 is about to change the gate drive line 512 from a low potential to a high potential, so that the transistor 532 is in a conducting state, and then The data driving circuit 520 writes data (with a potential) into the capacitor 534 through the data driving line 522 . After the data is written, the gate driving circuit 510 switches the potential of the gate driving line 512 from a high potential to a low potential, so that the pixel unit 536 can continue to display the data before the next data is written. However, when the liquid crystal display unit 550 is abnormally powered off, the potential represented by the data is still stored in the capacitor 534 , thus causing the problem of residual image.

In the conventional technology, the method to solve the residual image is to shift the current-voltage curve of the transistor 532 (as shown in FIG. 6 ) to the left, so as to design the threshold voltage of the transistor 532 to be very close to 0 volts, so that the gate of the transistor 532 When the pole voltage is low to close to 0 volts, the transistor 532 can be turned on, so that the potential stored in the capacitor 534 representing data can be released into the data driving line 522 .

However, currently, in order to have better clarity and design components in the substrate of the display 500 , the current-voltage curve of the transistor 522 cannot be adjusted arbitrarily to avoid affecting the characteristics of the circuit in the display 500 at the same time. However, in such a case, when the liquid crystal display unit 550 encounters an abnormal power failure, there will be a residual image.

Contents of the invention

In view of this, the present invention provides a residual image elimination circuit. When the flat display unit is abnormally powered off, the charge stored in the charge storage device is used to increase the potential of the gate drive line and turn on the switching element in the image control unit. , so that the image charge storage device can release the stored image charge to eliminate the residual image.

The invention provides a residual image elimination circuit, which is used when the flat display unit is abnormally powered off. Wherein, the plane display unit includes a gate driving circuit and a plurality of gate driving lines driven by the gate driving circuit, a data driving circuit and a plurality of data driving lines driven by the data driving circuit, and a plurality of image control unit. The residual image elimination circuit includes a diode, a charge storage device and an isolation element.

According to a preferred embodiment of the present invention, the above-mentioned charge storage device has a first terminal and a second terminal, the first terminal of which is electrically connected to the first potential terminal of the voltage converter, and the second terminal is electrically connected to the ground potential. The charge storage device is responsible for storing charges when the plane display unit is powered normally, and releases the stored charges when the plane display unit is abnormally powered off.

According to a preferred embodiment of the present invention, the above-mentioned isolating element has a first end, a second end and a third end, and the first end of the isolating element is electrically connected to the first end of the charge storage device, and the second end of the isolating element terminal is electrically connected to the first potential end of the voltage converter, and the third end of the isolation element is electrically connected to the second potential end of the gate drive circuit, wherein the first end of the isolation element is electrically connected to a resistor before. The isolation element is turned on when the plane display unit is abnormally powered off, and when the isolation element is turned on, the charge released by the charge storage device can increase the potential of the gate drive line.

According to a preferred embodiment of the present invention, the above-mentioned diode has a first end and a second end, the first end of the diode is electrically connected to the first potential end of the voltage converter, and the second end of the diode is electrically connected to the charge storage The first end of the element, so that the current flowing through the diode is from the first end of the diode to the second end of the diode.

According to a preferred embodiment of the present invention, the aforementioned image control unit includes a pixel unit, a switch element, and an image charge storage device. Wherein, the image charge storage device has a first end and a second end, and the second end of the image charge storage device is electrically connected to the ground potential, responsible for storing image charges. The switch element has a first end, a second end and a third end, the first end of the switch element is electrically connected to the gate drive line, the second end of the switch element is electrically connected to the data drive line, and the third end of the switch element is electrically connected to the gate drive line. Connected to the first terminal of the image charge storage device, the switching element is turned on when the charge storage device releases the stored charges. The pixel unit displays data according to the potential represented by the image charge.

According to a preferred embodiment of the present invention, when the charge storage device releases charges to increase the potential on the gate driving line, the switching element is turned on, so that the image charge storage device releases image charges to the data drive line.

According to other preferred embodiments of the present invention, the residual image elimination circuit is characterized in that it is connected to the voltage converter and the gate drive circuit, and it includes a high resistance resistor, a first terminal and a second terminal, and the first terminal is electrically Connected to the first potential terminal of the voltage converter, the second terminal is electrically connected to the second potential terminal of the gate drive circuit, and the high resistance resistor is electrically connected between the first terminal and the second terminal, wherein the high resistance The resistance value of the resistor is sufficient to isolate the voltage provided by the voltage converter from entering the gate of the switching element when the voltage converter supplies power normally. Wherein, the residual image elimination circuit further includes a diode having a first end and a second end, the first end of the diode is electrically connected to the first potential end of the voltage converter, and the second end of the diode is electrically connected to the high-resistance the first end of the resistor.

Because the present invention adopts the residual image elimination circuit, when the plane display unit is abnormally powered off, it will turn on the isolation element and release the charge stored in the charge storage device to increase the potential of the gate drive line to turn on the image control The switching element of the unit, and the image charge storage device of the image control unit releases the image charge stored in the image charge storage device, so as to eliminate the residual image on the display.

In order to make the above objects, features and advantages of the present invention more comprehensible, a preferred embodiment will be given below and described in detail with accompanying drawings.

Description of drawings

FIG. 1A is a schematic diagram of a residual image elimination circuit according to a preferred embodiment of the present invention.

FIG. 1B is a schematic diagram of another residual image elimination circuit according to a preferred embodiment of the present invention.

FIG. 2 is a voltage-time graph on a gate driving line according to a preferred embodiment of the present invention.

FIG. 3A is a schematic diagram of another residual image elimination circuit according to a preferred embodiment of the present invention.

FIG. 3B is a schematic diagram of another residual image elimination circuit according to a preferred embodiment of the present invention.

FIG. 3C is a voltage-time graph on another gate driving line according to a preferred embodiment of the present invention.

FIG. 4 is a schematic diagram of another residual image elimination circuit according to a preferred embodiment of the present invention.

Fig. 5 is a conventional display.

FIG. 6 is a threshold voltage-current curve diagram of a conventional thin film transistor.

Description of drawings

100, 300, 400: afterimage removal circuit

102: Isolation element

104, 304: diode

106, 342: Charge storage devices

110, 510: gate drive circuit

112, 512: Gate drive lines

120, 520: data drive circuit

122, 522: data drive lines

130: Image Control Components

132: switch element

134: Image charge storage device

136, 536: pixel unit

140, 540: voltage converter

150: flat display unit

152, 156, 160, 166, 172, 380, 384: first end

154, 158, 162, 168, 174, 382, 386: second end

164, 170: third end

192, 194: resistance

196, 534: capacitance

302, 402: high resistance resistors

342: Parasitic capacitance

500: display

532: Transistor

550: LCD display unit

Detailed ways

Please refer to FIG. 1a, which shows a schematic diagram of a residual image elimination circuit according to a preferred embodiment of the present invention. In FIG. 1A , its connection is that the residual image elimination circuit 100 is electrically connected to the first potential terminal (V _DD ) of the voltage converter 140, and the two terminals of the gate driving circuit 110 are respectively electrically connected to the first potential terminal (V DD ) of the voltage converter 140. A potential terminal (V _DD ) and a second potential terminal (V _EE ). In addition, the plane display unit 150 is composed of a plurality of gate driving lines 112 and a plurality of data driving lines 122 .

In addition, for the convenience of explanation of the following embodiments, the image control unit 130 will be described first. FIG. 1A shows only one image control unit 130 , but in fact, there can be any number of image control units 130 . In this embodiment, the image control unit 130 includes a switching element 132, an image charge storage device 134, and a pixel unit 136. The first end 166 of the switching element 132 is electrically connected to the gate driving line 112, and the second end of the switching element 132 168 is electrically connected to the data driving line 122, the third end 170 of the switching element 132 is electrically connected to the first end 172 of the image charge storage device 134, the second end 174 of the image charge storage device 134 is grounded, and the pixel unit 136 One end is electrically connected to the first end 172 of the image charge storage device 134 , and the other end is electrically connected to the ground potential.

In this embodiment, when the power supply of the flat panel display unit 150 is normal, the voltage converter 140 will provide the gate driving circuit 110 with a high potential (V _DD ) and a low potential (V _EE ). The high potential can be, for example, 12 Positive voltage of volts, the low potential can be negative voltage of -2 volts, for example. When the data driving circuit 120 has data to be written into the image control unit 130, the gate driving circuit 110 turns on the switching element 132 with a high potential (12 volts) through the gate driving line 112. After the switching element 132 is turned on, The data driving circuit 120 writes data into the image control unit 130 through the data driving line 122 . After the data is written into the image control unit 130 , the gate driving circuit 110 provides a low potential (-2 volts) voltage to the switch element 132 so that the switch element 132 is turned off. The image control unit 130 stores the potential represented by the data in the image charge storage device 134 , so that the pixel unit 136 can continue to display when the next data has not been received (that is, the switch element 132 is turned on again). At this time, there will be a problem of residual image on the display.

Please continue to refer to FIG. 1a, the residual image elimination circuit 100 includes an isolation element 102 (with a first end 160, a second end 162 and a third end 164), a diode 104 (with a first end 152 and a second end 154) and a charge The memory device 106 (having a first terminal 156 and a second terminal 158 ). Wherein, the isolation element 102 may be, for example, a P-type metal oxide semiconductor field effect transistor or a P-type junction field effect transistor, and the charge storage device 106 may be, for example, a capacitor, but they are not limited thereto. Connections within the afterimage removal circuit 100 are that the first terminal 152 of the diode 104 is electrically connected to the first potential terminal (V _DD ) of the voltage converter 140 , and the second terminal 154 of the diode 104 is electrically connected to the charge storage device 106 . First terminal 156, second terminal 158 of charge storage device 106 are electrically connected to ground potential, first terminal 160 of isolation element 102 is electrically connected to first terminal 156 of charge storage device 106, second terminal 162 of isolation element 102 is electrically Connected to the first potential terminal (V _DD ) of the voltage converter 140 , the third terminal 164 of the isolation element 102 is electrically connected to the second potential terminal of the gate driving circuit 110 .

In this embodiment, when the voltage converter 140 normally supplies power to the flat panel display unit 150, that is, when the voltage converter 140 also normally supplies a positive voltage to the isolation element 102, the isolation element 102 is in an off state, so the charge storage device 106 will store charge.

Please also refer to FIG. 2 , which shows a voltage-time graph on a gate driving line according to a preferred embodiment of the present invention. When the flat panel display unit 150 is abnormally powered off, the potential at the second terminal 162 of the isolation element 102 is almost equal to 0 volts, so the isolation element 102 is turned on, and the charge storage device 106 releases the stored charges. At this time, the potential on the gate driving line 112 will be increased accordingly (as shown in FIG. 2 ). At this time, the switching element 132 is turned on, and the image charge storage device 134 can release the stored image charge to the data driving line 122 , that is, to eliminate the residual image on the display.

In a preferred embodiment of the present invention, the diode 104 is used to allow current to flow only from the first end 152 of the diode 104 to the second end 154 of the diode 104, that is to say, when the charge storage device 106 is discharged, the current will only flow through The path from the first end 160 of the isolation element 102 to the third end 164 of the isolation element 102 does not flow through the diode 104 , wherein the isolation element 102 is only turned on when the voltage converter 140 does not provide a voltage.

In a preferred embodiment of the present invention, the charge storage device 106 may be a capacitor originally in the display circuit, not necessarily an external capacitor.

In a preferred embodiment of the present invention, the afterimage removal circuit 100 is also electrically connected to a resistor 192 before the first terminal 160 of the isolation element 102 to prevent the isolation element 102 from being damaged due to too much current flowing through it. In addition, an RC circuit (such as a resistor 194 and a capacitor 196 as shown in FIG. 1A ) may also be electrically connected between the voltage converter 140 and the second potential end of the gate driving circuit 110 to ensure that the potential can be increased, for example: exceeding 0.7 volts to make the voltage converter 140 work normally and stabilize the V _EE voltage. The above is just an example of the present invention, and should not be limited thereto.

Please refer to FIG. 1B , which shows another circuit diagram of afterimage removal according to a preferred embodiment of the present invention. In FIG. 1B , the difference from FIG. 1A is that the isolation element 102 is an NMOS transistor, and the switching element 132 is a PMOS transistor. Therefore, the first potential terminal of the voltage converter 140 is electrically connected to the resistor 194, and the second potential terminal of the voltage converter 140 is electrically connected to the gate driving circuit 110 and the first terminal 152 of the diode 104, and the second terminal of the diode 104 154 is then electrically connected to a first terminal 156 of charge storage device 106 . Its working method is that when the voltage converter 140 provides power, the isolation element 102 is not turned on, and the current in the charge storage device 106 passes through the diode 104 , so the potential in the charge storage device 106 becomes the same as the second potential terminal. When the voltage converter 140 does not provide power, the potential of the charge storage device 106 is negative, for example, and the potential of the isolation element 102 is zero, so the isolation element is turned on and the switch element 132 is turned on. Therefore, the image charge storage device 134 can release the stored image charge to the data driving line 122 through the switch element 132 .

Next, please refer to FIG. 3A and FIG. 4 , which respectively show a circuit diagram of afterimage elimination according to another preferred embodiment of the present invention. The difference from FIG. 1A is the constituent elements in the residual image removal circuits 300 and 400 .

In this embodiment, the residual image elimination circuit 300 includes a high-resistance resistor 302 and a diode 304, which are connected such that the first end 380 of the high-resistance resistor 302 is electrically connected to the second end 386 of the diode 304, and the high-resistance value The second end 382 of the resistor 302 is electrically connected to the second potential end of the gate driving circuit 110 , and the first end 384 of the diode 304 is electrically connected to the first potential end (V _DD ) of the voltage converter 140 .

In this embodiment, the high-resistance resistor 302 is used to isolate the high-potential voltage (eg positive voltage) provided by the voltage converter 140 from entering the gate of the switch element 132 when the voltage converter 140 supplies power normally. When the voltage converter 140 is abnormally powered off, the stored charge is released by using the parasitic capacitance 342 between the high potential and the low potential (as shown in FIG. The stored image charges can be quickly released to the data driving lines 122 .

In this embodiment, as shown in FIG. 4 , the afterimage removal circuit 400 only includes a high-resistance resistor 402 , and the high-resistance resistor 402 works in the same way as the above-mentioned high-resistance resistor 302 .

Please refer to FIG. 3B , which shows another circuit diagram of afterimage removal according to a preferred embodiment of the present invention. In this embodiment, the difference from FIG. 3A is that the switching element 132 in FIG. 3A is an NMOS transistor, while the switching element 132 in FIG. 3B is a PMOS transistor. Therefore, the direction of the flow through the transistor 304 is from the second terminal 386 to the first terminal 384, and the first potential terminal of the voltage converter 140 is electrically connected to the resistor 194, and the second potential terminal is electrically connected to the first terminal of the diode 304 384 and gate drive circuit 110. The working method is that the resistor 302 isolates the low potential voltage (eg negative voltage) provided by the voltage converter 140 from entering the gate of the switching element 132 when the voltage converter 140 is normally powered. When the voltage converter 140 is abnormally powered off, the stored charge is released by using the parasitic capacitance 342 between the high potential and the low potential (as shown in FIG. The stored image charges can be quickly released to the data driving lines 122 .

In the preferred embodiment of the present invention, although there is usually a leakage current in the residual image elimination circuit 300 and the residual image elimination circuit 400, but because it is extremely small, it will not affect the V _EE required by the gate drive circuit. Influence.

In a preferred embodiment of the present invention, the high resistance resistors 302 and 402 may be, for example, 100k-10M ohm resistors, but are not limited thereto.

In a preferred embodiment of the present invention, the voltage converter 140 may be, for example, a DC voltage/DC voltage converter, but is not limited thereto.

In a preferred embodiment of the present invention, the switching element 132 can be, for example, a low temperature polysilicon thin film transistor (LTPS-TFT), and the image charge storage device 134 can be, for example, a capacitor, but they are not limited thereto.

In a preferred embodiment of the present invention, the voltage converter 140 is electrically connected to a DC voltage source, and converts the received DC voltage into a DC voltage value required by each circuit in the display and then outputs it.

In a preferred embodiment of the present invention, when the switch element 132 is an N-type metal oxide semiconductor field effect transistor, the isolation element 102 is a P-type metal oxide semiconductor field effect transistor, and its connection relationship is as shown in FIG. 1A; Conversely, when the switch element 132 is a PMOS field effect transistor, the isolation element 102 is an NMOS field effect transistor, and the direction of the diode 104 is also reversed.

In a preferred embodiment of the present invention, as those skilled in the art can easily understand, the plane display unit can be a liquid crystal display unit or an organic light emitting diode display unit (OLED), but neither is limited thereto.

In a preferred embodiment of the present invention, as those skilled in the art can easily understand, the first potential end may be a high potential end, and the second potential end may be a low potential end, but both are not limited thereto.

Based on the above, the residual image elimination circuit of the present invention does not need to adjust the current-voltage curve of the image control unit, and avoids affecting the characteristics of the circuit in the display at the same time, and discharges the image control unit when the flat display unit is abnormally turned on. , to remove afterimages on the monitor.

Although the present invention has been disclosed above with a preferred embodiment, it is not intended to limit the present invention. Any person skilled in the art can make changes and modifications without departing from the spirit and scope of the present invention. Therefore, the present invention The scope is defined by the appended claims.

Claims (10)

1. an afterimage is eliminated circuit, is used for when the undesired outage of a flat display unit, and wherein, this afterimage is eliminated circuit and is electrically connected to a gate driver circuit and an electric pressure converter, and this afterimage is eliminated circuit and comprised;

One charge storage device has one first end and one second end, and this of this charge storage device first end is electrically connected to one first potential end of this electric pressure converter, and this of this charge storage device second end is electrically connected to an earth potential; And

One isolated element, have one first end, one second end and one the 3rd end, this of this isolated element first end is electrically connected to first end of this charge storage device, this of this isolated element second end is electrically connected to this first potential end of this electric pressure converter, the 3rd end of this isolated element is electrically connected to one second potential end of this gate driver circuit, wherein be electrically connected a resistance, the conducting when the undesired outage of this flat display unit of this isolated element before first end of this isolated element;

Wherein, after the isolated element conducting, this charge storage device will disengage stored charge.

2. afterimage as claimed in claim 1 is eliminated circuit, also comprise a diode, this diode has one first end and one second end, this of this diode first end is electrically connected to this first potential end of this electric pressure converter, this of this diode second end is electrically connected to this first end of this charge storage device, with so that electric current is this second end that flows to this diode from this first end of this diode, wherein this charge storage device can be an electric capacity.

3. afterimage as claimed in claim 1 is eliminated circuit, and wherein an end of this gate driver circuit is electrically connected to this first potential end of this electric pressure converter, and the other end is electrically connected to this second potential end of this electric pressure converter.

4. afterimage as claimed in claim 1 is eliminated circuit, wherein this isolated element can be P-type mos field-effect transistor or P type junction field effect transistor, wherein this first potential end is a hot end, and this second potential end is a cold end.

5. afterimage as claimed in claim 1 is eliminated circuit, and wherein this electric pressure converter is DC voltage/dc voltage changer.

6. afterimage as claimed in claim 1 is eliminated circuit, and wherein this flat display unit can be selected from liquid crystal display or Organic Light Emitting Diode display unit.

7. an afterimage is eliminated circuit, it is characterized in that, connects an electric pressure converter and a gate driver circuit, comprising:

One first end is electrically connected to one first potential end of this electric pressure converter;

One second end is electrically connected to this gate driver circuit one second potential end; And

One high resistance measurement is connected electrically between this first end and this second end, and wherein the resistance of this high resistance measurement is when this electric pressure converter normal power supply, and the voltage that enough isolated this electric pressure converter provides enters the grid of on-off element.

8. afterimage as claimed in claim 7 is eliminated circuit, also comprise a diode, have one first end and one second end, this of this diode first end is electrically connected to this first potential end of this electric pressure converter, this of this diode second end is electrically connected to this first end of this high resistance measurement, uses so that electric current is this second end that flows to this diode from this first end of this diode.

9. afterimage as claimed in claim 7 is eliminated circuit, and wherein the resistance of this high resistance measurement is 100k～10M ohm.

10. afterimage as claimed in claim 7 is eliminated circuit, and wherein this first potential end is a hot end, and this second potential end is a cold end.

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