In this work, we report the effects of nitrogen on electrical and structural properties in TaSixN... more In this work, we report the effects of nitrogen on electrical and structural properties in TaSixNy /SiO2/p-Si MOS capacitors. TaSixNy films with various compositions were deposited by reactive sputtering of TaSi2 or by co-sputtering of Ta and Si targets in argon and nitrogen ambient. TaSixNy films were characterized by Rutherford backscattering spectroscopy and Auger electron spectroscopy. It was found that the workfunction of TaSixNy (Si>Ta) with varying N contents ranges from 4.2 to 4.3 eV. Cross-sectional transmission electron microscopy shows no indication of interfacial reaction or crystallization in TaSixNy on SiO2, resulting in no significant increase of leakage current in the capacitor during annealing. It is believed that nitrogen retards reaction rates and improves the chemical-thermal stability of the gate-dielectric interface and oxygen diffusion barrier properties.
ABSTRACTThis paper describes the preparation of silicon-based metal oxide semiconductor, MOS, dev... more ABSTRACTThis paper describes the preparation of silicon-based metal oxide semiconductor, MOS, devices, capacitors and field effect transistors, FETs, using deposited oxide dielectrics. A critical aspect of the device fabrication process is the way the Si-SiO2 interface is formed; e.g., either before, during, or after the oxide deposition. We have studied different methods of fabricating Si-SiO2 heterostructures, and have concluded that the implementation of independently controllable and sequential process steps for (i) interface formation, and (ii) oxide deposition consistently yields MOS devices with electrical properties that are superior to those of devices fabricated under other processing conditions which include specifically interface formation during the oxide deposition.
As the feature size of MOSFET devices shrink, issues such as thermal budget associated with contr... more As the feature size of MOSFET devices shrink, issues such as thermal budget associated with controlling channel doping profiles and oxide growth kinetics raise concerns about using thermally grown furnace oxides for deep-submicron device applications. To address these concerns, we have developed a new RTCVD oxide process using a gas system of silane and nitrous oxide. The RTCVD oxides are deposited in a lamp-heated, cold wall, RTP system. Deposition rates ranging from 55 Å/min. to 624 Å/min. can be achieved at 800°C with silane nitrous oxide flow rate ratio of 2% and total pressure ranging from 3 to 10 Torr. The results indicate that this RTCVD process can be used to deposit both thin gate and thick isolation insulators for single wafer processing. Deposition rates of the RTCVD oxides exhibit a nonlinear dependence on the total deposition pressure. Electrical characterization of the as-deposited RTCVD oxides shows a mid-gap interface trap density of < 5×1010 eV−1 cm−2 and an aver...
ABSTRACTA combination of i) low-temperature, 300-400°C, plasma-assisted oxidation to form the SiO... more ABSTRACTA combination of i) low-temperature, 300-400°C, plasma-assisted oxidation to form the SiO2/Si interfaces, and ii) 800°C rapid thermal chemical vapor deposition, RTCVD, to deposit SiO2 thin films have been used to fabricate gate-oxide heterostructures. This sequence separates SiO2/Si interface formation by the oxidation process from the deposition of the bulk oxide layer by RTCVD. These two processes were performed in situ and sequentially in a single-chamber, ultraclean quartz reactor system. We have studied the chemistry of the interface formation process by Auger electron spectroscopy, AES, and the electrical properties of MOS devices with Al electrodes by C-V techniques.
The interface between HfO2 and sulfur-passivated GaAs was analyzed after atomic-layer deposition ... more The interface between HfO2 and sulfur-passivated GaAs was analyzed after atomic-layer deposition (ALD) and postdeposition annealing (PDA) using x-ray photoelectron spectroscopy. The HfO2 ALD process resulted in elemental arsenic buildup at the interface. Electrical measurements confirmed that the elemental arsenic caused anomalously large values for equivalent oxide thickness (EOT), hysteresis, and frequency dispersion in accumulation. Arsenic outdiffusion after PDA lowered the EOT but increased the gate leakage. Annealing the (NH4)2S-treated GaAs prior to ALD yielded an EOT of 1.85 nm and leakage of 6.6×10-4 A/cm2 at Vg=Vfb-1 V. This modified passivation scheme looks promising for achieving a high-quality HfO2/GaAs interface.
The reduction in native oxides on GaAs surface during atomic layer deposition (ALD) of HfO2 using... more The reduction in native oxides on GaAs surface during atomic layer deposition (ALD) of HfO2 using tetrakis-dimethylamino-hafnium precursor was investigated using x-ray photoelectron spectroscopy. The role of the ALD growth temperature on the reaction between surface oxides and precursor was studied. Interfacial oxide reduction was found to be insignificant for ALD at 200 °C, while nearly complete for growth at
Annals of the New York Academy of Sciences, Jul 6, 2016
Mobile technology has become a ubiquitous part of everyday life, and the practical utility of mob... more Mobile technology has become a ubiquitous part of everyday life, and the practical utility of mobile devices for improving human health is only now being realized. Wireless medical sensors, or mobile biosensors, are one such technology that is allowing the accumulation of real-time biometric data that may hold valuable clues for treating even some of the most devastating human diseases. From wearable gadgets to sophisticated implantable medical devices, the information retrieved from mobile technology has the potential to revolutionize how clinical research is conducted and how disease therapies are delivered in the coming years. Encompassing the fields of science and engineering, analytics, health care, business, and government, this report explores the promise that wearable biosensors, along with integrated mobile apps, hold for improving the quality of patient care and clinical outcomes. The discussion focuses on groundbreaking device innovation, data optimization and validation,...
In this work, we have developed a novel gate stack to enhance the mobility of Si face (0001) 4H-S... more In this work, we have developed a novel gate stack to enhance the mobility of Si face (0001) 4H-SiC lateral MOSFETs while maintaining a high threshold voltage. The gate dielectric consists a thin lanthanum silicate layer at SiC/dielectric interface and SiO2 deposited by atomic layer deposition. MOSFETs using this interface engineering technique show a peak field effect mobility of 133.5 cm2/Vs while maintaining a positive threshold voltage of above 3V. The interface state density measured on MOS capacitor with lanthanum silicate interfacial layers is reduced compared to the capacitors without the silicate. It is shown that the presence of the lanthanum at the interface reduces the formation of a lower quality SiOx interfacial layer typically formed at the SiC surface during typical high temperature anneals. This better quality interfacial layer produces a sharp SiC/dielectric interface, which is confirmed by cross section Z-contrast STEM images.
ABSTRACT Erbium silicide formation was investigated on epitaxial layers grown on Si substrates. S... more ABSTRACT Erbium silicide formation was investigated on epitaxial layers grown on Si substrates. Substitutional carbon incorporation in the epitaxial layers was in the range of 0.6–1.6%. The silicide films were formed by rapid thermal annealing of sputter-deposited erbium layers in the temperature range of . The sheet resistance of the silicide films formed on epitaxial layers was found to be equal to or less than the sheet resistance of the films formed on Si epitaxial layers. At , an average resistivity of was obtained. The silicide grains were found to be epitaxially aligned to the substrate along the (100) orientation, regardless of the carbon concentration in the underlying epitaxial layer. Compositional analysis of the films indicated carbon accumulation at the interface with no carbon incorporation in the silicide. The films formed on epitaxial layers exhibited a smooth interface/surface morphology free of pinholes, contrary to the silicides formed on Si. The root-mean-square surface roughness was found to be less than , which was found to be the case with both substitutional and interstitial incorporation of carbon atoms in the epitaxial layer.
In bulk PMOSFETs, selective epitaxial Si1-xGex junctions have been used to introduce strain into ... more In bulk PMOSFETs, selective epitaxial Si1-xGex junctions have been used to introduce strain into the channel for mobility enhancement purposes. Freescale has applied this idea to SOI wafers where they demonstrated that mobility enhancement is prominent for 400A partially depleted SOI PMOSFETs. But the scaling capability of this technology for very thin SOI wafers needs to be verified. In this
In this work, we report the effects of nitrogen on electrical and structural properties in TaSixN... more In this work, we report the effects of nitrogen on electrical and structural properties in TaSixNy /SiO2/p-Si MOS capacitors. TaSixNy films with various compositions were deposited by reactive sputtering of TaSi2 or by co-sputtering of Ta and Si targets in argon and nitrogen ambient. TaSixNy films were characterized by Rutherford backscattering spectroscopy and Auger electron spectroscopy. It was found that the workfunction of TaSixNy (Si>Ta) with varying N contents ranges from 4.2 to 4.3 eV. Cross-sectional transmission electron microscopy shows no indication of interfacial reaction or crystallization in TaSixNy on SiO2, resulting in no significant increase of leakage current in the capacitor during annealing. It is believed that nitrogen retards reaction rates and improves the chemical-thermal stability of the gate-dielectric interface and oxygen diffusion barrier properties.
ABSTRACTThis paper describes the preparation of silicon-based metal oxide semiconductor, MOS, dev... more ABSTRACTThis paper describes the preparation of silicon-based metal oxide semiconductor, MOS, devices, capacitors and field effect transistors, FETs, using deposited oxide dielectrics. A critical aspect of the device fabrication process is the way the Si-SiO2 interface is formed; e.g., either before, during, or after the oxide deposition. We have studied different methods of fabricating Si-SiO2 heterostructures, and have concluded that the implementation of independently controllable and sequential process steps for (i) interface formation, and (ii) oxide deposition consistently yields MOS devices with electrical properties that are superior to those of devices fabricated under other processing conditions which include specifically interface formation during the oxide deposition.
As the feature size of MOSFET devices shrink, issues such as thermal budget associated with contr... more As the feature size of MOSFET devices shrink, issues such as thermal budget associated with controlling channel doping profiles and oxide growth kinetics raise concerns about using thermally grown furnace oxides for deep-submicron device applications. To address these concerns, we have developed a new RTCVD oxide process using a gas system of silane and nitrous oxide. The RTCVD oxides are deposited in a lamp-heated, cold wall, RTP system. Deposition rates ranging from 55 Å/min. to 624 Å/min. can be achieved at 800°C with silane nitrous oxide flow rate ratio of 2% and total pressure ranging from 3 to 10 Torr. The results indicate that this RTCVD process can be used to deposit both thin gate and thick isolation insulators for single wafer processing. Deposition rates of the RTCVD oxides exhibit a nonlinear dependence on the total deposition pressure. Electrical characterization of the as-deposited RTCVD oxides shows a mid-gap interface trap density of < 5×1010 eV−1 cm−2 and an aver...
ABSTRACTA combination of i) low-temperature, 300-400°C, plasma-assisted oxidation to form the SiO... more ABSTRACTA combination of i) low-temperature, 300-400°C, plasma-assisted oxidation to form the SiO2/Si interfaces, and ii) 800°C rapid thermal chemical vapor deposition, RTCVD, to deposit SiO2 thin films have been used to fabricate gate-oxide heterostructures. This sequence separates SiO2/Si interface formation by the oxidation process from the deposition of the bulk oxide layer by RTCVD. These two processes were performed in situ and sequentially in a single-chamber, ultraclean quartz reactor system. We have studied the chemistry of the interface formation process by Auger electron spectroscopy, AES, and the electrical properties of MOS devices with Al electrodes by C-V techniques.
The interface between HfO2 and sulfur-passivated GaAs was analyzed after atomic-layer deposition ... more The interface between HfO2 and sulfur-passivated GaAs was analyzed after atomic-layer deposition (ALD) and postdeposition annealing (PDA) using x-ray photoelectron spectroscopy. The HfO2 ALD process resulted in elemental arsenic buildup at the interface. Electrical measurements confirmed that the elemental arsenic caused anomalously large values for equivalent oxide thickness (EOT), hysteresis, and frequency dispersion in accumulation. Arsenic outdiffusion after PDA lowered the EOT but increased the gate leakage. Annealing the (NH4)2S-treated GaAs prior to ALD yielded an EOT of 1.85 nm and leakage of 6.6×10-4 A/cm2 at Vg=Vfb-1 V. This modified passivation scheme looks promising for achieving a high-quality HfO2/GaAs interface.
The reduction in native oxides on GaAs surface during atomic layer deposition (ALD) of HfO2 using... more The reduction in native oxides on GaAs surface during atomic layer deposition (ALD) of HfO2 using tetrakis-dimethylamino-hafnium precursor was investigated using x-ray photoelectron spectroscopy. The role of the ALD growth temperature on the reaction between surface oxides and precursor was studied. Interfacial oxide reduction was found to be insignificant for ALD at 200 °C, while nearly complete for growth at
Annals of the New York Academy of Sciences, Jul 6, 2016
Mobile technology has become a ubiquitous part of everyday life, and the practical utility of mob... more Mobile technology has become a ubiquitous part of everyday life, and the practical utility of mobile devices for improving human health is only now being realized. Wireless medical sensors, or mobile biosensors, are one such technology that is allowing the accumulation of real-time biometric data that may hold valuable clues for treating even some of the most devastating human diseases. From wearable gadgets to sophisticated implantable medical devices, the information retrieved from mobile technology has the potential to revolutionize how clinical research is conducted and how disease therapies are delivered in the coming years. Encompassing the fields of science and engineering, analytics, health care, business, and government, this report explores the promise that wearable biosensors, along with integrated mobile apps, hold for improving the quality of patient care and clinical outcomes. The discussion focuses on groundbreaking device innovation, data optimization and validation,...
In this work, we have developed a novel gate stack to enhance the mobility of Si face (0001) 4H-S... more In this work, we have developed a novel gate stack to enhance the mobility of Si face (0001) 4H-SiC lateral MOSFETs while maintaining a high threshold voltage. The gate dielectric consists a thin lanthanum silicate layer at SiC/dielectric interface and SiO2 deposited by atomic layer deposition. MOSFETs using this interface engineering technique show a peak field effect mobility of 133.5 cm2/Vs while maintaining a positive threshold voltage of above 3V. The interface state density measured on MOS capacitor with lanthanum silicate interfacial layers is reduced compared to the capacitors without the silicate. It is shown that the presence of the lanthanum at the interface reduces the formation of a lower quality SiOx interfacial layer typically formed at the SiC surface during typical high temperature anneals. This better quality interfacial layer produces a sharp SiC/dielectric interface, which is confirmed by cross section Z-contrast STEM images.
ABSTRACT Erbium silicide formation was investigated on epitaxial layers grown on Si substrates. S... more ABSTRACT Erbium silicide formation was investigated on epitaxial layers grown on Si substrates. Substitutional carbon incorporation in the epitaxial layers was in the range of 0.6–1.6%. The silicide films were formed by rapid thermal annealing of sputter-deposited erbium layers in the temperature range of . The sheet resistance of the silicide films formed on epitaxial layers was found to be equal to or less than the sheet resistance of the films formed on Si epitaxial layers. At , an average resistivity of was obtained. The silicide grains were found to be epitaxially aligned to the substrate along the (100) orientation, regardless of the carbon concentration in the underlying epitaxial layer. Compositional analysis of the films indicated carbon accumulation at the interface with no carbon incorporation in the silicide. The films formed on epitaxial layers exhibited a smooth interface/surface morphology free of pinholes, contrary to the silicides formed on Si. The root-mean-square surface roughness was found to be less than , which was found to be the case with both substitutional and interstitial incorporation of carbon atoms in the epitaxial layer.
In bulk PMOSFETs, selective epitaxial Si1-xGex junctions have been used to introduce strain into ... more In bulk PMOSFETs, selective epitaxial Si1-xGex junctions have been used to introduce strain into the channel for mobility enhancement purposes. Freescale has applied this idea to SOI wafers where they demonstrated that mobility enhancement is prominent for 400A partially depleted SOI PMOSFETs. But the scaling capability of this technology for very thin SOI wafers needs to be verified. In this
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Papers by Veena Misra