2012 Third International Conference on Computer and Communication Technology, 2012
ABSTRACT This paper presents a study of MTJ-based logic circuit in terms of propagation delay, po... more ABSTRACT This paper presents a study of MTJ-based logic circuit in terms of propagation delay, power dissipation, and power-delay product. The paper also analyzes impact of PVT (process, voltage, and temperature) variations on most of the design metrics of logic circuit and compares the results with those conventional CMOS logic circuit. The MTJ-based logic circuit are found to be robust compared with conventional CMOS logic circuits at the cost longer delay and higher power dissipation.
Communications in Computer and Information Science, 2010
This paper proposes a high-speed multi-diameter CNFET-based 7T (seven transistor) SRAM (static ra... more This paper proposes a high-speed multi-diameter CNFET-based 7T (seven transistor) SRAM (static random access memory) cell. It investigates the impact of process, voltage and temperature (PVT) variations on its design metrics and compares the results with its counterpart – CMOS-based 7T SRAM cell. The proposed design offers 77.4× improvement in write access time along with 88.1× reduction in write access
2012 Third International Conference on Computer and Communication Technology, 2012
ABSTRACT This paper presents a study of MTJ-based logic circuit in terms of propagation delay, po... more ABSTRACT This paper presents a study of MTJ-based logic circuit in terms of propagation delay, power dissipation, and power-delay product. The paper also analyzes impact of PVT (process, voltage, and temperature) variations on most of the design metrics of logic circuit and compares the results with those conventional CMOS logic circuit. The MTJ-based logic circuit are found to be robust compared with conventional CMOS logic circuits at the cost longer delay and higher power dissipation.
Communications in Computer and Information Science, 2010
This paper proposes a high-speed multi-diameter CNFET-based 7T (seven transistor) SRAM (static ra... more This paper proposes a high-speed multi-diameter CNFET-based 7T (seven transistor) SRAM (static random access memory) cell. It investigates the impact of process, voltage and temperature (PVT) variations on its design metrics and compares the results with its counterpart – CMOS-based 7T SRAM cell. The proposed design offers 77.4× improvement in write access time along with 88.1× reduction in write access
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