New Strategies for High Performance VLSI Physical Design
Xiang, Hua
This item is only available for download by members of the University of Illinois community. Students, faculty, and staff at the U of I may log in with your NetID and password to view the item. If you are trying to access an Illinois-restricted dissertation or thesis, you can request a copy through your library's Inter-Library Loan office or purchase a copy directly from ProQuest.
Permalink
https://hdl.handle.net/2142/81643
Description
Title
New Strategies for High Performance VLSI Physical Design
Author(s)
Xiang, Hua
Issue Date
2004
Doctoral Committee Chair(s)
Wong, Martin D.F.
Department of Study
Computer Science
Discipline
Computer Science
Degree Granting Institution
University of Illinois at Urbana-Champaign
Degree Name
Ph.D.
Degree Level
Dissertation
Keyword(s)
Engineering, Electronics and Electrical
Language
eng
Abstract
Chapters 6 and 7 address ECO problems. Chapter 6 presents two algorithms to resolve overlaps between power rails and signal wires which are introduced by power rail redesign. In chapter 7, we propose an algorithm to eliminate capacitive crosstalk violations.
Use this login method if you
don't
have an
@illinois.edu
email address.
(Oops, I do have one)
IDEALS migrated to a new platform on June 23, 2022. If you created
your account prior to this date, you will have to reset your password
using the forgot-password link below.
