H. S. Jatana received the B.Tech. degree from BITS Pilani, India, in 1984. He was with Rockwell Semiconductor, Newport Beach, CA, USA. He is currently the Head ...

HS Jattana. Armed Forces background. Working in CMOS process development & Integration, and VLSI Design at DSM. Expertise - Space/Mil grade Product development ...

HS Jatana, Sci/Engr 'SG'. Group Head – Design & Process Grp. SCL /Dept of Space. Govt of India. Received his engineering education BTech (hons) from BITS Pilani ...

From armed forces background, chip designer ISRO, Academician & FARMER-SOLDIER. Adjunct Faculty. PGIMER APOLITICAL. Views expressed are STRICTLY PERSONAL.

H. S. Jatana's 28 research works with 160 citations and 2480 reads, including: L Style n-MOSFET Layout For Mitigating TID Effects.

Lectures by H S Jatana · Advance Mosfet Device & Beyond By Dr HS Jatana · Advance MOSFET Devices by Dr H S Jatana · CMOS Analog Design A Tutorial By Er HS Jatana.

Apr 25, 2024 · List of computer science publications by H. S. Jatana.