diff --git a/.github/workflows/codespell.yml b/.github/workflows/codespell.yml
index 2d8b4627aac2d..1d6b1dc9d2b27 100644
--- a/.github/workflows/codespell.yml
+++ b/.github/workflows/codespell.yml
@@ -8,6 +8,6 @@ jobs:
     steps:
     - uses: actions/checkout@v4
     # codespell version should be kept in sync with .pre-commit-config.yml
-    - run: pip install --user codespell==2.2.6 tomli
+    - run: pip install --user codespell==2.4.1 tomli
     - run: codespell
 
diff --git a/.github/workflows/mpy_format.yml b/.github/workflows/mpy_format.yml
index baa02ce08d507..b6768a46c3cdc 100644
--- a/.github/workflows/mpy_format.yml
+++ b/.github/workflows/mpy_format.yml
@@ -15,7 +15,7 @@ concurrency:
 
 jobs:
   test:
-    runs-on: ubuntu-20.04 # use 20.04 to get python2
+    runs-on: ubuntu-22.04 # use 22.04 to get python2
     steps:
     - uses: actions/checkout@v4
     - name: Install packages
diff --git a/.github/workflows/ports_alif.yml b/.github/workflows/ports_alif.yml
new file mode 100644
index 0000000000000..0e96e7d816e50
--- /dev/null
+++ b/.github/workflows/ports_alif.yml
@@ -0,0 +1,33 @@
+name: alif port
+
+on:
+  push:
+  pull_request:
+    paths:
+      - '.github/workflows/*.yml'
+      - 'tools/**'
+      - 'py/**'
+      - 'extmod/**'
+      - 'shared/**'
+      - 'lib/**'
+      - 'drivers/**'
+      - 'ports/alif/**'
+
+concurrency:
+  group: ${{ github.workflow }}-${{ github.ref }}
+  cancel-in-progress: true
+
+jobs:
+  build_alif:
+    strategy:
+      fail-fast: false
+      matrix:
+        ci_func:  # names are functions in ci.sh
+          - alif_ae3_build
+    runs-on: ubuntu-latest
+    steps:
+    - uses: actions/checkout@v4
+    - name: Install packages
+      run: source tools/ci.sh && ci_alif_setup
+    - name: Build ci_${{matrix.ci_func }}
+      run: source tools/ci.sh && ci_${{ matrix.ci_func }}
diff --git a/.github/workflows/ports_esp32.yml b/.github/workflows/ports_esp32.yml
index 45808b659add7..4c07f89437757 100644
--- a/.github/workflows/ports_esp32.yml
+++ b/.github/workflows/ports_esp32.yml
@@ -25,13 +25,13 @@ jobs:
         ci_func:  # names are functions in ci.sh
           - esp32_build_cmod_spiram_s2
           - esp32_build_s3_c3
-    runs-on: ubuntu-20.04
+    runs-on: ubuntu-latest
     steps:
     - uses: actions/checkout@v4
 
     - id: idf_ver
-      name: Read the ESP-IDF version
-      run: source tools/ci.sh && echo "IDF_VER=$IDF_VER" | tee "$GITHUB_OUTPUT"
+      name: Read the ESP-IDF version (including Python version)
+      run: source tools/ci.sh && echo "IDF_VER=${IDF_VER}-py${PYTHON_VER}" | tee "$GITHUB_OUTPUT"
 
     - name: Cached ESP-IDF install
       id: cache_esp_idf
diff --git a/.github/workflows/ports_mimxrt.yml b/.github/workflows/ports_mimxrt.yml
index 9e782bf63b31c..7743e036ab377 100644
--- a/.github/workflows/ports_mimxrt.yml
+++ b/.github/workflows/ports_mimxrt.yml
@@ -19,7 +19,7 @@ concurrency:
 
 jobs:
   build:
-    runs-on: ubuntu-20.04
+    runs-on: ubuntu-latest
     defaults:
       run:
         working-directory: 'micropython repo'  # test build with space in path
diff --git a/.github/workflows/ports_nrf.yml b/.github/workflows/ports_nrf.yml
index d9cffb9778cba..76727c9d1f6bd 100644
--- a/.github/workflows/ports_nrf.yml
+++ b/.github/workflows/ports_nrf.yml
@@ -19,7 +19,7 @@ concurrency:
 
 jobs:
   build:
-    runs-on: ubuntu-20.04
+    runs-on: ubuntu-latest
     steps:
     - uses: actions/checkout@v4
     - name: Install packages
diff --git a/.github/workflows/ports_renesas-ra.yml b/.github/workflows/ports_renesas-ra.yml
index b1a30c2f11798..b9fa74331dc0b 100644
--- a/.github/workflows/ports_renesas-ra.yml
+++ b/.github/workflows/ports_renesas-ra.yml
@@ -19,7 +19,7 @@ concurrency:
 
 jobs:
   build_renesas_ra_board:
-    runs-on: ubuntu-20.04
+    runs-on: ubuntu-latest
     steps:
     - uses: actions/checkout@v4
     - name: Install packages
diff --git a/.github/workflows/ports_stm32.yml b/.github/workflows/ports_stm32.yml
index f5e01dc1f620e..8800f145189b8 100644
--- a/.github/workflows/ports_stm32.yml
+++ b/.github/workflows/ports_stm32.yml
@@ -26,7 +26,7 @@ jobs:
           - stm32_pyb_build
           - stm32_nucleo_build
           - stm32_misc_build
-    runs-on: ubuntu-20.04
+    runs-on: ubuntu-22.04
     steps:
     - uses: actions/checkout@v4
     - name: Install packages
diff --git a/.github/workflows/ports_unix.yml b/.github/workflows/ports_unix.yml
index a095136b4a65e..2547015038e4d 100644
--- a/.github/workflows/ports_unix.yml
+++ b/.github/workflows/ports_unix.yml
@@ -98,7 +98,7 @@ jobs:
       run: tests/run-tests.py --print-failures
 
   coverage_32bit:
-    runs-on: ubuntu-20.04 # use 20.04 to get libffi-dev:i386
+    runs-on: ubuntu-22.04 # use 22.04 to get libffi-dev:i386
     steps:
     - uses: actions/checkout@v4
     - name: Install packages
@@ -116,7 +116,7 @@ jobs:
       run: tests/run-tests.py --print-failures
 
   nanbox:
-    runs-on: ubuntu-20.04 # use 20.04 to get python2, and libffi-dev:i386
+    runs-on: ubuntu-22.04 # use 22.04 to get python2, and libffi-dev:i386
     steps:
     - uses: actions/checkout@v4
     - name: Install packages
@@ -142,7 +142,7 @@ jobs:
       run: tests/run-tests.py --print-failures
 
   stackless_clang:
-    runs-on: ubuntu-20.04
+    runs-on: ubuntu-latest
     steps:
     - uses: actions/checkout@v4
     - name: Install packages
@@ -156,7 +156,7 @@ jobs:
       run: tests/run-tests.py --print-failures
 
   float_clang:
-    runs-on: ubuntu-20.04
+    runs-on: ubuntu-latest
     steps:
     - uses: actions/checkout@v4
     - name: Install packages
diff --git a/.github/workflows/ruff.yml b/.github/workflows/ruff.yml
index 29e9ddbf8b61a..4c4a2a3162ed6 100644
--- a/.github/workflows/ruff.yml
+++ b/.github/workflows/ruff.yml
@@ -7,7 +7,7 @@ jobs:
     runs-on: ubuntu-latest
     steps:
     - uses: actions/checkout@v4
-    # ruff version should be kept in sync with .pre-commit-config.yaml
-    - run: pip install --user ruff==0.1.3
+    # ruff version should be kept in sync with .pre-commit-config.yaml & also micropython-lib
+    - run: pipx install ruff==0.11.6
     - run: ruff check --output-format=github .
     - run: ruff format --diff .
diff --git a/.gitmodules b/.gitmodules
index 6338f0e66d63d..02849ec9bdd11 100644
--- a/.gitmodules
+++ b/.gitmodules
@@ -68,3 +68,9 @@
 [submodule "lib/arduino-lib"]
 	path = lib/arduino-lib
 	url = https://github.com/arduino/arduino-lib-mpy.git
+[submodule "lib/alif_ensemble-cmsis-dfp"]
+	path = lib/alif_ensemble-cmsis-dfp
+	url = https://github.com/alifsemi/alif_ensemble-cmsis-dfp.git
+[submodule "lib/alif-security-toolkit"]
+	path = lib/alif-security-toolkit
+	url = https://github.com/micropython/alif-security-toolkit.git
diff --git a/.pre-commit-config.yaml b/.pre-commit-config.yaml
index a1c811339adcc..ac9785bb59232 100644
--- a/.pre-commit-config.yaml
+++ b/.pre-commit-config.yaml
@@ -12,14 +12,14 @@ repos:
         verbose: true
         stages: [commit-msg]
   - repo: https://github.com/charliermarsh/ruff-pre-commit
-    # Version should be kept in sync with .github/workflows/ruff.yml
-    rev: v0.1.3
+    # Version should be kept in sync with .github/workflows/ruff.yml & also micropython-lib
+    rev: v0.11.6
     hooks:
       - id: ruff
       - id: ruff-format
   - repo: https://github.com/codespell-project/codespell
     # Version should be kept in sync with .github/workflows/codespell.yml
-    rev: v2.2.6
+    rev: v2.4.1
     hooks:
       - id: codespell
         name: Spellcheck for changed files (codespell)
diff --git a/CODECONVENTIONS.md b/CODECONVENTIONS.md
index d6af0418e42ef..d3f71cb083deb 100644
--- a/CODECONVENTIONS.md
+++ b/CODECONVENTIONS.md
@@ -206,14 +206,21 @@ adhere to the existing style and use `tools/codeformat.py` to check any changes.
 The main conventions, and things not enforceable via the auto-formatter, are
 described below.
 
-White space:
+As the MicroPython code base is over ten years old, not every source file
+conforms fully to these conventions. If making small changes to existing code,
+then it's usually acceptable to follow the existing code's style. New code or
+major changes should follow the conventions described here.
+
+## White space
+
 - Expand tabs to 4 spaces.
 - Don't leave trailing whitespace at the end of a line.
 - For control blocks (if, for, while), put 1 space between the
   keyword and the opening parenthesis.
 - Put 1 space after a comma, and 1 space around operators.
 
-Braces:
+## Braces
+
 - Use braces for all blocks, even no-line and single-line pieces of
   code.
 - Put opening braces on the end of the line it belongs to, not on
@@ -221,18 +228,43 @@ Braces:
 - For else-statements, put the else on the same line as the previous
   closing brace.
 
-Header files:
+## Header files
+
 - Header files should be protected from multiple inclusion with #if
   directives. See an existing header for naming convention.
 
-Names:
+## Names
+
 - Use underscore_case, not camelCase for all names.
 - Use CAPS_WITH_UNDERSCORE for enums and macros.
 - When defining a type use underscore_case and put '_t' after it.
 
-Integer types: MicroPython runs on 16, 32, and 64 bit machines, so it's
-important to use the correctly-sized (and signed) integer types.  The
-general guidelines are:
+### Public names (declared in headers)
+
+- MicroPython-specific names (especially any declared in `py/` and `extmod/`
+  directories) should generally start with `mp_` or `MP_`.
+- Functions and variables declared in a header should generally share a longer
+  common prefix. Usually the prefix matches the file name (i.e. items defined in
+  `py/obj.c` are declared in `py/obj.h` and should be prefixed `mp_obj_`). There
+  are exceptions, for example where one header file contains declarations
+  implemented in multiple source files for expediency.
+
+### Private names (specific to a single .c file)
+
+- For static functions and variables exposed to Python (i.e. a static C function
+  that is wrapped in `MP_DEFINE_CONST_FUN_...` and attached to a module), use
+  the file-level shared common prefix, i.e. name them as if the function or
+  variable was not static.
+- Other static definitions in source files (i.e. functions or variables defined
+  in a .c file that are only used within that .c file) don't need any prefix
+  (specifically: no `s_` or `_` prefix, and generally avoid adding the
+  file-level common prefix).
+
+## Integer types
+
+MicroPython runs on 16, 32, and 64 bit machines, so it's important to use the
+correctly-sized (and signed) integer types. The general guidelines are:
+
 - For most cases use mp_int_t for signed and mp_uint_t for unsigned
   integer values.  These are guaranteed to be machine-word sized and
   therefore big enough to hold the value from a MicroPython small-int
@@ -241,11 +273,13 @@ general guidelines are:
 - You can use int/uint, but remember that they may be 16-bits wide.
 - If in doubt, use mp_int_t/mp_uint_t.
 
-Comments:
+## Comments
+
 - Be concise and only write comments for things that are not obvious.
 - Use `// ` prefix, NOT `/* ... */`. No extra fluff.
 
-Memory allocation:
+## Memory allocation
+
 - Use m_new, m_renew, m_del (and friends) to allocate and free heap memory.
   These macros are defined in py/misc.h.
 
diff --git a/docs/develop/natmod.rst b/docs/develop/natmod.rst
index ba45e4305c66d..2ccd83288565c 100644
--- a/docs/develop/natmod.rst
+++ b/docs/develop/natmod.rst
@@ -70,11 +70,25 @@ The known limitations are:
 So, if your C code has writable data, make sure the data is defined globally,
 without an initialiser, and only written to within functions.
 
+The native module is not automatically linked against the standard static libraries
+like ``libm.a`` and ``libgcc.a``, which can lead to ``undefined symbol`` errors.
+You can link the runtime libraries by setting ``LINK_RUNTIME = 1``
+in your Makefile. Custom static libraries can also be linked by adding
+``MPY_LD_FLAGS += -l path/to/library.a``. Note that these are linked into
+the native module and will not be shared with other modules or the system.
+
 Linker limitation: the native module is not linked against the symbol table of the
 full MicroPython firmware.  Rather, it is linked against an explicit table of exported
 symbols found in ``mp_fun_table`` (in ``py/nativeglue.h``), that is fixed at firmware
 build time.  It is thus not possible to simply call some arbitrary HAL/OS/RTOS/system
-function, for example.
+function, for example, unless that resides at a fixed address. In that case, the path
+of a linkerscript containing a series of symbol names and their fixed address can be
+passed to ``mpy_ld.py`` via the ``--externs`` command line argument. That way symbols
+appearing in the linkerscript will take precedence over what is provided from object
+files, but at the moment the object files' implementation will still reside in the
+final MPY file. The linkerscript parser is limited in its capabilities, and is
+currently used only for parsing the ESP8266 port ROM symbols list (see
+``ports/esp8266/boards/eagle.rom.addr.v6.ld``).
 
 New symbols can be added to the end of the table and the firmware rebuilt.
 The symbols also need to be added to ``tools/mpy_ld.py``'s ``fun_table`` dict in the
diff --git a/docs/esp32/quickref.rst b/docs/esp32/quickref.rst
index 0780e01300801..c394414a76f51 100644
--- a/docs/esp32/quickref.rst
+++ b/docs/esp32/quickref.rst
@@ -83,30 +83,30 @@ The :class:`network.WLAN` class in the :mod:`network` module::
 
     import network
 
-    wlan = network.WLAN(network.WLAN.IF_STA) # create station interface
-    wlan.active(True)       # activate the interface
-    wlan.scan()             # scan for access points
-    wlan.isconnected()      # check if the station is connected to an AP
+    wlan = network.WLAN()       # create station interface (the default, see below for an access point interface)
+    wlan.active(True)           # activate the interface
+    wlan.scan()                 # scan for access points
+    wlan.isconnected()          # check if the station is connected to an AP
     wlan.connect('ssid', 'key') # connect to an AP
-    wlan.config('mac')      # get the interface's MAC address
-    wlan.ipconfig('addr4')  # get the interface's IPv4 addresses
+    wlan.config('mac')          # get the interface's MAC address
+    wlan.ipconfig('addr4')      # get the interface's IPv4 addresses
 
     ap = network.WLAN(network.WLAN.IF_AP) # create access-point interface
-    ap.config(ssid='ESP-AP') # set the SSID of the access point
-    ap.config(max_clients=10) # set how many clients can connect to the network
-    ap.active(True)         # activate the interface
+    ap.config(ssid='ESP-AP')              # set the SSID of the access point
+    ap.config(max_clients=10)             # set how many clients can connect to the network
+    ap.active(True)                       # activate the interface
 
 A useful function for connecting to your local WiFi network is::
 
     def do_connect():
-        import network
-        wlan = network.WLAN(network.WLAN.IF_STA)
+        import machine, network
+        wlan = network.WLAN()
         wlan.active(True)
         if not wlan.isconnected():
             print('connecting to network...')
             wlan.connect('ssid', 'key')
             while not wlan.isconnected():
-                pass
+                machine.idle()
         print('network config:', wlan.ipconfig('addr4'))
 
 Once the network is established the :mod:`socket <socket>` module can be used
@@ -148,6 +148,7 @@ Required keyword arguments for the constructor:
 - ``mdc`` and ``mdio`` - :class:`machine.Pin` objects (or integers) specifying
   the MDC and MDIO pins.
 - ``phy_type`` - Select the PHY device type. Supported devices are
+  ``PHY_GENERIC``,
   ``PHY_LAN8710``, ``PHY_LAN8720``, ``PHY_IP101``, ``PHY_RTL8201``,
   ``PHY_DP83848``, ``PHY_KSZ8041`` and ``PHY_KSZ8081``. These values are all
   constants defined in the ``network`` module.
@@ -270,8 +271,10 @@ Use the :mod:`time <time>` module::
 Timers
 ------
 
-The ESP32 port has four hardware timers. Use the :ref:`machine.Timer <machine.Timer>` class
-with a timer ID from 0 to 3 (inclusive)::
+The ESP32 port has one, two or four hardware timers, depending on the ESP32 device type.
+There is 1 timer for ESP32C2, 2 timers for ESP32C4, ESP32C6 and ESP32H4, and
+4 timers otherwise. Use the :ref:`machine.Timer <machine.Timer>` class
+with a timer ID of 0, 0 and 1, or from 0 to 3 (inclusive)::
 
     from machine import Timer
 
@@ -281,7 +284,8 @@ with a timer ID from 0 to 3 (inclusive)::
     tim1 = Timer(1)
     tim1.init(period=2000, mode=Timer.PERIODIC, callback=lambda t:print(1))
 
-The period is in milliseconds.
+The period is in milliseconds. When using UART.IRQ_RXIDLE, timer 0 is needed for
+the IRQ_RXIDLE mechanism and must not be used otherwise.
 
 Virtual timers are not currently supported on this port.
 
@@ -383,7 +387,7 @@ for more details.
 
 Use the :ref:`machine.PWM <machine.PWM>` class::
 
-    from machine import Pin, PWM
+    from machine import Pin, PWM, lightsleep
 
     pwm0 = PWM(Pin(0), freq=5000, duty_u16=32768) # create PWM object from a pin
     freq = pwm0.freq()         # get current frequency
@@ -393,7 +397,7 @@ Use the :ref:`machine.PWM <machine.PWM>` class::
     pwm0.duty(256)             # set duty cycle from 0 to 1023 as a ratio duty/1023, (now 25%)
 
     duty_u16 = pwm0.duty_u16() # get current duty cycle, range 0-65535
-    pwm0.duty_u16(2**16*3//4)  # set duty cycle from 0 to 65535 as a ratio duty_u16/65535, (now 75%)
+    pwm0.duty_u16(65536*3//4)  # set duty cycle from 0 to 65535 as a ratio duty_u16/65535, (now 75%)
 
     duty_ns = pwm0.duty_ns()   # get current pulse width in ns
     pwm0.duty_ns(250_000)      # set pulse width in nanoseconds from 0 to 1_000_000_000/freq, (now 25%)
@@ -402,19 +406,35 @@ Use the :ref:`machine.PWM <machine.PWM>` class::
 
     pwm2 = PWM(Pin(2), freq=20000, duty=512)  # create and configure in one go
     print(pwm2)                               # view PWM settings
+    pwm2.deinit()                             # turn off PWM on the pin
+
+    pwm0 = PWM(Pin(0), duty_u16=16384)            # The output is at a high level 25% of the time.
+    pwm2 = PWM(Pin(2), duty_u16=16384, invert=1)  # The output is at a low level 25% of the time.
+
+    pwm4 = PWM(Pin(4), lightsleep=True)           # Allow PWM during light sleep mode
+
+    lightsleep(10*1000) # pwm0, pwm2 goes off, pwm4 stays on during 10s light sleep
+                        # pwm0, pwm2, pwm4 on after 10s light sleep
 
 ESP chips have different hardware peripherals:
 
-=====================================================  ========  ========  ========
-Hardware specification                                    ESP32  ESP32-S2  ESP32-C3
------------------------------------------------------  --------  --------  --------
-Number of groups (speed modes)                                2         1         1
-Number of timers per group                                    4         4         4
-Number of channels per group                                  8         8         6
------------------------------------------------------  --------  --------  --------
-Different PWM frequencies (groups * timers)                   8         4         4
-Total PWM channels (Pins, duties) (groups * channels)        16         8         6
-=====================================================  ========  ========  ========
+=======================================================  ========  =========  ==========
+Hardware specification                                      ESP32  ESP32-S2,  ESP32-C2,
+                                                                   ESP32-S3,  ESP32-C3,
+                                                                   ESP32-P4   ESP32-C5,
+                                                                              ESP32-C6,
+                                                                              ESP32-H2
+-------------------------------------------------------  --------  ---------  ----------
+Number of groups (speed modes)                                  2          1         1
+Number of timers per group                                      4          4         4
+Number of channels per group                                    8          8         6
+-------------------------------------------------------  --------  ---------  ----------
+Different PWM frequencies = (groups * timers)                   8          4         4
+Total PWM channels (Pins, duties) = (groups * channels)        16          8         6
+=======================================================  ========  =========  ==========
+
+In light sleep, the ESP32 PWM can only operate in low speed mode, so only 4 timers and
+8 channels are available.
 
 A maximum number of PWM channels (Pins) are available on the ESP32 - 16 channels,
 but only 8 different PWM frequencies are available, the remaining 8 channels must
@@ -524,14 +544,27 @@ Legacy methods:
 
     Equivalent to ``ADC.block().init(bits=bits)``.
 
+The only chip that can switch resolution to a lower one is the normal esp32.
+The C2 & S3 are stuck at 12 bits, while the S2 is at 13 bits.
+
 For compatibility, the ``ADC`` object also provides constants matching the
-supported ADC resolutions:
+supported ADC resolutions, per chip:
 
+ESP32:
   - ``ADC.WIDTH_9BIT`` = 9
   - ``ADC.WIDTH_10BIT`` = 10
   - ``ADC.WIDTH_11BIT`` = 11
   - ``ADC.WIDTH_12BIT`` = 12
 
+ESP32 C3 & S3:
+  - ``ADC.WIDTH_12BIT`` = 12
+
+ESP32 S2:
+  - ``ADC.WIDTH_13BIT`` = 13
+
+.. method:: ADC.deinit()
+
+    Provided to deinit the adc driver.
 
 Software SPI bus
 ----------------
@@ -747,7 +780,7 @@ See :ref:`machine.SDCard <machine.SDCard>`. ::
 
     import machine, os, vfs
 
-    # Slot 2 uses pins sck=18, cs=5, miso=19, mosi=23
+    # On original ESP32, slot 2 uses pins sck=18, cs=5, miso=19, mosi=23
     sd = machine.SDCard(slot=2)
     vfs.mount(sd, '/sd') # mount
 
diff --git a/docs/esp32/tutorial/pwm.rst b/docs/esp32/tutorial/pwm.rst
index 2650284d35f41..82d43b36f6cb6 100644
--- a/docs/esp32/tutorial/pwm.rst
+++ b/docs/esp32/tutorial/pwm.rst
@@ -11,16 +11,20 @@ compared with the length of a single period (low plus high time).  Maximum
 duty cycle is when the pin is high all of the time, and minimum is when it is
 low all of the time.
 
-* More comprehensive example with all 16 PWM channels and 8 timers::
+* More comprehensive example with all **16 PWM channels and 8 timers**::
 
+    from time import sleep
     from machine import Pin, PWM
     try:
-        f = 100  # Hz
-        d = 1024 // 16  # 6.25%
-        pins = (15, 2, 4, 16, 18, 19, 22, 23, 25, 26, 27, 14 , 12, 13, 32, 33)
+        F = 10000  # Hz
+        D = 65536 // 16  # 6.25%
+        pins = (2, 4, 12, 13, 14, 15, 16, 18, 19, 22, 23, 25, 26, 27, 32, 33)
         pwms = []
         for i, pin in enumerate(pins):
-            pwms.append(PWM(Pin(pin), freq=f * (i // 2 + 1), duty= 1023 if i==15 else d * (i + 1)))
+            f = F * (i // 2 + 1)
+            d = min(65535, D * (i + 1))
+            pwms.append(PWM(pin, freq=f, duty_u16=d))
+            sleep(2 / f)
             print(pwms[i])
     finally:
         for pwm in pwms:
@@ -31,65 +35,100 @@ low all of the time.
 
   Output is::
 
-    PWM(Pin(15), freq=100, duty=64, resolution=10, mode=0, channel=0, timer=0)
-    PWM(Pin(2), freq=100, duty=128, resolution=10, mode=0, channel=1, timer=0)
-    PWM(Pin(4), freq=200, duty=192, resolution=10, mode=0, channel=2, timer=1)
-    PWM(Pin(16), freq=200, duty=256, resolution=10, mode=0, channel=3, timer=1)
-    PWM(Pin(18), freq=300, duty=320, resolution=10, mode=0, channel=4, timer=2)
-    PWM(Pin(19), freq=300, duty=384, resolution=10, mode=0, channel=5, timer=2)
-    PWM(Pin(22), freq=400, duty=448, resolution=10, mode=0, channel=6, timer=3)
-    PWM(Pin(23), freq=400, duty=512, resolution=10, mode=0, channel=7, timer=3)
-    PWM(Pin(25), freq=500, duty=576, resolution=10, mode=1, channel=0, timer=0)
-    PWM(Pin(26), freq=500, duty=640, resolution=10, mode=1, channel=1, timer=0)
-    PWM(Pin(27), freq=600, duty=704, resolution=10, mode=1, channel=2, timer=1)
-    PWM(Pin(14), freq=600, duty=768, resolution=10, mode=1, channel=3, timer=1)
-    PWM(Pin(12), freq=700, duty=832, resolution=10, mode=1, channel=4, timer=2)
-    PWM(Pin(13), freq=700, duty=896, resolution=10, mode=1, channel=5, timer=2)
-    PWM(Pin(32), freq=800, duty=960, resolution=10, mode=1, channel=6, timer=3)
-    PWM(Pin(33), freq=800, duty=1023, resolution=10, mode=1, channel=7, timer=3)
-
-* Example of a smooth frequency change::
+    PWM(Pin(2), freq=10000, duty_u16=4096)
+    PWM(Pin(4), freq=10000, duty_u16=8192)
+    PWM(Pin(12), freq=20000, duty_u16=12288)
+    PWM(Pin(13), freq=20000, duty_u16=16384)
+    PWM(Pin(14), freq=30030, duty_u16=20480)
+    PWM(Pin(15), freq=30030, duty_u16=24576)
+    PWM(Pin(16), freq=40000, duty_u16=28672)
+    PWM(Pin(18), freq=40000, duty_u16=32768)
+    PWM(Pin(19), freq=50000, duty_u16=36864)
+    PWM(Pin(22), freq=50000, duty_u16=40960)
+    PWM(Pin(23), freq=60060, duty_u16=45056)
+    PWM(Pin(25), freq=60060, duty_u16=49152)
+    PWM(Pin(26), freq=69930, duty_u16=53248)
+    PWM(Pin(27), freq=69930, duty_u16=57344)
+    PWM(Pin(32), freq=80000, duty_u16=61440)
+    PWM(Pin(33), freq=80000, duty_u16=65535)
+
+
+* Example of a **smooth frequency change**::
 
     from time import sleep
     from machine import Pin, PWM
 
-    F_MIN = 500
-    F_MAX = 1000
+    F_MIN = 1000
+    F_MAX = 10000
 
     f = F_MIN
-    delta_f = 1
+    delta_f = F_MAX // 50
 
-    p = PWM(Pin(5), f)
-    print(p)
+    pwm = PWM(Pin(27), f)
 
     while True:
-        p.freq(f)
-
-        sleep(10 / F_MIN)
+        pwm.freq(f)
+        sleep(1 / f)
+        sleep(0.1)
+        print(pwm)
 
         f += delta_f
-        if f >= F_MAX or f <= F_MIN:
+        if f > F_MAX or f < F_MIN:
             delta_f = -delta_f
+            print()
+            if f > F_MAX:
+                f = F_MAX
+            elif f < F_MIN:
+                f = F_MIN
 
-  See PWM wave at Pin(5) with an oscilloscope.
+  See PWM wave on Pin(27) with an oscilloscope.
+
+  Output is::
 
-* Example of a smooth duty change::
+    PWM(Pin(27), freq=998, duty_u16=32768)
+    PWM(Pin(27), freq=1202, duty_u16=32768)
+    PWM(Pin(27), freq=1401, duty_u16=32768)
+    PWM(Pin(27), freq=1598, duty_u16=32768)
+    ...
+    PWM(Pin(27), freq=9398, duty_u16=32768)
+    PWM(Pin(27), freq=9615, duty_u16=32768)
+    PWM(Pin(27), freq=9804, duty_u16=32768)
+    PWM(Pin(27), freq=10000, duty_u16=32768)
+
+    PWM(Pin(27), freq=10000, duty_u16=32768)
+    PWM(Pin(27), freq=9804, duty_u16=32768)
+    PWM(Pin(27), freq=9615, duty_u16=32768)
+    PWM(Pin(27), freq=9398, duty_u16=32768)
+    ...
+    PWM(Pin(27), freq=1598, duty_u16=32768)
+    PWM(Pin(27), freq=1401, duty_u16=32768)
+    PWM(Pin(27), freq=1202, duty_u16=32768)
+    PWM(Pin(27), freq=998, duty_u16=32768)
+
+
+* Example of a **smooth duty change**::
 
     from time import sleep
     from machine import Pin, PWM
 
-    DUTY_MAX = 2**16 - 1
+    DUTY_MAX = 65535
 
     duty_u16 = 0
-    delta_d = 16
+    delta_d = 256
 
-    p = PWM(Pin(5), 1000, duty_u16=duty_u16)
-    print(p)
+    pwm = PWM(Pin(27), freq=1000, duty_u16=duty_u16)
 
     while True:
-        p.duty_u16(duty_u16)
+        pwm.duty_u16(duty_u16)
+        sleep(2 / pwm.freq())
+        print(pwm)
 
-        sleep(1 / 1000)
+        if duty_u16 >= DUTY_MAX:
+            print()
+            sleep(2)
+        elif duty_u16 <= 0:
+            print()
+            sleep(2)
 
         duty_u16 += delta_d
         if duty_u16 >= DUTY_MAX:
@@ -99,9 +138,106 @@ low all of the time.
             duty_u16 = 0
             delta_d = -delta_d
 
-  See PWM wave at Pin(5) with an oscilloscope.
+  PWM wave on Pin(27) with an oscilloscope.
+
+  Output is::
+
+    PWM(Pin(27), freq=998, duty_u16=0)
+    PWM(Pin(27), freq=998, duty_u16=256)
+    PWM(Pin(27), freq=998, duty_u16=512)
+    PWM(Pin(27), freq=998, duty_u16=768)
+    PWM(Pin(27), freq=998, duty_u16=1024)
+    ...
+    PWM(Pin(27), freq=998, duty_u16=64512)
+    PWM(Pin(27), freq=998, duty_u16=64768)
+    PWM(Pin(27), freq=998, duty_u16=65024)
+    PWM(Pin(27), freq=998, duty_u16=65280)
+    PWM(Pin(27), freq=998, duty_u16=65535)
+
+    PWM(Pin(27), freq=998, duty_u16=65279)
+    PWM(Pin(27), freq=998, duty_u16=65023)
+    PWM(Pin(27), freq=998, duty_u16=64767)
+    PWM(Pin(27), freq=998, duty_u16=64511)
+    ...
+    PWM(Pin(27), freq=998, duty_u16=1023)
+    PWM(Pin(27), freq=998, duty_u16=767)
+    PWM(Pin(27), freq=998, duty_u16=511)
+    PWM(Pin(27), freq=998, duty_u16=255)
+    PWM(Pin(27), freq=998, duty_u16=0)
+
+
+* Example of a **smooth duty change and PWM output inversion**::
+
+    from utime import sleep
+    from machine import Pin, PWM
+
+    try:
+        DUTY_MAX = 65535
+
+        duty_u16 = 0
+        delta_d = 65536 // 32
+
+        pwm = PWM(Pin(27))
+        pwmi = PWM(Pin(32), invert=1)
+
+        while True:
+            pwm.duty_u16(duty_u16)
+            pwmi.duty_u16(duty_u16)
+
+            duty_u16 += delta_d
+            if duty_u16 >= DUTY_MAX:
+                duty_u16 = DUTY_MAX
+                delta_d = -delta_d
+            elif duty_u16 <= 0:
+                duty_u16 = 0
+                delta_d = -delta_d
+
+            sleep(.01)
+            print(pwm)
+            print(pwmi)
+
+    finally:
+        try:
+            pwm.deinit()
+        except:
+            pass
+        try:
+            pwmi.deinit()
+        except:
+            pass
+
+  Output is::
+
+    PWM(Pin(27), freq=5000, duty_u16=0)
+    PWM(Pin(32), freq=5000, duty_u16=32768, invert=1)
+    PWM(Pin(27), freq=5000, duty_u16=2048)
+    PWM(Pin(32), freq=5000, duty_u16=2048, invert=1)
+    PWM(Pin(27), freq=5000, duty_u16=4096)
+    PWM(Pin(32), freq=5000, duty_u16=4096, invert=1)
+    PWM(Pin(27), freq=5000, duty_u16=6144)
+    PWM(Pin(32), freq=5000, duty_u16=6144, invert=1)
+    PWM(Pin(27), freq=5000, duty_u16=8192)
+    PWM(Pin(32), freq=5000, duty_u16=8192, invert=1)
+    ...
+
+
+  See PWM waves on Pin(27) and Pin(32) with an oscilloscope.
+
+Note: New PWM parameters take effect in the next PWM cycle.
+
+    pwm = PWM(2, duty=512)
+    print(pwm)
+    >>> PWM(Pin(2), freq=5000, duty=1023)  # the duty is not relevant
+    pwm.init(freq=2, duty=64)
+    print(pwm)
+    >>> PWM(Pin(2), freq=2, duty=16)  # the duty is not relevant
+    time.sleep(1 / 2)                # wait one PWM period
+    print(pwm)
+    >>> PWM(Pin(2), freq=2, duty=64)  # the duty is actual
+
+Note: machine.freq(20_000_000) reduces the highest PWM frequency to 10 MHz.
 
-Note: the Pin.OUT mode does not need to be specified.  The channel is initialized
+Note: the Pin.OUT mode does not need to be specified. The channel is initialized
 to PWM mode internally once for each Pin that is passed to the PWM constructor.
 
 The following code is wrong::
diff --git a/docs/esp8266/tutorial/repl.rst b/docs/esp8266/tutorial/repl.rst
index bc0142aaef5f9..db55d45facde8 100644
--- a/docs/esp8266/tutorial/repl.rst
+++ b/docs/esp8266/tutorial/repl.rst
@@ -38,7 +38,7 @@ browser. The latest versions of Firefox and Chrome are supported.
 
 For your convenience, WebREPL client is hosted at
 `<http://micropython.org/webrepl>`__. Alternatively, you can install it
-locally from the the GitHub repository
+locally from the GitHub repository
 `<https://github.com/micropython/webrepl>`__.
 
 Before connecting to WebREPL, you should set a password and enable it via
diff --git a/docs/library/esp32.rst b/docs/library/esp32.rst
index dc35e7905e162..24831c58d6d20 100644
--- a/docs/library/esp32.rst
+++ b/docs/library/esp32.rst
@@ -80,6 +80,29 @@ Functions
        The result of :func:`gc.mem_free()` is the total of the current "free"
        and "max new split" values printed by :func:`micropython.mem_info()`.
 
+.. function:: idf_task_info()
+
+    Returns information about running ESP-IDF/FreeRTOS tasks, which include
+    MicroPython threads. This data is useful to gain insight into how much time
+    tasks spend running or if they are blocked for significant parts of time,
+    and to determine if allocated stacks are fully utilized or might be reduced.
+
+    ``CONFIG_FREERTOS_USE_TRACE_FACILITY=y`` must be set in the board
+    configuration to make this method available. Additionally configuring
+    ``CONFIG_FREERTOS_GENERATE_RUN_TIME_STATS=y`` and
+    ``CONFIG_FREERTOS_VTASKLIST_INCLUDE_COREID=y`` is recommended to be able to
+    retrieve the total and per-task runtime and the core ID respectively.
+
+    The return value is a 2-tuple where the first value is the total runtime,
+    and the second a list of tasks. Each task is a 7-tuple containing: the task
+    ID, name, current state, priority, runtime, stack high water mark, and the
+    ID of the core it is running on. Runtime and core ID will be None when the
+    respective FreeRTOS configuration option is not enabled.
+
+    .. note:: For an easier to use output based on this function you can use the
+       `utop library <https://github.com/micropython/micropython-lib/tree/master/micropython/utop>`_,
+       which implements a live overview similar to the Unix ``top`` command.
+
 
 Flash partitions
 ----------------
diff --git a/docs/library/framebuf.rst b/docs/library/framebuf.rst
index 149f4d6609be9..e2a231207d673 100644
--- a/docs/library/framebuf.rst
+++ b/docs/library/framebuf.rst
@@ -114,7 +114,7 @@ Drawing text
 
 .. method:: FrameBuffer.text(s, x, y[, c])
 
-    Write text to the FrameBuffer using the the coordinates as the upper-left
+    Write text to the FrameBuffer using the coordinates as the upper-left
     corner of the text. The color of the text can be defined by the optional
     argument but is otherwise a default value of 1. All characters have
     dimensions of 8x8 pixels and there is currently no way to change the font.
@@ -137,6 +137,18 @@ Other methods
     is compared to the value from *palette*, not to the value directly from
     *fbuf*.)
 
+    *fbuf* can be another FrameBuffer instance, or a tuple or list of the form::
+
+        (buffer, width, height, format)
+
+    or::
+
+        (buffer, width, height, format, stride)
+
+    This matches the signature of the FrameBuffer constructor, and the elements
+    of the tuple/list are the same as the arguments to the constructor except that
+    the *buffer* here can be read-only.
+
     The *palette* argument enables blitting between FrameBuffers with differing
     formats. Typical usage is to render a monochrome or grayscale glyph/icon to
     a color display. The *palette* is a FrameBuffer instance whose format is
diff --git a/docs/library/machine.PWM.rst b/docs/library/machine.PWM.rst
index 5f592b8dff593..c2b606affd675 100644
--- a/docs/library/machine.PWM.rst
+++ b/docs/library/machine.PWM.rst
@@ -11,20 +11,20 @@ Example usage::
     from machine import PWM
 
     pwm = PWM(pin, freq=50, duty_u16=8192)  # create a PWM object on a pin
-                                            # and set freq and duty
-    pwm.duty_u16(32768)     # set duty to 50%
+                                            # and set freq 50 Hz and duty 12.5%
+    pwm.duty_u16(32768)                     # set duty to 50%
 
     # reinitialise with a period of 200us, duty of 5us
     pwm.init(freq=5000, duty_ns=5000)
 
-    pwm.duty_ns(3000)       # set pulse width to 3us
+    pwm.duty_ns(3000)                       # set pulse width to 3us
 
     pwm.deinit()
 
 Constructors
 ------------
 
-.. class:: PWM(dest, *, freq, duty_u16, duty_ns, invert)
+.. class:: PWM(dest, *, freq, duty_u16, duty_ns, invert=False)
 
    Construct and return a new PWM object using the following parameters:
 
@@ -40,7 +40,7 @@ Constructors
    Setting *freq* may affect other PWM objects if the objects share the same
    underlying PWM generator (this is hardware specific).
    Only one of *duty_u16* and *duty_ns* should be specified at a time.
-   *invert* is not available at all ports.
+   *invert* is available only on the esp32, mimxrt, nrf, rp2, samd and zephyr ports.
 
 Methods
 -------
@@ -116,10 +116,10 @@ Limitations of PWM
   resolution of 8 bit, not 16-bit as may be expected.  In this case, the lowest
   8 bits of *duty_u16* are insignificant. So::
 
-    pwm=PWM(Pin(13), freq=300_000, duty_u16=2**16//2)
+    pwm=PWM(Pin(13), freq=300_000, duty_u16=65536//2)
 
   and::
 
-    pwm=PWM(Pin(13), freq=300_000, duty_u16=2**16//2 + 255)
+    pwm=PWM(Pin(13), freq=300_000, duty_u16=65536//2 + 255)
 
   will generate PWM with the same 50% duty cycle.
diff --git a/docs/library/machine.Pin.rst b/docs/library/machine.Pin.rst
index 68070133b8fb6..4aac0f4b94be2 100644
--- a/docs/library/machine.Pin.rst
+++ b/docs/library/machine.Pin.rst
@@ -209,13 +209,13 @@ The following methods are not part of the core Pin API and only implemented on c
 
    Set pin to "0" output level.
 
-   Availability: nrf, rp2, stm32 ports.
+   Availability: mimxrt, nrf, renesas-ra, rp2, samd, stm32 ports.
 
 .. method:: Pin.high()
 
    Set pin to "1" output level.
 
-   Availability: nrf, rp2, stm32 ports.
+   Availability: mimxrt, nrf, renesas-ra, rp2, samd, stm32 ports.
 
 .. method:: Pin.mode([mode])
 
@@ -242,7 +242,7 @@ The following methods are not part of the core Pin API and only implemented on c
 
    Toggle output pin from "0" to "1" or vice-versa.
 
-   Availability: mimxrt, samd, rp2 ports.
+   Availability: cc3200, esp32, esp8266, mimxrt, rp2, samd ports.
 
 Constants
 ---------
diff --git a/docs/library/machine.SDCard.rst b/docs/library/machine.SDCard.rst
index e4bb25dfc0377..c4a0d5d172b30 100644
--- a/docs/library/machine.SDCard.rst
+++ b/docs/library/machine.SDCard.rst
@@ -23,7 +23,8 @@ arguments that might need to be set in order to use either a non-standard slot
 or a non-standard pin assignment. The exact subset of arguments supported will
 vary from platform to platform.
 
-.. class:: SDCard(slot=1, width=1, cd=None, wp=None, sck=None, miso=None, mosi=None, cs=None, freq=20000000)
+.. class:: SDCard(slot=1, width=1, cd=None, wp=None, sck=None, miso=None, mosi=None,
+                  cs=None, cmd=None, data=None, freq=20000000)
 
     This class provides access to SD or MMC storage cards using either
     a dedicated SD/MMC interface hardware or through an SPI channel.
@@ -37,7 +38,8 @@ vary from platform to platform.
      - *slot* selects which of the available interfaces to use. Leaving this
        unset will select the default interface.
 
-     - *width* selects the bus width for the SD/MMC interface.
+     - *width* selects the bus width for the SD/MMC interface. This many data
+       pins must be connected to the SD card.
 
      - *cd* can be used to specify a card-detect pin.
 
@@ -51,7 +53,14 @@ vary from platform to platform.
 
      - *cs* can be used to specify an SPI chip select pin.
 
-     - *freq* selects the SD/MMC interface frequency in Hz (only supported on the ESP32).
+    The following additional parameters are only present on ESP32 port:
+
+     - *cmd* can be used to specify the SD CMD pin (ESP32-S3 only).
+
+     - *data* can be used to specify a list or tuple of SD data bus pins
+       (ESP32-S3 only).
+
+     - *freq* selects the SD/MMC interface frequency in Hz.
 
 Implementation-specific details
 -------------------------------
@@ -67,52 +76,130 @@ The standard PyBoard has just one slot. No arguments are necessary or supported.
 ESP32
 `````
 
-The ESP32 provides two channels of SD/MMC hardware and also supports
-access to SD Cards through either of the two SPI ports that are
-generally available to the user. As a result the *slot* argument can
-take a value between 0 and 3, inclusive. Slots 0 and 1 use the
-built-in SD/MMC hardware while slots 2 and 3 use the SPI ports. Slot 0
-supports 1, 4 or 8-bit wide access while slot 1 supports 1 or 4-bit
-access; the SPI slots only support 1-bit access.
-
-  .. note:: Slot 0 is used to communicate with on-board flash memory
-            on most ESP32 modules and so will be unavailable to the
-            user.
-
-  .. note:: Most ESP32 modules that provide an SD card slot using the
-            dedicated hardware only wire up 1 data pin, so the default
-            value for *width* is 1.
-
-The pins used by the dedicated SD/MMC hardware are fixed. The pins
-used by the SPI hardware can be reassigned.
-
-  .. note:: If any of the SPI signals are remapped then all of the SPI
-            signals will pass through a GPIO multiplexer unit which
-            can limit the performance of high frequency signals. Since
-            the normal operating speed for SD cards is 40MHz this can
-            cause problems on some cards.
-
-The default (and preferred) pin assignment are as follows:
-
-    ====== ====== ====== ====== ======
-    Slot   0      1      2      3
-    ------ ------ ------ ------ ------
-    Signal   Pin    Pin    Pin    Pin
-    ====== ====== ====== ====== ======
-    sck       6     14     18     14
-    cmd      11     15
-    cs                      5     15
-    miso                   19     12
-    mosi                   23     13
-    D0        7      2
-    D1        8      4
-    D2        9     12
-    D3       10     13
-    D4       16
-    D5       17
-    D6        5
-    D7       18
-    ====== ====== ====== ====== ======
+SD cards support access in both SD/MMC mode and the simpler (but slower) SPI
+mode.
+
+SPI mode makes use of a `SPI` host peripheral, which cannot concurrently be used
+for other SPI interactions.
+
+The ``slot`` argument determines which mode is used. Different values are
+supported on different chips:
+
+========== ======== ======== ============ ============
+Chip       Slot 0   Slot 1   Slot 2       Slot 3
+========== ======== ======== ============ ============
+ESP32               SD/MMC   SPI (id=1)   SPI (id=0)
+ESP32-C3                     SPI (id=0)
+ESP32-C6                     SPI (id=0)
+ESP32-S2                     SPI (id=1)   SPI (id=0)
+ESP32-S3   SD/MMC   SD/MMC   SPI (id=1)   SPI (id=0)
+========== ======== ======== ============ ============
+
+Different slots support different data bus widths (number of data pins):
+
+========== ========== =====================
+Slot       Type       Supported data widths
+========== ========== =====================
+0          SD/MMC     1, 4, 8
+1          SD/MMC     1, 4
+2          SPI        1
+3          SPI        1
+========== ========== =====================
+
+.. note:: Most ESP32 modules that provide an SD card slot using the
+          dedicated hardware only wire up 1 data pin, so the default
+          value for ``width`` is 1.
+
+Additional details depend on which ESP32 family chip is in use:
+
+Original ESP32
+~~~~~~~~~~~~~~
+
+In SD/MMC mode (slot 1), pin assignments in SD/MMC mode are fixed on the
+original ESP32. The SPI mode slots (2 & 3) allow pins to be set to different
+values in the constructor.
+
+The default pin assignments are as follows:
+
+    ====== ====== ====== ====== ============
+    Slot   1      2      3      Can be set
+    ------ ------ ------ ------ ------------
+    Signal   Pin    Pin    Pin
+    ====== ====== ====== ====== ============
+    CLK      14                 No
+    CMD      15                 No
+    D0        2                 No
+    D1        4                 No
+    D2       12                 No
+    D3       13                 No
+    sck             18     14   Yes
+    cs               5     15   Yes
+    miso            19     12   Yes
+    mosi            23     13   Yes
+    ====== ====== ====== ====== ============
+
+The ``cd`` and ``wp`` pins are not fixed in either mode and default to disabled, unless set.
+
+ESP32-S3
+~~~~~~~~
+
+The ESP32-S3 chip allows pins to be set to different values for both SD/MMC and
+SPI mode access.
+
+If not set, default pin assignments are as follows:
+
+    ======== ====== ====== ====== ======
+    Slot     0      1      2      3
+    -------- ------ ------ ------ ------
+    Signal     Pin    Pin    Pin    Pin
+    ======== ====== ====== ====== ======
+    CLK      14     14
+    CMD      15     15
+    D0        2      2
+    D1        4      4
+    D2       12     12
+    D3       13     13
+    D4       33*
+    D5       34*
+    D6       35*
+    D7       36*
+    sck                    37*     14
+    cs                     34*     13
+    miso                   37*      2
+    mosi                   35*     15
+    ======== ====== ====== ====== ======
+
+.. note:: Slots 0 and 1 cannot both be in use at the same time.
+
+.. note:: Pins marked with an asterisk * in the table must be changed from the
+          default if the ESP32-S3 board is configured for Octal SPI Flash or
+          PSRAM.
+
+To access a card in SD/MMC mode, set ``slot`` parameter value 0 or 1 and
+parameters ``sck`` (for CLK), ``cmd`` and ``data`` as needed to assign pins. If
+the ``data`` argument is passed then it should be a list or tuple of data pins
+or pin numbers with length equal to the ``width`` argument. For example::
+
+    sd = SDCard(slot=0, width=4, sck=8, cmd=9, data=(10, 11, 12, 13))
+
+To access a card in SPI mode, set ``slot`` parameter value 2 or 3 and pass
+parameters ``sck``, ``cs``, ``miso``, ``mosi`` as needed to assign pins.
+
+In either mode the ``cd`` and ``wp`` pins default to disabled, unless set in the
+constructor.
+
+Other ESP32 chips
+~~~~~~~~~~~~~~~~~
+
+Other ESP32 family chips do not have hardware SD/MMC host controllers and can
+only access SD cards in SPI mode.
+
+To access a card in SPI mode, set ``slot`` parameter value 2 or 3 and pass
+parameters ``sck``, ``cs``, ``miso``, ``mosi`` to assign pins.
+
+.. note:: ESP32-C3 and ESP32-C6 only have one available `SPI` bus, so the only
+          valid ``slot`` parameter value is 2. Using this bus for the SD card
+          will prevent also using it for :class:`machine.SPI`.
 
 cc3200
 ``````
diff --git a/docs/library/machine.UART.rst b/docs/library/machine.UART.rst
index 4dcb4a1e7c4a6..fbad3fc5922a9 100644
--- a/docs/library/machine.UART.rst
+++ b/docs/library/machine.UART.rst
@@ -83,7 +83,7 @@ Methods
 
      - *pins* is a 4 or 2 item list indicating the TX, RX, RTS and CTS pins (in that order).
        Any of the pins can be None if one wants the UART to operate with limited functionality.
-       If the RTS pin is given the the RX pin must be given as well. The same applies to CTS.
+       If the RTS pin is given the RX pin must be given as well. The same applies to CTS.
        When no pins are given, then the default set of TX and RX pins is taken, and hardware
        flow control will be disabled. If *pins* is ``None``, no pin assignment will be made.
 
@@ -224,7 +224,8 @@ Methods
 
 
    .. note::
-     - The ESP32 port does not support the option hard=True.
+     - The ESP32 port does not support the option hard=True. It uses Timer(0)
+       for UART.IRQ_RXIDLE, so this timer cannot be used for other means.
 
      - The rp2 port's UART.IRQ_TXIDLE is only triggered when the message
        is longer than 5 characters and the trigger happens when still 5 characters
diff --git a/docs/library/network.WLAN.rst b/docs/library/network.WLAN.rst
index 09fefc5929f07..ee0ef490fda84 100644
--- a/docs/library/network.WLAN.rst
+++ b/docs/library/network.WLAN.rst
@@ -85,7 +85,18 @@ Methods
         * ``STAT_GOT_IP`` -- connection successful.
 
     When called with one argument *param* should be a string naming the status
-    parameter to retrieve.  Supported parameters in WiFI STA mode are: ``'rssi'``.
+    parameter to retrieve, and different parameters are supported depending on the
+    mode the WiFi is in.
+
+    In STA mode, passing ``'rssi'`` returns a signal strength indicator value, whose
+    format varies depending on the port (this is available on all ports that support
+    WiFi network interfaces, except for CC3200).
+
+    In AP mode, passing ``'stations'`` returns a list of connected WiFi stations
+    (this is available on all ports that support WiFi network interfaces, except for
+    CC3200).  The format of the station information entries varies across ports,
+    providing either the raw BSSID of the connected station, the IP address of the
+    connected station, or both.
 
 .. method:: WLAN.isconnected()
 
diff --git a/docs/library/socket.rst b/docs/library/socket.rst
index 944e7e631ac76..38e0aab704ad6 100644
--- a/docs/library/socket.rst
+++ b/docs/library/socket.rst
@@ -227,22 +227,28 @@ Methods
    has the same "no short writes" policy for blocking sockets, and will return
    number of bytes sent on non-blocking sockets.
 
-.. method:: socket.recv(bufsize)
+.. method:: socket.recv(bufsize, [flags])
 
    Receive data from the socket. The return value is a bytes object representing the data
    received. The maximum amount of data to be received at once is specified by bufsize.
 
+   Most ports support the optional *flags* argument. Available *flags* are defined as constants
+   in the socket module and have the same meaning as in CPython. ``MSG_PEEK`` and ``MSG_DONTWAIT``
+   are supported on all ports which accept the *flags* argument.
+
 .. method:: socket.sendto(bytes, address)
 
    Send data to the socket. The socket should not be connected to a remote socket, since the
    destination socket is specified by *address*.
 
-.. method:: socket.recvfrom(bufsize)
+.. method:: socket.recvfrom(bufsize, [flags])
 
   Receive data from the socket. The return value is a pair *(bytes, address)* where *bytes* is a
   bytes object representing the data received and *address* is the address of the socket sending
   the data.
 
+  See the `recv` function for an explanation of the optional *flags* argument.
+
 .. method:: socket.setsockopt(level, optname, value)
 
    Set the value of the given socket option. The needed symbolic constants are defined in the
diff --git a/docs/library/sys.rst b/docs/library/sys.rst
index c72214c13108e..baefd927051d2 100644
--- a/docs/library/sys.rst
+++ b/docs/library/sys.rst
@@ -75,6 +75,8 @@ Constants
    * *version* - tuple (major, minor, micro, releaselevel), e.g. (1, 22, 0, '')
    * *_machine* - string describing the underlying machine
    * *_mpy* - supported mpy file-format version (optional attribute)
+   * *_build* - string that can help identify the configuration that
+     MicroPython was built with
 
    This object is the recommended way to distinguish MicroPython from other
    Python implementations (note that it still may not exist in the very
@@ -83,6 +85,16 @@ Constants
    Starting with version 1.22.0-preview, the fourth node *releaselevel* in
    *implementation.version* is either an empty string or ``"preview"``.
 
+   The *_build* entry was added in version 1.25.0 and is a hyphen-separated
+   set of elements.  New elements may be appended in the future so it's best to
+   access this field using ``sys.implementation._build.split("-")``.  The
+   elements that are currently used are:
+
+   * On the unix, webassembly and windows ports the first element is the variant
+     name, for example ``'standard'``.
+   * On microcontroller targets, the first element is the board name and the second
+     element (if present) is the board variant, for example ``'RPI_PICO2-RISCV'``
+
    .. admonition:: Difference to CPython
       :class: attention
 
diff --git a/docs/library/time.rst b/docs/library/time.rst
index 8c1c1d4d6fb23..b53bb133ec408 100644
--- a/docs/library/time.rst
+++ b/docs/library/time.rst
@@ -9,9 +9,10 @@
 The ``time`` module provides functions for getting the current time and date,
 measuring time intervals, and for delays.
 
-**Time Epoch**: Unix port uses standard for POSIX systems epoch of
-1970-01-01 00:00:00 UTC. However, some embedded ports use epoch of
-2000-01-01 00:00:00 UTC. Epoch year may be determined with ``gmtime(0)[0]``.
+**Time Epoch**: The unix, windows, webassembly, alif, mimxrt and rp2 ports
+use the standard for POSIX systems epoch of 1970-01-01 00:00:00 UTC.
+The other embedded ports use an epoch of 2000-01-01 00:00:00 UTC.
+Epoch year may be determined with ``gmtime(0)[0]``.
 
 **Maintaining actual calendar date/time**: This requires a
 Real Time Clock (RTC). On systems with underlying OS (including some
@@ -57,11 +58,11 @@ Functions
    * weekday is 0-6 for Mon-Sun
    * yearday is 1-366
 
-.. function:: mktime()
+.. function:: mktime(date_time_tuple)
 
    This is inverse function of localtime. It's argument is a full 8-tuple
    which expresses a time as per localtime. It returns an integer which is
-   the number of seconds since Jan 1, 2000.
+   the number of seconds since the time epoch.
 
 .. function:: sleep(seconds)
 
diff --git a/docs/library/vfs.rst b/docs/library/vfs.rst
index fcd06eb4353b1..1fa1e3060cb5b 100644
--- a/docs/library/vfs.rst
+++ b/docs/library/vfs.rst
@@ -34,6 +34,14 @@ represented by VFS classes.
 
     Will raise ``OSError(EPERM)`` if *mount_point* is already mounted.
 
+.. function:: mount()
+    :noindex:
+
+    With no arguments to :func:`mount`, return a list of tuples representing
+    all active mountpoints.
+    
+    The returned list has the form *[(fsobj, mount_point), ...]*.
+
 .. function:: umount(mount_point)
 
     Unmount a filesystem. *mount_point* can be a string naming the mount location,
diff --git a/docs/library/wm8960.rst b/docs/library/wm8960.rst
index 5abfb6a8a011c..4115d20758100 100644
--- a/docs/library/wm8960.rst
+++ b/docs/library/wm8960.rst
@@ -358,13 +358,13 @@ Run WM8960 on a MIMXRT10xx_DEV board in secondary mode (default)::
         sysclk_source=wm8960.SYSCLK_MCLK)
 
 
-Record with a Sparkfun WM8960 breakout board with Teensy in secondary mode (default)::
+Record with a SparkFun WM8960 breakout board with Teensy in secondary mode (default)::
 
     # Micro_python WM8960 Codec driver
     #
     # The breakout board uses a fixed 24MHz MCLK. Therefore the internal
     # PLL must be used as sysclk, which is the master audio clock.
-    # The Sparkfun board has the WS pins for RX and TX connected on the
+    # The SparkFun board has the WS pins for RX and TX connected on the
     # board. Therefore adc_sync must be set to sync_adc, to configure
     # it's ADCLRC pin as input.
     #
@@ -379,11 +379,11 @@ Record with a Sparkfun WM8960 breakout board with Teensy in secondary mode (defa
         right_input=wm8960.INPUT_CLOSED)
 
 
-Play with a Sparkfun WM8960 breakout board with Teensy in secondary mode (default)::
+Play with a SparkFun WM8960 breakout board with Teensy in secondary mode (default)::
 
     # The breakout board uses a fixed 24MHz MCLK. Therefore the internal
     # PLL must be used as sysclk, which is the master audio clock.
-    # The Sparkfun board has the WS pins for RX and TX connected on the
+    # The SparkFun board has the WS pins for RX and TX connected on the
     # board. Therefore adc_sync must be set to sync_adc, to configure
     # it's ADCLRC pin as input.
 
diff --git a/docs/library/zephyr.rst b/docs/library/zephyr.rst
index 10676d9085289..1a106d50ea717 100644
--- a/docs/library/zephyr.rst
+++ b/docs/library/zephyr.rst
@@ -22,9 +22,10 @@ Functions
 
    Returns the thread id of the current thread, which is used to reference the thread.
 
-.. function:: thread_analyze()
+.. function:: thread_analyze(cpu)
 
-   Runs the Zephyr debug thread analyzer on the current thread and prints stack size statistics in the format:
+   Runs the Zephyr debug thread analyzer on the current thread on the given cpu
+   and prints stack size statistics in the format:
 
     "``thread_name``-20s: STACK: unused ``available_stack_space`` usage ``stack_space_used``
     / ``stack_size`` (``percent_stack_space_used`` %); CPU: ``cpu_utilization`` %"
@@ -35,6 +36,9 @@ Functions
    For more information, see documentation for Zephyr `thread analyzer
    <https://docs.zephyrproject.org/latest/guides/debug_tools/thread-analyzer.html#thread-analyzer>`_.
 
+   Note that the ``cpu`` argument is only used in Zephyr v4.0.0 and
+   newer and ignored otherwise.
+
 .. function:: shell_exec(cmd_in)
 
    Executes the given command on an UART backend. This function can only be accessed if ``CONFIG_SHELL_BACKEND_SERIAL``
diff --git a/docs/mimxrt/pinout.rst b/docs/mimxrt/pinout.rst
index 3ff892c64d688..9aeb85401be8d 100644
--- a/docs/mimxrt/pinout.rst
+++ b/docs/mimxrt/pinout.rst
@@ -30,26 +30,28 @@ MIMXRT1170-EVK     Debug USB      D0/D1       D12/D11      D10/D13
 Adafruit Metro M7     -           D0/D1        D7/D3        A1/A0
 Olimex RT1010Py       -          RxD/TxD       D7/D8        D5/D6
 Seeed ARCH MIX        -         J3_19/J3_20  J4_16/J4_17  J4_06/J4_07
+Makerdiary RT1011     -           D9/D10      D13/A0       D11/D12
 =================  ===========  ===========  ===========  ===========
 
 |
 
-================  ===========  ===========  =======  =======  =====
-Board / Pin           UART4        UART5      UART6   UART7   UART8
-================  ===========  ===========  =======  =======  =====
-Teensy 4.0            16/17        21/20     25/24    28/29      -
-Teensy 4.1            16/17        21/20     25/24    28/29    34/35
-MIMXRT1010-EVK         -            -         -        -        -
-MIMXRT1015-EVK         -            -         -        -        -
-MIMXRT1020-EVK      D15/D14       A1/A0       -        -        -
-MIMXRT1050-EVK       A1/A0          -         -        -        -
-MIMXRT1050-EVKB      A1/A0          -         -        -        -
-MIMXRT1060-EVK       A1/A0          -         -        -        -
-MIMXRT1064-EVK       A1/A0          -         -        -        -
-MIMXRT1170-EVK      D15/D14      D25/D26    D33/D34  D35/D36    -
-Olimex RT1010Py        -            -         -        -        -
-Seeed ARCH MIX    J4_10/J4_11  J5_08/J5_12    -        -        -
-================  ===========  ===========  =======  =======  =====
+=================  ===========  ===========  =======  =======  =====
+Board / Pin            UART4        UART5      UART6   UART7   UART8
+=================  ===========  ===========  =======  =======  =====
+Teensy 4.0             16/17        21/20     25/24    28/29      -
+Teensy 4.1             16/17        21/20     25/24    28/29   34/35
+MIMXRT1010-EVK          -            -         -        -        -
+MIMXRT1015-EVK          -            -         -        -        -
+MIMXRT1020-EVK       D15/D14       A1/A0       -        -        -
+MIMXRT1050-EVK        A1/A0          -         -        -        -
+MIMXRT1050-EVKB       A1/A0          -         -        -        -
+MIMXRT1060-EVK        A1/A0          -         -        -        -
+MIMXRT1064-EVK        A1/A0          -         -        -        -
+MIMXRT1170-EVK       D15/D14      D25/D26    D33/D34  D35/D36    -
+Olimex RT1010Py         -            -         -        -        -
+Seeed ARCH MIX     J4_10/J4_11  J5_08/J5_12    -        -        -
+Makerdiary RT1011     A1/A2          -         -        -        -
+=================  ===========  ===========  =======  =======  =====
 
 .. _mimxrt_pwm_pinout:
 
@@ -188,7 +190,6 @@ LED_BLUE   F1/3/B
 =========  ===============
 Pin        Olimex RT1010PY
 =========  ===============
-D0           -
 D1         F1/0/B
 D2         F1/0/A
 D3         F1/1/B
@@ -197,13 +198,10 @@ D5         F1/2/B
 D6         F1/2/A
 D7         F1/3/B
 D8         F1/3/A
-D9            -
 D10        F1/0/B
 D11        F1/0/A
 D12        F1/1/B
 D13        F1/1/A
-D14           -
-A0            -
 A1         F1/2/B
 A2         F1/2/A
 A3         F1/3/B
@@ -214,6 +212,32 @@ CS0        F1/1/X
 SCK        F1/0/X
 =========  ===============
 
+|
+
+=========  =================
+Pin        Makerdiary RT1011
+=========  =================
+D1         F1/0/B
+D2         F1/0/A
+D3         F1/1/B
+D4         F1/1/A
+D5         F1/2/B
+D6         F1/2/A
+D7         F1/3/B
+D8         F1/3/A
+A3         F1/2/B
+A4         F1/2/A
+A5         F1/3/B
+A6         F1/3/A
+A9         F1/3/X
+A10        F1/2/X
+A11        F1/1/X
+SD1        F1/0/B
+SD2        F1/0/A
+LED        F1/1/B
+DIO        F1/0/X
+=========  =================
+
 Legend:
 
 * Qm/n:    QTMR module m, channel n
@@ -322,6 +346,7 @@ MIXMXRT1170-EVK    D10/-/D11/D12/D13          D28/-/D25/D24/D26        -/-/D14/D
 Adafruit Metro M7  -/-/MOSI/MISO/SCK                -                        -
 Olimex RT1010Py             -                 CS0/-/SDO/SDI/SCK        SDCARD with CS1
 Seeed ARCH MIX     J4_12/-/J4_14/J4_13/J4_15  J3_09/J3_05/J3_08_J3_11
+Makerdiary RT1011  A5/A2/A4/A3/A6             A11/A1/A10/A9/CLK
 =================  =========================  =======================  ===============
 
 Pins denoted with (*) are by default not wired at the board. The CS0 and CS1 signals
@@ -355,6 +380,7 @@ MIXMXRT1170-EVK    D14/D15      D1/D0        A4/A5        D26/D25  D19/D18
 Adafruit Metro M7  D14/D15      D0/D1
 Olimex RT1010Py      -          SDA1/SCL1    SDA2/SCL2     -        -
 Seeed ARCH MIX     J3_17/J3_16  J4_06/J4_07  J5_05/J5_04   -        -
+Makerdiary RT1011  D1/D2        A7/A8
 =================  ===========  ===========  ===========  =======  =======
 
 .. _mimxrt_i2s_pinout:
@@ -379,6 +405,7 @@ Adafruit Metro M7  1   D8     D10      D9      D12     D14      D15     D13
 Olimex RT1010Py    1   D8     D6       D7      D4      D1       D2      D3
 Olimex RT1010Py    3   -      D10      D9      D11     -        -       -
 MIMXRT_DEV         1   "MCK"  "SCK_TX" "WS_TX" "SD_TX" "SCK_RX" "WS_RX" "SD_RX"
+Makerdiary RT1011  1   D8     SD1      D7      D4      D1       D2      D3
 =================  ==  =====  ======== ======= ======= ======== ======= =======
 
 Symbolic pin names are provided for the MIMXRT_10xx_DEV boards.
diff --git a/docs/mimxrt/quickref.rst b/docs/mimxrt/quickref.rst
index 49d7befc7452b..9f1efd4ffcad2 100644
--- a/docs/mimxrt/quickref.rst
+++ b/docs/mimxrt/quickref.rst
@@ -122,10 +122,13 @@ See :ref:`machine.UART <machine.UART>`. ::
     uart1 = UART(1, baudrate=115200)
     uart1.write('hello')  # write 5 bytes
     uart1.read(5)         # read up to 5 bytes
+    uart1 = UART(baudrate=19200) # open UART 1 at 19200 baud
 
 The i.MXRT has up to eight hardware UARTs, but not every board exposes all
 TX and RX pins for users. For the assignment of Pins to UART signals,
-refer to the :ref:`UART pinout <mimxrt_uart_pinout>`.
+refer to the :ref:`UART pinout <mimxrt_uart_pinout>`. If the UART ID is
+omitted, UART(1) is selected. Then, the keyword
+option for baudrate must be used to change it from the default value.
 
 PWM (pulse width modulation)
 ----------------------------
@@ -305,12 +308,15 @@ rates (up to 30Mhz).  Hardware SPI is accessed via the
     cs_pin(0)
     spi.write('Hello World')
     cs_pin(1)
+    spi = SPI(baudrate=4_000_000)  # Use SPI(0) at a baudrate of 4 MHz
 
 For the assignment of Pins to SPI signals, refer to
 :ref:`Hardware SPI pinout <mimxrt_spi_pinout>`.
 The keyword option cs=n can be used to enable the cs pin 0 or 1 for an automatic cs signal. The
 default is cs=-1. Using cs=-1 the automatic cs signal is not created.
 In that case, cs has to be set by the script. Clearing that assignment requires a power cycle.
+If the SPI ID is omitted, SPI(0) is selected. Then, the keyword
+option for baudrate must be used to change it from the default value.
 
 Notes:
 
@@ -355,6 +361,10 @@ has the same methods as software SPI above::
 
     i2c = I2C(0, 400_000)
     i2c.writeto(0x76, b"Hello World")
+    i2c = I2C(freq=100_000)  # use I2C(0) at 100kHz
+
+If the I2C ID is omitted, I2C(0) is selected. Then, the keyword
+option for freq must be used to change the freq from the default value.
 
 I2S bus
 -------
diff --git a/docs/reference/isr_rules.rst b/docs/reference/isr_rules.rst
index 14010fb207fdd..5e8d6ad61201a 100644
--- a/docs/reference/isr_rules.rst
+++ b/docs/reference/isr_rules.rst
@@ -209,7 +209,7 @@ issue a further interrupt. It then schedules a callback to process the data.
 
 Scheduled callbacks should comply with the principles of interrupt handler design outlined below. This is to
 avoid problems resulting from I/O activity and the modification of shared data which can arise in any code
-which pre-empts the main program loop.
+which preempts the main program loop.
 
 Execution time needs to be considered in relation to the frequency with which interrupts can occur. If an
 interrupt occurs while the previous callback is executing, a further instance of the callback will be queued
diff --git a/docs/reference/mpremote.rst b/docs/reference/mpremote.rst
index d4c6983595fec..bee008c637319 100644
--- a/docs/reference/mpremote.rst
+++ b/docs/reference/mpremote.rst
@@ -78,6 +78,7 @@ The full list of supported commands are:
 - `mip <mpremote_command_mip>`
 - `mount <mpremote_command_mount>`
 - `unmount <mpremote_command_unmount>`
+- `romfs <mpremote_command_romfs>`
 - `rtc <mpremote_command_rtc>`
 - `sleep <mpremote_command_sleep>`
 - `reset <mpremote_command_reset>`
@@ -228,24 +229,52 @@ The full list of supported commands are:
   - ``ls`` to list the current directory
   - ``ls <dirs...>`` to list the given directories
   - ``cp [-rf] <src...> <dest>`` to copy files
-  - ``rm <src...>`` to remove files on the device
+  - ``rm [-r] <src...>`` to remove files or folders on the device
   - ``mkdir <dirs...>`` to create directories on the device
   - ``rmdir <dirs...>`` to remove directories on the device
   - ``touch <file..>`` to create the files (if they don't already exist)
   - ``sha256sum <file..>`` to calculate the SHA256 sum of files
+  - ``tree [-vsh] <dirs...>`` to print a tree of the given directories
 
   The ``cp`` command uses a convention where a leading ``:`` represents a remote
   path. Without a leading ``:`` means a local path. This is based on the
   convention used by the `Secure Copy Protocol (scp) client
-  <https://en.wikipedia.org/wiki/Secure_copy_protocol>`_. All other commands
-  implicitly assume the path is a remote path, but the ``:`` can be optionally
-  used for clarity.
+  <https://en.wikipedia.org/wiki/Secure_copy_protocol>`_.
 
   So for example, ``mpremote fs cp main.py :main.py`` copies ``main.py`` from
   the current local directory to the remote filesystem, whereas
   ``mpremote fs cp :main.py main.py`` copies ``main.py`` from the device back
   to the current directory.
 
+  The ``mpremote rm -r`` command accepts both relative and absolute paths.
+  Use ``:`` to refer to the current remote working directory (cwd) to allow a
+  directory tree to be removed from the device's default path (eg ``/flash``, ``/``).
+  Use ``-v/--verbose`` to see the files being removed.
+
+  For example:
+
+  - ``mpremote rm -r :libs`` will remove the ``libs`` directory and all its
+    child items from the device.
+  - ``mpremote rm -rv :/sd`` will remove all files from a mounted SDCard and result
+    in a non-blocking warning. The mount will be retained.
+  - ``mpremote rm -rv :/`` will remove all files on the device, including any
+    located in mounted vfs such as ``/sd`` or ``/flash``. After removing all folders
+    and files, this will  also return an error to mimic unix ``rm -rf /`` behaviour.
+
+  .. warning::
+    There is no supported way to undelete files removed by ``mpremote rm -r :``.
+    Please use with caution.
+
+  The ``tree`` command will print a tree of the given directories.
+  Using the ``--size/-s`` option will print the size of each file, or use
+  ``--human/-h`` to use a more human readable format.
+  Note: Directory size is only printed when a non-zero size is reported by the device's filesystem.
+  The ``-v`` option  can be used to include the name of the serial device in
+  the output.
+
+  All other commands implicitly assume the path is a remote path, but the ``:``
+  can be optionally used for clarity.
+
   All of the filesystem sub-commands take multiple path arguments, so if there
   is another command in the sequence, you must use ``+`` to terminate the
   arguments, e.g.
@@ -347,6 +376,29 @@ The full list of supported commands are:
   This happens automatically when ``mpremote`` terminates, but it can be used
   in a sequence to unmount an earlier mount before subsequent command are run.
 
+.. _mpremote_command_romfs:
+
+- **romfs** -- manage ROMFS partitions on the device:
+
+  .. code-block:: bash
+
+      $ mpremote romfs <sub-command>
+
+  ``<sub-command>`` may be:
+
+  - ``romfs query`` to list all the available ROMFS partitions and their size
+  - ``romfs [-o <output>] build <source>`` to create a ROMFS image from the given
+    source directory; the default output file is the source appended by ``.romfs``
+  - ``romfs [-p <partition>] deploy <source>`` to deploy a ROMFS image to the device;
+    will also create a temporary ROMFS image if the source is a directory
+
+  The ``build`` and ``deploy`` sub-commands both support the ``-m``/``--mpy`` option
+  to automatically compile ``.py`` files to ``.mpy`` when creating the ROMFS image.
+  This option is enabled by default, but only works if the ``mpy_cross`` Python
+  package has been installed (eg via ``pip install mpy_cross``).  If the package is
+  not installed then a warning is printed and ``.py`` files remain as is.  Compiling
+  of ``.py`` files can be disabled with the ``--no-mpy`` option.
+
 .. _mpremote_command_rtc:
 
 - **rtc** -- set/get the device clock (RTC):
diff --git a/docs/reference/packages.rst b/docs/reference/packages.rst
index 86b8efaa1953d..5b5f626d45232 100644
--- a/docs/reference/packages.rst
+++ b/docs/reference/packages.rst
@@ -96,6 +96,18 @@ The ``--target=path``, ``--no-mpy``, and ``--index`` arguments can be set::
     $ mpremote mip install --no-mpy pkgname
     $ mpremote mip install --index https://host/pi pkgname
 
+:term:`mpremote` can also install packages from files stored on the host's local
+filesystem::
+
+    $ mpremote mip install path/to/pkg.py
+    $ mpremote mip install path/to/app/package.json
+    $ mpremote mip install \\path\\to\\pkg.py
+
+This is especially useful for testing packages during development and for
+installing packages from local clones of GitHub repositories. Note that URLs in
+``package.json`` files must use forward slashes ("/") as directory separators,
+even on Windows, so that they are compatible with installing from the web.
+
 Installing packages manually
 ----------------------------
 
@@ -116,12 +128,25 @@ To write a "self-hosted" package that can be downloaded by ``mip`` or
 ``mpremote``, you need a static webserver (or GitHub) to host either a
 single .py file, or a ``package.json`` file alongside your .py files.
 
-A typical ``package.json`` for an example ``mlx90640`` library looks like::
+An example ``mlx90640`` library hosted on GitHub could be installed with::
+
+    $ mpremote mip install github:org/micropython-mlx90640
+
+The layout for the package on GitHub might look like::
+
+    https://github.com/org/micropython-mlx90640/
+        package.json
+        mlx90640/
+            __init__.py
+            utils.py
+
+The ``package.json`` specifies the location of files to be installed and other
+dependencies::
 
     {
       "urls": [
-        ["mlx90640/__init__.py", "github:org/micropython-mlx90640/mlx90640/__init__.py"],
-        ["mlx90640/utils.py", "github:org/micropython-mlx90640/mlx90640/utils.py"]
+        ["mlx90640/__init__.py", "mlx90640/__init__.py"],
+        ["mlx90640/utils.py", "mlx90640/utils.py"]
       ],
       "deps": [
         ["collections-defaultdict", "latest"],
@@ -132,9 +157,20 @@ A typical ``package.json`` for an example ``mlx90640`` library looks like::
       "version": "0.2"
     }
 
-This includes two files, hosted at a GitHub repo named
-``org/micropython-mlx90640``, which install into the ``mlx90640`` directory on
-the device. It depends on ``collections-defaultdict`` and ``os-path`` which will
+The ``urls`` list specifies the files to be installed according to::
+
+    "urls": [
+        [destination_path, source_url]
+        ...
+
+where ``destination_path`` is the location and name of the file to be installed
+on the device and ``source_url`` is the URL of the file to be installed. The
+source URL would usually be specified relative to the directory containing the
+``package.json`` file, but can also be an absolute URL, eg::
+
+    ["mlx90640/utils.py", "github:org/micropython-mlx90640/mlx90640/utils.py"]
+
+The package depends on ``collections-defaultdict`` and ``os-path`` which will
 be installed automatically from the :term:`micropython-lib`. The third
 dependency installs the content as defined by the ``package.json`` file of the
 ``main`` branch of the GitHub repo ``org/micropython-additions``.
diff --git a/docs/reference/repl.rst b/docs/reference/repl.rst
index be02ddebde8e2..2c019350f7e2a 100644
--- a/docs/reference/repl.rst
+++ b/docs/reference/repl.rst
@@ -213,7 +213,7 @@ echo turned off, and with optional flow control.
 Raw mode is entered using Ctrl-A. You then send your python code, followed by
 a Ctrl-D. The Ctrl-D will be acknowledged by 'OK' and then the python code will
 be compiled and executed. Any output (or errors) will be sent back. Entering
-Ctrl-B will leave raw mode and return the the regular (aka friendly) REPL.
+Ctrl-B will leave raw mode and return the regular (aka friendly) REPL.
 
 Raw-paste mode is an additional mode within the raw REPL that includes flow control,
 and which compiles code as it receives it. This makes it more robust for high-speed
diff --git a/docs/reference/speed_python.rst b/docs/reference/speed_python.rst
index a660432f6da37..64fd9df6c058a 100644
--- a/docs/reference/speed_python.rst
+++ b/docs/reference/speed_python.rst
@@ -219,7 +219,7 @@ process known as garbage collection reclaims the memory used by these redundant
 objects and the allocation is then tried again - a process which can take several
 milliseconds.
 
-There may be benefits in pre-empting this by periodically issuing `gc.collect()`.
+There may be benefits in preempting this by periodically issuing `gc.collect()`.
 Firstly doing a collection before it is actually required is quicker - typically on the
 order of 1ms if done frequently. Secondly you can determine the point in code
 where this time is used rather than have a longer delay occur at random points,
diff --git a/docs/rp2/quickref.rst b/docs/rp2/quickref.rst
index 6be3180500746..23071d77215d5 100644
--- a/docs/rp2/quickref.rst
+++ b/docs/rp2/quickref.rst
@@ -55,6 +55,57 @@ The :mod:`rp2` module::
 
     import rp2
 
+Networking
+----------
+
+WLAN
+^^^^
+
+.. note::
+   This section applies only to devices that include WiFi support, such as the `Pico W`_ and `Pico 2 W`_.
+
+The :class:`network.WLAN` class in the :mod:`network` module::
+
+    import network
+
+    wlan = network.WLAN()       # create station interface (the default, see below for an access point interface)
+    wlan.active(True)           # activate the interface
+    wlan.scan()                 # scan for access points
+    wlan.isconnected()          # check if the station is connected to an AP
+    wlan.connect('ssid', 'key') # connect to an AP
+    wlan.config('mac')          # get the interface's MAC address
+    wlan.ipconfig('addr4')      # get the interface's IPv4 addresses
+
+    ap = network.WLAN(network.WLAN.IF_AP) # create access-point interface
+    ap.config(ssid='RP2-AP')              # set the SSID of the access point
+    ap.config(max_clients=10)             # set how many clients can connect to the network
+    ap.active(True)                       # activate the interface
+
+A useful function for connecting to your local WiFi network is::
+
+    def do_connect():
+        import machine, network
+        wlan = network.WLAN()
+        wlan.active(True)
+        if not wlan.isconnected():
+            print('connecting to network...')
+            wlan.connect('ssid', 'key')
+            while not wlan.isconnected():
+                machine.idle()
+        print('network config:', wlan.ipconfig('addr4'))
+
+Once the network is established the :mod:`socket <socket>` module can be used
+to create and use TCP/UDP sockets as usual, and the ``requests`` module for
+convenient HTTP requests.
+
+After a call to ``wlan.connect()``, the device will by default retry to connect
+**forever**, even when the authentication failed or no AP is in range.
+``wlan.status()`` will return ``network.STAT_CONNECTING`` in this state until a
+connection succeeds or the interface gets disabled.
+
+.. _Pico W: https://www.raspberrypi.com/documentation/microcontrollers/pico-series.html#picow-technical-specification
+.. _Pico 2 W: https://www.raspberrypi.com/documentation/microcontrollers/pico-series.html#pico2w-technical-specification
+
 Delay and timing
 ----------------
 
diff --git a/docs/samd/pinout.rst b/docs/samd/pinout.rst
index 776ab74bcdb22..5731a8fa7698e 100644
--- a/docs/samd/pinout.rst
+++ b/docs/samd/pinout.rst
@@ -41,9 +41,11 @@ Pin GPIO Pin name     IRQ  ADC  Serial Serial TCC/TC TCC/TC
  35 PB03   FLASH_MISO   3  11     -      5/1   6/1     -
  54 PB22   FLASH_MOSI   6   -     -      5/2   7/0     -
  55 PB23    FLASH_SCK   7   -     -      5/3   7/1     -
+ 11 PA11           RX  11  19    0/3     2/3   1/1    0/3
+ 10 PA10           TX  10  18    0/2     2/2   1/0    0/2
  12 PA12         MISO  12   -    2/0     4/0   2/0    0/6
- 42 PB10         MOSI  10   -     -      4/2   5/0    0/4
- 43 PB11          SCK  11   -     -      4/3   5/1    0/5
+ 42 PA12         MOSI  10   -     -      4/2   5/0    0/4
+ 43 PA13          SCK  11   -     -      4/3   5/1    0/5
  23 PA23          SCL   7   -    3/1     5/1   4/1    0/5
  22 PA22          SDA   6   -    3/0     5/0   4/0    0/4
  30 PA30        SWCLK  10   -     -      1/2   1/0     -
@@ -127,7 +129,7 @@ Examples for Adafruit ItsyBitsy M0 Express:
 - SPI 1 at pins D11/D12/D13
 - SPI 2 at pins D0/D4/D1
 - SPI 3 at pins D11/D12/D13
-- SPI 4 at Pin MOSI/MISO/SCK This is the default SPI device at the MOSI/MISO/SCK labelled pins.
+- SPI 2 at Pin MOSI/MISO/SCK This is the default SPI device at the MOSI/MISO/SCK labelled pins.
 
 or other combinations.
 
@@ -169,6 +171,8 @@ Pin GPIO Pin name     IRQ  ADC  ADC  Serial Serial  TC    PWM   PWM
  22 PA22          D13   6    -    -    3/0    5/1   4/0   1/6   0/2
  34 PB02  DOTSTAR_CLK   2   14    -     -     5/0   6/0   2/2    -
  35 PB03 DOTSTAR_DATA   9   15    -     -     5/1   6/1    -     -
+ 16 PA16           RX   0    -    -    1/0    3/1   2/0   1/0   0/4
+ 17 PA17           TX   1    -    -    1/1    3/0   2/1   1/1   0/5
  55 PB23         MISO   7    -    -    1/3    5/3   7/1    -     -
   0 PA00         MOSI   0    -    -     -     1/0   2/0    -     -
  43 PB11      QSPI_CS  12    -    -     -     4/3   5/1   0/5   1/1
@@ -235,7 +239,7 @@ The I2C devices and signals must be chosen according to the following rules:
 - The SDA signal must be at a Pin with pad numbers 0.
 - The SCL signal must be at a Pin with pad numbers 1.
 
-Examples for Adafruit ItsyBitsy M0 Express:
+Examples for Adafruit ItsyBitsy M4 Express:
 
 - I2C 0 at pins A3/A4
 - I2C 1 at pins D0/D1
@@ -253,7 +257,7 @@ The SPI devices and signals must be chosen according to the following rules:
 - The following pad number pairs are suitable for MOSI/SCK: 0/1 and 3/1.
 - The MISO signal must be at a Pin with a different pad number than MOSI or SCK.
 
-Examples for Adafruit ItsyBitsy M0 Express:
+Examples for Adafruit ItsyBitsy M4 Express:
 
 - SPI 1 at Pin MOSI/MISO/SCK  This is the default SPI device at the MOSI/MISO/SCK labelled pins.
 - SPI 3 at pins D13/D11/D12
@@ -296,6 +300,8 @@ Pin GPIO Pin name     IRQ  ADC  ADC  Serial Serial  TC    PWM   PWM
  21 PA21          D11   5    -    -    5/3    3/3   7/1   1/5    0/1
  22 PA22          D12   6    -    -    3/0    5/1   4/0   1/6    0/2
  23 PA23          D13   7    -    -    3/1    5/0   4/1   1/7    0/3
+ 49 PB17           RX   1    -    -    5/1     -    6/1   3/1    0/5
+ 48 PB16           TX   0    -    -    5/0     -    6/0   3/0    0/4
  54 PB22         MISO  22    -    -    1/2    5/2   7/0    -      -
  55 PB23         MOSI   7    -    -    1/3    5/3   7/1    -      -
  35 PB03     NEOPIXEL   9   15    -     -     5/1   6/1    -      -
@@ -381,6 +387,8 @@ Pin GPIO Pin name     IRQ  ADC  ADC  Serial Serial  TC    PWM   PWM
   8 PA08   FLASH_MOSI  -     8    2    0/0    2/1   0/0   0/0   1/4
  42 PB10    FLASH_SCK 10     -    -     -     4/2   5/0   0/4   1/0
  10 PA10     FLASH_WP 10    10    -    0/2    2/2   1/0   0/2   1/6
+ 23 PA23           RX  7     -    -    3/1    5/0   4/1   1/7   0/3
+ 22 PA22           TX  6     -    -    3/0    5/1   4/0   1/6   0/2
  14 PA14         MISO 14     -    -    2/2    4/2   3/0   2/0   1/2
  12 PA12         MOSI 12     -    -    2/0    4/1   2/0   0/6   1/2
  54 PB22     NEOPIXEL 22     -    -    1/2    5/2   7/0    -     -
@@ -429,6 +437,13 @@ Pin GPIO Pin name     IRQ  ADC  Serial Serial TCC/TC TCC/TC
   5 PA05        A9_D9   5    5     -     0/1   0/1     -
   6 PA06      A10_D10   6    6     -     0/2   1/0     -
  18 PA18       RX_LED   2    -    1/2    3/2   3/0    0/2
+ 41 PB09           RX   9    3     -     4/1   4/1     -
+ 40 PB08           TX   8    2     -     4/0   4/0     -
+  8 PA08          SDA   -   16    0/0    2/0   0/0    1/2
+  9 PA09          SCL   9   17    0/1    2/1   0/1    1/3
+  6 PA06         MOSI   6    6     -     0/2   1/0     -
+  5 PA05         MISO   5    5     -     0/1   0/1     -
+  7 PA07          SCK   7    7     -     0/3   1/1     -
  30 PA30        SWCLK  10    -     -     1/2   1/0     -
  31 PA31        SWDIO  11    -     -     1/3   1/1     -
  19 PA19       TX_LED   3    -    1/3    3/3   3/1    0/3
@@ -503,6 +518,8 @@ Pin GPIO Pin name     IRQ  ADC  Serial Serial TCC/TC TCC/TC
  43 PB11          SCK  11    -     -     4/3   5/1    0/5
  23 PA23          SCL   7    -    3/1    5/1   4/1    0/5
  22 PA22          SDA   6    -    3/0    5/0   4/0    0/4
+ 11 PA11           RX  11   19    0/3    2/3   1/1    0/3
+ 10 PA10           TX  10   18    0/2    2/2   1/0    0/2
  30 PA30        SWCLK  10    -     -     1/2   1/0     -
  31 PA31        SWDIO  11    -     -     1/3   1/1     -
  24 PA24       USB_DM  12    -    3/2    5/2   5/0    1/2
@@ -518,9 +535,9 @@ Adafruit ItsyBitsy M0 Express :ref:`samd21_pinout_table`.
 
 The default devices at the board are:
 
-- UART 5 at pins PB23/PB22, labelled RX/TX
+- UART 2 at pins PA11/PA10, labelled RX/TX
 - I2C 3 at pins PA22/PA23, labelled SDA/SCL
-- SPI 4 at pins PA10/PA12/PA11, labelled MOSI, MISO and SCK
+- SPI 4 at pins PB10/PA12/PB11, labelled MOSI, MISO and SCK
 - DAC output on pin PA02, labelled A0
 
 Adafruit Trinket M0 pin assignment table
@@ -536,6 +553,13 @@ Pin GPIO Pin name     IRQ  ADC  Serial Serial TCC/TC TCC/TC
   6 PA06           D4   6    6     -     0/2   1/0     -
   1 PA01  DOTSTAR_CLK   1    -     -     1/1   2/1     -
   0 PA00 DOTSTAR_DATA   0    -     -     1/0   2/0     -
+  7 PA07           RX   7    7     -     0/3   1/1     -
+  6 PA06           TX   6    6     -     0/2   1/0     -
+  8 PA08          SDA   -   16    0/0    2/0   0/0    1/2
+  9 PA09          SCL   9   17    0/1    2/1   0/1    1/3
+  6 PA06         MOSI   6    6     -     0/2   1/0     -
+  9 PA09         MISO   9   17    0/1    2/1   0/1    1/3
+  7 PA07          SCK   7    7     -     0/3   1/1     -
  10 PA10          LED  10   18    0/2    2/2   1/0    0/2
  30 PA30        SWCLK  10    -     -     1/2   1/0     -
  31 PA31        SWDIO  11    -     -     1/3   1/1     -
@@ -626,6 +650,124 @@ Adafruit ItsyBitsy M0 Express :ref:`samd21_pinout_table`.
 
 The board does not provide access to UART, I2C, SPI or DAC.
 
+SparkFun Redboard Turbo assignment table
+----------------------------------------
+
+=== ==== ============ ==== ==== ====== ====== ====== ======
+Pin GPIO Pin name     IRQ  ADC  Serial Serial TCC/TC TCC/TC
+=== ==== ============ ==== ==== ====== ====== ====== ======
+  2 PA02           A0   2    0     -      -      -      -
+ 40 PB08           A1   8    2     -     4/0    4/0     -
+ 41 PB09           A2   9    3     -     4/1    4/1     -
+  4 PA04           A3   4    4     -     0/0    0/0     -
+  5 PA05           A4   5    5     -     0/1    0/1     -
+ 34 PB02           A5   2   10     -     5/0    6/0     -
+ 11 PA11           D0  11   19    0/3    2/3    1/1    0/3
+ 10 PA10           D1  10   18    0/2    2/2    1/0    0/2
+ 14 PA14           D2  14    -    2/2    4/2    3/0    0/4
+  9 PA09           D3   9   17    0/1    2/1    0/1    1/3
+  8 PA08           D4   -   16    0/0    2/0    0/0    1/2
+ 15 PA15           D5  15    -    2/3    4/3    3/1    0/5
+ 20 PA20           D6   4    -    5/2    3/2    7/0    0/4
+ 21 PA21           D7   5    -    5/3    3/3    7/1    0/7
+  6 PA06           D8   6    6     -     0/2    1/0     -
+  7 PA07           D9   7    7     -     0/3    1/1     -
+ 11 PA11           RX  11   19    0/3    2/3    1/1    0/3
+ 10 PA10           TX  10   18    0/2    2/2    1/0    0/2
+  3 PA03         AREF   3    1     -      -      -      -
+ 18 PA18          D10   2    -    1/2    3/2    3/0    0/2
+ 16 PA16          D11   0    -    1/0    3/0    2/0    0/6
+ 19 PA19          D12   3    -    1/3    3/3    3/1    0/3
+ 17 PA17          D13   1    -    1/1    3/1    2/1    0/7
+ 13 PA13     FLASH_CS  13    -    2/1    4/1    2/0    0/7
+ 35 PB03   FLASH_MISO   3   11     -     5/1    6/1     -
+ 54 PB22   FLASH_MOSI   6    -     -     5/2    7/0     -
+ 55 PB23    FLASH_SCK   7    -     -     5/3    7/1     -
+ 31 PA31       LED_RX  11    -     -     1/3    1/1     -
+ 27 PA27       LED_TX  15    -     -      -      -      -
+ 12 PA12         MISO  12    -    2/0    4/0    2/0    0/6
+ 42 PB10         MOSI  10    -     -     4/2    5/0    0/4
+ 30 PA30     NEOPIXEL  10    -     -     1/2    1/0     -
+ 43 PB11          SCK  11    -     -     4/3    5/1    0/5
+ 23 PA23          SCL   7    -    3/1    5/1    4/1    0/5
+ 22 PA22          SDA   6    -    3/0    5/0    4/0    0/4
+ 30 PA30        SWCLK  10    -     -     1/2    1/0     -
+ 31 PA31        SWDIO  11    -     -     1/3    1/1     -
+ 24 PA24       USB_DM  12    -    3/2    5/2    5/0    1/2
+ 25 PA25       USB_DP  13    -    3/3    5/3    5/1    1/3
+  0 PA00                0    -     -     1/0    2/0     -
+  1 PA01                1    -     -     1/1    2/1     -
+ 28 PA28                8    -     -      -      -      -
+=== ==== ============ ==== ==== ====== ====== ====== ======
+
+For the definition of the table columns see the explanation at the table for
+Adafruit ItsyBitsy M0 Express :ref:`samd21_pinout_table`.
+
+The default devices at the board are:
+
+- UART 0 at pins PA11/PA10, labelled RX/TX
+- I2C 3 at pins PA22/PA23, labelled SDA/SCL
+- SPI 4 at pins PB10/PA12/PB11, labelled MISO, MOSI and SCK
+- DAC output on pin PA02, labelled A0
+
+
+SparkFun SAMD21 Dev Breakout assignment table
+---------------------------------------------
+
+=== ==== ============ ==== ==== ====== ====== ====== ======
+Pin GPIO Pin name     IRQ  ADC  Serial Serial TCC/TC TCC/TC
+=== ==== ============ ==== ==== ====== ====== ====== ======
+  2 PA02           A0   2    0      -     -      -      -
+ 40 PB08           A1   8    2      -    4/0    4/0     -
+ 41 PB09           A2   9    3      -    4/1    4/1     -
+  4 PA04           A3   4    4      -    0/0    0/0     -
+  5 PA05           A4   5    5      -    0/1    0/1     -
+ 34 PB02           A5   2   10      -    5/0    6/0     -
+ 11 PA11           D0  11   19     0/3   2/3    1/1    0/3
+ 10 PA10           D1  10   18     0/2   2/2    1/0    0/2
+ 14 PA14           D2  14    -     2/2   4/2    3/0    0/4
+  9 PA09           D3   9   17     0/1   2/1    0/1    1/3
+  8 PA08           D4   -   16     0/0   2/0    0/0    1/2
+ 15 PA15           D5  15    -     2/3   4/3    3/1    0/5
+ 20 PA20           D6   4    -     5/2   3/2    7/0    0/4
+ 21 PA21           D7   5    -     5/3   3/3    7/1    0/7
+  6 PA06           D8   6    6      -    0/2    1/0     -
+  7 PA07           D9   7    7      -    0/3    1/1     -
+ 11 PA11           RX  11   19     0/3   2/3    1/1    0/3
+ 10 PA10           TX  10   18     0/2   2/2    1/0    0/2
+  3 PA03         AREF   3    1      -     -      -      -
+ 18 PA18          D10   2    -     1/2   3/2    3/0    0/2
+ 16 PA16          D11   0    -     1/0   3/0    2/0    0/6
+ 19 PA19          D12   3    -     1/3   3/3    3/1    0/3
+ 17 PA17          D13   1    -     1/1   3/1    2/1    0/7
+ 54 PB22          D30   6    -      -    5/2    7/0     -
+ 55 PB23          D31   7    -      -    5/3    7/1     -
+ 13 PA13          D38  13    -     2/1   4/1    2/0    0/7
+ 35 PB03       LED_RX   3   11      -    5/1    6/1     -
+ 27 PA27       LED_TX  15    -      -     -      -      -
+ 12 PA12         MISO  12    -     2/0   4/0    2/0    0/6
+ 42 PB10         MOSI  10    -      -    4/2    5/0    0/4
+ 43 PB11          SCK  11    -      -    4/3    5/1    0/5
+ 23 PA23          SCL   7    -     3/1   5/1    4/1    0/5
+ 22 PA22          SDA   6    -     3/0   5/0    4/0    0/4
+ 30 PA30        SWCLK  10    -      -    1/2    1/0     -
+ 31 PA31        SWDIO  11    -      -    1/3    1/1     -
+ 24 PA24       USB_DM  12    -     3/2   5/2    5/0    1/2
+ 25 PA25       USB_DP  13    -     3/3   5/3    5/1    1/3
+  0 PA00                0    -      -    1/0    2/0     -
+  1 PA01                1    -      -    1/1    2/1     -
+ 28 PA28                8    -      -     -      -      -
+=== ==== ============ ==== ==== ====== ====== ====== ======
+
+For the definition of the table columns see the explanation at the table for
+Adafruit ItsyBitsy M0 Express :ref:`samd21_pinout_table`.
+
+The default devices at the board are:
+
+- UART 0 at pins PA11/PA10, labelled RX/TX
+- I2C 3 at pins PA22/PA23, labelled SDA/SCL
+- SPI 4 at pins PB10/PA12/PB11, labelled MISO, MOSI and SCK
+- DAC output on pin PA02, labelled A0
 
 SAMD21 Xplained PRO pin assignment table
 ----------------------------------------
@@ -716,8 +858,10 @@ Pin GPIO Pin name     IRQ  ADC  ADC  Serial Serial  TC    PWM   PWM
  34 PB02  DOTSTAR_CLK   2   14    -     -     5/0   6/0   2/2    -
  35 PB03 DOTSTAR_DATA   9   15    -     -     5/1   6/1    -     -
  15 PA15          LED  15    -    -    2/3    4/3   3/1   2/1   1/3
- 55 PB23         MISO   7    -    -    1/3    5/3   7/1    -     -
- 54 PB22         MOSI  22    -    -    1/2    5/2   7/0    -     -
+ 16 PA16           RX   0    -    -    1/0    3/1   2/0   1/0   0/4
+ 17 PA17           TX   1    -    -    1/1    3/0   2/1   1/1   0/5
+ 55 PB23         MOSI   7    -    -    1/3    5/3   7/1    -     -
+ 54 PB22         MISO  22    -    -    1/2    5/2   7/0    -     -
  43 PB11      QSPI_CS  12    -    -     -     4/3   5/1   0/5   1/1
   8 PA08      QSPI_D0   -    8    2    0/0    2/1   0/0   0/0   1/4
   9 PA09      QSPI_D1   9    9    3    0/1    2/0   0/1   0/1   1/5
@@ -866,7 +1010,7 @@ Default pin assignments:
 
 There seems to be no default pin assignment for this board.
 
-Sparkfun SAMD51 Thing Plus pin assignment table
+SparkFun SAMD51 Thing Plus pin assignment table
 ------------------------------------------------
 
 === ==== ============ ==== ==== ==== ====== ====== ===== ===== =====
@@ -893,6 +1037,8 @@ Pin GPIO Pin name     IRQ  ADC  ADC  Serial Serial  TC    PWM   PWM
  11 PA11   FLASH_MISO  11   11    -    0/3    2/3   1/1   0/3   1/7
   8 PA08   FLASH_MOSI   -    8    2    0/0    2/1   0/0   0/0   1/4
   9 PA09    FLASH_SCK   9    9    3    0/1    2/0   0/1   0/1   1/5
+ 13 PA13           RX  13    -    -    2/1    4/0   2/1   0/7   1/3
+ 12 PA12           TX  12    -    -    2/0    4/1   2/0   0/6   1/2
  43 PB11         MISO  12    -    -     -     4/3   5/1   0/5   1/1
  44 PB12         MOSI  12    -    -    4/0     -    4/0   3/0   0/0
  55 PB23          RXD   7    -    -    1/3    5/3   7/1    -     -
@@ -931,7 +1077,7 @@ Adafruit ItsyBitsy M4 Express :ref:`samd51_pinout_table`.
 The default devices at the board are:
 
 - UART 2 at pins PA13/PA12, labelled RXD/TXD
-- I2C 5 at pins PA22/PA23, labelled SDA/SCL
+- I2C 3 at pins PA22/PA23, labelled SDA/SCL
 - SPI 4 at pins PB12/PB11/PB13, labelled MOSI, MISO and SCK
 - DAC output on pins PA02 and PA05, labelled A0 and A4
 
@@ -1163,22 +1309,22 @@ The tables shown above were created with small a Python script running on the ta
       else:
           return "zzzzzzz%03d" % i[0]
 
-  def table(num=127, sort=True):
-      pintbl = []
-      inv_bd = {v: k for k, v in Pin.board.__dict__.items()}
-      for i in range(num):
-          try:
-              p = Pin(i)
-              pi = pininfo(p)
-              if p in inv_bd.keys():
-                  name = inv_bd[p]
-              else:
-                  name = ""
-              pintbl.append((i, name, pininfo(i)))
-          except:
-              pass
-              # print("not defined")
+  def pinnum(p):
+      return (ord(p[1]) - ord("A")) * 32 + int(p[2:])
 
+  def table(num = 127, sort=True):
+      pintbl = []
+      pinlist = []
+      for name in Pin.board.__dict__.keys():
+          p = Pin(name)
+          pi = pininfo(p)
+          pintbl.append((pinnum(pi[0]), name, pi))
+          pinlist.append(p)
+      for pc in Pin.cpu.__dict__.keys():
+          p = Pin(pc)
+          pi = pininfo(p)
+          if not p in pinlist:
+             pintbl.append((pinnum(pi[0]), "", pi))
       if sort:
           pintbl.sort(key=tblkey)
       for item in pintbl:
diff --git a/docs/samd/quickref.rst b/docs/samd/quickref.rst
index d57dc67908398..781686d2f60e6 100644
--- a/docs/samd/quickref.rst
+++ b/docs/samd/quickref.rst
@@ -163,10 +163,15 @@ See :ref:`machine.UART <machine.UART>`. ::
     uart3.write('hello')  # write 5 bytes
     uart3.read(5)         # read up to 5 bytes
 
+    uart = UART()         # Use the default values for id, rx and tx.
+    uart = UART(baudrate=9600) # Use the default UART and set the baudrate
+
 The SAMD21/SAMD51 MCUs have up to eight hardware so called SERCOM devices, which can be used as UART,
 SPI or I2C device, but not every MCU variant and board exposes all
 TX and RX pins for users. For the assignment of Pins to devices and UART signals,
-refer to the :ref:`SAMD pinout <samd_pinout>`.
+refer to the :ref:`SAMD pinout <samd_pinout>`. If the id, rx or tx pins are not specified,
+the default values are used. The first positional argument (if given) is assumed to be the UART id.
+If the baudrate is changed and the UART id is omitted, it must be set using the baudrate keyword.
 
 PWM (pulse width modulation)
 ----------------------------
@@ -373,8 +378,18 @@ signal pins for users.  Hardware SPI is accessed via the
     spi = SPI(1, sck=Pin("SCK"), mosi=Pin("MOSI"), miso=Pin("MISO"), baudrate=10000000)
     spi.write('Hello World')
 
-If miso is not specified, it is not used. For the assignment of Pins to SPI devices and signals, refer to
-:ref:`SAMD pinout <samd_pinout>`.
+For the assignment of Pins to SPI devices and signals, refer to
+:ref:`SAMD pinout <samd_pinout>`. If the id, miso, mosi or sck pins are not specified,
+the default values are used. So it is possible to create the SPI object as::
+
+    from machine import SPI
+    spi = SPI()  # Use the default device and default baudrate
+    spi = SPI(baudrate=12_000_000)  # Use the default device and change the baudrate
+
+If the MISO signal shall be omitted, it must be defined as miso=None.
+The first positional argument (if given) is assumed to be the SPI id.
+If the baudrate is changed while the SPI id is omitted, it must be
+set using the baudrate keyword.
 
 Note: Even if the highest reliable baud rate at the moment is about 24 Mhz,
 setting a baud rate will not always result in exactly that frequency, especially
@@ -407,6 +422,7 @@ The SAMD21/SAMD51 MCUs have up to eight hardware so called SERCOM devices,
 which can be used as UART, SPI or I2C device, but not every MCU variant
 and board exposes all signal pins for users.
 For the assignment of Pins to devices and I2C signals, refer to :ref:`SAMD pinout <samd_pinout>`.
+If the id, scl or sda pins are not specified, the default values are used.
 
 Hardware I2C is accessed via the :ref:`machine.I2C <machine.I2C>` class and
 has the same methods as software SPI above::
@@ -416,6 +432,13 @@ has the same methods as software SPI above::
     i2c = I2C(2, scl=Pin("SCL"), sda=Pin("SDA"), freq=400_000)
     i2c.writeto(0x76, b"Hello World")
 
+    i2c2 = I2C()   # Use the default values for id, scl and sda.
+    i2c2 = I2C(freq=100_000) # Use the default device and set freq.
+
+The first positional argument (if given) is assumed to be the I2C id.
+If the freq is changed and the I2C id is omitted, it must be set using
+the freq keyword.
+
 OneWire driver
 --------------
 
diff --git a/docs/zephyr/quickref.rst b/docs/zephyr/quickref.rst
index 63d4bced039fb..0e985c70b3eb6 100644
--- a/docs/zephyr/quickref.rst
+++ b/docs/zephyr/quickref.rst
@@ -56,6 +56,21 @@ Use the :ref:`machine.Pin <machine.Pin>` class::
     switch = Pin(("gpioc", 6), Pin.IN)            # create input pin for a switch
     switch.irq(lambda t: print("SW2 changed"))    # enable an interrupt when switch state is changed
 
+PWM
+---
+
+Use the :ref:`machine.PWM <machine.PWM>` class::
+
+    from machine import PWM
+
+    pwm = PWM(("pwm0", 0), freq=3921568, duty_ns=200, invert=True)    # create pwm on PWM0
+    print(pwm)                                                        # print pwm
+
+    print(pwm.duty_ns())                                              # print pwm duty cycle in nanoseconds
+    pwm.duty_ns(255)                                                  # set new pwm duty cycle in nanoseconds
+
+    pwm.deinit()
+
 Hardware I2C bus
 ----------------
 
@@ -138,6 +153,8 @@ Use the :ref:`zephyr.FlashArea <zephyr.FlashArea>` class to support filesystem::
         f.write('Hello world')                  # write to the file
     print(open('/flash/hello.txt').read())      # print contents of the file
 
+The FlashAreas' IDs that are available are listed in the FlashArea module, as ID_*.
+
 Sensor
 ------
 
diff --git a/docs/zephyr/tutorial/repl.rst b/docs/zephyr/tutorial/repl.rst
index db7b7333d2416..199dda2b7aeee 100644
--- a/docs/zephyr/tutorial/repl.rst
+++ b/docs/zephyr/tutorial/repl.rst
@@ -31,7 +31,7 @@ With your serial program open (PuTTY, screen, picocom, etc) you may see a
 blank screen with a flashing cursor. Press Enter (or reset the board) and
 you should be presented with the following text::
 
-        *** Booting Zephyr OS build v3.7.0 ***
+        *** Booting Zephyr OS build v4.0.0 ***
         MicroPython v1.24.0-preview.179.g5b85b24bd on 2024-08-05; zephyr-frdm_k64f with mk64f12
         Type "help()" for more information.
         >>>
diff --git a/drivers/bus/qspi.h b/drivers/bus/qspi.h
index 009f55b159d41..32b2890e3fc4a 100644
--- a/drivers/bus/qspi.h
+++ b/drivers/bus/qspi.h
@@ -37,14 +37,15 @@ enum {
     MP_QSPI_IOCTL_DEINIT,
     MP_QSPI_IOCTL_BUS_ACQUIRE,
     MP_QSPI_IOCTL_BUS_RELEASE,
+    MP_QSPI_IOCTL_MEMORY_MODIFIED,
 };
 
 typedef struct _mp_qspi_proto_t {
-    int (*ioctl)(void *self, uint32_t cmd);
+    int (*ioctl)(void *self, uint32_t cmd, uintptr_t arg);
     int (*write_cmd_data)(void *self, uint8_t cmd, size_t len, uint32_t data);
     int (*write_cmd_addr_data)(void *self, uint8_t cmd, uint32_t addr, size_t len, const uint8_t *src);
     int (*read_cmd)(void *self, uint8_t cmd, size_t len, uint32_t *dest);
-    int (*read_cmd_qaddr_qdata)(void *self, uint8_t cmd, uint32_t addr, size_t len, uint8_t *dest);
+    int (*read_cmd_qaddr_qdata)(void *self, uint8_t cmd, uint32_t addr, uint8_t num_dummy, size_t len, uint8_t *dest);
 } mp_qspi_proto_t;
 
 typedef struct _mp_soft_qspi_obj_t {
diff --git a/drivers/bus/softqspi.c b/drivers/bus/softqspi.c
index 65a504a739d25..06dcd03b02dda 100644
--- a/drivers/bus/softqspi.c
+++ b/drivers/bus/softqspi.c
@@ -56,8 +56,9 @@ static void nibble_write(mp_soft_qspi_obj_t *self, uint8_t v) {
     mp_hal_pin_write(self->io3, (v >> 3) & 1);
 }
 
-static int mp_soft_qspi_ioctl(void *self_in, uint32_t cmd) {
+static int mp_soft_qspi_ioctl(void *self_in, uint32_t cmd, uintptr_t arg) {
     mp_soft_qspi_obj_t *self = (mp_soft_qspi_obj_t*)self_in;
+    (void)arg;
 
     switch (cmd) {
         case MP_QSPI_IOCTL_INIT:
@@ -188,13 +189,13 @@ static int mp_soft_qspi_read_cmd(void *self_in, uint8_t cmd, size_t len, uint32_
     return 0;
 }
 
-static int mp_soft_qspi_read_cmd_qaddr_qdata(void *self_in, uint8_t cmd, uint32_t addr, size_t len, uint8_t *dest) {
+static int mp_soft_qspi_read_cmd_qaddr_qdata(void *self_in, uint8_t cmd, uint32_t addr, uint8_t num_dummy, size_t len, uint8_t *dest) {
     mp_soft_qspi_obj_t *self = (mp_soft_qspi_obj_t*)self_in;
-    uint8_t cmd_buf[7] = {cmd};
+    uint8_t cmd_buf[16] = {cmd};
     uint8_t addr_len = mp_spi_set_addr_buff(&cmd_buf[1], addr);
     CS_LOW(self);
     mp_soft_qspi_transfer(self, 1, cmd_buf, NULL);
-    mp_soft_qspi_qwrite(self, addr_len + 3, &cmd_buf[1]); // 3/4 addr bytes, 1 extra byte (0), 2 dummy bytes (4 dummy cycles)
+    mp_soft_qspi_qwrite(self, addr_len + 1 + num_dummy, &cmd_buf[1]); // 3/4 addr bytes, 1 extra byte (0), N dummy bytes (2*N dummy cycles)
     mp_soft_qspi_qread(self, len, dest);
     CS_HIGH(self);
     return 0;
diff --git a/drivers/cyw43/README.md b/drivers/cyw43/README.md
deleted file mode 100644
index 5af6f65580668..0000000000000
--- a/drivers/cyw43/README.md
+++ /dev/null
@@ -1,17 +0,0 @@
-CYW43xx WiFi SoC driver
-=======================
-
-This is a driver for the CYW43xx WiFi SoC.
-
-There are four layers to the driver:
-
-1. SDIO bus interface, provided by the host device/system.
-
-2. Low-level CYW43xx interface, managing the bus, control messages, Ethernet
-   frames and asynchronous events.  Includes download of SoC firmware.  The
-   header file `cyw43_ll.h` defines the interface to this layer.
-
-3. Mid-level CYW43xx control, to control and set WiFi parameters and manage
-   events.  See `cyw43_ctrl.c`.
-
-4. TCP/IP bindings to lwIP.  See `cyw43_lwip.c`.
diff --git a/drivers/cyw43/cywbt.c b/drivers/cyw43/cywbt.c
deleted file mode 100644
index 0ee69a07ecd2c..0000000000000
--- a/drivers/cyw43/cywbt.c
+++ /dev/null
@@ -1,304 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2019-2020 Damien P. George
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-#include <stdio.h>
-#include <string.h>
-
-#include "py/runtime.h"
-#include "py/mphal.h"
-#include "extmod/mpbthci.h"
-
-#if MICROPY_PY_NETWORK_CYW43
-
-#include "lib/cyw43-driver/src/cyw43_config.h"
-#include "lib/cyw43-driver/firmware/cyw43_btfw_4343A1.h"
-
-// Provided by the port, and also possibly shared with the stack.
-extern uint8_t mp_bluetooth_hci_cmd_buf[4 + 256];
-
-/******************************************************************************/
-// CYW BT HCI low-level driver
-
-#ifdef CYW43_PIN_BT_CTS
-// This code is not portable and currently only builds on stm32 port.
-
-#include "pin_static_af.h"
-#include "uart.h"
-
-// Provided by the port.
-extern machine_uart_obj_t mp_bluetooth_hci_uart_obj;
-
-static void cywbt_wait_cts_low(void) {
-    mp_hal_pin_config(CYW43_PIN_BT_CTS, MP_HAL_PIN_MODE_INPUT, MP_HAL_PIN_PULL_UP, 0);
-    for (int i = 0; i < 200; ++i) {
-        if (mp_hal_pin_read(CYW43_PIN_BT_CTS) == 0) {
-            break;
-        }
-        mp_hal_delay_ms(1);
-    }
-    mp_hal_pin_config_alt(CYW43_PIN_BT_CTS, MP_HAL_PIN_MODE_ALT,
-        MP_HAL_PIN_PULL_UP, AF_FN_UART, mp_bluetooth_hci_uart_obj.uart_id);
-}
-#endif
-
-static int cywbt_hci_cmd_raw(size_t len, uint8_t *buf) {
-    mp_bluetooth_hci_uart_write((void *)buf, len);
-    for (int c, i = 0; i < 6; ++i) {
-        while ((c = mp_bluetooth_hci_uart_readchar()) == -1) {
-            mp_event_wait_indefinite();
-        }
-        buf[i] = c;
-    }
-
-    // expect a command complete event (event 0x0e)
-    if (buf[0] != 0x04 || buf[1] != 0x0e) {
-        printf("unknown response: %02x %02x %02x %02x\n", buf[0], buf[1], buf[2], buf[3]);
-        return -1;
-    }
-
-    /*
-    if buf[3:6] != cmd[:3]:
-        print('response doesn\'t match cmd:', cmd, ev)
-        return b''
-        */
-
-    int sz = buf[2] - 3;
-    for (int c, i = 0; i < sz; ++i) {
-        while ((c = mp_bluetooth_hci_uart_readchar()) == -1) {
-            mp_event_wait_indefinite();
-        }
-        buf[i] = c;
-    }
-
-    return 0;
-}
-
-static int cywbt_hci_cmd(int ogf, int ocf, size_t param_len, const uint8_t *param_buf) {
-    uint8_t *buf = mp_bluetooth_hci_cmd_buf;
-    buf[0] = 0x01;
-    buf[1] = ocf;
-    buf[2] = ogf << 2 | ocf >> 8;
-    buf[3] = param_len;
-    if (param_len) {
-        memcpy(buf + 4, param_buf, param_len);
-    }
-    return cywbt_hci_cmd_raw(4 + param_len, buf);
-}
-
-static void put_le16(uint8_t *buf, uint16_t val) {
-    buf[0] = val;
-    buf[1] = val >> 8;
-}
-
-static void put_le32(uint8_t *buf, uint32_t val) {
-    buf[0] = val;
-    buf[1] = val >> 8;
-    buf[2] = val >> 16;
-    buf[3] = val >> 24;
-}
-
-static int cywbt_set_baudrate(uint32_t baudrate) {
-    uint8_t buf[6];
-    put_le16(buf, 0);
-    put_le32(buf + 2, baudrate);
-    return cywbt_hci_cmd(0x3f, 0x18, 6, buf);
-}
-
-// download firmware
-static int cywbt_download_firmware(const uint8_t *firmware) {
-    cywbt_hci_cmd(0x3f, 0x2e, 0, NULL);
-
-    bool last_packet = false;
-    while (!last_packet) {
-        uint8_t *buf = mp_bluetooth_hci_cmd_buf;
-        memcpy(buf + 1, firmware, 3);
-        firmware += 3;
-        last_packet = buf[1] == 0x4e;
-        if (buf[2] != 0xfc) {
-            printf("fail1 %02x\n", buf[2]);
-            break;
-        }
-        uint8_t len = buf[3];
-
-        memcpy(buf + 4, firmware, len);
-        firmware += len;
-
-        buf[0] = 1;
-        cywbt_hci_cmd_raw(4 + len, buf);
-        if (buf[0] != 0) {
-            printf("fail3 %02x\n", buf[0]);
-            break;
-        }
-    }
-
-    // RF switch must select high path during BT patch boot
-    #if MICROPY_HW_ENABLE_RF_SWITCH
-    mp_hal_pin_config(CYW43_PIN_WL_GPIO_1, MP_HAL_PIN_MODE_INPUT, MP_HAL_PIN_PULL_UP, 0);
-    #endif
-    mp_hal_delay_ms(10); // give some time for CTS to go high
-    #ifdef CYW43_PIN_BT_CTS
-    cywbt_wait_cts_low();
-    #endif
-    #if MICROPY_HW_ENABLE_RF_SWITCH
-    // Select chip antenna (could also select external)
-    mp_hal_pin_config(CYW43_PIN_WL_GPIO_1, MP_HAL_PIN_MODE_INPUT, MP_HAL_PIN_PULL_DOWN, 0);
-    #endif
-
-    mp_bluetooth_hci_uart_set_baudrate(115200);
-    cywbt_set_baudrate(MICROPY_HW_BLE_UART_BAUDRATE_SECONDARY);
-    mp_bluetooth_hci_uart_set_baudrate(MICROPY_HW_BLE_UART_BAUDRATE_SECONDARY);
-
-    return 0;
-}
-
-int mp_bluetooth_hci_controller_init(void) {
-    // This is called immediately after the UART is initialised during stack initialisation.
-
-    mp_hal_pin_output(CYW43_PIN_BT_REG_ON);
-    mp_hal_pin_low(CYW43_PIN_BT_REG_ON);
-    #ifdef CYW43_PIN_BT_HOST_WAKE
-    mp_hal_pin_input(CYW43_PIN_BT_HOST_WAKE);
-    #endif
-    #ifdef CYW43_PIN_BT_DEV_WAKE
-    mp_hal_pin_output(CYW43_PIN_BT_DEV_WAKE);
-    mp_hal_pin_low(CYW43_PIN_BT_DEV_WAKE);
-    #endif
-
-    #if MICROPY_HW_ENABLE_RF_SWITCH
-    // TODO don't select antenna if wifi is enabled
-    mp_hal_pin_config(CYW43_PIN_WL_GPIO_4, MP_HAL_PIN_MODE_OUTPUT, MP_HAL_PIN_PULL_NONE, 0); // RF-switch power
-    mp_hal_pin_high(CYW43_PIN_WL_GPIO_4); // Turn the RF-switch on
-    #endif
-
-    uint8_t buf[256];
-
-    mp_hal_pin_low(CYW43_PIN_BT_REG_ON);
-    mp_bluetooth_hci_uart_set_baudrate(115200);
-    mp_hal_delay_ms(100);
-    mp_hal_pin_high(CYW43_PIN_BT_REG_ON);
-    #ifdef CYW43_PIN_BT_CTS
-    cywbt_wait_cts_low();
-    #else
-    mp_hal_delay_ms(100);
-    #endif
-
-    // Reset
-    cywbt_hci_cmd(0x03, 0x0003, 0, NULL);
-
-    #ifdef MICROPY_HW_BLE_UART_BAUDRATE_DOWNLOAD_FIRMWARE
-    // Change baudrate
-    cywbt_set_baudrate(MICROPY_HW_BLE_UART_BAUDRATE_DOWNLOAD_FIRMWARE);
-    mp_bluetooth_hci_uart_set_baudrate(MICROPY_HW_BLE_UART_BAUDRATE_DOWNLOAD_FIRMWARE);
-    #endif
-
-    cywbt_download_firmware((const uint8_t *)&cyw43_btfw_4343A1[0]);
-
-    // Reset
-    cywbt_hci_cmd(0x03, 0x0003, 0, NULL);
-
-    // Set BD_ADDR (sent as little endian)
-    uint8_t bdaddr[6];
-    mp_hal_get_mac(MP_HAL_MAC_BDADDR, bdaddr);
-    buf[0] = bdaddr[5];
-    buf[1] = bdaddr[4];
-    buf[2] = bdaddr[3];
-    buf[3] = bdaddr[2];
-    buf[4] = bdaddr[1];
-    buf[5] = bdaddr[0];
-    cywbt_hci_cmd(0x3f, 0x0001, 6, buf);
-
-    // Set local name
-    // memset(buf, 0, 248);
-    // memcpy(buf, "PYBD-BLE", 8);
-    // cywbt_hci_cmd(0x03, 0x0013, 248, buf);
-
-    // Configure sleep mode
-    cywbt_hci_cmd(0x3f, 0x27, 12, (const uint8_t *)"\x01\x02\x02\x00\x00\x00\x01\x00\x00\x00\x00\x00");
-
-    // HCI_Write_LE_Host_Support
-    cywbt_hci_cmd(3, 109, 2, (const uint8_t *)"\x01\x00");
-
-    #ifdef CYW43_PIN_BT_DEV_WAKE
-    mp_hal_pin_high(CYW43_PIN_BT_DEV_WAKE); // let sleep
-    #endif
-
-    return 0;
-}
-
-int mp_bluetooth_hci_controller_deinit(void) {
-    mp_hal_pin_low(CYW43_PIN_BT_REG_ON);
-
-    return 0;
-}
-
-#ifdef CYW43_PIN_BT_DEV_WAKE
-static uint32_t bt_sleep_ticks;
-#endif
-
-int mp_bluetooth_hci_controller_sleep_maybe(void) {
-    #ifdef CYW43_PIN_BT_DEV_WAKE
-    if (mp_hal_pin_read(CYW43_PIN_BT_DEV_WAKE) == 0) {
-        if (mp_hal_ticks_ms() - bt_sleep_ticks > 500) {
-            mp_hal_pin_high(CYW43_PIN_BT_DEV_WAKE); // let sleep
-        }
-    }
-    #endif
-    return 0;
-}
-
-bool mp_bluetooth_hci_controller_woken(void) {
-    #ifdef CYW43_PIN_BT_HOST_WAKE
-    bool host_wake = mp_hal_pin_read(CYW43_PIN_BT_HOST_WAKE);
-    /*
-    // this is just for info/tracing purposes
-    static bool last_host_wake = false;
-    if (host_wake != last_host_wake) {
-        printf("HOST_WAKE change %d -> %d\n", last_host_wake, host_wake);
-        last_host_wake = host_wake;
-    }
-    */
-    return host_wake;
-    #else
-    return true;
-    #endif
-}
-
-int mp_bluetooth_hci_controller_wakeup(void) {
-    #ifdef CYW43_PIN_BT_DEV_WAKE
-    bt_sleep_ticks = mp_hal_ticks_ms();
-
-    if (mp_hal_pin_read(CYW43_PIN_BT_DEV_WAKE) == 1) {
-        mp_hal_pin_low(CYW43_PIN_BT_DEV_WAKE); // wake up
-        // Use delay_us rather than delay_ms to prevent running the scheduler (which
-        // might result in more BLE operations).
-        mp_hal_delay_us(5000); // can't go lower than this
-    }
-    #endif
-
-    return 0;
-}
-
-#endif
diff --git a/drivers/esp-hosted/esp_hosted_bthci.c b/drivers/esp-hosted/esp_hosted_bthci_uart.c
similarity index 100%
rename from drivers/esp-hosted/esp_hosted_bthci.c
rename to drivers/esp-hosted/esp_hosted_bthci_uart.c
diff --git a/drivers/memory/spiflash.c b/drivers/memory/spiflash.c
index 773334e167ae3..1ae0bbbc6792a 100644
--- a/drivers/memory/spiflash.c
+++ b/drivers/memory/spiflash.c
@@ -31,6 +31,18 @@
 #include "py/mphal.h"
 #include "drivers/memory/spiflash.h"
 
+#if defined(CHECK_DEVID)
+#error "CHECK_DEVID no longer supported, use MICROPY_HW_SPIFLASH_DETECT_DEVICE instead"
+#endif
+
+// The default number of dummy bytes for quad-read is 2.  This can be changed by enabling
+// MICROPY_HW_SPIFLASH_CHIP_PARAMS and configuring the value in mp_spiflash_chip_params_t.
+#if MICROPY_HW_SPIFLASH_CHIP_PARAMS
+#define MICROPY_HW_SPIFLASH_QREAD_NUM_DUMMY(spiflash) (spiflash->chip_params->qread_num_dummy)
+#else
+#define MICROPY_HW_SPIFLASH_QREAD_NUM_DUMMY(spiflash) (2)
+#endif
+
 #define QSPI_QE_MASK (0x02)
 #define USE_WR_DELAY (1)
 
@@ -61,14 +73,22 @@
 static void mp_spiflash_acquire_bus(mp_spiflash_t *self) {
     const mp_spiflash_config_t *c = self->config;
     if (c->bus_kind == MP_SPIFLASH_BUS_QSPI) {
-        c->bus.u_qspi.proto->ioctl(c->bus.u_qspi.data, MP_QSPI_IOCTL_BUS_ACQUIRE);
+        c->bus.u_qspi.proto->ioctl(c->bus.u_qspi.data, MP_QSPI_IOCTL_BUS_ACQUIRE, 0);
     }
 }
 
 static void mp_spiflash_release_bus(mp_spiflash_t *self) {
     const mp_spiflash_config_t *c = self->config;
     if (c->bus_kind == MP_SPIFLASH_BUS_QSPI) {
-        c->bus.u_qspi.proto->ioctl(c->bus.u_qspi.data, MP_QSPI_IOCTL_BUS_RELEASE);
+        c->bus.u_qspi.proto->ioctl(c->bus.u_qspi.data, MP_QSPI_IOCTL_BUS_RELEASE, 0);
+    }
+}
+
+static void mp_spiflash_notify_modified(mp_spiflash_t *self, uint32_t addr, uint32_t len) {
+    const mp_spiflash_config_t *c = self->config;
+    if (c->bus_kind == MP_SPIFLASH_BUS_QSPI) {
+        uintptr_t arg[2] = { addr, len };
+        c->bus.u_qspi.proto->ioctl(c->bus.u_qspi.data, MP_QSPI_IOCTL_MEMORY_MODIFIED, (uintptr_t)&arg[0]);
     }
 }
 
@@ -103,7 +123,8 @@ static int mp_spiflash_transfer_cmd_addr_data(mp_spiflash_t *self, uint8_t cmd,
         mp_hal_pin_write(c->bus.u_spi.cs, 1);
     } else {
         if (dest != NULL) {
-            ret = c->bus.u_qspi.proto->read_cmd_qaddr_qdata(c->bus.u_qspi.data, cmd, addr, len, dest);
+            uint8_t num_dummy = MICROPY_HW_SPIFLASH_QREAD_NUM_DUMMY(self);
+            ret = c->bus.u_qspi.proto->read_cmd_qaddr_qdata(c->bus.u_qspi.data, cmd, addr, num_dummy, len, dest);
         } else {
             ret = c->bus.u_qspi.proto->write_cmd_addr_data(c->bus.u_qspi.data, cmd, addr, len, src);
         }
@@ -174,7 +195,8 @@ void mp_spiflash_init(mp_spiflash_t *self) {
         mp_hal_pin_output(self->config->bus.u_spi.cs);
         self->config->bus.u_spi.proto->ioctl(self->config->bus.u_spi.data, MP_SPI_IOCTL_INIT);
     } else {
-        self->config->bus.u_qspi.proto->ioctl(self->config->bus.u_qspi.data, MP_QSPI_IOCTL_INIT);
+        uint8_t num_dummy = MICROPY_HW_SPIFLASH_QREAD_NUM_DUMMY(self);
+        self->config->bus.u_qspi.proto->ioctl(self->config->bus.u_qspi.data, MP_QSPI_IOCTL_INIT, num_dummy);
     }
 
     mp_spiflash_acquire_bus(self);
@@ -190,11 +212,13 @@ void mp_spiflash_init(mp_spiflash_t *self) {
     mp_hal_delay_ms(1);
     #endif
 
-    #if defined(CHECK_DEVID)
-    // Validate device id
+    #if MICROPY_HW_SPIFLASH_DETECT_DEVICE
+    // Attempt to detect SPI flash based on its JEDEC id.
     uint32_t devid;
     int ret = mp_spiflash_read_cmd(self, CMD_RD_DEVID, 3, &devid);
-    if (ret != 0 || devid != CHECK_DEVID) {
+    ret = mp_spiflash_detect(self, ret, devid);
+    if (ret != 0) {
+        // Could not read device id.
         mp_spiflash_release_bus(self);
         return;
     }
@@ -285,6 +309,7 @@ static int mp_spiflash_write_page(mp_spiflash_t *self, uint32_t addr, size_t len
 int mp_spiflash_erase_block(mp_spiflash_t *self, uint32_t addr) {
     mp_spiflash_acquire_bus(self);
     int ret = mp_spiflash_erase_block_internal(self, addr);
+    mp_spiflash_notify_modified(self, addr, SECTOR_SIZE);
     mp_spiflash_release_bus(self);
     return ret;
 }
@@ -300,6 +325,8 @@ int mp_spiflash_read(mp_spiflash_t *self, uint32_t addr, size_t len, uint8_t *de
 }
 
 int mp_spiflash_write(mp_spiflash_t *self, uint32_t addr, size_t len, const uint8_t *src) {
+    uint32_t orig_addr = addr;
+    uint32_t orig_len = len;
     mp_spiflash_acquire_bus(self);
     int ret = 0;
     uint32_t offset = addr & (PAGE_SIZE - 1);
@@ -317,12 +344,16 @@ int mp_spiflash_write(mp_spiflash_t *self, uint32_t addr, size_t len, const uint
         src += rest;
         offset = 0;
     }
+    mp_spiflash_notify_modified(self, orig_addr, orig_len);
     mp_spiflash_release_bus(self);
     return ret;
 }
 
 /******************************************************************************/
 // Interface functions that use the cache
+//
+// These functions do not call mp_spiflash_notify_modified(), so shouldn't be
+// used for memory-mapped flash (for example).
 
 #if MICROPY_HW_SPIFLASH_ENABLE_CACHE
 
diff --git a/drivers/memory/spiflash.h b/drivers/memory/spiflash.h
index 5ccf7d44c97de..d98047c89f07c 100644
--- a/drivers/memory/spiflash.h
+++ b/drivers/memory/spiflash.h
@@ -29,6 +29,16 @@
 #include "drivers/bus/spi.h"
 #include "drivers/bus/qspi.h"
 
+// Whether to enable dynamic configuration of SPI flash through mp_spiflash_chip_params_t.
+#ifndef MICROPY_HW_SPIFLASH_CHIP_PARAMS
+#define MICROPY_HW_SPIFLASH_CHIP_PARAMS (0)
+#endif
+
+// Whether to enable detection of SPI flash during initialisation.
+#ifndef MICROPY_HW_SPIFLASH_DETECT_DEVICE
+#define MICROPY_HW_SPIFLASH_DETECT_DEVICE (0)
+#endif
+
 #define MP_SPIFLASH_ERASE_BLOCK_SIZE (4096) // must be a power of 2
 
 enum {
@@ -66,14 +76,31 @@ typedef struct _mp_spiflash_config_t {
     #endif
 } mp_spiflash_config_t;
 
+#if MICROPY_HW_SPIFLASH_CHIP_PARAMS
+typedef struct _mp_spiflash_chip_params_t {
+    uint32_t jedec_id;
+    uint8_t memory_size_bytes_log2;
+    uint8_t qspi_prescaler;
+    uint8_t qread_num_dummy;
+} mp_spiflash_chip_params_t;
+#endif
+
 typedef struct _mp_spiflash_t {
     const mp_spiflash_config_t *config;
+    #if MICROPY_HW_SPIFLASH_CHIP_PARAMS
+    const mp_spiflash_chip_params_t *chip_params;
+    #endif
     volatile uint32_t flags;
 } mp_spiflash_t;
 
 void mp_spiflash_init(mp_spiflash_t *self);
 void mp_spiflash_deepsleep(mp_spiflash_t *self, int value);
 
+#if MICROPY_HW_SPIFLASH_DETECT_DEVICE
+// A board/port should define this function to perform actions based on the JEDEC id.
+int mp_spiflash_detect(mp_spiflash_t *spiflash, int ret, uint32_t devid);
+#endif
+
 // These functions go direct to the SPI flash device
 int mp_spiflash_erase_block(mp_spiflash_t *self, uint32_t addr);
 int mp_spiflash_read(mp_spiflash_t *self, uint32_t addr, size_t len, uint8_t *dest);
@@ -81,6 +108,8 @@ int mp_spiflash_write(mp_spiflash_t *self, uint32_t addr, size_t len, const uint
 
 #if MICROPY_HW_SPIFLASH_ENABLE_CACHE
 // These functions use the cache (which must already be configured)
+// Note: don't use these functions in combination with memory-mapped
+// flash, because MP_QSPI_IOCTL_MEMORY_MODIFIED is not called.
 int mp_spiflash_cache_flush(mp_spiflash_t *self);
 int mp_spiflash_cached_read(mp_spiflash_t *self, uint32_t addr, size_t len, uint8_t *dest);
 int mp_spiflash_cached_write(mp_spiflash_t *self, uint32_t addr, size_t len, const uint8_t *src);
diff --git a/drivers/ninaw10/machine_pin_nina.c b/drivers/ninaw10/machine_pin_nina.c
index c72ecee3dbb3e..fe6eb5c03af39 100644
--- a/drivers/ninaw10/machine_pin_nina.c
+++ b/drivers/ninaw10/machine_pin_nina.c
@@ -114,13 +114,13 @@ void machine_pin_ext_config(machine_pin_obj_t *self, int mode, int value) {
         mode = NINA_GPIO_OUTPUT;
         self->is_output = true;
     } else {
-        mp_raise_ValueError("only Pin.OUT and Pin.IN are supported for this pin");
+        mp_raise_ValueError(MP_ERROR_TEXT("only Pin.OUT and Pin.IN are supported for this pin"));
     }
     if (self->id >= 0 && self->id < MICROPY_HW_PIN_EXT_COUNT) {
         uint8_t buf[] = {pin_map[self->id], mode};
         if (mode == NINA_GPIO_OUTPUT) {
             if (NINA_GPIO_IS_INPUT_ONLY(self->id)) {
-                mp_raise_ValueError("only Pin.IN is supported for this pin");
+                mp_raise_ValueError(MP_ERROR_TEXT("only Pin.IN is supported for this pin"));
             }
             machine_pin_ext_set(self, value);
         }
diff --git a/drivers/ninaw10/nina_bt_hci.c b/drivers/ninaw10/nina_bthci_uart.c
similarity index 98%
rename from drivers/ninaw10/nina_bt_hci.c
rename to drivers/ninaw10/nina_bthci_uart.c
index f0d1b9bc8986b..50631711097f2 100644
--- a/drivers/ninaw10/nina_bt_hci.c
+++ b/drivers/ninaw10/nina_bthci_uart.c
@@ -50,8 +50,8 @@
 #define OCF_SET_EVENT_MASK      (0x0001)
 #define OCF_RESET               (0x0003)
 
-#define error_printf(...)   // mp_printf(&mp_plat_print, "nina_bt_hci.c: " __VA_ARGS__)
-#define debug_printf(...)   // mp_printf(&mp_plat_print, "nina_bt_hci.c: " __VA_ARGS__)
+#define error_printf(...)   // mp_printf(&mp_plat_print, "nina_bthci_uart.c: " __VA_ARGS__)
+#define debug_printf(...)   // mp_printf(&mp_plat_print, "nina_bthci_uart.c: " __VA_ARGS__)
 
 // Provided by the port, and also possibly shared with the stack.
 extern uint8_t mp_bluetooth_hci_cmd_buf[4 + 256];
diff --git a/examples/natmod/btree/Makefile b/examples/natmod/btree/Makefile
index ff130d61b3793..6273ccc6572a9 100644
--- a/examples/natmod/btree/Makefile
+++ b/examples/natmod/btree/Makefile
@@ -8,7 +8,7 @@ MOD = btree_$(ARCH)
 SRC = btree_c.c
 
 # Architecture to build for (x86, x64, armv7m, xtensa, xtensawin, rv32imc)
-ARCH = x64
+ARCH ?= x64
 
 BTREE_DIR = $(MPY_DIR)/lib/berkeley-db-1.xx
 BERKELEY_DB_CONFIG_FILE ?= \"extmod/berkeley-db/berkeley_db_config_port.h\"
@@ -32,6 +32,10 @@ SRC += $(addprefix $(realpath $(BTREE_DIR))/,\
 	mpool/mpool.c \
 	)
 
+ifeq ($(ARCH),xtensa)
+MPY_EXTERN_SYM_FILE=$(MPY_DIR)/ports/esp8266/boards/eagle.rom.addr.v6.ld
+endif
+
 include $(MPY_DIR)/py/dynruntime.mk
 
 # btree needs gnu99 defined
diff --git a/examples/natmod/deflate/Makefile b/examples/natmod/deflate/Makefile
index 504130d5723b3..1f63de20d206e 100644
--- a/examples/natmod/deflate/Makefile
+++ b/examples/natmod/deflate/Makefile
@@ -8,6 +8,12 @@ MOD = deflate_$(ARCH)
 SRC = deflate.c
 
 # Architecture to build for (x86, x64, armv7m, xtensa, xtensawin, rv32imc)
-ARCH = x64
+ARCH ?= x64
+
+ifeq ($(ARCH),xtensa)
+# Link with libm.a and libgcc.a from the toolchain
+LINK_RUNTIME = 1
+MPY_EXTERN_SYM_FILE=$(MPY_DIR)/ports/esp8266/boards/eagle.rom.addr.v6.ld
+endif
 
 include $(MPY_DIR)/py/dynruntime.mk
diff --git a/examples/natmod/features2/Makefile b/examples/natmod/features2/Makefile
index 4fd23c6879d47..5ddb74087b71a 100644
--- a/examples/natmod/features2/Makefile
+++ b/examples/natmod/features2/Makefile
@@ -10,5 +10,8 @@ SRC = main.c prod.c test.py
 # Architecture to build for (x86, x64, armv7m, xtensa, xtensawin)
 ARCH = x64
 
+# Link with libm.a and libgcc.a from the toolchain
+LINK_RUNTIME = 1
+
 # Include to get the rules for compiling and linking the module
 include $(MPY_DIR)/py/dynruntime.mk
diff --git a/examples/natmod/features2/main.c b/examples/natmod/features2/main.c
index 22961aa494f5f..5ce8e7b013020 100644
--- a/examples/natmod/features2/main.c
+++ b/examples/natmod/features2/main.c
@@ -1,5 +1,6 @@
 /* This example demonstrates the following features in a native module:
     - using floats
+    - calling math functions from libm.a
     - defining additional code in Python (see test.py)
     - have extra C code in a separate file (see prod.c)
 */
@@ -10,6 +11,9 @@
 // Include the header for auxiliary C code for this module
 #include "prod.h"
 
+// Include standard library header
+#include <math.h>
+
 // Automatically detect if this module should include double-precision code.
 // If double precision is supported by the target architecture then it can
 // be used in native module regardless of what float setting the target
@@ -41,6 +45,12 @@ static mp_obj_t add_d(mp_obj_t x, mp_obj_t y) {
 static MP_DEFINE_CONST_FUN_OBJ_2(add_d_obj, add_d);
 #endif
 
+// A function that uses libm
+static mp_obj_t call_round(mp_obj_t x) {
+    return mp_obj_new_float_from_f(roundf(mp_obj_get_float_to_f(x)));
+}
+static MP_DEFINE_CONST_FUN_OBJ_1(round_obj, call_round);
+
 // A function that computes the product of floats in an array.
 // This function uses the most general C argument interface, which is more difficult
 // to use but has access to the globals dict of the module via self->globals.
@@ -74,6 +84,7 @@ mp_obj_t mpy_init(mp_obj_fun_bc_t *self, size_t n_args, size_t n_kw, mp_obj_t *a
     #if USE_DOUBLE
     mp_store_global(MP_QSTR_add_d, MP_OBJ_FROM_PTR(&add_d_obj));
     #endif
+    mp_store_global(MP_QSTR_round, MP_OBJ_FROM_PTR(&round_obj));
 
     // The productf function uses the most general C argument interface
     mp_store_global(MP_QSTR_productf, MP_DYNRUNTIME_MAKE_FUNCTION(productf));
diff --git a/examples/natmod/framebuf/Makefile b/examples/natmod/framebuf/Makefile
index 2e2b815975432..cb821736e70dc 100644
--- a/examples/natmod/framebuf/Makefile
+++ b/examples/natmod/framebuf/Makefile
@@ -8,6 +8,10 @@ MOD = framebuf_$(ARCH)
 SRC = framebuf.c
 
 # Architecture to build for (x86, x64, armv7m, xtensa, xtensawin)
-ARCH = x64
+ARCH ?= x64
+
+ifeq ($(ARCH),xtensa)
+MPY_EXTERN_SYM_FILE=$(MPY_DIR)/ports/esp8266/boards/eagle.rom.addr.v6.ld
+endif
 
 include $(MPY_DIR)/py/dynruntime.mk
diff --git a/examples/natmod/framebuf/framebuf.c b/examples/natmod/framebuf/framebuf.c
index 1ba702e33d907..5fd7c6be3a456 100644
--- a/examples/natmod/framebuf/framebuf.c
+++ b/examples/natmod/framebuf/framebuf.c
@@ -4,6 +4,9 @@
 #include "py/dynruntime.h"
 
 #if !defined(__linux__)
+void *memcpy(void *dst, const void *src, size_t n) {
+    return mp_fun_table.memmove_(dst, src, n);
+}
 void *memset(void *s, int c, size_t n) {
     return mp_fun_table.memset_(s, c, n);
 }
diff --git a/examples/natmod/random/Makefile b/examples/natmod/random/Makefile
index 8abdb66dc8724..5d23eac1e9cfd 100644
--- a/examples/natmod/random/Makefile
+++ b/examples/natmod/random/Makefile
@@ -8,6 +8,10 @@ MOD = random_$(ARCH)
 SRC = random.c
 
 # Architecture to build for (x86, x64, armv7m, xtensa, xtensawin, rv32imc)
-ARCH = x64
+ARCH ?= x64
+
+ifeq ($(ARCH),xtensa)
+MPY_EXTERN_SYM_FILE=$(MPY_DIR)/ports/esp8266/boards/eagle.rom.addr.v6.ld
+endif
 
 include $(MPY_DIR)/py/dynruntime.mk
diff --git a/examples/usercmodule/cexample/examplemodule.c b/examples/usercmodule/cexample/examplemodule.c
index d13515e72cdd5..83cc3b27c058e 100644
--- a/examples/usercmodule/cexample/examplemodule.c
+++ b/examples/usercmodule/cexample/examplemodule.c
@@ -74,7 +74,7 @@ MP_DEFINE_CONST_OBJ_TYPE(
 // - A custom representation for __repr__ and __str__.
 // - Custom attribute handling to create a read/write "property".
 //
-// It re-uses some of the elements of the basic Timer class. This is allowed
+// It reuses some of the elements of the basic Timer class. This is allowed
 // because they both use example_Timer_obj_t as the instance structure.
 
 // Handles AdvancedTimer.__repr__, AdvancedTimer.__str__.
diff --git a/extmod/asyncio/core.py b/extmod/asyncio/core.py
index 8aad234514b0c..5d46b4b80e2a1 100644
--- a/extmod/asyncio/core.py
+++ b/extmod/asyncio/core.py
@@ -163,9 +163,16 @@ def run_until_complete(main_task=None):
                 # A task waiting on _task_queue; "ph_key" is time to schedule task at
                 dt = max(0, ticks_diff(t.ph_key, ticks()))
             elif not _io_queue.map:
-                # No tasks can be woken so finished running
+                # No tasks can be woken
                 cur_task = None
-                return
+                if not main_task or not main_task.state:
+                    # no main_task, or main_task is done so finished running
+                    return
+                # At this point, there is theoretically nothing that could wake the
+                # scheduler, but it is not allowed to exit either. We keep the code
+                # running so that a hypothetical debugger (or other such meta-process)
+                # can get a view of what is happening and possibly abort.
+                dt = 3
             # print('(poll {})'.format(dt), len(_io_queue.map))
             _io_queue.wait_io_event(dt)
 
@@ -187,31 +194,33 @@ def run_until_complete(main_task=None):
         except excs_all as er:
             # Check the task is not on any event queue
             assert t.data is None
-            # This task is done, check if it's the main task and then loop should stop
-            if t is main_task:
+            # If it's the main task, it is considered as awaited by the caller
+            awaited = t is main_task
+            if awaited:
                 cur_task = None
-                if isinstance(er, StopIteration):
-                    return er.value
-                raise er
+                if not isinstance(er, StopIteration):
+                    t.state = False
+                    raise er
+                if t.state is None:
+                    t.state = False
             if t.state:
                 # Task was running but is now finished.
-                waiting = False
                 if t.state is True:
                     # "None" indicates that the task is complete and not await'ed on (yet).
-                    t.state = None
+                    t.state = False if awaited else None
                 elif callable(t.state):
                     # The task has a callback registered to be called on completion.
                     t.state(t, er)
                     t.state = False
-                    waiting = True
+                    awaited = True
                 else:
                     # Schedule any other tasks waiting on the completion of this task.
                     while t.state.peek():
                         _task_queue.push(t.state.pop())
-                        waiting = True
+                        awaited = True
                     # "False" indicates that the task is complete and has been await'ed on.
                     t.state = False
-                if not waiting and not isinstance(er, excs_stop):
+                if not awaited and not isinstance(er, excs_stop):
                     # An exception ended this detached task, so queue it for later
                     # execution to handle the uncaught exception if no other task retrieves
                     # the exception in the meantime (this is handled by Task.throw).
@@ -229,6 +238,9 @@ def run_until_complete(main_task=None):
                 _exc_context["exception"] = exc
                 _exc_context["future"] = t
                 Loop.call_exception_handler(_exc_context)
+            # If it's the main task then the loop should stop
+            if t is main_task:
+                return er.value
 
 
 # Create a new task from a coroutine and run it until it finishes
diff --git a/extmod/btstack/modbluetooth_btstack.c b/extmod/btstack/modbluetooth_btstack.c
index b29970842ceb9..7694a1874f40b 100644
--- a/extmod/btstack/modbluetooth_btstack.c
+++ b/extmod/btstack/modbluetooth_btstack.c
@@ -705,12 +705,12 @@ int mp_bluetooth_init(void) {
     return 0;
 }
 
-void mp_bluetooth_deinit(void) {
+int mp_bluetooth_deinit(void) {
     DEBUG_printf("mp_bluetooth_deinit\n");
 
     // Nothing to do if not initialised.
     if (!MP_STATE_PORT(bluetooth_btstack_root_pointers)) {
-        return;
+        return 0;
     }
 
     mp_bluetooth_gap_advertise_stop();
@@ -737,6 +737,9 @@ void mp_bluetooth_deinit(void) {
     deinit_stack();
 
     DEBUG_printf("mp_bluetooth_deinit: complete\n");
+
+    bool timeout = mp_bluetooth_btstack_state == MP_BLUETOOTH_BTSTACK_STATE_TIMEOUT;
+    return timeout ? MP_ETIMEDOUT : 0;
 }
 
 bool mp_bluetooth_is_active(void) {
diff --git a/extmod/cyw43_config_common.h b/extmod/cyw43_config_common.h
new file mode 100644
index 0000000000000..595af37d71318
--- /dev/null
+++ b/extmod/cyw43_config_common.h
@@ -0,0 +1,126 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2025 Damien P. George, Angus Gratton
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#ifndef MICROPY_INCLUDED_EXTMOD_CYW43_CONFIG_COMMON_H
+#define MICROPY_INCLUDED_EXTMOD_CYW43_CONFIG_COMMON_H
+
+// The board-level config will be included here, so it can set some CYW43 values.
+#include "py/mpconfig.h"
+#include "py/mperrno.h"
+#include "py/mphal.h"
+#include "py/runtime.h"
+#include "extmod/modnetwork.h"
+#include "lwip/apps/mdns.h"
+#include "pendsv.h"
+
+// This file is included at the top of port-specific cyw43_configport.h files,
+// and holds the MicroPython-specific but non-port-specific parts.
+//
+// It's included into both MicroPython sources and the lib/cyw43-driver sources.
+
+#define CYW43_IOCTL_TIMEOUT_US          (1000000)
+#define CYW43_NETUTILS                  (1)
+#define CYW43_PRINTF(...)               mp_printf(MP_PYTHON_PRINTER, __VA_ARGS__)
+
+#define CYW43_EPERM                     MP_EPERM // Operation not permitted
+#define CYW43_EIO                       MP_EIO // I/O error
+#define CYW43_EINVAL                    MP_EINVAL // Invalid argument
+#define CYW43_ETIMEDOUT                 MP_ETIMEDOUT // Connection timed out
+
+#define CYW43_THREAD_ENTER              MICROPY_PY_LWIP_ENTER
+#define CYW43_THREAD_EXIT               MICROPY_PY_LWIP_EXIT
+#define CYW43_THREAD_LOCK_CHECK
+
+#define CYW43_HOST_NAME                 mod_network_hostname_data
+
+#define CYW43_ARRAY_SIZE(a)             MP_ARRAY_SIZE(a)
+
+#define CYW43_HAL_PIN_MODE_INPUT        MP_HAL_PIN_MODE_INPUT
+#define CYW43_HAL_PIN_MODE_OUTPUT       MP_HAL_PIN_MODE_OUTPUT
+#define CYW43_HAL_PIN_PULL_NONE         MP_HAL_PIN_PULL_NONE
+#define CYW43_HAL_PIN_PULL_UP           MP_HAL_PIN_PULL_UP
+#define CYW43_HAL_PIN_PULL_DOWN         MP_HAL_PIN_PULL_DOWN
+
+#define CYW43_HAL_MAC_WLAN0             MP_HAL_MAC_WLAN0
+#define CYW43_HAL_MAC_BDADDR            MP_HAL_MAC_BDADDR
+
+#define cyw43_hal_ticks_us              mp_hal_ticks_us
+#define cyw43_hal_ticks_ms              mp_hal_ticks_ms
+
+#define cyw43_hal_pin_obj_t             mp_hal_pin_obj_t
+#define cyw43_hal_pin_config            mp_hal_pin_config
+#define cyw43_hal_pin_read              mp_hal_pin_read
+#define cyw43_hal_pin_low               mp_hal_pin_low
+#define cyw43_hal_pin_high              mp_hal_pin_high
+
+#define cyw43_hal_get_mac               mp_hal_get_mac
+#define cyw43_hal_get_mac_ascii         mp_hal_get_mac_ascii
+#define cyw43_hal_generate_laa_mac      mp_hal_generate_laa_mac
+
+#define cyw43_schedule_internal_poll_dispatch(func) pendsv_schedule_dispatch(PENDSV_DISPATCH_CYW43, func)
+
+// Note: this function is only called if CYW43_POST_POLL_HOOK is defined in cyw43_configport.h
+void cyw43_post_poll_hook(void);
+
+#ifdef MICROPY_EVENT_POLL_HOOK
+// Older style hook macros on some ports
+#define CYW43_EVENT_POLL_HOOK MICROPY_EVENT_POLL_HOOK
+#else
+// Newer style hooks on other ports
+#define CYW43_EVENT_POLL_HOOK mp_event_handle_nowait()
+#endif
+
+static inline void cyw43_delay_us(uint32_t us) {
+    uint32_t start = mp_hal_ticks_us();
+    while (mp_hal_ticks_us() - start < us) {
+    }
+}
+
+static inline void cyw43_delay_ms(uint32_t ms) {
+    // PendSV may be disabled via CYW43_THREAD_ENTER, so this delay is a busy loop.
+    uint32_t us = ms * 1000;
+    uint32_t start = mp_hal_ticks_us();
+    while (mp_hal_ticks_us() - start < us) {
+        CYW43_EVENT_POLL_HOOK;
+    }
+}
+
+#if LWIP_MDNS_RESPONDER == 1
+
+// Hook for any additional TCP/IP initialization than needs to be done.
+// Called after the netif specified by `itf` has been set up.
+#ifndef CYW43_CB_TCPIP_INIT_EXTRA
+#define CYW43_CB_TCPIP_INIT_EXTRA(self, itf) mdns_resp_add_netif(&self->netif[itf], mod_network_hostname_data)
+#endif
+
+// Hook for any additional TCP/IP deinitialization than needs to be done.
+// Called before the netif specified by `itf` is removed.
+#ifndef CYW43_CB_TCPIP_DEINIT_EXTRA
+#define CYW43_CB_TCPIP_DEINIT_EXTRA(self, itf) mdns_resp_remove_netif(&self->netif[itf])
+#endif
+
+#endif
+
+#endif // MICROPY_INCLUDED_EXTMOD_CYW43_CONFIG_COMMON_H
diff --git a/extmod/extmod.cmake b/extmod/extmod.cmake
index 3643f1aee7bf5..7cacd0a43329e 100644
--- a/extmod/extmod.cmake
+++ b/extmod/extmod.cmake
@@ -107,62 +107,57 @@ set(MICROPY_SOURCE_LIB_LIBM_SQRT_HW ${MICROPY_DIR}/lib/libm/thumb_vfp_sqrtf.c)
 
 if(MICROPY_PY_BTREE)
     set(MICROPY_LIB_BERKELEY_DIR "${MICROPY_DIR}/lib/berkeley-db-1.xx")
-    string(CONCAT GIT_SUBMODULES "${GIT_SUBMODULES} " lib/berkeley-db-1.xx)
+    list(APPEND GIT_SUBMODULES lib/berkeley-db-1.xx)
 
-    if(ECHO_SUBMODULES)
-        # No-op, we're just doing submodule/variant discovery.
-        # Cannot run the add_library/target_include_directories rules (even though
-        # the build won't run) because IDF will attempt verify the files exist.
-    elseif(NOT EXISTS ${MICROPY_LIB_BERKELEY_DIR}/README)
+    if(NOT UPDATE_SUBMODULES AND NOT EXISTS ${MICROPY_LIB_BERKELEY_DIR}/README)
         # Regular build, submodule not initialised -- fail with a clear error.
         message(FATAL_ERROR " MICROPY_PY_BTREE is enabled but the berkeley-db submodule is not initialised.\n Run 'make BOARD=${MICROPY_BOARD} submodules'")
-    else()
-        # Regular build, we have the submodule.
-        add_library(micropy_extmod_btree OBJECT
-            ${MICROPY_LIB_BERKELEY_DIR}/btree/bt_close.c
-            ${MICROPY_LIB_BERKELEY_DIR}/btree/bt_conv.c
-            ${MICROPY_LIB_BERKELEY_DIR}/btree/bt_debug.c
-            ${MICROPY_LIB_BERKELEY_DIR}/btree/bt_delete.c
-            ${MICROPY_LIB_BERKELEY_DIR}/btree/bt_get.c
-            ${MICROPY_LIB_BERKELEY_DIR}/btree/bt_open.c
-            ${MICROPY_LIB_BERKELEY_DIR}/btree/bt_overflow.c
-            ${MICROPY_LIB_BERKELEY_DIR}/btree/bt_page.c
-            ${MICROPY_LIB_BERKELEY_DIR}/btree/bt_put.c
-            ${MICROPY_LIB_BERKELEY_DIR}/btree/bt_search.c
-            ${MICROPY_LIB_BERKELEY_DIR}/btree/bt_seq.c
-            ${MICROPY_LIB_BERKELEY_DIR}/btree/bt_split.c
-            ${MICROPY_LIB_BERKELEY_DIR}/btree/bt_utils.c
-            ${MICROPY_LIB_BERKELEY_DIR}/mpool/mpool.c
-        )
+    endif()
 
-        target_include_directories(micropy_extmod_btree PRIVATE
-            ${MICROPY_LIB_BERKELEY_DIR}/include
-        )
+    add_library(micropy_extmod_btree OBJECT
+        ${MICROPY_LIB_BERKELEY_DIR}/btree/bt_close.c
+        ${MICROPY_LIB_BERKELEY_DIR}/btree/bt_conv.c
+        ${MICROPY_LIB_BERKELEY_DIR}/btree/bt_debug.c
+        ${MICROPY_LIB_BERKELEY_DIR}/btree/bt_delete.c
+        ${MICROPY_LIB_BERKELEY_DIR}/btree/bt_get.c
+        ${MICROPY_LIB_BERKELEY_DIR}/btree/bt_open.c
+        ${MICROPY_LIB_BERKELEY_DIR}/btree/bt_overflow.c
+        ${MICROPY_LIB_BERKELEY_DIR}/btree/bt_page.c
+        ${MICROPY_LIB_BERKELEY_DIR}/btree/bt_put.c
+        ${MICROPY_LIB_BERKELEY_DIR}/btree/bt_search.c
+        ${MICROPY_LIB_BERKELEY_DIR}/btree/bt_seq.c
+        ${MICROPY_LIB_BERKELEY_DIR}/btree/bt_split.c
+        ${MICROPY_LIB_BERKELEY_DIR}/btree/bt_utils.c
+        ${MICROPY_LIB_BERKELEY_DIR}/mpool/mpool.c
+    )
 
-        if(NOT BERKELEY_DB_CONFIG_FILE)
-            set(BERKELEY_DB_CONFIG_FILE "${MICROPY_DIR}/extmod/berkeley-db/berkeley_db_config_port.h")
-        endif()
+    target_include_directories(micropy_extmod_btree PRIVATE
+        ${MICROPY_LIB_BERKELEY_DIR}/include
+    )
 
-        target_compile_definitions(micropy_extmod_btree PRIVATE
-            BERKELEY_DB_CONFIG_FILE="${BERKELEY_DB_CONFIG_FILE}"
-        )
+    if(NOT BERKELEY_DB_CONFIG_FILE)
+        set(BERKELEY_DB_CONFIG_FILE "${MICROPY_DIR}/extmod/berkeley-db/berkeley_db_config_port.h")
+    endif()
 
-        # The include directories and compile definitions below are needed to build
-        # modbtree.c and should be added to the main MicroPython target.
+    target_compile_definitions(micropy_extmod_btree PRIVATE
+        BERKELEY_DB_CONFIG_FILE="${BERKELEY_DB_CONFIG_FILE}"
+    )
 
-        list(APPEND MICROPY_INC_CORE
-            "${MICROPY_LIB_BERKELEY_DIR}/include"
-        )
+    # The include directories and compile definitions below are needed to build
+    # modbtree.c and should be added to the main MicroPython target.
 
-        list(APPEND MICROPY_DEF_CORE
-            MICROPY_PY_BTREE=1
-            BERKELEY_DB_CONFIG_FILE="${BERKELEY_DB_CONFIG_FILE}"
-        )
+    list(APPEND MICROPY_INC_CORE
+        "${MICROPY_LIB_BERKELEY_DIR}/include"
+    )
 
-        list(APPEND MICROPY_SOURCE_EXTMOD
-            ${MICROPY_EXTMOD_DIR}/modbtree.c
-        )
-    endif()
+    list(APPEND MICROPY_DEF_CORE
+        MICROPY_PY_BTREE=1
+        BERKELEY_DB_CONFIG_FILE="${BERKELEY_DB_CONFIG_FILE}"
+    )
+
+    list(APPEND MICROPY_SOURCE_EXTMOD
+        ${MICROPY_EXTMOD_DIR}/modbtree.c
+    )
 endif()
 
 # Library for mbedtls
@@ -350,5 +345,5 @@ if(MICROPY_PY_LWIP)
         ${MICROPY_LIB_LWIP_DIR}/include
     )
 
-    string(CONCAT GIT_SUBMODULES "${GIT_SUBMODULES} " lib/lwip)
+    list(APPEND GIT_SUBMODULES lib/lwip)
 endif()
diff --git a/extmod/extmod.mk b/extmod/extmod.mk
index a510f3c54c25c..997dd3ba98ead 100644
--- a/extmod/extmod.mk
+++ b/extmod/extmod.mk
@@ -206,7 +206,7 @@ endif
 
 ifeq ($(MICROPY_VFS_LFS2),1)
 CFLAGS_EXTMOD += -DMICROPY_VFS_LFS2=1
-CFLAGS_THIRDPARTY += -DLFS2_NO_MALLOC -DLFS2_NO_DEBUG -DLFS2_NO_WARN -DLFS2_NO_ERROR -DLFS2_NO_ASSERT
+CFLAGS_THIRDPARTY += -DLFS2_NO_MALLOC -DLFS2_NO_DEBUG -DLFS2_NO_WARN -DLFS2_NO_ERROR -DLFS2_NO_ASSERT -DLFS2_DEFINES=extmod/littlefs-include/lfs2_defines.h
 SRC_THIRDPARTY_C += $(addprefix $(LITTLEFS_DIR)/,\
 	lfs2.c \
 	lfs2_util.c \
@@ -454,15 +454,14 @@ CYW43_DIR = lib/cyw43-driver
 GIT_SUBMODULES += $(CYW43_DIR)
 CFLAGS_EXTMOD += -DMICROPY_PY_NETWORK_CYW43=1
 SRC_THIRDPARTY_C += $(addprefix $(CYW43_DIR)/src/,\
+	cyw43_bthci_uart.c \
 	cyw43_ctrl.c \
 	cyw43_lwip.c \
 	cyw43_ll.c \
 	cyw43_sdio.c \
+	cyw43_spi.c \
 	cyw43_stats.c \
 	)
-ifeq ($(MICROPY_PY_BLUETOOTH),1)
-DRIVERS_SRC_C += drivers/cyw43/cywbt.c
-endif
 
 $(BUILD)/$(CYW43_DIR)/src/cyw43_%.o: CFLAGS += -std=c11
 endif # MICROPY_PY_NETWORK_CYW43
@@ -505,7 +504,7 @@ ESP_HOSTED_SRC_C = $(addprefix $(ESP_HOSTED_DIR)/,\
 	)
 
 ifeq ($(MICROPY_PY_BLUETOOTH),1)
-ESP_HOSTED_SRC_C += $(ESP_HOSTED_DIR)/esp_hosted_bthci.c
+ESP_HOSTED_SRC_C += $(ESP_HOSTED_DIR)/esp_hosted_bthci_uart.c
 endif
 
 # Include the protobuf-c support functions
diff --git a/extmod/littlefs-include/lfs2_defines.h b/extmod/littlefs-include/lfs2_defines.h
new file mode 100644
index 0000000000000..4ae566f508afa
--- /dev/null
+++ b/extmod/littlefs-include/lfs2_defines.h
@@ -0,0 +1,12 @@
+#ifndef LFS2_DEFINES_H
+#define LFS2_DEFINES_H
+
+#include "py/mpconfig.h"
+
+#if MICROPY_PY_DEFLATE
+// We reuse the CRC32 implementation from uzlib to save a few bytes
+#include "lib/uzlib/uzlib.h"
+#define LFS2_CRC(crc, buffer, size) uzlib_crc32(buffer, size, crc)
+#endif
+
+#endif
\ No newline at end of file
diff --git a/extmod/machine_usb_device.c b/extmod/machine_usb_device.c
index 5c4e84c38d1fe..5019cd98779f5 100644
--- a/extmod/machine_usb_device.c
+++ b/extmod/machine_usb_device.c
@@ -108,7 +108,7 @@ static mp_obj_t usb_device_submit_xfer(mp_obj_t self, mp_obj_t ep, mp_obj_t buff
         //
         // This C layer doesn't otherwise keep track of which endpoints the host
         // is aware of (or not).
-        mp_raise_ValueError("ep");
+        mp_raise_ValueError(MP_ERROR_TEXT("ep"));
     }
 
     if (!usbd_edpt_claim(USBD_RHPORT, ep_addr)) {
diff --git a/extmod/modbluetooth.c b/extmod/modbluetooth.c
index 7049c35dfdf56..ffa407809aa71 100644
--- a/extmod/modbluetooth.c
+++ b/extmod/modbluetooth.c
@@ -290,12 +290,13 @@ static mp_obj_t bluetooth_ble_make_new(const mp_obj_type_t *type, size_t n_args,
 static mp_obj_t bluetooth_ble_active(size_t n_args, const mp_obj_t *args) {
     if (n_args == 2) {
         // Boolean enable/disable argument supplied, set current state.
+        int err;
         if (mp_obj_is_true(args[1])) {
-            int err = mp_bluetooth_init();
-            bluetooth_handle_errno(err);
+            err = mp_bluetooth_init();
         } else {
-            mp_bluetooth_deinit();
+            err = mp_bluetooth_deinit();
         }
+        bluetooth_handle_errno(err);
     }
     // Return current state.
     return mp_obj_new_bool(mp_bluetooth_is_active());
@@ -340,7 +341,7 @@ static mp_obj_t bluetooth_ble_config(size_t n_args, const mp_obj_t *args, mp_map
         }
 
         for (size_t i = 0; i < kwargs->alloc; ++i) {
-            if (MP_MAP_SLOT_IS_FILLED(kwargs, i)) {
+            if (mp_map_slot_is_filled(kwargs, i)) {
                 mp_map_elem_t *e = &kwargs->table[i];
                 switch (mp_obj_str_get_qstr(e->key)) {
                     case MP_QSTR_gap_name: {
diff --git a/extmod/modbluetooth.h b/extmod/modbluetooth.h
index 6a087c8e256cc..24f063fa5d617 100644
--- a/extmod/modbluetooth.h
+++ b/extmod/modbluetooth.h
@@ -295,7 +295,7 @@ extern const mp_obj_type_t mp_type_bluetooth_uuid;
 int mp_bluetooth_init(void);
 
 // Disables the Bluetooth stack. Is a no-op when not enabled.
-void mp_bluetooth_deinit(void);
+int mp_bluetooth_deinit(void);
 
 // Returns true when the Bluetooth stack is active.
 bool mp_bluetooth_is_active(void);
diff --git a/extmod/moddeflate.c b/extmod/moddeflate.c
index 4afad01618c4d..920b898b2ccc2 100644
--- a/extmod/moddeflate.c
+++ b/extmod/moddeflate.c
@@ -168,16 +168,20 @@ static bool deflateio_init_write(mp_obj_deflateio_t *self) {
 
     const mp_stream_p_t *stream = mp_get_stream_raise(self->stream, MP_STREAM_OP_WRITE);
 
-    self->write = m_new_obj(mp_obj_deflateio_write_t);
-    self->write->input_len = 0;
-
     int wbits = self->window_bits;
     if (wbits == 0) {
         // Same default wbits for all formats.
         wbits = DEFLATEIO_DEFAULT_WBITS;
     }
+
+    // Allocate the large window before allocating the mp_obj_deflateio_write_t, in case the
+    // window allocation fails the mp_obj_deflateio_t object will remain in a consistent state.
     size_t window_len = 1 << wbits;
-    self->write->window = m_new(uint8_t, window_len);
+    uint8_t *window = m_new(uint8_t, window_len);
+
+    self->write = m_new_obj(mp_obj_deflateio_write_t);
+    self->write->window = window;
+    self->write->input_len = 0;
 
     uzlib_lz77_init(&self->write->lz77, self->write->window, window_len);
     self->write->lz77.dest_write_data = self;
diff --git a/extmod/modframebuf.c b/extmod/modframebuf.c
index b718a66cc62fe..5c4b9abf0c0b8 100644
--- a/extmod/modframebuf.c
+++ b/extmod/modframebuf.c
@@ -270,8 +270,7 @@ static void fill_rect(const mp_obj_framebuf_t *fb, int x, int y, int w, int h, u
     formats[fb->format].fill_rect(fb, x, y, xend - x, yend - y, col);
 }
 
-static mp_obj_t framebuf_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args_in) {
-    mp_arg_check_num(n_args, n_kw, 4, 5, false);
+static mp_obj_t framebuf_make_new_helper(size_t n_args, const mp_obj_t *args_in, unsigned int buf_flags, mp_obj_framebuf_t *o) {
 
     mp_int_t width = mp_obj_get_int(args_in[1]);
     mp_int_t height = mp_obj_get_int(args_in[2]);
@@ -318,13 +317,15 @@ static mp_obj_t framebuf_make_new(const mp_obj_type_t *type, size_t n_args, size
     }
 
     mp_buffer_info_t bufinfo;
-    mp_get_buffer_raise(args_in[0], &bufinfo, MP_BUFFER_WRITE);
+    mp_get_buffer_raise(args_in[0], &bufinfo, buf_flags);
 
     if ((strides_required * stride + (height_required - strides_required) * width_required) * bpp / 8 > bufinfo.len) {
         mp_raise_ValueError(NULL);
     }
 
-    mp_obj_framebuf_t *o = mp_obj_malloc(mp_obj_framebuf_t, type);
+    if (o == NULL) {
+        o = mp_obj_malloc(mp_obj_framebuf_t, (const mp_obj_type_t *)&mp_type_framebuf);
+    }
     o->buf_obj = args_in[0];
     o->buf = bufinfo.buf;
     o->width = width;
@@ -335,6 +336,11 @@ static mp_obj_t framebuf_make_new(const mp_obj_type_t *type, size_t n_args, size
     return MP_OBJ_FROM_PTR(o);
 }
 
+static mp_obj_t framebuf_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args_in) {
+    mp_arg_check_num(n_args, n_kw, 4, 5, false);
+    return framebuf_make_new_helper(n_args, args_in, MP_BUFFER_WRITE, NULL);
+}
+
 static void framebuf_args(const mp_obj_t *args_in, mp_int_t *args_out, int n) {
     for (int i = 0; i < n; ++i) {
         args_out[i] = mp_obj_get_int(args_in[i + 1]);
@@ -707,13 +713,27 @@ static MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(framebuf_poly_obj, 5, 6, framebuf_pol
 
 #endif // MICROPY_PY_ARRAY
 
+static void get_readonly_framebuffer(mp_obj_t arg, mp_obj_framebuf_t *rofb) {
+    mp_obj_t fb = mp_obj_cast_to_native_base(arg, MP_OBJ_FROM_PTR(&mp_type_framebuf));
+    if (fb != MP_OBJ_NULL) {
+        *rofb = *(mp_obj_framebuf_t *)MP_OBJ_TO_PTR(fb);
+    } else {
+        // A tuple/list of the form: (buffer, width, height, format[, stride]).
+        size_t len;
+        mp_obj_t *items;
+        mp_obj_get_array(arg, &len, &items);
+        if (len < 4 || len > 5) {
+            mp_raise_ValueError(NULL);
+        }
+        framebuf_make_new_helper(len, items, MP_BUFFER_READ, rofb);
+    }
+}
+
 static mp_obj_t framebuf_blit(size_t n_args, const mp_obj_t *args_in) {
     mp_obj_framebuf_t *self = MP_OBJ_TO_PTR(args_in[0]);
-    mp_obj_t source_in = mp_obj_cast_to_native_base(args_in[1], MP_OBJ_FROM_PTR(&mp_type_framebuf));
-    if (source_in == MP_OBJ_NULL) {
-        mp_raise_TypeError(NULL);
-    }
-    mp_obj_framebuf_t *source = MP_OBJ_TO_PTR(source_in);
+
+    mp_obj_framebuf_t source;
+    get_readonly_framebuffer(args_in[1], &source);
 
     mp_int_t x = mp_obj_get_int(args_in[2]);
     mp_int_t y = mp_obj_get_int(args_in[3]);
@@ -721,16 +741,17 @@ static mp_obj_t framebuf_blit(size_t n_args, const mp_obj_t *args_in) {
     if (n_args > 4) {
         key = mp_obj_get_int(args_in[4]);
     }
-    mp_obj_framebuf_t *palette = NULL;
+    mp_obj_framebuf_t palette;
+    palette.buf = NULL;
     if (n_args > 5 && args_in[5] != mp_const_none) {
-        palette = MP_OBJ_TO_PTR(mp_obj_cast_to_native_base(args_in[5], MP_OBJ_FROM_PTR(&mp_type_framebuf)));
+        get_readonly_framebuffer(args_in[5], &palette);
     }
 
     if (
         (x >= self->width) ||
         (y >= self->height) ||
-        (-x >= source->width) ||
-        (-y >= source->height)
+        (-x >= source.width) ||
+        (-y >= source.height)
         ) {
         // Out of bounds, no-op.
         return mp_const_none;
@@ -741,15 +762,15 @@ static mp_obj_t framebuf_blit(size_t n_args, const mp_obj_t *args_in) {
     int y0 = MAX(0, y);
     int x1 = MAX(0, -x);
     int y1 = MAX(0, -y);
-    int x0end = MIN(self->width, x + source->width);
-    int y0end = MIN(self->height, y + source->height);
+    int x0end = MIN(self->width, x + source.width);
+    int y0end = MIN(self->height, y + source.height);
 
     for (; y0 < y0end; ++y0) {
         int cx1 = x1;
         for (int cx0 = x0; cx0 < x0end; ++cx0) {
-            uint32_t col = getpixel(source, cx1, y1);
-            if (palette) {
-                col = getpixel(palette, col, 0);
+            uint32_t col = getpixel(&source, cx1, y1);
+            if (palette.buf) {
+                col = getpixel(&palette, col, 0);
             }
             if (col != (uint32_t)key) {
                 setpixel(self, cx0, y0, col);
diff --git a/extmod/modjson.c b/extmod/modjson.c
index e655a02bc00ef..11aedd1983380 100644
--- a/extmod/modjson.c
+++ b/extmod/modjson.c
@@ -160,7 +160,8 @@ static mp_obj_t mod_json_load(mp_obj_t stream_obj) {
     for (;;) {
     cont:
         if (S_END(s)) {
-            break;
+            // Input finished abruptly in the middle of a composite entity.
+            goto fail;
         }
         mp_obj_t next = MP_OBJ_NULL;
         bool enter = false;
diff --git a/extmod/modlwip.c b/extmod/modlwip.c
index bcccd363e673c..65a3412ecb801 100644
--- a/extmod/modlwip.c
+++ b/extmod/modlwip.c
@@ -70,6 +70,10 @@
 
 #define TCP_NODELAY TF_NODELAY
 
+// Socket flags
+#define MSG_PEEK     0x01
+#define MSG_DONTWAIT 0x02
+
 // For compatibilily with older lwIP versions.
 #ifndef ip_set_option
 #define ip_set_option(pcb, opt)   ((pcb)->so_options |= (opt))
@@ -286,6 +290,15 @@ static const int error_lookup_table[] = {
 #define MOD_NETWORK_SOCK_DGRAM (2)
 #define MOD_NETWORK_SOCK_RAW (3)
 
+// Total queue length for buffered UDP/raw incoming packets.
+#define LWIP_INCOMING_PACKET_QUEUE_LEN (4)
+
+typedef struct _lwip_incoming_packet_t {
+    struct pbuf *pbuf;
+    ip_addr_t peer_addr;
+    uint16_t peer_port;
+} lwip_incoming_packet_t;
+
 typedef struct _lwip_socket_obj_t {
     mp_obj_base_t base;
 
@@ -294,8 +307,11 @@ typedef struct _lwip_socket_obj_t {
         struct udp_pcb *udp;
         struct raw_pcb *raw;
     } pcb;
+
+    // Data structure that holds incoming pbuf's.
+    // Each socket type has different state that it needs to keep track of.
     volatile union {
-        struct pbuf *pbuf;
+        // TCP listening sockets have a queue of incoming connections, implemented as a ringbuffer.
         struct {
             uint8_t alloc;
             uint8_t iget;
@@ -305,10 +321,23 @@ typedef struct _lwip_socket_obj_t {
                 struct tcp_pcb **array; // if alloc != 0
             } tcp;
         } connection;
+
+        // Connected TCP sockets have a single incoming pbuf that new data is appended to.
+        struct {
+            struct pbuf *pbuf;
+        } tcp;
+
+        // UDP and raw sockets have a queue of incoming pbuf's, implemented as a ringbuffer.
+        struct {
+            uint8_t iget; // ringbuffer read index
+            uint8_t iput; // ringbuffer write index
+            lwip_incoming_packet_t *array;
+        } udp_raw;
     } incoming;
+
     mp_obj_t callback;
-    ip_addr_t peer;
-    mp_uint_t peer_port;
+    ip_addr_t tcp_peer_addr;
+    mp_uint_t tcp_peer_port;
     mp_uint_t timeout;
     uint16_t recv_offset;
 
@@ -347,9 +376,21 @@ static void lwip_socket_free_incoming(lwip_socket_obj_t *socket) {
         && socket->pcb.tcp->state == LISTEN;
 
     if (!socket_is_listener) {
-        if (socket->incoming.pbuf != NULL) {
-            pbuf_free(socket->incoming.pbuf);
-            socket->incoming.pbuf = NULL;
+        if (socket->type == MOD_NETWORK_SOCK_STREAM) {
+            if (socket->incoming.tcp.pbuf != NULL) {
+                pbuf_free(socket->incoming.tcp.pbuf);
+                socket->incoming.tcp.pbuf = NULL;
+            }
+        } else {
+            for (size_t i = 0; i < LWIP_INCOMING_PACKET_QUEUE_LEN; ++i) {
+                lwip_incoming_packet_t *slot = &socket->incoming.udp_raw.array[i];
+                if (slot->pbuf != NULL) {
+                    pbuf_free(slot->pbuf);
+                    slot->pbuf = NULL;
+                }
+            }
+            socket->incoming.udp_raw.iget = 0;
+            socket->incoming.udp_raw.iput = 0;
         }
     } else {
         uint8_t alloc = socket->incoming.connection.alloc;
@@ -407,6 +448,19 @@ static inline void exec_user_callback(lwip_socket_obj_t *socket) {
     }
 }
 
+static void udp_raw_incoming(lwip_socket_obj_t *socket, struct pbuf *p, const ip_addr_t *addr, u16_t port) {
+    lwip_incoming_packet_t *slot = &socket->incoming.udp_raw.array[socket->incoming.udp_raw.iput];
+    if (slot->pbuf != NULL) {
+        // No room in the inn, drop the packet.
+        pbuf_free(p);
+    } else {
+        slot->pbuf = p;
+        slot->peer_addr = *addr;
+        slot->peer_port = port;
+        socket->incoming.udp_raw.iput = (socket->incoming.udp_raw.iput + 1) % LWIP_INCOMING_PACKET_QUEUE_LEN;
+    }
+}
+
 #if MICROPY_PY_LWIP_SOCK_RAW
 // Callback for incoming raw packets.
 #if LWIP_VERSION_MAJOR < 2
@@ -416,13 +470,7 @@ static u8_t _lwip_raw_incoming(void *arg, struct raw_pcb *pcb, struct pbuf *p, c
 #endif
 {
     lwip_socket_obj_t *socket = (lwip_socket_obj_t *)arg;
-
-    if (socket->incoming.pbuf != NULL) {
-        pbuf_free(p);
-    } else {
-        socket->incoming.pbuf = p;
-        memcpy(&socket->peer, addr, sizeof(socket->peer));
-    }
+    udp_raw_incoming(socket, p, addr, 0);
     return 1; // we ate the packet
 }
 #endif
@@ -436,15 +484,7 @@ static void _lwip_udp_incoming(void *arg, struct udp_pcb *upcb, struct pbuf *p,
 #endif
 {
     lwip_socket_obj_t *socket = (lwip_socket_obj_t *)arg;
-
-    if (socket->incoming.pbuf != NULL) {
-        // That's why they call it "unreliable". No room in the inn, drop the packet.
-        pbuf_free(p);
-    } else {
-        socket->incoming.pbuf = p;
-        socket->peer_port = (mp_uint_t)port;
-        memcpy(&socket->peer, addr, sizeof(socket->peer));
-    }
+    udp_raw_incoming(socket, p, addr, port);
 }
 
 // Callback for general tcp errors.
@@ -476,7 +516,7 @@ static void _lwip_tcp_err_unaccepted(void *arg, err_t err) {
     // because it's only ever used by lwIP if tcp_connect is called on the TCP PCB.
     lwip_socket_obj_t *socket = (lwip_socket_obj_t *)pcb->connected;
 
-    // Array is not volatile because thiss callback is executed within the lwIP context
+    // Array is not volatile because this callback is executed within the lwIP context
     uint8_t alloc = socket->incoming.connection.alloc;
     struct tcp_pcb **tcp_array = (struct tcp_pcb **)lwip_socket_incoming_array(socket);
 
@@ -562,13 +602,13 @@ static err_t _lwip_tcp_recv(void *arg, struct tcp_pcb *tcpb, struct pbuf *p, err
         return ERR_OK;
     }
 
-    if (socket->incoming.pbuf == NULL) {
-        socket->incoming.pbuf = p;
+    if (socket->incoming.tcp.pbuf == NULL) {
+        socket->incoming.tcp.pbuf = p;
     } else {
         #ifdef SOCKET_SINGLE_PBUF
         return ERR_BUF;
         #else
-        pbuf_cat(socket->incoming.pbuf, p);
+        pbuf_cat(socket->incoming.tcp.pbuf, p);
         #endif
     }
 
@@ -637,18 +677,20 @@ static mp_uint_t lwip_raw_udp_send(lwip_socket_obj_t *socket, const byte *buf, m
 }
 
 // Helper function for recv/recvfrom to handle raw/UDP packets
-static mp_uint_t lwip_raw_udp_receive(lwip_socket_obj_t *socket, byte *buf, mp_uint_t len, ip_addr_t *ip, mp_uint_t *port, int *_errno) {
+static mp_uint_t lwip_raw_udp_receive(lwip_socket_obj_t *socket, byte *buf, mp_uint_t len, mp_int_t flags, ip_addr_t *ip, mp_uint_t *port, int *_errno) {
 
-    if (socket->incoming.pbuf == NULL) {
-        if (socket->timeout == 0) {
-            // Non-blocking socket.
+    lwip_incoming_packet_t *slot = &socket->incoming.udp_raw.array[socket->incoming.udp_raw.iget];
+
+    if (slot->pbuf == NULL) {
+        // Non-blocking socket or flag
+        if (socket->timeout == 0 || (flags & MSG_DONTWAIT)) {
             *_errno = MP_EAGAIN;
             return -1;
         }
 
         // Wait for data to arrive on UDP socket.
         mp_uint_t start = mp_hal_ticks_ms();
-        while (socket->incoming.pbuf == NULL) {
+        while (slot->pbuf == NULL) {
             if (socket->timeout != -1 && mp_hal_ticks_ms() - start > socket->timeout) {
                 *_errno = MP_ETIMEDOUT;
                 return -1;
@@ -658,17 +700,20 @@ static mp_uint_t lwip_raw_udp_receive(lwip_socket_obj_t *socket, byte *buf, mp_u
     }
 
     if (ip != NULL) {
-        memcpy(ip, &socket->peer, sizeof(socket->peer));
-        *port = socket->peer_port;
+        *ip = slot->peer_addr;
+        *port = slot->peer_port;
     }
 
-    struct pbuf *p = socket->incoming.pbuf;
+    struct pbuf *p = slot->pbuf;
 
     MICROPY_PY_LWIP_ENTER
 
     u16_t result = pbuf_copy_partial(p, buf, ((p->tot_len > len) ? len : p->tot_len), 0);
-    pbuf_free(p);
-    socket->incoming.pbuf = NULL;
+    if ((flags & MSG_PEEK) == 0) {
+        pbuf_free(p);
+        slot->pbuf = NULL;
+        socket->incoming.udp_raw.iget = (socket->incoming.udp_raw.iget + 1) % LWIP_INCOMING_PACKET_QUEUE_LEN;
+    }
 
     MICROPY_PY_LWIP_EXIT
 
@@ -776,14 +821,14 @@ static mp_uint_t lwip_tcp_send(lwip_socket_obj_t *socket, const byte *buf, mp_ui
 }
 
 // Helper function for recv/recvfrom to handle TCP packets
-static mp_uint_t lwip_tcp_receive(lwip_socket_obj_t *socket, byte *buf, mp_uint_t len, int *_errno) {
+static mp_uint_t lwip_tcp_receive(lwip_socket_obj_t *socket, byte *buf, mp_uint_t len, mp_int_t flags, int *_errno) {
     // Check for any pending errors
     STREAM_ERROR_CHECK(socket);
 
-    if (socket->incoming.pbuf == NULL) {
+    if (socket->incoming.tcp.pbuf == NULL) {
 
-        // Non-blocking socket
-        if (socket->timeout == 0) {
+        // Non-blocking socket or flag
+        if (socket->timeout == 0 || (flags & MSG_DONTWAIT)) {
             if (socket->state == STATE_PEER_CLOSED) {
                 return 0;
             }
@@ -792,7 +837,7 @@ static mp_uint_t lwip_tcp_receive(lwip_socket_obj_t *socket, byte *buf, mp_uint_
         }
 
         mp_uint_t start = mp_hal_ticks_ms();
-        while (socket->state == STATE_CONNECTED && socket->incoming.pbuf == NULL) {
+        while (socket->state == STATE_CONNECTED && socket->incoming.tcp.pbuf == NULL) {
             if (socket->timeout != -1 && mp_hal_ticks_ms() - start > socket->timeout) {
                 *_errno = MP_ETIMEDOUT;
                 return -1;
@@ -801,7 +846,7 @@ static mp_uint_t lwip_tcp_receive(lwip_socket_obj_t *socket, byte *buf, mp_uint_
         }
 
         if (socket->state == STATE_PEER_CLOSED) {
-            if (socket->incoming.pbuf == NULL) {
+            if (socket->incoming.tcp.pbuf == NULL) {
                 // socket closed and no data left in buffer
                 return 0;
             }
@@ -819,7 +864,7 @@ static mp_uint_t lwip_tcp_receive(lwip_socket_obj_t *socket, byte *buf, mp_uint_
 
     assert(socket->pcb.tcp != NULL);
 
-    struct pbuf *p = socket->incoming.pbuf;
+    struct pbuf *p = socket->incoming.tcp.pbuf;
 
     mp_uint_t remaining = p->len - socket->recv_offset;
     if (len > remaining) {
@@ -828,19 +873,21 @@ static mp_uint_t lwip_tcp_receive(lwip_socket_obj_t *socket, byte *buf, mp_uint_
 
     memcpy(buf, (byte *)p->payload + socket->recv_offset, len);
 
-    remaining -= len;
-    if (remaining == 0) {
-        socket->incoming.pbuf = p->next;
-        // If we don't ref here, free() will free the entire chain,
-        // if we ref, it does what we need: frees 1st buf, and decrements
-        // next buf's refcount back to 1.
-        pbuf_ref(p->next);
-        pbuf_free(p);
-        socket->recv_offset = 0;
-    } else {
-        socket->recv_offset += len;
+    if ((flags & MSG_PEEK) == 0) {
+        remaining -= len;
+        if (remaining == 0) {
+            socket->incoming.tcp.pbuf = p->next;
+            // If we don't ref here, free() will free the entire chain,
+            // if we ref, it does what we need: frees 1st buf, and decrements
+            // next buf's refcount back to 1.
+            pbuf_ref(p->next);
+            pbuf_free(p);
+            socket->recv_offset = 0;
+        } else {
+            socket->recv_offset += len;
+        }
+        tcp_recved(socket->pcb.tcp, len);
     }
-    tcp_recved(socket->pcb.tcp, len);
 
     MICROPY_PY_LWIP_EXIT
 
@@ -854,8 +901,18 @@ static const mp_obj_type_t lwip_socket_type;
 
 static void lwip_socket_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
     lwip_socket_obj_t *self = MP_OBJ_TO_PTR(self_in);
-    mp_printf(print, "<socket state=%d timeout=%d incoming=%p off=%d>", self->state, self->timeout,
-        self->incoming.pbuf, self->recv_offset);
+    mp_printf(print, "<socket state=%d timeout=%d incoming=", self->state, self->timeout);
+    if (self->type == MOD_NETWORK_SOCK_STREAM) {
+        mp_printf(print, "%p off=%d>", self->incoming.tcp.pbuf, self->recv_offset);
+    } else {
+        int num_in_queue = 0;
+        for (size_t i = 0; i < LWIP_INCOMING_PACKET_QUEUE_LEN; ++i) {
+            if (self->incoming.udp_raw.array[i].pbuf != NULL) {
+                ++num_in_queue;
+            }
+        }
+        mp_printf(print, "%d>", num_in_queue);
+    }
 }
 
 // FIXME: Only supports two arguments at present
@@ -884,16 +941,22 @@ static mp_obj_t lwip_socket_make_new(const mp_obj_type_t *type, size_t n_args, s
             socket->incoming.connection.tcp.item = NULL;
             break;
         case MOD_NETWORK_SOCK_DGRAM:
-            socket->pcb.udp = udp_new();
-            socket->incoming.pbuf = NULL;
-            break;
         #if MICROPY_PY_LWIP_SOCK_RAW
-        case MOD_NETWORK_SOCK_RAW: {
-            mp_int_t proto = n_args <= 2 ? 0 : mp_obj_get_int(args[2]);
-            socket->pcb.raw = raw_new(proto);
-            break;
-        }
+        case MOD_NETWORK_SOCK_RAW:
         #endif
+            if (socket->type == MOD_NETWORK_SOCK_DGRAM) {
+                socket->pcb.udp = udp_new();
+            }
+            #if MICROPY_PY_LWIP_SOCK_RAW
+            else {
+                mp_int_t proto = n_args <= 2 ? 0 : mp_obj_get_int(args[2]);
+                socket->pcb.raw = raw_new(proto);
+            }
+            #endif
+            socket->incoming.udp_raw.iget = 0;
+            socket->incoming.udp_raw.iput = 0;
+            socket->incoming.udp_raw.array = m_new0(lwip_incoming_packet_t, LWIP_INCOMING_PACKET_QUEUE_LEN);
+            break;
         default:
             mp_raise_OSError(MP_EINVAL);
     }
@@ -1075,7 +1138,7 @@ static mp_obj_t lwip_socket_accept(mp_obj_t self_in) {
     // ...and set up the new socket for it.
     socket2->domain = MOD_NETWORK_AF_INET;
     socket2->type = MOD_NETWORK_SOCK_STREAM;
-    socket2->incoming.pbuf = NULL;
+    socket2->incoming.tcp.pbuf = NULL;
     socket2->timeout = socket->timeout;
     socket2->state = STATE_CONNECTED;
     socket2->recv_offset = 0;
@@ -1130,8 +1193,8 @@ static mp_obj_t lwip_socket_connect(mp_obj_t self_in, mp_obj_t addr_in) {
                 socket->state = STATE_NEW;
                 mp_raise_OSError(error_lookup_table[-err]);
             }
-            socket->peer_port = (mp_uint_t)port;
-            memcpy(&socket->peer, &dest, sizeof(socket->peer));
+            socket->tcp_peer_addr = dest;
+            socket->tcp_peer_port = (mp_uint_t)port;
             MICROPY_PY_LWIP_EXIT
 
             // And now we wait...
@@ -1216,40 +1279,58 @@ static mp_obj_t lwip_socket_send(mp_obj_t self_in, mp_obj_t buf_in) {
 }
 static MP_DEFINE_CONST_FUN_OBJ_2(lwip_socket_send_obj, lwip_socket_send);
 
-static mp_obj_t lwip_socket_recv(mp_obj_t self_in, mp_obj_t len_in) {
-    lwip_socket_obj_t *socket = MP_OBJ_TO_PTR(self_in);
+// Common implementation for recv & recvfrom
+static mp_obj_t lwip_socket_recv_common(size_t n_args, const mp_obj_t *args, ip_addr_t *ip, mp_uint_t *port) {
+    lwip_socket_obj_t *socket = MP_OBJ_TO_PTR(args[0]);
+    mp_int_t len = mp_obj_get_int(args[1]);
+    mp_int_t flags = n_args > 2 ? mp_obj_get_int(args[2]) : 0;
     int _errno;
+    vstr_t vstr;
+    mp_uint_t ret = 0;
 
     lwip_socket_check_connected(socket);
 
-    mp_int_t len = mp_obj_get_int(len_in);
-    vstr_t vstr;
     vstr_init_len(&vstr, len);
 
-    mp_uint_t ret = 0;
     switch (socket->type) {
-        case MOD_NETWORK_SOCK_STREAM: {
-            ret = lwip_tcp_receive(socket, (byte *)vstr.buf, len, &_errno);
+        case MOD_NETWORK_SOCK_STREAM:
+            if (ip != NULL) {
+                *ip = socket->tcp_peer_addr;
+                *port = (mp_uint_t)socket->tcp_peer_port;
+            }
+            ret = lwip_tcp_receive(socket, (byte *)vstr.buf, len, flags, &_errno);
             break;
-        }
         case MOD_NETWORK_SOCK_DGRAM:
         #if MICROPY_PY_LWIP_SOCK_RAW
         case MOD_NETWORK_SOCK_RAW:
         #endif
-            ret = lwip_raw_udp_receive(socket, (byte *)vstr.buf, len, NULL, NULL, &_errno);
+            ret = lwip_raw_udp_receive(socket, (byte *)vstr.buf, len, flags, ip, port, &_errno);
             break;
     }
     if (ret == -1) {
         mp_raise_OSError(_errno);
     }
-
     if (ret == 0) {
         return mp_const_empty_bytes;
     }
     vstr.len = ret;
     return mp_obj_new_bytes_from_vstr(&vstr);
 }
-static MP_DEFINE_CONST_FUN_OBJ_2(lwip_socket_recv_obj, lwip_socket_recv);
+
+static mp_obj_t lwip_socket_recv(size_t n_args, const mp_obj_t *args) {
+    return lwip_socket_recv_common(n_args, args, NULL, NULL);
+}
+static MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(lwip_socket_recv_obj, 2, 3, lwip_socket_recv);
+
+static mp_obj_t lwip_socket_recvfrom(size_t n_args, const mp_obj_t *args) {
+    ip_addr_t ip;
+    mp_uint_t port;
+    mp_obj_t tuple[2];
+    tuple[0] = lwip_socket_recv_common(n_args, args, &ip, &port);
+    tuple[1] = lwip_format_inet_addr(&ip, port);
+    return mp_obj_new_tuple(2, tuple);
+}
+static MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(lwip_socket_recvfrom_obj, 2, 3, lwip_socket_recvfrom);
 
 static mp_obj_t lwip_socket_sendto(mp_obj_t self_in, mp_obj_t data_in, mp_obj_t addr_in) {
     lwip_socket_obj_t *socket = MP_OBJ_TO_PTR(self_in);
@@ -1284,50 +1365,6 @@ static mp_obj_t lwip_socket_sendto(mp_obj_t self_in, mp_obj_t data_in, mp_obj_t
 }
 static MP_DEFINE_CONST_FUN_OBJ_3(lwip_socket_sendto_obj, lwip_socket_sendto);
 
-static mp_obj_t lwip_socket_recvfrom(mp_obj_t self_in, mp_obj_t len_in) {
-    lwip_socket_obj_t *socket = MP_OBJ_TO_PTR(self_in);
-    int _errno;
-
-    lwip_socket_check_connected(socket);
-
-    mp_int_t len = mp_obj_get_int(len_in);
-    vstr_t vstr;
-    vstr_init_len(&vstr, len);
-    ip_addr_t ip;
-    mp_uint_t port;
-
-    mp_uint_t ret = 0;
-    switch (socket->type) {
-        case MOD_NETWORK_SOCK_STREAM: {
-            memcpy(&ip, &socket->peer, sizeof(socket->peer));
-            port = (mp_uint_t)socket->peer_port;
-            ret = lwip_tcp_receive(socket, (byte *)vstr.buf, len, &_errno);
-            break;
-        }
-        case MOD_NETWORK_SOCK_DGRAM:
-        #if MICROPY_PY_LWIP_SOCK_RAW
-        case MOD_NETWORK_SOCK_RAW:
-        #endif
-            ret = lwip_raw_udp_receive(socket, (byte *)vstr.buf, len, &ip, &port, &_errno);
-            break;
-    }
-    if (ret == -1) {
-        mp_raise_OSError(_errno);
-    }
-
-    mp_obj_t tuple[2];
-    if (ret == 0) {
-        tuple[0] = mp_const_empty_bytes;
-    } else {
-        vstr.len = ret;
-        tuple[0] = mp_obj_new_bytes_from_vstr(&vstr);
-    }
-    tuple[1] = lwip_format_inet_addr(&ip, port);
-
-    return mp_obj_new_tuple(2, tuple);
-}
-static MP_DEFINE_CONST_FUN_OBJ_2(lwip_socket_recvfrom_obj, lwip_socket_recvfrom);
-
 static mp_obj_t lwip_socket_sendall(mp_obj_t self_in, mp_obj_t buf_in) {
     lwip_socket_obj_t *socket = MP_OBJ_TO_PTR(self_in);
     lwip_socket_check_connected(socket);
@@ -1487,12 +1524,12 @@ static mp_uint_t lwip_socket_read(mp_obj_t self_in, void *buf, mp_uint_t size, i
 
     switch (socket->type) {
         case MOD_NETWORK_SOCK_STREAM:
-            return lwip_tcp_receive(socket, buf, size, errcode);
+            return lwip_tcp_receive(socket, buf, size, 0, errcode);
         case MOD_NETWORK_SOCK_DGRAM:
         #if MICROPY_PY_LWIP_SOCK_RAW
         case MOD_NETWORK_SOCK_RAW:
         #endif
-            return lwip_raw_udp_receive(socket, buf, size, NULL, NULL, errcode);
+            return lwip_raw_udp_receive(socket, buf, size, 0, NULL, NULL, errcode);
     }
     // Unreachable
     return MP_STREAM_ERROR;
@@ -1537,9 +1574,15 @@ static mp_uint_t lwip_socket_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_
                 if (lwip_socket_incoming_array(socket)[socket->incoming.connection.iget] != NULL) {
                     ret |= MP_STREAM_POLL_RD;
                 }
+            } else if (socket->type == MOD_NETWORK_SOCK_STREAM) {
+                // For TCP sockets there is just one slot for incoming data
+                if (socket->incoming.tcp.pbuf != NULL) {
+                    ret |= MP_STREAM_POLL_RD;
+                }
             } else {
-                // Otherwise there is just one slot for incoming data
-                if (socket->incoming.pbuf != NULL) {
+                // Otherwise for UDP/raw there is a queue of incoming data
+                lwip_incoming_packet_t *slot = &socket->incoming.udp_raw.array[socket->incoming.udp_raw.iget];
+                if (slot->pbuf != NULL) {
                     ret |= MP_STREAM_POLL_RD;
                 }
             }
@@ -1858,6 +1901,8 @@ static const mp_rom_map_elem_t mp_module_lwip_globals_table[] = {
 
     { MP_ROM_QSTR(MP_QSTR_IPPROTO_TCP), MP_ROM_INT(IP_PROTO_TCP) },
     { MP_ROM_QSTR(MP_QSTR_TCP_NODELAY), MP_ROM_INT(TCP_NODELAY) },
+    { MP_ROM_QSTR(MP_QSTR_MSG_PEEK), MP_ROM_INT(MSG_PEEK) },
+    { MP_ROM_QSTR(MP_QSTR_MSG_DONTWAIT), MP_ROM_INT(MSG_DONTWAIT) },
 };
 
 static MP_DEFINE_CONST_DICT(mp_module_lwip_globals, mp_module_lwip_globals_table);
diff --git a/extmod/modmachine.c b/extmod/modmachine.c
index 5906835949861..f2570123e3751 100644
--- a/extmod/modmachine.c
+++ b/extmod/modmachine.c
@@ -45,11 +45,11 @@
 static void mp_machine_idle(void);
 
 #if MICROPY_PY_MACHINE_BOOTLOADER
-NORETURN void mp_machine_bootloader(size_t n_args, const mp_obj_t *args);
+MP_NORETURN void mp_machine_bootloader(size_t n_args, const mp_obj_t *args);
 #endif
 
 #if MICROPY_PY_MACHINE_RESET
-NORETURN static void mp_machine_reset(void);
+MP_NORETURN static void mp_machine_reset(void);
 static mp_int_t mp_machine_reset_cause(void);
 #endif
 
@@ -58,7 +58,7 @@ static mp_obj_t mp_machine_unique_id(void);
 static mp_obj_t mp_machine_get_freq(void);
 static void mp_machine_set_freq(size_t n_args, const mp_obj_t *args);
 static void mp_machine_lightsleep(size_t n_args, const mp_obj_t *args);
-NORETURN static void mp_machine_deepsleep(size_t n_args, const mp_obj_t *args);
+MP_NORETURN static void mp_machine_deepsleep(size_t n_args, const mp_obj_t *args);
 #endif
 
 // The port can provide additional machine-module implementation in this file.
@@ -67,7 +67,7 @@ NORETURN static void mp_machine_deepsleep(size_t n_args, const mp_obj_t *args);
 #endif
 
 #if MICROPY_PY_MACHINE_BOOTLOADER
-NORETURN mp_obj_t machine_bootloader(size_t n_args, const mp_obj_t *args) {
+MP_NORETURN mp_obj_t machine_bootloader(size_t n_args, const mp_obj_t *args) {
     mp_machine_bootloader(n_args, args);
 }
 MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_bootloader_obj, 0, 1, machine_bootloader);
@@ -81,7 +81,7 @@ static MP_DEFINE_CONST_FUN_OBJ_0(machine_idle_obj, machine_idle);
 
 #if MICROPY_PY_MACHINE_RESET
 
-NORETURN static mp_obj_t machine_reset(void) {
+MP_NORETURN static mp_obj_t machine_reset(void) {
     mp_machine_reset();
 }
 MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_obj, machine_reset);
@@ -116,7 +116,7 @@ static mp_obj_t machine_lightsleep(size_t n_args, const mp_obj_t *args) {
 }
 MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_lightsleep_obj, 0, 1, machine_lightsleep);
 
-NORETURN static mp_obj_t machine_deepsleep(size_t n_args, const mp_obj_t *args) {
+MP_NORETURN static mp_obj_t machine_deepsleep(size_t n_args, const mp_obj_t *args) {
     mp_machine_deepsleep(n_args, args);
 }
 MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_deepsleep_obj, 0, 1, machine_deepsleep);
diff --git a/extmod/modmachine.h b/extmod/modmachine.h
index 7c16ed302ee2f..26010be8e18f9 100644
--- a/extmod/modmachine.h
+++ b/extmod/modmachine.h
@@ -242,7 +242,7 @@ uintptr_t MICROPY_MACHINE_MEM_GET_READ_ADDR(mp_obj_t addr_o, uint align);
 uintptr_t MICROPY_MACHINE_MEM_GET_WRITE_ADDR(mp_obj_t addr_o, uint align);
 #endif
 
-NORETURN mp_obj_t machine_bootloader(size_t n_args, const mp_obj_t *args);
+MP_NORETURN mp_obj_t machine_bootloader(size_t n_args, const mp_obj_t *args);
 void machine_bitstream_high_low(mp_hal_pin_obj_t pin, uint32_t *timing_ns, const uint8_t *buf, size_t len);
 mp_uint_t machine_time_pulse_us(mp_hal_pin_obj_t pin, int pulse_level, mp_uint_t timeout_us);
 
diff --git a/extmod/modtls_axtls.c b/extmod/modtls_axtls.c
index 0e49fde2d84c5..ba28c13fce212 100644
--- a/extmod/modtls_axtls.c
+++ b/extmod/modtls_axtls.c
@@ -105,7 +105,7 @@ static const char *const ssl_error_tab2[] = {
     "NOT_SUPPORTED",
 };
 
-static NORETURN void ssl_raise_error(int err) {
+static MP_NORETURN void ssl_raise_error(int err) {
     MP_STATIC_ASSERT(SSL_NOT_OK - 3 == SSL_EAGAIN);
     MP_STATIC_ASSERT(SSL_ERROR_CONN_LOST - 18 == SSL_ERROR_NOT_SUPPORTED);
 
diff --git a/extmod/modtls_mbedtls.c b/extmod/modtls_mbedtls.c
index 6c34805da42cb..71a14adcff12d 100644
--- a/extmod/modtls_mbedtls.c
+++ b/extmod/modtls_mbedtls.c
@@ -147,7 +147,7 @@ static const unsigned char *asn1_get_data(mp_obj_t obj, size_t *out_len) {
     return (const unsigned char *)str;
 }
 
-static NORETURN void mbedtls_raise_error(int err) {
+static MP_NORETURN void mbedtls_raise_error(int err) {
     // Handle special cases.
     if (err == MBEDTLS_ERR_SSL_ALLOC_FAILED) {
         mp_raise_OSError(MP_ENOMEM);
diff --git a/extmod/moductypes.c b/extmod/moductypes.c
index bf45797658fa0..eb72f441bbbce 100644
--- a/extmod/moductypes.c
+++ b/extmod/moductypes.c
@@ -89,7 +89,7 @@ typedef struct _mp_obj_uctypes_struct_t {
     uint32_t flags;
 } mp_obj_uctypes_struct_t;
 
-static NORETURN void syntax_error(void) {
+static MP_NORETURN void syntax_error(void) {
     mp_raise_TypeError(MP_ERROR_TEXT("syntax error in uctypes descriptor"));
 }
 
@@ -277,15 +277,18 @@ static mp_obj_t uctypes_struct_sizeof(size_t n_args, const mp_obj_t *args) {
 }
 static MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(uctypes_struct_sizeof_obj, 1, 2, uctypes_struct_sizeof);
 
+static const char type2char[16] = {
+    'B', 'b', 'H', 'h', 'I', 'i', 'Q', 'q',
+    '-', '-', '-', '-', '-', '-', 'f', 'd'
+};
+
 static inline mp_obj_t get_unaligned(uint val_type, byte *p, int big_endian) {
     char struct_type = big_endian ? '>' : '<';
-    static const char type2char[16] = "BbHhIiQq------fd";
     return mp_binary_get_val(struct_type, type2char[val_type], p, &p);
 }
 
 static inline void set_unaligned(uint val_type, byte *p, int big_endian, mp_obj_t val) {
     char struct_type = big_endian ? '>' : '<';
-    static const char type2char[16] = "BbHhIiQq------fd";
     mp_binary_set_val(struct_type, type2char[val_type], val, p, &p);
 }
 
diff --git a/extmod/modvfs.c b/extmod/modvfs.c
index df422365b75ef..41841f05569a2 100644
--- a/extmod/modvfs.c
+++ b/extmod/modvfs.c
@@ -38,11 +38,18 @@
 #error "MICROPY_PY_VFS requires MICROPY_VFS"
 #endif
 
+#if MICROPY_VFS_ROM_IOCTL
+static MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(mp_vfs_rom_ioctl_obj, 1, 4, mp_vfs_rom_ioctl);
+#endif
+
 static const mp_rom_map_elem_t vfs_module_globals_table[] = {
     { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_vfs) },
 
     { MP_ROM_QSTR(MP_QSTR_mount), MP_ROM_PTR(&mp_vfs_mount_obj) },
     { MP_ROM_QSTR(MP_QSTR_umount), MP_ROM_PTR(&mp_vfs_umount_obj) },
+    #if MICROPY_VFS_ROM_IOCTL
+    { MP_ROM_QSTR(MP_QSTR_rom_ioctl), MP_ROM_PTR(&mp_vfs_rom_ioctl_obj) },
+    #endif
     #if MICROPY_VFS_FAT
     { MP_ROM_QSTR(MP_QSTR_VfsFat), MP_ROM_PTR(&mp_fat_vfs_type) },
     #endif
diff --git a/extmod/mpbthci.h b/extmod/mpbthci.h
index c10f99c3dfd7c..3ff8294c4c6c5 100644
--- a/extmod/mpbthci.h
+++ b/extmod/mpbthci.h
@@ -27,6 +27,10 @@
 #ifndef MICROPY_INCLUDED_EXTMOD_MPBTHCI_H
 #define MICROPY_INCLUDED_EXTMOD_MPBTHCI_H
 
+#include <stdint.h>
+#include <stdbool.h>
+#include <stddef.h>
+
 #define MICROPY_PY_BLUETOOTH_HCI_READ_MODE_BYTE  (0)
 #define MICROPY_PY_BLUETOOTH_HCI_READ_MODE_PACKET  (1)
 
diff --git a/extmod/network_cyw43.c b/extmod/network_cyw43.c
index 02b022cb81327..9ebfa904db568 100644
--- a/extmod/network_cyw43.c
+++ b/extmod/network_cyw43.c
@@ -143,6 +143,9 @@ static mp_obj_t network_cyw43_active(size_t n_args, const mp_obj_t *args) {
         return mp_obj_new_bool(if_active[self->itf]);
     } else {
         bool value = mp_obj_is_true(args[1]);
+        if (!value && self->itf == CYW43_ITF_STA) {
+            cyw43_wifi_leave(self->cyw, self->itf);
+        }
         cyw43_wifi_set_up(self->cyw, self->itf, value, get_country_code());
         if_active[self->itf] = value;
         return mp_const_none;
@@ -583,6 +586,8 @@ static const mp_rom_map_elem_t network_cyw43_locals_dict_table[] = {
     { MP_ROM_QSTR(MP_QSTR_IF_AP), MP_ROM_INT(MOD_NETWORK_AP_IF) },
     { MP_ROM_QSTR(MP_QSTR_SEC_OPEN), MP_ROM_INT(CYW43_AUTH_OPEN) },
     { MP_ROM_QSTR(MP_QSTR_SEC_WPA_WPA2), MP_ROM_INT(CYW43_AUTH_WPA2_MIXED_PSK) },
+    { MP_ROM_QSTR(MP_QSTR_SEC_WPA3), MP_ROM_INT(CYW43_AUTH_WPA3_SAE_AES_PSK) },
+    { MP_ROM_QSTR(MP_QSTR_SEC_WPA2_WPA3), MP_ROM_INT(CYW43_AUTH_WPA3_WPA2_AES_PSK) },
 
     { MP_ROM_QSTR(MP_QSTR_PM_NONE), MP_ROM_INT(PM_NONE) },
     { MP_ROM_QSTR(MP_QSTR_PM_PERFORMANCE), MP_ROM_INT(PM_PERFORMANCE) },
diff --git a/extmod/network_ppp_lwip.c b/extmod/network_ppp_lwip.c
index 8eb90ea4a6529..2c3dac92012a0 100644
--- a/extmod/network_ppp_lwip.c
+++ b/extmod/network_ppp_lwip.c
@@ -24,6 +24,10 @@
  * THE SOFTWARE.
  */
 
+// This file is intended to closely match ports/esp32/network_ppp.c. Changes can
+// and should probably be applied to both files. Compare them directly by using:
+// git diff --no-index extmod/network_ppp_lwip.c ports/esp32/network_ppp.c
+
 #include "py/runtime.h"
 #include "py/mphal.h"
 #include "py/stream.h"
@@ -80,7 +84,6 @@ static void network_ppp_status_cb(ppp_pcb *pcb, int err_code, void *ctx) {
             break;
         case PPPERR_USER:
             if (self->state >= STATE_ERROR) {
-                network_ppp_stream_uart_irq_disable(self);
                 // Indicate that we are no longer connected and thus
                 // only need to free the PPP PCB, not close it.
                 self->state = STATE_ACTIVE;
@@ -121,6 +124,7 @@ static mp_obj_t network_ppp___del__(mp_obj_t self_in) {
             self->state = STATE_INACTIVE;
             ppp_close(self->pcb, 1);
         }
+        network_ppp_stream_uart_irq_disable(self);
         // Free PPP PCB and reset state.
         self->state = STATE_INACTIVE;
         ppp_free(self->pcb);
@@ -295,7 +299,8 @@ static mp_obj_t network_ppp_connect(size_t n_args, const mp_obj_t *args, mp_map_
         ppp_set_auth(self->pcb, parsed_args[ARG_security].u_int, user_str, key_str);
     }
 
-    netif_set_default(self->pcb->netif);
+    ppp_set_default(self->pcb);
+
     ppp_set_usepeerdns(self->pcb, true);
 
     if (ppp_connect(self->pcb, 0) != ERR_OK) {
diff --git a/extmod/nimble/modbluetooth_nimble.c b/extmod/nimble/modbluetooth_nimble.c
index 6ca0c172677c7..5e7030e36fab4 100644
--- a/extmod/nimble/modbluetooth_nimble.c
+++ b/extmod/nimble/modbluetooth_nimble.c
@@ -60,6 +60,7 @@
 static uint8_t nimble_address_mode = BLE_OWN_ADDR_RANDOM;
 
 #define NIMBLE_STARTUP_TIMEOUT 2000
+#define NIMBLE_SHUTDOWN_TIMEOUT 500
 
 // Any BLE_HS_xxx code not in this table will default to MP_EIO.
 static int8_t ble_hs_err_to_errno_table[] = {
@@ -554,7 +555,7 @@ static void ble_hs_shutdown_stop_cb(int status, void *arg) {
 
 static struct ble_hs_stop_listener ble_hs_shutdown_stop_listener;
 
-void mp_bluetooth_nimble_port_shutdown(void) {
+int mp_bluetooth_nimble_port_shutdown(void) {
     DEBUG_printf("mp_bluetooth_nimble_port_shutdown (nimble default)\n");
     // By default, just call ble_hs_stop directly and wait for the stack to stop.
 
@@ -562,9 +563,17 @@ void mp_bluetooth_nimble_port_shutdown(void) {
 
     ble_hs_stop(&ble_hs_shutdown_stop_listener, ble_hs_shutdown_stop_cb, NULL);
 
+    mp_uint_t timeout_start_ticks_ms = mp_hal_ticks_ms();
     while (mp_bluetooth_nimble_ble_state != MP_BLUETOOTH_NIMBLE_BLE_STATE_OFF) {
-        mp_event_wait_indefinite();
+        mp_uint_t elapsed = mp_hal_ticks_ms() - timeout_start_ticks_ms;
+        if (elapsed > NIMBLE_SHUTDOWN_TIMEOUT) {
+            // Stack had not responded (via ble_hs_shutdown_stop_cb)
+            return MP_ETIMEDOUT;
+        }
+
+        mp_event_wait_ms(NIMBLE_SHUTDOWN_TIMEOUT - elapsed);
     }
+    return 0;
 }
 
 #endif // !MICROPY_BLUETOOTH_NIMBLE_BINDINGS_ONLY
@@ -659,10 +668,11 @@ int mp_bluetooth_init(void) {
     return 0;
 }
 
-void mp_bluetooth_deinit(void) {
+int mp_bluetooth_deinit(void) {
     DEBUG_printf("mp_bluetooth_deinit %d\n", mp_bluetooth_nimble_ble_state);
+    int ret = 0;
     if (mp_bluetooth_nimble_ble_state == MP_BLUETOOTH_NIMBLE_BLE_STATE_OFF) {
-        return;
+        return 0;
     }
 
     // Must call ble_hs_stop() in a port-specific way to stop the background
@@ -675,7 +685,7 @@ void mp_bluetooth_deinit(void) {
 
         DEBUG_printf("mp_bluetooth_deinit: starting port shutdown\n");
 
-        mp_bluetooth_nimble_port_shutdown();
+        ret = mp_bluetooth_nimble_port_shutdown();
         assert(mp_bluetooth_nimble_ble_state == MP_BLUETOOTH_NIMBLE_BLE_STATE_OFF);
     } else {
         mp_bluetooth_nimble_ble_state = MP_BLUETOOTH_NIMBLE_BLE_STATE_OFF;
@@ -692,6 +702,7 @@ void mp_bluetooth_deinit(void) {
     #endif
 
     DEBUG_printf("mp_bluetooth_deinit: shut down\n");
+    return ret;
 }
 
 bool mp_bluetooth_is_active(void) {
diff --git a/extmod/nimble/modbluetooth_nimble.h b/extmod/nimble/modbluetooth_nimble.h
index d9bef649201ce..0dd20eb658fa8 100644
--- a/extmod/nimble/modbluetooth_nimble.h
+++ b/extmod/nimble/modbluetooth_nimble.h
@@ -84,7 +84,7 @@ void mp_bluetooth_nimble_port_hci_deinit(void);
 void mp_bluetooth_nimble_port_start(void);
 
 // Tell the port to stop its background task.
-void mp_bluetooth_nimble_port_shutdown(void);
+int mp_bluetooth_nimble_port_shutdown(void);
 
 // --- Called by the HCI UART layer to let us know when packets have been sent.
 void mp_bluetooth_nimble_sent_hci_packet(void);
diff --git a/extmod/vfs.c b/extmod/vfs.c
index b9c5ab0fc3a8c..aebf5ed295b3b 100644
--- a/extmod/vfs.c
+++ b/extmod/vfs.c
@@ -46,6 +46,10 @@
 #include "extmod/vfs_posix.h"
 #endif
 
+#if MICROPY_VFS_ROM && MICROPY_VFS_ROM_IOCTL
+#include "extmod/vfs_rom.h"
+#endif
+
 // For mp_vfs_proxy_call, the maximum number of additional args that can be passed.
 // A fixed maximum size is used to avoid the need for a costly variable array.
 #define PROXY_MAX_ARGS (2)
@@ -202,22 +206,36 @@ static mp_obj_t mp_vfs_autodetect(mp_obj_t bdev_obj) {
 }
 
 mp_obj_t mp_vfs_mount(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
-    enum { ARG_readonly, ARG_mkfs };
+    if (n_args == 0) {
+        // zero-args, output a table of all current mountpoints
+        mp_obj_t mount_list = mp_obj_new_list(0, NULL);
+        mp_vfs_mount_t *vfsp = MP_STATE_VM(vfs_mount_table);
+        while (vfsp != NULL) {
+            mp_obj_t items[] = { vfsp->obj, mp_obj_new_str(vfsp->str, vfsp->len) };
+            mp_obj_list_append(mount_list, mp_obj_new_tuple(MP_ARRAY_SIZE(items), items));
+            vfsp = vfsp->next;
+        }
+        return mount_list;
+    }
+
+    enum { ARG_fsobj, ARG_mount_point, ARG_readonly, ARG_mkfs };
     static const mp_arg_t allowed_args[] = {
+        { MP_QSTR_, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
+        { MP_QSTR_, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
         { MP_QSTR_readonly, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_FALSE} },
         { MP_QSTR_mkfs, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_FALSE} },
     };
 
     // parse args
     mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
-    mp_arg_parse_all(n_args - 2, pos_args + 2, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
+    mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
 
     // get the mount point
     size_t mnt_len;
-    const char *mnt_str = mp_obj_str_get_data(pos_args[1], &mnt_len);
+    const char *mnt_str = mp_obj_str_get_data(args[ARG_mount_point].u_obj, &mnt_len);
 
     // see if we need to auto-detect and create the filesystem
-    mp_obj_t vfs_obj = pos_args[0];
+    mp_obj_t vfs_obj = args[ARG_fsobj].u_obj;
     mp_obj_t dest[2];
     mp_load_method_maybe(vfs_obj, MP_QSTR_mount, dest);
     if (dest[0] == MP_OBJ_NULL) {
@@ -234,11 +252,13 @@ mp_obj_t mp_vfs_mount(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args
     vfs->next = NULL;
 
     // call the underlying object to do any mounting operation
-    mp_vfs_proxy_call(vfs, MP_QSTR_mount, 2, (mp_obj_t *)&args);
+    mp_arg_val_t *proxy_args = &args[ARG_readonly];
+    size_t proxy_args_len = MP_ARRAY_SIZE(args) - ARG_readonly;
+    mp_vfs_proxy_call(vfs, MP_QSTR_mount, proxy_args_len, (mp_obj_t *)proxy_args);
 
     // check that the destination mount point is unused
     const char *path_out;
-    mp_vfs_mount_t *existing_mount = mp_vfs_lookup_path(mp_obj_str_get_str(pos_args[1]), &path_out);
+    mp_vfs_mount_t *existing_mount = mp_vfs_lookup_path(mp_obj_str_get_str(args[ARG_mount_point].u_obj), &path_out);
     if (existing_mount != MP_VFS_NONE && existing_mount != MP_VFS_ROOT) {
         if (vfs->len != 1 && existing_mount->len == 1) {
             // if root dir is mounted, still allow to mount something within a subdir of root
@@ -262,7 +282,7 @@ mp_obj_t mp_vfs_mount(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args
 
     return mp_const_none;
 }
-MP_DEFINE_CONST_FUN_OBJ_KW(mp_vfs_mount_obj, 2, mp_vfs_mount);
+MP_DEFINE_CONST_FUN_OBJ_KW(mp_vfs_mount_obj, 0, mp_vfs_mount);
 
 mp_obj_t mp_vfs_umount(mp_obj_t mnt_in) {
     // remove vfs from the mount table
@@ -552,6 +572,32 @@ int mp_vfs_mount_and_chdir_protected(mp_obj_t bdev, mp_obj_t mount_point) {
     return ret;
 }
 
+#if MICROPY_VFS_ROM && MICROPY_VFS_ROM_IOCTL
+
+int mp_vfs_mount_romfs_protected(void) {
+    int ret;
+    nlr_buf_t nlr;
+    if (nlr_push(&nlr) == 0) {
+        mp_obj_t args[2] = { MP_OBJ_NEW_SMALL_INT(MP_VFS_ROM_IOCTL_GET_SEGMENT), MP_OBJ_NEW_SMALL_INT(0) };
+        mp_obj_t rom = mp_vfs_rom_ioctl(2, args);
+        mp_obj_t romfs = mp_call_function_1(MP_OBJ_FROM_PTR(&mp_type_vfs_rom), rom);
+        mp_obj_t mount_point = MP_OBJ_NEW_QSTR(MP_QSTR__slash_rom);
+        mp_call_function_2(MP_OBJ_FROM_PTR(&mp_vfs_mount_obj), romfs, mount_point);
+        #if MICROPY_PY_SYS_PATH_ARGV_DEFAULTS
+        // Add "/rom" and "/rom/lib" to `sys.path`.
+        mp_obj_list_append(mp_sys_path, MP_OBJ_NEW_QSTR(MP_QSTR__slash_rom));
+        mp_obj_list_append(mp_sys_path, MP_OBJ_NEW_QSTR(MP_QSTR__slash_rom_slash_lib));
+        #endif
+        ret = 0; // success
+        nlr_pop();
+    } else {
+        ret = -MP_EIO;
+    }
+    return ret;
+}
+
+#endif
+
 MP_REGISTER_ROOT_POINTER(struct _mp_vfs_mount_t *vfs_cur);
 MP_REGISTER_ROOT_POINTER(struct _mp_vfs_mount_t *vfs_mount_table);
 
diff --git a/extmod/vfs.h b/extmod/vfs.h
index 626e25a351123..3acc09db12283 100644
--- a/extmod/vfs.h
+++ b/extmod/vfs.h
@@ -52,6 +52,13 @@
 #define MP_BLOCKDEV_IOCTL_BLOCK_SIZE    (5)
 #define MP_BLOCKDEV_IOCTL_BLOCK_ERASE   (6)
 
+// Constants for vfs.rom_ioctl() function.
+#define MP_VFS_ROM_IOCTL_GET_NUMBER_OF_SEGMENTS     (1) // rom_ioctl(1)
+#define MP_VFS_ROM_IOCTL_GET_SEGMENT                (2) // rom_ioctl(2, <id>)
+#define MP_VFS_ROM_IOCTL_WRITE_PREPARE              (3) // rom_ioctl(3, <id>, <len>)
+#define MP_VFS_ROM_IOCTL_WRITE                      (4) // rom_ioctl(4, <id>, <offset>, <buf>)
+#define MP_VFS_ROM_IOCTL_WRITE_COMPLETE             (5) // rom_ioctl(5, <id>)
+
 // At the moment the VFS protocol just has import_stat, but could be extended to other methods
 typedef struct _mp_vfs_proto_t {
     mp_import_stat_t (*import_stat)(void *self, const char *path);
@@ -105,6 +112,9 @@ mp_obj_t mp_vfs_stat(mp_obj_t path_in);
 mp_obj_t mp_vfs_statvfs(mp_obj_t path_in);
 
 int mp_vfs_mount_and_chdir_protected(mp_obj_t bdev, mp_obj_t mount_point);
+#if MICROPY_VFS_ROM && MICROPY_VFS_ROM_IOCTL
+int mp_vfs_mount_romfs_protected(void);
+#endif
 
 MP_DECLARE_CONST_FUN_OBJ_KW(mp_vfs_mount_obj);
 MP_DECLARE_CONST_FUN_OBJ_1(mp_vfs_umount_obj);
@@ -122,4 +132,12 @@ MP_DECLARE_CONST_FUN_OBJ_1(mp_vfs_rmdir_obj);
 MP_DECLARE_CONST_FUN_OBJ_1(mp_vfs_stat_obj);
 MP_DECLARE_CONST_FUN_OBJ_1(mp_vfs_statvfs_obj);
 
+#if MICROPY_VFS_ROM_IOCTL
+// When MICROPY_VFS_ROM_IOCTL is enabled a port must define the following function.
+// This is a generic interface to allow querying and modifying the user-accessible,
+// read-only memory area of a device, if it is configured with such an area.
+// Supported ioctl commands are given by MP_VFS_ROM_IOCTL_xxx.
+mp_obj_t mp_vfs_rom_ioctl(size_t n_args, const mp_obj_t *args);
+#endif
+
 #endif // MICROPY_INCLUDED_EXTMOD_VFS_H
diff --git a/extmod/vfs_lfsx.c b/extmod/vfs_lfsx.c
index 4b10ca3aa597c..404eab84f47a8 100644
--- a/extmod/vfs_lfsx.c
+++ b/extmod/vfs_lfsx.c
@@ -300,7 +300,7 @@ static mp_obj_t MP_VFS_LFSx(chdir)(mp_obj_t self_in, mp_obj_t path_in) {
         struct LFSx_API (info) info;
         int ret = LFSx_API(stat)(&self->lfs, path, &info);
         if (ret < 0 || info.type != LFSx_MACRO(_TYPE_DIR)) {
-            mp_raise_OSError(-MP_ENOENT);
+            mp_raise_OSError(MP_ENOENT);
         }
     }
 
diff --git a/extmod/vfs_rom.c b/extmod/vfs_rom.c
index 99ddaba95ed79..7d814cb980524 100644
--- a/extmod/vfs_rom.c
+++ b/extmod/vfs_rom.c
@@ -91,6 +91,7 @@
 #define ROMFS_RECORD_KIND_DATA_POINTER (3)
 #define ROMFS_RECORD_KIND_DIRECTORY (4)
 #define ROMFS_RECORD_KIND_FILE (5)
+#define ROMFS_RECORD_KIND_FILESYSTEM (0x14a6b1)
 
 typedef mp_uint_t record_kind_t;
 
@@ -101,34 +102,72 @@ struct _mp_obj_vfs_rom_t {
     const uint8_t *filesystem_end;
 };
 
-static record_kind_t extract_record(const uint8_t **fs, const uint8_t **fs_next) {
-    record_kind_t record_kind = mp_decode_uint(fs);
-    mp_uint_t record_len = mp_decode_uint(fs);
+// Returns 0 for success, -1 for failure.
+static int mp_decode_uint_checked(const uint8_t **ptr, const uint8_t *ptr_max, mp_uint_t *value_out) {
+    mp_uint_t unum = 0;
+    byte val;
+    const uint8_t *p = *ptr;
+    do {
+        if (p >= ptr_max) {
+            return -1;
+        }
+        val = *p++;
+        unum = (unum << 7) | (val & 0x7f);
+    } while ((val & 0x80) != 0);
+    *ptr = p;
+    *value_out = unum;
+    return 0;
+}
+
+static record_kind_t extract_record(const uint8_t **fs, const uint8_t **fs_next, const uint8_t *fs_max) {
+    mp_uint_t record_kind;
+    if (mp_decode_uint_checked(fs, fs_max, &record_kind) != 0) {
+        return ROMFS_RECORD_KIND_UNUSED;
+    }
+    mp_uint_t record_len;
+    if (mp_decode_uint_checked(fs, fs_max, &record_len) != 0) {
+        return ROMFS_RECORD_KIND_UNUSED;
+    }
     *fs_next = *fs + record_len;
     return record_kind;
 }
 
-static void extract_data(mp_obj_vfs_rom_t *self, const uint8_t *fs, const uint8_t *fs_top, size_t *size_out, const uint8_t **data_out) {
-    *size_out = 0;
-    *data_out = NULL;
+// Returns 0 for success, a negative integer for failure.
+static int extract_data(mp_obj_vfs_rom_t *self, const uint8_t *fs, const uint8_t *fs_top, size_t *size_out, const uint8_t **data_out) {
     while (fs < fs_top) {
         const uint8_t *fs_next;
-        record_kind_t record_kind = extract_record(&fs, &fs_next);
-        if (record_kind == ROMFS_RECORD_KIND_DATA_VERBATIM) {
-            // Verbatim data.
-            *size_out = fs_next - fs;
-            *data_out = fs;
+        record_kind_t record_kind = extract_record(&fs, &fs_next, fs_top);
+        if (record_kind == ROMFS_RECORD_KIND_UNUSED) {
+            // Corrupt filesystem.
             break;
+        } else if (record_kind == ROMFS_RECORD_KIND_DATA_VERBATIM) {
+            // Verbatim data.
+            if (size_out != NULL) {
+                *size_out = fs_next - fs;
+                *data_out = fs;
+            }
+            return 0;
         } else if (record_kind == ROMFS_RECORD_KIND_DATA_POINTER) {
             // Pointer to data.
-            *size_out = mp_decode_uint(&fs);
-            *data_out = self->filesystem + mp_decode_uint(&fs);
-            break;
+            mp_uint_t size;
+            if (mp_decode_uint_checked(&fs, fs_next, &size) != 0) {
+                break;
+            }
+            mp_uint_t offset;
+            if (mp_decode_uint_checked(&fs, fs_next, &offset) != 0) {
+                break;
+            }
+            if (size_out != NULL) {
+                *size_out = size;
+                *data_out = self->filesystem + offset;
+            }
+            return 0;
         } else {
             // Skip this record.
             fs = fs_next;
         }
     }
+    return -MP_EIO;
 }
 
 // Searches for `path` in the filesystem.
@@ -144,10 +183,17 @@ mp_import_stat_t mp_vfs_rom_search_filesystem(mp_obj_vfs_rom_t *self, const char
     }
     while (path_len > 0 && fs < fs_top) {
         const uint8_t *fs_next;
-        record_kind_t record_kind = extract_record(&fs, &fs_next);
-        if (record_kind == ROMFS_RECORD_KIND_DIRECTORY || record_kind == ROMFS_RECORD_KIND_FILE) {
+        record_kind_t record_kind = extract_record(&fs, &fs_next, fs_top);
+        if (record_kind == ROMFS_RECORD_KIND_UNUSED) {
+            // Corrupt filesystem.
+            return MP_IMPORT_STAT_NO_EXIST;
+        } else if (record_kind == ROMFS_RECORD_KIND_DIRECTORY || record_kind == ROMFS_RECORD_KIND_FILE) {
             // A directory or file record.
-            mp_uint_t name_len = mp_decode_uint(&fs);
+            mp_uint_t name_len;
+            if (mp_decode_uint_checked(&fs, fs_next, &name_len) != 0) {
+                // Corrupt filesystem.
+                return MP_IMPORT_STAT_NO_EXIST;
+            }
             if ((name_len == path_len
                  || (name_len < path_len && path[name_len] == '/'))
                 && memcmp(path, fs, name_len) == 0) {
@@ -167,8 +213,9 @@ mp_import_stat_t mp_vfs_rom_search_filesystem(mp_obj_vfs_rom_t *self, const char
                     if (path_len != 0) {
                         return MP_IMPORT_STAT_NO_EXIST;
                     }
-                    if (size_out != NULL) {
-                        extract_data(self, fs, fs_top, size_out, data_out);
+                    if (extract_data(self, fs, fs_top, size_out, data_out) != 0) {
+                        // Corrupt filesystem.
+                        return MP_IMPORT_STAT_NO_EXIST;
                     }
                     return MP_IMPORT_STAT_FILE;
                 }
@@ -214,7 +261,15 @@ static mp_obj_t vfs_rom_make_new(const mp_obj_type_t *type, size_t n_args, size_
     }
 
     // The ROMFS is a record itself, so enter into it and compute its limit.
-    extract_record(&self->filesystem, &self->filesystem_end);
+    record_kind_t record_kind = extract_record(&self->filesystem, &self->filesystem_end, self->filesystem + bufinfo.len);
+    if (record_kind != ROMFS_RECORD_KIND_FILESYSTEM) {
+        mp_raise_OSError(MP_ENODEV);
+    }
+
+    // Check the filesystem is within the limits of the input buffer.
+    if (self->filesystem_end > (const uint8_t *)bufinfo.buf + bufinfo.len) {
+        mp_raise_OSError(MP_ENODEV);
+    }
 
     return MP_OBJ_FROM_PTR(self);
 }
@@ -245,6 +300,13 @@ static mp_obj_t vfs_rom_chdir(mp_obj_t self_in, mp_obj_t path_in) {
 }
 static MP_DEFINE_CONST_FUN_OBJ_2(vfs_rom_chdir_obj, vfs_rom_chdir);
 
+static mp_obj_t vfs_rom_getcwd(mp_obj_t self_in) {
+    (void)self_in;
+    // The current directory is always the root of the ROMFS.
+    return MP_OBJ_NEW_QSTR(MP_QSTR_);
+}
+static MP_DEFINE_CONST_FUN_OBJ_1(vfs_rom_getcwd_obj, vfs_rom_getcwd);
+
 typedef struct _vfs_rom_ilistdir_it_t {
     mp_obj_base_t base;
     mp_fun_1_t iternext;
@@ -259,13 +321,21 @@ static mp_obj_t vfs_rom_ilistdir_it_iternext(mp_obj_t self_in) {
 
     while (self->index < self->index_top) {
         const uint8_t *index_next;
-        record_kind_t record_kind = extract_record(&self->index, &index_next);
+        record_kind_t record_kind = extract_record(&self->index, &index_next, self->index_top);
         uint32_t type;
         mp_uint_t name_len;
         size_t data_len;
-        if (record_kind == ROMFS_RECORD_KIND_DIRECTORY || record_kind == ROMFS_RECORD_KIND_FILE) {
+        if (record_kind == ROMFS_RECORD_KIND_UNUSED) {
+            // Corrupt filesystem.
+            self->index = self->index_top;
+            break;
+        } else if (record_kind == ROMFS_RECORD_KIND_DIRECTORY || record_kind == ROMFS_RECORD_KIND_FILE) {
             // A directory or file record.
-            name_len = mp_decode_uint(&self->index);
+            if (mp_decode_uint_checked(&self->index, index_next, &name_len) != 0) {
+                // Corrupt filesystem.
+                self->index = self->index_top;
+                break;
+            }
             if (record_kind == ROMFS_RECORD_KIND_DIRECTORY) {
                 // A directory.
                 type = MP_S_IFDIR;
@@ -274,7 +344,10 @@ static mp_obj_t vfs_rom_ilistdir_it_iternext(mp_obj_t self_in) {
                 // A file.
                 type = MP_S_IFREG;
                 const uint8_t *data_value;
-                extract_data(self->vfs_rom, self->index + name_len, index_next, &data_len, &data_value);
+                if (extract_data(self->vfs_rom, self->index + name_len, index_next, &data_len, &data_value) != 0) {
+                    // Corrupt filesystem.
+                    break;
+                }
             }
         } else {
             // Skip this record.
@@ -370,6 +443,7 @@ static const mp_rom_map_elem_t vfs_rom_locals_dict_table[] = {
     { MP_ROM_QSTR(MP_QSTR_open), MP_ROM_PTR(&vfs_rom_open_obj) },
 
     { MP_ROM_QSTR(MP_QSTR_chdir), MP_ROM_PTR(&vfs_rom_chdir_obj) },
+    { MP_ROM_QSTR(MP_QSTR_getcwd), MP_ROM_PTR(&vfs_rom_getcwd_obj) },
     { MP_ROM_QSTR(MP_QSTR_ilistdir), MP_ROM_PTR(&vfs_rom_ilistdir_obj) },
     { MP_ROM_QSTR(MP_QSTR_stat), MP_ROM_PTR(&vfs_rom_stat_obj) },
     { MP_ROM_QSTR(MP_QSTR_statvfs), MP_ROM_PTR(&vfs_rom_statvfs_obj) },
diff --git a/lib/alif-security-toolkit b/lib/alif-security-toolkit
new file mode 160000
index 0000000000000..63698efe8567e
--- /dev/null
+++ b/lib/alif-security-toolkit
@@ -0,0 +1 @@
+Subproject commit 63698efe8567eed115fe620d5e5de75f460310d7
diff --git a/lib/alif_ensemble-cmsis-dfp b/lib/alif_ensemble-cmsis-dfp
new file mode 160000
index 0000000000000..04b3176a0031c
--- /dev/null
+++ b/lib/alif_ensemble-cmsis-dfp
@@ -0,0 +1 @@
+Subproject commit 04b3176a0031c945d4306db00663379e9b431e08
diff --git a/lib/cyw43-driver b/lib/cyw43-driver
index 9f6405f0b3260..dd7568229f3bf 160000
--- a/lib/cyw43-driver
+++ b/lib/cyw43-driver
@@ -1 +1 @@
-Subproject commit 9f6405f0b3260968306d782e1c5ac275a46dc65d
+Subproject commit dd7568229f3bf7a37737b9e1ef250c26efe75b23
diff --git a/lib/libhydrogen b/lib/libhydrogen
index 5c5d513093075..bbca575b62510 160000
--- a/lib/libhydrogen
+++ b/lib/libhydrogen
@@ -1 +1 @@
-Subproject commit 5c5d513093075f7245ea522101b17c50aa579af2
+Subproject commit bbca575b62510bfdc6dd927a4bfa7df4a51cb846
diff --git a/lib/littlefs/lfs1.c b/lib/littlefs/lfs1.c
index 6a3fd670012cc..ec18dc470258c 100644
--- a/lib/littlefs/lfs1.c
+++ b/lib/littlefs/lfs1.c
@@ -2141,7 +2141,7 @@ int lfs1_format(lfs1_t *lfs1, const struct lfs1_config *cfg) {
             .d.elen = sizeof(superblock.d) - sizeof(superblock.d.magic) - 4,
             .d.nlen = sizeof(superblock.d.magic),
             .d.version = LFS1_DISK_VERSION,
-            .d.magic = {"littlefs"},
+            .d.magic = {'l', 'i', 't', 't', 'l', 'e', 'f', 's'},
             .d.block_size  = lfs1->cfg->block_size,
             .d.block_count = lfs1->cfg->block_count,
             .d.root = {lfs1->root[0], lfs1->root[1]},
diff --git a/lib/littlefs/lfs2.c b/lib/littlefs/lfs2.c
index d89c42fd59a21..abdec19d7cb6d 100644
--- a/lib/littlefs/lfs2.c
+++ b/lib/littlefs/lfs2.c
@@ -282,6 +282,21 @@ static int lfs2_bd_erase(lfs2_t *lfs2, lfs2_block_t block) {
 
 
 /// Small type-level utilities ///
+
+// some operations on paths
+static inline lfs2_size_t lfs2_path_namelen(const char *path) {
+    return strcspn(path, "/");
+}
+
+static inline bool lfs2_path_islast(const char *path) {
+    lfs2_size_t namelen = lfs2_path_namelen(path);
+    return path[namelen + strspn(path + namelen, "/")] == '\0';
+}
+
+static inline bool lfs2_path_isdir(const char *path) {
+    return path[lfs2_path_namelen(path)] != '\0';
+}
+
 // operations on block pairs
 static inline void lfs2_pair_swap(lfs2_block_t pair[2]) {
     lfs2_block_t t = pair[0];
@@ -389,18 +404,15 @@ struct lfs2_diskoff {
 
 // operations on global state
 static inline void lfs2_gstate_xor(lfs2_gstate_t *a, const lfs2_gstate_t *b) {
-    for (int i = 0; i < 3; i++) {
-        ((uint32_t*)a)[i] ^= ((const uint32_t*)b)[i];
-    }
+    a->tag ^= b->tag;
+    a->pair[0] ^= b->pair[0];
+    a->pair[1] ^= b->pair[1];
 }
 
 static inline bool lfs2_gstate_iszero(const lfs2_gstate_t *a) {
-    for (int i = 0; i < 3; i++) {
-        if (((uint32_t*)a)[i] != 0) {
-            return false;
-        }
-    }
-    return true;
+    return a->tag == 0
+            && a->pair[0] == 0
+            && a->pair[1] == 0;
 }
 
 #ifndef LFS2_READONLY
@@ -550,9 +562,9 @@ static int lfs2_dir_compact(lfs2_t *lfs2,
         lfs2_mdir_t *source, uint16_t begin, uint16_t end);
 static lfs2_ssize_t lfs2_file_flushedwrite(lfs2_t *lfs2, lfs2_file_t *file,
         const void *buffer, lfs2_size_t size);
-static lfs2_ssize_t lfs2_file_rawwrite(lfs2_t *lfs2, lfs2_file_t *file,
+static lfs2_ssize_t lfs2_file_write_(lfs2_t *lfs2, lfs2_file_t *file,
         const void *buffer, lfs2_size_t size);
-static int lfs2_file_rawsync(lfs2_t *lfs2, lfs2_file_t *file);
+static int lfs2_file_sync_(lfs2_t *lfs2, lfs2_file_t *file);
 static int lfs2_file_outline(lfs2_t *lfs2, lfs2_file_t *file);
 static int lfs2_file_flush(lfs2_t *lfs2, lfs2_file_t *file);
 
@@ -574,65 +586,72 @@ static int lfs21_traverse(lfs2_t *lfs2,
         int (*cb)(void*, lfs2_block_t), void *data);
 #endif
 
-static int lfs2_dir_rawrewind(lfs2_t *lfs2, lfs2_dir_t *dir);
+static int lfs2_dir_rewind_(lfs2_t *lfs2, lfs2_dir_t *dir);
 
 static lfs2_ssize_t lfs2_file_flushedread(lfs2_t *lfs2, lfs2_file_t *file,
         void *buffer, lfs2_size_t size);
-static lfs2_ssize_t lfs2_file_rawread(lfs2_t *lfs2, lfs2_file_t *file,
+static lfs2_ssize_t lfs2_file_read_(lfs2_t *lfs2, lfs2_file_t *file,
         void *buffer, lfs2_size_t size);
-static int lfs2_file_rawclose(lfs2_t *lfs2, lfs2_file_t *file);
-static lfs2_soff_t lfs2_file_rawsize(lfs2_t *lfs2, lfs2_file_t *file);
+static int lfs2_file_close_(lfs2_t *lfs2, lfs2_file_t *file);
+static lfs2_soff_t lfs2_file_size_(lfs2_t *lfs2, lfs2_file_t *file);
 
-static lfs2_ssize_t lfs2_fs_rawsize(lfs2_t *lfs2);
-static int lfs2_fs_rawtraverse(lfs2_t *lfs2,
+static lfs2_ssize_t lfs2_fs_size_(lfs2_t *lfs2);
+static int lfs2_fs_traverse_(lfs2_t *lfs2,
         int (*cb)(void *data, lfs2_block_t block), void *data,
         bool includeorphans);
 
 static int lfs2_deinit(lfs2_t *lfs2);
-static int lfs2_rawunmount(lfs2_t *lfs2);
+static int lfs2_unmount_(lfs2_t *lfs2);
 
 
 /// Block allocator ///
+
+// allocations should call this when all allocated blocks are committed to
+// the filesystem
+//
+// after a checkpoint, the block allocator may realloc any untracked blocks
+static void lfs2_alloc_ckpoint(lfs2_t *lfs2) {
+    lfs2->lookahead.ckpoint = lfs2->block_count;
+}
+
+// drop the lookahead buffer, this is done during mounting and failed
+// traversals in order to avoid invalid lookahead state
+static void lfs2_alloc_drop(lfs2_t *lfs2) {
+    lfs2->lookahead.size = 0;
+    lfs2->lookahead.next = 0;
+    lfs2_alloc_ckpoint(lfs2);
+}
+
 #ifndef LFS2_READONLY
 static int lfs2_alloc_lookahead(void *p, lfs2_block_t block) {
     lfs2_t *lfs2 = (lfs2_t*)p;
-    lfs2_block_t off = ((block - lfs2->free.off)
+    lfs2_block_t off = ((block - lfs2->lookahead.start)
             + lfs2->block_count) % lfs2->block_count;
 
-    if (off < lfs2->free.size) {
-        lfs2->free.buffer[off / 32] |= 1U << (off % 32);
+    if (off < lfs2->lookahead.size) {
+        lfs2->lookahead.buffer[off / 8] |= 1U << (off % 8);
     }
 
     return 0;
 }
 #endif
 
-// indicate allocated blocks have been committed into the filesystem, this
-// is to prevent blocks from being garbage collected in the middle of a
-// commit operation
-static void lfs2_alloc_ack(lfs2_t *lfs2) {
-    lfs2->free.ack = lfs2->block_count;
-}
-
-// drop the lookahead buffer, this is done during mounting and failed
-// traversals in order to avoid invalid lookahead state
-static void lfs2_alloc_drop(lfs2_t *lfs2) {
-    lfs2->free.size = 0;
-    lfs2->free.i = 0;
-    lfs2_alloc_ack(lfs2);
-}
-
 #ifndef LFS2_READONLY
-static int lfs2_fs_rawgc(lfs2_t *lfs2) {
-    // Move free offset at the first unused block (lfs2->free.i)
-    // lfs2->free.i is equal lfs2->free.size when all blocks are used
-    lfs2->free.off = (lfs2->free.off + lfs2->free.i) % lfs2->block_count;
-    lfs2->free.size = lfs2_min(8*lfs2->cfg->lookahead_size, lfs2->free.ack);
-    lfs2->free.i = 0;
+static int lfs2_alloc_scan(lfs2_t *lfs2) {
+    // move lookahead buffer to the first unused block
+    //
+    // note we limit the lookahead buffer to at most the amount of blocks
+    // checkpointed, this prevents the math in lfs2_alloc from underflowing
+    lfs2->lookahead.start = (lfs2->lookahead.start + lfs2->lookahead.next) 
+            % lfs2->block_count;
+    lfs2->lookahead.next = 0;
+    lfs2->lookahead.size = lfs2_min(
+            8*lfs2->cfg->lookahead_size,
+            lfs2->lookahead.ckpoint);
 
     // find mask of free blocks from tree
-    memset(lfs2->free.buffer, 0, lfs2->cfg->lookahead_size);
-    int err = lfs2_fs_rawtraverse(lfs2, lfs2_alloc_lookahead, lfs2, true);
+    memset(lfs2->lookahead.buffer, 0, lfs2->cfg->lookahead_size);
+    int err = lfs2_fs_traverse_(lfs2, lfs2_alloc_lookahead, lfs2, true);
     if (err) {
         lfs2_alloc_drop(lfs2);
         return err;
@@ -645,36 +664,49 @@ static int lfs2_fs_rawgc(lfs2_t *lfs2) {
 #ifndef LFS2_READONLY
 static int lfs2_alloc(lfs2_t *lfs2, lfs2_block_t *block) {
     while (true) {
-        while (lfs2->free.i != lfs2->free.size) {
-            lfs2_block_t off = lfs2->free.i;
-            lfs2->free.i += 1;
-            lfs2->free.ack -= 1;
-
-            if (!(lfs2->free.buffer[off / 32] & (1U << (off % 32)))) {
+        // scan our lookahead buffer for free blocks
+        while (lfs2->lookahead.next < lfs2->lookahead.size) {
+            if (!(lfs2->lookahead.buffer[lfs2->lookahead.next / 8]
+                    & (1U << (lfs2->lookahead.next % 8)))) {
                 // found a free block
-                *block = (lfs2->free.off + off) % lfs2->block_count;
-
-                // eagerly find next off so an alloc ack can
-                // discredit old lookahead blocks
-                while (lfs2->free.i != lfs2->free.size &&
-                        (lfs2->free.buffer[lfs2->free.i / 32]
-                            & (1U << (lfs2->free.i % 32)))) {
-                    lfs2->free.i += 1;
-                    lfs2->free.ack -= 1;
+                *block = (lfs2->lookahead.start + lfs2->lookahead.next)
+                        % lfs2->block_count;
+
+                // eagerly find next free block to maximize how many blocks
+                // lfs2_alloc_ckpoint makes available for scanning
+                while (true) {
+                    lfs2->lookahead.next += 1;
+                    lfs2->lookahead.ckpoint -= 1;
+
+                    if (lfs2->lookahead.next >= lfs2->lookahead.size
+                            || !(lfs2->lookahead.buffer[lfs2->lookahead.next / 8]
+                                & (1U << (lfs2->lookahead.next % 8)))) {
+                        return 0;
+                    }
                 }
-
-                return 0;
             }
+
+            lfs2->lookahead.next += 1;
+            lfs2->lookahead.ckpoint -= 1;
         }
 
-        // check if we have looked at all blocks since last ack
-        if (lfs2->free.ack == 0) {
-            LFS2_ERROR("No more free space %"PRIu32,
-                    lfs2->free.i + lfs2->free.off);
+        // In order to keep our block allocator from spinning forever when our
+        // filesystem is full, we mark points where there are no in-flight
+        // allocations with a checkpoint before starting a set of allocations.
+        //
+        // If we've looked at all blocks since the last checkpoint, we report
+        // the filesystem as out of storage.
+        //
+        if (lfs2->lookahead.ckpoint <= 0) {
+            LFS2_ERROR("No more free space 0x%"PRIx32,
+                    (lfs2->lookahead.start + lfs2->lookahead.next)
+                        % lfs2->block_count);
             return LFS2_ERR_NOSPC;
         }
 
-        int err = lfs2_fs_rawgc(lfs2);
+        // No blocks in our lookahead buffer, we need to scan the filesystem for
+        // unused blocks in the next lookahead window.
+        int err = lfs2_alloc_scan(lfs2);
         if(err) {
             return err;
         }
@@ -690,11 +722,14 @@ static lfs2_stag_t lfs2_dir_getslice(lfs2_t *lfs2, const lfs2_mdir_t *dir,
     lfs2_tag_t ntag = dir->etag;
     lfs2_stag_t gdiff = 0;
 
+    // synthetic moves
     if (lfs2_gstate_hasmovehere(&lfs2->gdisk, dir->pair) &&
-            lfs2_tag_id(gmask) != 0 &&
-            lfs2_tag_id(lfs2->gdisk.tag) <= lfs2_tag_id(gtag)) {
-        // synthetic moves
-        gdiff -= LFS2_MKTAG(0, 1, 0);
+            lfs2_tag_id(gmask) != 0) {
+        if (lfs2_tag_id(lfs2->gdisk.tag) == lfs2_tag_id(gtag)) {
+            return LFS2_ERR_NOENT;
+        } else if (lfs2_tag_id(lfs2->gdisk.tag) < lfs2_tag_id(gtag)) {
+            gdiff -= LFS2_MKTAG(0, 1, 0);
+        }
     }
 
     // iterate over dir block backwards (for faster lookups)
@@ -1438,32 +1473,46 @@ static int lfs2_dir_find_match(void *data,
     return LFS2_CMP_EQ;
 }
 
+// lfs2_dir_find tries to set path and id even if file is not found
+//
+// returns:
+// - 0                  if file is found
+// - LFS2_ERR_NOENT      if file or parent is not found
+// - LFS2_ERR_NOTDIR     if parent is not a dir
 static lfs2_stag_t lfs2_dir_find(lfs2_t *lfs2, lfs2_mdir_t *dir,
         const char **path, uint16_t *id) {
     // we reduce path to a single name if we can find it
     const char *name = *path;
-    if (id) {
-        *id = 0x3ff;
-    }
 
     // default to root dir
     lfs2_stag_t tag = LFS2_MKTAG(LFS2_TYPE_DIR, 0x3ff, 0);
     dir->tail[0] = lfs2->root[0];
     dir->tail[1] = lfs2->root[1];
 
+    // empty paths are not allowed
+    if (*name == '\0') {
+        return LFS2_ERR_INVAL;
+    }
+
     while (true) {
 nextname:
-        // skip slashes
-        name += strspn(name, "/");
+        // skip slashes if we're a directory
+        if (lfs2_tag_type3(tag) == LFS2_TYPE_DIR) {
+            name += strspn(name, "/");
+        }
         lfs2_size_t namelen = strcspn(name, "/");
 
-        // skip '.' and root '..'
-        if ((namelen == 1 && memcmp(name, ".", 1) == 0) ||
-            (namelen == 2 && memcmp(name, "..", 2) == 0)) {
+        // skip '.'
+        if (namelen == 1 && memcmp(name, ".", 1) == 0) {
             name += namelen;
             goto nextname;
         }
 
+        // error on unmatched '..', trying to go above root?
+        if (namelen == 2 && memcmp(name, "..", 2) == 0) {
+            return LFS2_ERR_INVAL;
+        }
+
         // skip if matched by '..' in name
         const char *suffix = name + namelen;
         lfs2_size_t sufflen;
@@ -1475,7 +1524,9 @@ static lfs2_stag_t lfs2_dir_find(lfs2_t *lfs2, lfs2_mdir_t *dir,
                 break;
             }
 
-            if (sufflen == 2 && memcmp(suffix, "..", 2) == 0) {
+            if (sufflen == 1 && memcmp(suffix, ".", 1) == 0) {
+                // noop
+            } else if (sufflen == 2 && memcmp(suffix, "..", 2) == 0) {
                 depth -= 1;
                 if (depth == 0) {
                     name = suffix + sufflen;
@@ -1489,14 +1540,14 @@ static lfs2_stag_t lfs2_dir_find(lfs2_t *lfs2, lfs2_mdir_t *dir,
         }
 
         // found path
-        if (name[0] == '\0') {
+        if (*name == '\0') {
             return tag;
         }
 
         // update what we've found so far
         *path = name;
 
-        // only continue if we hit a directory
+        // only continue if we're a directory
         if (lfs2_tag_type3(tag) != LFS2_TYPE_DIR) {
             return LFS2_ERR_NOTDIR;
         }
@@ -1516,8 +1567,7 @@ static lfs2_stag_t lfs2_dir_find(lfs2_t *lfs2, lfs2_mdir_t *dir,
             tag = lfs2_dir_fetchmatch(lfs2, dir, dir->tail,
                     LFS2_MKTAG(0x780, 0, 0),
                     LFS2_MKTAG(LFS2_TYPE_NAME, 0, namelen),
-                     // are we last name?
-                    (strchr(name, '/') == NULL) ? id : NULL,
+                    id,
                     lfs2_dir_find_match, &(struct lfs2_dir_find_match){
                         lfs2, name, namelen});
             if (tag < 0) {
@@ -2105,13 +2155,14 @@ static int lfs2_dir_splittingcompact(lfs2_t *lfs2, lfs2_mdir_t *dir,
             // And we cap at half a block to avoid degenerate cases with
             // nearly-full metadata blocks.
             //
+            lfs2_size_t metadata_max = (lfs2->cfg->metadata_max)
+                    ? lfs2->cfg->metadata_max
+                    : lfs2->cfg->block_size;
             if (end - split < 0xff
                     && size <= lfs2_min(
-                        lfs2->cfg->block_size - 40,
+                        metadata_max - 40,
                         lfs2_alignup(
-                            (lfs2->cfg->metadata_max
-                                ? lfs2->cfg->metadata_max
-                                : lfs2->cfg->block_size)/2,
+                            metadata_max/2,
                             lfs2->cfg->prog_size))) {
                 break;
             }
@@ -2146,14 +2197,16 @@ static int lfs2_dir_splittingcompact(lfs2_t *lfs2, lfs2_mdir_t *dir,
             && lfs2_pair_cmp(dir->pair, (const lfs2_block_t[2]){0, 1}) == 0) {
         // oh no! we're writing too much to the superblock,
         // should we expand?
-        lfs2_ssize_t size = lfs2_fs_rawsize(lfs2);
+        lfs2_ssize_t size = lfs2_fs_size_(lfs2);
         if (size < 0) {
             return size;
         }
 
-        // do we have extra space? littlefs can't reclaim this space
-        // by itself, so expand cautiously
-        if ((lfs2_size_t)size < lfs2->block_count/2) {
+        // littlefs cannot reclaim expanded superblocks, so expand cautiously
+        //
+        // if our filesystem is more than ~88% full, don't expand, this is
+        // somewhat arbitrary
+        if (lfs2->block_count - size > lfs2->block_count/8) {
             LFS2_DEBUG("Expanding superblock at rev %"PRIu32, dir->rev);
             int err = lfs2_dir_split(lfs2, dir, attrs, attrcount,
                     source, begin, end);
@@ -2166,7 +2219,8 @@ static int lfs2_dir_splittingcompact(lfs2_t *lfs2, lfs2_mdir_t *dir,
                 // we can do, we'll error later if we've become frozen
                 LFS2_WARN("Unable to expand superblock");
             } else {
-                end = begin;
+                // duplicate the superblock entry into the new superblock
+                end = 1;
             }
         }
     }
@@ -2312,7 +2366,8 @@ fixmlist:;
             if (d->m.pair != pair) {
                 for (int i = 0; i < attrcount; i++) {
                     if (lfs2_tag_type3(attrs[i].tag) == LFS2_TYPE_DELETE &&
-                            d->id == lfs2_tag_id(attrs[i].tag)) {
+                            d->id == lfs2_tag_id(attrs[i].tag) &&
+                            d->type != LFS2_TYPE_DIR) {
                         d->m.pair[0] = LFS2_BLOCK_NULL;
                         d->m.pair[1] = LFS2_BLOCK_NULL;
                     } else if (lfs2_tag_type3(attrs[i].tag) == LFS2_TYPE_DELETE &&
@@ -2333,7 +2388,9 @@ fixmlist:;
 
             while (d->id >= d->m.count && d->m.split) {
                 // we split and id is on tail now
-                d->id -= d->m.count;
+                if (lfs2_pair_cmp(d->m.tail, lfs2->root) != 0) {
+                    d->id -= d->m.count;
+                }
                 int err = lfs2_dir_fetch(lfs2, &d->m, d->m.tail);
                 if (err) {
                     return err;
@@ -2499,7 +2556,7 @@ static int lfs2_dir_orphaningcommit(lfs2_t *lfs2, lfs2_mdir_t *dir,
         if (err != LFS2_ERR_NOENT) {
             if (lfs2_gstate_hasorphans(&lfs2->gstate)) {
                 // next step, clean up orphans
-                err = lfs2_fs_preporphans(lfs2, -hasparent);
+                err = lfs2_fs_preporphans(lfs2, -(int8_t)hasparent);
                 if (err) {
                     return err;
                 }
@@ -2564,7 +2621,7 @@ static int lfs2_dir_commit(lfs2_t *lfs2, lfs2_mdir_t *dir,
 
 /// Top level directory operations ///
 #ifndef LFS2_READONLY
-static int lfs2_rawmkdir(lfs2_t *lfs2, const char *path) {
+static int lfs2_mkdir_(lfs2_t *lfs2, const char *path) {
     // deorphan if we haven't yet, needed at most once after poweron
     int err = lfs2_fs_forceconsistency(lfs2);
     if (err) {
@@ -2575,18 +2632,18 @@ static int lfs2_rawmkdir(lfs2_t *lfs2, const char *path) {
     cwd.next = lfs2->mlist;
     uint16_t id;
     err = lfs2_dir_find(lfs2, &cwd.m, &path, &id);
-    if (!(err == LFS2_ERR_NOENT && id != 0x3ff)) {
+    if (!(err == LFS2_ERR_NOENT && lfs2_path_islast(path))) {
         return (err < 0) ? err : LFS2_ERR_EXIST;
     }
 
     // check that name fits
-    lfs2_size_t nlen = strlen(path);
+    lfs2_size_t nlen = lfs2_path_namelen(path);
     if (nlen > lfs2->name_max) {
         return LFS2_ERR_NAMETOOLONG;
     }
 
     // build up new directory
-    lfs2_alloc_ack(lfs2);
+    lfs2_alloc_ckpoint(lfs2);
     lfs2_mdir_t dir;
     err = lfs2_dir_alloc(lfs2, &dir);
     if (err) {
@@ -2660,7 +2717,7 @@ static int lfs2_rawmkdir(lfs2_t *lfs2, const char *path) {
 }
 #endif
 
-static int lfs2_dir_rawopen(lfs2_t *lfs2, lfs2_dir_t *dir, const char *path) {
+static int lfs2_dir_open_(lfs2_t *lfs2, lfs2_dir_t *dir, const char *path) {
     lfs2_stag_t tag = lfs2_dir_find(lfs2, &dir->m, &path, NULL);
     if (tag < 0) {
         return tag;
@@ -2704,14 +2761,14 @@ static int lfs2_dir_rawopen(lfs2_t *lfs2, lfs2_dir_t *dir, const char *path) {
     return 0;
 }
 
-static int lfs2_dir_rawclose(lfs2_t *lfs2, lfs2_dir_t *dir) {
+static int lfs2_dir_close_(lfs2_t *lfs2, lfs2_dir_t *dir) {
     // remove from list of mdirs
     lfs2_mlist_remove(lfs2, (struct lfs2_mlist *)dir);
 
     return 0;
 }
 
-static int lfs2_dir_rawread(lfs2_t *lfs2, lfs2_dir_t *dir, struct lfs2_info *info) {
+static int lfs2_dir_read_(lfs2_t *lfs2, lfs2_dir_t *dir, struct lfs2_info *info) {
     memset(info, 0, sizeof(*info));
 
     // special offset for '.' and '..'
@@ -2756,9 +2813,9 @@ static int lfs2_dir_rawread(lfs2_t *lfs2, lfs2_dir_t *dir, struct lfs2_info *inf
     return true;
 }
 
-static int lfs2_dir_rawseek(lfs2_t *lfs2, lfs2_dir_t *dir, lfs2_off_t off) {
+static int lfs2_dir_seek_(lfs2_t *lfs2, lfs2_dir_t *dir, lfs2_off_t off) {
     // simply walk from head dir
-    int err = lfs2_dir_rawrewind(lfs2, dir);
+    int err = lfs2_dir_rewind_(lfs2, dir);
     if (err) {
         return err;
     }
@@ -2793,12 +2850,12 @@ static int lfs2_dir_rawseek(lfs2_t *lfs2, lfs2_dir_t *dir, lfs2_off_t off) {
     return 0;
 }
 
-static lfs2_soff_t lfs2_dir_rawtell(lfs2_t *lfs2, lfs2_dir_t *dir) {
+static lfs2_soff_t lfs2_dir_tell_(lfs2_t *lfs2, lfs2_dir_t *dir) {
     (void)lfs2;
     return dir->pos;
 }
 
-static int lfs2_dir_rawrewind(lfs2_t *lfs2, lfs2_dir_t *dir) {
+static int lfs2_dir_rewind_(lfs2_t *lfs2, lfs2_dir_t *dir) {
     // reload the head dir
     int err = lfs2_dir_fetch(lfs2, &dir->m, dir->head);
     if (err) {
@@ -3004,7 +3061,7 @@ static int lfs2_ctz_traverse(lfs2_t *lfs2,
 
 
 /// Top level file operations ///
-static int lfs2_file_rawopencfg(lfs2_t *lfs2, lfs2_file_t *file,
+static int lfs2_file_opencfg_(lfs2_t *lfs2, lfs2_file_t *file,
         const char *path, int flags,
         const struct lfs2_file_config *cfg) {
 #ifndef LFS2_READONLY
@@ -3029,7 +3086,7 @@ static int lfs2_file_rawopencfg(lfs2_t *lfs2, lfs2_file_t *file,
 
     // allocate entry for file if it doesn't exist
     lfs2_stag_t tag = lfs2_dir_find(lfs2, &file->m, &path, &file->id);
-    if (tag < 0 && !(tag == LFS2_ERR_NOENT && file->id != 0x3ff)) {
+    if (tag < 0 && !(tag == LFS2_ERR_NOENT && lfs2_path_islast(path))) {
         err = tag;
         goto cleanup;
     }
@@ -3049,8 +3106,14 @@ static int lfs2_file_rawopencfg(lfs2_t *lfs2, lfs2_file_t *file,
             goto cleanup;
         }
 
+        // don't allow trailing slashes
+        if (lfs2_path_isdir(path)) {
+            err = LFS2_ERR_NOTDIR;
+            goto cleanup;
+        }
+
         // check that name fits
-        lfs2_size_t nlen = strlen(path);
+        lfs2_size_t nlen = lfs2_path_namelen(path);
         if (nlen > lfs2->name_max) {
             err = LFS2_ERR_NAMETOOLONG;
             goto cleanup;
@@ -3166,22 +3229,22 @@ static int lfs2_file_rawopencfg(lfs2_t *lfs2, lfs2_file_t *file,
 #ifndef LFS2_READONLY
     file->flags |= LFS2_F_ERRED;
 #endif
-    lfs2_file_rawclose(lfs2, file);
+    lfs2_file_close_(lfs2, file);
     return err;
 }
 
 #ifndef LFS2_NO_MALLOC
-static int lfs2_file_rawopen(lfs2_t *lfs2, lfs2_file_t *file,
+static int lfs2_file_open_(lfs2_t *lfs2, lfs2_file_t *file,
         const char *path, int flags) {
     static const struct lfs2_file_config defaults = {0};
-    int err = lfs2_file_rawopencfg(lfs2, file, path, flags, &defaults);
+    int err = lfs2_file_opencfg_(lfs2, file, path, flags, &defaults);
     return err;
 }
 #endif
 
-static int lfs2_file_rawclose(lfs2_t *lfs2, lfs2_file_t *file) {
+static int lfs2_file_close_(lfs2_t *lfs2, lfs2_file_t *file) {
 #ifndef LFS2_READONLY
-    int err = lfs2_file_rawsync(lfs2, file);
+    int err = lfs2_file_sync_(lfs2, file);
 #else
     int err = 0;
 #endif
@@ -3272,7 +3335,7 @@ static int lfs2_file_relocate(lfs2_t *lfs2, lfs2_file_t *file) {
 #ifndef LFS2_READONLY
 static int lfs2_file_outline(lfs2_t *lfs2, lfs2_file_t *file) {
     file->off = file->pos;
-    lfs2_alloc_ack(lfs2);
+    lfs2_alloc_ckpoint(lfs2);
     int err = lfs2_file_relocate(lfs2, file);
     if (err) {
         return err;
@@ -3364,7 +3427,7 @@ static int lfs2_file_flush(lfs2_t *lfs2, lfs2_file_t *file) {
 }
 
 #ifndef LFS2_READONLY
-static int lfs2_file_rawsync(lfs2_t *lfs2, lfs2_file_t *file) {
+static int lfs2_file_sync_(lfs2_t *lfs2, lfs2_file_t *file) {
     if (file->flags & LFS2_F_ERRED) {
         // it's not safe to do anything if our file errored
         return 0;
@@ -3379,6 +3442,15 @@ static int lfs2_file_rawsync(lfs2_t *lfs2, lfs2_file_t *file) {
 
     if ((file->flags & LFS2_F_DIRTY) &&
             !lfs2_pair_isnull(file->m.pair)) {
+        // before we commit metadata, we need sync the disk to make sure
+        // data writes don't complete after metadata writes
+        if (!(file->flags & LFS2_F_INLINE)) {
+            err = lfs2_bd_sync(lfs2, &lfs2->pcache, &lfs2->rcache, false);
+            if (err) {
+                return err;
+            }
+        }
+
         // update dir entry
         uint16_t type;
         const void *buffer;
@@ -3477,7 +3549,7 @@ static lfs2_ssize_t lfs2_file_flushedread(lfs2_t *lfs2, lfs2_file_t *file,
     return size;
 }
 
-static lfs2_ssize_t lfs2_file_rawread(lfs2_t *lfs2, lfs2_file_t *file,
+static lfs2_ssize_t lfs2_file_read_(lfs2_t *lfs2, lfs2_file_t *file,
         void *buffer, lfs2_size_t size) {
     LFS2_ASSERT((file->flags & LFS2_O_RDONLY) == LFS2_O_RDONLY);
 
@@ -3502,11 +3574,7 @@ static lfs2_ssize_t lfs2_file_flushedwrite(lfs2_t *lfs2, lfs2_file_t *file,
     lfs2_size_t nsize = size;
 
     if ((file->flags & LFS2_F_INLINE) &&
-            lfs2_max(file->pos+nsize, file->ctz.size) >
-            lfs2_min(0x3fe, lfs2_min(
-                lfs2->cfg->cache_size,
-                (lfs2->cfg->metadata_max ?
-                    lfs2->cfg->metadata_max : lfs2->cfg->block_size) / 8))) {
+            lfs2_max(file->pos+nsize, file->ctz.size) > lfs2->inline_max) {
         // inline file doesn't fit anymore
         int err = lfs2_file_outline(lfs2, file);
         if (err) {
@@ -3535,7 +3603,7 @@ static lfs2_ssize_t lfs2_file_flushedwrite(lfs2_t *lfs2, lfs2_file_t *file,
                 }
 
                 // extend file with new blocks
-                lfs2_alloc_ack(lfs2);
+                lfs2_alloc_ckpoint(lfs2);
                 int err = lfs2_ctz_extend(lfs2, &file->cache, &lfs2->rcache,
                         file->block, file->pos,
                         &file->block, &file->off);
@@ -3578,13 +3646,13 @@ static lfs2_ssize_t lfs2_file_flushedwrite(lfs2_t *lfs2, lfs2_file_t *file,
         data += diff;
         nsize -= diff;
 
-        lfs2_alloc_ack(lfs2);
+        lfs2_alloc_ckpoint(lfs2);
     }
 
     return size;
 }
 
-static lfs2_ssize_t lfs2_file_rawwrite(lfs2_t *lfs2, lfs2_file_t *file,
+static lfs2_ssize_t lfs2_file_write_(lfs2_t *lfs2, lfs2_file_t *file,
         const void *buffer, lfs2_size_t size) {
     LFS2_ASSERT((file->flags & LFS2_O_WRONLY) == LFS2_O_WRONLY);
 
@@ -3628,25 +3696,19 @@ static lfs2_ssize_t lfs2_file_rawwrite(lfs2_t *lfs2, lfs2_file_t *file,
 }
 #endif
 
-static lfs2_soff_t lfs2_file_rawseek(lfs2_t *lfs2, lfs2_file_t *file,
+static lfs2_soff_t lfs2_file_seek_(lfs2_t *lfs2, lfs2_file_t *file,
         lfs2_soff_t off, int whence) {
     // find new pos
+    //
+    // fortunately for us, littlefs is limited to 31-bit file sizes, so we
+    // don't have to worry too much about integer overflow
     lfs2_off_t npos = file->pos;
     if (whence == LFS2_SEEK_SET) {
         npos = off;
     } else if (whence == LFS2_SEEK_CUR) {
-        if ((lfs2_soff_t)file->pos + off < 0) {
-            return LFS2_ERR_INVAL;
-        } else {
-            npos = file->pos + off;
-        }
+        npos = file->pos + (lfs2_off_t)off;
     } else if (whence == LFS2_SEEK_END) {
-        lfs2_soff_t res = lfs2_file_rawsize(lfs2, file) + off;
-        if (res < 0) {
-            return LFS2_ERR_INVAL;
-        } else {
-            npos = res;
-        }
+        npos = (lfs2_off_t)lfs2_file_size_(lfs2, file) + (lfs2_off_t)off;
     }
 
     if (npos > lfs2->file_max) {
@@ -3661,13 +3723,8 @@ static lfs2_soff_t lfs2_file_rawseek(lfs2_t *lfs2, lfs2_file_t *file,
 
     // if we're only reading and our new offset is still in the file's cache
     // we can avoid flushing and needing to reread the data
-    if (
-#ifndef LFS2_READONLY
-        !(file->flags & LFS2_F_WRITING)
-#else
-        true
-#endif
-            ) {
+    if ((file->flags & LFS2_F_READING)
+            && file->off != lfs2->cfg->block_size) {
         int oindex = lfs2_ctz_index(lfs2, &(lfs2_off_t){file->pos});
         lfs2_off_t noff = npos;
         int nindex = lfs2_ctz_index(lfs2, &noff);
@@ -3692,7 +3749,7 @@ static lfs2_soff_t lfs2_file_rawseek(lfs2_t *lfs2, lfs2_file_t *file,
 }
 
 #ifndef LFS2_READONLY
-static int lfs2_file_rawtruncate(lfs2_t *lfs2, lfs2_file_t *file, lfs2_off_t size) {
+static int lfs2_file_truncate_(lfs2_t *lfs2, lfs2_file_t *file, lfs2_off_t size) {
     LFS2_ASSERT((file->flags & LFS2_O_WRONLY) == LFS2_O_WRONLY);
 
     if (size > LFS2_FILE_MAX) {
@@ -3700,15 +3757,12 @@ static int lfs2_file_rawtruncate(lfs2_t *lfs2, lfs2_file_t *file, lfs2_off_t siz
     }
 
     lfs2_off_t pos = file->pos;
-    lfs2_off_t oldsize = lfs2_file_rawsize(lfs2, file);
+    lfs2_off_t oldsize = lfs2_file_size_(lfs2, file);
     if (size < oldsize) {
         // revert to inline file?
-        if (size <= lfs2_min(0x3fe, lfs2_min(
-                lfs2->cfg->cache_size,
-                (lfs2->cfg->metadata_max ?
-                    lfs2->cfg->metadata_max : lfs2->cfg->block_size) / 8))) {
+        if (size <= lfs2->inline_max) {
             // flush+seek to head
-            lfs2_soff_t res = lfs2_file_rawseek(lfs2, file, 0, LFS2_SEEK_SET);
+            lfs2_soff_t res = lfs2_file_seek_(lfs2, file, 0, LFS2_SEEK_SET);
             if (res < 0) {
                 return (int)res;
             }
@@ -3753,14 +3807,14 @@ static int lfs2_file_rawtruncate(lfs2_t *lfs2, lfs2_file_t *file, lfs2_off_t siz
         }
     } else if (size > oldsize) {
         // flush+seek if not already at end
-        lfs2_soff_t res = lfs2_file_rawseek(lfs2, file, 0, LFS2_SEEK_END);
+        lfs2_soff_t res = lfs2_file_seek_(lfs2, file, 0, LFS2_SEEK_END);
         if (res < 0) {
             return (int)res;
         }
 
         // fill with zeros
         while (file->pos < size) {
-            res = lfs2_file_rawwrite(lfs2, file, &(uint8_t){0}, 1);
+            res = lfs2_file_write_(lfs2, file, &(uint8_t){0}, 1);
             if (res < 0) {
                 return (int)res;
             }
@@ -3768,7 +3822,7 @@ static int lfs2_file_rawtruncate(lfs2_t *lfs2, lfs2_file_t *file, lfs2_off_t siz
     }
 
     // restore pos
-    lfs2_soff_t res = lfs2_file_rawseek(lfs2, file, pos, LFS2_SEEK_SET);
+    lfs2_soff_t res = lfs2_file_seek_(lfs2, file, pos, LFS2_SEEK_SET);
     if (res < 0) {
       return (int)res;
     }
@@ -3777,13 +3831,13 @@ static int lfs2_file_rawtruncate(lfs2_t *lfs2, lfs2_file_t *file, lfs2_off_t siz
 }
 #endif
 
-static lfs2_soff_t lfs2_file_rawtell(lfs2_t *lfs2, lfs2_file_t *file) {
+static lfs2_soff_t lfs2_file_tell_(lfs2_t *lfs2, lfs2_file_t *file) {
     (void)lfs2;
     return file->pos;
 }
 
-static int lfs2_file_rawrewind(lfs2_t *lfs2, lfs2_file_t *file) {
-    lfs2_soff_t res = lfs2_file_rawseek(lfs2, file, 0, LFS2_SEEK_SET);
+static int lfs2_file_rewind_(lfs2_t *lfs2, lfs2_file_t *file) {
+    lfs2_soff_t res = lfs2_file_seek_(lfs2, file, 0, LFS2_SEEK_SET);
     if (res < 0) {
         return (int)res;
     }
@@ -3791,7 +3845,7 @@ static int lfs2_file_rawrewind(lfs2_t *lfs2, lfs2_file_t *file) {
     return 0;
 }
 
-static lfs2_soff_t lfs2_file_rawsize(lfs2_t *lfs2, lfs2_file_t *file) {
+static lfs2_soff_t lfs2_file_size_(lfs2_t *lfs2, lfs2_file_t *file) {
     (void)lfs2;
 
 #ifndef LFS2_READONLY
@@ -3805,18 +3859,24 @@ static lfs2_soff_t lfs2_file_rawsize(lfs2_t *lfs2, lfs2_file_t *file) {
 
 
 /// General fs operations ///
-static int lfs2_rawstat(lfs2_t *lfs2, const char *path, struct lfs2_info *info) {
+static int lfs2_stat_(lfs2_t *lfs2, const char *path, struct lfs2_info *info) {
     lfs2_mdir_t cwd;
     lfs2_stag_t tag = lfs2_dir_find(lfs2, &cwd, &path, NULL);
     if (tag < 0) {
         return (int)tag;
     }
 
+    // only allow trailing slashes on dirs
+    if (strchr(path, '/') != NULL
+            && lfs2_tag_type3(tag) != LFS2_TYPE_DIR) {
+        return LFS2_ERR_NOTDIR;
+    }
+
     return lfs2_dir_getinfo(lfs2, &cwd, lfs2_tag_id(tag), info);
 }
 
 #ifndef LFS2_READONLY
-static int lfs2_rawremove(lfs2_t *lfs2, const char *path) {
+static int lfs2_remove_(lfs2_t *lfs2, const char *path) {
     // deorphan if we haven't yet, needed at most once after poweron
     int err = lfs2_fs_forceconsistency(lfs2);
     if (err) {
@@ -3872,7 +3932,9 @@ static int lfs2_rawremove(lfs2_t *lfs2, const char *path) {
     }
 
     lfs2->mlist = dir.next;
-    if (lfs2_tag_type3(tag) == LFS2_TYPE_DIR) {
+    if (lfs2_gstate_hasorphans(&lfs2->gstate)) {
+        LFS2_ASSERT(lfs2_tag_type3(tag) == LFS2_TYPE_DIR);
+
         // fix orphan
         err = lfs2_fs_preporphans(lfs2, -1);
         if (err) {
@@ -3895,7 +3957,7 @@ static int lfs2_rawremove(lfs2_t *lfs2, const char *path) {
 #endif
 
 #ifndef LFS2_READONLY
-static int lfs2_rawrename(lfs2_t *lfs2, const char *oldpath, const char *newpath) {
+static int lfs2_rename_(lfs2_t *lfs2, const char *oldpath, const char *newpath) {
     // deorphan if we haven't yet, needed at most once after poweron
     int err = lfs2_fs_forceconsistency(lfs2);
     if (err) {
@@ -3914,7 +3976,7 @@ static int lfs2_rawrename(lfs2_t *lfs2, const char *oldpath, const char *newpath
     uint16_t newid;
     lfs2_stag_t prevtag = lfs2_dir_find(lfs2, &newcwd, &newpath, &newid);
     if ((prevtag < 0 || lfs2_tag_id(prevtag) == 0x3ff) &&
-            !(prevtag == LFS2_ERR_NOENT && newid != 0x3ff)) {
+            !(prevtag == LFS2_ERR_NOENT && lfs2_path_islast(newpath))) {
         return (prevtag < 0) ? (int)prevtag : LFS2_ERR_INVAL;
     }
 
@@ -3925,8 +3987,14 @@ static int lfs2_rawrename(lfs2_t *lfs2, const char *oldpath, const char *newpath
     struct lfs2_mlist prevdir;
     prevdir.next = lfs2->mlist;
     if (prevtag == LFS2_ERR_NOENT) {
+        // if we're a file, don't allow trailing slashes
+        if (lfs2_path_isdir(newpath)
+                && lfs2_tag_type3(oldtag) != LFS2_TYPE_DIR) {
+            return LFS2_ERR_NOTDIR;
+        }
+
         // check that name fits
-        lfs2_size_t nlen = strlen(newpath);
+        lfs2_size_t nlen = lfs2_path_namelen(newpath);
         if (nlen > lfs2->name_max) {
             return LFS2_ERR_NAMETOOLONG;
         }
@@ -3938,7 +4006,9 @@ static int lfs2_rawrename(lfs2_t *lfs2, const char *oldpath, const char *newpath
             newoldid += 1;
         }
     } else if (lfs2_tag_type3(prevtag) != lfs2_tag_type3(oldtag)) {
-        return LFS2_ERR_ISDIR;
+        return (lfs2_tag_type3(prevtag) == LFS2_TYPE_DIR)
+                ? LFS2_ERR_ISDIR
+                : LFS2_ERR_NOTDIR;
     } else if (samepair && newid == newoldid) {
         // we're renaming to ourselves??
         return 0;
@@ -3984,7 +4054,8 @@ static int lfs2_rawrename(lfs2_t *lfs2, const char *oldpath, const char *newpath
             {LFS2_MKTAG_IF(prevtag != LFS2_ERR_NOENT,
                 LFS2_TYPE_DELETE, newid, 0), NULL},
             {LFS2_MKTAG(LFS2_TYPE_CREATE, newid, 0), NULL},
-            {LFS2_MKTAG(lfs2_tag_type3(oldtag), newid, strlen(newpath)), newpath},
+            {LFS2_MKTAG(lfs2_tag_type3(oldtag),
+                newid, lfs2_path_namelen(newpath)), newpath},
             {LFS2_MKTAG(LFS2_FROM_MOVE, newid, lfs2_tag_id(oldtag)), &oldcwd},
             {LFS2_MKTAG_IF(samepair,
                 LFS2_TYPE_DELETE, newoldid, 0), NULL}));
@@ -4007,8 +4078,10 @@ static int lfs2_rawrename(lfs2_t *lfs2, const char *oldpath, const char *newpath
     }
 
     lfs2->mlist = prevdir.next;
-    if (prevtag != LFS2_ERR_NOENT
-            && lfs2_tag_type3(prevtag) == LFS2_TYPE_DIR) {
+    if (lfs2_gstate_hasorphans(&lfs2->gstate)) {
+        LFS2_ASSERT(prevtag != LFS2_ERR_NOENT
+                && lfs2_tag_type3(prevtag) == LFS2_TYPE_DIR);
+
         // fix orphan
         err = lfs2_fs_preporphans(lfs2, -1);
         if (err) {
@@ -4030,7 +4103,7 @@ static int lfs2_rawrename(lfs2_t *lfs2, const char *oldpath, const char *newpath
 }
 #endif
 
-static lfs2_ssize_t lfs2_rawgetattr(lfs2_t *lfs2, const char *path,
+static lfs2_ssize_t lfs2_getattr_(lfs2_t *lfs2, const char *path,
         uint8_t type, void *buffer, lfs2_size_t size) {
     lfs2_mdir_t cwd;
     lfs2_stag_t tag = lfs2_dir_find(lfs2, &cwd, &path, NULL);
@@ -4088,7 +4161,7 @@ static int lfs2_commitattr(lfs2_t *lfs2, const char *path,
 #endif
 
 #ifndef LFS2_READONLY
-static int lfs2_rawsetattr(lfs2_t *lfs2, const char *path,
+static int lfs2_setattr_(lfs2_t *lfs2, const char *path,
         uint8_t type, const void *buffer, lfs2_size_t size) {
     if (size > lfs2->attr_max) {
         return LFS2_ERR_NOSPC;
@@ -4099,13 +4172,28 @@ static int lfs2_rawsetattr(lfs2_t *lfs2, const char *path,
 #endif
 
 #ifndef LFS2_READONLY
-static int lfs2_rawremoveattr(lfs2_t *lfs2, const char *path, uint8_t type) {
+static int lfs2_removeattr_(lfs2_t *lfs2, const char *path, uint8_t type) {
     return lfs2_commitattr(lfs2, path, type, NULL, 0x3ff);
 }
 #endif
 
 
 /// Filesystem operations ///
+
+// compile time checks, see lfs2.h for why these limits exist
+#if LFS2_NAME_MAX > 1022
+#error "Invalid LFS2_NAME_MAX, must be <= 1022"
+#endif
+
+#if LFS2_FILE_MAX > 2147483647
+#error "Invalid LFS2_FILE_MAX, must be <= 2147483647"
+#endif
+
+#if LFS2_ATTR_MAX > 1022
+#error "Invalid LFS2_ATTR_MAX, must be <= 1022"
+#endif
+
+// common filesystem initialization
 static int lfs2_init(lfs2_t *lfs2, const struct lfs2_config *cfg) {
     lfs2->cfg = cfg;
     lfs2->block_count = cfg->block_count;  // May be 0
@@ -4126,6 +4214,14 @@ static int lfs2_init(lfs2_t *lfs2, const struct lfs2_config *cfg) {
     // which littlefs currently does not support
     LFS2_ASSERT((bool)0x80000000);
 
+    // check that the required io functions are provided
+    LFS2_ASSERT(lfs2->cfg->read != NULL);
+#ifndef LFS2_READONLY
+    LFS2_ASSERT(lfs2->cfg->prog != NULL);
+    LFS2_ASSERT(lfs2->cfg->erase != NULL);
+    LFS2_ASSERT(lfs2->cfg->sync != NULL);
+#endif
+
     // validate that the lfs2-cfg sizes were initiated properly before
     // performing any arithmetic logics with them
     LFS2_ASSERT(lfs2->cfg->read_size != 0);
@@ -4153,6 +4249,23 @@ static int lfs2_init(lfs2_t *lfs2, const struct lfs2_config *cfg) {
     // wear-leveling.
     LFS2_ASSERT(lfs2->cfg->block_cycles != 0);
 
+    // check that compact_thresh makes sense
+    //
+    // metadata can't be compacted below block_size/2, and metadata can't
+    // exceed a block_size
+    LFS2_ASSERT(lfs2->cfg->compact_thresh == 0
+            || lfs2->cfg->compact_thresh >= lfs2->cfg->block_size/2);
+    LFS2_ASSERT(lfs2->cfg->compact_thresh == (lfs2_size_t)-1
+            || lfs2->cfg->compact_thresh <= lfs2->cfg->block_size);
+
+    // check that metadata_max is a multiple of read_size and prog_size,
+    // and a factor of the block_size
+    LFS2_ASSERT(!lfs2->cfg->metadata_max
+            || lfs2->cfg->metadata_max % lfs2->cfg->read_size == 0);
+    LFS2_ASSERT(!lfs2->cfg->metadata_max
+            || lfs2->cfg->metadata_max % lfs2->cfg->prog_size == 0);
+    LFS2_ASSERT(!lfs2->cfg->metadata_max
+            || lfs2->cfg->block_size % lfs2->cfg->metadata_max == 0);
 
     // setup read cache
     if (lfs2->cfg->read_buffer) {
@@ -4180,15 +4293,14 @@ static int lfs2_init(lfs2_t *lfs2, const struct lfs2_config *cfg) {
     lfs2_cache_zero(lfs2, &lfs2->rcache);
     lfs2_cache_zero(lfs2, &lfs2->pcache);
 
-    // setup lookahead, must be multiple of 64-bits, 32-bit aligned
+    // setup lookahead buffer, note mount finishes initializing this after
+    // we establish a decent pseudo-random seed
     LFS2_ASSERT(lfs2->cfg->lookahead_size > 0);
-    LFS2_ASSERT(lfs2->cfg->lookahead_size % 8 == 0 &&
-            (uintptr_t)lfs2->cfg->lookahead_buffer % 4 == 0);
     if (lfs2->cfg->lookahead_buffer) {
-        lfs2->free.buffer = lfs2->cfg->lookahead_buffer;
+        lfs2->lookahead.buffer = lfs2->cfg->lookahead_buffer;
     } else {
-        lfs2->free.buffer = lfs2_malloc(lfs2->cfg->lookahead_size);
-        if (!lfs2->free.buffer) {
+        lfs2->lookahead.buffer = lfs2_malloc(lfs2->cfg->lookahead_size);
+        if (!lfs2->lookahead.buffer) {
             err = LFS2_ERR_NOMEM;
             goto cleanup;
         }
@@ -4215,6 +4327,27 @@ static int lfs2_init(lfs2_t *lfs2, const struct lfs2_config *cfg) {
 
     LFS2_ASSERT(lfs2->cfg->metadata_max <= lfs2->cfg->block_size);
 
+    LFS2_ASSERT(lfs2->cfg->inline_max == (lfs2_size_t)-1
+            || lfs2->cfg->inline_max <= lfs2->cfg->cache_size);
+    LFS2_ASSERT(lfs2->cfg->inline_max == (lfs2_size_t)-1
+            || lfs2->cfg->inline_max <= lfs2->attr_max);
+    LFS2_ASSERT(lfs2->cfg->inline_max == (lfs2_size_t)-1
+            || lfs2->cfg->inline_max <= ((lfs2->cfg->metadata_max)
+                ? lfs2->cfg->metadata_max
+                : lfs2->cfg->block_size)/8);
+    lfs2->inline_max = lfs2->cfg->inline_max;
+    if (lfs2->inline_max == (lfs2_size_t)-1) {
+        lfs2->inline_max = 0;
+    } else if (lfs2->inline_max == 0) {
+        lfs2->inline_max = lfs2_min(
+                lfs2->cfg->cache_size,
+                lfs2_min(
+                    lfs2->attr_max,
+                    ((lfs2->cfg->metadata_max)
+                        ? lfs2->cfg->metadata_max
+                        : lfs2->cfg->block_size)/8));
+    }
+
     // setup default state
     lfs2->root[0] = LFS2_BLOCK_NULL;
     lfs2->root[1] = LFS2_BLOCK_NULL;
@@ -4245,7 +4378,7 @@ static int lfs2_deinit(lfs2_t *lfs2) {
     }
 
     if (!lfs2->cfg->lookahead_buffer) {
-        lfs2_free(lfs2->free.buffer);
+        lfs2_free(lfs2->lookahead.buffer);
     }
 
     return 0;
@@ -4254,7 +4387,7 @@ static int lfs2_deinit(lfs2_t *lfs2) {
 
 
 #ifndef LFS2_READONLY
-static int lfs2_rawformat(lfs2_t *lfs2, const struct lfs2_config *cfg) {
+static int lfs2_format_(lfs2_t *lfs2, const struct lfs2_config *cfg) {
     int err = 0;
     {
         err = lfs2_init(lfs2, cfg);
@@ -4265,12 +4398,12 @@ static int lfs2_rawformat(lfs2_t *lfs2, const struct lfs2_config *cfg) {
         LFS2_ASSERT(cfg->block_count != 0);
 
         // create free lookahead
-        memset(lfs2->free.buffer, 0, lfs2->cfg->lookahead_size);
-        lfs2->free.off = 0;
-        lfs2->free.size = lfs2_min(8*lfs2->cfg->lookahead_size,
+        memset(lfs2->lookahead.buffer, 0, lfs2->cfg->lookahead_size);
+        lfs2->lookahead.start = 0;
+        lfs2->lookahead.size = lfs2_min(8*lfs2->cfg->lookahead_size,
                 lfs2->block_count);
-        lfs2->free.i = 0;
-        lfs2_alloc_ack(lfs2);
+        lfs2->lookahead.next = 0;
+        lfs2_alloc_ckpoint(lfs2);
 
         // create root dir
         lfs2_mdir_t root;
@@ -4321,7 +4454,31 @@ static int lfs2_rawformat(lfs2_t *lfs2, const struct lfs2_config *cfg) {
 }
 #endif
 
-static int lfs2_rawmount(lfs2_t *lfs2, const struct lfs2_config *cfg) {
+struct lfs2_tortoise_t {
+    lfs2_block_t pair[2];
+    lfs2_size_t i;
+    lfs2_size_t period;
+};
+
+static int lfs2_tortoise_detectcycles(
+    const lfs2_mdir_t *dir, struct lfs2_tortoise_t *tortoise) {
+    // detect cycles with Brent's algorithm
+    if (lfs2_pair_issync(dir->tail, tortoise->pair)) {
+        LFS2_WARN("Cycle detected in tail list");
+        return LFS2_ERR_CORRUPT;
+    }
+    if (tortoise->i == tortoise->period) {
+        tortoise->pair[0] = dir->tail[0];
+        tortoise->pair[1] = dir->tail[1];
+        tortoise->i = 0;
+        tortoise->period *= 2;
+    }
+    tortoise->i += 1;
+
+    return LFS2_ERR_OK;
+}
+
+static int lfs2_mount_(lfs2_t *lfs2, const struct lfs2_config *cfg) {
     int err = lfs2_init(lfs2, cfg);
     if (err) {
         return err;
@@ -4329,23 +4486,16 @@ static int lfs2_rawmount(lfs2_t *lfs2, const struct lfs2_config *cfg) {
 
     // scan directory blocks for superblock and any global updates
     lfs2_mdir_t dir = {.tail = {0, 1}};
-    lfs2_block_t tortoise[2] = {LFS2_BLOCK_NULL, LFS2_BLOCK_NULL};
-    lfs2_size_t tortoise_i = 1;
-    lfs2_size_t tortoise_period = 1;
+    struct lfs2_tortoise_t tortoise = {
+        .pair = {LFS2_BLOCK_NULL, LFS2_BLOCK_NULL},
+        .i = 1,
+        .period = 1,
+    };
     while (!lfs2_pair_isnull(dir.tail)) {
-        // detect cycles with Brent's algorithm
-        if (lfs2_pair_issync(dir.tail, tortoise)) {
-            LFS2_WARN("Cycle detected in tail list");
-            err = LFS2_ERR_CORRUPT;
+        err = lfs2_tortoise_detectcycles(&dir, &tortoise);
+        if (err < 0) {
             goto cleanup;
         }
-        if (tortoise_i == tortoise_period) {
-            tortoise[0] = dir.tail[0];
-            tortoise[1] = dir.tail[1];
-            tortoise_i = 0;
-            tortoise_period *= 2;
-        }
-        tortoise_i += 1;
 
         // fetch next block in tail list
         lfs2_stag_t tag = lfs2_dir_fetchmatch(lfs2, &dir, dir.tail,
@@ -4394,6 +4544,7 @@ static int lfs2_rawmount(lfs2_t *lfs2, const struct lfs2_config *cfg) {
             // found older minor version? set an in-device only bit in the
             // gstate so we know we need to rewrite the superblock before
             // the first write
+            bool needssuperblock = false;
             if (minor_version < lfs2_fs_disk_version_minor(lfs2)) {
                 LFS2_DEBUG("Found older minor version "
                         "v%"PRIu16".%"PRIu16" < v%"PRIu16".%"PRIu16,
@@ -4401,10 +4552,11 @@ static int lfs2_rawmount(lfs2_t *lfs2, const struct lfs2_config *cfg) {
                         minor_version,
                         lfs2_fs_disk_version_major(lfs2),
                         lfs2_fs_disk_version_minor(lfs2));
-                // note this bit is reserved on disk, so fetching more gstate
-                // will not interfere here
-                lfs2_fs_prepsuperblock(lfs2, true);
+                needssuperblock = true;
             }
+            // note this bit is reserved on disk, so fetching more gstate
+            // will not interfere here
+            lfs2_fs_prepsuperblock(lfs2, needssuperblock);
 
             // check superblock configuration
             if (superblock.name_max) {
@@ -4438,6 +4590,9 @@ static int lfs2_rawmount(lfs2_t *lfs2, const struct lfs2_config *cfg) {
                 }
 
                 lfs2->attr_max = superblock.attr_max;
+
+                // we also need to update inline_max in case attr_max changed
+                lfs2->inline_max = lfs2_min(lfs2->inline_max, lfs2->attr_max);
             }
 
             // this is where we get the block_count from disk if block_count=0
@@ -4478,23 +4633,23 @@ static int lfs2_rawmount(lfs2_t *lfs2, const struct lfs2_config *cfg) {
 
     // setup free lookahead, to distribute allocations uniformly across
     // boots, we start the allocator at a random location
-    lfs2->free.off = lfs2->seed % lfs2->block_count;
+    lfs2->lookahead.start = lfs2->seed % lfs2->block_count;
     lfs2_alloc_drop(lfs2);
 
     return 0;
 
 cleanup:
-    lfs2_rawunmount(lfs2);
+    lfs2_unmount_(lfs2);
     return err;
 }
 
-static int lfs2_rawunmount(lfs2_t *lfs2) {
+static int lfs2_unmount_(lfs2_t *lfs2) {
     return lfs2_deinit(lfs2);
 }
 
 
 /// Filesystem filesystem operations ///
-static int lfs2_fs_rawstat(lfs2_t *lfs2, struct lfs2_fsinfo *fsinfo) {
+static int lfs2_fs_stat_(lfs2_t *lfs2, struct lfs2_fsinfo *fsinfo) {
     // if the superblock is up-to-date, we must be on the most recent
     // minor version of littlefs
     if (!lfs2_gstate_needssuperblock(&lfs2->gstate)) {
@@ -4534,7 +4689,7 @@ static int lfs2_fs_rawstat(lfs2_t *lfs2, struct lfs2_fsinfo *fsinfo) {
     return 0;
 }
 
-int lfs2_fs_rawtraverse(lfs2_t *lfs2,
+int lfs2_fs_traverse_(lfs2_t *lfs2,
         int (*cb)(void *data, lfs2_block_t block), void *data,
         bool includeorphans) {
     // iterate over metadata pairs
@@ -4553,22 +4708,17 @@ int lfs2_fs_rawtraverse(lfs2_t *lfs2,
     }
 #endif
 
-    lfs2_block_t tortoise[2] = {LFS2_BLOCK_NULL, LFS2_BLOCK_NULL};
-    lfs2_size_t tortoise_i = 1;
-    lfs2_size_t tortoise_period = 1;
+    struct lfs2_tortoise_t tortoise = {
+        .pair = {LFS2_BLOCK_NULL, LFS2_BLOCK_NULL},
+        .i = 1,
+        .period = 1,
+    };
+    int err = LFS2_ERR_OK;
     while (!lfs2_pair_isnull(dir.tail)) {
-        // detect cycles with Brent's algorithm
-        if (lfs2_pair_issync(dir.tail, tortoise)) {
-            LFS2_WARN("Cycle detected in tail list");
+        err = lfs2_tortoise_detectcycles(&dir, &tortoise);
+        if (err < 0) {
             return LFS2_ERR_CORRUPT;
         }
-        if (tortoise_i == tortoise_period) {
-            tortoise[0] = dir.tail[0];
-            tortoise[1] = dir.tail[1];
-            tortoise_i = 0;
-            tortoise_period *= 2;
-        }
-        tortoise_i += 1;
 
         for (int i = 0; i < 2; i++) {
             int err = cb(data, dir.tail[i]);
@@ -4647,22 +4797,17 @@ static int lfs2_fs_pred(lfs2_t *lfs2,
     // iterate over all directory directory entries
     pdir->tail[0] = 0;
     pdir->tail[1] = 1;
-    lfs2_block_t tortoise[2] = {LFS2_BLOCK_NULL, LFS2_BLOCK_NULL};
-    lfs2_size_t tortoise_i = 1;
-    lfs2_size_t tortoise_period = 1;
+    struct lfs2_tortoise_t tortoise = {
+        .pair = {LFS2_BLOCK_NULL, LFS2_BLOCK_NULL},
+        .i = 1,
+        .period = 1,
+    };
+    int err = LFS2_ERR_OK;
     while (!lfs2_pair_isnull(pdir->tail)) {
-        // detect cycles with Brent's algorithm
-        if (lfs2_pair_issync(pdir->tail, tortoise)) {
-            LFS2_WARN("Cycle detected in tail list");
+        err = lfs2_tortoise_detectcycles(pdir, &tortoise);
+        if (err < 0) {
             return LFS2_ERR_CORRUPT;
         }
-        if (tortoise_i == tortoise_period) {
-            tortoise[0] = pdir->tail[0];
-            tortoise[1] = pdir->tail[1];
-            tortoise_i = 0;
-            tortoise_period *= 2;
-        }
-        tortoise_i += 1;
 
         if (lfs2_pair_cmp(pdir->tail, pair) == 0) {
             return 0;
@@ -4712,22 +4857,17 @@ static lfs2_stag_t lfs2_fs_parent(lfs2_t *lfs2, const lfs2_block_t pair[2],
     // use fetchmatch with callback to find pairs
     parent->tail[0] = 0;
     parent->tail[1] = 1;
-    lfs2_block_t tortoise[2] = {LFS2_BLOCK_NULL, LFS2_BLOCK_NULL};
-    lfs2_size_t tortoise_i = 1;
-    lfs2_size_t tortoise_period = 1;
+    struct lfs2_tortoise_t tortoise = {
+        .pair = {LFS2_BLOCK_NULL, LFS2_BLOCK_NULL},
+        .i = 1,
+        .period = 1,
+    };
+    int err = LFS2_ERR_OK;
     while (!lfs2_pair_isnull(parent->tail)) {
-        // detect cycles with Brent's algorithm
-        if (lfs2_pair_issync(parent->tail, tortoise)) {
-            LFS2_WARN("Cycle detected in tail list");
-            return LFS2_ERR_CORRUPT;
-        }
-        if (tortoise_i == tortoise_period) {
-            tortoise[0] = parent->tail[0];
-            tortoise[1] = parent->tail[1];
-            tortoise_i = 0;
-            tortoise_period *= 2;
+        err = lfs2_tortoise_detectcycles(parent, &tortoise);
+        if (err < 0) {
+            return err;
         }
-        tortoise_i += 1;
 
         lfs2_stag_t tag = lfs2_dir_fetchmatch(lfs2, parent, parent->tail,
                 LFS2_MKTAG(0x7ff, 0, 0x3ff),
@@ -4999,7 +5139,7 @@ static int lfs2_fs_forceconsistency(lfs2_t *lfs2) {
 #endif
 
 #ifndef LFS2_READONLY
-static int lfs2_fs_rawmkconsistent(lfs2_t *lfs2) {
+static int lfs2_fs_mkconsistent_(lfs2_t *lfs2) {
     // lfs2_fs_forceconsistency does most of the work here
     int err = lfs2_fs_forceconsistency(lfs2);
     if (err) {
@@ -5035,9 +5175,9 @@ static int lfs2_fs_size_count(void *p, lfs2_block_t block) {
     return 0;
 }
 
-static lfs2_ssize_t lfs2_fs_rawsize(lfs2_t *lfs2) {
+static lfs2_ssize_t lfs2_fs_size_(lfs2_t *lfs2) {
     lfs2_size_t size = 0;
-    int err = lfs2_fs_rawtraverse(lfs2, lfs2_fs_size_count, &size, false);
+    int err = lfs2_fs_traverse_(lfs2, lfs2_fs_size_count, &size, false);
     if (err) {
         return err;
     }
@@ -5045,41 +5185,116 @@ static lfs2_ssize_t lfs2_fs_rawsize(lfs2_t *lfs2) {
     return size;
 }
 
+// explicit garbage collection
 #ifndef LFS2_READONLY
-static int lfs2_fs_rawgrow(lfs2_t *lfs2, lfs2_size_t block_count) {
-    // shrinking is not supported
-    LFS2_ASSERT(block_count >= lfs2->block_count);
+static int lfs2_fs_gc_(lfs2_t *lfs2) {
+    // force consistency, even if we're not necessarily going to write,
+    // because this function is supposed to take care of janitorial work
+    // isn't it?
+    int err = lfs2_fs_forceconsistency(lfs2);
+    if (err) {
+        return err;
+    }
 
-    if (block_count > lfs2->block_count) {
-        lfs2->block_count = block_count;
+    // try to compact metadata pairs, note we can't really accomplish
+    // anything if compact_thresh doesn't at least leave a prog_size
+    // available
+    if (lfs2->cfg->compact_thresh
+            < lfs2->cfg->block_size - lfs2->cfg->prog_size) {
+        // iterate over all mdirs
+        lfs2_mdir_t mdir = {.tail = {0, 1}};
+        while (!lfs2_pair_isnull(mdir.tail)) {
+            err = lfs2_dir_fetch(lfs2, &mdir, mdir.tail);
+            if (err) {
+                return err;
+            }
 
-        // fetch the root
-        lfs2_mdir_t root;
-        int err = lfs2_dir_fetch(lfs2, &root, lfs2->root);
+            // not erased? exceeds our compaction threshold?
+            if (!mdir.erased || ((lfs2->cfg->compact_thresh == 0)
+                    ? mdir.off > lfs2->cfg->block_size - lfs2->cfg->block_size/8
+                    : mdir.off > lfs2->cfg->compact_thresh)) {
+                // the easiest way to trigger a compaction is to mark
+                // the mdir as unerased and add an empty commit
+                mdir.erased = false;
+                err = lfs2_dir_commit(lfs2, &mdir, NULL, 0);
+                if (err) {
+                    return err;
+                }
+            }
+        }
+    }
+
+    // try to populate the lookahead buffer, unless it's already full
+    if (lfs2->lookahead.size < 8*lfs2->cfg->lookahead_size) {
+        err = lfs2_alloc_scan(lfs2);
         if (err) {
             return err;
         }
+    }
 
-        // update the superblock
-        lfs2_superblock_t superblock;
-        lfs2_stag_t tag = lfs2_dir_get(lfs2, &root, LFS2_MKTAG(0x7ff, 0x3ff, 0),
-                LFS2_MKTAG(LFS2_TYPE_INLINESTRUCT, 0, sizeof(superblock)),
-                &superblock);
-        if (tag < 0) {
-            return tag;
-        }
-        lfs2_superblock_fromle32(&superblock);
+    return 0;
+}
+#endif
+
+#ifndef LFS2_READONLY
+#ifdef LFS2_SHRINKNONRELOCATING
+static int lfs2_shrink_checkblock(void *data, lfs2_block_t block) {
+    lfs2_size_t threshold = *((lfs2_size_t*)data);
+    if (block >= threshold) {
+        return LFS2_ERR_NOTEMPTY;
+    }
+    return 0;
+}
+#endif
 
-        superblock.block_count = lfs2->block_count;
+static int lfs2_fs_grow_(lfs2_t *lfs2, lfs2_size_t block_count) {
+    int err;
 
-        lfs2_superblock_tole32(&superblock);
-        err = lfs2_dir_commit(lfs2, &root, LFS2_MKATTRS(
-                {tag, &superblock}));
+    if (block_count == lfs2->block_count) {
+        return 0;
+    }
+
+    
+#ifndef LFS2_SHRINKNONRELOCATING
+    // shrinking is not supported
+    LFS2_ASSERT(block_count >= lfs2->block_count);
+#endif
+#ifdef LFS2_SHRINKNONRELOCATING
+    if (block_count < lfs2->block_count) {
+        err = lfs2_fs_traverse_(lfs2, lfs2_shrink_checkblock, &block_count, true);
         if (err) {
             return err;
         }
     }
+#endif
+
+    lfs2->block_count = block_count;
 
+    // fetch the root
+    lfs2_mdir_t root;
+    err = lfs2_dir_fetch(lfs2, &root, lfs2->root);
+    if (err) {
+        return err;
+    }
+
+    // update the superblock
+    lfs2_superblock_t superblock;
+    lfs2_stag_t tag = lfs2_dir_get(lfs2, &root, LFS2_MKTAG(0x7ff, 0x3ff, 0),
+            LFS2_MKTAG(LFS2_TYPE_INLINESTRUCT, 0, sizeof(superblock)),
+            &superblock);
+    if (tag < 0) {
+        return tag;
+    }
+    lfs2_superblock_fromle32(&superblock);
+
+    superblock.block_count = lfs2->block_count;
+
+    lfs2_superblock_tole32(&superblock);
+    err = lfs2_dir_commit(lfs2, &root, LFS2_MKATTRS(
+            {tag, &superblock}));
+    if (err) {
+        return err;
+    }
     return 0;
 }
 #endif
@@ -5451,10 +5666,10 @@ static int lfs21_mount(lfs2_t *lfs2, struct lfs21 *lfs21,
         lfs2->lfs21->root[1] = LFS2_BLOCK_NULL;
 
         // setup free lookahead
-        lfs2->free.off = 0;
-        lfs2->free.size = 0;
-        lfs2->free.i = 0;
-        lfs2_alloc_ack(lfs2);
+        lfs2->lookahead.start = 0;
+        lfs2->lookahead.size = 0;
+        lfs2->lookahead.next = 0;
+        lfs2_alloc_ckpoint(lfs2);
 
         // load superblock
         lfs21_dir_t dir;
@@ -5505,7 +5720,7 @@ static int lfs21_unmount(lfs2_t *lfs2) {
 }
 
 /// v1 migration ///
-static int lfs2_rawmigrate(lfs2_t *lfs2, const struct lfs2_config *cfg) {
+static int lfs2_migrate_(lfs2_t *lfs2, const struct lfs2_config *cfg) {
     struct lfs21 lfs21;
 
     // Indeterminate filesystem size not allowed for migration.
@@ -5759,7 +5974,7 @@ int lfs2_format(lfs2_t *lfs2, const struct lfs2_config *cfg) {
                 ".read=%p, .prog=%p, .erase=%p, .sync=%p, "
                 ".read_size=%"PRIu32", .prog_size=%"PRIu32", "
                 ".block_size=%"PRIu32", .block_count=%"PRIu32", "
-                ".block_cycles=%"PRIu32", .cache_size=%"PRIu32", "
+                ".block_cycles=%"PRId32", .cache_size=%"PRIu32", "
                 ".lookahead_size=%"PRIu32", .read_buffer=%p, "
                 ".prog_buffer=%p, .lookahead_buffer=%p, "
                 ".name_max=%"PRIu32", .file_max=%"PRIu32", "
@@ -5772,7 +5987,7 @@ int lfs2_format(lfs2_t *lfs2, const struct lfs2_config *cfg) {
             cfg->read_buffer, cfg->prog_buffer, cfg->lookahead_buffer,
             cfg->name_max, cfg->file_max, cfg->attr_max);
 
-    err = lfs2_rawformat(lfs2, cfg);
+    err = lfs2_format_(lfs2, cfg);
 
     LFS2_TRACE("lfs2_format -> %d", err);
     LFS2_UNLOCK(cfg);
@@ -5789,7 +6004,7 @@ int lfs2_mount(lfs2_t *lfs2, const struct lfs2_config *cfg) {
                 ".read=%p, .prog=%p, .erase=%p, .sync=%p, "
                 ".read_size=%"PRIu32", .prog_size=%"PRIu32", "
                 ".block_size=%"PRIu32", .block_count=%"PRIu32", "
-                ".block_cycles=%"PRIu32", .cache_size=%"PRIu32", "
+                ".block_cycles=%"PRId32", .cache_size=%"PRIu32", "
                 ".lookahead_size=%"PRIu32", .read_buffer=%p, "
                 ".prog_buffer=%p, .lookahead_buffer=%p, "
                 ".name_max=%"PRIu32", .file_max=%"PRIu32", "
@@ -5802,7 +6017,7 @@ int lfs2_mount(lfs2_t *lfs2, const struct lfs2_config *cfg) {
             cfg->read_buffer, cfg->prog_buffer, cfg->lookahead_buffer,
             cfg->name_max, cfg->file_max, cfg->attr_max);
 
-    err = lfs2_rawmount(lfs2, cfg);
+    err = lfs2_mount_(lfs2, cfg);
 
     LFS2_TRACE("lfs2_mount -> %d", err);
     LFS2_UNLOCK(cfg);
@@ -5816,7 +6031,7 @@ int lfs2_unmount(lfs2_t *lfs2) {
     }
     LFS2_TRACE("lfs2_unmount(%p)", (void*)lfs2);
 
-    err = lfs2_rawunmount(lfs2);
+    err = lfs2_unmount_(lfs2);
 
     LFS2_TRACE("lfs2_unmount -> %d", err);
     LFS2_UNLOCK(lfs2->cfg);
@@ -5831,7 +6046,7 @@ int lfs2_remove(lfs2_t *lfs2, const char *path) {
     }
     LFS2_TRACE("lfs2_remove(%p, \"%s\")", (void*)lfs2, path);
 
-    err = lfs2_rawremove(lfs2, path);
+    err = lfs2_remove_(lfs2, path);
 
     LFS2_TRACE("lfs2_remove -> %d", err);
     LFS2_UNLOCK(lfs2->cfg);
@@ -5847,7 +6062,7 @@ int lfs2_rename(lfs2_t *lfs2, const char *oldpath, const char *newpath) {
     }
     LFS2_TRACE("lfs2_rename(%p, \"%s\", \"%s\")", (void*)lfs2, oldpath, newpath);
 
-    err = lfs2_rawrename(lfs2, oldpath, newpath);
+    err = lfs2_rename_(lfs2, oldpath, newpath);
 
     LFS2_TRACE("lfs2_rename -> %d", err);
     LFS2_UNLOCK(lfs2->cfg);
@@ -5862,7 +6077,7 @@ int lfs2_stat(lfs2_t *lfs2, const char *path, struct lfs2_info *info) {
     }
     LFS2_TRACE("lfs2_stat(%p, \"%s\", %p)", (void*)lfs2, path, (void*)info);
 
-    err = lfs2_rawstat(lfs2, path, info);
+    err = lfs2_stat_(lfs2, path, info);
 
     LFS2_TRACE("lfs2_stat -> %d", err);
     LFS2_UNLOCK(lfs2->cfg);
@@ -5878,7 +6093,7 @@ lfs2_ssize_t lfs2_getattr(lfs2_t *lfs2, const char *path,
     LFS2_TRACE("lfs2_getattr(%p, \"%s\", %"PRIu8", %p, %"PRIu32")",
             (void*)lfs2, path, type, buffer, size);
 
-    lfs2_ssize_t res = lfs2_rawgetattr(lfs2, path, type, buffer, size);
+    lfs2_ssize_t res = lfs2_getattr_(lfs2, path, type, buffer, size);
 
     LFS2_TRACE("lfs2_getattr -> %"PRId32, res);
     LFS2_UNLOCK(lfs2->cfg);
@@ -5895,7 +6110,7 @@ int lfs2_setattr(lfs2_t *lfs2, const char *path,
     LFS2_TRACE("lfs2_setattr(%p, \"%s\", %"PRIu8", %p, %"PRIu32")",
             (void*)lfs2, path, type, buffer, size);
 
-    err = lfs2_rawsetattr(lfs2, path, type, buffer, size);
+    err = lfs2_setattr_(lfs2, path, type, buffer, size);
 
     LFS2_TRACE("lfs2_setattr -> %d", err);
     LFS2_UNLOCK(lfs2->cfg);
@@ -5911,7 +6126,7 @@ int lfs2_removeattr(lfs2_t *lfs2, const char *path, uint8_t type) {
     }
     LFS2_TRACE("lfs2_removeattr(%p, \"%s\", %"PRIu8")", (void*)lfs2, path, type);
 
-    err = lfs2_rawremoveattr(lfs2, path, type);
+    err = lfs2_removeattr_(lfs2, path, type);
 
     LFS2_TRACE("lfs2_removeattr -> %d", err);
     LFS2_UNLOCK(lfs2->cfg);
@@ -5926,10 +6141,10 @@ int lfs2_file_open(lfs2_t *lfs2, lfs2_file_t *file, const char *path, int flags)
         return err;
     }
     LFS2_TRACE("lfs2_file_open(%p, %p, \"%s\", %x)",
-            (void*)lfs2, (void*)file, path, flags);
+            (void*)lfs2, (void*)file, path, (unsigned)flags);
     LFS2_ASSERT(!lfs2_mlist_isopen(lfs2->mlist, (struct lfs2_mlist*)file));
 
-    err = lfs2_file_rawopen(lfs2, file, path, flags);
+    err = lfs2_file_open_(lfs2, file, path, flags);
 
     LFS2_TRACE("lfs2_file_open -> %d", err);
     LFS2_UNLOCK(lfs2->cfg);
@@ -5946,11 +6161,11 @@ int lfs2_file_opencfg(lfs2_t *lfs2, lfs2_file_t *file,
     }
     LFS2_TRACE("lfs2_file_opencfg(%p, %p, \"%s\", %x, %p {"
                  ".buffer=%p, .attrs=%p, .attr_count=%"PRIu32"})",
-            (void*)lfs2, (void*)file, path, flags,
+            (void*)lfs2, (void*)file, path, (unsigned)flags,
             (void*)cfg, cfg->buffer, (void*)cfg->attrs, cfg->attr_count);
     LFS2_ASSERT(!lfs2_mlist_isopen(lfs2->mlist, (struct lfs2_mlist*)file));
 
-    err = lfs2_file_rawopencfg(lfs2, file, path, flags, cfg);
+    err = lfs2_file_opencfg_(lfs2, file, path, flags, cfg);
 
     LFS2_TRACE("lfs2_file_opencfg -> %d", err);
     LFS2_UNLOCK(lfs2->cfg);
@@ -5965,7 +6180,7 @@ int lfs2_file_close(lfs2_t *lfs2, lfs2_file_t *file) {
     LFS2_TRACE("lfs2_file_close(%p, %p)", (void*)lfs2, (void*)file);
     LFS2_ASSERT(lfs2_mlist_isopen(lfs2->mlist, (struct lfs2_mlist*)file));
 
-    err = lfs2_file_rawclose(lfs2, file);
+    err = lfs2_file_close_(lfs2, file);
 
     LFS2_TRACE("lfs2_file_close -> %d", err);
     LFS2_UNLOCK(lfs2->cfg);
@@ -5981,7 +6196,7 @@ int lfs2_file_sync(lfs2_t *lfs2, lfs2_file_t *file) {
     LFS2_TRACE("lfs2_file_sync(%p, %p)", (void*)lfs2, (void*)file);
     LFS2_ASSERT(lfs2_mlist_isopen(lfs2->mlist, (struct lfs2_mlist*)file));
 
-    err = lfs2_file_rawsync(lfs2, file);
+    err = lfs2_file_sync_(lfs2, file);
 
     LFS2_TRACE("lfs2_file_sync -> %d", err);
     LFS2_UNLOCK(lfs2->cfg);
@@ -5999,7 +6214,7 @@ lfs2_ssize_t lfs2_file_read(lfs2_t *lfs2, lfs2_file_t *file,
             (void*)lfs2, (void*)file, buffer, size);
     LFS2_ASSERT(lfs2_mlist_isopen(lfs2->mlist, (struct lfs2_mlist*)file));
 
-    lfs2_ssize_t res = lfs2_file_rawread(lfs2, file, buffer, size);
+    lfs2_ssize_t res = lfs2_file_read_(lfs2, file, buffer, size);
 
     LFS2_TRACE("lfs2_file_read -> %"PRId32, res);
     LFS2_UNLOCK(lfs2->cfg);
@@ -6017,7 +6232,7 @@ lfs2_ssize_t lfs2_file_write(lfs2_t *lfs2, lfs2_file_t *file,
             (void*)lfs2, (void*)file, buffer, size);
     LFS2_ASSERT(lfs2_mlist_isopen(lfs2->mlist, (struct lfs2_mlist*)file));
 
-    lfs2_ssize_t res = lfs2_file_rawwrite(lfs2, file, buffer, size);
+    lfs2_ssize_t res = lfs2_file_write_(lfs2, file, buffer, size);
 
     LFS2_TRACE("lfs2_file_write -> %"PRId32, res);
     LFS2_UNLOCK(lfs2->cfg);
@@ -6035,7 +6250,7 @@ lfs2_soff_t lfs2_file_seek(lfs2_t *lfs2, lfs2_file_t *file,
             (void*)lfs2, (void*)file, off, whence);
     LFS2_ASSERT(lfs2_mlist_isopen(lfs2->mlist, (struct lfs2_mlist*)file));
 
-    lfs2_soff_t res = lfs2_file_rawseek(lfs2, file, off, whence);
+    lfs2_soff_t res = lfs2_file_seek_(lfs2, file, off, whence);
 
     LFS2_TRACE("lfs2_file_seek -> %"PRId32, res);
     LFS2_UNLOCK(lfs2->cfg);
@@ -6052,7 +6267,7 @@ int lfs2_file_truncate(lfs2_t *lfs2, lfs2_file_t *file, lfs2_off_t size) {
             (void*)lfs2, (void*)file, size);
     LFS2_ASSERT(lfs2_mlist_isopen(lfs2->mlist, (struct lfs2_mlist*)file));
 
-    err = lfs2_file_rawtruncate(lfs2, file, size);
+    err = lfs2_file_truncate_(lfs2, file, size);
 
     LFS2_TRACE("lfs2_file_truncate -> %d", err);
     LFS2_UNLOCK(lfs2->cfg);
@@ -6068,7 +6283,7 @@ lfs2_soff_t lfs2_file_tell(lfs2_t *lfs2, lfs2_file_t *file) {
     LFS2_TRACE("lfs2_file_tell(%p, %p)", (void*)lfs2, (void*)file);
     LFS2_ASSERT(lfs2_mlist_isopen(lfs2->mlist, (struct lfs2_mlist*)file));
 
-    lfs2_soff_t res = lfs2_file_rawtell(lfs2, file);
+    lfs2_soff_t res = lfs2_file_tell_(lfs2, file);
 
     LFS2_TRACE("lfs2_file_tell -> %"PRId32, res);
     LFS2_UNLOCK(lfs2->cfg);
@@ -6082,7 +6297,7 @@ int lfs2_file_rewind(lfs2_t *lfs2, lfs2_file_t *file) {
     }
     LFS2_TRACE("lfs2_file_rewind(%p, %p)", (void*)lfs2, (void*)file);
 
-    err = lfs2_file_rawrewind(lfs2, file);
+    err = lfs2_file_rewind_(lfs2, file);
 
     LFS2_TRACE("lfs2_file_rewind -> %d", err);
     LFS2_UNLOCK(lfs2->cfg);
@@ -6097,9 +6312,9 @@ lfs2_soff_t lfs2_file_size(lfs2_t *lfs2, lfs2_file_t *file) {
     LFS2_TRACE("lfs2_file_size(%p, %p)", (void*)lfs2, (void*)file);
     LFS2_ASSERT(lfs2_mlist_isopen(lfs2->mlist, (struct lfs2_mlist*)file));
 
-    lfs2_soff_t res = lfs2_file_rawsize(lfs2, file);
+    lfs2_soff_t res = lfs2_file_size_(lfs2, file);
 
-    LFS2_TRACE("lfs2_file_size -> %"PRId32, res);
+    LFS2_TRACE("lfs2_file_size -> %"PRIu32, res);
     LFS2_UNLOCK(lfs2->cfg);
     return res;
 }
@@ -6112,7 +6327,7 @@ int lfs2_mkdir(lfs2_t *lfs2, const char *path) {
     }
     LFS2_TRACE("lfs2_mkdir(%p, \"%s\")", (void*)lfs2, path);
 
-    err = lfs2_rawmkdir(lfs2, path);
+    err = lfs2_mkdir_(lfs2, path);
 
     LFS2_TRACE("lfs2_mkdir -> %d", err);
     LFS2_UNLOCK(lfs2->cfg);
@@ -6128,7 +6343,7 @@ int lfs2_dir_open(lfs2_t *lfs2, lfs2_dir_t *dir, const char *path) {
     LFS2_TRACE("lfs2_dir_open(%p, %p, \"%s\")", (void*)lfs2, (void*)dir, path);
     LFS2_ASSERT(!lfs2_mlist_isopen(lfs2->mlist, (struct lfs2_mlist*)dir));
 
-    err = lfs2_dir_rawopen(lfs2, dir, path);
+    err = lfs2_dir_open_(lfs2, dir, path);
 
     LFS2_TRACE("lfs2_dir_open -> %d", err);
     LFS2_UNLOCK(lfs2->cfg);
@@ -6142,7 +6357,7 @@ int lfs2_dir_close(lfs2_t *lfs2, lfs2_dir_t *dir) {
     }
     LFS2_TRACE("lfs2_dir_close(%p, %p)", (void*)lfs2, (void*)dir);
 
-    err = lfs2_dir_rawclose(lfs2, dir);
+    err = lfs2_dir_close_(lfs2, dir);
 
     LFS2_TRACE("lfs2_dir_close -> %d", err);
     LFS2_UNLOCK(lfs2->cfg);
@@ -6157,7 +6372,7 @@ int lfs2_dir_read(lfs2_t *lfs2, lfs2_dir_t *dir, struct lfs2_info *info) {
     LFS2_TRACE("lfs2_dir_read(%p, %p, %p)",
             (void*)lfs2, (void*)dir, (void*)info);
 
-    err = lfs2_dir_rawread(lfs2, dir, info);
+    err = lfs2_dir_read_(lfs2, dir, info);
 
     LFS2_TRACE("lfs2_dir_read -> %d", err);
     LFS2_UNLOCK(lfs2->cfg);
@@ -6172,7 +6387,7 @@ int lfs2_dir_seek(lfs2_t *lfs2, lfs2_dir_t *dir, lfs2_off_t off) {
     LFS2_TRACE("lfs2_dir_seek(%p, %p, %"PRIu32")",
             (void*)lfs2, (void*)dir, off);
 
-    err = lfs2_dir_rawseek(lfs2, dir, off);
+    err = lfs2_dir_seek_(lfs2, dir, off);
 
     LFS2_TRACE("lfs2_dir_seek -> %d", err);
     LFS2_UNLOCK(lfs2->cfg);
@@ -6186,7 +6401,7 @@ lfs2_soff_t lfs2_dir_tell(lfs2_t *lfs2, lfs2_dir_t *dir) {
     }
     LFS2_TRACE("lfs2_dir_tell(%p, %p)", (void*)lfs2, (void*)dir);
 
-    lfs2_soff_t res = lfs2_dir_rawtell(lfs2, dir);
+    lfs2_soff_t res = lfs2_dir_tell_(lfs2, dir);
 
     LFS2_TRACE("lfs2_dir_tell -> %"PRId32, res);
     LFS2_UNLOCK(lfs2->cfg);
@@ -6200,7 +6415,7 @@ int lfs2_dir_rewind(lfs2_t *lfs2, lfs2_dir_t *dir) {
     }
     LFS2_TRACE("lfs2_dir_rewind(%p, %p)", (void*)lfs2, (void*)dir);
 
-    err = lfs2_dir_rawrewind(lfs2, dir);
+    err = lfs2_dir_rewind_(lfs2, dir);
 
     LFS2_TRACE("lfs2_dir_rewind -> %d", err);
     LFS2_UNLOCK(lfs2->cfg);
@@ -6214,7 +6429,7 @@ int lfs2_fs_stat(lfs2_t *lfs2, struct lfs2_fsinfo *fsinfo) {
     }
     LFS2_TRACE("lfs2_fs_stat(%p, %p)", (void*)lfs2, (void*)fsinfo);
 
-    err = lfs2_fs_rawstat(lfs2, fsinfo);
+    err = lfs2_fs_stat_(lfs2, fsinfo);
 
     LFS2_TRACE("lfs2_fs_stat -> %d", err);
     LFS2_UNLOCK(lfs2->cfg);
@@ -6228,7 +6443,7 @@ lfs2_ssize_t lfs2_fs_size(lfs2_t *lfs2) {
     }
     LFS2_TRACE("lfs2_fs_size(%p)", (void*)lfs2);
 
-    lfs2_ssize_t res = lfs2_fs_rawsize(lfs2);
+    lfs2_ssize_t res = lfs2_fs_size_(lfs2);
 
     LFS2_TRACE("lfs2_fs_size -> %"PRId32, res);
     LFS2_UNLOCK(lfs2->cfg);
@@ -6243,7 +6458,7 @@ int lfs2_fs_traverse(lfs2_t *lfs2, int (*cb)(void *, lfs2_block_t), void *data)
     LFS2_TRACE("lfs2_fs_traverse(%p, %p, %p)",
             (void*)lfs2, (void*)(uintptr_t)cb, data);
 
-    err = lfs2_fs_rawtraverse(lfs2, cb, data, true);
+    err = lfs2_fs_traverse_(lfs2, cb, data, true);
 
     LFS2_TRACE("lfs2_fs_traverse -> %d", err);
     LFS2_UNLOCK(lfs2->cfg);
@@ -6251,32 +6466,32 @@ int lfs2_fs_traverse(lfs2_t *lfs2, int (*cb)(void *, lfs2_block_t), void *data)
 }
 
 #ifndef LFS2_READONLY
-int lfs2_fs_gc(lfs2_t *lfs2) {
+int lfs2_fs_mkconsistent(lfs2_t *lfs2) {
     int err = LFS2_LOCK(lfs2->cfg);
     if (err) {
         return err;
     }
-    LFS2_TRACE("lfs2_fs_gc(%p)", (void*)lfs2);
+    LFS2_TRACE("lfs2_fs_mkconsistent(%p)", (void*)lfs2);
 
-    err = lfs2_fs_rawgc(lfs2);
+    err = lfs2_fs_mkconsistent_(lfs2);
 
-    LFS2_TRACE("lfs2_fs_gc -> %d", err);
+    LFS2_TRACE("lfs2_fs_mkconsistent -> %d", err);
     LFS2_UNLOCK(lfs2->cfg);
     return err;
 }
 #endif
 
 #ifndef LFS2_READONLY
-int lfs2_fs_mkconsistent(lfs2_t *lfs2) {
+int lfs2_fs_gc(lfs2_t *lfs2) {
     int err = LFS2_LOCK(lfs2->cfg);
     if (err) {
         return err;
     }
-    LFS2_TRACE("lfs2_fs_mkconsistent(%p)", (void*)lfs2);
+    LFS2_TRACE("lfs2_fs_gc(%p)", (void*)lfs2);
 
-    err = lfs2_fs_rawmkconsistent(lfs2);
+    err = lfs2_fs_gc_(lfs2);
 
-    LFS2_TRACE("lfs2_fs_mkconsistent -> %d", err);
+    LFS2_TRACE("lfs2_fs_gc -> %d", err);
     LFS2_UNLOCK(lfs2->cfg);
     return err;
 }
@@ -6290,7 +6505,7 @@ int lfs2_fs_grow(lfs2_t *lfs2, lfs2_size_t block_count) {
     }
     LFS2_TRACE("lfs2_fs_grow(%p, %"PRIu32")", (void*)lfs2, block_count);
 
-    err = lfs2_fs_rawgrow(lfs2, block_count);
+    err = lfs2_fs_grow_(lfs2, block_count);
 
     LFS2_TRACE("lfs2_fs_grow -> %d", err);
     LFS2_UNLOCK(lfs2->cfg);
@@ -6308,7 +6523,7 @@ int lfs2_migrate(lfs2_t *lfs2, const struct lfs2_config *cfg) {
                 ".read=%p, .prog=%p, .erase=%p, .sync=%p, "
                 ".read_size=%"PRIu32", .prog_size=%"PRIu32", "
                 ".block_size=%"PRIu32", .block_count=%"PRIu32", "
-                ".block_cycles=%"PRIu32", .cache_size=%"PRIu32", "
+                ".block_cycles=%"PRId32", .cache_size=%"PRIu32", "
                 ".lookahead_size=%"PRIu32", .read_buffer=%p, "
                 ".prog_buffer=%p, .lookahead_buffer=%p, "
                 ".name_max=%"PRIu32", .file_max=%"PRIu32", "
@@ -6321,7 +6536,7 @@ int lfs2_migrate(lfs2_t *lfs2, const struct lfs2_config *cfg) {
             cfg->read_buffer, cfg->prog_buffer, cfg->lookahead_buffer,
             cfg->name_max, cfg->file_max, cfg->attr_max);
 
-    err = lfs2_rawmigrate(lfs2, cfg);
+    err = lfs2_migrate_(lfs2, cfg);
 
     LFS2_TRACE("lfs2_migrate -> %d", err);
     LFS2_UNLOCK(cfg);
diff --git a/lib/littlefs/lfs2.h b/lib/littlefs/lfs2.h
index 4c426fc4c7096..77477aaff83c0 100644
--- a/lib/littlefs/lfs2.h
+++ b/lib/littlefs/lfs2.h
@@ -21,7 +21,7 @@ extern "C"
 // Software library version
 // Major (top-nibble), incremented on backwards incompatible changes
 // Minor (bottom-nibble), incremented on feature additions
-#define LFS2_VERSION 0x00020008
+#define LFS2_VERSION 0x0002000b
 #define LFS2_VERSION_MAJOR (0xffff & (LFS2_VERSION >> 16))
 #define LFS2_VERSION_MINOR (0xffff & (LFS2_VERSION >>  0))
 
@@ -52,16 +52,15 @@ typedef uint32_t lfs2_block_t;
 #endif
 
 // Maximum size of a file in bytes, may be redefined to limit to support other
-// drivers. Limited on disk to <= 4294967296. However, above 2147483647 the
-// functions lfs2_file_seek, lfs2_file_size, and lfs2_file_tell will return
-// incorrect values due to using signed integers. Stored in superblock and
-// must be respected by other littlefs drivers.
+// drivers. Limited on disk to <= 2147483647. Stored in superblock and must be
+// respected by other littlefs drivers.
 #ifndef LFS2_FILE_MAX
 #define LFS2_FILE_MAX 2147483647
 #endif
 
 // Maximum size of custom attributes in bytes, may be redefined, but there is
-// no real benefit to using a smaller LFS2_ATTR_MAX. Limited to <= 1022.
+// no real benefit to using a smaller LFS2_ATTR_MAX. Limited to <= 1022. Stored
+// in superblock and must be respected by other littlefs drivers.
 #ifndef LFS2_ATTR_MAX
 #define LFS2_ATTR_MAX 1022
 #endif
@@ -205,7 +204,8 @@ struct lfs2_config {
     // program sizes.
     lfs2_size_t block_size;
 
-    // Number of erasable blocks on the device.
+    // Number of erasable blocks on the device. Defaults to block_count stored
+    // on disk when zero.
     lfs2_size_t block_count;
 
     // Number of erase cycles before littlefs evicts metadata logs and moves
@@ -226,9 +226,20 @@ struct lfs2_config {
     // Size of the lookahead buffer in bytes. A larger lookahead buffer
     // increases the number of blocks found during an allocation pass. The
     // lookahead buffer is stored as a compact bitmap, so each byte of RAM
-    // can track 8 blocks. Must be a multiple of 8.
+    // can track 8 blocks.
     lfs2_size_t lookahead_size;
 
+    // Threshold for metadata compaction during lfs2_fs_gc in bytes. Metadata
+    // pairs that exceed this threshold will be compacted during lfs2_fs_gc.
+    // Defaults to ~88% block_size when zero, though the default may change
+    // in the future.
+    //
+    // Note this only affects lfs2_fs_gc. Normal compactions still only occur
+    // when full.
+    //
+    // Set to -1 to disable metadata compaction during lfs2_fs_gc.
+    lfs2_size_t compact_thresh;
+
     // Optional statically allocated read buffer. Must be cache_size.
     // By default lfs2_malloc is used to allocate this buffer.
     void *read_buffer;
@@ -237,25 +248,24 @@ struct lfs2_config {
     // By default lfs2_malloc is used to allocate this buffer.
     void *prog_buffer;
 
-    // Optional statically allocated lookahead buffer. Must be lookahead_size
-    // and aligned to a 32-bit boundary. By default lfs2_malloc is used to
-    // allocate this buffer.
+    // Optional statically allocated lookahead buffer. Must be lookahead_size.
+    // By default lfs2_malloc is used to allocate this buffer.
     void *lookahead_buffer;
 
     // Optional upper limit on length of file names in bytes. No downside for
     // larger names except the size of the info struct which is controlled by
-    // the LFS2_NAME_MAX define. Defaults to LFS2_NAME_MAX when zero. Stored in
-    // superblock and must be respected by other littlefs drivers.
+    // the LFS2_NAME_MAX define. Defaults to LFS2_NAME_MAX or name_max stored on
+    // disk when zero.
     lfs2_size_t name_max;
 
     // Optional upper limit on files in bytes. No downside for larger files
-    // but must be <= LFS2_FILE_MAX. Defaults to LFS2_FILE_MAX when zero. Stored
-    // in superblock and must be respected by other littlefs drivers.
+    // but must be <= LFS2_FILE_MAX. Defaults to LFS2_FILE_MAX or file_max stored
+    // on disk when zero.
     lfs2_size_t file_max;
 
     // Optional upper limit on custom attributes in bytes. No downside for
     // larger attributes size but must be <= LFS2_ATTR_MAX. Defaults to
-    // LFS2_ATTR_MAX when zero.
+    // LFS2_ATTR_MAX or attr_max stored on disk when zero.
     lfs2_size_t attr_max;
 
     // Optional upper limit on total space given to metadata pairs in bytes. On
@@ -264,6 +274,15 @@ struct lfs2_config {
     // Defaults to block_size when zero.
     lfs2_size_t metadata_max;
 
+    // Optional upper limit on inlined files in bytes. Inlined files live in
+    // metadata and decrease storage requirements, but may be limited to
+    // improve metadata-related performance. Must be <= cache_size, <=
+    // attr_max, and <= block_size/8. Defaults to the largest possible
+    // inline_max when zero.
+    //
+    // Set to -1 to disable inlined files.
+    lfs2_size_t inline_max;
+
 #ifdef LFS2_MULTIVERSION
     // On-disk version to use when writing in the form of 16-bit major version
     // + 16-bit minor version. This limiting metadata to what is supported by
@@ -430,19 +449,20 @@ typedef struct lfs2 {
     lfs2_gstate_t gdisk;
     lfs2_gstate_t gdelta;
 
-    struct lfs2_free {
-        lfs2_block_t off;
+    struct lfs2_lookahead {
+        lfs2_block_t start;
         lfs2_block_t size;
-        lfs2_block_t i;
-        lfs2_block_t ack;
-        uint32_t *buffer;
-    } free;
+        lfs2_block_t next;
+        lfs2_block_t ckpoint;
+        uint8_t *buffer;
+    } lookahead;
 
     const struct lfs2_config *cfg;
     lfs2_size_t block_count;
     lfs2_size_t name_max;
     lfs2_size_t file_max;
     lfs2_size_t attr_max;
+    lfs2_size_t inline_max;
 
 #ifdef LFS2_MIGRATE
     struct lfs21 *lfs21;
@@ -712,18 +732,6 @@ lfs2_ssize_t lfs2_fs_size(lfs2_t *lfs2);
 // Returns a negative error code on failure.
 int lfs2_fs_traverse(lfs2_t *lfs2, int (*cb)(void*, lfs2_block_t), void *data);
 
-// Attempt to proactively find free blocks
-//
-// Calling this function is not required, but may allowing the offloading of
-// the expensive block allocation scan to a less time-critical code path.
-//
-// Note: littlefs currently does not persist any found free blocks to disk.
-// This may change in the future.
-//
-// Returns a negative error code on failure. Finding no free blocks is
-// not an error.
-int lfs2_fs_gc(lfs2_t *lfs2);
-
 #ifndef LFS2_READONLY
 // Attempt to make the filesystem consistent and ready for writing
 //
@@ -736,11 +744,33 @@ int lfs2_fs_gc(lfs2_t *lfs2);
 int lfs2_fs_mkconsistent(lfs2_t *lfs2);
 #endif
 
+#ifndef LFS2_READONLY
+// Attempt any janitorial work
+//
+// This currently:
+// 1. Calls mkconsistent if not already consistent
+// 2. Compacts metadata > compact_thresh
+// 3. Populates the block allocator
+//
+// Though additional janitorial work may be added in the future.
+//
+// Calling this function is not required, but may allow the offloading of
+// expensive janitorial work to a less time-critical code path.
+//
+// Returns a negative error code on failure. Accomplishing nothing is not
+// an error.
+int lfs2_fs_gc(lfs2_t *lfs2);
+#endif
+
 #ifndef LFS2_READONLY
 // Grows the filesystem to a new size, updating the superblock with the new
 // block count.
 //
-// Note: This is irreversible.
+// If LFS2_SHRINKNONRELOCATING is defined, this function will also accept
+// block_counts smaller than the current configuration, after checking
+// that none of the blocks that are being removed are in use.
+// Note that littlefs's pseudorandom block allocation means that
+// this is very unlikely to work in the general case.
 //
 // Returns a negative error code on failure.
 int lfs2_fs_grow(lfs2_t *lfs2, lfs2_size_t block_count);
diff --git a/lib/littlefs/lfs2_util.c b/lib/littlefs/lfs2_util.c
index c9850e78869c3..4fe7e5340ce77 100644
--- a/lib/littlefs/lfs2_util.c
+++ b/lib/littlefs/lfs2_util.c
@@ -11,6 +11,8 @@
 #ifndef LFS2_CONFIG
 
 
+// If user provides their own CRC impl we don't need this
+#ifndef LFS2_CRC
 // Software CRC implementation with small lookup table
 uint32_t lfs2_crc(uint32_t crc, const void *buffer, size_t size) {
     static const uint32_t rtable[16] = {
@@ -29,6 +31,7 @@ uint32_t lfs2_crc(uint32_t crc, const void *buffer, size_t size) {
 
     return crc;
 }
+#endif
 
 
 #endif
diff --git a/lib/littlefs/lfs2_util.h b/lib/littlefs/lfs2_util.h
index dd2cbcc106d84..12c82a630b079 100644
--- a/lib/littlefs/lfs2_util.h
+++ b/lib/littlefs/lfs2_util.h
@@ -8,6 +8,9 @@
 #ifndef LFS2_UTIL_H
 #define LFS2_UTIL_H
 
+#define LFS2_STRINGIZE(x) LFS2_STRINGIZE2(x)
+#define LFS2_STRINGIZE2(x) #x
+
 // Users can override lfs2_util.h with their own configuration by defining
 // LFS2_CONFIG as a header file to include (-DLFS2_CONFIG=lfs2_config.h).
 //
@@ -15,11 +18,26 @@
 // provided by the config file. To start, I would suggest copying lfs2_util.h
 // and modifying as needed.
 #ifdef LFS2_CONFIG
-#define LFS2_STRINGIZE(x) LFS2_STRINGIZE2(x)
-#define LFS2_STRINGIZE2(x) #x
 #include LFS2_STRINGIZE(LFS2_CONFIG)
 #else
 
+// Alternatively, users can provide a header file which defines
+// macros and other things consumed by littlefs.
+//
+// For example, provide my_defines.h, which contains
+// something like:
+//
+// #include <stddef.h>
+// extern void *my_malloc(size_t sz);
+// #define LFS2_MALLOC(sz) my_malloc(sz)
+//
+// And build littlefs with the header by defining LFS2_DEFINES.
+// (-DLFS2_DEFINES=my_defines.h)
+
+#ifdef LFS2_DEFINES
+#include LFS2_STRINGIZE(LFS2_DEFINES)
+#endif
+
 // System includes
 #include <stdint.h>
 #include <stdbool.h>
@@ -177,10 +195,10 @@ static inline uint32_t lfs2_fromle32(uint32_t a) {
     (defined(__BYTE_ORDER__) && defined(__ORDER_BIG_ENDIAN__) && __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__))
     return __builtin_bswap32(a);
 #else
-    return (((uint8_t*)&a)[0] <<  0) |
-           (((uint8_t*)&a)[1] <<  8) |
-           (((uint8_t*)&a)[2] << 16) |
-           (((uint8_t*)&a)[3] << 24);
+    return ((uint32_t)((uint8_t*)&a)[0] <<  0) |
+           ((uint32_t)((uint8_t*)&a)[1] <<  8) |
+           ((uint32_t)((uint8_t*)&a)[2] << 16) |
+           ((uint32_t)((uint8_t*)&a)[3] << 24);
 #endif
 }
 
@@ -200,10 +218,10 @@ static inline uint32_t lfs2_frombe32(uint32_t a) {
     (defined(__BYTE_ORDER__) && defined(__ORDER_BIG_ENDIAN__) && __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
     return a;
 #else
-    return (((uint8_t*)&a)[0] << 24) |
-           (((uint8_t*)&a)[1] << 16) |
-           (((uint8_t*)&a)[2] <<  8) |
-           (((uint8_t*)&a)[3] <<  0);
+    return ((uint32_t)((uint8_t*)&a)[0] << 24) |
+           ((uint32_t)((uint8_t*)&a)[1] << 16) |
+           ((uint32_t)((uint8_t*)&a)[2] <<  8) |
+           ((uint32_t)((uint8_t*)&a)[3] <<  0);
 #endif
 }
 
@@ -212,12 +230,22 @@ static inline uint32_t lfs2_tobe32(uint32_t a) {
 }
 
 // Calculate CRC-32 with polynomial = 0x04c11db7
+#ifdef LFS2_CRC
+static inline uint32_t lfs2_crc(uint32_t crc, const void *buffer, size_t size) {
+    return LFS2_CRC(crc, buffer, size);
+}
+#else
 uint32_t lfs2_crc(uint32_t crc, const void *buffer, size_t size);
+#endif
 
 // Allocate memory, only used if buffers are not provided to littlefs
-// Note, memory must be 64-bit aligned
+//
+// littlefs current has no alignment requirements, as it only allocates
+// byte-level buffers.
 static inline void *lfs2_malloc(size_t size) {
-#ifndef LFS2_NO_MALLOC
+#if defined(LFS2_MALLOC)
+    return LFS2_MALLOC(size);
+#elif !defined(LFS2_NO_MALLOC)
     return malloc(size);
 #else
     (void)size;
@@ -227,7 +255,9 @@ static inline void *lfs2_malloc(size_t size) {
 
 // Deallocate memory, only used if buffers are not provided to littlefs
 static inline void lfs2_free(void *p) {
-#ifndef LFS2_NO_MALLOC
+#if defined(LFS2_FREE)
+    LFS2_FREE(p);
+#elif !defined(LFS2_NO_MALLOC)
     free(p);
 #else
     (void)p;
diff --git a/lib/lwip b/lib/lwip
index 0a0452b2c39bd..77dcd25a72509 160000
--- a/lib/lwip
+++ b/lib/lwip
@@ -1 +1 @@
-Subproject commit 0a0452b2c39bdd91e252aef045c115f88f6ca773
+Subproject commit 77dcd25a72509eb83f72b033d219b1d40cd8eb95
diff --git a/lib/micropython-lib b/lib/micropython-lib
index e4cf09527bce7..5b496e944ec04 160000
--- a/lib/micropython-lib
+++ b/lib/micropython-lib
@@ -1 +1 @@
-Subproject commit e4cf09527bce7569f5db742cf6ae9db68d50c6a9
+Subproject commit 5b496e944ec045177afa1620920a168410b7f60b
diff --git a/lib/pico-sdk b/lib/pico-sdk
index 95ea6acad1311..bddd20f928ce7 160000
--- a/lib/pico-sdk
+++ b/lib/pico-sdk
@@ -1 +1 @@
-Subproject commit 95ea6acad131124694cda1c162c52cd30e0aece0
+Subproject commit bddd20f928ce76142793bef434d4f75f4af6e433
diff --git a/mpy-cross/main.c b/mpy-cross/main.c
index 7ab95149c720c..16f749ae4dc35 100644
--- a/mpy-cross/main.c
+++ b/mpy-cross/main.c
@@ -130,7 +130,7 @@ static int usage(char **argv) {
         "Target specific options:\n"
         "-msmall-int-bits=number : set the maximum bits used to encode a small-int\n"
         "-march=<arch> : set architecture for native emitter;\n"
-        "                x86, x64, armv6, armv6m, armv7m, armv7em, armv7emsp, armv7emdp, xtensa, xtensawin, rv32imc, debug\n"
+        "                x86, x64, armv6, armv6m, armv7m, armv7em, armv7emsp, armv7emdp, xtensa, xtensawin, rv32imc, host, debug\n"
         "\n"
         "Implementation specific options:\n", argv[0]
         );
@@ -350,6 +350,15 @@ MP_NOINLINE int main_(int argc, char **argv) {
         }
     }
 
+    #if MICROPY_EMIT_NATIVE
+    if ((MP_STATE_VM(default_emit_opt) == MP_EMIT_OPT_NATIVE_PYTHON
+         || MP_STATE_VM(default_emit_opt) == MP_EMIT_OPT_VIPER)
+        && mp_dynamic_compiler.native_arch == MP_NATIVE_ARCH_NONE) {
+        mp_printf(&mp_stderr_print, "arch not specified\n");
+        exit(1);
+    }
+    #endif
+
     if (input_file == NULL) {
         mp_printf(&mp_stderr_print, "no input file\n");
         exit(1);
diff --git a/mpy-cross/mpconfigport.h b/mpy-cross/mpconfigport.h
index d3805f0307356..94a598c9954b8 100644
--- a/mpy-cross/mpconfigport.h
+++ b/mpy-cross/mpconfigport.h
@@ -137,7 +137,7 @@ typedef long mp_off_t;
 #ifdef _MSC_VER
 
 #define MP_ENDIANNESS_LITTLE        (1)
-#define NORETURN                    __declspec(noreturn)
+#define MP_NORETURN                 __declspec(noreturn)
 #define MP_NOINLINE                 __declspec(noinline)
 #define MP_ALWAYSINLINE             __forceinline
 #define MP_LIKELY(x)                (x)
diff --git a/ports/alif/Makefile b/ports/alif/Makefile
new file mode 100644
index 0000000000000..68706674365c1
--- /dev/null
+++ b/ports/alif/Makefile
@@ -0,0 +1,125 @@
+BOARD ?= ALIF_ENSEMBLE
+BOARD_DIR ?= boards/$(BOARD)
+BUILD ?= build-$(BOARD)
+MCU_CORE ?= M55_HP
+GIT_SUBMODULES += lib/tinyusb lib/alif_ensemble-cmsis-dfp lib/alif-security-toolkit
+PORT ?= /dev/ttyACM0
+
+ALIF_TOOLS ?= ../../lib/alif-security-toolkit/toolkit
+
+JLINK_CMD_PREFIX = \
+ExitOnError 1\n\
+Device $(JLINK_DEV)\n\
+SelectInterface SWD\n\
+Speed auto\n\
+Connect\n\
+Reset\n\
+ShowHWStatus\n
+
+JLINK_CMD_SUFFIX = \
+Reset\n\
+Exit
+
+ALIF_TOC_CONFIG = alif_cfg.json
+ALIF_TOC_APPS = $(BUILD)/$(ALIF_TOC_CONFIG)
+ALIF_TOC_CFLAGS += -DTOC_CFG_FILE=$(ALIF_TOOLKIT_CFG_FILE)
+
+ifeq ($(MCU_CORE),M55_HP)
+
+ALIF_TOC_CFLAGS += -DTOC_CORE_M55_HP_APP=1
+ALIF_TOC_APPS += $(BUILD)/M55_HP/firmware.bin
+JLINK_CMD = '\
+$(JLINK_CMD_PREFIX)\
+LoadFile "$(BUILD)/M55_HP/firmware.bin",0x80020000\n\
+$(JLINK_CMD_SUFFIX)'
+
+else ifeq ($(MCU_CORE),M55_HE)
+
+ALIF_TOC_CFLAGS += -DTOC_CORE_M55_HE_APP=1
+ALIF_TOC_APPS += $(BUILD)/M55_HE/firmware.bin
+JLINK_CMD = '\
+$(JLINK_CMD_PREFIX)\
+LoadFile "$(BUILD)/M55_HE/firmware.bin",0x80320000\n\
+$(JLINK_CMD_SUFFIX)'
+
+else ifeq ($(MCU_CORE),M55_DUAL)
+
+ALIF_TOC_CFLAGS += -DTOC_CORE_M55_HP_APP=1
+ALIF_TOC_CFLAGS += -DTOC_CORE_M55_HE_APP=1
+ALIF_TOC_APPS += $(BUILD)/M55_HP/firmware.bin $(BUILD)/M55_HE/firmware.bin
+JLINK_CMD = '\
+$(JLINK_CMD_PREFIX)\
+LoadFile "$(BUILD)/M55_HP/firmware.bin",0x80020000\n\
+LoadFile "$(BUILD)/M55_HE/firmware.bin",0x80320000\n\
+$(JLINK_CMD_SUFFIX)'
+
+else
+$(error Invalid MCU core specified))
+endif
+
+include ../../py/mkenv.mk
+include mpconfigport.mk
+include $(BOARD_DIR)/mpconfigboard.mk
+
+# include py core make definitions
+include $(TOP)/py/py.mk
+include $(TOP)/extmod/extmod.mk
+
+################################################################################
+# Main targets
+
+.PHONY: all
+all: $(BUILD)/firmware.toc.bin
+
+# Force make commands to run the targets every time
+# regardless of whether firmware.toc.bin already exists
+# to detect changes in the source files and rebuild.
+.PHONY: $(BUILD)/M55_HE/firmware.bin
+.PHONY: $(BUILD)/M55_HP/firmware.bin
+
+$(BUILD):
+	$(MKDIR) -p $@
+
+$(BUILD)/M55_HP/firmware.bin:
+	make -f alif.mk MCU_CORE=M55_HP MICROPY_PY_OPENAMP_MODE=0
+
+$(BUILD)/M55_HE/firmware.bin:
+	make -f alif.mk MCU_CORE=M55_HE MICROPY_PY_OPENAMP_MODE=1
+
+$(BUILD)/$(ALIF_TOC_CONFIG): mcu/$(ALIF_TOC_CONFIG).in | $(BUILD)
+	$(ECHO) "Preprocess toc config $@"
+	$(Q)$(CPP) -P -E $(ALIF_TOC_CFLAGS) - < mcu/$(ALIF_TOC_CONFIG).in > $@
+
+$(BUILD)/firmware.toc.bin: $(ALIF_TOC_APPS)
+	$(Q)python $(ALIF_TOOLS)/app-gen-toc.py \
+		--filename $(abspath $(BUILD)/$(ALIF_TOC_CONFIG)) \
+		--output-dir $(BUILD) \
+		--firmware-dir $(BUILD) \
+		--output $@
+
+.PHONY: deploy
+deploy: $(BUILD)/firmware.toc.bin
+	$(ECHO) "Writing $< to the board"
+	$(Q)python $(ALIF_TOOLS)/app-write-mram.py \
+		--cfg-part $(ALIF_TOOLKIT_CFG_PART) \
+		--port $(PORT) \
+		--pad \
+		--images file:$(BUILD)/application_package.ds
+
+.PHONY: deploy-jlink
+deploy-jlink: $(ALIF_TOC_APPS)
+	$(Q)echo -e $(JLINK_CMD) | $(JLINK_EXE)
+
+.PHONY: maintenance
+maintenance:
+	$(Q)python $(ALIF_TOOLS)/maintenance.py \
+		--cfg-part $(ALIF_TOOLKIT_CFG_PART) \
+		--port $(PORT)
+
+.PHONY: update-system-package
+update-system-package:
+	$(Q)python $(ALIF_TOOLS)/updateSystemPackage.py \
+		--cfg-part $(ALIF_TOOLKIT_CFG_PART) \
+		--port $(PORT)
+
+include $(TOP)/py/mkrules.mk
diff --git a/ports/alif/README.md b/ports/alif/README.md
new file mode 100644
index 0000000000000..824a63da186d2
--- /dev/null
+++ b/ports/alif/README.md
@@ -0,0 +1,21 @@
+MicroPython port to Alif Ensemble MCUs
+======================================
+
+This is a port of MicroPython to the Alif Ensemble series of microcontrollers.
+
+Initial development of this Alif port was sponsored by OpenMV LLC.
+
+Features currently supported:
+- UART REPL.
+- TinyUSB with CDC and MSC device support.
+- Octal SPI flash with XIP mode.
+- machine.Pin support with named pins.
+- machine.UART, machine.SPI, machine.I2C, machine.RTC peripherals.
+- WiFi and Bluetooth using cyw43.
+- Dual core support of the HE and HP cores using Open-AMP.
+- Low power modes.
+
+The following more advanced features will follow later:
+- Ethernet support.
+- SDRAM support.
+- Other machine modules.
diff --git a/ports/alif/alif.mk b/ports/alif/alif.mk
new file mode 100644
index 0000000000000..bb07a3aa2025c
--- /dev/null
+++ b/ports/alif/alif.mk
@@ -0,0 +1,288 @@
+################################################################################
+# Initial setup of Makefile environment
+
+BOARD ?= ALIF_ENSEMBLE
+BOARD_DIR ?= boards/$(BOARD)
+BUILD ?= build-$(BOARD)/$(MCU_CORE)
+
+ifeq ($(wildcard $(BOARD_DIR)/.),)
+$(error Invalid BOARD specified: $(BOARD_DIR))
+endif
+
+include ../../py/mkenv.mk
+include mpconfigport.mk
+include $(BOARD_DIR)/mpconfigboard.mk
+
+# qstr definitions (must come before including py.mk)
+QSTR_DEFS += qstrdefsport.h
+
+# include py core make definitions
+include $(TOP)/py/py.mk
+include $(TOP)/extmod/extmod.mk
+
+################################################################################
+# Project specific settings and compiler/linker flags
+
+CROSS_COMPILE ?= arm-none-eabi-
+ALIF_DFP_REL_TOP ?= lib/alif_ensemble-cmsis-dfp
+ALIF_DFP_REL_HERE ?= $(TOP)/lib/alif_ensemble-cmsis-dfp
+CMSIS_DIR ?= $(TOP)/lib/cmsis/inc
+
+MCU_CORE ?= M55_HP
+ALIF_CONFIG ?= mcu/$(MCU_CORE)_cfg.json
+LD_FILE ?= mcu/ensemble.ld.S
+
+INC += -I.
+INC += -I$(TOP)
+INC += -I$(BUILD)
+INC += -I$(BOARD_DIR)
+INC += -I$(CMSIS_DIR)
+INC += -I$(ALIF_DFP_REL_HERE)/drivers/include/
+INC += -I$(ALIF_DFP_REL_HERE)/se_services/include
+INC += -I$(ALIF_DFP_REL_HERE)/ospi_xip/source/ospi
+INC += -I$(ALIF_DFP_REL_HERE)/Device/common/config/
+INC += -I$(ALIF_DFP_REL_HERE)/Device/common/include/
+INC += -I$(ALIF_DFP_REL_HERE)/Device/core/$(MCU_CORE)/config/
+INC += -I$(ALIF_DFP_REL_HERE)/Device/core/$(MCU_CORE)/include/
+INC += -I$(ALIF_DFP_REL_HERE)/Device/$(MCU_SERIES)/$(MCU_VARIANT)/
+INC += -I$(TOP)/lib/tinyusb/src
+INC += -Itinyusb_port
+INC += -Ilwip_inc
+
+GEN_PIN_MKPINS = mcu/make-pins.py
+GEN_PIN_PREFIX = mcu/pins_prefix.c
+GEN_PINS_BOARD_CSV = $(BOARD_DIR)/pins.csv
+GEN_PINS_MCU_CSV = mcu/ensemble_pin_alt.csv
+GEN_PINS_SRC = $(BUILD)/pins_board.c
+GEN_PINS_HDR = $(HEADER_BUILD)/pins_board.h
+
+CFLAGS_FPU += -mfloat-abi=hard -mfpu=fpv5-d16
+
+CFLAGS += $(INC) \
+          -std=c99 \
+          -Wall \
+          -Werror \
+          -Wdouble-promotion \
+          -Wfloat-conversion \
+          -mthumb \
+          -mcpu=cortex-m55 \
+          -mtune=cortex-m55 \
+          $(CFLAGS_FPU) \
+          -march=armv8.1-m.main+fp+mve.fp \
+          -fdata-sections \
+          -ffunction-sections \
+          --specs=nosys.specs \
+          -D$(MCU_CORE)=1 \
+          -DCORE_$(MCU_CORE) \
+          -DALIF_CMSIS_H="\"$(MCU_CORE).h\""
+
+ifeq ($(MICROPY_FLOAT_IMPL),float)
+CFLAGS += -fsingle-precision-constant
+CFLAGS += -DMICROPY_FLOAT_IMPL=MICROPY_FLOAT_IMPL_FLOAT
+else
+CFLAGS += -DMICROPY_FLOAT_IMPL=MICROPY_FLOAT_IMPL_DOUBLE
+endif
+
+# Tune for Debugging or Optimization
+ifeq ($(DEBUG), 1)
+CFLAGS += -Og -ggdb3
+# Disable text compression in debug builds
+MICROPY_ROM_TEXT_COMPRESSION = 0
+else
+CFLAGS += -O2 -DNDEBUG
+endif
+
+CFLAGS += $(CFLAGS_EXTRA)
+
+AFLAGS = -mthumb -march=armv8.1-m.main+fp+mve.fp $(CFLAGS_FPU)
+
+CFLAGS += -Wl,-T$(BUILD)/ensemble.ld \
+          -Wl,-Map=$@.map \
+          -Wl,--cref \
+          -Wl,--gc-sections \
+          -Wl,--print-memory-usage \
+          -Wl,--no-warn-rwx-segment
+
+################################################################################
+# Source files and libraries
+
+SRC_O += \
+	shared/runtime/gchelper_thumb2.o
+
+SRC_C = \
+	alif_flash.c \
+	cyw43_port_spi.c \
+	fatfs_port.c \
+	machine_pin.c \
+	machine_i2c.c \
+	machine_spi.c \
+	machine_rtc.c \
+	main.c \
+	modalif.c \
+	mphalport.c \
+	mpnetworkport.c \
+	mpu.c \
+	mpuart.c \
+	msc_disk.c \
+	nosys_stubs.c \
+	ospi_ext.c \
+	ospi_flash.c \
+	pendsv.c \
+	system_tick.c \
+	se_services.c \
+	usbd.c \
+	vfs_rom_ioctl.c \
+	$(wildcard $(BOARD_DIR)/*.c)
+
+ifeq ($(MICROPY_SSL_MBEDTLS),1)
+SRC_C += mbedtls/mbedtls_port.c
+endif
+
+ifeq ($(MICROPY_PY_BLUETOOTH),1)
+SRC_C += mpbthciport.c mpnimbleport.c
+endif
+
+ifeq ($(MICROPY_FLOAT_IMPL),float)
+LIBM_SRC_C += $(SRC_LIB_LIBM_C)
+LIBM_SRC_C += $(SRC_LIB_LIBM_SQRT_HW_C)
+$(BUILD)/lib/libm/%.o: CFLAGS += -Wno-maybe-uninitialized
+else
+LIBM_SRC_C += $(SRC_LIB_LIBM_DBL_C)
+LIBM_SRC_C += $(SRC_LIB_LIBM_DBL_SQRT_HW_C)
+$(BUILD)/lib/libm_dbl/%.o: CFLAGS += -Wno-maybe-uninitialized
+endif
+
+SHARED_SRC_C += $(addprefix shared/,\
+	libc/string0.c \
+	netutils/dhcpserver.c \
+	netutils/trace.c \
+	readline/readline.c \
+	runtime/gchelper_native.c \
+	runtime/interrupt_char.c \
+	runtime/mpirq.c \
+	runtime/pyexec.c \
+	runtime/softtimer.c  \
+	runtime/stdout_helpers.c \
+	runtime/sys_stdio_mphal.c \
+	timeutils/timeutils.c \
+	tinyusb/mp_usbd.c \
+	tinyusb/mp_usbd_cdc.c \
+	tinyusb/mp_usbd_descriptor.c \
+	)
+
+DRIVERS_SRC_C += $(addprefix drivers/,\
+	bus/softspi.c \
+	bus/softqspi.c \
+	memory/spiflash.c \
+	dht/dht.c \
+	)
+
+TINYUSB_SRC_C += \
+	lib/tinyusb/src/tusb.c \
+	lib/tinyusb/src/class/cdc/cdc_device.c \
+	lib/tinyusb/src/class/msc/msc_device.c \
+	lib/tinyusb/src/common/tusb_fifo.c \
+	lib/tinyusb/src/device/usbd.c \
+	lib/tinyusb/src/device/usbd_control.c \
+	tinyusb_port/tusb_alif_dcd.c \
+
+ALIF_SRC_C += $(addprefix $(ALIF_DFP_REL_TOP)/,\
+	Device/common/source/clk.c \
+	Device/common/source/mpu_M55.c \
+	Device/common/source/system_M55.c \
+	Device/common/source/system_utils.c \
+	Device/common/source/tcm_partition.c \
+	Device/common/source/tgu_M55.c \
+	Device/common/source/pm.c \
+	Device/core/$(MCU_CORE)/source/startup_$(MCU_CORE).c \
+	drivers/source/adc.c \
+	drivers/source/i2c.c \
+	drivers/source/mhu_driver.c \
+	drivers/source/mhu_receiver.c \
+	drivers/source/mhu_sender.c \
+	drivers/source/mram.c \
+	drivers/source/pinconf.c \
+	drivers/source/spi.c \
+	drivers/source/uart.c \
+	drivers/source/utimer.c \
+	ospi_xip/source/ospi/ospi_drv.c \
+	se_services/source/services_host_application.c \
+	se_services/source/services_host_boot.c \
+	se_services/source/services_host_clocks.c \
+	se_services/source/services_host_cryptocell.c \
+	se_services/source/services_host_handler.c \
+	se_services/source/services_host_system.c \
+	se_services/source/services_host_power.c \
+	se_services/source/services_host_maintenance.c \
+	)
+
+$(BUILD)/tinyusb_port/tusb_alif_dcd.o: CFLAGS += -Wno-unused-variable -DTUSB_ALIF_NO_IRQ_CFG=1
+$(BUILD)/$(ALIF_DFP_REL_TOP)/drivers/source/mram.o: CFLAGS += -Wno-strict-aliasing
+$(BUILD)/$(ALIF_DFP_REL_TOP)/drivers/source/spi.o: CFLAGS += -Wno-maybe-uninitialized
+$(BUILD)/$(ALIF_DFP_REL_TOP)/se_services/source/services_host_boot.o: CFLAGS += -Wno-stringop-truncation
+$(BUILD)/$(ALIF_DFP_REL_TOP)/se_services/source/services_host_system.o: CFLAGS += -Wno-maybe-uninitialized
+
+# Add Alif-specific implementation of libmetal (and optionally OpenAMP's rproc).
+# Note: libmetal code is generated via a pre-processor so ensure that runs first.
+ifeq ($(MICROPY_PY_OPENAMP),1)
+SRC_C += mpmetalport.c
+$(BUILD)/mpmetalport.o: $(BUILD)/openamp/metal/config.h
+ifeq ($(MICROPY_PY_OPENAMP_REMOTEPROC),1)
+SRC_C += mpremoteprocport.c
+$(BUILD)/mpremoteprocport.o: $(BUILD)/openamp/metal/config.h
+endif
+endif
+
+# List of sources for qstr extraction
+SRC_QSTR += $(SRC_C) $(SHARED_SRC_C) $(GEN_PINS_SRC)
+
+OBJ += $(PY_O)
+OBJ += $(addprefix $(BUILD)/, $(SRC_O))
+OBJ += $(addprefix $(BUILD)/, $(SRC_C:.c=.o))
+OBJ += $(addprefix $(BUILD)/, $(LIBM_SRC_C:.c=.o))
+OBJ += $(addprefix $(BUILD)/, $(SHARED_SRC_C:.c=.o))
+OBJ += $(addprefix $(BUILD)/, $(DRIVERS_SRC_C:.c=.o))
+OBJ += $(addprefix $(BUILD)/, $(TINYUSB_SRC_C:.c=.o))
+OBJ += $(addprefix $(BUILD)/, $(ALIF_SRC_C:.c=.o))
+OBJ += $(GEN_PINS_SRC:.c=.o)
+
+################################################################################
+# Main targets
+
+.PHONY: all erase deploy gdb objdump release
+
+.DELETE_ON_ERROR:
+
+obj: $(OBJ)
+all: $(BUILD)/firmware.bin
+
+$(BUILD):
+	$(MKDIR) -p $@
+
+$(BUILD)/ensemble.ld: $(LD_FILE)
+	$(ECHO) "Preprocess linker script $@"
+	$(Q)$(CPP) -P -E $(CFLAGS) $^ > $@
+
+$(BUILD)/firmware.elf: $(OBJ) $(BUILD)/ensemble.ld
+	$(ECHO) "Link $@"
+	$(Q)$(CC) $(CFLAGS) -o $@ $(OBJ) $(LIBS)
+	$(Q)$(SIZE) $@
+
+$(BUILD)/firmware.bin: $(BUILD)/firmware.elf
+	$(Q)$(OBJCOPY) -Obinary $^ $(BUILD)/firmware.bin
+
+################################################################################
+# Remaining make rules
+
+# Use a pattern rule here so that make will only call make-pins.py once to make
+# both pins_board.c and pins_board.h
+$(BUILD)/%_board.c $(HEADER_BUILD)/%_board.h: $(BOARD_DIR)/%.csv $(GEN_PIN_MKPINS) $(GEN_PIN_PREFIX) | $(HEADER_BUILD)
+	$(ECHO) "GEN $@"
+	$(Q)$(PYTHON) $(GEN_PIN_MKPINS) \
+	    --af-csv $(GEN_PINS_MCU_CSV) \
+	    --board-csv $(GEN_PINS_BOARD_CSV) \
+	    --prefix $(GEN_PIN_PREFIX) \
+	    --output-source $(GEN_PINS_SRC) \
+	    --output-header $(GEN_PINS_HDR)
+
+include $(TOP)/py/mkrules.mk
diff --git a/ports/alif/alif_flash.c b/ports/alif/alif_flash.c
new file mode 100644
index 0000000000000..722afadae1f7b
--- /dev/null
+++ b/ports/alif/alif_flash.c
@@ -0,0 +1,176 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "py/mphal.h"
+#include "py/runtime.h"
+#include "extmod/vfs.h"
+#include "modalif.h"
+#include "ospi_flash.h"
+
+#if MICROPY_HW_ENABLE_OSPI
+typedef struct _alif_flash_obj_t {
+    mp_obj_base_t base;
+    uint32_t flash_base_addr;
+    uint32_t flash_size;
+} alif_flash_obj_t;
+
+static const alif_flash_obj_t alif_flash_fs_obj = {
+    .base = { &alif_flash_type },
+    .flash_base_addr = MICROPY_HW_FLASH_STORAGE_BASE_ADDR,
+    .flash_size = MICROPY_HW_FLASH_STORAGE_FS_BYTES,
+};
+
+static mp_obj_t alif_flash_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) {
+    // Parse arguments
+    enum { ARG_start, ARG_len };
+    static const mp_arg_t allowed_args[] = {
+        { MP_QSTR_start, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
+        { MP_QSTR_len,   MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
+    };
+    mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
+    mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
+
+    if (args[ARG_start].u_int == -1 && args[ARG_len].u_int == -1) {
+        // Default singleton object that accesses writable-filesystem flash
+        return MP_OBJ_FROM_PTR(&alif_flash_fs_obj);
+    }
+
+    alif_flash_obj_t *self = mp_obj_malloc(alif_flash_obj_t, &alif_flash_type);
+
+    mp_int_t start = args[ARG_start].u_int;
+    if (start == -1) {
+        start = 0;
+    } else if (!(0 <= start && start < MICROPY_HW_FLASH_STORAGE_BYTES && start % MICROPY_HW_FLASH_BLOCK_SIZE_BYTES == 0)) {
+        mp_raise_ValueError(NULL);
+    }
+
+    mp_int_t len = args[ARG_len].u_int;
+    if (len == -1) {
+        len = MICROPY_HW_FLASH_STORAGE_BYTES - start;
+    } else if (!(0 < len && start + len <= MICROPY_HW_FLASH_STORAGE_BYTES && len % MICROPY_HW_FLASH_BLOCK_SIZE_BYTES == 0)) {
+        mp_raise_ValueError(NULL);
+    }
+
+    self->flash_base_addr = MICROPY_HW_FLASH_STORAGE_BASE_ADDR + start;
+    self->flash_size = len;
+
+    return MP_OBJ_FROM_PTR(self);
+}
+
+static mp_int_t alif_flash_get_buffer(mp_obj_t self_in, mp_buffer_info_t *bufinfo, mp_uint_t flags) {
+    alif_flash_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    if (flags == MP_BUFFER_READ) {
+        bufinfo->buf = (void *)(ospi_flash_get_xip_base() + self->flash_base_addr);
+        bufinfo->len = self->flash_size;
+        bufinfo->typecode = 'B';
+        return 0;
+    } else {
+        // Can't return a writable buffer.
+        return 1;
+    }
+}
+
+static mp_obj_t alif_flash_readblocks(size_t n_args, const mp_obj_t *args) {
+    alif_flash_obj_t *self = MP_OBJ_TO_PTR(args[0]);
+    uint32_t offset = mp_obj_get_int(args[1]) * MICROPY_HW_FLASH_BLOCK_SIZE_BYTES;
+    mp_buffer_info_t bufinfo;
+    mp_get_buffer_raise(args[2], &bufinfo, MP_BUFFER_WRITE);
+    if (n_args == 4) {
+        offset += mp_obj_get_int(args[3]);
+    }
+    int ret = ospi_flash_read(self->flash_base_addr + offset, bufinfo.len, bufinfo.buf);
+    mp_event_handle_nowait();
+    return MP_OBJ_NEW_SMALL_INT(ret);
+}
+static MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(alif_flash_readblocks_obj, 3, 4, alif_flash_readblocks);
+
+static mp_obj_t alif_flash_writeblocks(size_t n_args, const mp_obj_t *args) {
+    alif_flash_obj_t *self = MP_OBJ_TO_PTR(args[0]);
+    uint32_t offset = mp_obj_get_int(args[1]) * MICROPY_HW_FLASH_BLOCK_SIZE_BYTES;
+    mp_buffer_info_t bufinfo;
+    mp_get_buffer_raise(args[2], &bufinfo, MP_BUFFER_READ);
+    if (n_args == 3) {
+        uint32_t addr = self->flash_base_addr + offset;
+        int32_t len = bufinfo.len;
+        while (len > 0) {
+            int ret = ospi_flash_erase_sector(addr);
+            mp_event_handle_nowait();
+            if (ret < 0) {
+                return MP_OBJ_NEW_SMALL_INT(ret);
+            }
+            addr += MICROPY_HW_FLASH_BLOCK_SIZE_BYTES;
+            len -= MICROPY_HW_FLASH_BLOCK_SIZE_BYTES;
+        }
+    } else {
+        offset += mp_obj_get_int(args[3]);
+    }
+    int ret = ospi_flash_write(self->flash_base_addr + offset, bufinfo.len, bufinfo.buf);
+    mp_event_handle_nowait();
+    return MP_OBJ_NEW_SMALL_INT(ret);
+}
+static MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(alif_flash_writeblocks_obj, 3, 4, alif_flash_writeblocks);
+
+static mp_obj_t alif_flash_ioctl(mp_obj_t self_in, mp_obj_t cmd_in, mp_obj_t arg_in) {
+    alif_flash_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    mp_int_t cmd = mp_obj_get_int(cmd_in);
+    switch (cmd) {
+        case MP_BLOCKDEV_IOCTL_INIT:
+            return MP_OBJ_NEW_SMALL_INT(0);
+        case MP_BLOCKDEV_IOCTL_DEINIT:
+            return MP_OBJ_NEW_SMALL_INT(0);
+        case MP_BLOCKDEV_IOCTL_SYNC:
+            return MP_OBJ_NEW_SMALL_INT(0);
+        case MP_BLOCKDEV_IOCTL_BLOCK_COUNT:
+            return MP_OBJ_NEW_SMALL_INT(self->flash_size / MICROPY_HW_FLASH_BLOCK_SIZE_BYTES);
+        case MP_BLOCKDEV_IOCTL_BLOCK_SIZE:
+            return MP_OBJ_NEW_SMALL_INT(MICROPY_HW_FLASH_BLOCK_SIZE_BYTES);
+        case MP_BLOCKDEV_IOCTL_BLOCK_ERASE: {
+            uint32_t offset = mp_obj_get_int(arg_in) * MICROPY_HW_FLASH_BLOCK_SIZE_BYTES;
+            int ret = ospi_flash_erase_sector(self->flash_base_addr + offset);
+            return MP_OBJ_NEW_SMALL_INT(ret);
+        }
+        default:
+            return mp_const_none;
+    }
+}
+static MP_DEFINE_CONST_FUN_OBJ_3(alif_flash_ioctl_obj, alif_flash_ioctl);
+
+static const mp_rom_map_elem_t alif_flash_locals_dict_table[] = {
+    { MP_ROM_QSTR(MP_QSTR_readblocks), MP_ROM_PTR(&alif_flash_readblocks_obj) },
+    { MP_ROM_QSTR(MP_QSTR_writeblocks), MP_ROM_PTR(&alif_flash_writeblocks_obj) },
+    { MP_ROM_QSTR(MP_QSTR_ioctl), MP_ROM_PTR(&alif_flash_ioctl_obj) },
+};
+static MP_DEFINE_CONST_DICT(alif_flash_locals_dict, alif_flash_locals_dict_table);
+
+MP_DEFINE_CONST_OBJ_TYPE(
+    alif_flash_type,
+    MP_QSTR_Flash,
+    MP_TYPE_FLAG_NONE,
+    make_new, alif_flash_make_new,
+    buffer, alif_flash_get_buffer,
+    locals_dict, &alif_flash_locals_dict
+    );
+#endif // MICROPY_HW_ENABLE_OSPI
diff --git a/ports/alif/boards/ALIF_ENSEMBLE/board.c b/ports/alif/boards/ALIF_ENSEMBLE/board.c
new file mode 100644
index 0000000000000..72b93e31ffbea
--- /dev/null
+++ b/ports/alif/boards/ALIF_ENSEMBLE/board.c
@@ -0,0 +1,56 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "py/mphal.h"
+#include "ospi_ext.h"
+#include "ospi_flash.h"
+
+const ospi_pin_settings_t ospi_pin_settings = {
+    .peripheral_number = 1,
+    .pin_reset = pin_OSPI1_RESET,
+    .pin_cs = pin_OSPI1_CS,
+    .pin_clk_p = pin_OSPI1_SCLK,
+    .pin_clk_n = NULL,
+    .pin_rwds = pin_OSPI1_RXDS,
+    .pin_d0 = pin_OSPI1_D0,
+    .pin_d1 = pin_OSPI1_D1,
+    .pin_d2 = pin_OSPI1_D2,
+    .pin_d3 = pin_OSPI1_D3,
+    .pin_d4 = pin_OSPI1_D4,
+    .pin_d5 = pin_OSPI1_D5,
+    .pin_d6 = pin_OSPI1_D6,
+    .pin_d7 = pin_OSPI1_D7,
+};
+
+const ospi_flash_settings_t ospi_flash_settings[] = {
+    {
+        .jedec_id = 0x1a5b9d,
+        .freq_hz = 100000000,
+        .read_dummy_cycles = 9,
+        OSPI_FLASH_SETTINGS_IS25,
+    },
+};
+const size_t ospi_flash_settings_len = 1;
diff --git a/ports/alif/boards/ALIF_ENSEMBLE/board.ld.S b/ports/alif/boards/ALIF_ENSEMBLE/board.ld.S
new file mode 100644
index 0000000000000..7adcdbbcc3761
--- /dev/null
+++ b/ports/alif/boards/ALIF_ENSEMBLE/board.ld.S
@@ -0,0 +1,14 @@
+#include "mcu/ensemble.ld.S"
+
+/* Define ROMFS partition locations. */
+#if CORE_M55_HP
+/* The HP core has access to the external OSPI1 flash and MRAM ROMFS partitions. */
+_micropy_hw_romfs_part0_start = 0xc1000000;
+_micropy_hw_romfs_part0_size = 16M;
+_micropy_hw_romfs_part1_start = ORIGIN(MRAM_FS);
+_micropy_hw_romfs_part1_size = LENGTH(MRAM_FS);
+#else
+/* The HP core has access to the MRAM ROMFS partition. */
+_micropy_hw_romfs_part0_start = ORIGIN(MRAM_FS);
+_micropy_hw_romfs_part0_size = LENGTH(MRAM_FS);
+#endif
diff --git a/ports/alif/boards/ALIF_ENSEMBLE/mpconfigboard.h b/ports/alif/boards/ALIF_ENSEMBLE/mpconfigboard.h
new file mode 100644
index 0000000000000..8a6003ebbfb53
--- /dev/null
+++ b/ports/alif/boards/ALIF_ENSEMBLE/mpconfigboard.h
@@ -0,0 +1,56 @@
+#define MICROPY_HW_BOARD_NAME                   "Alif Ensemble DevKit"
+#define MICROPY_HW_MCU_NAME                     "AE722F80F55D5XX"
+
+#define MICROPY_HW_ENABLE_UART_REPL             (CORE_M55_HP)
+#define MICROPY_HW_UART_REPL                    (4)
+#define MICROPY_HW_USB_MSC                      (1)
+#define MICROPY_HW_ENABLE_HW_I2C                (1)
+
+// ROMFS partitions
+#define MICROPY_HW_ROMFS_ENABLE_PART0           (1)
+#define MICROPY_HW_ROMFS_ENABLE_PART1           (CORE_M55_HP)
+
+// I2C buses
+#define MICROPY_HW_I2C0_SCL                     (pin_P0_3)
+#define MICROPY_HW_I2C0_SDA                     (pin_P0_2)
+#define MICROPY_HW_I2C1_SCL                     (pin_P3_7)
+#define MICROPY_HW_I2C1_SDA                     (pin_P3_6)
+#define MICROPY_HW_I2C2_SCL                     (pin_P5_1)
+#define MICROPY_HW_I2C2_SDA                     (pin_P5_0)
+#define MICROPY_HW_I2C3_SCL                     (pin_P1_1)
+#define MICROPY_HW_I2C3_SDA                     (pin_P1_0)
+
+// SPI buses
+#define MICROPY_HW_SPI0_MISO                    (pin_P1_0)
+#define MICROPY_HW_SPI0_MOSI                    (pin_P1_1)
+#define MICROPY_HW_SPI0_SCK                     (pin_P1_2)
+#define MICROPY_HW_SPI1_MISO                    (pin_P2_4)
+#define MICROPY_HW_SPI1_MOSI                    (pin_P2_5)
+#define MICROPY_HW_SPI1_SCK                     (pin_P2_6)
+#define MICROPY_HW_SPI2_MISO                    (pin_P4_2)
+#define MICROPY_HW_SPI2_MOSI                    (pin_P4_3)
+#define MICROPY_HW_SPI2_SCK                     (pin_P4_4)
+#define MICROPY_HW_SPI3_MISO                    (pin_P12_4)
+#define MICROPY_HW_SPI3_MOSI                    (pin_P12_5)
+#define MICROPY_HW_SPI3_SCK                     (pin_P12_6)
+#define MICROPY_HW_LPSPI0_MISO                  (pin_P7_4)
+#define MICROPY_HW_LPSPI0_MOSI                  (pin_P7_5)
+#define MICROPY_HW_LPSPI0_SCK                   (pin_P7_6)
+
+// UART buses
+#define MICROPY_HW_UART0_TX                     (pin_P0_1)
+#define MICROPY_HW_UART0_RX                     (pin_P0_0)
+#define MICROPY_HW_UART0_RTS                    (pin_P0_3)
+#define MICROPY_HW_UART0_CTS                    (pin_P0_2)
+#define MICROPY_HW_UART1_TX                     (pin_P0_5)
+#define MICROPY_HW_UART1_RX                     (pin_P0_4)
+#define MICROPY_HW_UART1_RTS                    (pin_P0_7)
+#define MICROPY_HW_UART1_CTS                    (pin_P0_6)
+#define MICROPY_HW_REPL_UART_TX                 (pin_P12_2)
+#define MICROPY_HW_REPL_UART_RX                 (pin_P12_1)
+
+// This is used for alif.Flash() and USB MSC.
+#define MICROPY_HW_FLASH_STORAGE_BASE_ADDR      (0)
+#define MICROPY_HW_FLASH_STORAGE_BYTES          (32 * 1024 * 1024)
+#define MICROPY_HW_FLASH_STORAGE_FS_BYTES       (16 * 1024 * 1024)
+#define MICROPY_HW_FLASH_STORAGE_ROMFS_BYTES    (16 * 1024 * 1024)
diff --git a/ports/alif/boards/ALIF_ENSEMBLE/mpconfigboard.mk b/ports/alif/boards/ALIF_ENSEMBLE/mpconfigboard.mk
new file mode 100644
index 0000000000000..d35a7aad84a07
--- /dev/null
+++ b/ports/alif/boards/ALIF_ENSEMBLE/mpconfigboard.mk
@@ -0,0 +1,11 @@
+MCU_SERIES = E7
+MCU_VARIANT = AE722F80F55D5XX
+JLINK_DEV = AE722F80F55D5_HP
+LD_FILE = boards/ALIF_ENSEMBLE/board.ld.S
+
+ALIF_TOOLKIT_CFG_PART = AE722F80F55D5LS
+ALIF_TOOLKIT_CFG_FILE = \"app-device-config-ae7.json\"
+
+MICROPY_FLOAT_IMPL = float
+MICROPY_PY_OPENAMP = 1
+MICROPY_PY_OPENAMP_REMOTEPROC = 1
diff --git a/ports/alif/boards/ALIF_ENSEMBLE/ospi_xip_user.h b/ports/alif/boards/ALIF_ENSEMBLE/ospi_xip_user.h
new file mode 100644
index 0000000000000..49921bdd22ddc
--- /dev/null
+++ b/ports/alif/boards/ALIF_ENSEMBLE/ospi_xip_user.h
@@ -0,0 +1,5 @@
+// This file is needed by ospi_xip/source/ospi/ospi_drv.c.
+#define OSPI_XIP_ENABLE_AES_DECRYPTION (0)
+#define OSPI_XIP_RX_SAMPLE_DELAY (3)
+#define OSPI_XIP_DDR_DRIVE_EDGE (1)
+#define OSPI_XIP_RXDS_DELAY (12)
diff --git a/ports/alif/boards/ALIF_ENSEMBLE/pins.csv b/ports/alif/boards/ALIF_ENSEMBLE/pins.csv
new file mode 100644
index 0000000000000..ec397d9cf604c
--- /dev/null
+++ b/ports/alif/boards/ALIF_ENSEMBLE/pins.csv
@@ -0,0 +1,30 @@
+# OSP1 flash
+OSPI1_RESET,P15_7
+OSPI1_CS,P5_7
+OSPI1_SCLK,P5_5
+OSPI1_D0,P9_5
+OSPI1_D1,P9_6
+OSPI1_D2,P9_7
+OSPI1_D3,P10_0
+OSPI1_D4,P10_1
+OSPI1_D5,P10_2
+OSPI1_D6,P10_3
+OSPI1_D7,P10_4
+OSPI1_RXDS,P10_7
+
+LED_BLUE,P12_0
+LED_RED,P12_3
+JOY_LEFT,P15_0
+JOY_RIGHT,P15_1
+
+# UART buses
+UART0_TX,P0_1
+UART0_RX,P0_0
+UART0_RTS,P0_3
+UART0_CTS,P0_2
+UART1_TX,P0_5
+UART1_RX,P0_4
+UART1_RTS,P0_7
+UART1_CTS,P0_6
+REPL_UART_TX,P12_2
+REPL_UART_RX,P12_1
diff --git a/ports/alif/boards/OPENMV_AE3/board.c b/ports/alif/boards/OPENMV_AE3/board.c
new file mode 100644
index 0000000000000..65da152d8536f
--- /dev/null
+++ b/ports/alif/boards/OPENMV_AE3/board.c
@@ -0,0 +1,192 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "py/mphal.h"
+#include "ospi_ext.h"
+#include "ospi_flash.h"
+#include "se_services.h"
+
+#define OMV_BOOT_MAGIC_ADDR     (0x200FFFFCU)
+#define OMV_BOOT_MAGIC_VALUE    (0xB00710ADU)
+
+#if CORE_M55_HP
+#define NPU_IRQ_NUMBER          NPU_HP_IRQ_IRQn
+#define NPU_BASE_ADDRESS        (void *)NPU_HP_BASE
+#else
+#define NPU_IRQ_NUMBER          NPU_HE_IRQ_IRQn
+#define NPU_BASE_ADDRESS        (void *)NPU_HE_BASE
+#endif
+
+typedef struct {
+    volatile uint32_t ID;       // 0x0
+    volatile uint32_t STATUS;   // 0x4
+    volatile uint32_t CMD;      // 0x8
+    volatile uint32_t RESET;    // 0xC
+} npu_regs_t;
+
+#define NPU ((npu_regs_t *)NPU_BASE_ADDRESS)
+
+const ospi_pin_settings_t ospi_pin_settings = {
+    .peripheral_number = 0,
+    .pin_reset = pin_FLASH_RESET,
+    .pin_cs = pin_FLASH_CS,
+    .pin_clk_p = pin_FLASH_SCLK_P,
+    .pin_clk_n = pin_FLASH_SCLK_N,
+    .pin_rwds = pin_FLASH_DQSM,
+    .pin_d0 = pin_FLASH_D0,
+    .pin_d1 = pin_FLASH_D1,
+    .pin_d2 = pin_FLASH_D2,
+    .pin_d3 = pin_FLASH_D3,
+    .pin_d4 = pin_FLASH_D4,
+    .pin_d5 = pin_FLASH_D5,
+    .pin_d6 = pin_FLASH_D6,
+    .pin_d7 = pin_FLASH_D7,
+};
+
+const ospi_flash_settings_t ospi_flash_settings[] = {
+    {
+        .jedec_id = 0x3980c2,
+        .freq_hz = 100000000,
+        .read_dummy_cycles = 10,
+        OSPI_FLASH_SETTINGS_MX25,
+    },
+    {
+        .jedec_id = 0x195b9d,
+        .freq_hz = 100000000,
+        .read_dummy_cycles = 9,
+        OSPI_FLASH_SETTINGS_IS25,
+    },
+    {
+        .jedec_id = 0x17bb6b,
+        .freq_hz = 100000000,
+        .read_dummy_cycles = 7,
+        OSPI_FLASH_SETTINGS_EM,
+    },
+};
+const size_t ospi_flash_settings_len = 3;
+
+void board_startup(void) {
+    // Switch the USB multiplexer to use the Alif USB port.
+    mp_hal_pin_output(pin_USB_D_SEL);
+    mp_hal_pin_high(pin_USB_D_SEL);
+}
+
+void board_enter_bootloader(void) {
+    *((uint32_t *)OMV_BOOT_MAGIC_ADDR) = OMV_BOOT_MAGIC_VALUE;
+    NVIC_SystemReset();
+}
+
+void board_early_init(void) {
+    // Set default run profile
+    run_profile_t run_profile = {
+        .dcdc_mode = DCDC_MODE_PWM,
+        .dcdc_voltage = DCDC_VOUT_0825,
+        // CLK_SRC_LFRC or CLK_SRC_LFXO
+        .aon_clk_src = CLK_SRC_LFXO,
+        // CLK_SRC_HFRC, CLK_SRC_HFXO or CLK_SRC_PLL
+        .run_clk_src = CLK_SRC_PLL,
+        #if CORE_M55_HP
+        .cpu_clk_freq = CLOCK_FREQUENCY_400MHZ,
+        #else
+        .cpu_clk_freq = CLOCK_FREQUENCY_160MHZ,
+        #endif
+        .scaled_clk_freq = SCALED_FREQ_XO_HIGH_DIV_38_4_MHZ,
+        // AON, modem aon, SSE-700 AON, modem, SYSTOP, DEBUG, SE
+        .power_domains = PD_VBAT_AON_MASK | PD_SSE700_AON_MASK | PD_SYST_MASK |
+            PD_DBSS_MASK | PD_SESS_MASK | PD_SRAMS_MASK | PD_SRAM_CTRL_AON_MASK,
+        // Add all memories
+        .memory_blocks = SERAM_MASK | SRAM0_MASK | SRAM1_MASK | MRAM_MASK | BACKUP4K_MASK |
+            SRAM6A_MASK | SRAM6B_MASK | SRAM7_1_MASK | SRAM7_2_MASK | SRAM7_3_MASK |
+            SRAM8_MASK | SRAM9_MASK | FWRAM_MASK,
+        .phy_pwr_gating = LDO_PHY_MASK | USB_PHY_MASK | MIPI_TX_DPHY_MASK | MIPI_RX_DPHY_MASK |
+            MIPI_PLL_DPHY_MASK,
+        .vdd_ioflex_3V3 = IOFLEX_LEVEL_3V3,
+    };
+
+    if (se_services_set_run_profile(&run_profile)) {
+        MICROPY_BOARD_FATAL_ERROR("se_services_set_run_profile");
+    }
+
+    // Set default off profile
+    off_profile_t off_profile = {
+        .dcdc_mode = DCDC_MODE_PWM,
+        .dcdc_voltage = DCDC_VOUT_0825,
+        // CLK_SRC_LFRC or CLK_SRC_LFXO
+        .aon_clk_src = CLK_SRC_LFXO,
+        // CLK_SRC_HFRC, CLK_SRC_HFXO or CLK_SRC_PLL
+        .stby_clk_src = CLK_SRC_HFRC,
+        .stby_clk_freq = SCALED_FREQ_RC_STDBY_76_8_MHZ,
+        // Disable all power domains.
+        .power_domains = 0,
+        // Add all memories
+        .memory_blocks = SERAM_MASK | SRAM0_MASK | SRAM1_MASK | MRAM_MASK | BACKUP4K_MASK |
+            SRAM6A_MASK | SRAM6B_MASK | SRAM7_1_MASK | SRAM7_2_MASK | SRAM7_3_MASK |
+            SRAM8_MASK | SRAM9_MASK | FWRAM_MASK,
+        .phy_pwr_gating = LDO_PHY_MASK | USB_PHY_MASK | MIPI_TX_DPHY_MASK | MIPI_RX_DPHY_MASK |
+            MIPI_PLL_DPHY_MASK,
+        .vdd_ioflex_3V3 = IOFLEX_LEVEL_3V3,
+        .vtor_address = SCB->VTOR,
+        .vtor_address_ns = SCB->VTOR,
+        .ewic_cfg = EWIC_RTC_A,
+        .wakeup_events = WE_LPRTC,
+    };
+
+    if (se_services_set_off_profile(&off_profile)) {
+        MICROPY_BOARD_FATAL_ERROR("se_services_set_off_profile");
+    }
+
+    // Select PLL for PD4 memory.
+    if (se_services_select_pll_source(PLL_SOURCE_PLL, PLL_TARGET_PD4_SRAM)) {
+        MICROPY_BOARD_FATAL_ERROR("se_services_select_pll_source");
+    }
+}
+
+MP_WEAK void board_enter_stop(void) {
+    // Disable NPU interrupt
+    NVIC_DisableIRQ(NPU_IRQ_NUMBER);
+    NVIC_ClearPendingIRQ(NPU_IRQ_NUMBER);
+
+    // Soft-reset NPU
+    NPU->RESET = 0x00000000;
+
+    // Wait until reset
+    uint32_t data = 0;
+    do {
+        // Poll channel0 status registers
+        data = NPU->STATUS;
+    } while (data);
+
+    // Set default value, enables off for clocks and power.
+    NPU->CMD = 0x0000000C;
+}
+
+MP_WEAK void board_enter_standby(void) {
+
+}
+
+MP_WEAK void board_exit_standby(void) {
+
+}
diff --git a/ports/alif/boards/OPENMV_AE3/board.ld.S b/ports/alif/boards/OPENMV_AE3/board.ld.S
new file mode 100644
index 0000000000000..0d09bb15f874f
--- /dev/null
+++ b/ports/alif/boards/OPENMV_AE3/board.ld.S
@@ -0,0 +1,14 @@
+#include "mcu/ensemble.ld.S"
+
+/* Define ROMFS partition locations. */
+#if CORE_M55_HP
+/* The HP core has access to the external OSPI flash and MRAM ROMFS partitions. */
+_micropy_hw_romfs_part0_start = 0xa1000000;
+_micropy_hw_romfs_part0_size = 16M;
+_micropy_hw_romfs_part1_start = ORIGIN(MRAM_FS);
+_micropy_hw_romfs_part1_size = LENGTH(MRAM_FS);
+#else
+/* The HP core has access to the MRAM ROMFS partition. */
+_micropy_hw_romfs_part0_start = ORIGIN(MRAM_FS);
+_micropy_hw_romfs_part0_size = LENGTH(MRAM_FS);
+#endif
diff --git a/ports/alif/boards/OPENMV_AE3/mpconfigboard.h b/ports/alif/boards/OPENMV_AE3/mpconfigboard.h
new file mode 100644
index 0000000000000..cbdbd063ed3df
--- /dev/null
+++ b/ports/alif/boards/OPENMV_AE3/mpconfigboard.h
@@ -0,0 +1,85 @@
+#define MICROPY_HW_BOARD_NAME       "OpenMV-AE3"
+#define MICROPY_HW_MCU_NAME         "AE302F80F55D5AE"
+
+#define MICROPY_OBJ_REPR            (MICROPY_OBJ_REPR_C)
+typedef intptr_t mp_int_t; // must be pointer size
+typedef uintptr_t mp_uint_t; // must be pointer size
+typedef intptr_t mp_off_t;
+
+#define MICROPY_HW_USB_MSC          (CORE_M55_HP)
+#define MICROPY_HW_ENABLE_HW_I2C    (1)
+#define MICROPY_HW_ENABLE_OSPI      (CORE_M55_HP)
+
+// ROMFS partitions
+#define MICROPY_HW_ROMFS_ENABLE_PART0 (1)
+#define MICROPY_HW_ROMFS_ENABLE_PART1 (CORE_M55_HP)
+
+// I2C buses
+#define MICROPY_HW_I2C1_SCL         (pin_P0_5)
+#define MICROPY_HW_I2C1_SDA         (pin_P0_4)
+
+#define MICROPY_HW_I2C2_SCL         (pin_P5_1)
+#define MICROPY_HW_I2C2_SDA         (pin_P5_0)
+
+#define MICROPY_HW_I2C3_SCL         (pin_P1_1)
+#define MICROPY_HW_I2C3_SDA         (pin_P1_0)
+
+// SPI buses
+#define MICROPY_HW_SPI0_MISO        (pin_P5_0)
+#define MICROPY_HW_SPI0_MOSI        (pin_P5_1)
+// #define MICROPY_HW_SPI0_NSS         (pin_P5_2)
+#define MICROPY_HW_SPI0_SCK         (pin_P5_3)
+
+// UART buses
+#define MICROPY_HW_UART1_TX         (pin_P0_5)
+#define MICROPY_HW_UART1_RX         (pin_P0_4)
+#define MICROPY_HW_UART3_TX         (pin_P1_3)
+#define MICROPY_HW_UART3_RX         (pin_P1_2)
+#define MICROPY_HW_UART3_RTS        (pin_P7_3)
+#define MICROPY_HW_UART3_CTS        (pin_P7_2)
+#define MICROPY_HW_UART4_TX         (pin_P5_1)
+#define MICROPY_HW_UART4_RX         (pin_P5_0)
+#define MICROPY_HW_UART5_TX         (pin_P5_3)
+#define MICROPY_HW_UART5_RX         (pin_P5_2)
+
+#define MICROPY_HW_USB_VID          0x37C5
+#define MICROPY_HW_USB_PID          0x16E3
+
+#define MICROPY_HW_USB_MANUFACTURER_STRING  "OpenMV"
+#define MICROPY_HW_USB_PRODUCT_FS_STRING    "OpenMV Camera"
+#define MICROPY_HW_USB_MSC_INQUIRY_VENDOR_STRING "OpenMV"
+
+extern void board_startup(void);
+#define MICROPY_BOARD_STARTUP       board_startup
+
+extern void board_early_init(void);
+#define MICROPY_BOARD_EARLY_INIT board_early_init
+
+extern void board_enter_bootloader(void);
+#define MICROPY_BOARD_ENTER_BOOTLOADER(nargs, args) board_enter_bootloader()
+
+extern void board_enter_stop(void);
+#define MICROPY_BOARD_ENTER_STOP board_enter_stop
+
+extern void board_enter_standby(void);
+#define MICROPY_BOARD_ENTER_STANDBY board_enter_standby
+
+extern void board_exit_standby(void);
+#define MICROPY_BOARD_EXIT_STANDBY board_exit_standby
+
+// This is used for alif.Flash() and USB MSC.
+#define MICROPY_HW_FLASH_STORAGE_BASE_ADDR      (0)
+#define MICROPY_HW_FLASH_STORAGE_BYTES          (32 * 1024 * 1024)
+#define MICROPY_HW_FLASH_STORAGE_FS_BYTES       (16 * 1024 * 1024)
+#define MICROPY_HW_FLASH_STORAGE_ROMFS_BYTES    (16 * 1024 * 1024)
+
+// Murata 1YN configuration
+#define CYW43_CHIPSET_FIRMWARE_INCLUDE_FILE     "lib/cyw43-driver/firmware/w43439_sdio_1yn_7_95_59_combined.h"
+#define CYW43_WIFI_NVRAM_INCLUDE_FILE           "lib/cyw43-driver/firmware/wifi_nvram_1yn.h"
+#define CYW43_BT_FIRMWARE_INCLUDE_FILE          "lib/cyw43-driver/firmware/cyw43_btfw_1yn.h"
+#define CYW43_BT_UART_BAUDRATE_DOWNLOAD_FIRMWARE (2000000)
+#define CYW43_BT_UART_BAUDRATE_ACTIVE_USE       (2000000)
+
+// Bluetooth config
+#define MICROPY_HW_BLE_UART_ID                  (0)
+#define MICROPY_HW_BLE_UART_BAUDRATE            (115200)
diff --git a/ports/alif/boards/OPENMV_AE3/mpconfigboard.mk b/ports/alif/boards/OPENMV_AE3/mpconfigboard.mk
new file mode 100644
index 0000000000000..83cc17dd15ed9
--- /dev/null
+++ b/ports/alif/boards/OPENMV_AE3/mpconfigboard.mk
@@ -0,0 +1,22 @@
+# TODO: alif_ensemble-cmsis-dfp only supports AE722F80F55D5XX at the moment.
+MCU_SERIES = E7
+MCU_VARIANT = AE722F80F55D5XX
+JLINK_DEV = AE302F80F55D5_HP
+LD_FILE = boards/OPENMV_AE3/board.ld.S
+PORT = /dev/ttyUSB0
+
+ALIF_TOOLKIT_CFG_PART = AE302F80F55D5AE
+ALIF_TOOLKIT_CFG_FILE = \"app-device-config-ae3.json\"
+
+CORE_M55_HP := $(if $(filter M55_HP,$(MCU_CORE)),1,0)
+
+# MicroPython settings
+MICROPY_FLOAT_IMPL = float
+MICROPY_PY_BLUETOOTH = $(CORE_M55_HP)
+MICROPY_BLUETOOTH_NIMBLE = $(CORE_M55_HP)
+MICROPY_PY_LWIP = $(CORE_M55_HP)
+MICROPY_PY_NETWORK_CYW43 = $(CORE_M55_HP)
+MICROPY_PY_SSL = $(CORE_M55_HP)
+MICROPY_SSL_MBEDTLS = $(CORE_M55_HP)
+MICROPY_PY_OPENAMP = 1
+MICROPY_PY_OPENAMP_REMOTEPROC = 1
diff --git a/ports/alif/boards/OPENMV_AE3/ospi_xip_user.h b/ports/alif/boards/OPENMV_AE3/ospi_xip_user.h
new file mode 100644
index 0000000000000..c0bd9afeb5cea
--- /dev/null
+++ b/ports/alif/boards/OPENMV_AE3/ospi_xip_user.h
@@ -0,0 +1,6 @@
+// This file is needed by ospi_xip/source/ospi/ospi_drv.c.
+#define OSPI_XIP_ENABLE_AES_DECRYPTION (0)
+#define OSPI_XIP_RX_SAMPLE_DELAY (4)
+#define OSPI_XIP_DDR_DRIVE_EDGE (0)
+// floor(1/4 OSPI clock cycle + 3.6ns) * 2
+#define OSPI_XIP_RXDS_DELAY (12)
diff --git a/ports/alif/boards/OPENMV_AE3/pins.csv b/ports/alif/boards/OPENMV_AE3/pins.csv
new file mode 100644
index 0000000000000..ab4f1a34f7e11
--- /dev/null
+++ b/ports/alif/boards/OPENMV_AE3/pins.csv
@@ -0,0 +1,69 @@
+# USB multiplexer
+USB_D_SEL,P15_0
+USB_D_SEL_FB,P15_1
+
+# LEDs
+LED_RED,P0_0
+LED_GREEN,P6_3
+LED_BLUE,P6_0
+
+# User switch
+USR_SW,P15_7
+
+# Flash on OSPI0
+FLASH_RESET,P3_3
+FLASH_CS,P3_2
+FLASH_SCLK_P,P3_0
+FLASH_SCLK_N,P3_1
+FLASH_DQSM,P1_6
+FLASH_D0,P2_0
+FLASH_D1,P2_1
+FLASH_D2,P2_2
+FLASH_D3,P2_3
+FLASH_D4,P2_4
+FLASH_D5,P2_5
+FLASH_D6,P2_6
+FLASH_D7,P2_7
+
+# Murata 1YN
+BT_UART_RX,P1_4
+BT_UART_TX,P1_5
+BT_UART_CTS,P6_6
+BT_UART_RTS,P6_7
+BT_REG_ON,P5_7
+BT_DEV_WAKE,P9_2
+BT_HOST_WAKE,P13_3
+WL_REG_ON,P10_4
+WL_HOST_WAKE,P11_0
+WL_I2S_SDI,P12_0
+WL_I2S_SDO,P12_1
+WL_I2S_SCLK,P12_2
+WL_I2S_WS,P12_3
+WL_IRQ,P9_6
+WL_MISO,P12_4
+WL_MOSI,P12_5
+WL_SCLK,P12_6
+WL_CS,P12_7
+
+P0,P5_1
+P1,P5_0
+P2,P5_3
+P3,P5_2
+P4,P0_5
+P5,P0_4
+P6,P7_2
+P7,P7_3
+P8,P1_2
+P9,P1_3
+
+# UART buses
+UART1_TX,P0_5
+UART1_RX,P0_4
+UART3_TX,P1_3
+UART3_RX,P1_2
+UART3_RTS,P7_3
+UART3_CTS,P7_2
+UART4_TX,P5_1
+UART4_RX,P5_0
+UART5_TX,P5_3
+UART5_RX,P5_2
diff --git a/ports/alif/boards/manifest.py b/ports/alif/boards/manifest.py
new file mode 100644
index 0000000000000..834aa46702731
--- /dev/null
+++ b/ports/alif/boards/manifest.py
@@ -0,0 +1,6 @@
+freeze("$(PORT_DIR)/modules/$(MCU_CORE)")
+include("$(MPY_DIR)/extmod/asyncio")
+require("dht")
+require("neopixel")
+require("onewire")
+require("bundle-networking")
diff --git a/ports/alif/cyw43_configport.h b/ports/alif/cyw43_configport.h
new file mode 100644
index 0000000000000..bfd4364ab9076
--- /dev/null
+++ b/ports/alif/cyw43_configport.h
@@ -0,0 +1,91 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024-2025 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#ifndef MICROPY_INCLUDED_ALIF_CYW43_CONFIGPORT_H
+#define MICROPY_INCLUDED_ALIF_CYW43_CONFIGPORT_H
+
+// The board-level config will be included here, so it can set some CYW43 values.
+#include "extmod/mpbthci.h"
+#include "extmod/cyw43_config_common.h"
+
+#ifndef static_assert
+#define static_assert(expr, msg)        typedef int static_assert_##__LINE__[(expr) ? 1 : -1]
+#endif
+
+#define CYW43_USE_SPI                   (1)
+#define CYW43_ENABLE_BLUETOOTH_OVER_UART (1)
+#define CYW43_LWIP                      (1)
+#define CYW43_USE_STATS                 (0)
+#define CYW43_PRINTF(...)               mp_printf(MP_PYTHON_PRINTER, __VA_ARGS__)
+
+#if 0
+#define CYW43_VERBOSE_DEBUG             (1)
+#define CYW43_VDEBUG(...)               mp_printf(MP_PYTHON_PRINTER, __VA_ARGS__)
+#define CYW43_DEBUG(...)                mp_printf(MP_PYTHON_PRINTER, __VA_ARGS__)
+#define CYW43_INFO(...)                 mp_printf(MP_PYTHON_PRINTER, __VA_ARGS__)
+#define CYW43_WARN(...)                 mp_printf(MP_PYTHON_PRINTER, __VA_ARGS__)
+#endif
+
+#define CYW43_CLEAR_SDIO_INT            (1)
+
+#define CYW43_SDPCM_SEND_COMMON_WAIT    __WFE()
+#define CYW43_DO_IOCTL_WAIT             // __WFE()
+
+#define cyw43_hal_uart_set_baudrate     mp_bluetooth_hci_uart_set_baudrate
+#define cyw43_hal_uart_write            mp_bluetooth_hci_uart_write
+#define cyw43_hal_uart_readchar         mp_bluetooth_hci_uart_readchar
+
+#define CYW43_PIN_WL_REG_ON             pin_WL_REG_ON
+#define CYW43_PIN_WL_IRQ                pin_WL_IRQ
+
+#define CYW43_PIN_BT_REG_ON             pin_BT_REG_ON
+#define CYW43_PIN_BT_HOST_WAKE          pin_BT_HOST_WAKE
+#define CYW43_PIN_BT_DEV_WAKE           pin_BT_DEV_WAKE
+#define CYW43_PIN_BT_CTS                pin_BT_UART_CTS
+
+#define cyw43_schedule_internal_poll_dispatch(func) pendsv_schedule_dispatch(PENDSV_DISPATCH_CYW43, func)
+
+void cyw43_post_poll_hook(void);
+
+#undef cyw43_hal_pin_config // mp_hal_pin_config on alif port is not API compatible
+
+static inline void cyw43_hal_pin_config(mp_hal_pin_obj_t pin, uint32_t mode, uint32_t pull, uint32_t alt) {
+    if (mode == MP_HAL_PIN_MODE_INPUT) {
+        mp_hal_pin_input(pin);
+    } else {
+        mp_hal_pin_output(pin);
+    }
+}
+static inline void cyw43_hal_pin_config_irq_falling(mp_hal_pin_obj_t pin, bool enable) {
+    mp_hal_pin_config_irq_falling(pin, enable);
+}
+
+#define cyw43_bluetooth_controller_init mp_bluetooth_hci_controller_init
+#define cyw43_bluetooth_controller_deinit mp_bluetooth_hci_controller_deinit
+#define cyw43_bluetooth_controller_sleep_maybe mp_bluetooth_hci_controller_sleep_maybe
+#define cyw43_bluetooth_controller_woken mp_bluetooth_hci_controller_woken
+#define cyw43_bluetooth_controller_wakeup mp_bluetooth_hci_controller_wakeup
+
+#endif // MICROPY_INCLUDED_ALIF_CYW43_CONFIGPORT_H
diff --git a/ports/alif/cyw43_port_spi.c b/ports/alif/cyw43_port_spi.c
new file mode 100644
index 0000000000000..6ebcaa057dc97
--- /dev/null
+++ b/ports/alif/cyw43_port_spi.c
@@ -0,0 +1,154 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024-2025 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#if MICROPY_PY_NETWORK_CYW43
+
+#include "lib/cyw43-driver/src/cyw43.h"
+#include "lib/cyw43-driver/src/cyw43_internal.h"
+#include "lib/cyw43-driver/src/cyw43_spi.h"
+
+#include "spi.h"
+#include "sys_ctrl_spi.h"
+
+// CYW43 is connected to SPI3.
+#define HW_SPI_UNIT (3)
+#define HW_SPI ((SPI_Type *)SPI3_BASE)
+#define SPI_BAUDRATE (16000000)
+#define SPI_RX_FIFO_SIZE (16)
+
+// WL_IRQ is on P9_6.
+#define WL_IRQ_IRQN (GPIO9_IRQ6_IRQn)
+#define WL_IRQ_HANDLER GPIO9_IRQ6Handler
+
+// Must run at IRQ priority above PendSV so it can wake cyw43-driver when PendSV is disabled.
+void WL_IRQ_HANDLER(void) {
+    if (gpio_read_int_rawstatus(pin_WL_IRQ->gpio, pin_WL_IRQ->pin)) {
+        gpio_interrupt_eoi(pin_WL_IRQ->gpio, pin_WL_IRQ->pin);
+        pendsv_schedule_dispatch(PENDSV_DISPATCH_CYW43, cyw43_poll);
+        __SEV();
+    }
+}
+
+static void spi_bus_init(void) {
+    // Configure pins.
+    mp_hal_pin_output(pin_WL_CS);
+    mp_hal_pin_high(pin_WL_CS);
+    // NOTE: Alif recommends enabled input read for all SPI pins.
+    mp_hal_pin_config(pin_WL_SCLK, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE,
+        MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT(SPI_SCLK, HW_SPI_UNIT), true);
+    mp_hal_pin_config(pin_WL_MOSI, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE,
+        MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT(SPI_MOSI, HW_SPI_UNIT), true);
+    mp_hal_pin_config(pin_WL_MISO, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE,
+        MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT(SPI_MISO, HW_SPI_UNIT), true);
+
+    // Starts out clock_polarity=1, clock_phase=0.
+    spi_mode_master(HW_SPI);
+    spi_set_bus_speed(HW_SPI, SPI_BAUDRATE, GetSystemAHBClock());
+    spi_set_mode(HW_SPI, SPI_MODE_2);
+    spi_set_protocol(HW_SPI, SPI_PROTO_SPI);
+    spi_set_dfs(HW_SPI, 8);
+    spi_set_tmod(HW_SPI, SPI_TMOD_TX_AND_RX);
+    spi_control_ss(HW_SPI, 0, SPI_SS_STATE_ENABLE);
+}
+
+int cyw43_spi_init(cyw43_int_t *self) {
+    spi_bus_init();
+
+    // Configure IRQ for WL_IRQ (active low input).
+    NVIC_SetPriority(WL_IRQ_IRQN, IRQ_PRI_CYW43);
+    NVIC_ClearPendingIRQ(WL_IRQ_IRQN);
+    NVIC_EnableIRQ(WL_IRQ_IRQN);
+
+    return 0;
+}
+
+void cyw43_spi_deinit(cyw43_int_t *self) {
+    // Disable clock, SS and SPI.
+    spi_mask_interrupts(HW_SPI);
+    spi_control_ss(HW_SPI, 0, 0);
+    spi_disable(HW_SPI);
+
+    // Disable SPI IRQ.
+    NVIC_DisableIRQ(WL_IRQ_IRQN);
+    NVIC_ClearPendingIRQ(WL_IRQ_IRQN);
+}
+
+void cyw43_spi_gpio_setup(void) {
+}
+
+void cyw43_spi_reset(void) {
+}
+
+void cyw43_spi_set_polarity(cyw43_int_t *self, int pol) {
+    (void)self;
+
+    if (pol == 0) {
+        spi_set_mode(HW_SPI, SPI_MODE_0);
+    } else {
+        spi_set_mode(HW_SPI, SPI_MODE_2);
+    }
+}
+
+// tx must not be NULL.
+// rx_len must be 0, or the same as tx_len.
+int cyw43_spi_transfer(cyw43_int_t *self, const uint8_t *tx, size_t tx_len, uint8_t *rx, size_t rx_len) {
+    (void)self;
+
+    if (tx_len == 0 && rx_len == 0) {
+        return 0;
+    }
+
+    mp_hal_pin_low(pin_WL_CS);
+
+    // Must read the same amount of data that is written out to SPI.
+    rx_len = tx_len;
+
+    while (tx_len || rx_len) {
+        // Only add data to the TX FIFO if:
+        // - there's data to add
+        // - and TX is not ahead of RX by more than the RX FIFO size
+        // - and there's space in the TX FIFO
+        if (tx_len && tx_len + SPI_RX_FIFO_SIZE > rx_len && (HW_SPI->SPI_SR & SPI_SR_TFNF) != 0) {
+            HW_SPI->SPI_DR[0] = *tx++;
+            --tx_len;
+        }
+
+        // Take data from the RX FIFO and store it into the output buffer (if given).
+        if (rx_len && (HW_SPI->SPI_SR & SPI_SR_RFNE) != 0) {
+            uint8_t data = HW_SPI->SPI_DR[0];
+            if (rx != NULL) {
+                *rx++ = data;
+            }
+            --rx_len;
+        }
+    }
+
+    mp_hal_pin_high(pin_WL_CS);
+
+    return 0;
+}
+
+#endif
diff --git a/ports/alif/fatfs_port.c b/ports/alif/fatfs_port.c
new file mode 100644
index 0000000000000..5883c9f3b9447
--- /dev/null
+++ b/ports/alif/fatfs_port.c
@@ -0,0 +1,38 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "lib/oofatfs/ff.h"
+
+DWORD get_fattime(void) {
+    // TODO
+    int year = 2024;
+    int month = 1;
+    int day = 1;
+    int hour = 0;
+    int min = 0;
+    int sec = 0;
+    return ((year - 1980) << 25) | (month << 21) | (day << 16) | (hour << 11) | (min << 5) | (sec / 2);
+}
diff --git a/ports/alif/irq.h b/ports/alif/irq.h
new file mode 100644
index 0000000000000..08b8ef8086bc3
--- /dev/null
+++ b/ports/alif/irq.h
@@ -0,0 +1,91 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2013-2023 Damien P. George
+ * Copyright (c) 2024 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#ifndef MICROPY_INCLUDED_ALIF_IRQ_H
+#define MICROPY_INCLUDED_ALIF_IRQ_H
+
+#include <stdint.h>
+#include ALIF_CMSIS_H
+
+// IRQ priority definitions.
+//
+// The M55-HP CPU has __NVIC_PRIO_BITS==8 bits for setting the IRQ priority.
+// It uses NVIC_SetPriorityGrouping(0) which is 7 bits for preempt priority
+// and 1 bit for the sub-priority.
+//
+// Lower number implies higher interrupt priority.
+
+#define NVIC_PRIORITYGROUP_7    ((uint32_t)0x00000000U)
+#define IRQ_PRI_SYSTEM_TICK     NVIC_EncodePriority(NVIC_PRIORITYGROUP_7, 0, 0)
+#define IRQ_PRI_MHU             NVIC_EncodePriority(NVIC_PRIORITYGROUP_7, 0, 0)
+#define IRQ_PRI_QUIET_TIMING    NVIC_EncodePriority(NVIC_PRIORITYGROUP_7, 1, 0)
+#define IRQ_PRI_UART_REPL       NVIC_EncodePriority(NVIC_PRIORITYGROUP_7, 1, 0)
+#define IRQ_PRI_ADC             NVIC_EncodePriority(NVIC_PRIORITYGROUP_7, 3, 0)
+#define IRQ_PRI_CSI             NVIC_EncodePriority(NVIC_PRIORITYGROUP_7, 5, 0)
+#define IRQ_PRI_USB             NVIC_EncodePriority(NVIC_PRIORITYGROUP_7, 7, 0)
+#define IRQ_PRI_HWSEM           NVIC_EncodePriority(NVIC_PRIORITYGROUP_7, 8, 0)
+#define IRQ_PRI_GPU             NVIC_EncodePriority(NVIC_PRIORITYGROUP_7, 10, 0)
+#define IRQ_PRI_RTC             NVIC_EncodePriority(NVIC_PRIORITYGROUP_7, 100, 0)
+#define IRQ_PRI_CYW43           NVIC_EncodePriority(NVIC_PRIORITYGROUP_7, 126, 0)
+#define IRQ_PRI_PENDSV          NVIC_EncodePriority(NVIC_PRIORITYGROUP_7, 127, 0)
+
+// these states correspond to values from query_irq, enable_irq and disable_irq
+#define IRQ_STATE_DISABLED (0x00000001)
+#define IRQ_STATE_ENABLED  (0x00000000)
+
+static inline uint32_t query_irq(void) {
+    return __get_PRIMASK();
+}
+
+static inline void enable_irq(uint32_t state) {
+    __set_PRIMASK(state);
+}
+
+static inline uint32_t disable_irq(void) {
+    uint32_t state = __get_PRIMASK();
+    __disable_irq();
+    return state;
+}
+
+// irqs with a priority value greater or equal to "pri" will be disabled
+static inline uint32_t raise_irq_pri(uint32_t pri) {
+    uint32_t basepri = __get_BASEPRI();
+    // If non-zero, the processor does not process any exception with a
+    // priority value greater than or equal to BASEPRI.
+    // When writing to BASEPRI_MAX the write goes to BASEPRI only if either:
+    //   - Rn is non-zero and the current BASEPRI value is 0
+    //   - Rn is non-zero and less than the current BASEPRI value
+    pri <<= (8 - __NVIC_PRIO_BITS);
+    __ASM volatile ("msr basepri_max, %0" : : "r" (pri) : "memory");
+    return basepri;
+}
+
+// "basepri" should be the value returned from raise_irq_pri
+static inline void restore_irq_pri(uint32_t basepri) {
+    __set_BASEPRI(basepri);
+}
+
+#endif // MICROPY_INCLUDED_ALIF_IRQ_H
diff --git a/ports/alif/lwip_inc/arch/cc.h b/ports/alif/lwip_inc/arch/cc.h
new file mode 100644
index 0000000000000..35d45afa71c8c
--- /dev/null
+++ b/ports/alif/lwip_inc/arch/cc.h
@@ -0,0 +1,10 @@
+#ifndef MICROPY_INCLUDED_ALIF_LWIP_ARCH_CC_H
+#define MICROPY_INCLUDED_ALIF_LWIP_ARCH_CC_H
+
+#include <assert.h>
+#define LWIP_PLATFORM_DIAG(x)
+#define LWIP_PLATFORM_ASSERT(x)  { assert(1); }
+
+#define LWIP_NO_CTYPE_H 1
+
+#endif // MICROPY_INCLUDED_ALIF_LWIP_ARCH_CC_H
diff --git a/ports/alif/lwip_inc/arch/sys_arch.h b/ports/alif/lwip_inc/arch/sys_arch.h
new file mode 100644
index 0000000000000..8b1a393741c96
--- /dev/null
+++ b/ports/alif/lwip_inc/arch/sys_arch.h
@@ -0,0 +1 @@
+// empty
diff --git a/ports/alif/lwip_inc/lwipopts.h b/ports/alif/lwip_inc/lwipopts.h
new file mode 100644
index 0000000000000..c0622225e10de
--- /dev/null
+++ b/ports/alif/lwip_inc/lwipopts.h
@@ -0,0 +1,60 @@
+#ifndef MICROPY_INCLUDED_ALIF_LWIP_LWIPOPTS_H
+#define MICROPY_INCLUDED_ALIF_LWIP_LWIPOPTS_H
+
+#include <stdint.h>
+
+// This protection is not needed, instead we execute all lwIP code at PendSV priority
+#define SYS_ARCH_DECL_PROTECT(lev) do { } while (0)
+#define SYS_ARCH_PROTECT(lev) do { } while (0)
+#define SYS_ARCH_UNPROTECT(lev) do { } while (0)
+
+#define NO_SYS                          1
+#define SYS_LIGHTWEIGHT_PROT            1
+#define MEM_ALIGNMENT                   4
+
+#define LWIP_CHKSUM_ALGORITHM           3
+#define LWIP_CHECKSUM_CTRL_PER_NETIF    1
+
+#define LWIP_ARP                        1
+#define LWIP_ETHERNET                   1
+#define LWIP_RAW                        1
+#define LWIP_NETCONN                    0
+#define LWIP_SOCKET                     0
+#define LWIP_STATS                      0
+#define LWIP_NETIF_HOSTNAME             1
+#define LWIP_NETIF_EXT_STATUS_CALLBACK  1
+
+#define LWIP_LOOPIF_MULTICAST           1
+#define LWIP_LOOPBACK_MAX_PBUFS         8
+
+#define LWIP_IPV6                       0
+#define LWIP_DHCP                       1
+#define LWIP_DHCP_CHECK_LINK_UP         1
+#define LWIP_DHCP_DOES_ACD_CHECK        0 // to speed DHCP up
+#define LWIP_DNS                        1
+#define LWIP_DNS_SUPPORT_MDNS_QUERIES   1
+#define LWIP_MDNS_RESPONDER             1
+#define LWIP_IGMP                       1
+
+#define LWIP_NUM_NETIF_CLIENT_DATA      LWIP_MDNS_RESPONDER
+#define MEMP_NUM_UDP_PCB                (4 + LWIP_MDNS_RESPONDER)
+#define MEMP_NUM_SYS_TIMEOUT            (LWIP_NUM_SYS_TIMEOUT_INTERNAL + LWIP_MDNS_RESPONDER)
+
+#define SO_REUSE                        1
+#define TCP_LISTEN_BACKLOG              1
+
+extern uint64_t se_services_rand64(void);
+#define LWIP_RAND() se_services_rand64()
+
+#define MEM_SIZE                        (16 * 1024)
+#define TCP_MSS                         (1460)
+#define TCP_OVERSIZE                    (TCP_MSS)
+#define TCP_WND                         (8 * TCP_MSS)
+#define TCP_SND_BUF                     (8 * TCP_MSS)
+#define TCP_SND_QUEUELEN                (2 * (TCP_SND_BUF / TCP_MSS))
+#define TCP_QUEUE_OOSEQ                 (1)
+#define MEMP_NUM_TCP_SEG                (2 * TCP_SND_QUEUELEN)
+
+typedef uint32_t sys_prot_t;
+
+#endif // MICROPY_INCLUDED_ALIF_LWIP_LWIPOPTS_H
diff --git a/ports/alif/machine_adc.c b/ports/alif/machine_adc.c
new file mode 100644
index 0000000000000..91eb95b5ba002
--- /dev/null
+++ b/ports/alif/machine_adc.c
@@ -0,0 +1,225 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+// This file is never compiled standalone, it's included directly from
+// extmod/machine_adc.c via MICROPY_PY_MACHINE_ADC_INCLUDEFILE.
+
+#include "py/mphal.h"
+
+#include "analog_config.h"
+#include "adc.h"
+#include "sys_ctrl_adc.h"
+
+#define ADC_CHANNEL_TEMP_SENSOR (6)
+#define ADC_CHANNEL_INT_VREF (7)
+
+static const uint8_t adc_instance_table[4] = {
+    ADC_INSTANCE_ADC12_0,
+    ADC_INSTANCE_ADC12_1,
+    ADC_INSTANCE_ADC12_2,
+    ADC_INSTANCE_ADC24_0,
+};
+
+static ADC_Type *const adc_regs_table[4] = {
+    (ADC_Type *)ADC120_BASE,
+    (ADC_Type *)ADC121_BASE,
+    (ADC_Type *)ADC122_BASE,
+    (ADC_Type *)ADC24_BASE,
+};
+
+static bool adc_inited[4];
+static conv_info_t adc_conv_info_table[4];
+
+static void adc_nvic_config(unsigned int irq) {
+    NVIC_ClearPendingIRQ(irq);
+    NVIC_SetPriority(irq, IRQ_PRI_ADC);
+    NVIC_EnableIRQ(irq);
+}
+
+static void adc_init(uint8_t adc_periph) {
+    if (adc_inited[adc_periph]) {
+        return;
+    }
+
+    ADC_Type *regs = adc_regs_table[adc_periph];
+    uint8_t adc_instance = adc_instance_table[adc_periph];
+    conv_info_t *conv_info = &adc_conv_info_table[adc_periph];
+
+    adc_set_clk_control(adc_instance, true);
+    enable_cmp_periph_clk();
+    analog_config_vbat_reg2();
+    analog_config_cmp_reg2();
+    adc_set_differential_ctrl(adc_instance, false);
+    adc_set_comparator_ctrl(adc_instance, true, 2);
+
+    if (adc_instance == ADC_INSTANCE_ADC24_0) {
+        enable_adc24();
+        set_adc24_output_rate(0);
+        set_adc24_bias(0);
+    } else {
+        adc_set_sample_width(regs, 32);
+    }
+
+    adc_set_clk_div(regs, 4);
+    adc_set_avg_sample(regs, 32);
+    adc_set_n_shift_bit(regs, 1, 1);
+    adc_set_single_ch_scan_mode(regs, conv_info);
+    adc_unmask_interrupt(regs);
+
+    adc_nvic_config(ADC120_DONE0_IRQ_IRQn);
+    adc_nvic_config(ADC120_DONE1_IRQ_IRQn);
+    adc_nvic_config(ADC121_DONE0_IRQ_IRQn);
+    adc_nvic_config(ADC121_DONE1_IRQ_IRQn);
+    adc_nvic_config(ADC122_DONE0_IRQ_IRQn);
+    adc_nvic_config(ADC122_DONE1_IRQ_IRQn);
+}
+
+static uint16_t adc_config_and_read_u16(unsigned int adc_periph, uint32_t channel) {
+    ADC_Type *adc_regs = adc_regs_table[adc_periph];
+    conv_info_t *conv_info = &adc_conv_info_table[adc_periph];
+
+    conv_info->status = ADC_CONV_STAT_NONE;
+    conv_info->mode = ADC_CONV_MODE_SINGLE_SHOT;
+
+    // Select channel and start conversion.
+    adc_init_channel_select(adc_regs, channel);
+    adc_set_single_ch_scan_mode(adc_regs, conv_info);
+    adc_enable_single_shot_conv(adc_regs);
+
+    // Wait for conversion to complete.
+    while (!(conv_info->status & ADC_CONV_STAT_COMPLETE)) {
+        __WFE();
+    }
+
+    return conv_info->sampled_value;
+}
+
+static void adc_done0_irq_handler_helper(unsigned int adc_periph) {
+    adc_done0_irq_handler(adc_regs_table[adc_periph], &adc_conv_info_table[adc_periph]);
+}
+
+static void adc_done1_irq_handler_helper(unsigned int adc_periph) {
+    adc_done1_irq_handler(adc_regs_table[adc_periph], &adc_conv_info_table[adc_periph]);
+}
+
+void ADC120_DONE0_IRQHandler(void) {
+    adc_done0_irq_handler_helper(0);
+    __SEV();
+}
+
+void ADC120_DONE1_IRQHandler(void) {
+    adc_done1_irq_handler_helper(0);
+    __SEV();
+}
+
+void ADC121_DONE0_IRQHandler(void) {
+    adc_done0_irq_handler_helper(1);
+    __SEV();
+}
+
+void ADC121_DONE1_IRQHandler(void) {
+    adc_done1_irq_handler_helper(1);
+    __SEV();
+}
+
+void ADC122_DONE0_IRQHandler(void) {
+    adc_done0_irq_handler_helper(2);
+    __SEV();
+}
+
+void ADC122_DONE1_IRQHandler(void) {
+    adc_done1_irq_handler_helper(2);
+    __SEV();
+}
+
+/******************************************************************************/
+// MicroPython bindings for machine.ADC
+
+#define MICROPY_PY_MACHINE_ADC_CLASS_CONSTANTS \
+    { MP_ROM_QSTR(MP_QSTR_CORE_TEMP), MP_ROM_INT(ADC_CHANNEL_TEMP_SENSOR) }, \
+    { MP_ROM_QSTR(MP_QSTR_CORE_VREF), MP_ROM_INT(ADC_CHANNEL_INT_VREF) }, \
+
+typedef struct _machine_adc_obj_t {
+    mp_obj_base_t base;
+    uint8_t adc_periph;
+    uint8_t adc_channel;
+} machine_adc_obj_t;
+
+static void mp_machine_adc_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
+    machine_adc_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    mp_printf(print, "<ADC12%u channel=%u>", self->adc_periph, self->adc_channel);
+}
+
+// ADC(id)
+static mp_obj_t mp_machine_adc_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) {
+    // Check number of arguments
+    mp_arg_check_num(n_args, n_kw, 1, 1, false);
+
+    mp_obj_t source = all_args[0];
+
+    uint8_t adc_periph;
+    uint8_t adc_channel;
+    const machine_pin_obj_t *pin = NULL;
+
+    if (mp_obj_is_int(source)) {
+        // Get and validate channel number.
+        adc_channel = mp_obj_get_int(source);
+        if (adc_channel < ADC_CHANNEL_TEMP_SENSOR) {
+            adc_periph = 0;
+        } else if (adc_channel == ADC_CHANNEL_TEMP_SENSOR || adc_channel == ADC_CHANNEL_INT_VREF) {
+            adc_periph = 2;
+        } else {
+            mp_raise_ValueError(MP_ERROR_TEXT("invalid channel"));
+        }
+    } else {
+        // Get GPIO and check it has ADC capabilities.
+        pin = mp_hal_get_pin_obj(source);
+        if (pin->adc12_periph <= 2 && pin->adc12_channel <= 5) {
+            // Select the ADC12 peripheral and channel.
+            adc_periph = pin->adc12_periph;
+            adc_channel = pin->adc12_channel;
+            // Configure the pad for analog input.
+            pinconf_set(pin->port, pin->pin, PINMUX_ALTERNATE_FUNCTION_7, PADCTRL_READ_ENABLE);
+        } else {
+            mp_raise_ValueError(MP_ERROR_TEXT("Pin doesn't have ADC capabilities"));
+        }
+    }
+
+    // Initialise the ADC peripheral.
+    adc_init(adc_periph);
+
+    // Create ADC object.
+    machine_adc_obj_t *o = mp_obj_malloc(machine_adc_obj_t, &machine_adc_type);
+    o->adc_periph = adc_periph;
+    o->adc_channel = adc_channel;
+
+    return MP_OBJ_FROM_PTR(o);
+}
+
+// read_u16()
+static mp_int_t mp_machine_adc_read_u16(machine_adc_obj_t *self) {
+    return adc_config_and_read_u16(self->adc_periph, self->adc_channel);
+}
diff --git a/ports/alif/machine_i2c.c b/ports/alif/machine_i2c.c
new file mode 100644
index 0000000000000..a710aeeb01132
--- /dev/null
+++ b/ports/alif/machine_i2c.c
@@ -0,0 +1,301 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024-2025 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "py/runtime.h"
+#include "py/mphal.h"
+#include "py/mperrno.h"
+#include "extmod/modmachine.h"
+
+#if MICROPY_HW_ENABLE_HW_I2C
+#include "i2c.h"
+
+#define I2C_DEFAULT_FREQ    (400000)
+#define I2C_DEFAULT_TIMEOUT (50000)
+
+#define I2C_DAT_INDEX       (0)
+#define I2C_TX_FIFO_LEN     (I2C_FIFO_DEPTH / 2)
+#define I2C_RX_FIFO_LEN     (I2C_FIFO_DEPTH / 2)
+
+#define I2C_SPEED(freq) \
+    ((freq) <= 100000 ? I2C_SPEED_STANDARD : \
+    ((freq) <= 400000 ? I2C_SPEED_FAST : \
+    I2C_SPEED_FASTPLUS))
+
+#define I2C_IC_CON_SPEED(freq) \
+    ((freq) <= 100000 ? I2C_IC_CON_SPEED_STANDARD : \
+    ((freq) <= 400000 ? I2C_IC_CON_SPEED_FAST : \
+    I2C_IC_CON_SPEED_HIGH))
+#define I2C_IC_CON_MASTER_TX_EMPTY_CTRL (1 << 8)
+
+#define I2C_IC_STATUS_RFNE  I2C_IC_STATUS_RECEIVE_FIFO_NOT_EMPTY
+#define I2C_IC_STATUS_TFNF  I2C_IC_STATUS_TRANSMIT_FIFO_NOT_FULL
+#define I2C_STAT_ERRORS     (I2C_IC_INTR_STAT_TX_ABRT | I2C_IC_INTR_STAT_TX_OVER | \
+    I2C_IC_INTR_STAT_RX_OVER | I2C_IC_INTR_STAT_RX_UNDER)
+
+#define debug_printf(...) // mp_printf(&mp_plat_print, "i2c.c: " __VA_ARGS__)
+#define I2C_CHECK_ERRORS(base) \
+    if (base->I2C_RAW_INTR_STAT & I2C_STAT_ERRORS) { \
+        uint32_t status = base->I2C_RAW_INTR_STAT; \
+        debug_printf("status: 0x%lx raw_int: 0x%lx abort: 0x%lx line: %d\n", \
+    base->I2C_STATUS, status, base->I2C_TX_ABRT_SOURCE, __LINE__); \
+        (void)status; \
+        (void)base->I2C_CLR_TX_ABRT; \
+        (void)base->I2C_CLR_ACTIVITY; \
+        return -MP_EIO; \
+    }
+
+typedef struct _machine_i2c_obj_t {
+    mp_obj_base_t base;
+    uint32_t i2c_id;
+    I2C_Type *i2c;
+    mp_hal_pin_obj_t scl;
+    mp_hal_pin_obj_t sda;
+    uint32_t freq;
+    uint32_t timeout;
+} machine_i2c_obj_t;
+
+static machine_i2c_obj_t machine_i2c_obj[] = {
+    #if defined(MICROPY_HW_I2C0_SCL)
+    [0] = {{&machine_i2c_type}, 0, (I2C_Type *)I2C0_BASE, MICROPY_HW_I2C0_SCL, MICROPY_HW_I2C0_SDA},
+    #endif
+    #if defined(MICROPY_HW_I2C1_SCL)
+    [1] = {{&machine_i2c_type}, 1, (I2C_Type *)I2C1_BASE, MICROPY_HW_I2C1_SCL, MICROPY_HW_I2C1_SDA},
+    #endif
+    #if defined(MICROPY_HW_I2C2_SCL)
+    [2] = {{&machine_i2c_type}, 2, (I2C_Type *)I2C2_BASE, MICROPY_HW_I2C2_SCL, MICROPY_HW_I2C2_SDA},
+    #endif
+    #if defined(MICROPY_HW_I2C3_SCL)
+    [3] = {{&machine_i2c_type}, 3, (I2C_Type *)I2C3_BASE, MICROPY_HW_I2C3_SCL, MICROPY_HW_I2C3_SDA},
+    #endif
+};
+
+static void machine_i2c_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
+    machine_i2c_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    mp_printf(print, "I2C(%u, freq=%u, scl=%q, sda=%q, timeout=%u)",
+        self->i2c_id, self->freq, self->scl->name, self->sda->name, self->timeout);
+}
+
+mp_obj_t machine_i2c_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) {
+    enum { ARG_id, ARG_freq, ARG_scl, ARG_sda, ARG_timeout };
+    static const mp_arg_t allowed_args[] = {
+        { MP_QSTR_id, MP_ARG_REQUIRED | MP_ARG_OBJ },
+        { MP_QSTR_freq, MP_ARG_INT, {.u_int = I2C_DEFAULT_FREQ} },
+        { MP_QSTR_scl, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE} },
+        { MP_QSTR_sda, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE} },
+        { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = I2C_DEFAULT_TIMEOUT} },
+    };
+
+    // Parse args.
+    mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
+    mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
+
+    // Get I2C bus.
+    int i2c_id = mp_obj_get_int(args[ARG_id].u_obj);
+    if (i2c_id < 0 || i2c_id >= MP_ARRAY_SIZE(machine_i2c_obj) || !machine_i2c_obj[i2c_id].i2c) {
+        mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("I2C(%d) doesn't exist"), i2c_id);
+    }
+
+    // Get static peripheral object.
+    machine_i2c_obj_t *self = &machine_i2c_obj[i2c_id];
+
+    // Set args
+    self->freq = args[ARG_freq].u_int;
+    self->timeout = args[ARG_timeout].u_int;
+
+    // here we would check the scl/sda pins and configure them, but it's not implemented
+    if (args[ARG_scl].u_obj != mp_const_none || args[ARG_sda].u_obj != mp_const_none) {
+        mp_raise_ValueError(MP_ERROR_TEXT("explicit choice of scl/sda is not implemented"));
+    }
+
+    // Disable I2C controller.
+    i2c_disable(self->i2c);
+
+    // Configure I2C pins.
+    mp_hal_pin_config(self->scl, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_UP,
+        MP_HAL_PIN_SPEED_LOW, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT(I2C_SCL, self->i2c_id), true);
+    mp_hal_pin_config(self->sda, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_UP,
+        MP_HAL_PIN_SPEED_LOW, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT(I2C_SDA, self->i2c_id), true);
+
+    // Initialize I2C controller.
+    self->i2c->I2C_CON = I2C_IC_CON_ENABLE_MASTER_MODE |
+        I2C_IC_CON_MASTER_RESTART_EN |
+        I2C_IC_CON_MASTER_TX_EMPTY_CTRL |
+        I2C_IC_CON_SPEED(self->freq);
+
+    // Configure FIFO threshold.
+    self->i2c->I2C_TX_TL = I2C_TX_FIFO_LEN;
+    self->i2c->I2C_RX_TL = I2C_RX_FIFO_LEN;
+
+    // Configure clock.
+    i2c_master_set_clock(self->i2c, GetSystemAPBClock() / 1000, I2C_SPEED(self->freq));
+
+    // Enable I2C controller.
+    i2c_clear_all_interrupt(self->i2c);
+    i2c_enable(self->i2c);
+
+    return MP_OBJ_FROM_PTR(self);
+}
+
+static int machine_i2c_poll_flags(I2C_Type *base, uint32_t flags, uint32_t timeout_us) {
+    mp_uint_t tick_start = mp_hal_ticks_us();
+    while (!(base->I2C_STATUS & flags)) {
+        I2C_CHECK_ERRORS(base);
+        if ((mp_hal_ticks_us() - tick_start) >= timeout_us) {
+            return -MP_ETIMEDOUT;
+        }
+        // Can't delay or handle pending events here otherwise we risk
+        // the FIFO getting empty, which will generate a STOP condition.
+    }
+    return 0;
+}
+
+static int machine_i2c_write(machine_i2c_obj_t *self, uint8_t *buf, size_t tx_size) {
+    mp_uint_t tick_start = mp_hal_ticks_us();
+    for (size_t tx_idx = 0; tx_idx < tx_size;) {
+        // Write data to FIFO
+        if (self->i2c->I2C_STATUS & I2C_IC_STATUS_TFNF) {
+            self->i2c->I2C_DATA_CMD = (uint16_t)buf[tx_idx++];
+            I2C_CHECK_ERRORS(self->i2c);
+            tick_start = mp_hal_ticks_us();
+        }
+
+        // Check for timeout
+        if ((mp_hal_ticks_us() - tick_start) >= self->timeout) {
+            return -MP_ETIMEDOUT;
+        }
+    }
+    return 0;
+}
+
+static int machine_i2c_read(machine_i2c_obj_t *self, uint8_t *buf, size_t rx_size) {
+    mp_uint_t tick_start = mp_hal_ticks_us();
+    for (size_t tx_idx = 0, rx_idx = 0; rx_idx < rx_size;) {
+        // Write command to FIFO
+        if (tx_idx < rx_size && (self->i2c->I2C_STATUS & I2C_IC_STATUS_TFNF)) {
+            self->i2c->I2C_DATA_CMD = I2C_IC_DATA_CMD_READ_REQ;
+            I2C_CHECK_ERRORS(self->i2c);
+            ++tx_idx;
+        }
+
+        // Read data from FIFO
+        while (rx_idx < rx_size && (self->i2c->I2C_STATUS & I2C_IC_STATUS_RFNE)) {
+            buf[rx_idx++] = self->i2c->I2C_DATA_CMD & 0xFF;
+            tick_start = mp_hal_ticks_us();
+        }
+
+        // Check for timeout
+        if ((mp_hal_ticks_us() - tick_start) >= self->timeout) {
+            return -MP_ETIMEDOUT;
+        }
+    }
+    return 0;
+}
+
+int machine_i2c_transfer(mp_obj_base_t *self_in, uint16_t addr, size_t n, mp_machine_i2c_buf_t *bufs, unsigned int flags) {
+    int ret = 0;
+    uint32_t bytes = 0;
+    machine_i2c_obj_t *self = (machine_i2c_obj_t *)self_in;
+
+    // The DesignWare I2C IP on AE3 is configured such that it auto-generates a STOP
+    // condition when the TX FIFO gets empty. In other words, the code can't have any
+    // control over STOP condition generation. The only fix for this would be to buffer
+    // complete read/write sequences and send them out when the STOP flag is set.
+    if (!(flags & MP_MACHINE_I2C_FLAG_STOP)) {
+        mp_raise_ValueError(MP_ERROR_TEXT("nostop flag is not supported"));
+    }
+
+    i2c_clear_all_interrupt(self->i2c);
+    i2c_set_target_addr(self->i2c, addr, I2C_7BIT_ADDRESS, 0);
+
+    // Workaround issue with hardware I2C not accepting zero-length writes.
+    if (!bufs->len) {
+        mp_machine_i2c_buf_t bufs = { 0 };
+
+        mp_machine_soft_i2c_obj_t soft_i2c = {
+            .base = { &mp_machine_soft_i2c_type },
+            .scl = self->scl,
+            .sda = self->sda,
+            .us_timeout = self->timeout,
+            .us_delay = 500000 / self->freq + 1,
+        };
+
+        // Switch pins to GPIO/OD.
+        mp_hal_pin_config(self->scl, MP_HAL_PIN_MODE_OPEN_DRAIN, MP_HAL_PIN_PULL_UP,
+            MP_HAL_PIN_SPEED_LOW, MP_HAL_PIN_DRIVE_8MA, 0, true);
+        mp_hal_pin_config(self->sda, MP_HAL_PIN_MODE_OPEN_DRAIN, MP_HAL_PIN_PULL_UP,
+            MP_HAL_PIN_SPEED_LOW, MP_HAL_PIN_DRIVE_8MA, 0, true);
+
+        // Perform the transfer.
+        ret = mp_machine_soft_i2c_transfer(&soft_i2c.base, addr, 1, &bufs, flags);
+
+        // Re-configure I2C pins.
+        mp_hal_pin_config(self->scl, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_UP,
+            MP_HAL_PIN_SPEED_LOW, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT(I2C_SCL, self->i2c_id), true);
+        mp_hal_pin_config(self->sda, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_UP,
+            MP_HAL_PIN_SPEED_LOW, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT(I2C_SDA, self->i2c_id), true);
+
+        return ret;
+    }
+
+    for (size_t i = 0; i < n; i++) {
+        mp_machine_i2c_buf_t *buf = &bufs[i];
+        if (i == 0 && (flags & MP_MACHINE_I2C_FLAG_WRITE1)) {
+            ret = machine_i2c_write(self, buf->buf, buf->len);
+        } else if (flags & MP_MACHINE_I2C_FLAG_READ) {
+            ret = machine_i2c_read(self, buf->buf, buf->len);
+        } else if (bufs->len != 0) {
+            ret = machine_i2c_write(self, buf->buf, buf->len);
+        }
+        if (ret < 0) {
+            return ret;
+        }
+        bytes += bufs->len;
+    }
+
+    // Wait for TX FIFO empty
+    ret = machine_i2c_poll_flags(self->i2c, I2C_IC_STATUS_TFE, self->timeout);
+    if (ret < 0) {
+        return ret;
+    }
+
+    return bytes;
+}
+
+static const mp_machine_i2c_p_t machine_i2c_p = {
+    .transfer_supports_write1 = true,
+    .transfer = machine_i2c_transfer,
+};
+
+MP_DEFINE_CONST_OBJ_TYPE(
+    machine_i2c_type,
+    MP_QSTR_I2C,
+    MP_TYPE_FLAG_NONE,
+    make_new, machine_i2c_make_new,
+    print, machine_i2c_print,
+    protocol, &machine_i2c_p,
+    locals_dict, &mp_machine_i2c_locals_dict
+    );
+#endif // MICROPY_HW_ENABLE_HW_I2C
diff --git a/ports/alif/machine_pin.c b/ports/alif/machine_pin.c
new file mode 100644
index 0000000000000..02c5e482adb89
--- /dev/null
+++ b/ports/alif/machine_pin.c
@@ -0,0 +1,298 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "py/runtime.h"
+#include "py/mphal.h"
+#include "extmod/modmachine.h"
+#include "extmod/virtpin.h"
+#include "shared/runtime/mpirq.h"
+
+extern const mp_obj_dict_t machine_pin_cpu_pins_locals_dict;
+extern const mp_obj_dict_t machine_pin_board_pins_locals_dict;
+
+static const machine_pin_obj_t *machine_pin_find_named(const mp_obj_dict_t *named_pins, mp_obj_t name) {
+    const mp_map_t *named_map = &named_pins->map;
+    mp_map_elem_t *named_elem = mp_map_lookup((mp_map_t *)named_map, name, MP_MAP_LOOKUP);
+    if (named_elem != NULL && named_elem->value != NULL) {
+        return MP_OBJ_TO_PTR(named_elem->value);
+    }
+    return NULL;
+}
+
+const machine_pin_obj_t *machine_pin_find(mp_obj_t pin) {
+    // Is already a object of the proper type
+    if (mp_obj_is_type(pin, &machine_pin_type)) {
+        return MP_OBJ_TO_PTR(pin);
+    }
+    if (mp_obj_is_str(pin)) {
+        // Try to find the pin in the board pins first.
+        const machine_pin_obj_t *self = machine_pin_find_named(&machine_pin_board_pins_locals_dict, pin);
+        if (self != NULL) {
+            return self;
+        }
+
+        // If not found, try to find the pin in the cpu pins.
+        self = machine_pin_find_named(&machine_pin_cpu_pins_locals_dict, pin);
+        if (self != NULL) {
+            return self;
+        }
+
+        // Pin name not found.
+        mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("unknown named pin \"%s\""), mp_obj_str_get_str(pin));
+    }
+    mp_raise_ValueError(MP_ERROR_TEXT("invalid pin"));
+}
+
+static void machine_pin_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
+    machine_pin_obj_t *self = self_in;
+
+    uint8_t alt_func, pad_ctrl;
+    pinconf_get(self->port, self->pin, &alt_func, &pad_ctrl);
+
+    qstr mode_qst;
+    if (gpio_get_direction(self->gpio, self->pin) == GPIO_PIN_DIR_INPUT) {
+        mode_qst = MP_QSTR_IN;
+    } else {
+        if (pad_ctrl & PADCTRL_DRIVER_OPEN_DRAIN) {
+            mode_qst = MP_QSTR_OPEN_DRAIN;
+        } else {
+            mode_qst = MP_QSTR_OUT;
+        }
+    }
+    mp_printf(print, "Pin(%q, mode=%q", self->name, mode_qst);
+    uint8_t pad_ctrl_pull = pad_ctrl & (PADCTRL_DRIVER_DISABLED_PULL_DOWN | PADCTRL_DRIVER_DISABLED_PULL_UP);
+    if (pad_ctrl_pull == PADCTRL_DRIVER_DISABLED_PULL_UP) {
+        mp_printf(print, ", pull=%q", MP_QSTR_PULL_UP);
+    } else if (pad_ctrl_pull == PADCTRL_DRIVER_DISABLED_PULL_DOWN) {
+        mp_printf(print, ", pull=%q", MP_QSTR_PULL_DOWN);
+    }
+    if (alt_func != PINMUX_ALTERNATE_FUNCTION_0) {
+        mp_printf(print, ", alt=%u", alt_func);
+    }
+    mp_printf(print, ")");
+}
+
+enum {
+    ARG_mode, ARG_pull, ARG_value, ARG_alt
+};
+static const mp_arg_t allowed_args[] = {
+    {MP_QSTR_mode,  MP_ARG_OBJ,                  {.u_rom_obj = MP_ROM_NONE}},
+    {MP_QSTR_pull,  MP_ARG_OBJ,                  {.u_rom_obj = MP_ROM_NONE}},
+    {MP_QSTR_value, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE}},
+    {MP_QSTR_alt,   MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0}},
+};
+
+static mp_obj_t machine_pin_obj_init_helper(const machine_pin_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
+
+    // parse args
+    mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
+    mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
+
+    // get initial value of pin (only valid for OUT and OPEN_DRAIN modes)
+    int value = -1;
+    if (args[ARG_value].u_obj != mp_const_none) {
+        value = mp_obj_is_true(args[ARG_value].u_obj);
+    }
+
+    // configure mode
+    if (args[ARG_mode].u_obj != mp_const_none) {
+        mp_int_t mode = mp_obj_get_int(args[ARG_mode].u_obj);
+        if (mode == MP_HAL_PIN_MODE_INPUT) {
+            mp_hal_pin_input(self);
+        } else if (mode == MP_HAL_PIN_MODE_OUTPUT) {
+            if (value != -1) {
+                // set initial output value before configuring mode
+                mp_hal_pin_write(self, value);
+            }
+            mp_hal_pin_output(self);
+        } else if (mode == MP_HAL_PIN_MODE_OPEN_DRAIN) {
+            if (value != -1) {
+                // set initial output value before configuring mode
+                mp_hal_pin_write(self, value);
+            }
+            mp_hal_pin_open_drain(self);
+        }
+    }
+
+    // Configure pull (unconditionally because None means no-pull).
+    uint32_t pull = 0;
+    if (args[ARG_pull].u_obj != mp_const_none) {
+        pull = mp_obj_get_int(args[ARG_pull].u_obj);
+    }
+    uint8_t alt_func;
+    uint8_t pad_ctrl;
+    pinconf_get(self->port, self->pin, &alt_func, &pad_ctrl);
+    alt_func = PINMUX_ALTERNATE_FUNCTION_0;
+    pad_ctrl |= PADCTRL_READ_ENABLE;
+    pad_ctrl &= ~(PADCTRL_DRIVER_DISABLED_PULL_DOWN | PADCTRL_DRIVER_DISABLED_PULL_UP);
+    if (pull & MP_HAL_PIN_PULL_UP) {
+        pad_ctrl |= PADCTRL_DRIVER_DISABLED_PULL_UP;
+    }
+    if (pull & MP_HAL_PIN_PULL_DOWN) {
+        pad_ctrl |= PADCTRL_DRIVER_DISABLED_PULL_DOWN;
+    }
+    pinconf_set(self->port, self->pin, alt_func, pad_ctrl);
+
+    return mp_const_none;
+}
+
+// constructor(id, ...)
+mp_obj_t mp_pin_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) {
+    mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true);
+
+    const machine_pin_obj_t *self = machine_pin_find(args[0]);
+
+    if (n_args > 1 || n_kw > 0) {
+        // pin mode given, so configure this GPIO
+        mp_map_t kw_args;
+        mp_map_init_fixed_table(&kw_args, n_kw, args + n_args);
+        machine_pin_obj_init_helper(self, n_args - 1, args + 1, &kw_args);
+    }
+    return MP_OBJ_FROM_PTR(self);
+}
+
+// fast method for getting/setting pin value
+static mp_obj_t machine_pin_call(mp_obj_t self_in, size_t n_args, size_t n_kw, const mp_obj_t *args) {
+    mp_arg_check_num(n_args, n_kw, 0, 1, false);
+    machine_pin_obj_t *self = self_in;
+    if (n_args == 0) {
+        // get pin
+        return MP_OBJ_NEW_SMALL_INT(mp_hal_pin_read(self));
+    } else {
+        // set pin
+        bool value = mp_obj_is_true(args[0]);
+        mp_hal_pin_write(self, value);
+        return mp_const_none;
+    }
+}
+
+// pin.init(mode, pull)
+static mp_obj_t machine_pin_obj_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) {
+    return machine_pin_obj_init_helper(args[0], n_args - 1, args + 1, kw_args);
+}
+MP_DEFINE_CONST_FUN_OBJ_KW(machine_pin_init_obj, 1, machine_pin_obj_init);
+
+// pin.value([value])
+static mp_obj_t machine_pin_value(size_t n_args, const mp_obj_t *args) {
+    return machine_pin_call(args[0], n_args - 1, 0, args + 1);
+}
+static MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_pin_value_obj, 1, 2, machine_pin_value);
+
+// pin.low()
+static mp_obj_t machine_pin_low(mp_obj_t self_in) {
+    machine_pin_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    mp_hal_pin_low(self);
+    return mp_const_none;
+}
+static MP_DEFINE_CONST_FUN_OBJ_1(machine_pin_low_obj, machine_pin_low);
+
+// pin.high()
+static mp_obj_t machine_pin_high(mp_obj_t self_in) {
+    machine_pin_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    mp_hal_pin_high(self);
+    return mp_const_none;
+}
+static MP_DEFINE_CONST_FUN_OBJ_1(machine_pin_high_obj, machine_pin_high);
+
+// pin.toggle()
+static mp_obj_t machine_pin_toggle(mp_obj_t self_in) {
+    machine_pin_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    gpio_toggle_value(self->gpio, self->pin);
+    return mp_const_none;
+}
+static MP_DEFINE_CONST_FUN_OBJ_1(machine_pin_toggle_obj, machine_pin_toggle);
+
+static MP_DEFINE_CONST_OBJ_TYPE(
+    pin_cpu_pins_obj_type,
+    MP_QSTR_cpu,
+    MP_TYPE_FLAG_NONE,
+    locals_dict, &machine_pin_cpu_pins_locals_dict
+    );
+
+static MP_DEFINE_CONST_OBJ_TYPE(
+    pin_board_pins_obj_type,
+    MP_QSTR_board,
+    MP_TYPE_FLAG_NONE,
+    locals_dict, &machine_pin_board_pins_locals_dict
+    );
+
+static const mp_rom_map_elem_t machine_pin_locals_dict_table[] = {
+    // instance methods
+    { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&machine_pin_init_obj) },
+    { MP_ROM_QSTR(MP_QSTR_value), MP_ROM_PTR(&machine_pin_value_obj) },
+    { MP_ROM_QSTR(MP_QSTR_low), MP_ROM_PTR(&machine_pin_low_obj) },
+    { MP_ROM_QSTR(MP_QSTR_high), MP_ROM_PTR(&machine_pin_high_obj) },
+    { MP_ROM_QSTR(MP_QSTR_off), MP_ROM_PTR(&machine_pin_low_obj) },
+    { MP_ROM_QSTR(MP_QSTR_on), MP_ROM_PTR(&machine_pin_high_obj) },
+    { MP_ROM_QSTR(MP_QSTR_toggle), MP_ROM_PTR(&machine_pin_toggle_obj) },
+
+    // class attributes
+    { MP_ROM_QSTR(MP_QSTR_board), MP_ROM_PTR(&pin_board_pins_obj_type) },
+    { MP_ROM_QSTR(MP_QSTR_cpu), MP_ROM_PTR(&pin_cpu_pins_obj_type) },
+
+    // class constants
+    { MP_ROM_QSTR(MP_QSTR_IN), MP_ROM_INT(MP_HAL_PIN_MODE_INPUT) },
+    { MP_ROM_QSTR(MP_QSTR_OUT), MP_ROM_INT(MP_HAL_PIN_MODE_OUTPUT) },
+    { MP_ROM_QSTR(MP_QSTR_OPEN_DRAIN), MP_ROM_INT(MP_HAL_PIN_MODE_OPEN_DRAIN) },
+    { MP_ROM_QSTR(MP_QSTR_PULL_UP), MP_ROM_INT(MP_HAL_PIN_PULL_UP) },
+    { MP_ROM_QSTR(MP_QSTR_PULL_DOWN), MP_ROM_INT(MP_HAL_PIN_PULL_DOWN) },
+};
+static MP_DEFINE_CONST_DICT(machine_pin_locals_dict, machine_pin_locals_dict_table);
+
+static mp_uint_t pin_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg, int *errcode) {
+    (void)errcode;
+    machine_pin_obj_t *self = self_in;
+
+    switch (request) {
+        case MP_PIN_READ: {
+            return mp_hal_pin_read(self);
+        }
+        case MP_PIN_WRITE: {
+            mp_hal_pin_write(self, arg);
+            return 0;
+        }
+    }
+    return -1;
+}
+
+static const mp_pin_p_t pin_pin_p = {
+    .ioctl = pin_ioctl,
+};
+
+MP_DEFINE_CONST_OBJ_TYPE(
+    machine_pin_type,
+    MP_QSTR_Pin,
+    MP_TYPE_FLAG_NONE,
+    make_new, mp_pin_make_new,
+    print, machine_pin_print,
+    call, machine_pin_call,
+    protocol, &pin_pin_p,
+    locals_dict, &machine_pin_locals_dict
+    );
+
+mp_hal_pin_obj_t mp_hal_get_pin_obj(mp_obj_t obj) {
+    return machine_pin_find(obj);
+}
diff --git a/ports/alif/machine_rtc.c b/ports/alif/machine_rtc.c
new file mode 100644
index 0000000000000..6473d1d80fbff
--- /dev/null
+++ b/ports/alif/machine_rtc.c
@@ -0,0 +1,109 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024-2025 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "py/runtime.h"
+#include "py/mphal.h"
+#include "py/mperrno.h"
+#include "extmod/modmachine.h"
+#include "rtc.h"
+#include "sys_ctrl_rtc.h"
+
+typedef struct _machine_rtc_obj_t {
+    mp_obj_base_t base;
+    LPRTC_Type *rtc;
+} machine_rtc_obj_t;
+
+// Singleton RTC object.
+static const machine_rtc_obj_t machine_rtc = {{&machine_rtc_type}, (LPRTC_Type *)LPRTC_BASE};
+
+void LPRTC_IRQHandler(void) {
+    lprtc_interrupt_ack(machine_rtc.rtc);
+    lprtc_interrupt_disable(machine_rtc.rtc);
+}
+
+static mp_obj_t machine_rtc_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) {
+    const machine_rtc_obj_t *self = &machine_rtc;
+
+    // Check arguments.
+    mp_arg_check_num(n_args, n_kw, 0, 0, false);
+
+    enable_lprtc_clk();
+    lprtc_prescaler_disable(self->rtc);
+    lprtc_counter_wrap_disable(self->rtc);
+    lprtc_interrupt_disable(self->rtc);
+    lprtc_interrupt_unmask(self->rtc);
+
+    NVIC_SetPriority(LPRTC_IRQ_IRQn, IRQ_PRI_RTC);
+    NVIC_ClearPendingIRQ(LPRTC_IRQ_IRQn);
+    NVIC_EnableIRQ(LPRTC_IRQ_IRQn);
+    return MP_OBJ_FROM_PTR(self);
+}
+
+static mp_obj_t machine_rtc_alarm(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
+    enum { ARG_id, ARG_time, ARG_repeat };
+
+    static const mp_arg_t allowed_args[] = {
+        { MP_QSTR_id, MP_ARG_INT, {.u_int = 0} },
+        { MP_QSTR_time, MP_ARG_OBJ, {.u_obj = mp_const_none} },
+        { MP_QSTR_repeat,  MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = false} },
+    };
+
+    machine_rtc_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]);
+
+    // Parse args.
+    mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
+    mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(args), allowed_args, args);
+
+    if (mp_obj_is_int(args[ARG_time].u_obj)) {
+        uint32_t seconds = mp_obj_get_int(args[1].u_obj) / 1000;
+
+        lprtc_counter_disable(self->rtc);
+        lprtc_load_count(self->rtc, 1);
+        lprtc_load_counter_match_register(self->rtc, seconds * 32768);
+
+        lprtc_interrupt_ack(self->rtc);
+        lprtc_interrupt_enable(self->rtc);
+        lprtc_counter_enable(self->rtc);
+    } else {
+        mp_raise_ValueError(MP_ERROR_TEXT("invalid argument(s)"));
+    }
+
+    return mp_const_none;
+}
+static MP_DEFINE_CONST_FUN_OBJ_KW(machine_rtc_alarm_obj, 1, machine_rtc_alarm);
+
+static const mp_rom_map_elem_t machine_rtc_locals_dict_table[] = {
+    { MP_ROM_QSTR(MP_QSTR_alarm), MP_ROM_PTR(&machine_rtc_alarm_obj) },
+};
+static MP_DEFINE_CONST_DICT(machine_rtc_locals_dict, machine_rtc_locals_dict_table);
+
+MP_DEFINE_CONST_OBJ_TYPE(
+    machine_rtc_type,
+    MP_QSTR_RTC,
+    MP_TYPE_FLAG_NONE,
+    make_new, machine_rtc_make_new,
+    locals_dict, &machine_rtc_locals_dict
+    );
diff --git a/ports/alif/machine_spi.c b/ports/alif/machine_spi.c
new file mode 100644
index 0000000000000..abb60bc4e8325
--- /dev/null
+++ b/ports/alif/machine_spi.c
@@ -0,0 +1,332 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024-2025 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "py/runtime.h"
+#include "py/mphal.h"
+#include "py/mperrno.h"
+#include "extmod/modmachine.h"
+
+#if MICROPY_PY_MACHINE_SPI
+#include "clk.h"
+#include "spi.h"
+#include "sys_ctrl_spi.h"
+
+typedef struct _machine_spi_obj_t {
+    mp_obj_base_t base;
+    uint8_t id;
+    SPI_Type *inst;
+    bool is_lp;
+} machine_spi_obj_t;
+
+static machine_spi_obj_t machine_spi_obj[] = {
+    #if defined(MICROPY_HW_SPI0_SCK)
+    [0] = {{&machine_spi_type}, 0, (SPI_Type *)SPI0_BASE, false},
+    #endif
+    #if defined(MICROPY_HW_SPI1_SCK)
+    [1] = {{&machine_spi_type}, 1, (SPI_Type *)SPI1_BASE, false},
+    #endif
+    #if defined(MICROPY_HW_SPI2_SCK)
+    [2] = {{&machine_spi_type}, 2, (SPI_Type *)SPI2_BASE, false},
+    #endif
+    #if defined(MICROPY_HW_SPI3_SCK)
+    [3] = {{&machine_spi_type}, 3, (SPI_Type *)SPI3_BASE, false},
+    #endif
+    #if defined(MICROPY_HW_LPSPI0_SCK)
+    [4] = {{&machine_spi_type}, 4, (SPI_Type *)LPSPI0_BASE, true},
+    #endif
+
+};
+
+static const uint8_t spi_pin_alt[] = {
+    MP_HAL_PIN_ALT_SPI_SCLK,
+    MP_HAL_PIN_ALT_SPI_MISO,
+    MP_HAL_PIN_ALT_SPI_MOSI,
+    MP_HAL_PIN_ALT_SPI_SS0,
+};
+
+static const uint8_t lpspi_pin_alt[] = {
+    MP_HAL_PIN_ALT_LPSPI_SCLK,
+    MP_HAL_PIN_ALT_LPSPI_MISO,
+    MP_HAL_PIN_ALT_LPSPI_MOSI,
+    MP_HAL_PIN_ALT_LPSPI_SS,
+};
+
+static inline uint32_t spi_get_clk(machine_spi_obj_t *spi) {
+    return spi->is_lp ? GetSystemCoreClock() : GetSystemAHBClock();
+}
+
+static void spi_init(machine_spi_obj_t *spi, uint32_t baudrate,
+    uint32_t polarity, uint32_t phase, uint32_t bits, uint32_t firstbit) {
+    const machine_pin_obj_t *pins[4] = { NULL, NULL, NULL, NULL };
+    switch (spi->id) {
+        #if defined(MICROPY_HW_SPI0_SCK)
+        case 0:
+            pins[0] = MICROPY_HW_SPI0_SCK;
+            pins[1] = MICROPY_HW_SPI0_MISO;
+            pins[2] = MICROPY_HW_SPI0_MOSI;
+            #if defined(MICROPY_HW_SPI0_NSS)
+            pins[3] = MICROPY_HW_SPI0_NSS;
+            #endif
+            break;
+        #endif
+        #if defined(MICROPY_HW_SPI1_SCK)
+        case 1:
+            pins[0] = MICROPY_HW_SPI1_SCK;
+            pins[1] = MICROPY_HW_SPI1_MISO;
+            pins[2] = MICROPY_HW_SPI1_MOSI;
+            #if defined(MICROPY_HW_SPI1_NSS)
+            pins[3] = MICROPY_HW_SPI1_NSS;
+            #endif
+            break;
+        #endif
+        #if defined(MICROPY_HW_SPI2_SCK)
+        case 2:
+            pins[0] = MICROPY_HW_SPI2_SCK;
+            pins[1] = MICROPY_HW_SPI2_MISO;
+            pins[2] = MICROPY_HW_SPI2_MOSI;
+            #if defined(MICROPY_HW_SPI2_NSS)
+            pins[3] = MICROPY_HW_SPI2_NSS;
+            #endif
+            break;
+        #endif
+        #if defined(MICROPY_HW_SPI3_SCK)
+        case 3:
+            pins[0] = MICROPY_HW_SPI3_SCK;
+            pins[1] = MICROPY_HW_SPI3_MISO;
+            pins[2] = MICROPY_HW_SPI3_MOSI;
+            #if defined(MICROPY_HW_SPI3_NSS)
+            pins[3] = MICROPY_HW_SPI3_NSS;
+            #endif
+            break;
+        #endif
+        #if defined(MICROPY_HW_LPSPI0_SCK)
+        case 4:  // LPSPI0
+            pins[0] = MICROPY_HW_LPSPI0_SCK;
+            pins[1] = MICROPY_HW_LPSPI0_MISO;
+            pins[2] = MICROPY_HW_LPSPI0_MOSI;
+            #if defined(MICROPY_HW_LPSPI0_NSS)
+            pins[3] = MICROPY_HW_LPSPI0_NSS;
+            #endif
+            break;
+        #endif
+        default:
+            return;
+    }
+
+    // Disable SPI.
+    spi_disable(spi->inst);
+
+    // Enable clocks.
+    if (spi->is_lp) {
+        enable_lpspi_clk();
+    }
+
+    // Configure SPI pins.
+    const uint8_t *alt;
+    if (spi->id <= 3) {
+        alt = spi_pin_alt;
+    } else {
+        alt = lpspi_pin_alt;
+    }
+    for (size_t i = 0; i < MP_ARRAY_SIZE(pins) && pins[i]; i++) {
+        mp_hal_pin_config(pins[i], MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE,
+            MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT_MAKE(alt[i], spi->id), true);
+    }
+
+    // Disable all interrupts.
+    spi_mask_interrupts(spi->inst);
+
+    // Configure baudrate clock
+    spi_set_bus_speed(spi->inst, baudrate, spi_get_clk(spi));
+
+    // Configure FIFOs
+    spi_set_tx_threshold(spi->inst, 0);
+    spi_set_rx_threshold(spi->inst, 0);
+    if (!spi->is_lp) {
+        spi_set_rx_sample_delay(spi->inst, 0);
+        spi_set_tx_fifo_start_level(spi->inst, 0);
+    }
+
+    // Configure SPI bus mode.
+    uint32_t spi_mode = (polarity << 1) | phase;
+    if (!spi->is_lp) {
+        spi_set_mode(spi->inst, spi_mode);
+    } else {
+        lpspi_set_mode(spi->inst, spi_mode);
+    }
+
+    // Configure SPI bus protocol.
+    uint32_t spi_proto = SPI_PROTO_SPI;
+    if (!spi->is_lp) {
+        spi_set_protocol(spi->inst, spi_proto);
+    } else {
+        lpspi_set_protocol(spi->inst, spi_proto);
+    }
+
+    // Configure SPI transfer mode.
+    if (!spi->is_lp) {
+        spi_mode_master(spi->inst);
+    }
+
+    // Configure frame size.
+    if (!spi->is_lp) {
+        spi_set_dfs(spi->inst, bits);
+    } else {
+        lpspi_set_dfs(spi->inst, bits);
+    }
+
+    // Configure slave select pin
+    spi_control_ss(spi->inst, 0, true);
+    if (!spi->is_lp) {
+        spi_set_sste(spi->inst, false);
+    } else {
+        lpspi_set_sste(spi->inst, false);
+    }
+
+    // Clear IRQs.
+    (void)spi->inst->SPI_ICR;
+
+    // Enable SPI.
+    spi_enable(spi->inst);
+}
+
+static void machine_spi_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
+    machine_spi_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    uint32_t baudrate = spi_get_bus_speed(self->inst, spi_get_clk(self));
+    mp_printf(print, "SPI(%u, baudrate=%u, lp=%u)", self->id, baudrate, self->is_lp);
+}
+
+mp_obj_t machine_spi_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) {
+    enum { ARG_id, ARG_baudrate, ARG_polarity, ARG_phase, ARG_bits, ARG_firstbit, ARG_sck, ARG_mosi, ARG_miso };
+    static const mp_arg_t allowed_args[] = {
+        { MP_QSTR_id,       MP_ARG_REQUIRED | MP_ARG_OBJ },
+        { MP_QSTR_baudrate, MP_ARG_INT, {.u_int = 500000} },
+        { MP_QSTR_polarity, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} },
+        { MP_QSTR_phase,    MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} },
+        { MP_QSTR_bits,     MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 8} },
+        { MP_QSTR_firstbit, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} },
+        { MP_QSTR_sck,      MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
+        { MP_QSTR_mosi,     MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
+        { MP_QSTR_miso,     MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
+    };
+
+    // Parse args.
+    mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
+    mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
+
+    // Get spi bus.
+    int spi_id = mp_obj_get_int(args[ARG_id].u_obj);
+    if (spi_id < 0 || spi_id >= MP_ARRAY_SIZE(machine_spi_obj) || !machine_spi_obj[spi_id].inst) {
+        mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("SPI(%d) doesn't exist"), spi_id);
+    }
+
+    // Get static peripheral object.
+    machine_spi_obj_t *self = &machine_spi_obj[spi_id];
+
+    // here we would check the sck/mosi/miso pins and configure them, but it's not implemented
+    if (args[ARG_sck].u_obj != MP_OBJ_NULL ||
+        args[ARG_mosi].u_obj != MP_OBJ_NULL ||
+        args[ARG_miso].u_obj != MP_OBJ_NULL) {
+        mp_raise_ValueError(MP_ERROR_TEXT("explicit choice of sck/mosi/miso is not implemented"));
+    }
+
+    // Initialize and configure SPI.
+    spi_init(self, args[ARG_baudrate].u_int, args[ARG_polarity].u_int,
+        args[ARG_phase].u_int, args[ARG_bits].u_int, args[ARG_firstbit].u_int);
+
+    return MP_OBJ_FROM_PTR(self);
+}
+
+static void machine_spi_init(mp_obj_base_t *self_in, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
+    enum { ARG_baudrate, ARG_polarity, ARG_phase, ARG_bits, ARG_firstbit };
+    static const mp_arg_t allowed_args[] = {
+        { MP_QSTR_baudrate, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
+        { MP_QSTR_polarity, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
+        { MP_QSTR_phase,    MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
+        { MP_QSTR_bits,     MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
+        { MP_QSTR_firstbit, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
+    };
+
+    // Parse the arguments.
+    machine_spi_obj_t *self = (machine_spi_obj_t *)self_in;
+    mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
+    mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
+
+    // Initialize and configure SPI.
+    spi_init(self, args[ARG_baudrate].u_int, args[ARG_polarity].u_int,
+        args[ARG_phase].u_int, args[ARG_bits].u_int, args[ARG_firstbit].u_int);
+}
+
+static void machine_spi_deinit(mp_obj_base_t *self_in) {
+    machine_spi_obj_t *self = (machine_spi_obj_t *)self_in;
+    // Disable all interrupts.
+    spi_mask_interrupts(self->inst);
+    // Disable SS pin.
+    spi_control_ss(self->inst, 0, 0);
+    // Disable SPI.
+    spi_disable(self->inst);
+    // Deinitialize GPIOs and clocks.
+    if (self->is_lp) {
+        disable_lpspi_clk();
+    }
+}
+
+static void machine_spi_transfer(mp_obj_base_t *self_in, size_t len, const uint8_t *src, uint8_t *dest) {
+    machine_spi_obj_t *self = (machine_spi_obj_t *)self_in;
+    spi_transfer_t spi_xfer = {
+        .tx_buff = src,
+        .tx_total_cnt = len,
+        .rx_buff = dest,
+        .rx_total_cnt = len,
+        .tx_default_val = 0xFF,
+        .tx_default_enable = true,
+        .mode = SPI_TMOD_TX_AND_RX,
+    };
+    // TODO redo transfer_blocking to timeout and poll events.
+    if (!self->is_lp) {
+        spi_transfer_blocking(self->inst, &spi_xfer);
+    } else {
+        lpspi_transfer_blocking(self->inst, &spi_xfer);
+    }
+}
+
+static const mp_machine_spi_p_t machine_spi_p = {
+    .init = machine_spi_init,
+    .deinit = machine_spi_deinit,
+    .transfer = machine_spi_transfer,
+};
+
+MP_DEFINE_CONST_OBJ_TYPE(
+    machine_spi_type,
+    MP_QSTR_SPI,
+    MP_TYPE_FLAG_NONE,
+    make_new, machine_spi_make_new,
+    print, machine_spi_print,
+    protocol, &machine_spi_p,
+    locals_dict, &mp_machine_spi_locals_dict
+    );
+
+#endif // MICROPY_PY_MACHINE_SPI
diff --git a/ports/alif/machine_uart.c b/ports/alif/machine_uart.c
new file mode 100644
index 0000000000000..746c86677f956
--- /dev/null
+++ b/ports/alif/machine_uart.c
@@ -0,0 +1,560 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2025 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+// This file is never compiled standalone, it's included directly from
+// extmod/machine_uart.c via MICROPY_PY_MACHINE_UART_INCLUDEFILE.
+
+#include "py/mphal.h"
+#include "py/mperrno.h"
+#include "mpuart.h"
+
+#define DEFAULT_UART_BAUDRATE (115200)
+#define DEFAULT_UART_BITS (8)
+#define DEFAULT_UART_PARITY (MP_ROM_NONE)
+#define DEFAULT_UART_STOP (1)
+#define DEFAULT_UART_RX_BUFFER_SIZE (256)
+
+typedef struct _machine_uart_obj_t {
+    mp_obj_base_t base;
+    unsigned int uart_id;
+    uint32_t baudrate;
+    UART_DATA_BITS bits;
+    UART_PARITY parity;
+    UART_STOP_BITS stop;
+    mp_hal_pin_obj_t tx;
+    mp_hal_pin_obj_t rx;
+    mp_hal_pin_obj_t rts;
+    mp_hal_pin_obj_t cts;
+    uint32_t flow;
+    uint16_t timeout;       // timeout waiting for first char (in ms)
+    uint16_t timeout_char;  // timeout waiting between chars (in ms)
+    uint8_t *rx_ringbuf_array;
+    ringbuf_t rx_ringbuf;
+    uint32_t irq_flags;
+    uint32_t irq_trigger;
+    mp_irq_obj_t irq_obj;
+} machine_uart_obj_t;
+
+typedef struct _machine_uart_default_pins_t {
+    mp_hal_pin_obj_t tx;
+    mp_hal_pin_obj_t rx;
+    mp_hal_pin_obj_t rts;
+    mp_hal_pin_obj_t cts;
+} machine_uart_default_pins_t;
+
+static const machine_uart_default_pins_t machine_uart_default_pins[UART_MAX] = {
+    [0] = {
+        #if defined(MICROPY_HW_UART0_TX) && defined(MICROPY_HW_UART0_RX)
+        MICROPY_HW_UART0_TX, MICROPY_HW_UART0_RX,
+        #else
+        NULL, NULL,
+        #endif
+        #if defined(MICROPY_HW_UART0_RTS) && defined(MICROPY_HW_UART0_CTS)
+        MICROPY_HW_UART0_RTS, MICROPY_HW_UART0_CTS,
+        #else
+        NULL, NULL,
+        #endif
+    },
+    [1] = {
+        #if defined(MICROPY_HW_UART1_TX) && defined(MICROPY_HW_UART1_RX)
+        MICROPY_HW_UART1_TX, MICROPY_HW_UART1_RX,
+        #else
+        NULL, NULL,
+        #endif
+        #if defined(MICROPY_HW_UART1_RTS) && defined(MICROPY_HW_UART1_CTS)
+        MICROPY_HW_UART1_RTS, MICROPY_HW_UART1_CTS,
+        #else
+        NULL, NULL,
+        #endif
+    },
+    [2] = {
+        #if defined(MICROPY_HW_UART2_TX) && defined(MICROPY_HW_UART2_RX)
+        MICROPY_HW_UART2_TX, MICROPY_HW_UART2_RX,
+        #else
+        NULL, NULL,
+        #endif
+        #if defined(MICROPY_HW_UART2_RTS) && defined(MICROPY_HW_UART2_CTS)
+        MICROPY_HW_UART2_RTS, MICROPY_HW_UART2_CTS,
+        #else
+        NULL, NULL,
+        #endif
+    },
+    [3] = {
+        #if defined(MICROPY_HW_UART3_TX) && defined(MICROPY_HW_UART3_RX)
+        MICROPY_HW_UART3_TX, MICROPY_HW_UART3_RX,
+        #else
+        NULL, NULL,
+        #endif
+        #if defined(MICROPY_HW_UART3_RTS) && defined(MICROPY_HW_UART3_CTS)
+        MICROPY_HW_UART3_RTS, MICROPY_HW_UART3_CTS,
+        #else
+        NULL, NULL,
+        #endif
+    },
+    [4] = {
+        #if defined(MICROPY_HW_UART4_TX) && defined(MICROPY_HW_UART4_RX)
+        MICROPY_HW_UART4_TX, MICROPY_HW_UART4_RX,
+        #else
+        NULL, NULL,
+        #endif
+        #if defined(MICROPY_HW_UART4_RTS) && defined(MICROPY_HW_UART4_CTS)
+        MICROPY_HW_UART4_RTS, MICROPY_HW_UART4_CTS,
+        #else
+        NULL, NULL,
+        #endif
+    },
+    [5] = {
+        #if defined(MICROPY_HW_UART5_TX) && defined(MICROPY_HW_UART5_RX)
+        MICROPY_HW_UART5_TX, MICROPY_HW_UART5_RX,
+        #else
+        NULL, NULL,
+        #endif
+        #if defined(MICROPY_HW_UART5_RTS) && defined(MICROPY_HW_UART5_CTS)
+        MICROPY_HW_UART5_RTS, MICROPY_HW_UART5_CTS,
+        #else
+        NULL, NULL,
+        #endif
+    },
+    [6] = {
+        #if defined(MICROPY_HW_UART6_TX) && defined(MICROPY_HW_UART6_RX)
+        MICROPY_HW_UART6_TX, MICROPY_HW_UART6_RX,
+        #else
+        NULL, NULL,
+        #endif
+        #if defined(MICROPY_HW_UART6_RTS) && defined(MICROPY_HW_UART6_CTS)
+        MICROPY_HW_UART6_RTS, MICROPY_HW_UART6_CTS,
+        #else
+        NULL, NULL,
+        #endif
+    },
+    [7] = {
+        #if defined(MICROPY_HW_UART7_TX) && defined(MICROPY_HW_UART7_RX)
+        MICROPY_HW_UART7_TX, MICROPY_HW_UART7_RX,
+        #else
+        NULL, NULL,
+        #endif
+        #if defined(MICROPY_HW_UART7_RTS) && defined(MICROPY_HW_UART7_CTS)
+        MICROPY_HW_UART7_RTS, MICROPY_HW_UART7_CTS,
+        #else
+        NULL, NULL,
+        #endif
+    },
+};
+
+static void machine_uart_irq_callback(unsigned int uart_id, unsigned int trigger);
+
+MP_REGISTER_ROOT_POINTER(struct _machine_uart_obj_t *machine_uart_obj_all[UART_MAX]);
+
+/******************************************************************************/
+// MicroPython bindings for UART
+
+#define MICROPY_PY_MACHINE_UART_CLASS_CONSTANTS \
+    { MP_ROM_QSTR(MP_QSTR___del__), MP_ROM_PTR(&machine_uart___del___obj) }, \
+    { MP_ROM_QSTR(MP_QSTR_RTS), MP_ROM_INT(UART_FLOW_CONTROL_RTS) }, \
+    { MP_ROM_QSTR(MP_QSTR_CTS), MP_ROM_INT(UART_FLOW_CONTROL_CTS) }, \
+    { MP_ROM_QSTR(MP_QSTR_IRQ_RX), MP_ROM_INT(MP_UART_IRQ_RX) }, \
+    { MP_ROM_QSTR(MP_QSTR_IRQ_RXIDLE), MP_ROM_INT(MP_UART_IRQ_RXIDLE) }, \
+    { MP_ROM_QSTR(MP_QSTR_IRQ_TXIDLE), MP_ROM_INT(MP_UART_IRQ_TXIDLE) }, \
+
+#define GET_PIN_WITH_DEFAULT(uart_id_, pin_name, pin_selection) \
+    (pin_selection == mp_const_none ? machine_uart_default_pins[uart_id_].pin_name : mp_hal_get_pin_obj(pin_selection))
+
+static void machine_uart_set_bits(machine_uart_obj_t *self, mp_int_t bits) {
+    if (!(5 <= bits && bits <= 8)) {
+        mp_raise_ValueError(MP_ERROR_TEXT("invalid bits"));
+    }
+    self->bits = UART_DATA_BITS_5 + (bits - 5);
+}
+
+static void machine_uart_set_parity(machine_uart_obj_t *self, mp_obj_t parity) {
+    if (parity == mp_const_none) {
+        self->parity = UART_PARITY_NONE;
+    } else if (mp_obj_get_int(parity) & 1) {
+        self->parity = UART_PARITY_ODD;
+    } else {
+        self->parity = UART_PARITY_EVEN;
+    }
+}
+
+static void machine_uart_set_stop(machine_uart_obj_t *self, mp_int_t stop) {
+    if (!(1 <= stop && stop <= 2)) {
+        mp_raise_ValueError(MP_ERROR_TEXT("invalid stop"));
+    }
+    self->stop = UART_STOP_BITS_1 + (stop - 1);
+}
+
+static void machine_uart_set_timeout_char(machine_uart_obj_t *self, mp_int_t timeout_char) {
+    // Make sure timeout_char is at least as long as a whole character (13 bits to be safe).
+    uint32_t min_timeout_char = 13000 / self->baudrate + 1;
+    self->timeout_char = MAX(min_timeout_char, timeout_char);
+}
+
+static void mp_machine_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
+    static const char *parity_name[] = {[UART_PARITY_NONE] = "None", [UART_PARITY_EVEN] = "0", [UART_PARITY_ODD] = "1"};
+
+    machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+
+    unsigned int bits = 5 + (self->bits - UART_DATA_BITS_5);
+    const char *parity = parity_name[self->parity];
+    unsigned int stop = 1 + (self->stop - UART_STOP_BITS_1);
+
+    mp_printf(print, "UART(%u, baudrate=%u, bits=%u, parity=%s, stop=%u, "
+        "tx=%q, rx=%q, ",
+        self->uart_id, self->baudrate, bits, parity, stop,
+        mp_hal_pin_name(self->tx), mp_hal_pin_name(self->rx));
+    if (self->rts != NULL) {
+        mp_printf(print, "rts=%q, ", mp_hal_pin_name(self->rts));
+    }
+    if (self->cts != NULL) {
+        mp_printf(print, "cts=%q, ", mp_hal_pin_name(self->cts));
+    }
+    mp_printf(print, "flow=", self->rts);
+    if (self->flow == 0) {
+        mp_printf(print, "0");
+    } else {
+        if (self->flow & UART_FLOW_CONTROL_RTS) {
+            mp_printf(print, "RTS");
+            if (self->flow & UART_FLOW_CONTROL_CTS) {
+                mp_printf(print, "|");
+            }
+        }
+        if (self->flow & UART_FLOW_CONTROL_CTS) {
+            mp_printf(print, "CTS");
+        }
+    }
+    mp_printf(print, ", timeout=%u, timeout_char=%u, rxbuf=%u)",
+        self->timeout, self->timeout_char, self->rx_ringbuf.size - 1);
+}
+
+static mp_obj_t mp_machine_uart_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) {
+    enum {
+        ARG_id,
+        ARG_baudrate, ARG_bits, ARG_parity, ARG_stop,
+        ARG_tx, ARG_rx, ARG_rts, ARG_cts,
+        ARG_flow, ARG_timeout, ARG_timeout_char, ARG_rxbuf,
+    };
+    static const mp_arg_t allowed_args[] = {
+        #if !defined(MICROPY_HW_DEFAULT_UART_ID)
+        { MP_QSTR_id, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = -1} },
+        #else
+        { MP_QSTR_id, MP_ARG_INT, {.u_int = MICROPY_HW_DEFAULT_UART_ID} },
+        #endif
+        { MP_QSTR_baudrate, MP_ARG_INT, {.u_int = DEFAULT_UART_BAUDRATE} },
+        { MP_QSTR_bits, MP_ARG_INT, {.u_int = DEFAULT_UART_BITS} },
+        { MP_QSTR_parity, MP_ARG_OBJ, {.u_rom_obj = DEFAULT_UART_PARITY} },
+        { MP_QSTR_stop, MP_ARG_INT, {.u_int = DEFAULT_UART_STOP} },
+        { MP_QSTR_tx, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE} },
+        { MP_QSTR_rx, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE} },
+        { MP_QSTR_rts, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE} },
+        { MP_QSTR_cts, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE} },
+        { MP_QSTR_flow, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} },
+        { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} },
+        { MP_QSTR_timeout_char, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} },
+        { MP_QSTR_rxbuf, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = DEFAULT_UART_RX_BUFFER_SIZE} },
+    };
+
+    // Parse args.
+    mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
+    mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
+
+    // Get UART bus.
+    int uart_id = args[ARG_id].u_int;
+    if (uart_id < 0 || uart_id >= UART_MAX) {
+        mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("UART(%d) doesn't exist"), uart_id);
+    }
+
+    machine_uart_obj_t *self;
+    bool need_init;
+    if (MP_STATE_PORT(machine_uart_obj_all)[uart_id] == NULL) {
+        // Create new UART object.
+        self = mp_obj_malloc_with_finaliser(machine_uart_obj_t, &machine_uart_type);
+        self->uart_id = uart_id;
+        need_init = true;
+    } else {
+        // Reference existing UART object.
+        self = MP_STATE_PORT(machine_uart_obj_all)[uart_id];
+        need_init = n_args > 1 || n_kw > 0;
+    }
+
+    if (need_init) {
+        // Set the UART parameters.
+        self->baudrate = args[ARG_baudrate].u_int;
+        machine_uart_set_bits(self, args[ARG_bits].u_int);
+        machine_uart_set_parity(self, args[ARG_parity].u_obj);
+        machine_uart_set_stop(self, args[ARG_stop].u_int);
+        self->tx = GET_PIN_WITH_DEFAULT(self->uart_id, tx, args[ARG_tx].u_obj);
+        self->rx = GET_PIN_WITH_DEFAULT(self->uart_id, rx, args[ARG_rx].u_obj);
+        self->rts = GET_PIN_WITH_DEFAULT(self->uart_id, rts, args[ARG_rts].u_obj);
+        self->cts = GET_PIN_WITH_DEFAULT(self->uart_id, cts, args[ARG_cts].u_obj);
+        self->flow = args[ARG_flow].u_int;
+        self->timeout = args[ARG_timeout].u_int;
+        uint32_t min_timeout_char = 13000 / self->baudrate + 1; // 13 bits to be safe
+        self->timeout = MAX(min_timeout_char, args[ARG_timeout_char].u_int);
+
+        // Check TX/RX pins are given.
+        if (self->tx == NULL) {
+            mp_raise_ValueError(MP_ERROR_TEXT("tx not given"));
+        }
+        if (self->rx == NULL) {
+            mp_raise_ValueError(MP_ERROR_TEXT("rx not given"));
+        }
+
+        // Configure flow control.
+        mp_hal_pin_obj_t rts = NULL;
+        mp_hal_pin_obj_t cts = NULL;
+        if (self->flow & UART_FLOW_CONTROL_RTS) {
+            if (self->rts == NULL) {
+                mp_raise_ValueError(MP_ERROR_TEXT("rts not given"));
+            }
+            rts = self->rts;
+        }
+        if (self->flow & UART_FLOW_CONTROL_CTS) {
+            if (self->cts == NULL) {
+                mp_raise_ValueError(MP_ERROR_TEXT("cts not given"));
+            }
+            cts = self->cts;
+        }
+
+        // Allocate the RX buffer.
+        size_t rxbuf_len = args[ARG_rxbuf].u_int;
+        self->rx_ringbuf_array = m_new(uint8_t, rxbuf_len + 1);
+        self->rx_ringbuf.buf = self->rx_ringbuf_array;
+        self->rx_ringbuf.size = rxbuf_len + 1;
+        self->rx_ringbuf.iput = 0;
+        self->rx_ringbuf.iget = 0;
+
+        // Reset the IRQ state
+        self->irq_flags = 0;
+        self->irq_trigger = 0;
+        self->irq_obj.base.type = NULL;
+
+        // Initialize the UART hardware.
+        mp_uart_init(self->uart_id, self->baudrate, self->bits, self->parity, self->stop, self->tx, self->rx, &self->rx_ringbuf);
+
+        mp_uart_set_flow(self->uart_id, rts, cts);
+    }
+
+    MP_STATE_PORT(machine_uart_obj_all)[uart_id] = self;
+
+    return MP_OBJ_FROM_PTR(self);
+}
+
+static void mp_machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
+    enum {
+        ARG_baudrate, ARG_bits, ARG_parity, ARG_stop,
+        ARG_timeout, ARG_timeout_char,
+    };
+    static const mp_arg_t allowed_args[] = {
+        { MP_QSTR_baudrate, MP_ARG_INT, {.u_int = -1} },
+        { MP_QSTR_bits, MP_ARG_INT, {.u_int = -1} },
+        { MP_QSTR_parity, MP_ARG_OBJ, {.u_rom_obj = MP_ROM_INT(-1)} },
+        { MP_QSTR_stop, MP_ARG_INT, {.u_int = -1} },
+        { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
+        { MP_QSTR_timeout_char, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
+    };
+
+    // Parse args.
+    mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
+    mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
+
+    bool change_baudrate = false;
+    bool change_bits_parity_stop = false;
+
+    // Change baudrate if requested.
+    if (args[ARG_baudrate].u_int > 0) {
+        self->baudrate = args[ARG_baudrate].u_int;
+        change_baudrate = true;
+    }
+
+    // Change data bits if requested.
+    if (args[ARG_bits].u_int > 0) {
+        machine_uart_set_bits(self, args[ARG_bits].u_int);
+        change_bits_parity_stop = true;
+    }
+
+    // Change parity if requested.
+    if (args[ARG_parity].u_obj != MP_OBJ_NEW_SMALL_INT(-1)) {
+        machine_uart_set_parity(self, args[ARG_parity].u_obj);
+        change_bits_parity_stop = true;
+    }
+
+    // Change stop bits if requested.
+    if (args[ARG_stop].u_int > 0) {
+        machine_uart_set_stop(self, args[ARG_stop].u_int);
+        change_bits_parity_stop = true;
+    }
+
+    // Change timeout if requested.
+    if (args[ARG_timeout].u_int >= 0) {
+        self->timeout = args[ARG_timeout].u_int;
+    }
+
+    // Change timeout_char if requested.
+    if (args[ARG_timeout_char].u_int >= 0) {
+        machine_uart_set_timeout_char(self, args[ARG_timeout_char].u_int);
+    }
+
+    // Reconfigure the hardware parameters that have changed.
+    if (change_baudrate) {
+        mp_uart_set_baudrate(self->uart_id, self->baudrate);
+    }
+    if (change_bits_parity_stop) {
+        mp_uart_set_bits_parity_stop(self->uart_id, self->bits, self->parity, self->stop);
+    }
+}
+
+static mp_obj_t machine_uart___del__(mp_obj_t self_in) {
+    machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    mp_uart_deinit(self->uart_id);
+    MP_STATE_PORT(machine_uart_obj_all)[self->uart_id] = NULL;
+    return mp_const_none;
+}
+static MP_DEFINE_CONST_FUN_OBJ_1(machine_uart___del___obj, machine_uart___del__);
+
+// Turn off the UART bus.
+static void mp_machine_uart_deinit(machine_uart_obj_t *self) {
+    mp_uart_deinit(self->uart_id);
+}
+
+// Return number of characters waiting.
+static mp_int_t mp_machine_uart_any(machine_uart_obj_t *self) {
+    return mp_uart_rx_any(self->uart_id);
+}
+
+// Since uart.write() waits up to the last byte, uart.txdone() always returns True.
+static bool mp_machine_uart_txdone(machine_uart_obj_t *self) {
+    return !!mp_uart_tx_any(self->uart_id);
+}
+
+// Change the trigger for the UART IRQ.
+static mp_uint_t machine_uart_irq_trigger(mp_obj_t self_in, mp_uint_t new_trigger) {
+    machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    self->irq_trigger = new_trigger;
+    mp_uart_set_irq_callback(self->uart_id, self->irq_trigger, machine_uart_irq_callback);
+    return 0;
+}
+
+// Get UART IRQ state.
+static mp_uint_t machine_uart_irq_info(mp_obj_t self_in, mp_uint_t info_type) {
+    machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    if (info_type == MP_IRQ_INFO_FLAGS) {
+        return self->irq_flags;
+    } else if (info_type == MP_IRQ_INFO_TRIGGERS) {
+        return self->irq_trigger;
+    }
+    return 0;
+}
+
+static const mp_irq_methods_t machine_uart_irq_methods = {
+    .trigger = machine_uart_irq_trigger,
+    .info = machine_uart_irq_info,
+};
+
+// Retrieve and configure the UART IRQ object.
+static mp_irq_obj_t *mp_machine_uart_irq(machine_uart_obj_t *self, bool any_args, mp_arg_val_t *args) {
+    if (self->irq_obj.base.type == NULL) {
+        mp_irq_init(&self->irq_obj, &machine_uart_irq_methods, MP_OBJ_FROM_PTR(self));
+    }
+
+    if (any_args) {
+        self->irq_obj.handler = args[MP_IRQ_ARG_INIT_handler].u_obj;
+        self->irq_obj.ishard = args[MP_IRQ_ARG_INIT_hard].u_bool;
+        machine_uart_irq_trigger(MP_OBJ_FROM_PTR(self), args[MP_IRQ_ARG_INIT_trigger].u_int);
+    }
+
+    return &self->irq_obj;
+}
+
+static mp_uint_t mp_machine_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, int *errcode) {
+    machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    mp_uint_t start = mp_hal_ticks_ms();
+    mp_uint_t timeout = self->timeout;
+    uint8_t *dest = buf_in;
+
+    for (size_t i = 0; i < size; i++) {
+        // Wait for the first/next character
+        while (!mp_uart_rx_any(self->uart_id)) {
+            mp_uint_t elapsed = mp_hal_ticks_ms() - start;
+            if (elapsed > timeout) {  // timed out
+                if (i <= 0) {
+                    *errcode = MP_EAGAIN;
+                    return MP_STREAM_ERROR;
+                } else {
+                    return i;
+                }
+            }
+            mp_event_handle_nowait();
+        }
+        *dest++ = mp_uart_rx_char(self->uart_id);
+        start = mp_hal_ticks_ms(); // Inter-character timeout
+        timeout = self->timeout_char;
+    }
+    return size;
+}
+
+static mp_uint_t mp_machine_uart_write(mp_obj_t self_in, const void *buf_in, mp_uint_t size, int *errcode) {
+    machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    mp_uart_tx_data(self->uart_id, buf_in, size);
+    return size;
+}
+
+static mp_uint_t mp_machine_uart_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg, int *errcode) {
+    machine_uart_obj_t *self = self_in;
+    mp_uint_t ret;
+    if (request == MP_STREAM_POLL) {
+        uintptr_t flags = arg;
+        ret = 0;
+        if ((flags & MP_STREAM_POLL_RD) && mp_uart_rx_any(self->uart_id)) {
+            ret |= MP_STREAM_POLL_RD;
+        }
+        if ((flags & MP_STREAM_POLL_WR)) {
+            ret |= MP_STREAM_POLL_WR;
+        }
+    } else if (request == MP_STREAM_FLUSH) {
+        uint32_t t0 = mp_hal_ticks_ms();
+        const uint32_t timeout_ms = 100 + 10 * mp_uart_tx_any(self->uart_id);
+        while (mp_uart_tx_any(self->uart_id)) {
+            if (mp_hal_ticks_ms() - t0 > timeout_ms) {
+                *errcode = MP_ETIMEDOUT;
+                ret = MP_STREAM_ERROR;
+            }
+            mp_event_handle_nowait();
+        }
+        return 0;
+    } else {
+        *errcode = MP_EINVAL;
+        ret = MP_STREAM_ERROR;
+    }
+    return ret;
+}
+
+static void machine_uart_irq_callback(unsigned int uart_id, unsigned int trigger) {
+    machine_uart_obj_t *self = MP_STATE_PORT(machine_uart_obj_all)[uart_id];
+    self->irq_flags = trigger;
+    if (self->irq_obj.base.type != NULL && (self->irq_flags & self->irq_trigger)) {
+        mp_irq_handler(&self->irq_obj);
+    }
+}
diff --git a/ports/alif/main.c b/ports/alif/main.c
new file mode 100644
index 0000000000000..47836113577e8
--- /dev/null
+++ b/ports/alif/main.c
@@ -0,0 +1,191 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "py/compile.h"
+#include "py/runtime.h"
+#include "py/gc.h"
+#include "py/mperrno.h"
+#include "py/mphal.h"
+#include "py/stackctrl.h"
+#include "extmod/modbluetooth.h"
+#include "extmod/modnetwork.h"
+#include "shared/readline/readline.h"
+#include "shared/runtime/gchelper.h"
+#include "shared/runtime/pyexec.h"
+#include "shared/runtime/softtimer.h"
+#include "shared/tinyusb/mp_usbd.h"
+#include "tusb.h"
+#include "mpbthciport.h"
+#include "mpuart.h"
+#include "ospi_flash.h"
+#include "pendsv.h"
+#include "se_services.h"
+#include "system_tick.h"
+
+#if MICROPY_PY_LWIP
+#include "lwip/init.h"
+#include "lwip/apps/mdns.h"
+#endif
+#if MICROPY_PY_NETWORK_CYW43
+#include "lib/cyw43-driver/src/cyw43.h"
+#endif
+
+extern uint8_t __StackTop, __StackLimit;
+extern uint8_t __GcHeapStart, __GcHeapEnd;
+
+MP_NORETURN void panic(const char *msg) {
+    mp_hal_stdout_tx_strn("\nFATAL ERROR:\n", 14);
+    mp_hal_stdout_tx_strn(msg, strlen(msg));
+    for (;;) {
+        *(volatile uint32_t *)0x4900C000 ^= 9;
+        for (volatile uint delay = 0; delay < 10000000; delay++) {
+        }
+    }
+}
+
+int main(void) {
+    system_tick_init();
+
+    MICROPY_BOARD_STARTUP();
+
+    pendsv_init();
+    se_services_init();
+
+    MICROPY_BOARD_EARLY_INIT();
+
+    #if MICROPY_HW_ENABLE_UART_REPL
+    mp_uart_init_repl();
+    #endif
+    #if MICROPY_HW_ENABLE_OSPI
+    if (ospi_flash_init() != 0) {
+        MICROPY_BOARD_FATAL_ERROR("ospi_init failed");
+    }
+    #endif
+    #if MICROPY_HW_ENABLE_USBDEV
+    NVIC_ClearPendingIRQ(USB_IRQ_IRQn);
+    NVIC_SetPriority(USB_IRQ_IRQn, IRQ_PRI_USB);
+    #endif
+
+    // Initialise stack extents and GC heap.
+    mp_stack_set_top(&__StackTop);
+    mp_stack_set_limit(&__StackTop - &__StackLimit - 1024);
+    gc_init(&__GcHeapStart, &__GcHeapEnd);
+
+    #if MICROPY_PY_LWIP
+    // lwIP doesn't allow to reinitialise itself by subsequent calls to this function
+    // because the system timeout list (next_timeout) is only ever reset by BSS clearing.
+    // So for now we only init the lwIP stack once on power-up.
+    lwip_init();
+    #if LWIP_MDNS_RESPONDER
+    mdns_resp_init();
+    #endif
+    mod_network_lwip_init();
+    #endif
+
+    #if MICROPY_PY_BLUETOOTH
+    mp_bluetooth_hci_init();
+    #endif
+
+    #if MICROPY_PY_NETWORK_CYW43
+    {
+        cyw43_init(&cyw43_state);
+        uint8_t buf[8];
+        memcpy(&buf[0], "ALIF", 4);
+        mp_hal_get_mac_ascii(MP_HAL_MAC_WLAN0, 8, 4, (char *)&buf[4]);
+        cyw43_wifi_ap_set_ssid(&cyw43_state, 8, buf);
+        cyw43_wifi_ap_set_auth(&cyw43_state, CYW43_AUTH_WPA2_AES_PSK);
+        cyw43_wifi_ap_set_password(&cyw43_state, 8, (const uint8_t *)"alif0123");
+    }
+    #endif
+
+    for (;;) {
+        // Initialise MicroPython runtime.
+        mp_init();
+
+        // Initialise sub-systems.
+        readline_init0();
+
+        // Execute _boot.py to set up the filesystem.
+        pyexec_frozen_module("_boot.py", false);
+
+        // Execute user scripts.
+        int ret = pyexec_file_if_exists("boot.py");
+        #if MICROPY_HW_ENABLE_USBDEV
+        mp_usbd_init();
+        #endif
+        if (ret & PYEXEC_FORCED_EXIT) {
+            goto soft_reset_exit;
+        }
+        if (pyexec_mode_kind == PYEXEC_MODE_FRIENDLY_REPL && ret != 0) {
+            ret = pyexec_file_if_exists("main.py");
+            if (ret & PYEXEC_FORCED_EXIT) {
+                goto soft_reset_exit;
+            }
+        }
+
+        for (;;) {
+            if (pyexec_mode_kind == PYEXEC_MODE_RAW_REPL) {
+                if (pyexec_raw_repl() != 0) {
+                    break;
+                }
+            } else {
+                if (pyexec_friendly_repl() != 0) {
+                    break;
+                }
+            }
+        }
+
+    soft_reset_exit:
+        mp_printf(MP_PYTHON_PRINTER, "MPY: soft reboot\n");
+        #if MICROPY_PY_BLUETOOTH
+        mp_bluetooth_deinit();
+        #endif
+        soft_timer_deinit();
+        gc_sweep_all();
+        mp_deinit();
+    }
+}
+
+void gc_collect(void) {
+    gc_collect_start();
+    gc_helper_collect_regs_and_stack();
+    gc_collect_end();
+}
+
+void nlr_jump_fail(void *val) {
+    mp_printf(&mp_plat_print, "FATAL: uncaught exception %p\n", val);
+    mp_obj_print_exception(&mp_plat_print, MP_OBJ_FROM_PTR(val));
+    for (;;) {
+        __WFE();
+    }
+}
+
+#ifndef NDEBUG
+void MP_WEAK __assert_func(const char *file, int line, const char *func, const char *expr) {
+    printf("Assertion '%s' failed, at file %s:%d\n", expr, file, line);
+    panic("Assertion failed");
+}
+#endif
diff --git a/ports/alif/mbedtls/mbedtls_config_port.h b/ports/alif/mbedtls/mbedtls_config_port.h
new file mode 100644
index 0000000000000..d9566304d28b9
--- /dev/null
+++ b/ports/alif/mbedtls/mbedtls_config_port.h
@@ -0,0 +1,41 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024-2025 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#ifndef MICROPY_INCLUDED_MBEDTLS_CONFIG_H
+#define MICROPY_INCLUDED_MBEDTLS_CONFIG_H
+
+// Time hook.
+#include <time.h>
+extern time_t alif_mbedtls_time(time_t *timer);
+#define MBEDTLS_PLATFORM_TIME_MACRO alif_mbedtls_time
+#define MBEDTLS_PLATFORM_MS_TIME_ALT undefined_and_unused
+
+// Set MicroPython-specific options.
+#define MICROPY_MBEDTLS_CONFIG_BARE_METAL (1)
+
+// Include common mbedtls configuration.
+#include "extmod/mbedtls/mbedtls_config_common.h"
+
+#endif /* MICROPY_INCLUDED_MBEDTLS_CONFIG_H */
diff --git a/ports/alif/mbedtls/mbedtls_port.c b/ports/alif/mbedtls/mbedtls_port.c
new file mode 100644
index 0000000000000..a8c155e31ae65
--- /dev/null
+++ b/ports/alif/mbedtls/mbedtls_port.c
@@ -0,0 +1,65 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024-2025 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "py/obj.h"
+#include "se_services.h"
+#include "mbedtls_config_port.h"
+
+#if defined(MBEDTLS_HAVE_TIME)
+#include "shared/timeutils/timeutils.h"
+#include "mbedtls/platform_time.h"
+#endif
+
+int mbedtls_hardware_poll(void *data, unsigned char *output, size_t len, size_t *olen) {
+    uint32_t val = 0;
+    int n = 0;
+    *olen = len;
+    while (len--) {
+        if (!n) {
+            val = se_services_rand64();
+            n = 4;
+        }
+        *output++ = val;
+        val >>= 8;
+        --n;
+    }
+    return 0;
+}
+
+#if defined(MBEDTLS_HAVE_TIME)
+
+time_t alif_mbedtls_time(time_t *timer) {
+    // TODO implement proper RTC time
+    unsigned int year = 2025;
+    unsigned int month = 1;
+    unsigned int date = 1;
+    unsigned int hours = 12;
+    unsigned int minutes = 0;
+    unsigned int seconds = 0;
+    return timeutils_seconds_since_epoch(year, month, date, hours, minutes, seconds);
+}
+
+#endif
diff --git a/ports/alif/mcu/alif_cfg.json.in b/ports/alif/mcu/alif_cfg.json.in
new file mode 100644
index 0000000000000..7760bd91d2e43
--- /dev/null
+++ b/ports/alif/mcu/alif_cfg.json.in
@@ -0,0 +1,47 @@
+{
+  "DEVICE": {
+    "disabled" : false,
+    "binary": TOC_CFG_FILE,
+    "version" : "0.5.00",
+    "signed": false
+  },
+  "HP_BOOT": {
+    #if TOC_CORE_M55_HP_BOOT
+    "disabled" : false,
+    #else
+    "disabled" : true,
+    #endif
+    "binary": "bootloader.bin",
+    "mramAddress": "0x80000000",
+    "version": "1.0.0",
+    "cpu_id": "M55_HP",
+    "flags": ["boot"],
+    "signed": false
+  },
+  "HP_APP": {
+    #if TOC_CORE_M55_HP_APP
+    "disabled" : false,
+    #else
+    "disabled" : true,
+    #endif
+    "binary": "M55_HP/firmware.bin",
+    "mramAddress": "0x80020000",
+    "version": "1.0.0",
+    "cpu_id": "M55_HP",
+    "flags": ["boot"],
+    "signed": false
+  },
+  "HE_APP": {
+    #if TOC_CORE_M55_HE_APP
+    "disabled" : false,
+    #else
+    "disabled" : true,
+    #endif
+    "binary": "M55_HE/firmware.bin",
+    "mramAddress": "0x80320000",
+    "version": "1.0.0",
+    "cpu_id": "M55_HE",
+    "flags": ["deferred"],
+    "signed": false
+  }
+}
diff --git a/ports/alif/mcu/ensemble.ld.S b/ports/alif/mcu/ensemble.ld.S
new file mode 100644
index 0000000000000..aeefdb7eacb78
--- /dev/null
+++ b/ports/alif/mcu/ensemble.ld.S
@@ -0,0 +1,192 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2023 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifdef CORE_M55_HP
+__DTCM_SIZE = 1024K;
+#else
+__DTCM_SIZE = 256K;
+#endif
+
+// Entry Point
+ENTRY(Reset_Handler)
+
+MEMORY
+{
+  MRAM_BL (rx) : ORIGIN = 0x80000000, LENGTH = 128K
+  MRAM_HP (rx) : ORIGIN = 0x80020000, LENGTH = 3072K
+  MRAM_HE (rx) : ORIGIN = 0x80320000, LENGTH = 1400K
+  MRAM_FS (rx) : ORIGIN = 0x8047e000, LENGTH = 1024K
+  MRAM_TOC (rx): ORIGIN = 0x8057e000, LENGTH = 8K
+  ITCM  (rwx)  : ORIGIN = 0x00000000, LENGTH = 256K
+  DTCM  (rwx)  : ORIGIN = 0x20000000, LENGTH = __DTCM_SIZE
+  SRAM0 (rwx)  : ORIGIN = 0x02000000, LENGTH = 4096K
+  SRAM1 (rwx)  : ORIGIN = 0x08000000, LENGTH = 2560K
+  SRAM6_A (rw) : ORIGIN = 0x62000000, LENGTH = 1024K
+  SRAM6_B (rw) : ORIGIN = 0x62400000, LENGTH = 1024K
+  SRAM7 (rw)   : ORIGIN = 0x63000000, LENGTH = 512K
+  SRAM8 (rw)   : ORIGIN = 0x63200000, LENGTH = 2048K
+  SRAM9_A (rw) : ORIGIN = 0x60000000, LENGTH = 256K
+  SRAM9_B (rw) : ORIGIN = 0x60040000, LENGTH = 512K
+}
+
+#ifdef CORE_M55_HP
+REGION_ALIAS("ROM", MRAM_HP);
+__MP_HEAP_SIZE = 256K;
+#else
+REGION_ALIAS("ROM", MRAM_HE);
+__MP_HEAP_SIZE = 128K;
+#endif
+
+__STACK_SIZE = 16K;
+__HEAP_SIZE  = 16K;
+
+SECTIONS
+{
+  .text : ALIGN(16)
+  {
+    KEEP(*(.vectors))
+    . = ALIGN(4);
+    *(.text*)
+    . = ALIGN(4);
+    *(.rodata*)
+    . = ALIGN(16);
+  } > ROM
+
+  .copy.table : ALIGN(4)
+  {
+    __copy_table_start__ = .;
+    LONG ( LOADADDR(.data) )
+    LONG ( ADDR(.data) )
+    LONG ( SIZEOF(.data)/4 )
+    __copy_table_end__ = .;
+    . = ALIGN(16);
+  } > ROM
+
+  .zero.table : ALIGN(4)
+  {
+    __zero_table_start__ = .;
+    LONG (ADDR(.bss))
+    LONG (SIZEOF(.bss)/4)
+    LONG (ADDR(.bss.sram0))
+    LONG (SIZEOF(.bss.sram0)/4)
+    __zero_table_end__ = .;
+    . = ALIGN(16);
+  } > ROM
+
+  .data : ALIGN(8)
+  {
+    *(.data)
+    . = ALIGN(8);
+    *(.data.*)
+    . = ALIGN(16);
+  } > DTCM AT > ROM
+
+  /* Peripherals in expansion master 0 (USB, Ethernet, SD/MMC)
+     are by default configured as non-secure, so they don't
+     have access to DTCMs. This can be fixed in the ToC by allowing
+     access to DTCMs to all bus masters, for now these peripherals
+     should place buffers in regular SRAM */
+  .bss.sram0 (NOLOAD) : ALIGN(4)
+  {
+    * (.bss.sram0*)
+  } > SRAM0
+
+  /* Open-AMP Shared Memory Region */
+  .openamp_memory (NOLOAD) : ALIGN(32)
+  {
+      _openamp_shm_region_start = .;
+      . = . + 64K;
+      _openamp_shm_region_end = .;
+  } >SRAM6_A
+
+  .bss : ALIGN(4)
+  {
+    __bss_start__ = .;
+    *(.bss)
+    . = ALIGN(4);
+    *(.bss.*)
+    . = ALIGN(4);
+    *(COMMON)
+    . = ALIGN(4);
+    __bss_end__ = .;
+  } > DTCM
+
+  .heap (NOLOAD) : ALIGN(4)
+  {
+    __end__ = .;
+    PROVIDE(end = .);
+    . = . + __HEAP_SIZE;
+    . = ALIGN(4);
+    __HeapLimit = .;
+
+    /* MicroPython GC heap */
+    . = ALIGN(16);
+    __GcHeapStart = .;
+    . = . + __MP_HEAP_SIZE;
+    __GcHeapEnd = .;
+  } > DTCM
+
+  .stack (NOLOAD) : ALIGN(4)
+  {
+    __StackLimit = .;
+    . = . + __STACK_SIZE;
+    . = ALIGN(4);
+    __StackTop = .;
+  } > DTCM
+  PROVIDE(__stack = __StackTop);
+
+  .init_fini_arrays : ALIGN(16)
+  {
+    KEEP(*(.init))
+    KEEP(*(.fini))
+
+    . = ALIGN(4);
+    /* preinit data */
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP(*(.preinit_array))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+
+    . = ALIGN(4);
+    /* init data */
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP(*(SORT(.init_array.*)))
+    KEEP(*(.init_array))
+    PROVIDE_HIDDEN (__init_array_end = .);
+
+    . = ALIGN(4);
+    /* finit data */
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP(*(SORT(.fini_array.*)))
+    KEEP(*(.fini_array))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+
+    KEEP(*(.eh_frame*))
+    . = ALIGN(16);
+  } > ROM
+
+  /* Check if data + heap + stack exceeds RAM limit */
+  ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
+}
diff --git a/ports/alif/mcu/ensemble_pin_alt.csv b/ports/alif/mcu/ensemble_pin_alt.csv
new file mode 100644
index 0000000000000..34f13e86f6d3c
--- /dev/null
+++ b/ports/alif/mcu/ensemble_pin_alt.csv
@@ -0,0 +1,130 @@
+Pin,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7
+P0_0,GPIO,OSPI0_D0,UART0_RX,I3C_SDA,UT0_T0,LPCAM_HSYNC,CAM_HSYNC,ANA_S0
+P0_1,GPIO,OSPI0_D1,UART0_TX,I3C_SCL,UT0_T1,LPCAM_VSYNC,CAM_VSYNC,ANA_S1
+P0_2,GPIO,OSPI0_D2,UART0_CTS,I2C0_SDA,UT1_T0,LPCAM_PCLK,CAM_PCLK,ANA_S2
+P0_3,GPIO,OSPI0_D3,UART0_RTS,I2C0_SCL,UT1_T1,LPCAM_XVCLK,CAM_XVCLK,ANA_S3
+P0_4,GPIO,OSPI0_D4,UART1_RX,PDM_D0,I2C1_SDA,UT2_T0,,ANA_S4
+P0_5,GPIO,OSPI0_D5,UART1_TX,PDM_C0,I2C1_SCL,UT2_T1,,ANA_S5
+P0_6,GPIO,OSPI0_D6,UART1_CTS,PDM_D1,I2C2_SCL,UT3_T0,,ANA_S6
+P0_7,GPIO,OSPI0_D7,UART1_RTS,PDM_C1,I2C2_SDA,UT3_T1,CDC_DE,ANA_S7
+P1_0,GPIO,UART2_RX,SPI0_MISO,I2C3_SDA,UT4_T0,LPCAM_HSYNC,ETH_RXD0,ANA_S8
+P1_1,GPIO,UART2_TX,SPI0_MOSI,I2C3_SCL,UT4_T1,LPCAM_VSYNC,ETH_RXD1,ANA_S9
+P1_2,GPIO,UART3_RX,SPI0_SCLK,I3C_SDA,UT5_T0,LPCAM_PCLK,ETH_RST,ANA_S10
+P1_3,GPIO,UART3_TX,SPI0_SS0,I3C_SCL,UT5_T1,LPCAM_XVCLK,ETH_TXD0,ANA_S11
+P1_4,GPIO,OSPI0_SS0,UART0_RX,SPI0_SS1,UT6_T0,LPCAM_D0,ETH_TXD1,ANA_S12
+P1_5,GPIO,OSPI0_SS1,UART0_TX,SPI0_SS2,UT6_T1,LPCAM_D1,ETH_TXEN,ANA_S13
+P1_6,GPIO,OSPI0_RXDS,UART1_RX,I2S0_SDI,UT7_T0,LPCAM_D2,ETH_IRQ,ANA_S14
+P1_7,GPIO,OSPI0_SCLK,UART1_TX,I2S0_SDO,UT7_T1,LPCAM_D3,ETH_REFCLK,ANA_S15
+P2_0,GPIO,OSPI0_D0,UART2_RX,LPPDM_D0,UT8_T0,LPCAM_D4,ETH_MDIO,ANA_S16
+P2_1,GPIO,OSPI0_D1,UART2_TX,LPPDM_C0,UT8_T1,LPCAM_D5,ETH_MDC,ANA_S17
+P2_2,GPIO,OSPI0_D2,UART3_RX,LPPDM_D1,UT9_T0,LPCAM_D6,ETH_CRS_DV_C,ANA_S18
+P2_3,GPIO,OSPI0_D3,UART3_TX,LPPDM_C1,UT9_T1,LPCAM_D7,CDC_PCLK,ANA_S19
+P2_4,GPIO,OSPI0_D4,LPI2S_SDI,SPI1_MISO,UT10_T0,LPCAM_D0,CAM_D0,ANA_S20
+P2_5,GPIO,OSPI0_D5,LPI2S_SDO,SPI1_MOSI,UT10_T1,LPCAM_D1,CAM_D1,ANA_S21
+P2_6,GPIO,OSPI0_D6,LPI2S_SCLK,SPI1_SCLK,UT11_T0,LPCAM_D2,CAM_D2,ANA_S22
+P2_7,GPIO,OSPI0_D7,LPI2S_WS,SPI1_SS0,UT11_T1,LPCAM_D3,CAM_D3,ANA_S23
+P3_0,GPIO,OSPI0_SCLK,UART4_RX,PDM_D0,I2S0_SCLK,QEC0_X,LPCAM_D4,CAM_D4
+P3_1,GPIO,OSPI0_SCLKN,UART4_TX,PDM_C0,I2S0_WS,QEC0_Y,LPCAM_D5,CAM_D5
+P3_2,GPIO,OSPI0_SS0,PDM_D1,I2S1_SDI,I3C_SDA,QEC0_Z,LPCAM_D6,CAM_D6
+P3_3,GPIO,OSPI0_SS1,PDM_C1,I2S1_SDO,I3C_SCL,QEC1_X,LPCAM_D7,CAM_D7
+P3_4,GPIO,OSPI0_RXDS,UART5_RX,LPPDM_C0,I2S1_SCLK,I2C0_SCL,QEC1_Y,CAM_D8
+P3_5,GPIO,OSPI0_SCLKN,UART5_TX,LPPDM_D0,SPI0_SS1,I2C0_SDA,QEC1_Z,CAM_D9
+P3_6,GPIO,HFXO_OUT,LPUART_CTS,LPPDM_C1,SPI0_SS2,I2C1_SDA,QEC2_X,CAM_D10
+P3_7,GPIO,JTAG_TRACECLK,LPUART_RTS,LPPDM_D1,SPI1_SS1,I2C1_SCL,QEC2_Y,CAM_D11
+P4_0,GPIO,JTAG_TDATA0,,I2S1_WS,SPI1_SS2,QEC2_Z,CDC_VSYNC,CAM_D12
+P4_1,GPIO,JTAG_TDATA1,I2S0_SDI,SPI1_SS3,QEC3_X,SD_CLK,CDC_HSYNC,CAM_D13
+P4_2,GPIO,JTAG_TDATA2,,I2S0_SDO,SPI2_MISO,QEC3_Y,SD_CMD,CAM_D14
+P4_3,GPIO,JTAG_TDATA3,,I2S0_SCLK,SPI2_MOSI,QEC3_Z,SD_RST,CAM_D15
+P4_4,GPIO,JTAG_TCK,I2S0_WS,SPI2_SCLK,FAULT0_A,,,
+P4_5,GPIO,JTAG_TMS,SPI2_SS0,FAULT1_A,,,,
+P4_6,GPIO,JTAG_TDI,SPI2_SS1,FAULT2_A,,,,
+P4_7,GPIO,JTAG_TDO,SPI2_SS2,FAULT3_A,,,,
+P5_0,GPIO,OSPI1_RXDS,UART4_RX,PDM_D2,SPI0_MISO,I2C2_SDA,UT0_T0,SD_D0
+P5_1,GPIO,OSPI1_SS0,UART4_TX,PDM_D3,SPI0_MOSI,I2C2_SCL,UT0_T1,SD_D1
+P5_2,GPIO,OSPI1_SCLKN,UART5_RX,PDM_C3,SPI0_SS0,LPI2C_SCL,UT1_T0,SD_D2
+P5_3,GPIO,OSPI1_SCLK,UART5_TX,SPI0_SCLK,LPI2C_SDA,UT1_T1,SD_D3,CDC_PCLK
+P5_4,GPIO,OSPI1_SS1,UART3_CTS,PDM_D2,SPI0_SS3,UT2_T0,SD_D4,CDC_DE
+P5_5,GPIO,OSPI1_SCLK,UART3_RTS,PDM_D3,UT2_T1,SD_D5,ETH_RXD0,CDC_HSYNC
+# P5_6 doesn't really have OSPI on AF1 but it's needed for P10_7 to be in OSPI1_RXDS mode
+P5_6,GPIO,OSPI1_RXDS,UART1_CTS,I2C2_SCL,UT3_T0,SD_D6,ETH_RXD1,CDC_VSYNC
+P5_7,GPIO,OSPI1_SS0,UART1_RTS,I2C2_SDA,UT3_T1,SD_D7,ETH_RST,
+P6_0,GPIO,OSPI0_D0,UART4_DE,PDM_D0,UT4_T0,SD_D0,ETH_TXD0,
+P6_1,GPIO,OSPI0_D1,UART5_DE,PDM_C0,UT4_T1,SD_D1,ETH_TXD1,
+P6_2,GPIO,OSPI0_D2,UART2_CTS,,PDM_D1,UT5_T0,SD_D2,ETH_TXEN
+P6_3,GPIO,OSPI0_D3,UART2_RTS,,PDM_C1,UT5_T1,SD_D3,ETH_IRQ
+P6_4,GPIO,OSPI0_D4,UART2_CTS,,SPI1_SS0,UT6_T0,SD_D4,ETH_REFCLK
+P6_5,GPIO,OSPI0_D5,UART2_RTS,,SPI1_SS1,UT6_T1,SD_D5,ETH_MDIO
+P6_6,GPIO,OSPI0_D6,UART0_CTS,,SPI1_SS2,UT7_T0,SD_D6,ETH_MDC
+P6_7,GPIO,OSPI0_D7,UART0_RTS,PDM_C2,SPI1_SS3,UT7_T1,SD_D7,ETH_CRS_DV_A
+P7_0,GPIO,,CMP3_OUT,SPI0_MISO,I2C0_SDA,UT8_T0,SD_CMD,
+P7_1,GPIO,,CMP2_OUT,SPI0_MOSI,I2C0_SCL,UT8_T1,SD_CLK,
+P7_2,GPIO,,UART3_CTS,CMP1_OUT,SPI0_SCLK,I2C1_SDA,UT9_T0,SD_RST
+P7_3,GPIO,,UART3_RTS,CMP0_OUT,SPI0_SS0,I2C1_SCL,UT9_T1,
+P7_4,GPIO,,LPUART_CTS,LPPDM_C2,LPSPI_MISO,LPI2C_SCL,UT10_T0,
+P7_5,GPIO,,LPUART_RTS,,LPPDM_D2,LPSPI_MOSI,LPI2C_SDA,UT10_T1
+P7_6,GPIO,,LPUART_RX,,LPPDM_C3,LPSPI_SCLK,I3C_SDA,UT11_T0
+P7_7,GPIO,,LPUART_TX,,LPPDM_D3,LPSPI_SS,I3C_SCL,UT11_T1
+P8_0,GPIO,OSPI1_SCLKN,AUDIO_CLK,FAULT0_B,LPCAM_D0,SD_D0,CDC_D0,CAM_D0
+P8_1,GPIO,I2S2_SDI,FAULT1_B,LPCAM_D1,SD_D1,CDC_D1,CAM_D1,
+P8_2,GPIO,I2S2_SDO,SPI0_SS3,FAULT2_B,LPCAM_D2,SD_D2,CDC_D2,CAM_D2
+P8_3,GPIO,I2S2_SCLK,SPI1_MISO,FAULT3_B,LPCAM_D3,SD_D3,CDC_D3,CAM_D3
+P8_4,GPIO,I2S2_WS,SPI1_MOSI,QEC0_X,LPCAM_D4,SD_D4,CDC_D4,CAM_D4
+P8_5,GPIO,,SPI1_SCLK,QEC0_Y,LPCAM_D5,SD_D5,CDC_D5,CAM_D5
+P8_6,GPIO,,I2S3_SCLK,QEC0_Z,LPCAM_D6,SD_D6,CDC_D6,CAM_D6
+P8_7,GPIO,,I2S3_WS,QEC1_X,LPCAM_D7,SD_D7,CDC_D7,CAM_D7
+P9_0,GPIO,,I2S3_SDI,QEC1_Y,SD_CMD,CDC_D8,CAM_D8,
+P9_1,GPIO,LPUART_RX,I2S3_SDO,QEC1_Z,SD_CLK,CDC_D9,CAM_D9,
+P9_2,GPIO,LPUART_TX,I2S3_SDI,SPI2_MISO,QEC2_X,SD_RST,CDC_D10,CAM_D10
+P9_3,GPIO,HFXO_OUT,UART7_RX,I2S3_SDO,SPI2_MOSI,QEC2_Y,CDC_D11,CAM_D11
+P9_4,GPIO,UART7_TX,I2S3_SCLK,SPI2_SCLK,I2C3_SDA,QEC2_Z,CDC_D12,CAM_D12
+P9_5,GPIO,OSPI1_D0,I2S3_WS,SPI2_SS0,I2C3_SCL,QEC3_X,CDC_D13,CAM_D13
+P9_6,GPIO,OSPI1_D1,AUDIO_CLK,SPI2_SS1,I2C3_SDA,QEC3_Y,CDC_D14,CAM_D14
+P9_7,GPIO,OSPI1_D2,UART7_DE,SPI2_SS2,I2C3_SCL,QEC3_Z,CDC_D15,CAM_D15
+P10_0,GPIO,OSPI1_D3,UART6_DE,SPI2_SS3,UT0_T0,LPCAM_HSYNC,CDC_D16,CAM_HSYNC
+P10_1,GPIO,OSPI1_D4,,LPI2S_SDI,UT0_T1,LPCAM_VSYNC,CDC_D17,CAM_VSYNC
+P10_2,GPIO,OSPI1_D5,,LPI2S_SDO,UT1_T0,LPCAM_PCLK,CDC_D18,CAM_PCLK
+P10_3,GPIO,OSPI1_D6,,LPI2S_SCLK,UT1_T1,LPCAM_XVCLK,CDC_D19,CAM_XVCLK
+P10_4,GPIO,OSPI1_D7,,LPI2S_WS,I2C0_SDA,UT2_T0,ETH_TXD0,CDC_D20
+P10_5,GPIO,UART6_RX,I2S2_SDI,SPI3_MISO,I2C0_SCL,UT2_T1,ETH_TXD1,CDC_D21
+P10_6,GPIO,UART6_TX,I2S2_SDO,SPI3_MOSI,I2C1_SDA,UT3_T0,ETH_TXEN,CDC_D22
+P10_7,GPIO,UART7_RX,I2S2_SCLK,SPI3_SCLK,I2C1_SCL,UT3_T1,CDC_D23,OSPI1_RXDS
+P11_0,GPIO,OSPI1_D0,UART7_TX,I2S2_WS,SPI3_SS0,UT4_T0,ETH_REFCLK,CDC_D0
+P11_1,GPIO,OSPI1_D1,UART7_DE,SPI3_SS1,UT4_T1,ETH_MDIO,CDC_D1,
+P11_2,GPIO,OSPI1_D2,UART6_DE,LPPDM_C2,SPI3_SS2,UT5_T0,ETH_MDC,CDC_D2
+P11_3,GPIO,OSPI1_D3,UART5_RX,LPPDM_C3,SPI3_SS3,UT5_T1,ETH_RXD0,CDC_D3
+P11_4,GPIO,OSPI1_D4,UART5_TX,PDM_C2,LPSPI_MISO,UT6_T0,ETH_RXD1,CDC_D4
+P11_5,GPIO,OSPI1_D5,UART6_RX,PDM_C3,LPSPI_MOSI,UT6_T1,ETH_CRS_DV_B,CDC_D5
+P11_6,GPIO,OSPI1_D6,UART6_TX,LPPDM_D2,LPSPI_SCLK,UT7_T0,ETH_RST,CDC_D6
+P11_7,GPIO,OSPI1_D7,UART5_DE,LPPDM_D3,LPSPI_SS,UT7_T1,ETH_IRQ,CDC_D7
+P12_0,GPIO,OSPI0_SCLK,AUDIO_CLK,I2S1_SDI,UT8_T0,CDC_D8,,
+P12_1,GPIO,OSPI0_SCLKN,UART4_RX,I2S1_SDO,UT8_T1,CDC_D9,,
+P12_2,GPIO,OSPI0_RXDS,UART4_TX,I2S1_SCLK,UT9_T0,CDC_D10,,
+P12_3,GPIO,OSPI0_SS0,UART4_DE,I2S1_WS,UT9_T1,CDC_D11,,
+P12_4,GPIO,OSPI0_SS1,SPI3_MISO,UT10_T0,,CDC_D12,,
+P12_5,GPIO,,SPI3_MOSI,UT10_T1,,CDC_D13,,
+P12_6,GPIO,,SPI3_SCLK,UT11_T0,,CDC_D14,,
+P12_7,GPIO,OSPI1_RXDS,,SPI3_SS0,UT11_T1,CDC_D15,,
+P13_0,GPIO,OSPI1_D0,,SPI3_SS1,QEC0_X,SD_D0,CDC_D16,
+P13_1,GPIO,OSPI1_D1,SPI3_SS2,QEC0_Y,SD_D1,CDC_D17,,
+P13_2,GPIO,OSPI1_D2,SPI3_SS3,QEC0_Z,SD_D2,CDC_D18,,
+P13_3,GPIO,OSPI1_D3,SPI2_SS3,QEC1_X,SD_D3,CDC_D19,,
+P13_4,GPIO,OSPI1_D4,LPI2S_SDI,QEC1_Y,SD_D4,CDC_D20,,
+P13_5,GPIO,OSPI1_D5,LPI2S_SDO,QEC1_Z,SD_D5,CDC_D21,,
+P13_6,GPIO,OSPI1_D6,LPI2S_SCLK,QEC2_X,SD_D6,CDC_D22,,
+P13_7,GPIO,OSPI1_D7,LPI2S_WS,QEC2_Y,SD_D7,CDC_D23,,
+P14_0,GPIO,OSPI1_SCLK,UART6_RX,QEC2_Z,SD_CMD,,,
+P14_1,GPIO,OSPI1_SCLKN,UART6_TX,,QEC3_X,SD_CLK,,
+P14_2,GPIO,OSPI1_SS0,UART7_RX,,QEC3_Y,SD_RST,,
+P14_3,GPIO,OSPI1_SS1,UART7_TX,,QEC3_Z,,,
+P14_4,GPIO,CMP3_OUT,SPI1_MISO,FAULT0_C,,,,
+P14_5,GPIO,CMP2_OUT,SPI1_MOSI,FAULT1_C,,,,
+P14_6,GPIO,CMP1_OUT,SPI1_SCLK,FAULT2_C,,,,
+P14_7,GPIO,CMP0_OUT,SPI1_SS0,FAULT3_C,,,,
+P15_0,GPIO,LPTMR0_CLK,,,,,,
+P15_1,GPIO,LPTMR1_CLK,,,,,,
+P15_2,GPIO,LPTMR2_CLK,,,,,,
+P15_3,GPIO,LPTMR3_CLK,,,,,,
+P15_4,GPIO,,,,,,,
+P15_5,GPIO,,,,,,,
+P15_6,GPIO,,,,,,,
+P15_7,GPIO,,,,,,,
diff --git a/ports/alif/mcu/make-pins.py b/ports/alif/mcu/make-pins.py
new file mode 100755
index 0000000000000..3666953e613f5
--- /dev/null
+++ b/ports/alif/mcu/make-pins.py
@@ -0,0 +1,113 @@
+#!/usr/bin/env python
+
+import os
+import re
+import sys
+
+sys.path.insert(0, os.path.join(os.path.dirname(__file__), "../../../tools"))
+import boardgen
+
+NUM_PORTS = 16
+NUM_PINS_PER_PORT = 8
+
+# Maps pad name to (adc12_periph, adc12_channel).
+ADC12_ANA_MAP = {
+    "P0_0": (0, 0),
+    "P0_1": (0, 1),
+    "P0_2": (0, 2),
+    "P0_3": (0, 3),
+    "P0_4": (0, 4),
+    "P0_5": (0, 5),
+    "P0_6": (1, 0),
+    "P0_7": (1, 1),
+    "P1_0": (1, 2),
+    "P1_1": (1, 3),
+    "P1_2": (1, 4),
+    "P1_3": (1, 5),
+    "P1_4": (2, 0),
+    "P1_5": (2, 1),
+    "P1_6": (2, 2),
+    "P1_7": (2, 3),
+    "P2_0": (2, 4),
+    "P2_1": (2, 5),
+}
+
+
+class AlifPin(boardgen.Pin):
+    def __init__(self, cpu_pin_name):
+        super().__init__(cpu_pin_name)
+        self._afs = [("NONE", -1)] * 8
+
+    # Called for each AF defined in the csv file for this pin.
+    def add_af(self, af_idx, af_name, af):
+        if af == "GPIO":
+            self._afs[af_idx] = "GPIO", -1
+        elif af.startswith("ANA_S"):
+            self._afs[af_idx] = "ANA", int(af[5:])
+        else:
+            m = re.match(r"([A-Z0-9]+[A-Z])(\d*)_([A-Z0-9_]+)$", af)
+            periph, unit, line = m.groups()
+            unit = -1 if unit == "" else int(unit)
+            self._afs[af_idx] = f"{periph}_{line}", unit
+
+    # Emit the struct which contains the pin instance.
+    def definition(self):
+        port, pin = self.name()[1:].split("_")
+        adc12_periph, adc12_channel = ADC12_ANA_MAP.get(self.name(), (3, 7))
+        base = "LPGPIO_BASE" if port == "15" else "GPIO{}_BASE".format(port)
+        return (
+            "{{\n"
+            "    .name = MP_QSTR_P{port}_{pin},\n"
+            "    .base = {{ .type = &machine_pin_type }},\n"
+            "    .gpio = (GPIO_Type *){base},\n"
+            "    .port = PORT_{port},\n"
+            "    .pin = PIN_{pin},\n"
+            "    .adc12_periph = {adc12_periph},\n"
+            "    .adc12_channel = {adc12_channel},\n"
+            "    .alt = {{{alt}}},\n"
+            "}}".format(
+                port=port,
+                pin=pin,
+                base=base,
+                adc12_periph=adc12_periph,
+                adc12_channel=adc12_channel,
+                alt=", ".join([f"MP_HAL_PIN_ALT({func}, {unit})" for func, unit in self._afs]),
+            )
+        )
+
+    # Alif cpu names must be "Pn_m".
+    @staticmethod
+    def validate_cpu_pin_name(cpu_pin_name):
+        boardgen.Pin.validate_cpu_pin_name(cpu_pin_name)
+
+        if not (m := re.match("P([0-9]){1,2}_([0-9])", cpu_pin_name)):
+            raise boardgen.PinGeneratorError(
+                "Invalid cpu pin name '{}', must be 'Pn_m'".format(cpu_pin_name)
+            )
+
+        port = int(m.group(1))
+        pin = int(m.group(2))
+        if not (0 <= port < NUM_PORTS and 0 <= pin < NUM_PINS_PER_PORT):
+            raise boardgen.PinGeneratorError("Unknown cpu pin '{}'".format(cpu_pin_name))
+
+
+class AlifPinGenerator(boardgen.PinGenerator):
+    def __init__(self):
+        # Use custom pin type above.
+        super().__init__(pin_type=AlifPin, enable_af=True)
+
+        # Pre-define the pins (i.e. don't require them to be listed in pins.csv).
+        for i in range(NUM_PORTS):
+            for j in range(NUM_PINS_PER_PORT):
+                self.add_cpu_pin("P{}_{}".format(i, j))
+
+    # Only use pre-defined cpu pins (do not let board.csv create them).
+    def find_pin_by_cpu_pin_name(self, cpu_pin_name, create=True):
+        return super().find_pin_by_cpu_pin_name(cpu_pin_name, create=False)
+
+    def cpu_table_size(self):
+        return "{} * {}".format(NUM_PORTS, NUM_PINS_PER_PORT)
+
+
+if __name__ == "__main__":
+    AlifPinGenerator().main()
diff --git a/ports/alif/mcu/pins_prefix.c b/ports/alif/mcu/pins_prefix.c
new file mode 100644
index 0000000000000..99fef5939a0ce
--- /dev/null
+++ b/ports/alif/mcu/pins_prefix.c
@@ -0,0 +1,2 @@
+#include "py/mphal.h"
+#include "extmod/modmachine.h"
diff --git a/ports/alif/modalif.c b/ports/alif/modalif.c
new file mode 100644
index 0000000000000..1c3c34394cd11
--- /dev/null
+++ b/ports/alif/modalif.c
@@ -0,0 +1,56 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "py/mphal.h"
+#include "py/runtime.h"
+#include "modalif.h"
+#include "se_services.h"
+
+static mp_obj_t alif_info(void) {
+    se_services_dump_device_data();
+    return mp_const_none;
+}
+static MP_DEFINE_CONST_FUN_OBJ_0(alif_info_obj, alif_info);
+
+static const mp_rom_map_elem_t alif_module_globals_table[] = {
+    { MP_ROM_QSTR(MP_QSTR___name__),            MP_ROM_QSTR(MP_QSTR_alif) },
+    #if MICROPY_HW_ENABLE_OSPI
+    { MP_ROM_QSTR(MP_QSTR_Flash),               MP_ROM_PTR(&alif_flash_type) },
+    #endif
+    { MP_ROM_QSTR(MP_QSTR_info),                MP_ROM_PTR(&alif_info_obj) },
+    #if MICROPY_HW_USB_MSC
+    // Attribute to indicate USB MSC is enabled.
+    { MP_ROM_QSTR(MP_QSTR_usb_msc),             MP_ROM_TRUE },
+    #endif
+};
+static MP_DEFINE_CONST_DICT(alif_module_globals, alif_module_globals_table);
+
+const mp_obj_module_t mp_module_alif = {
+    .base = { &mp_type_module },
+    .globals = (mp_obj_dict_t *)&alif_module_globals,
+};
+
+MP_REGISTER_MODULE(MP_QSTR_alif, mp_module_alif);
diff --git a/ports/alif/modalif.h b/ports/alif/modalif.h
new file mode 100644
index 0000000000000..5812d6ba54597
--- /dev/null
+++ b/ports/alif/modalif.h
@@ -0,0 +1,33 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#ifndef MICROPY_INCLUDED_ALIF_MODALIF_H
+#define MICROPY_INCLUDED_ALIF_MODALIF_H
+
+#include "py/obj.h"
+
+extern const mp_obj_type_t alif_flash_type;
+
+#endif // MICROPY_INCLUDED_ALIF_MODALIF_H
diff --git a/ports/alif/modmachine.c b/ports/alif/modmachine.c
new file mode 100644
index 0000000000000..71b5be5193d1c
--- /dev/null
+++ b/ports/alif/modmachine.c
@@ -0,0 +1,129 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+// This file is never compiled standalone, it's included directly from
+// extmod/modmachine.c via MICROPY_PY_MACHINE_INCLUDEFILE.
+
+#include "se_services.h"
+#include "tusb.h"
+
+extern void dcd_uninit(void);
+
+#define MICROPY_PY_MACHINE_EXTRA_GLOBALS \
+    { MP_ROM_QSTR(MP_QSTR_Pin),                 MP_ROM_PTR(&machine_pin_type) }, \
+    { MP_ROM_QSTR(MP_QSTR_Timer),               MP_ROM_PTR(&machine_timer_type) }, \
+    { MP_ROM_QSTR(MP_QSTR_RTC),                 MP_ROM_PTR(&machine_rtc_type) }, \
+
+static void mp_machine_idle(void) {
+    mp_event_wait_indefinite();
+}
+
+static mp_obj_t mp_machine_unique_id(void) {
+    uint8_t id[8] = {0};
+    se_services_get_unique_id(id);
+    return mp_obj_new_bytes(id, sizeof(id));
+}
+
+MP_NORETURN static void mp_machine_reset(void) {
+    se_services_reset_soc();
+}
+
+MP_NORETURN void mp_machine_bootloader(size_t n_args, const mp_obj_t *args) {
+    __disable_irq();
+
+    MICROPY_BOARD_ENTER_BOOTLOADER(n_args, args);
+
+    while (1) {
+        ;
+    }
+}
+
+static mp_int_t mp_machine_reset_cause(void) {
+    // TODO
+    return 0;
+}
+
+static mp_obj_t mp_machine_get_freq(void) {
+    return MP_OBJ_NEW_SMALL_INT(SystemCoreClock);
+}
+
+static void mp_machine_set_freq(size_t n_args, const mp_obj_t *args) {
+    mp_raise_NotImplementedError(NULL);
+}
+
+#if MICROPY_HW_ENABLE_USBDEV
+static void mp_machine_enable_usb(bool enable) {
+    if (enable) {
+        // Initialize TinyUSB and DCD.
+        tusb_init();
+    } else {
+        // Disconnect USB device.
+        tud_disconnect();
+        // Deinitialize TinyUSB.
+        tud_deinit(TUD_OPT_RHPORT);
+        // Deinitialize DCD (disables IRQs).
+        dcd_uninit();
+    }
+}
+#endif
+
+static void mp_machine_lightsleep(size_t n_args, const mp_obj_t *args) {
+    #if MICROPY_HW_ENABLE_USBDEV
+    mp_machine_enable_usb(false);
+    #endif
+
+    #ifdef MICROPY_BOARD_ENTER_STANDBY
+    MICROPY_BOARD_ENTER_STANDBY();
+    #endif
+
+    // This enters the deepest possible CPU sleep state, without
+    // losing CPU state. CPU and subsystem power will remain on.
+    pm_core_enter_deep_sleep();
+
+    #ifdef MICROPY_BOARD_EXIT_STANDBY
+    MICROPY_BOARD_EXIT_STANDBY();
+    #endif
+
+    #if MICROPY_HW_ENABLE_USBDEV
+    mp_machine_enable_usb(true);
+    #endif
+}
+
+MP_NORETURN static void mp_machine_deepsleep(size_t n_args, const mp_obj_t *args) {
+    #if MICROPY_HW_ENABLE_USBDEV
+    mp_machine_enable_usb(false);
+    #endif
+
+    #ifdef MICROPY_BOARD_ENTER_STOP
+    MICROPY_BOARD_ENTER_STOP();
+    #endif
+
+    // If power is removed from the subsystem, the function does
+    // not return, and the CPU will reboot when/if the subsystem
+    // is next powered up.
+    pm_core_enter_deep_sleep_request_subsys_off();
+    mp_machine_reset();
+}
diff --git a/ports/alif/modos.c b/ports/alif/modos.c
new file mode 100644
index 0000000000000..9c8c84268ca16
--- /dev/null
+++ b/ports/alif/modos.c
@@ -0,0 +1,49 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "py/runtime.h"
+#include "se_services.h"
+
+#if MICROPY_PY_OS_URANDOM
+static mp_obj_t mp_os_urandom(mp_obj_t num) {
+    mp_int_t n = mp_obj_get_int(num);
+    vstr_t vstr;
+    vstr_init_len(&vstr, n);
+    uint64_t rnd = 0;
+    size_t rnd_bits = 0;
+    for (int i = 0; i < n; i++) {
+        if (rnd_bits == 0) {
+            rnd = se_services_rand64();
+            rnd_bits = 64;
+        }
+        vstr.buf[i] = rnd;
+        rnd >>= 8;
+        rnd_bits -= 8;
+    }
+    return mp_obj_new_bytes_from_vstr(&vstr);
+}
+static MP_DEFINE_CONST_FUN_OBJ_1(mp_os_urandom_obj, mp_os_urandom);
+#endif
diff --git a/ports/alif/modules/he/_boot.py b/ports/alif/modules/he/_boot.py
new file mode 100644
index 0000000000000..3df1804709073
--- /dev/null
+++ b/ports/alif/modules/he/_boot.py
@@ -0,0 +1,7 @@
+# Change working directory to ROMFS, so boot.py and main.py can run from there.
+try:
+    import os
+
+    os.chdir("/rom")
+except:
+    pass
diff --git a/ports/alif/modules/hp/_boot.py b/ports/alif/modules/hp/_boot.py
new file mode 100644
index 0000000000000..36044b461e662
--- /dev/null
+++ b/ports/alif/modules/hp/_boot.py
@@ -0,0 +1,23 @@
+import sys, os, alif
+
+
+bdev = alif.Flash()
+if hasattr(alif, "usb_msc"):
+    try:
+        # This may fail on VfsFat construction, or mount.
+        os.mount(os.VfsFat(bdev), "/flash")
+    except:
+        os.VfsFat.mkfs(bdev)
+        os.mount(os.VfsFat(bdev), "/flash")
+else:
+    try:
+        os.mount(os.VfsLfs2(bdev, progsize=256), "/flash")
+    except:
+        os.VfsLfs2.mkfs(bdev, progsize=256)
+        os.mount(os.VfsLfs2(bdev, progsize=256), "/flash")
+
+sys.path.append("/flash")
+sys.path.append("/flash/lib")
+os.chdir("/flash")
+
+del sys, os, alif, bdev
diff --git a/ports/alif/mpbthciport.c b/ports/alif/mpbthciport.c
new file mode 100644
index 0000000000000..10a0505fe02d8
--- /dev/null
+++ b/ports/alif/mpbthciport.c
@@ -0,0 +1,146 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2025 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "py/mphal.h"
+#include "py/runtime.h"
+#include "extmod/mpbthci.h"
+#include "shared/runtime/softtimer.h"
+#include "mpbthciport.h"
+
+#if MICROPY_PY_BLUETOOTH
+
+uint8_t mp_bluetooth_hci_cmd_buf[4 + 256];
+
+// Soft timer and scheduling node for scheduling a HCI poll.
+static soft_timer_entry_t mp_bluetooth_hci_soft_timer;
+static mp_sched_node_t mp_bluetooth_hci_sched_node;
+
+// This is called by soft_timer and executes at IRQ_PRI_PENDSV.
+static void mp_bluetooth_hci_soft_timer_callback(soft_timer_entry_t *self) {
+    mp_bluetooth_hci_poll_now();
+}
+
+void mp_bluetooth_hci_init(void) {
+    soft_timer_static_init(
+        &mp_bluetooth_hci_soft_timer,
+        SOFT_TIMER_MODE_ONE_SHOT,
+        0,
+        mp_bluetooth_hci_soft_timer_callback
+        );
+}
+
+static void mp_bluetooth_hci_start_polling(void) {
+    mp_bluetooth_hci_poll_now();
+}
+
+void mp_bluetooth_hci_poll_in_ms(uint32_t ms) {
+    soft_timer_reinsert(&mp_bluetooth_hci_soft_timer, ms);
+}
+
+// For synchronous mode, we run all BLE stack code inside a scheduled task.
+// This task is scheduled periodically via a timer, or immediately after UART RX IRQ.
+static void run_events_scheduled_task(mp_sched_node_t *node) {
+    (void)node;
+    // This will process all buffered HCI UART data, and run any callouts or events.
+    mp_bluetooth_hci_poll();
+}
+
+// Called periodically (systick) or directly (e.g. UART RX IRQ) in order to
+// request that processing happens ASAP in the scheduler.
+void mp_bluetooth_hci_poll_now(void) {
+    mp_sched_schedule_node(&mp_bluetooth_hci_sched_node, run_events_scheduled_task);
+}
+
+/******************************************************************************/
+// HCI over UART
+
+#include "mpuart.h"
+
+static uint32_t hci_uart_id;
+static bool hci_uart_first_char;
+static uint8_t hci_rx_ringbuf_array[768];
+static ringbuf_t hci_rx_ringbuf = {
+    .buf = hci_rx_ringbuf_array,
+    .size = sizeof(hci_rx_ringbuf_array),
+    .iget = 0,
+    .iput = 0,
+};
+
+static void mp_bluetooth_hci_uart_irq_callback(unsigned int uart_id, unsigned int trigger) {
+    if (trigger == MP_UART_IRQ_RXIDLE) {
+        mp_bluetooth_hci_poll_now();
+    }
+}
+
+int mp_bluetooth_hci_uart_init(uint32_t port, uint32_t baudrate) {
+    hci_uart_id = port;
+    hci_uart_first_char = true;
+
+    // Initialise the UART.
+    mp_uart_init(hci_uart_id, baudrate, UART_DATA_BITS_8, UART_PARITY_NONE, UART_STOP_BITS_1, pin_BT_UART_TX, pin_BT_UART_RX, &hci_rx_ringbuf);
+    mp_uart_set_flow(hci_uart_id, pin_BT_UART_RTS, pin_BT_UART_CTS);
+    mp_uart_set_irq_callback(hci_uart_id, MP_UART_IRQ_RXIDLE, mp_bluetooth_hci_uart_irq_callback);
+
+    // Start the HCI polling to process any initial events/packets.
+    mp_bluetooth_hci_start_polling();
+
+    return 0;
+}
+
+int mp_bluetooth_hci_uart_deinit(void) {
+    mp_uart_deinit(hci_uart_id);
+    return 0;
+}
+
+int mp_bluetooth_hci_uart_set_baudrate(uint32_t baudrate) {
+    mp_uart_set_baudrate(hci_uart_id, baudrate);
+    return 0;
+}
+
+int mp_bluetooth_hci_uart_write(const uint8_t *buf, size_t len) {
+    mp_bluetooth_hci_controller_wakeup();
+    mp_uart_tx_data(hci_uart_id, (void *)buf, len);
+    return 0;
+}
+
+// This function expects the controller to be in the wake state via a previous call
+// to mp_bluetooth_hci_controller_woken.
+int mp_bluetooth_hci_uart_readchar(void) {
+    if (mp_uart_rx_any(hci_uart_id)) {
+        int c = mp_uart_rx_char(hci_uart_id);
+        if (hci_uart_first_char) {
+            if (c == 0) {
+                return -1;
+            }
+            hci_uart_first_char = false;
+        }
+        return c;
+    } else {
+        return -1;
+    }
+}
+
+#endif // MICROPY_PY_BLUETOOTH
diff --git a/ports/alif/mpbthciport.h b/ports/alif/mpbthciport.h
new file mode 100644
index 0000000000000..65e9d1752a798
--- /dev/null
+++ b/ports/alif/mpbthciport.h
@@ -0,0 +1,46 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021 Damien P. George
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#ifndef MICROPY_INCLUDED_ALIF_MPBTHCIPORT_H
+#define MICROPY_INCLUDED_ALIF_MPBTHCIPORT_H
+
+#include "py/mpconfig.h"
+
+// Initialise the HCI subsystem (should be called once, early on).
+void mp_bluetooth_hci_init(void);
+
+// Call this to poll the HCI now.
+void mp_bluetooth_hci_poll_now(void);
+
+// Call this to poll the HCI after a certain timeout.
+void mp_bluetooth_hci_poll_in_ms(uint32_t ms);
+
+// Must be provided by the stack bindings (e.g. mpnimbleport.c or mpbtstackport.c).
+// Request new data from the uart and pass to the stack, and run pending events/callouts.
+// This is a low-level function and should not be called directly, use
+// mp_bluetooth_hci_poll_now/mp_bluetooth_hci_poll_in_ms instead.
+void mp_bluetooth_hci_poll(void);
+
+#endif // MICROPY_INCLUDED_ALIF_MPBTHCIPORT_H
diff --git a/ports/alif/mpconfigport.h b/ports/alif/mpconfigport.h
new file mode 100644
index 0000000000000..6c9e6af635f57
--- /dev/null
+++ b/ports/alif/mpconfigport.h
@@ -0,0 +1,220 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+// Options controlling how MicroPython is built, overriding defaults in py/mpconfig.h
+
+#include <stdint.h>
+#include <alloca.h> // for alloca()
+
+// board specific definitions
+#include "mpconfigboard.h"
+
+#ifndef MICROPY_CONFIG_ROM_LEVEL
+#define MICROPY_CONFIG_ROM_LEVEL                (MICROPY_CONFIG_ROM_LEVEL_FULL_FEATURES)
+#endif
+
+// Select the low-level system tick implementation.
+#if !defined(MICROPY_HW_SYSTEM_TICK_USE_SYSTICK) \
+    && !defined(MICROPY_HW_SYSTEM_TICK_USE_LPTIMER) \
+    && !defined(MICROPY_HW_SYSTEM_TICK_USE_UTIMER)
+#if CORE_M55_HP
+#define MICROPY_HW_SYSTEM_TICK_USE_UTIMER       (1)
+#else
+#define MICROPY_HW_SYSTEM_TICK_USE_SYSTICK      (1)
+#endif
+#endif
+#if MICROPY_HW_SYSTEM_TICK_USE_SYSTICK
+#define MICROPY_SOFT_TIMER_TICKS_MS             system_tick_ms_counter
+#endif
+
+#ifndef MICROPY_HW_ENABLE_OSPI
+#define MICROPY_HW_ENABLE_OSPI                  (CORE_M55_HP)
+#endif
+#ifndef MICROPY_HW_ENABLE_USBDEV
+#define MICROPY_HW_ENABLE_USBDEV                (CORE_M55_HP)
+#endif
+#ifndef MICROPY_HW_USB_PRODUCT_FS_STRING
+#define MICROPY_HW_USB_PRODUCT_FS_STRING        "Board in HS mode"
+#endif
+#ifndef MICROPY_HW_USB_CDC
+#define MICROPY_HW_USB_CDC                      (CORE_M55_HP)
+#endif
+#define MICROPY_HW_USB_CDC_TX_TIMEOUT           (500)
+#ifndef MICROPY_HW_USB_MSC
+#define MICROPY_HW_USB_MSC                      (0)
+#endif
+#ifndef MICROPY_HW_USB_VID
+#define MICROPY_HW_USB_VID                      (0xf055)
+#endif
+#ifndef MICROPY_HW_USB_PID
+#define MICROPY_HW_USB_PID                      (0x9802) // interface has CDC only
+#endif
+#ifndef MICROPY_HW_ENABLE_UART_REPL
+#define MICROPY_HW_ENABLE_UART_REPL             (0)
+#endif
+#define MICROPY_HW_FLASH_BLOCK_SIZE_BYTES       (4096)
+
+// Memory allocation policies
+#ifndef MICROPY_ALLOC_GC_STACK_SIZE
+#define MICROPY_ALLOC_GC_STACK_SIZE             (128)
+#endif
+#define MICROPY_ALLOC_PATH_MAX                  (128)
+#define MICROPY_QSTR_BYTES_IN_HASH              (1)
+
+// MicroPython emitters
+#define MICROPY_PERSISTENT_CODE_LOAD            (1)
+#define MICROPY_EMIT_THUMB                      (1)
+#define MICROPY_EMIT_THUMB_ARMV7M               (1)
+#define MICROPY_EMIT_INLINE_THUMB               (1)
+#define MICROPY_EMIT_INLINE_THUMB_FLOAT         (1)
+
+// Optimisations
+#define MICROPY_OPT_COMPUTED_GOTO               (1)
+
+// Python internal features
+#define MICROPY_READER_VFS                      (1)
+#define MICROPY_ENABLE_GC                       (1)
+#define MICROPY_ENABLE_EMERGENCY_EXCEPTION_BUF  (1)
+#define MICROPY_LONGINT_IMPL                    (MICROPY_LONGINT_IMPL_MPZ)
+#ifndef MICROPY_FLOAT_IMPL
+#define MICROPY_FLOAT_IMPL                      (MICROPY_FLOAT_IMPL_FLOAT)
+#endif
+#define MICROPY_SCHEDULER_DEPTH                 (8)
+#define MICROPY_SCHEDULER_STATIC_NODES          (1)
+#define MICROPY_USE_INTERNAL_ERRNO              (1)
+#define MICROPY_TRACKED_ALLOC                   (MICROPY_PY_OPENAMP)
+
+// Fine control over Python builtins, classes, modules, etc
+#define MICROPY_PY_SYS_PLATFORM                 "alif"
+
+// Extended modules
+#define MICROPY_EPOCH_IS_1970                   (1)
+#define MICROPY_PY_OS_INCLUDEFILE               "ports/alif/modos.c"
+#define MICROPY_PY_OS_DUPTERM                   (1)
+#define MICROPY_PY_OS_SEP                       (1)
+#define MICROPY_PY_OS_SYNC                      (1)
+#define MICROPY_PY_OS_UNAME                     (1)
+#define MICROPY_PY_OS_URANDOM                   (1)
+#define MICROPY_PY_RANDOM_SEED_INIT_FUNC        (se_services_rand64())
+#define MICROPY_PY_TIME                         (1)
+#define MICROPY_PY_MACHINE                      (1)
+#define MICROPY_PY_MACHINE_INCLUDEFILE          "ports/alif/modmachine.c"
+#define MICROPY_PY_MACHINE_RESET                (1)
+#define MICROPY_PY_MACHINE_BOOTLOADER           (1)
+#define MICROPY_PY_MACHINE_BARE_METAL_FUNCS     (1)
+#define MICROPY_PY_MACHINE_DISABLE_IRQ_ENABLE_IRQ (1)
+#define MICROPY_PY_MACHINE_ADC                  (1)
+#define MICROPY_PY_MACHINE_ADC_INCLUDEFILE      "ports/alif/machine_adc.c"
+#define MICROPY_PY_MACHINE_DHT_READINTO         (1)
+#define MICROPY_PY_MACHINE_PULSE                (1)
+#define MICROPY_PY_MACHINE_I2C                  (MICROPY_HW_ENABLE_HW_I2C)
+#define MICROPY_PY_MACHINE_I2C_TRANSFER_WRITE1  (1)
+#define MICROPY_PY_MACHINE_SOFTI2C              (1)
+#define MICROPY_PY_MACHINE_SPI                  (1)
+#define MICROPY_PY_MACHINE_SOFTSPI              (1)
+#define MICROPY_PY_MACHINE_TIMER                (1)
+#define MICROPY_PY_MACHINE_UART                 (1)
+#define MICROPY_PY_MACHINE_UART_INCLUDEFILE     "ports/alif/machine_uart.c"
+#define MICROPY_PY_MACHINE_UART_IRQ             (1)
+#define MICROPY_PY_NETWORK                      (CORE_M55_HP)
+#ifndef MICROPY_PY_NETWORK_HOSTNAME_DEFAULT
+#define MICROPY_PY_NETWORK_HOSTNAME_DEFAULT     "mpy-alif"
+#endif
+#define MICROPY_VFS                             (1)
+#define MICROPY_VFS_ROM                         (1)
+
+// fatfs configuration
+#define MICROPY_FATFS_ENABLE_LFN                (1)
+#define MICROPY_FATFS_LFN_CODE_PAGE             437 /* 1=SFN/ANSI 437=LFN/U.S.(OEM) */
+#define MICROPY_FATFS_RPATH                     (2)
+#if MICROPY_HW_USB_MSC
+#define MICROPY_FATFS_USE_LABEL                 (1)
+#define MICROPY_FATFS_MULTI_PARTITION           (1)
+// Set FatFS block size to flash sector size to avoid caching
+// the flash sector in memory to support smaller block sizes.
+#define MICROPY_FATFS_MAX_SS                    (MICROPY_HW_FLASH_BLOCK_SIZE_BYTES)
+#endif
+
+#if MICROPY_PY_NETWORK_CYW43
+extern const struct _mp_obj_type_t mp_network_cyw43_type;
+#define MICROPY_HW_NIC_CYW43 { MP_ROM_QSTR(MP_QSTR_WLAN), MP_ROM_PTR(&mp_network_cyw43_type) },
+#else
+#define MICROPY_HW_NIC_CYW43
+#endif
+
+#ifndef MICROPY_BOARD_NETWORK_INTERFACES
+#define MICROPY_BOARD_NETWORK_INTERFACES
+#endif
+
+#define MICROPY_PORT_NETWORK_INTERFACES \
+    MICROPY_HW_NIC_CYW43 \
+    MICROPY_BOARD_NETWORK_INTERFACES \
+
+// Bluetooth code only runs in the scheduler, no locking/mutex required.
+#define MICROPY_PY_BLUETOOTH_ENTER uint32_t atomic_state = 0;
+#define MICROPY_PY_BLUETOOTH_EXIT (void)atomic_state;
+#define MICROPY_PY_BLUETOOTH_ENABLE_CENTRAL_MODE (1)
+#define MICROPY_PY_BLUETOOTH_ENABLE_L2CAP_CHANNELS (1)
+
+#define MP_STATE_PORT MP_STATE_VM
+
+// Miscellaneous settings
+
+// We need an implementation of the log2 function which is not a macro
+#define MP_NEED_LOG2 (1)
+
+#define MICROPY_MAKE_POINTER_CALLABLE(p) ((void *)((mp_uint_t)(p) | 1))
+
+#define MP_SSIZE_MAX (0x7fffffff)
+
+// Assume that if we already defined the obj repr then we also defined these items
+#ifndef MICROPY_OBJ_REPR
+typedef intptr_t mp_int_t; // must be pointer size
+typedef uintptr_t mp_uint_t; // must be pointer size
+typedef intptr_t mp_off_t;
+#endif
+
+// Board configuration settings.
+
+#ifndef MICROPY_BOARD_STARTUP
+#define MICROPY_BOARD_STARTUP()
+#endif
+
+#ifndef MICROPY_BOARD_EARLY_INIT
+#define MICROPY_BOARD_EARLY_INIT()
+#endif
+
+#ifndef MICROPY_BOARD_FATAL_ERROR
+extern void panic(const char *);
+#define MICROPY_BOARD_FATAL_ERROR panic
+#endif
+
+#ifndef MICROPY_BOARD_ENTER_BOOTLOADER
+#define MICROPY_BOARD_ENTER_BOOTLOADER(nargs, args)
+#endif
+
+// Needed for MICROPY_PY_RANDOM_SEED_INIT_FUNC.
+uint64_t se_services_rand64(void);
diff --git a/ports/alif/mpconfigport.mk b/ports/alif/mpconfigport.mk
new file mode 100644
index 0000000000000..92d9a5db8faf0
--- /dev/null
+++ b/ports/alif/mpconfigport.mk
@@ -0,0 +1,13 @@
+# Enable/disable extra modules and features
+
+# MicroPython feature configurations
+MICROPY_ROM_TEXT_COMPRESSION ?= 1
+MICROPY_FLOAT_IMPL ?= double
+
+# VFS support.
+MICROPY_VFS_FAT ?= 1
+MICROPY_VFS_LFS2 ?= 1
+
+# File containing description of content to be frozen into firmware.
+FROZEN_MANIFEST ?= boards/manifest.py
+MICROPY_MANIFEST_MCU_CORE := $(shell echo $(MCU_CORE) | awk -F'_' '{print tolower($$2)}')
diff --git a/ports/alif/mphalport.c b/ports/alif/mphalport.c
new file mode 100644
index 0000000000000..39528a4b9f272
--- /dev/null
+++ b/ports/alif/mphalport.c
@@ -0,0 +1,269 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2023 Damien P. George
+ * Copyright (c) 2024 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "py/mphal.h"
+#include "py/ringbuf.h"
+#include "py/runtime.h"
+#include "py/stream.h"
+#include "extmod/misc.h"
+#include "shared/runtime/interrupt_char.h"
+#include "shared/runtime/softtimer.h"
+#include "shared/timeutils/timeutils.h"
+#include "shared/tinyusb/mp_usbd.h"
+#include "shared/tinyusb/mp_usbd_cdc.h"
+#include "tusb.h"
+#include "mpuart.h"
+#include "pendsv.h"
+#include "se_services.h"
+#include "system_tick.h"
+
+#ifndef MICROPY_HW_STDIN_BUFFER_LEN
+#define MICROPY_HW_STDIN_BUFFER_LEN 512
+#endif
+
+static uint8_t stdin_ringbuf_array[MICROPY_HW_STDIN_BUFFER_LEN];
+ringbuf_t stdin_ringbuf = { stdin_ringbuf_array, sizeof(stdin_ringbuf_array) };
+
+uintptr_t mp_hal_stdio_poll(uintptr_t poll_flags) {
+    uintptr_t ret = 0;
+    #if MICROPY_HW_USB_CDC
+    ret |= mp_usbd_cdc_poll_interfaces(poll_flags);
+    #endif
+    #if MICROPY_HW_ENABLE_UART_REPL
+    if (poll_flags & MP_STREAM_POLL_WR) {
+        ret |= MP_STREAM_POLL_WR;
+    }
+    #endif
+    #if MICROPY_PY_OS_DUPTERM
+    ret |= mp_os_dupterm_poll(poll_flags);
+    #endif
+    return ret;
+}
+
+// Receive single character
+int mp_hal_stdin_rx_chr(void) {
+    for (;;) {
+        #if MICROPY_HW_USB_CDC
+        mp_usbd_cdc_poll_interfaces(0);
+        #endif
+        int c = ringbuf_get(&stdin_ringbuf);
+        if (c != -1) {
+            return c;
+        }
+        #if MICROPY_PY_OS_DUPTERM
+        int dupterm_c = mp_os_dupterm_rx_chr();
+        if (dupterm_c >= 0) {
+            return dupterm_c;
+        }
+        #endif
+        mp_event_wait_indefinite();
+    }
+}
+
+// Send string of given length
+mp_uint_t mp_hal_stdout_tx_strn(const char *str, size_t len) {
+    #if MICROPY_HW_ENABLE_UART_REPL || MICROPY_HW_USB_CDC || MICROPY_PY_OS_DUPTERM
+    mp_uint_t ret = len;
+    bool did_write = false;
+    #endif
+
+    #if MICROPY_HW_ENABLE_UART_REPL
+    mp_uart_write_strn_repl(str, len);
+    did_write = true;
+    #endif
+
+    #if MICROPY_HW_USB_CDC
+    mp_uint_t cdc_res = mp_usbd_cdc_tx_strn(str, len);
+    if (cdc_res > 0) {
+        did_write = true;
+        ret = MIN(cdc_res, ret);
+    }
+    #endif
+
+    #if MICROPY_PY_OS_DUPTERM
+    int dupterm_res = mp_os_dupterm_tx_strn(str, len);
+    if (dupterm_res >= 0) {
+        did_write = true;
+        ret = MIN((mp_uint_t)dupterm_res, ret);
+    }
+    #endif
+
+    return did_write ? ret : 0;
+}
+
+mp_uint_t mp_hal_ticks_cpu(void) {
+    return system_tick_get_u32();
+}
+
+mp_uint_t mp_hal_ticks_us(void) {
+    // Convert system tick to microsecond counter.
+    #if MICROPY_HW_SYSTEM_TICK_USE_SYSTICK
+    return system_tick_get_u64();
+    #elif MICROPY_HW_SYSTEM_TICK_USE_LPTIMER
+    return system_tick_get_u64() * 1000000 / system_tick_source_hz;
+    #else
+    return system_tick_get_u64() / system_core_clock_mhz;
+    #endif
+}
+
+mp_uint_t mp_hal_ticks_ms(void) {
+    // Convert system tick to millisecond counter.
+    #if MICROPY_HW_SYSTEM_TICK_USE_SYSTICK
+    return system_tick_get_u64() / 1000ULL;
+    #elif MICROPY_HW_SYSTEM_TICK_USE_LPTIMER
+    return system_tick_get_u64() * 1000ULL / system_tick_source_hz;
+    #else
+    return system_tick_get_u64() / (SystemCoreClock / 1000);
+    #endif
+}
+
+void mp_hal_delay_us(mp_uint_t us) {
+    #if MICROPY_HW_SYSTEM_TICK_USE_SYSTICK
+    uint64_t ticks_delay = (uint64_t)us;
+    #elif MICROPY_HW_SYSTEM_TICK_USE_LPTIMER
+    uint64_t ticks_delay = (uint64_t)us * system_tick_source_hz / 1000000;
+    #else
+    uint64_t ticks_delay = (uint64_t)us * system_core_clock_mhz;
+    #endif
+    uint64_t start = system_tick_get_u64();
+    while (system_tick_get_u64() - start < ticks_delay) {
+    }
+}
+
+void mp_hal_delay_ms(mp_uint_t ms) {
+    uint32_t t0 = mp_hal_ticks_ms();
+    mp_event_handle_nowait();
+    for (;;) {
+        uint32_t t1 = mp_hal_ticks_ms();
+        if (t1 - t0 >= ms) {
+            break;
+        }
+        mp_event_wait_ms(ms - (t1 - t0));
+    }
+}
+
+uint64_t mp_hal_time_ns(void) {
+    return 0;
+}
+
+void mp_hal_pin_config(const machine_pin_obj_t *pin, uint32_t mode,
+    uint32_t pull, uint32_t speed, uint32_t drive, uint32_t alt, bool ren) {
+    uint8_t alt_func = PINMUX_ALTERNATE_FUNCTION_0;
+    uint8_t pad_ctrl = drive | speed | (ren ? PADCTRL_READ_ENABLE : 0);
+
+    // Configure pull-up or pull-down.
+    if (pull & MP_HAL_PIN_PULL_UP) {
+        pad_ctrl |= PADCTRL_DRIVER_DISABLED_PULL_UP;
+    }
+
+    if (pull & MP_HAL_PIN_PULL_DOWN) {
+        pad_ctrl |= PADCTRL_DRIVER_DISABLED_PULL_DOWN;
+    }
+
+    // Configure open-drain mode.
+    if (mode == MP_HAL_PIN_MODE_OPEN_DRAIN) {
+        pad_ctrl |= PADCTRL_DRIVER_OPEN_DRAIN;
+    }
+
+    // For ALT mode, find alternate function.
+    if (mode == MP_HAL_PIN_MODE_ALT) {
+        for (mp_uint_t i = 0; i < MP_ARRAY_SIZE(pin->alt); i++) {
+            if (alt == pin->alt[i]) {
+                alt_func = i;
+                break;
+            }
+        }
+        if (alt_func == PINMUX_ALTERNATE_FUNCTION_0) {
+            mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("invalid pin af: %d"), alt);
+        }
+    }
+
+    // Set pad config.
+    pinconf_set(pin->port, pin->pin, alt_func, pad_ctrl);
+
+    // For INPUT/OUTPUT/OD modes, set the GPIO direction.
+    switch (mode) {
+        case MP_HAL_PIN_MODE_INPUT:
+            gpio_set_direction_input(pin->gpio, pin->pin);
+            break;
+        case MP_HAL_PIN_MODE_OUTPUT:
+        case MP_HAL_PIN_MODE_OPEN_DRAIN:
+            gpio_set_direction_output(pin->gpio, pin->pin);
+            break;
+        default:
+            break;
+    }
+}
+
+
+void system_tick_schedule_callback(void) {
+    pendsv_schedule_dispatch(PENDSV_DISPATCH_SOFT_TIMER, soft_timer_handler);
+}
+
+#if !defined(MICROPY_SOFT_TIMER_TICKS_MS)
+
+uint32_t soft_timer_get_ms(void) {
+    return mp_hal_ticks_ms();
+}
+
+void soft_timer_schedule_at_ms(uint32_t ticks_ms) {
+    int32_t ms = soft_timer_ticks_diff(ticks_ms, mp_hal_ticks_ms());
+    ms = MAX(0, ms);
+    ms = MIN(ms, 4000000); // ensure ms * 1000 doesn't overflow
+    system_tick_schedule_after_us(ms * 1000);
+}
+
+#endif
+
+/*******************************************************************************/
+// MAC address
+
+// Generate a random locally administered MAC address (LAA)
+void mp_hal_generate_laa_mac(int idx, uint8_t buf[6]) {
+    uint8_t id[8];
+    se_services_get_unique_id(id);
+    buf[0] = 0x02; // LAA range
+    buf[1] = id[4];
+    buf[2] = id[3];
+    buf[3] = id[2];
+    buf[4] = id[1];
+    buf[5] = (id[0] << 2) | idx;
+}
+
+// A board can override this if needed
+MP_WEAK void mp_hal_get_mac(int idx, uint8_t buf[6]) {
+    mp_hal_generate_laa_mac(idx, buf);
+}
+
+void mp_hal_get_mac_ascii(int idx, size_t chr_off, size_t chr_len, char *dest) {
+    static const char hexchr[16] = "0123456789ABCDEF";
+    uint8_t mac[6];
+    mp_hal_get_mac(idx, mac);
+    for (; chr_len; ++chr_off, --chr_len) {
+        *dest++ = hexchr[mac[chr_off >> 1] >> (4 * (1 - (chr_off & 1))) & 0xf];
+    }
+}
diff --git a/ports/alif/mphalport.h b/ports/alif/mphalport.h
new file mode 100644
index 0000000000000..4f81439b5492e
--- /dev/null
+++ b/ports/alif/mphalport.h
@@ -0,0 +1,372 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "py/ringbuf.h"
+#include "shared/runtime/interrupt_char.h"
+#include "irq.h"
+#include "system_tick.h"
+#include ALIF_CMSIS_H
+
+#define MICROPY_BEGIN_ATOMIC_SECTION()     disable_irq()
+#define MICROPY_END_ATOMIC_SECTION(state)  enable_irq(state)
+
+// For regular code that wants to prevent "background tasks" from running.
+// These background tasks (LWIP, Bluetooth) run in PENDSV context.
+#define MICROPY_PY_PENDSV_ENTER   uint32_t atomic_state = raise_irq_pri(IRQ_PRI_PENDSV);
+#define MICROPY_PY_PENDSV_REENTER atomic_state = raise_irq_pri(IRQ_PRI_PENDSV);
+#define MICROPY_PY_PENDSV_EXIT    restore_irq_pri(atomic_state);
+
+// Prevent the "lwIP task" from running.
+#define MICROPY_PY_LWIP_ENTER   MICROPY_PY_PENDSV_ENTER
+#define MICROPY_PY_LWIP_REENTER MICROPY_PY_PENDSV_REENTER
+#define MICROPY_PY_LWIP_EXIT    MICROPY_PY_PENDSV_EXIT
+
+// Port level Wait-for-Event macro
+//
+// Do not use this macro directly, include py/runtime.h and
+// call mp_event_wait_indefinite() or mp_event_wait_ms(timeout)
+#define MICROPY_INTERNAL_WFE(TIMEOUT_MS) \
+    do {                                 \
+        if ((TIMEOUT_MS) < 0) { \
+            __WFE(); \
+        } else { \
+            system_tick_wfe_with_timeout_us(TIMEOUT_MS * 1000); \
+        } \
+    } while (0)
+
+// TODO requires mods to py/emitglue.c for this to be picked up
+#define MP_HAL_CLEAN_DCACHE(addr, size) \
+    (SCB_CleanDCache_by_Addr((uint32_t *)((uint32_t)addr & ~0x1f), \
+    ((uint32_t)((uint8_t *)addr + size + 0x1f) & ~0x1f) - ((uint32_t)addr & ~0x1f)))
+
+#define mp_hal_quiet_timing_enter() raise_irq_pri(IRQ_PRI_QUIET_TIMING)
+#define mp_hal_quiet_timing_exit(irq_state) restore_irq_pri(irq_state)
+#define mp_hal_delay_us_fast mp_hal_delay_us
+
+extern ringbuf_t stdin_ringbuf;
+
+/******************************************************************************/
+// C-level pin HAL
+
+#include "py/obj.h"
+#include "gpio.h"
+#include "pinconf.h"
+
+#define MP_HAL_PIN_FMT                          "%q"
+#define MP_HAL_PIN_MODE_INPUT                   (0)
+#define MP_HAL_PIN_MODE_OUTPUT                  (1)
+#define MP_HAL_PIN_MODE_OPEN_DRAIN              (2)
+#define MP_HAL_PIN_MODE_ALT                     (3)
+#define MP_HAL_PIN_PULL_NONE                    (0)
+#define MP_HAL_PIN_PULL_UP                      (1)
+#define MP_HAL_PIN_PULL_DOWN                    (2)
+#define MP_HAL_PIN_DRIVE_2MA                    (PADCTRL_OUTPUT_DRIVE_STRENGTH_2MA)
+#define MP_HAL_PIN_DRIVE_4MA                    (PADCTRL_OUTPUT_DRIVE_STRENGTH_4MA)
+#define MP_HAL_PIN_DRIVE_8MA                    (PADCTRL_OUTPUT_DRIVE_STRENGTH_8MA)
+#define MP_HAL_PIN_DRIVE_12MA                   (PADCTRL_OUTPUT_DRIVE_STRENGTH_12MA)
+#define MP_HAL_PIN_SPEED_LOW                    (0)
+#define MP_HAL_PIN_SPEED_HIGH                   (PADCTRL_SLEW_RATE_FAST)
+
+#define mp_hal_pin_obj_t const machine_pin_obj_t *
+
+#define MP_HAL_PIN_ALT(function, unit)          (MP_HAL_PIN_ALT_MAKE((MP_HAL_PIN_ALT_##function), (unit)))
+#define MP_HAL_PIN_ALT_MAKE(function, unit)     ((function) | ((unit) << 8))
+#define MP_HAL_PIN_ALT_GET_FUNC(alt)            ((alt) & 0xff)
+#define MP_HAL_PIN_ALT_GET_UNIT(alt)            ((alt) >> 8)
+
+enum {
+    MP_HAL_PIN_ALT_NONE = 0,
+    MP_HAL_PIN_ALT_GPIO,
+    MP_HAL_PIN_ALT_ANA,
+    MP_HAL_PIN_ALT_AUDIO_CLK,
+    MP_HAL_PIN_ALT_CAM_D0,
+    MP_HAL_PIN_ALT_CAM_D1,
+    MP_HAL_PIN_ALT_CAM_D2,
+    MP_HAL_PIN_ALT_CAM_D3,
+    MP_HAL_PIN_ALT_CAM_D4,
+    MP_HAL_PIN_ALT_CAM_D5,
+    MP_HAL_PIN_ALT_CAM_D6,
+    MP_HAL_PIN_ALT_CAM_D7,
+    MP_HAL_PIN_ALT_CAM_D8,
+    MP_HAL_PIN_ALT_CAM_D9,
+    MP_HAL_PIN_ALT_CAM_D10,
+    MP_HAL_PIN_ALT_CAM_D11,
+    MP_HAL_PIN_ALT_CAM_D12,
+    MP_HAL_PIN_ALT_CAM_D13,
+    MP_HAL_PIN_ALT_CAM_D14,
+    MP_HAL_PIN_ALT_CAM_D15,
+    MP_HAL_PIN_ALT_CAM_HSYNC,
+    MP_HAL_PIN_ALT_CAM_PCLK,
+    MP_HAL_PIN_ALT_CAM_VSYNC,
+    MP_HAL_PIN_ALT_CAM_XVCLK,
+    MP_HAL_PIN_ALT_CDC_D0,
+    MP_HAL_PIN_ALT_CDC_D1,
+    MP_HAL_PIN_ALT_CDC_D2,
+    MP_HAL_PIN_ALT_CDC_D3,
+    MP_HAL_PIN_ALT_CDC_D4,
+    MP_HAL_PIN_ALT_CDC_D5,
+    MP_HAL_PIN_ALT_CDC_D6,
+    MP_HAL_PIN_ALT_CDC_D7,
+    MP_HAL_PIN_ALT_CDC_D8,
+    MP_HAL_PIN_ALT_CDC_D9,
+    MP_HAL_PIN_ALT_CDC_D10,
+    MP_HAL_PIN_ALT_CDC_D11,
+    MP_HAL_PIN_ALT_CDC_D12,
+    MP_HAL_PIN_ALT_CDC_D13,
+    MP_HAL_PIN_ALT_CDC_D14,
+    MP_HAL_PIN_ALT_CDC_D15,
+    MP_HAL_PIN_ALT_CDC_D16,
+    MP_HAL_PIN_ALT_CDC_D17,
+    MP_HAL_PIN_ALT_CDC_D18,
+    MP_HAL_PIN_ALT_CDC_D19,
+    MP_HAL_PIN_ALT_CDC_D20,
+    MP_HAL_PIN_ALT_CDC_D21,
+    MP_HAL_PIN_ALT_CDC_D22,
+    MP_HAL_PIN_ALT_CDC_D23,
+    MP_HAL_PIN_ALT_CDC_DE,
+    MP_HAL_PIN_ALT_CDC_HSYNC,
+    MP_HAL_PIN_ALT_CDC_PCLK,
+    MP_HAL_PIN_ALT_CDC_VSYNC,
+    MP_HAL_PIN_ALT_CMP_OUT,
+    MP_HAL_PIN_ALT_ETH_CRS_DV_A,
+    MP_HAL_PIN_ALT_ETH_CRS_DV_B,
+    MP_HAL_PIN_ALT_ETH_CRS_DV_C,
+    MP_HAL_PIN_ALT_ETH_IRQ,
+    MP_HAL_PIN_ALT_ETH_MDC,
+    MP_HAL_PIN_ALT_ETH_MDIO,
+    MP_HAL_PIN_ALT_ETH_REFCLK,
+    MP_HAL_PIN_ALT_ETH_RST,
+    MP_HAL_PIN_ALT_ETH_RXD0,
+    MP_HAL_PIN_ALT_ETH_RXD1,
+    MP_HAL_PIN_ALT_ETH_TXD0,
+    MP_HAL_PIN_ALT_ETH_TXD1,
+    MP_HAL_PIN_ALT_ETH_TXEN,
+    MP_HAL_PIN_ALT_FAULT_A,
+    MP_HAL_PIN_ALT_FAULT_B,
+    MP_HAL_PIN_ALT_FAULT_C,
+    MP_HAL_PIN_ALT_HFXO_OUT,
+    MP_HAL_PIN_ALT_I2C_SCL,
+    MP_HAL_PIN_ALT_I2C_SDA,
+    MP_HAL_PIN_ALT_I2S_SCLK,
+    MP_HAL_PIN_ALT_I2S_SDI,
+    MP_HAL_PIN_ALT_I2S_SDO,
+    MP_HAL_PIN_ALT_I2S_WS,
+    MP_HAL_PIN_ALT_I3C_SCL,
+    MP_HAL_PIN_ALT_I3C_SDA,
+    MP_HAL_PIN_ALT_JTAG_TCK,
+    MP_HAL_PIN_ALT_JTAG_TDATA0,
+    MP_HAL_PIN_ALT_JTAG_TDATA1,
+    MP_HAL_PIN_ALT_JTAG_TDATA2,
+    MP_HAL_PIN_ALT_JTAG_TDATA3,
+    MP_HAL_PIN_ALT_JTAG_TDI,
+    MP_HAL_PIN_ALT_JTAG_TDO,
+    MP_HAL_PIN_ALT_JTAG_TMS,
+    MP_HAL_PIN_ALT_JTAG_TRACECLK,
+    MP_HAL_PIN_ALT_LPCAM_D0,
+    MP_HAL_PIN_ALT_LPCAM_D1,
+    MP_HAL_PIN_ALT_LPCAM_D2,
+    MP_HAL_PIN_ALT_LPCAM_D3,
+    MP_HAL_PIN_ALT_LPCAM_D4,
+    MP_HAL_PIN_ALT_LPCAM_D5,
+    MP_HAL_PIN_ALT_LPCAM_D6,
+    MP_HAL_PIN_ALT_LPCAM_D7,
+    MP_HAL_PIN_ALT_LPCAM_HSYNC,
+    MP_HAL_PIN_ALT_LPCAM_PCLK,
+    MP_HAL_PIN_ALT_LPCAM_VSYNC,
+    MP_HAL_PIN_ALT_LPCAM_XVCLK,
+    MP_HAL_PIN_ALT_LPI2C_SCL,
+    MP_HAL_PIN_ALT_LPI2C_SDA,
+    MP_HAL_PIN_ALT_LPI2S_SCLK,
+    MP_HAL_PIN_ALT_LPI2S_SDI,
+    MP_HAL_PIN_ALT_LPI2S_SDO,
+    MP_HAL_PIN_ALT_LPI2S_WS,
+    MP_HAL_PIN_ALT_LPPDM_C0,
+    MP_HAL_PIN_ALT_LPPDM_C1,
+    MP_HAL_PIN_ALT_LPPDM_C2,
+    MP_HAL_PIN_ALT_LPPDM_C3,
+    MP_HAL_PIN_ALT_LPPDM_D0,
+    MP_HAL_PIN_ALT_LPPDM_D1,
+    MP_HAL_PIN_ALT_LPPDM_D2,
+    MP_HAL_PIN_ALT_LPPDM_D3,
+    MP_HAL_PIN_ALT_LPSPI_MISO,
+    MP_HAL_PIN_ALT_LPSPI_MOSI,
+    MP_HAL_PIN_ALT_LPSPI_SCLK,
+    MP_HAL_PIN_ALT_LPSPI_SS,
+    MP_HAL_PIN_ALT_LPTMR_CLK,
+    MP_HAL_PIN_ALT_LPUART_CTS,
+    MP_HAL_PIN_ALT_LPUART_RTS,
+    MP_HAL_PIN_ALT_LPUART_RX,
+    MP_HAL_PIN_ALT_LPUART_TX,
+    MP_HAL_PIN_ALT_OSPI_D0,
+    MP_HAL_PIN_ALT_OSPI_D1,
+    MP_HAL_PIN_ALT_OSPI_D2,
+    MP_HAL_PIN_ALT_OSPI_D3,
+    MP_HAL_PIN_ALT_OSPI_D4,
+    MP_HAL_PIN_ALT_OSPI_D5,
+    MP_HAL_PIN_ALT_OSPI_D6,
+    MP_HAL_PIN_ALT_OSPI_D7,
+    MP_HAL_PIN_ALT_OSPI_RXDS,
+    MP_HAL_PIN_ALT_OSPI_SCLK,
+    MP_HAL_PIN_ALT_OSPI_SCLKN,
+    MP_HAL_PIN_ALT_OSPI_SS0,
+    MP_HAL_PIN_ALT_OSPI_SS1,
+    MP_HAL_PIN_ALT_PDM_C0,
+    MP_HAL_PIN_ALT_PDM_C1,
+    MP_HAL_PIN_ALT_PDM_C2,
+    MP_HAL_PIN_ALT_PDM_C3,
+    MP_HAL_PIN_ALT_PDM_D0,
+    MP_HAL_PIN_ALT_PDM_D1,
+    MP_HAL_PIN_ALT_PDM_D2,
+    MP_HAL_PIN_ALT_PDM_D3,
+    MP_HAL_PIN_ALT_QEC_X,
+    MP_HAL_PIN_ALT_QEC_Y,
+    MP_HAL_PIN_ALT_QEC_Z,
+    MP_HAL_PIN_ALT_SD_CLK,
+    MP_HAL_PIN_ALT_SD_CMD,
+    MP_HAL_PIN_ALT_SD_D0,
+    MP_HAL_PIN_ALT_SD_D1,
+    MP_HAL_PIN_ALT_SD_D2,
+    MP_HAL_PIN_ALT_SD_D3,
+    MP_HAL_PIN_ALT_SD_D4,
+    MP_HAL_PIN_ALT_SD_D5,
+    MP_HAL_PIN_ALT_SD_D6,
+    MP_HAL_PIN_ALT_SD_D7,
+    MP_HAL_PIN_ALT_SD_RST,
+    MP_HAL_PIN_ALT_SPI_MISO,
+    MP_HAL_PIN_ALT_SPI_MOSI,
+    MP_HAL_PIN_ALT_SPI_SCLK,
+    MP_HAL_PIN_ALT_SPI_SS0,
+    MP_HAL_PIN_ALT_SPI_SS1,
+    MP_HAL_PIN_ALT_SPI_SS2,
+    MP_HAL_PIN_ALT_SPI_SS3,
+    MP_HAL_PIN_ALT_UART_CTS,
+    MP_HAL_PIN_ALT_UART_DE,
+    MP_HAL_PIN_ALT_UART_RTS,
+    MP_HAL_PIN_ALT_UART_RX,
+    MP_HAL_PIN_ALT_UART_TX,
+    MP_HAL_PIN_ALT_UT_T0,
+    MP_HAL_PIN_ALT_UT_T1,
+};
+
+typedef struct _machine_pin_obj_t {
+    mp_obj_base_t base;
+    GPIO_Type *gpio;
+    uint8_t port;
+    uint8_t pin;
+    uint8_t adc12_periph : 2;
+    uint8_t adc12_channel : 3;
+    qstr name;
+    const uint16_t alt[8]; // holds result of MP_HAL_PIN_ALT_MAKE(function, unit)
+} machine_pin_obj_t;
+
+mp_hal_pin_obj_t mp_hal_get_pin_obj(mp_obj_t pin_in);
+
+static inline qstr mp_hal_pin_name(mp_hal_pin_obj_t pin) {
+    return pin->name;
+}
+
+static inline void mp_hal_pin_input(mp_hal_pin_obj_t pin) {
+    uint8_t alt_func = PINMUX_ALTERNATE_FUNCTION_0;
+    uint8_t pad_ctrl = PADCTRL_READ_ENABLE;
+    pinconf_set(pin->port, pin->pin, alt_func, pad_ctrl);
+    gpio_set_direction_input(pin->gpio, pin->pin);
+}
+
+static inline void mp_hal_pin_output(mp_hal_pin_obj_t pin) {
+    uint8_t alt_func = PINMUX_ALTERNATE_FUNCTION_0;
+    uint8_t pad_ctrl = PADCTRL_READ_ENABLE;
+    pinconf_set(pin->port, pin->pin, alt_func, pad_ctrl);
+    gpio_set_direction_output(pin->gpio, pin->pin);
+}
+
+static inline void mp_hal_pin_open_drain(mp_hal_pin_obj_t pin) {
+    uint8_t alt_func = PINMUX_ALTERNATE_FUNCTION_0;
+    uint8_t pad_ctrl = PADCTRL_DRIVER_OPEN_DRAIN | PADCTRL_READ_ENABLE;
+    pinconf_set(pin->port, pin->pin, alt_func, pad_ctrl);
+    gpio_set_direction_output(pin->gpio, pin->pin);
+}
+
+static inline void mp_hal_pin_config_irq_falling(mp_hal_pin_obj_t pin, bool enable) {
+    if (enable) {
+        gpio_enable_interrupt(pin->gpio, pin->pin);
+        gpio_interrupt_set_edge_trigger(pin->gpio, pin->pin);
+        gpio_interrupt_set_polarity_low(pin->gpio, pin->pin);
+    } else {
+        gpio_disable_interrupt(pin->gpio, pin->pin);
+    }
+}
+
+static inline void mp_hal_pin_low(mp_hal_pin_obj_t pin) {
+    gpio_set_value_low(pin->gpio, pin->pin);
+}
+
+static inline void mp_hal_pin_high(mp_hal_pin_obj_t pin) {
+    gpio_set_value_high(pin->gpio, pin->pin);
+}
+
+static inline int mp_hal_pin_read(mp_hal_pin_obj_t pin) {
+    return gpio_get_value(pin->gpio, pin->pin);
+}
+
+static inline void mp_hal_pin_write(mp_hal_pin_obj_t pin, int v) {
+    if (v) {
+        mp_hal_pin_high(pin);
+    } else {
+        mp_hal_pin_low(pin);
+    }
+}
+
+static inline void mp_hal_pin_od_low(mp_hal_pin_obj_t pin) {
+    mp_hal_pin_low(pin);
+}
+
+static inline void mp_hal_pin_od_high(mp_hal_pin_obj_t pin) {
+    mp_hal_pin_high(pin);
+}
+
+static inline void mp_hal_wake_main_task_from_isr(void) {
+    // Defined for tinyusb support, nothing needs to be done here.
+}
+
+void mp_hal_pin_config(const machine_pin_obj_t *pin, uint32_t mode,
+    uint32_t pull, uint32_t speed, uint32_t drive, uint32_t alt, bool ren);
+
+// Include all the pin definitions.
+#include "genhdr/pins_board.h"
+
+/******************************************************************************/
+// Other HAL functions.
+
+enum {
+    MP_HAL_MAC_WLAN0 = 0,
+    MP_HAL_MAC_WLAN1,
+    MP_HAL_MAC_BDADDR,
+    MP_HAL_MAC_ETH0,
+};
+
+void mp_hal_generate_laa_mac(int idx, uint8_t buf[6]);
+void mp_hal_get_mac(int idx, uint8_t buf[6]);
+void mp_hal_get_mac_ascii(int idx, size_t chr_off, size_t chr_len, char *dest);
diff --git a/ports/alif/mpmetalport.c b/ports/alif/mpmetalport.c
new file mode 100644
index 0000000000000..9d774cb906766
--- /dev/null
+++ b/ports/alif/mpmetalport.c
@@ -0,0 +1,104 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * libmetal Alif port.
+ */
+
+#include ALIF_CMSIS_H
+#include "py/mperrno.h"
+#include "py/mphal.h"
+
+#include "metal/sys.h"
+#include "metal/utilities.h"
+#include "metal/device.h"
+
+#include "se_services.h"
+
+struct metal_state _metal;
+
+static bool metal_active;
+static mp_sched_node_t rproc_notify_node;
+
+int metal_sys_init(const struct metal_init_params *params) {
+    metal_unused(params);
+
+    // If cache management is not enabled, configure the MPU to disable
+    // caching for the entire Open-AMP shared memory region.
+    #ifndef VIRTIO_USE_DCACHE
+    ARM_MPU_Disable();
+    MPU->RNR = METAL_MPU_REGION_ID;
+    MPU->RBAR = ARM_MPU_RBAR(METAL_MPU_REGION_BASE, ARM_MPU_SH_NON, 0, 1, 1); // RO-0, NP-1, XN-1
+    MPU->RLAR = ARM_MPU_RLAR(METAL_MPU_REGION_BASE + METAL_MPU_REGION_SIZE - 1, MP_MPU_ATTR_NORMAL_NON_CACHEABLE);
+    ARM_MPU_Enable(MPU_CTRL_PRIVDEFENA_Msk | MPU_CTRL_HFNMIENA_Msk);
+    #endif
+
+    metal_bus_register(&metal_generic_bus);
+    metal_active = true;
+
+    return 0;
+}
+
+void metal_sys_finish(void) {
+    metal_active = false;
+    metal_bus_unregister(&metal_generic_bus);
+}
+
+unsigned int sys_irq_save_disable(void) {
+    return disable_irq();
+}
+
+void sys_irq_restore_enable(unsigned int state) {
+    enable_irq(state);
+}
+
+void *metal_machine_io_mem_map(void *va, metal_phys_addr_t pa,
+    size_t size, unsigned int flags) {
+    metal_unused(pa);
+    metal_unused(size);
+    metal_unused(flags);
+    return va;
+}
+
+void metal_machine_cache_flush(void *addr, unsigned int len) {
+    SCB_CleanDCache_by_Addr(addr, len);
+}
+
+void metal_machine_cache_invalidate(void *addr, unsigned int len) {
+    SCB_InvalidateDCache_by_Addr(addr, len);
+}
+
+int metal_rproc_notify(void *priv, uint32_t id) {
+    // Notify the remote core.
+    se_services_notify();
+    return 0;
+}
+
+void metal_rproc_notified(void) {
+    if (!metal_active) {
+        return;
+    }
+    // The remote core notified this core.
+    mp_sched_schedule_node(&rproc_notify_node, openamp_remoteproc_notified);
+}
diff --git a/ports/alif/mpmetalport.h b/ports/alif/mpmetalport.h
new file mode 100644
index 0000000000000..c11725a1f1e45
--- /dev/null
+++ b/ports/alif/mpmetalport.h
@@ -0,0 +1,76 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * libmetal alif port.
+ */
+#ifndef MICROPY_INCLUDED_ALIF_MPMETALPORT_H
+#define MICROPY_INCLUDED_ALIF_MPMETALPORT_H
+
+#include <stdlib.h>
+#include "py/mphal.h"
+#include "py/runtime.h"
+#include "mpu.h"
+
+#define METAL_HAVE_STDATOMIC_H      0
+#define METAL_HAVE_FUTEX_H          0
+
+#define METAL_MAX_DEVICE_REGIONS    2
+
+// Set to 1 to enable log output.
+#define METAL_LOG_HANDLER_ENABLE    0
+
+#define metal_cpu_yield()
+
+// Shared memory config
+#define METAL_SHM_NAME              "OPENAMP_SHM"
+// Note 1K must be reserved at the start of the openamp
+// shared memory region, for the shared resource table.
+#define METAL_RSC_ADDR              ((void *)_openamp_shm_region_start)
+#define METAL_RSC_SIZE              (1024)
+
+#define METAL_SHM_ADDR              ((metal_phys_addr_t)(_openamp_shm_region_start + METAL_RSC_SIZE))
+#define METAL_SHM_SIZE              ((size_t)(_openamp_shm_region_end - _openamp_shm_region_start - METAL_RSC_SIZE))
+
+#define METAL_MPU_REGION_ID         (MP_MPU_REGION_OPENAMP)
+#define METAL_MPU_REGION_BASE       ((uint32_t)_openamp_shm_region_start)
+#define METAL_MPU_REGION_SIZE       (0x00010000U)
+
+extern const char _openamp_shm_region_start[];
+extern const char _openamp_shm_region_end[];
+
+int metal_rproc_notify(void *priv, uint32_t id);
+extern void openamp_remoteproc_notified(mp_sched_node_t *node);
+
+static inline int __metal_sleep_usec(unsigned int usec) {
+    mp_hal_delay_us(usec);
+    return 0;
+}
+
+static inline void metal_generic_default_poll(void) {
+    mp_event_handle_nowait();
+    __WFI();
+}
+
+#endif // MICROPY_INCLUDED_ALIF_METAL_PORT_H
diff --git a/ports/alif/mpnetworkport.c b/ports/alif/mpnetworkport.c
new file mode 100644
index 0000000000000..40def7f7fd7e9
--- /dev/null
+++ b/ports/alif/mpnetworkport.c
@@ -0,0 +1,80 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024-2025 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "py/mphal.h"
+#include "py/obj.h"
+
+#if MICROPY_PY_LWIP
+
+#include "shared/runtime/softtimer.h"
+#include "lwip/timeouts.h"
+
+#if MICROPY_PY_NETWORK_CYW43
+#include "lib/cyw43-driver/src/cyw43.h"
+#endif
+
+// Poll lwIP every 64ms by default
+#define LWIP_TICK_RATE_MS 64
+
+// Soft timer for running lwIP in the background.
+static soft_timer_entry_t mp_network_soft_timer;
+
+u32_t sys_now(void) {
+    return mp_hal_ticks_ms();
+}
+
+// This is called by soft_timer and executes at PendSV level.
+static void mp_network_soft_timer_callback(soft_timer_entry_t *self) {
+    // Run the lwIP internal updates.
+    sys_check_timeouts();
+
+    #if LWIP_NETIF_LOOPBACK
+    netif_poll_all();
+    #endif
+
+    #if MICROPY_PY_NETWORK_CYW43
+    if (cyw43_poll) {
+        if (cyw43_sleep != 0) {
+            if (--cyw43_sleep == 0) {
+                cyw43_poll();
+            }
+        }
+    }
+    #endif
+}
+
+void mod_network_lwip_init(void) {
+    soft_timer_static_init(
+        &mp_network_soft_timer,
+        SOFT_TIMER_MODE_PERIODIC,
+        LWIP_TICK_RATE_MS,
+        mp_network_soft_timer_callback
+        );
+
+    soft_timer_reinsert(&mp_network_soft_timer, LWIP_TICK_RATE_MS);
+}
+
+#endif // MICROPY_PY_LWIP
diff --git a/ports/alif/mpnimbleport.c b/ports/alif/mpnimbleport.c
new file mode 100644
index 0000000000000..8da5ce293c9bd
--- /dev/null
+++ b/ports/alif/mpnimbleport.c
@@ -0,0 +1,78 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Jim Mussared
+ * Copyright (c) 2020 Damien P. George
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "py/runtime.h"
+#include "py/mperrno.h"
+#include "py/mphal.h"
+
+#if MICROPY_PY_BLUETOOTH && MICROPY_BLUETOOTH_NIMBLE
+
+#define DEBUG_printf(...) // printf("mpnimbleport.c: " __VA_ARGS__)
+
+#include "host/ble_hs.h"
+#include "nimble/nimble_npl.h"
+
+#include "extmod/mpbthci.h"
+#include "extmod/modbluetooth.h"
+#include "extmod/nimble/modbluetooth_nimble.h"
+#include "extmod/nimble/hal/hal_uart.h"
+#include "mpbthciport.h"
+
+// Get any pending data from the UART and send it to NimBLE's HCI buffers.
+// Any further processing by NimBLE will be run via its event queue.
+void mp_bluetooth_hci_poll(void) {
+    if (mp_bluetooth_nimble_ble_state >= MP_BLUETOOTH_NIMBLE_BLE_STATE_WAITING_FOR_SYNC) {
+        // DEBUG_printf("mp_bluetooth_hci_poll_uart %d\n", mp_bluetooth_nimble_ble_state);
+
+        // Run any timers.
+        mp_bluetooth_nimble_os_callout_process();
+
+        // Process incoming UART data, and run events as they are generated.
+        mp_bluetooth_nimble_hci_uart_process(true);
+
+        // Run any remaining events (e.g. if there was no UART data).
+        mp_bluetooth_nimble_os_eventq_run_all();
+    }
+
+    if (mp_bluetooth_nimble_ble_state != MP_BLUETOOTH_NIMBLE_BLE_STATE_OFF) {
+        // Call this function again in 128ms to check for new events.
+        // TODO: improve this by only calling back when needed.
+        mp_bluetooth_hci_poll_in_ms(128);
+    }
+}
+
+// --- Port-specific helpers for the generic NimBLE bindings. -----------------
+
+void mp_bluetooth_nimble_hci_uart_wfi(void) {
+    __WFE();
+
+    // This is called while NimBLE is waiting in ble_npl_sem_pend, i.e. waiting for an HCI ACK.
+    // Do not need to run events here (it must not invoke Python code), only processing incoming HCI data.
+    mp_bluetooth_nimble_hci_uart_process(false);
+}
+
+#endif // MICROPY_PY_BLUETOOTH && MICROPY_BLUETOOTH_NIMBLE
diff --git a/ports/alif/mpnimbleport.h b/ports/alif/mpnimbleport.h
new file mode 100644
index 0000000000000..150ec42da76d7
--- /dev/null
+++ b/ports/alif/mpnimbleport.h
@@ -0,0 +1,32 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Jim Mussared
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef MICROPY_INCLUDED_ALIF_NIMBLE_PORT_H
+#define MICROPY_INCLUDED_ALIF_NIMBLE_PORT_H
+
+// To allow MICROPY_HW_BLE_UART_ID to be resolved.
+
+#endif // MICROPY_INCLUDED_ALIF_NIMBLE_PORT_H
diff --git a/ports/alif/mpremoteprocport.c b/ports/alif/mpremoteprocport.c
new file mode 100644
index 0000000000000..27210a824057e
--- /dev/null
+++ b/ports/alif/mpremoteprocport.c
@@ -0,0 +1,172 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * modremoteproc alif port.
+ */
+
+#include <stdio.h>
+#include <stdint.h>
+
+#include "py/obj.h"
+#include "py/runtime.h"
+
+#include "metal/alloc.h"
+#include "metal/errno.h"
+#include "metal/io.h"
+#include "metal/sys.h"
+#include "metal/device.h"
+#include "metal/utilities.h"
+#include "extmod/modopenamp_remoteproc.h"
+#include "se_services.h"
+
+typedef struct mmap {
+    uintptr_t base;
+    uintptr_t limit;
+} mmap_t;
+
+static const mmap_t mmap_nocache[] = {
+    { .base = ITCM_BASE, .limit = ITCM_BASE + ITCM_SIZE },
+    { .base = DTCM_BASE, .limit = DTCM_BASE + ITCM_SIZE },
+    { .base = MRAM_BASE, .limit = MRAM_BASE + MRAM_SIZE }
+};
+
+static bool is_cacheable(const void *p, size_t bytes) {
+    uintptr_t base = (uintptr_t)p;
+    if (bytes == 0) {
+        return false;
+    }
+    uintptr_t limit = base + bytes;
+    for (unsigned int i = 0; i < sizeof(mmap_nocache) / sizeof(mmap_nocache[0]); i++) {
+        if (base >= mmap_nocache[i].base && limit < mmap_nocache[i].limit) {
+            return false;
+        }
+    }
+    return true;
+}
+
+struct remoteproc *mp_openamp_remoteproc_init(struct remoteproc *rproc,
+    const struct remoteproc_ops *ops, void *arg) {
+    metal_log(METAL_LOG_DEBUG, "rproc_init()\n");
+
+    rproc->ops = ops;
+    rproc->state = RPROC_OFFLINE;
+    // Allocate the image store and save it in private data.
+    rproc->priv = mp_openamp_remoteproc_store_alloc();
+
+    // Reset the remote core.
+    se_services_boot_reset_cpu(EXTSYS_1);
+    return rproc;
+}
+
+void *mp_openamp_remoteproc_mmap(struct remoteproc *rproc, metal_phys_addr_t *pa,
+    metal_phys_addr_t *da, size_t size, unsigned int attribute,
+    struct metal_io_region **io) {
+    metal_log(METAL_LOG_DEBUG, "rproc_mmap(): pa 0x%p da 0x%p io 0x%p size %u\n", *pa, *da, *io, size);
+
+    struct remoteproc_mem *mem;
+    metal_phys_addr_t lpa = *pa;
+    metal_phys_addr_t lda = *da;
+
+    if (lda == METAL_BAD_PHYS) {
+        return NULL;
+    }
+
+    if (lpa == METAL_BAD_PHYS) {
+        lpa = lda;
+    }
+
+    // Currently this port doesn't support loading firmware to flash,
+    // only SD/SRAM images are supported. Check of load address is in
+    // the flash region, and if so return NULL.
+    if (lda >= MRAM_BASE && lda < (MRAM_BASE + MRAM_SIZE)) {
+        return NULL;
+    }
+
+    mem = metal_allocate_memory(sizeof(*mem));
+    if (!mem) {
+        return NULL;
+    }
+
+    *io = metal_allocate_memory(sizeof(struct metal_io_region));
+    if (!*io) {
+        metal_free_memory(mem);
+        return NULL;
+    }
+
+    remoteproc_init_mem(mem, NULL, lpa, lda, size, *io);
+
+    metal_io_init(*io, (void *)mem->da, &mem->pa, size,
+        sizeof(metal_phys_addr_t) << 3, attribute, NULL);
+
+    remoteproc_add_mem(rproc, mem);
+    *pa = lpa;
+    *da = lda;
+    return metal_io_phys_to_virt(*io, mem->pa);
+}
+
+int mp_openamp_remoteproc_start(struct remoteproc *rproc) {
+    metal_log(METAL_LOG_DEBUG, "rproc_start()\n");
+
+    // Flush cached areas for the remote core.
+    struct metal_list *node;
+    metal_list_for_each(&rproc->mems, node) {
+        struct remoteproc_mem *mem;
+        mem = metal_container_of(node, struct remoteproc_mem, node);
+        if (is_cacheable((uint32_t *)mem->pa, mem->size)) {
+            SCB_CleanDCache_by_Addr((uint32_t *)mem->pa, mem->size);
+        }
+    }
+
+    se_services_boot_reset_cpu(EXTSYS_1);
+    se_services_boot_cpu(EXTSYS_1, (uint32_t)rproc->bootaddr);  // GlobalToLocal
+    return 0;
+}
+
+int mp_openamp_remoteproc_stop(struct remoteproc *rproc) {
+    metal_log(METAL_LOG_DEBUG, "rproc_stop()\n");
+    if (rproc->state == RPROC_RUNNING) {
+        se_services_boot_reset_cpu(EXTSYS_1);
+    }
+    return 0;
+}
+
+int mp_openamp_remoteproc_config(struct remoteproc *rproc, void *data) {
+    metal_log(METAL_LOG_DEBUG, "rproc_config()\n");
+    (void)rproc;
+    return 0;
+}
+
+void mp_openamp_remoteproc_remove(struct remoteproc *rproc) {
+    metal_log(METAL_LOG_DEBUG, "rproc_remove()\n");
+    (void)rproc;
+}
+
+int mp_openamp_remoteproc_shutdown(struct remoteproc *rproc) {
+    metal_log(METAL_LOG_DEBUG, "rproc_shutdown()\n");
+    if (rproc->state == RPROC_RUNNING) {
+        se_services_boot_reset_cpu(EXTSYS_1);
+    }
+    return 0;
+}
diff --git a/ports/alif/mpu.c b/ports/alif/mpu.c
new file mode 100644
index 0000000000000..9a051794de845
--- /dev/null
+++ b/ports/alif/mpu.c
@@ -0,0 +1,93 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "py/mpconfig.h"
+#include "irq.h"
+#include "mpu.h"
+#include ALIF_CMSIS_H
+
+static const ARM_MPU_Region_t mpu_table[] __STARTUP_RO_DATA_ATTRIBUTE = {
+    [MP_MPU_REGION_SRAM0] = {   /* SRAM0 - 4MB : RO-0, NP-1, XN-0 */
+        .RBAR = ARM_MPU_RBAR(0x02000000, ARM_MPU_SH_NON, 0, 1, 0),
+        .RLAR = ARM_MPU_RLAR(0x023FFFFF, MP_MPU_ATTR_NORMAL_WT_RA_TRANSIENT)
+    },
+    [MP_MPU_REGION_SRAM1] = {   /* SRAM1 - 2.5MB : RO-0, NP-1, XN-0 */
+        .RBAR = ARM_MPU_RBAR(0x08000000, ARM_MPU_SH_NON, 0, 1, 0),
+        .RLAR = ARM_MPU_RLAR(0x0827FFFF, MP_MPU_ATTR_NORMAL_WB_RA_WA)
+    },
+    [MP_MPU_REGION_HOST_PERIPHERALS] = {   /* Host Peripherals - 16MB : RO-0, NP-1, XN-1 */
+        .RBAR = ARM_MPU_RBAR(0x1A000000, ARM_MPU_SH_NON, 0, 1, 1),
+        .RLAR = ARM_MPU_RLAR(0x1AFFFFFF, MP_MPU_ATTR_DEVICE_nGnRE)
+    },
+    [MP_MPU_REGION_MRAM] = {   /* MRAM - 5.5MB : RO-1, NP-1, XN-0  */
+        .RBAR = ARM_MPU_RBAR(0x80000000, ARM_MPU_SH_NON, 1, 1, 0),
+        .RLAR = ARM_MPU_RLAR(0x8057FFFF, MP_MPU_ATTR_NORMAL_WT_RA)
+    },
+    [MP_MPU_REGION_OSPI_REGISTERS] = {   /* OSPI Regs - 16MB : RO-0, NP-1, XN-1  */
+        .RBAR = ARM_MPU_RBAR(0x83000000, ARM_MPU_SH_NON, 0, 1, 1),
+        .RLAR = ARM_MPU_RLAR(0x83FFFFFF, MP_MPU_ATTR_DEVICE_nGnRE)
+    },
+    [MP_MPU_REGION_OSPI0_XIP] = {   /* OSPI0 XIP flash - 512MB : RO-1, NP-1, XN-0  */
+        .RBAR = ARM_MPU_RBAR(0xA0000000, ARM_MPU_SH_NON, 1, 1, 0),
+        .RLAR = ARM_MPU_RLAR(0xBFFFFFFF, MP_MPU_ATTR_NORMAL_NON_CACHEABLE)
+    },
+    [MP_MPU_REGION_OSPI1_XIP] = {   /* OSPI1 XIP flash - 512MB : RO-1, NP-1, XN-0  */
+        .RBAR = ARM_MPU_RBAR(0xC0000000, ARM_MPU_SH_NON, 1, 1, 0),
+        .RLAR = ARM_MPU_RLAR(0xDFFFFFFF, MP_MPU_ATTR_NORMAL_NON_CACHEABLE)
+    },
+};
+
+void MPU_Load_Regions(void) {
+    // Configure memory attributes.
+
+    ARM_MPU_SetMemAttr(MP_MPU_ATTR_NORMAL_WT_RA_TRANSIENT,
+        ARM_MPU_ATTR(ARM_MPU_ATTR_MEMORY_(0, 0, 1, 0), ARM_MPU_ATTR_MEMORY_(0, 0, 1, 0)));
+
+    ARM_MPU_SetMemAttr(MP_MPU_ATTR_DEVICE_nGnRE,
+        ARM_MPU_ATTR(ARM_MPU_ATTR_DEVICE, ARM_MPU_ATTR_DEVICE_nGnRE));
+
+    ARM_MPU_SetMemAttr(MP_MPU_ATTR_NORMAL_WB_RA_WA,
+        ARM_MPU_ATTR(ARM_MPU_ATTR_MEMORY_(1, 1, 1, 1), ARM_MPU_ATTR_MEMORY_(1, 1, 1, 1)));
+
+    ARM_MPU_SetMemAttr(MP_MPU_ATTR_NORMAL_WT_RA,
+        ARM_MPU_ATTR(ARM_MPU_ATTR_MEMORY_(1, 0, 1, 0), ARM_MPU_ATTR_MEMORY_(1, 0, 1, 0)));
+
+    ARM_MPU_SetMemAttr(MP_MPU_ATTR_NORMAL_NON_CACHEABLE,
+        ARM_MPU_ATTR(ARM_MPU_ATTR_NON_CACHEABLE, ARM_MPU_ATTR_NON_CACHEABLE));
+
+    // Load the MPU regions from the table.
+    ARM_MPU_Load(0, mpu_table, sizeof(mpu_table) / sizeof(ARM_MPU_Region_t));
+}
+
+void mpu_config_mram(bool read_only) {
+    uintptr_t atomic = disable_irq();
+    ARM_MPU_Disable();
+    MPU->RNR = MP_MPU_REGION_MRAM;
+    MPU->RBAR = ARM_MPU_RBAR(MRAM_BASE, ARM_MPU_SH_NON, read_only, 1, 0);
+    MPU->RLAR = ARM_MPU_RLAR(MRAM_BASE + MRAM_SIZE - 1, MP_MPU_ATTR_NORMAL_WT_RA);
+    ARM_MPU_Enable(MPU_CTRL_PRIVDEFENA_Msk | MPU_CTRL_HFNMIENA_Msk);
+    enable_irq(atomic);
+}
diff --git a/ports/alif/mpu.h b/ports/alif/mpu.h
new file mode 100644
index 0000000000000..f4df496683e55
--- /dev/null
+++ b/ports/alif/mpu.h
@@ -0,0 +1,44 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include <stdbool.h>
+
+#define MP_MPU_ATTR_NORMAL_WT_RA_TRANSIENT  (0)
+#define MP_MPU_ATTR_DEVICE_nGnRE            (1)
+#define MP_MPU_ATTR_NORMAL_WB_RA_WA         (2)
+#define MP_MPU_ATTR_NORMAL_WT_RA            (3)
+#define MP_MPU_ATTR_NORMAL_NON_CACHEABLE    (4)
+
+#define MP_MPU_REGION_SRAM0                 (0)
+#define MP_MPU_REGION_SRAM1                 (1)
+#define MP_MPU_REGION_HOST_PERIPHERALS      (2)
+#define MP_MPU_REGION_MRAM                  (3)
+#define MP_MPU_REGION_OSPI_REGISTERS        (4)
+#define MP_MPU_REGION_OSPI0_XIP             (5)
+#define MP_MPU_REGION_OSPI1_XIP             (6)
+#define MP_MPU_REGION_OPENAMP               (7)
+
+void mpu_config_mram(bool read_only);
diff --git a/ports/alif/mpuart.c b/ports/alif/mpuart.c
new file mode 100644
index 0000000000000..b646e6f2be471
--- /dev/null
+++ b/ports/alif/mpuart.c
@@ -0,0 +1,346 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "py/mphal.h"
+#include "py/runtime.h"
+#include "shared/runtime/softtimer.h"
+#include "mpuart.h"
+#include "sys_ctrl_uart.h"
+
+#define mp_container_of(ptr, structure, member) (void *)((uintptr_t)(ptr) - offsetof(structure, member))
+
+#define UART_LSR_TEMT_Pos (6)
+#define SYST_PCLK (100000000)
+
+#define CALCULATE_BITS_PER_CHAR(data_bits, parity, stop_bits) \
+    (1 + ((data_bits) + 5) + ((parity) != UART_PARITY_NONE) + ((stop_bits) + 1))
+
+typedef struct _uart_state_t {
+    UART_TRANSFER_STATUS status;
+    uint32_t baudrate;
+    uint32_t bits_per_char;
+    ringbuf_t *rx_ringbuf;
+    const uint8_t *tx_src;
+    const uint8_t *tx_src_max;
+    soft_timer_entry_t rx_idle_timer;
+    unsigned int irq_trigger;
+    void (*irq_callback)(unsigned int uart_id, unsigned int trigger);
+} uart_state_t;
+
+static const uint8_t uart_irqn[UART_MAX] = {
+    UART0_IRQ_IRQn,
+    UART1_IRQ_IRQn,
+    UART2_IRQ_IRQn,
+    UART3_IRQ_IRQn,
+    UART4_IRQ_IRQn,
+    UART5_IRQ_IRQn,
+    UART6_IRQ_IRQn,
+    UART7_IRQ_IRQn,
+};
+
+static UART_Type *const uart_periph[UART_MAX] = {
+    (UART_Type *)UART0_BASE,
+    (UART_Type *)UART1_BASE,
+    (UART_Type *)UART2_BASE,
+    (UART_Type *)UART3_BASE,
+    (UART_Type *)UART4_BASE,
+    (UART_Type *)UART5_BASE,
+    (UART_Type *)UART6_BASE,
+    (UART_Type *)UART7_BASE,
+};
+
+static uart_state_t uart_state[UART_MAX];
+
+// This is called by soft_timer and executes at IRQ_PRI_PENDSV.
+static void rx_idle_timer_callback(soft_timer_entry_t *self) {
+    uart_state_t *state = mp_container_of(self, uart_state_t, rx_idle_timer);
+    if (state->irq_callback != NULL && state->irq_trigger & MP_UART_IRQ_RXIDLE) {
+        unsigned int uart_id = state - &uart_state[0];
+        state->irq_callback(uart_id, MP_UART_IRQ_RXIDLE);
+    }
+}
+
+void mp_uart_init(unsigned int uart_id, uint32_t baudrate,
+    UART_DATA_BITS data_bits, UART_PARITY parity, UART_STOP_BITS stop_bits,
+    mp_hal_pin_obj_t tx, mp_hal_pin_obj_t rx, ringbuf_t *rx_ringbuf) {
+
+    UART_Type *uart = uart_periph[uart_id];
+    uart_state_t *state = &uart_state[uart_id];
+
+    // Configure TX/RX pins.
+    mp_hal_pin_config(tx, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE,
+        MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT(UART_TX, uart_id), false);
+    mp_hal_pin_config(rx, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE,
+        MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT(UART_RX, uart_id), true);
+
+    // Configure the UART peripheral.
+    select_uart_clock_syst_pclk(uart_id);
+    enable_uart_clock(uart_id);
+    uart_software_reset(uart);
+    uart_enable_fifo(uart);
+    uart_disable_tx_irq(uart);
+    uart_disable_rx_irq(uart);
+    uart_set_baudrate(uart, SYST_PCLK, baudrate);
+    uart_set_data_parity_stop_bits(uart, data_bits, parity, stop_bits);
+    uart_set_flow_control(uart, UART_FLOW_CONTROL_NONE);
+    uart->UART_FCR |= UART_FCR_RCVR_FIFO_RESET;
+    uart_set_tx_trigger(uart, UART_TX_FIFO_EMPTY);
+    uart_set_rx_trigger(uart, UART_RX_FIFO_QUARTER_FULL);
+
+    // Initialise the state.
+    state->status = UART_TRANSFER_STATUS_NONE;
+    state->baudrate = baudrate;
+    state->bits_per_char = CALCULATE_BITS_PER_CHAR(data_bits, parity, stop_bits);
+    state->rx_ringbuf = rx_ringbuf;
+    state->tx_src = NULL;
+    state->tx_src_max = NULL;
+    state->irq_trigger = 0;
+    state->irq_callback = NULL;
+
+    // Enable interrupts.
+    NVIC_ClearPendingIRQ(uart_irqn[uart_id]);
+    NVIC_SetPriority(uart_irqn[uart_id], IRQ_PRI_UART_REPL);
+    NVIC_EnableIRQ(uart_irqn[uart_id]);
+    uart_enable_rx_irq(uart);
+
+    soft_timer_static_init(&state->rx_idle_timer, SOFT_TIMER_MODE_ONE_SHOT, 0, rx_idle_timer_callback);
+}
+
+void mp_uart_deinit(unsigned int uart_id) {
+    UART_Type *uart = uart_periph[uart_id];
+
+    uart_disable_rx_irq(uart);
+    NVIC_DisableIRQ(uart_irqn[uart_id]);
+}
+
+void mp_uart_set_irq_callback(unsigned int uart_id, unsigned int trigger, void (*callback)(unsigned int uart_id, unsigned int trigger)) {
+    UART_Type *uart = uart_periph[uart_id];
+    uart_state_t *state = &uart_state[uart_id];
+    state->irq_trigger = trigger;
+    state->irq_callback = callback;
+    if (trigger & MP_UART_IRQ_RX) {
+        uart_set_rx_trigger(uart, UART_RX_ONE_CHAR_IN_FIFO);
+    } else {
+        uart_set_rx_trigger(uart, UART_RX_FIFO_QUARTER_FULL);
+    }
+}
+
+void mp_uart_set_flow(unsigned int uart_id, mp_hal_pin_obj_t rts, mp_hal_pin_obj_t cts) {
+    UART_Type *uart = uart_periph[uart_id];
+
+    unsigned int flow = UART_FLOW_CONTROL_NONE;
+    if (rts != NULL) {
+        flow |= UART_FLOW_CONTROL_RTS;
+        mp_hal_pin_config(rts, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE,
+            MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT(UART_RTS, uart_id), false);
+    }
+    if (cts != NULL) {
+        flow |= UART_FLOW_CONTROL_CTS;
+        mp_hal_pin_config(cts, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE,
+            MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT(UART_CTS, uart_id), true);
+    }
+    uart_set_flow_control(uart, flow);
+}
+
+void mp_uart_set_baudrate(unsigned int uart_id, uint32_t baudrate) {
+    UART_Type *uart = uart_periph[uart_id];
+    uart_state_t *state = &uart_state[uart_id];
+
+    state->baudrate = baudrate;
+    uart_set_baudrate(uart, SYST_PCLK, baudrate);
+}
+
+void mp_uart_set_bits_parity_stop(unsigned int uart_id, UART_DATA_BITS data_bits, UART_PARITY parity, UART_STOP_BITS stop_bits) {
+    UART_Type *uart = uart_periph[uart_id];
+    uart_state_t *state = &uart_state[uart_id];
+
+    state->bits_per_char = CALCULATE_BITS_PER_CHAR(data_bits, parity, stop_bits);
+    uart_set_data_parity_stop_bits(uart, data_bits, parity, stop_bits);
+}
+
+size_t mp_uart_rx_any(unsigned int uart_id) {
+    uart_state_t *state = &uart_state[uart_id];
+    if (state->rx_ringbuf != NULL) {
+        return ringbuf_avail(state->rx_ringbuf);
+    }
+    return 0;
+}
+
+size_t mp_uart_tx_any(unsigned int uart_id) {
+    UART_Type *uart = uart_periph[uart_id];
+    return uart->UART_TFL + !((uart->UART_LSR >> UART_LSR_TEMT_Pos) & 1);
+}
+
+int mp_uart_rx_char(unsigned int uart_id) {
+    uart_state_t *state = &uart_state[uart_id];
+    if (state->rx_ringbuf != NULL && ringbuf_avail(state->rx_ringbuf)) {
+        return ringbuf_get(state->rx_ringbuf);
+    }
+    return -1;
+}
+
+void mp_uart_tx_data_blocking(unsigned int uart_id, const uint8_t *src, size_t len) {
+    UART_Type *uart = uart_periph[uart_id];
+
+    for (size_t i = 0; i < len; ++i) {
+        for (;;) {
+            size_t tx_avail = UART_FIFO_DEPTH - uart->UART_TFL;
+            if (tx_avail > 0) {
+                break;
+            }
+            mp_event_handle_nowait();
+        }
+        uart->UART_THR = src[i];
+    }
+}
+
+void mp_uart_tx_data(unsigned int uart_id, const uint8_t *src, size_t len) {
+    UART_Type *uart = uart_periph[uart_id];
+
+    // Configure transmission, to be handled by IRQ.
+    uart_state_t *state = &uart_state[uart_id];
+    state->status = UART_TRANSFER_STATUS_NONE;
+    state->tx_src = src;
+    state->tx_src_max = src + len;
+
+    // Enable TX IRQ to start transmission.
+    uart_enable_tx_irq(uart);
+
+    // Wait for transfer to complete.
+    const uint32_t total_timeout_ms = 100 * len;
+    uint32_t start = mp_hal_ticks_ms();
+    while (state->status == UART_TRANSFER_STATUS_NONE) {
+        if (mp_hal_ticks_ms() - start > total_timeout_ms) {
+            break;
+        }
+        mp_event_wait_indefinite();
+    }
+
+    // Disable TX IRQ.
+    uart_disable_tx_irq(uart);
+}
+
+static void mp_uart_irq_handler(unsigned int uart_id) {
+    UART_Type *uart = uart_periph[uart_id];
+    uart_state_t *state = &uart_state[uart_id];
+
+    // Process pending interrupt (below is order of highest to lowest priority).
+    uint32_t iir = uart->UART_IIR & UART_IIR_INTERRUPT_ID_MASK;
+    switch (iir) {
+        case UART_IIR_RECEIVER_LINE_STATUS: {
+            uint32_t lsr = uart->UART_LSR;
+            if (lsr & (UART_LSR_RECEIVER_FIFO_ERR | UART_LSR_OVERRUN_ERR)) {
+                state->status = UART_TRANSFER_STATUS_ERROR;
+            }
+            break;
+        }
+
+        case UART_IIR_RECEIVED_DATA_AVAILABLE:
+        case UART_IIR_CHARACTER_TIMEOUT: {
+            bool had_char = false;
+            while (uart->UART_USR & UART_USR_RECEIVE_FIFO_NOT_EMPTY) {
+                for (uint32_t rfl = uart->UART_RFL; rfl; --rfl) {
+                    had_char = true;
+                    int c = uart->UART_RBR;
+                    #if MICROPY_HW_ENABLE_UART_REPL && MICROPY_KBD_EXCEPTION
+                    if (uart_id == MICROPY_HW_UART_REPL) {
+                        if (c == mp_interrupt_char) {
+                            mp_sched_keyboard_interrupt();
+                            continue;
+                        }
+                    }
+                    #endif
+                    if (state->rx_ringbuf != NULL) {
+                        ringbuf_put(state->rx_ringbuf, c);
+                    }
+                }
+            }
+
+            if (had_char) {
+                if (state->irq_callback != NULL && state->irq_trigger & MP_UART_IRQ_RX) {
+                    state->irq_callback(uart_id, MP_UART_IRQ_RX);
+                }
+            }
+
+            if (state->irq_trigger & MP_UART_IRQ_RXIDLE) {
+                // Wait for 2 characters worth of time before triggering the RXIDLE event.
+                soft_timer_reinsert(&state->rx_idle_timer, 2000 * state->bits_per_char / state->baudrate + 1);
+            }
+            break;
+        }
+
+        case UART_IIR_TRANSMIT_HOLDING_REG_EMPTY:
+            while (uart->UART_USR & UART_USR_TRANSMIT_FIFO_NOT_FULL) {
+                if (state->tx_src < state->tx_src_max) {
+                    uart->UART_THR = *state->tx_src++;
+                } else {
+                    uart_disable_tx_irq(uart);
+                    state->status = UART_TRANSFER_STATUS_SEND_COMPLETE;
+                    if (state->irq_callback != NULL && state->irq_trigger & MP_UART_IRQ_TXIDLE) {
+                        state->irq_callback(uart_id, MP_UART_IRQ_TXIDLE);
+                    }
+                    break;
+                }
+            }
+            break;
+
+        case UART_IIR_MODEM_STATUS:
+            (void)uart->UART_MSR;
+            break;
+    }
+
+    __SEV();
+}
+
+#define DEFINE_IRQ_HANDLER(id) \
+    void UART##id##_IRQHandler(void) { \
+        mp_uart_irq_handler(id); \
+    }
+
+DEFINE_IRQ_HANDLER(0)
+DEFINE_IRQ_HANDLER(1)
+DEFINE_IRQ_HANDLER(2)
+DEFINE_IRQ_HANDLER(3)
+DEFINE_IRQ_HANDLER(4)
+DEFINE_IRQ_HANDLER(5)
+DEFINE_IRQ_HANDLER(6)
+DEFINE_IRQ_HANDLER(7)
+
+#if MICROPY_HW_ENABLE_UART_REPL
+
+#define REPL_BAUDRATE (115200)
+
+void mp_uart_init_repl(void) {
+    mp_uart_init(MICROPY_HW_UART_REPL,
+        REPL_BAUDRATE, UART_DATA_BITS_8, UART_PARITY_NONE, UART_STOP_BITS_1,
+        pin_REPL_UART_TX, pin_REPL_UART_RX, &stdin_ringbuf);
+}
+
+void mp_uart_write_strn_repl(const char *str, size_t len) {
+    mp_uart_tx_data(MICROPY_HW_UART_REPL, (const uint8_t *)str, len);
+}
+
+#endif
diff --git a/ports/alif/mpuart.h b/ports/alif/mpuart.h
new file mode 100644
index 0000000000000..76dadaab38015
--- /dev/null
+++ b/ports/alif/mpuart.h
@@ -0,0 +1,55 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#ifndef MICROPY_INCLUDED_ALIF2_UART_H
+#define MICROPY_INCLUDED_ALIF2_UART_H
+
+#include "py/ringbuf.h"
+#include "uart.h"
+
+#define UART_MAX (8)
+#define MP_UART_IRQ_RX (1)
+#define MP_UART_IRQ_RXIDLE (2)
+#define MP_UART_IRQ_TXIDLE (4)
+
+void mp_uart_init(unsigned int uart_id, uint32_t baudrate,
+    UART_DATA_BITS data_bits, UART_PARITY parity, UART_STOP_BITS stop_bits,
+    mp_hal_pin_obj_t tx, mp_hal_pin_obj_t rx, ringbuf_t *rx_ringbuf);
+void mp_uart_deinit(unsigned int uart_id);
+
+void mp_uart_set_irq_callback(unsigned int uart_id, unsigned int trigger, void (*callback)(unsigned int uart_id, unsigned int trigger));
+void mp_uart_set_flow(unsigned int uart_id, mp_hal_pin_obj_t rts, mp_hal_pin_obj_t cts);
+void mp_uart_set_baudrate(unsigned int uart_id, uint32_t baudrate);
+void mp_uart_set_bits_parity_stop(unsigned int uart_id, UART_DATA_BITS data_bits, UART_PARITY parity, UART_STOP_BITS stop_bits);
+
+size_t mp_uart_rx_any(unsigned int uart_id);
+size_t mp_uart_tx_any(unsigned int uart_id);
+int mp_uart_rx_char(unsigned int uart_id);
+void mp_uart_tx_data(unsigned int uart_id, const uint8_t *src, size_t len);
+
+void mp_uart_init_repl(void);
+void mp_uart_write_strn_repl(const char *str, size_t len);
+
+#endif // MICROPY_INCLUDED_ALIF2_UART_H
diff --git a/ports/alif/msc_disk.c b/ports/alif/msc_disk.c
new file mode 100644
index 0000000000000..0b8ddddeda248
--- /dev/null
+++ b/ports/alif/msc_disk.c
@@ -0,0 +1,151 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020-2021 Damien P. George
+ * Copyright (c) 2024 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "py/mpconfig.h"
+#include "py/misc.h"
+#include "ospi_flash.h"
+#include "tusb.h"
+
+#if CFG_TUD_MSC
+
+#if MICROPY_FATFS_MAX_SS != MICROPY_HW_FLASH_BLOCK_SIZE_BYTES
+#error MICROPY_FATFS_MAX_SS must be the same size as MICROPY_HW_FLASH_BLOCK_SIZE_BYTES
+#endif
+
+#define BLOCK_SIZE          (MICROPY_HW_FLASH_BLOCK_SIZE_BYTES)
+#define BLOCK_COUNT         (MICROPY_HW_FLASH_STORAGE_FS_BYTES / BLOCK_SIZE)
+#define FLASH_BASE_ADDR     (MICROPY_HW_FLASH_STORAGE_BASE_ADDR)
+
+static bool ejected = false;
+
+// Invoked on SCSI_CMD_INQUIRY.
+// Fill vendor id, product id and revision with string up to 8, 16, 4 characters respectively.
+void tud_msc_inquiry_cb(uint8_t lun, uint8_t vendor_id[8], uint8_t product_id[16], uint8_t product_rev[4]) {
+    memcpy(vendor_id, MICROPY_HW_USB_MSC_INQUIRY_VENDOR_STRING, MIN(strlen(MICROPY_HW_USB_MSC_INQUIRY_VENDOR_STRING), 8));
+    memcpy(product_id, MICROPY_HW_USB_MSC_INQUIRY_PRODUCT_STRING, MIN(strlen(MICROPY_HW_USB_MSC_INQUIRY_PRODUCT_STRING), 16));
+    memcpy(product_rev, MICROPY_HW_USB_MSC_INQUIRY_REVISION_STRING, MIN(strlen(MICROPY_HW_USB_MSC_INQUIRY_REVISION_STRING), 4));
+}
+
+// Invoked on Test-Unit-Ready command.
+// Return true allowing host to read/write this LUN (e.g SD card inserted).
+bool tud_msc_test_unit_ready_cb(uint8_t lun) {
+    if (ejected) {
+        tud_msc_set_sense(lun, SCSI_SENSE_NOT_READY, 0x3a, 0x00);
+        return false;
+    }
+    return true;
+}
+
+// Invoked on SCSI_CMD_READ_CAPACITY_10 and SCSI_CMD_READ_FORMAT_CAPACITY to determine the disk size.
+void tud_msc_capacity_cb(uint8_t lun, uint32_t *block_count, uint16_t *block_size) {
+    *block_size = BLOCK_SIZE;
+    *block_count = BLOCK_COUNT;
+}
+
+// Invoked on Start-Stop-Unit command:
+// - Start = 0 : stopped power mode, if load_eject = 1 : unload disk storage
+// - Start = 1 : active mode, if load_eject = 1 : load disk storage
+bool tud_msc_start_stop_cb(uint8_t lun, uint8_t power_condition, bool start, bool load_eject) {
+    if (load_eject) {
+        if (start) {
+            // load disk storage
+            ejected = false;
+        } else {
+            // unload disk storage
+            ejected = true;
+        }
+    }
+    return true;
+}
+
+// Callback invoked on READ10 command.
+// Copy disk's data to buffer (up to bufsize) and return number of read bytes.
+int32_t tud_msc_read10_cb(uint8_t lun, uint32_t lba, uint32_t offset, void *buffer, uint32_t bufsize) {
+    uint32_t addr = FLASH_BASE_ADDR + lba * BLOCK_SIZE;
+    uint32_t block_count = bufsize / BLOCK_SIZE;
+    int ret = ospi_flash_read(addr, block_count * BLOCK_SIZE, buffer);
+    if (ret < 0) {
+        return ret;
+    }
+    return block_count * BLOCK_SIZE;
+}
+
+// Callback invoked on WRITE10 command.
+// Process data in buffer to disk's storage and return number of written bytes.
+int32_t tud_msc_write10_cb(uint8_t lun, uint32_t lba, uint32_t offset, uint8_t *buffer, uint32_t bufsize) {
+    if (bufsize < BLOCK_SIZE) {
+        // Workaround for issue with TinyUSB passing in a small buffer.
+        uint32_t addr = FLASH_BASE_ADDR + lba * BLOCK_SIZE + offset;
+        if (offset == 0) {
+            int ret = ospi_flash_erase_sector(addr);
+            if (ret < 0) {
+                return ret;
+            }
+        }
+        int ret = ospi_flash_write(addr, bufsize, buffer);
+        if (ret < 0) {
+            return ret;
+        }
+        return bufsize;
+    }
+
+    uint32_t addr = FLASH_BASE_ADDR + lba * BLOCK_SIZE;
+    uint32_t block_count = bufsize / BLOCK_SIZE;
+    for (uint32_t block = 0; block < block_count; ++block) {
+        int ret = ospi_flash_erase_sector(addr);
+        if (ret < 0) {
+            return ret;
+        }
+        ret = ospi_flash_write(addr, BLOCK_SIZE, buffer);
+        if (ret < 0) {
+            return ret;
+        }
+        addr += BLOCK_SIZE;
+        buffer += BLOCK_SIZE;
+    }
+    return block_count * BLOCK_SIZE;
+}
+
+// Callback invoked on a SCSI command that's not handled by TinyUSB.
+int32_t tud_msc_scsi_cb(uint8_t lun, uint8_t const scsi_cmd[16], void *buffer, uint16_t bufsize) {
+    int32_t resplen = 0;
+    switch (scsi_cmd[0]) {
+        case SCSI_CMD_PREVENT_ALLOW_MEDIUM_REMOVAL:
+            // Sync the logical unit if needed.
+            break;
+
+        default:
+            // Set Sense = Invalid Command Operation
+            tud_msc_set_sense(lun, SCSI_SENSE_ILLEGAL_REQUEST, 0x20, 0x00);
+            // negative means error -> tinyusb could stall and/or response with failed status
+            resplen = -1;
+            break;
+    }
+    return resplen;
+}
+
+#endif
diff --git a/ports/alif/nosys_stubs.c b/ports/alif/nosys_stubs.c
new file mode 100644
index 0000000000000..a394ec8f1cf66
--- /dev/null
+++ b/ports/alif/nosys_stubs.c
@@ -0,0 +1,46 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#include <errno.h>
+
+int _write(int handle, char *buffer, int size) {
+    errno = ENOSYS;
+    return -1;
+}
+
+int _read(int handle, char *buffer, int size) {
+    errno = ENOSYS;
+    return -1;
+}
+
+int _close(int f) {
+    errno = ENOSYS;
+    return -1;
+}
+
+int _lseek(int f, int ptr, int dir) {
+    errno = ENOSYS;
+    return -1;
+}
diff --git a/ports/alif/ospi_ext.c b/ports/alif/ospi_ext.c
new file mode 100644
index 0000000000000..6ddaaf4e5a325
--- /dev/null
+++ b/ports/alif/ospi_ext.c
@@ -0,0 +1,302 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include ALIF_CMSIS_H
+#include "ospi_ext.h"
+#include "ospi_xip_user.h"
+
+static void ospi_xip_disable(ospi_flash_cfg_t *ospi_cfg) {
+    ospi_cfg->aes_regs->aes_control &= ~AES_CONTROL_XIP_EN;
+}
+
+static void ospi_xip_enable(ospi_flash_cfg_t *ospi_cfg) {
+    ospi_cfg->aes_regs->aes_control |= AES_CONTROL_XIP_EN;
+    #if OSPI_XIP_ENABLE_AES_DECRYPTION
+    ospi_cfg->aes_regs->aes_control |= (AES_CONTROL_LD_KEY | AES_CONTROL_DECRYPT_EN);
+    #endif
+}
+
+// Standard SPI transfer.
+void ospi_spi_transfer(ospi_flash_cfg_t *ospi_cfg, size_t len, const uint8_t *buf_out, uint8_t *buf_in) {
+    ospi_writel(ospi_cfg, ser, 0);
+    spi_disable(ospi_cfg);
+
+    uint32_t ctrlr0 = CTRLR0_IS_MST
+        | (SINGLE << CTRLR0_SPI_FRF_OFFSET)
+        | (SPI_TMOD_TR << CTRLR0_TMOD_OFFSET)
+        | (CTRLR0_DFS_8bit << CTRLR0_DFS_OFFSET)
+    ;
+
+    uint32_t spi_ctrlr0 = TRANS_TYPE_STANDARD;
+
+    ospi_writel(ospi_cfg, ctrlr0, ctrlr0);
+    ospi_writel(ospi_cfg, ctrlr1, len - 1);
+    ospi_writel(ospi_cfg, spi_ctrlr0, spi_ctrlr0);
+    spi_enable(ospi_cfg);
+
+    // Buffer output data in SPI FIFO.
+    for (int i = 0; i < len; ++i) {
+        ospi_writel(ospi_cfg, data_reg, buf_out[i]);
+    }
+
+    // Enable the SPI peripheral.
+    ospi_writel(ospi_cfg, ser, ospi_cfg->ser);
+
+    // Read in data.
+    for (int i = 0; i < len; ++i) {
+        unsigned int timeout = 100000;
+        while (ospi_readl(ospi_cfg, rxflr) == 0) {
+            if (--timeout == 0) {
+                return;
+            }
+        }
+        buf_in[i] = ospi_readl(ospi_cfg, data_reg);
+    }
+}
+
+void ospi_setup_read_ext(ospi_flash_cfg_t *ospi_cfg, bool rxds, uint32_t inst_len, uint32_t addr_len, uint32_t data_len, uint32_t read_len, uint32_t wait_cycles) {
+    ospi_writel(ospi_cfg, ser, 0);
+    spi_disable(ospi_cfg);
+
+    uint32_t val = CTRLR0_IS_MST
+        | (OCTAL << CTRLR0_SPI_FRF_OFFSET)
+        | (TMOD_RO << CTRLR0_TMOD_OFFSET)
+        | (data_len << CTRLR0_DFS_OFFSET);
+
+    ospi_writel(ospi_cfg, ctrlr0, val);
+    ospi_writel(ospi_cfg, ctrlr1, read_len - 1);
+
+    if (ospi_cfg->ddr_en) {
+        val = TRANS_TYPE_FRF_DEFINED
+            | (rxds << CTRLR0_SPI_RXDS_EN_OFFSET)
+            | (1 << CTRLR0_SPI_DDR_EN_OFFSET)
+            | (inst_len << CTRLR0_INST_L_OFFSET)
+            | (addr_len << CTRLR0_ADDR_L_OFFSET)
+            | (wait_cycles << CTRLR0_WAIT_CYCLES_OFFSET);
+        if (inst_len == OSPI_INST_L_16bit) {
+            val |= 1 << CTRLR0_INST_DDR_EN_OFFSET;
+        }
+    } else {
+        val = TRANS_TYPE_FRF_DEFINED
+            | (rxds << CTRLR0_SPI_RXDS_EN_OFFSET)
+            | (inst_len << CTRLR0_INST_L_OFFSET)
+            | (addr_len << CTRLR0_ADDR_L_OFFSET)
+            | (wait_cycles << CTRLR0_WAIT_CYCLES_OFFSET);
+    }
+
+    ospi_writel(ospi_cfg, spi_ctrlr0, val);
+    ospi_cfg->rx_req = read_len;
+    spi_enable(ospi_cfg);
+}
+
+int ospi_recv_blocking_8bit_data(ospi_flash_cfg_t *ospi_cfg, uint32_t command, uint8_t *buffer) {
+    ospi_writel(ospi_cfg, data_reg, command);
+    ospi_writel(ospi_cfg, ser, ospi_cfg->ser);
+
+    ospi_cfg->rx_cnt = 0;
+
+    while (ospi_cfg->rx_cnt < ospi_cfg->rx_req) {
+        unsigned int timeout = 100000;
+        while (ospi_readl(ospi_cfg, rxflr) == 0) {
+            if (--timeout == 0) {
+                return -OSPI_ETIMEDOUT;
+            }
+        }
+        *buffer++ = ospi_readl(ospi_cfg, data_reg);
+        ospi_cfg->rx_cnt++;
+    }
+
+    return 0;
+}
+
+int ospi_recv_blocking_16bit_data(ospi_flash_cfg_t *ospi_cfg, uint32_t command, uint16_t *buffer) {
+    ospi_writel(ospi_cfg, data_reg, command);
+    ospi_writel(ospi_cfg, ser, ospi_cfg->ser);
+
+    ospi_cfg->rx_cnt = 0;
+
+    while (ospi_cfg->rx_cnt < ospi_cfg->rx_req) {
+        unsigned int timeout = 100000;
+        while (ospi_readl(ospi_cfg, rxflr) == 0) {
+            if (--timeout == 0) {
+                return -OSPI_ETIMEDOUT;
+            }
+        }
+        *buffer++ = ospi_readl(ospi_cfg, data_reg);
+        ospi_cfg->rx_cnt++;
+    }
+
+    return 0;
+}
+
+int ospi_recv_blocking_32bit_data(ospi_flash_cfg_t *ospi_cfg, uint32_t command, uint32_t *buffer) {
+    ospi_writel(ospi_cfg, data_reg, command);
+    ospi_writel(ospi_cfg, ser, ospi_cfg->ser);
+
+    ospi_cfg->rx_cnt = 0;
+
+    while (ospi_cfg->rx_cnt < ospi_cfg->rx_req) {
+        unsigned int timeout = 100000;
+        while (ospi_readl(ospi_cfg, rxflr) == 0) {
+            if (--timeout == 0) {
+                return -OSPI_ETIMEDOUT;
+            }
+        }
+        *buffer++ = __ROR(ospi_readl(ospi_cfg, data_reg), 16);
+        ospi_cfg->rx_cnt++;
+    }
+
+    return 0;
+}
+
+void ospi_setup_write_ext(ospi_flash_cfg_t *ospi_cfg, bool rxds, uint32_t inst_len, uint32_t addr_len, uint32_t data_len) {
+    ospi_writel(ospi_cfg, ser, 0);
+    spi_disable(ospi_cfg);
+
+    uint32_t val = CTRLR0_IS_MST
+        | (OCTAL << CTRLR0_SPI_FRF_OFFSET)
+        | (TMOD_TO << CTRLR0_TMOD_OFFSET)
+        | (data_len << CTRLR0_DFS_OFFSET);
+
+    ospi_writel(ospi_cfg, ctrlr0, val);
+    ospi_writel(ospi_cfg, ctrlr1, 0);
+
+    if (ospi_cfg->ddr_en) {
+        val = TRANS_TYPE_FRF_DEFINED
+            | (rxds << CTRLR0_SPI_RXDS_EN_OFFSET)
+            | (1 << CTRLR0_SPI_DDR_EN_OFFSET)
+            | (inst_len << CTRLR0_INST_L_OFFSET)
+            | (addr_len << CTRLR0_ADDR_L_OFFSET)
+            | (0 << CTRLR0_WAIT_CYCLES_OFFSET);
+        if (inst_len == OSPI_INST_L_16bit) {
+            val |= 1 << CTRLR0_INST_DDR_EN_OFFSET;
+        }
+    } else {
+        val = TRANS_TYPE_FRF_DEFINED
+            | (rxds << CTRLR0_SPI_RXDS_EN_OFFSET)
+            | (inst_len << CTRLR0_INST_L_OFFSET)
+            | (addr_len << CTRLR0_ADDR_L_OFFSET)
+            | (0 << CTRLR0_WAIT_CYCLES_OFFSET);
+    }
+
+    ospi_writel(ospi_cfg, spi_ctrlr0, val);
+    spi_enable(ospi_cfg);
+}
+
+static inline uint32_t ospi_xip_ctrlr0(uint32_t data_len) {
+    return CTRLR0_IS_MST
+           | (OCTAL << CTRLR0_SPI_FRF_OFFSET)
+           | (0 << CTRLR0_SCPOL_OFFSET)
+           | (0 << CTRLR0_SCPH_OFFSET)
+           | (0 << CTRLR0_SSTE_OFFSET)
+           | (TMOD_RO << CTRLR0_TMOD_OFFSET)
+           | (data_len << CTRLR0_DFS_OFFSET);
+}
+
+void ospi_xip_enter_ext(ospi_flash_cfg_t *ospi_cfg, uint32_t inst_len, uint32_t data_len, uint16_t incr_command, uint16_t wrap_command, uint16_t read_dummy_cycles) {
+    spi_disable(ospi_cfg);
+
+    ospi_writel(ospi_cfg, ctrlr0, ospi_xip_ctrlr0(data_len));
+
+    uint32_t val = (OCTAL << XIP_CTRL_FRF_OFFSET)
+        | (0x2 << XIP_CTRL_TRANS_TYPE_OFFSET)
+        | (ADDR_L32bit << XIP_CTRL_ADDR_L_OFFSET)
+        | (inst_len << XIP_CTRL_INST_L_OFFSET)
+        | (0x0 << XIP_CTRL_MD_BITS_EN_OFFSET)
+        | (read_dummy_cycles << XIP_CTRL_WAIT_CYCLES_OFFSET)
+        | (0x1 << XIP_CTRL_DFC_HC_OFFSET)
+        | (ospi_cfg->ddr_en << XIP_CTRL_DDR_EN_OFFSET)
+        | (0x1 << XIP_CTRL_RXDS_EN_OFFSET)
+        | (0x1 << XIP_CTRL_INST_EN_OFFSET)
+        | (0x1 << XIP_CTRL_CONT_XFER_EN_OFFSET)
+        | (0x0 << XIP_CTRL_HYPERBUS_EN_OFFSET)
+        | (0x1 << XIP_CTRL_RXDS_SIG_EN)
+        | (0x0 << XIP_CTRL_XIP_MBL_OFFSET)
+        | (0x0 << XIP_PREFETCH_EN_OFFSET)
+        | (0x0 << XIP_CTRL_RXDS_VL_EN_OFFSET);
+
+    if (inst_len == OSPI_INST_L_16bit) {
+        val |= 1 << XIP_CTRL_INST_DDR_EN_OFFSET;
+    }
+
+    ospi_writel(ospi_cfg, xip_ctrl, val);
+
+    ospi_writel(ospi_cfg, rx_sample_dly, OSPI_XIP_RX_SAMPLE_DELAY);
+    ospi_writel(ospi_cfg, txd_drive_edge, OSPI_XIP_DDR_DRIVE_EDGE);
+    ospi_cfg->aes_regs->aes_rxds_delay = OSPI_XIP_RXDS_DELAY;
+
+    ospi_writel(ospi_cfg, xip_mode_bits, 0x0);
+    ospi_writel(ospi_cfg, xip_incr_inst, incr_command);
+    ospi_writel(ospi_cfg, xip_wrap_inst, wrap_command);
+    ospi_writel(ospi_cfg, xip_ser, ospi_cfg->ser);
+    ospi_writel(ospi_cfg, xip_cnt_time_out, 100);
+
+    spi_enable(ospi_cfg);
+    ospi_xip_enable(ospi_cfg);
+}
+
+void ospi_xip_exit_ext(ospi_flash_cfg_t *ospi_cfg, uint32_t inst_len, uint16_t incr_command, uint16_t wrap_command) {
+    spi_disable(ospi_cfg);
+
+    uint32_t val = CTRLR0_IS_MST
+        | (OCTAL << CTRLR0_SPI_FRF_OFFSET)
+        | (0 << CTRLR0_SCPOL_OFFSET)
+        | (0 << CTRLR0_SCPH_OFFSET)
+        | (0 << CTRLR0_SSTE_OFFSET)
+        | (TMOD_RO << CTRLR0_TMOD_OFFSET)
+        | (CTRLR0_DFS_32bit << CTRLR0_DFS_OFFSET);
+
+    ospi_writel(ospi_cfg, ctrlr0, val);
+
+    val = TRANS_TYPE_FRF_DEFINED
+        | ((ospi_cfg->ddr_en) << CTRLR0_SPI_DDR_EN_OFFSET)
+        | (2 << CTRLR0_XIP_MBL_OFFSET)
+        | (1 << CTRLR0_XIP_DFS_HC_OFFSET)
+        | (1 << CTRLR0_XIP_INST_EN_OFFSET)
+        | (inst_len << CTRLR0_INST_L_OFFSET)
+        | (ospi_cfg->addrlen) << (CTRLR0_ADDR_L_OFFSET)
+        | (ospi_cfg->wait_cycles << CTRLR0_WAIT_CYCLES_OFFSET);
+
+    ospi_writel(ospi_cfg, spi_ctrlr0, val);
+
+    ospi_writel(ospi_cfg, xip_mode_bits, 0x1);
+    ospi_writel(ospi_cfg, xip_incr_inst, incr_command);
+    ospi_writel(ospi_cfg, xip_wrap_inst, wrap_command);
+    ospi_writel(ospi_cfg, xip_ser, ospi_cfg->ser);
+    ospi_writel(ospi_cfg, ser, ospi_cfg->ser);
+    ospi_writel(ospi_cfg, xip_cnt_time_out, 100);
+
+    spi_enable(ospi_cfg);
+
+    ospi_xip_enable(ospi_cfg);
+    ospi_xip_disable(ospi_cfg);
+}
+
+void ospi_xip_restore_ext(ospi_flash_cfg_t *ospi_cfg, uint32_t data_len) {
+    spi_disable(ospi_cfg);
+    ospi_writel(ospi_cfg, ctrlr0, ospi_xip_ctrlr0(data_len));
+    spi_enable(ospi_cfg);
+}
diff --git a/ports/alif/ospi_ext.h b/ports/alif/ospi_ext.h
new file mode 100644
index 0000000000000..65e2ced1ff7bc
--- /dev/null
+++ b/ports/alif/ospi_ext.h
@@ -0,0 +1,58 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#ifndef MICROPY_INCLUDED_ALIF_OSPI_EXT_H
+#define MICROPY_INCLUDED_ALIF_OSPI_EXT_H
+
+#include <stddef.h>
+#include "ospi_drv.h"
+
+#define OSPI_ETIMEDOUT (110)
+
+#define OSPI_INST_L_8bit    (CTRLR0_INST_L_8bit)
+#define OSPI_INST_L_16bit   (CTRLR0_INST_L_16bit)
+
+#define OSPI_ADDR_L_0bit    UINT32_C(0x0)
+#define OSPI_ADDR_L_24bit   UINT32_C(0x6)
+#define OSPI_ADDR_L_32bit   UINT32_C(0x8)
+
+#define OSPI_DATA_L_8bit    (CTRLR0_DFS_8bit)
+#define OSPI_DATA_L_16bit   (CTRLR0_DFS_16bit)
+#define OSPI_DATA_L_32bit   (CTRLR0_DFS_32bit)
+
+void ospi_spi_transfer(ospi_flash_cfg_t *ospi_cfg, size_t len, const uint8_t *buf_out, uint8_t *buf_in);
+
+void ospi_setup_read_ext(ospi_flash_cfg_t *ospi_cfg, bool rxds, uint32_t inst_len, uint32_t addr_len, uint32_t data_len, uint32_t read_len, uint32_t wait_cycles);
+int ospi_recv_blocking_8bit_data(ospi_flash_cfg_t *ospi_cfg, uint32_t command, uint8_t *buffer);
+int ospi_recv_blocking_16bit_data(ospi_flash_cfg_t *ospi_cfg, uint32_t command, uint16_t *buffer);
+int ospi_recv_blocking_32bit_data(ospi_flash_cfg_t *ospi_cfg, uint32_t command, uint32_t *buffer);
+
+void ospi_setup_write_ext(ospi_flash_cfg_t *ospi_cfg, bool rxds, uint32_t inst_len, uint32_t addr_len, uint32_t data_len);
+
+void ospi_xip_enter_ext(ospi_flash_cfg_t *ospi_cfg, uint32_t inst_len, uint32_t data_len, uint16_t incr_command, uint16_t wrap_command, uint16_t read_dummy_cycles);
+void ospi_xip_exit_ext(ospi_flash_cfg_t *ospi_cfg, uint32_t inst_len, uint16_t incr_command, uint16_t wrap_command);
+void ospi_xip_restore_ext(ospi_flash_cfg_t *ospi_cfg, uint32_t data_len);
+
+#endif // MICROPY_INCLUDED_ALIF_OSPI_EXT_H
diff --git a/ports/alif/ospi_flash.c b/ports/alif/ospi_flash.c
new file mode 100644
index 0000000000000..f78002eb0ef97
--- /dev/null
+++ b/ports/alif/ospi_flash.c
@@ -0,0 +1,480 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "py/mperrno.h"
+#include "py/mphal.h"
+
+#if MICROPY_HW_ENABLE_OSPI
+
+#include "ospi_ext.h"
+#include "ospi_flash.h"
+#include "ospi_drv.h"
+#include "ospi_xip_user.h"
+#include "pinconf.h"
+
+#define WAIT_SR_TIMEOUT     (1000000)
+
+// Generic SPI flash commands.
+#define CMD_SPI_WREN (0x06)
+
+// This is the maximum number of bytes that can be written to SPI flash at once.
+#define PAGE_SIZE (256)
+
+// All OSP0/OSPI1 pins use the same alternate function.
+#define OSPI_PIN_FUNCTION PINMUX_ALTERNATE_FUNCTION_1
+
+typedef struct _ospi_flash_t {
+    const ospi_pin_settings_t *pin;
+    const ospi_flash_settings_t *set;
+    ospi_flash_cfg_t cfg;
+    bool xip_active;
+} ospi_flash_t;
+
+static ospi_flash_t global_flash;
+
+/******************************************************************************/
+// Generic SPI-flash helper functions.
+
+static void ospi_flash_wren_spi(ospi_flash_t *self) {
+    uint8_t buf[1] = {CMD_SPI_WREN};
+    ospi_spi_transfer(&self->cfg, 1, buf, buf);
+}
+
+static int ospi_flash_read_cmd(ospi_flash_t *self, uint32_t cmd, uint8_t cmd_dummy_cycles, size_t len, uint8_t *dest) {
+    int ret = 0;
+    if (self->set->inst_len == OSPI_INST_L_8bit) {
+        ospi_setup_read_ext(&self->cfg, self->set->rxds, self->set->inst_len, OSPI_ADDR_L_0bit, OSPI_DATA_L_8bit, len, cmd_dummy_cycles);
+        ret = ospi_recv_blocking_8bit_data(&self->cfg, cmd, dest);
+    } else {
+        uint16_t dest16 = 0;
+        ospi_setup_read_ext(&self->cfg, self->set->rxds, self->set->inst_len, OSPI_ADDR_L_32bit, OSPI_DATA_L_16bit, len, cmd_dummy_cycles);
+        ospi_push(&self->cfg, cmd);
+        ret = ospi_recv_blocking_16bit_data(&self->cfg, 0 /* addr */, &dest16);
+        *dest = dest16;
+    }
+    return ret;
+}
+
+static int ospi_flash_write_cmd_addr(ospi_flash_t *self, uint32_t cmd, uint32_t addr_len, uint32_t addr) {
+    if (self->set->inst_len == OSPI_INST_L_8bit) {
+        ospi_setup_write_ext(&self->cfg, false, self->set->inst_len, addr_len, OSPI_DATA_L_8bit);
+    } else {
+        ospi_setup_write_ext(&self->cfg, self->set->rxds, self->set->inst_len, addr_len, OSPI_DATA_L_16bit);
+    }
+    if (addr_len == OSPI_ADDR_L_0bit) {
+        ospi_send_blocking(&self->cfg, cmd);
+    } else {
+        ospi_push(&self->cfg, cmd);
+        ospi_send_blocking(&self->cfg, addr);
+    }
+    return 0;
+}
+
+static int ospi_flash_write_cmd(ospi_flash_t *self, uint32_t cmd) {
+    return ospi_flash_write_cmd_addr(self, cmd, OSPI_ADDR_L_0bit, 0);
+}
+
+static uint32_t ospi_flash_read_id_spi(ospi_flash_t *self) {
+    uint8_t buf[4] = {0x9f, 0, 0, 0};
+    ospi_spi_transfer(&self->cfg, 4, buf, buf);
+    return buf[1] | buf[2] << 8 | buf[3] << 16;
+}
+
+static int ospi_flash_wait_sr(ospi_flash_t *self, uint8_t mask, uint8_t val, uint32_t timeout) {
+    do {
+        uint8_t sr = 0;
+        int ret = ospi_flash_read_cmd(self, self->set->read_sr, self->set->read_sr_dummy_cycles, 1, &sr);
+        if (ret != 0) {
+            return ret;
+        }
+        if ((sr & mask) == val) {
+            return 0; // success
+        }
+    } while (timeout--);
+
+    return -MP_ETIMEDOUT;
+}
+
+static int ospi_flash_wait_wel1(ospi_flash_t *self) {
+    return ospi_flash_wait_sr(self, 2, 2, WAIT_SR_TIMEOUT);
+}
+
+static int ospi_flash_wait_wip0(ospi_flash_t *self) {
+    return ospi_flash_wait_sr(self, 1, 0, WAIT_SR_TIMEOUT);
+}
+
+static uint32_t ospi_flash_read_id(ospi_flash_t *self) {
+    uint8_t buf[4] = {0};
+    if (self->set->inst_len == OSPI_INST_L_8bit) {
+        ospi_setup_read_ext(&self->cfg, self->set->rxds, self->set->inst_len, OSPI_ADDR_L_0bit, OSPI_DATA_L_8bit, 3, self->set->read_id_dummy_cycles);
+        ospi_recv_blocking_8bit_data(&self->cfg, self->set->read_id, buf);
+    } else {
+        ospi_setup_read_ext(&self->cfg, self->set->rxds, self->set->inst_len, OSPI_ADDR_L_32bit, OSPI_DATA_L_16bit, 4, self->set->read_id_dummy_cycles);
+        ospi_push(&self->cfg, self->set->read_id);
+        // Read 8-bit values because data is in SDR mode for read id.
+        ospi_recv_blocking_8bit_data(&self->cfg, 0, buf);
+    }
+    return buf[0] | buf[1] << 8 | buf[2] << 16;
+}
+
+/******************************************************************************/
+// Functions specific to ISSI flash chips.
+
+int ospi_flash_issi_init(ospi_flash_t *self) {
+    const uint8_t cmd_wrvol = 0x81;
+
+    // Configure dummy cycles.
+    ospi_flash_wren_spi(self);
+    uint8_t buf0[5] = {cmd_wrvol, 0, 0, 1, self->set->read_dummy_cycles};
+    ospi_spi_transfer(&self->cfg, sizeof(buf0), buf0, buf0);
+
+    // Switch SPI flash to Octal DDR mode.
+    const uint8_t issi_mode_octal_ddr_dqs = 0xe7;
+    ospi_flash_wren_spi(self);
+    uint8_t buf1[5] = {cmd_wrvol, 0, 0, 0, issi_mode_octal_ddr_dqs};
+    ospi_spi_transfer(&self->cfg, sizeof(buf1), buf1, buf1);
+    self->cfg.ddr_en = 1;
+    return 0;
+}
+
+/******************************************************************************/
+// Functions specific to MX flash chips.
+
+int ospi_flash_mx_init(ospi_flash_t *self) {
+    const uint8_t cmd_wrcr2 = 0x72;
+    const uint8_t mx_mode_enable_sopi = 0x01;
+    const uint8_t mx_mode_enable_dopi = 0x02;
+    uint8_t mx_mode;
+    if (self->set->octal_mode == OSPI_FLASH_OCTAL_MODE_DDD) {
+        mx_mode = mx_mode_enable_dopi;
+    } else {
+        mx_mode = mx_mode_enable_sopi;
+    }
+
+    // Configure dummy cycles.
+    uint8_t ddc_value = 0;
+    const uint8_t ospi_flash_mx_ddc[][2] = {
+        {20, 0}, {18, 1}, {16, 2}, {14, 3}, {12, 4}, {10, 5}, {8, 6}, {6, 7}
+    };
+    for (size_t i = 0; i < MP_ARRAY_SIZE(ospi_flash_mx_ddc); i++) {
+        if (self->set->read_dummy_cycles == ospi_flash_mx_ddc[i][0]) {
+            ddc_value = ospi_flash_mx_ddc[i][1];
+            break;
+        }
+    }
+
+    ospi_flash_wren_spi(self);
+    uint8_t buf0[6] = {cmd_wrcr2, 0, 0, 3, 0, ddc_value};
+    ospi_spi_transfer(&self->cfg, sizeof(buf0), buf0, buf0);
+
+    // Switch SPI flash to Octal SDR or DDR mode.
+    ospi_flash_wren_spi(self);
+    uint8_t buf1[6] = {cmd_wrcr2, 0, 0, 0, 0, mx_mode};
+    ospi_spi_transfer(&self->cfg, sizeof(buf1), buf1, buf1);
+    if (self->set->octal_mode == OSPI_FLASH_OCTAL_MODE_DDD) {
+        self->cfg.ddr_en = 1;
+    } else {
+        self->cfg.ddr_en = 0;
+    }
+    return 0;
+}
+
+static uint8_t ospi_flash_mx_read_cr_helper(ospi_flash_t *self, uint16_t command, uint32_t addr) {
+    // TODO: currently only works in DDR mode
+
+    uint16_t buf[1] = {0};
+    ospi_setup_read_ext(&self->cfg, self->set->rxds, OSPI_INST_L_16bit, OSPI_ADDR_L_32bit, OSPI_DATA_L_16bit, 1, 4);
+    ospi_push(&self->cfg, command);
+    ospi_recv_blocking_16bit_data(&self->cfg, addr, buf);
+    return buf[0] & 0xff;
+}
+
+uint8_t ospi_flash_mx_read_cr(ospi_flash_t *self) {
+    return ospi_flash_mx_read_cr_helper(self, 0x15ea, 0);
+}
+
+uint8_t ospi_flash_mx_read_cr2(ospi_flash_t *self, uint32_t addr) {
+    return ospi_flash_mx_read_cr_helper(self, 0x718e, addr);
+}
+
+static int ospi_flash_mx_write_cr_helper(ospi_flash_t *self, uint16_t command, uint32_t addr, uint8_t value) {
+    // TODO: currently only works in DDR mode
+
+    // Enable writes so that the register can be modified.
+    ospi_flash_write_cmd(self, self->set->write_en);
+    int ret = ospi_flash_wait_wel1(self);
+    if (ret < 0) {
+        return ret;
+    }
+
+    // Do the write.
+    ospi_setup_write_ext(&self->cfg, self->set->rxds, OSPI_INST_L_16bit, OSPI_ADDR_L_32bit, OSPI_DATA_L_16bit);
+    ospi_push(&self->cfg, command);
+    ospi_push(&self->cfg, addr);
+    ospi_push(&self->cfg, value << 8); // in DDR mode, MSByte contains the register value to write
+    ospi_writel((&self->cfg), ser, self->cfg.ser);
+    while ((ospi_readl((&self->cfg), sr) & (SR_TF_EMPTY | SR_BUSY)) != SR_TF_EMPTY) {
+    }
+
+    // Wait for the write to finish.
+    return ospi_flash_wait_wip0(self);
+}
+
+int ospi_flash_mx_write_cr(ospi_flash_t *self, uint8_t value) {
+    return ospi_flash_mx_write_cr_helper(self, 0x01fe, 1, value);
+}
+
+int ospi_flash_mx_write_cr2(ospi_flash_t *self, uint32_t addr, uint8_t value) {
+    return ospi_flash_mx_write_cr_helper(self, 0x728d, addr, value);
+}
+
+/******************************************************************************/
+// SPI flash initialisation.
+
+int ospi_flash_init(void) {
+    ospi_flash_t *self = &global_flash;
+
+    const ospi_pin_settings_t *pin = &ospi_pin_settings;
+    const ospi_flash_settings_t *set = NULL;
+
+    self->pin = pin;
+
+    unsigned int unit = pin->peripheral_number;
+    mp_hal_pin_config(pin->pin_cs, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE,
+        MP_HAL_PIN_SPEED_LOW, MP_HAL_PIN_DRIVE_12MA, MP_HAL_PIN_ALT(OSPI_SS0, unit), false);
+    mp_hal_pin_config(pin->pin_clk_p, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE,
+        MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_12MA, MP_HAL_PIN_ALT(OSPI_SCLK, unit), false);
+    if (pin->pin_clk_n != NULL) {
+        mp_hal_pin_config(pin->pin_clk_n, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE,
+            MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_12MA, MP_HAL_PIN_ALT(OSPI_SCLKN, unit), false);
+    }
+    if (pin->pin_rwds != NULL) {
+        mp_hal_pin_config(pin->pin_rwds, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE,
+            MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_12MA, MP_HAL_PIN_ALT(OSPI_RXDS, unit), true);
+        if (pin->pin_rwds->port == PORT_10 && pin->pin_rwds->pin == PIN_7) {
+            // Alif: P5_6 is needed to support proper alt function selection of P10_7.
+            mp_hal_pin_config(pin_P5_6, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE,
+                MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_12MA, MP_HAL_PIN_ALT(OSPI_RXDS, unit), true);
+        }
+    }
+    mp_hal_pin_config(pin->pin_d0, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE,
+        MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_12MA, MP_HAL_PIN_ALT(OSPI_D0, unit), true);
+    mp_hal_pin_config(pin->pin_d1, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE,
+        MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_12MA, MP_HAL_PIN_ALT(OSPI_D1, unit), true);
+    mp_hal_pin_config(pin->pin_d2, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_UP,
+        MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_12MA, MP_HAL_PIN_ALT(OSPI_D2, unit), true);
+    mp_hal_pin_config(pin->pin_d3, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE,
+        MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_12MA, MP_HAL_PIN_ALT(OSPI_D3, unit), true);
+    if (pin->pin_d4 != NULL) {
+        mp_hal_pin_config(pin->pin_d4, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE,
+            MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_12MA, MP_HAL_PIN_ALT(OSPI_D4, unit), true);
+        mp_hal_pin_config(pin->pin_d5, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE,
+            MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_12MA, MP_HAL_PIN_ALT(OSPI_D5, unit), true);
+        mp_hal_pin_config(pin->pin_d6, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE,
+            MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_12MA, MP_HAL_PIN_ALT(OSPI_D6, unit), true);
+        mp_hal_pin_config(pin->pin_d7, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE,
+            MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_12MA, MP_HAL_PIN_ALT(OSPI_D7, unit), true);
+    }
+
+    // Reset the SPI flash.
+    mp_hal_pin_output(pin->pin_reset);
+    mp_hal_pin_low(pin->pin_reset);
+    mp_hal_delay_us(100);
+    mp_hal_pin_high(pin->pin_reset);
+    mp_hal_delay_us(1000);
+
+    // Configure the OSPI peripheral.
+    if (pin->peripheral_number == 0) {
+        self->cfg.regs = (ssi_regs_t *)OSPI0_BASE;
+        self->cfg.aes_regs = (aes_regs_t *)AES0_BASE;
+        self->cfg.xip_base = (volatile void *)OSPI0_XIP_BASE;
+    } else {
+        self->cfg.regs = (ssi_regs_t *)OSPI1_BASE;
+        self->cfg.aes_regs = (aes_regs_t *)AES1_BASE;
+        self->cfg.xip_base = (volatile void *)OSPI1_XIP_BASE;
+    }
+    self->cfg.ser = 1; // enable slave select
+    self->cfg.addrlen = 8; // 32-bit address length
+    self->cfg.ddr_en = 0;
+    self->cfg.wait_cycles = 0; // used only for ospi_xip_exit
+    self->cfg.ospi_clock = 100000;  // use 100KHz for detection.
+    ospi_init(&self->cfg);
+
+    // Read the device ID.
+    uint32_t jedec_id = ospi_flash_read_id_spi(self);
+
+    // Auto-detect the flash.
+    for (size_t i = 0; i < ospi_flash_settings_len; i++) {
+        set = &ospi_flash_settings[i];
+        if (jedec_id == set->jedec_id) {
+            self->set = set;
+            break;
+        }
+    }
+
+    if (self->set == NULL) {
+        // Flash part is not supported.
+        return -1;
+    }
+
+    // Switch to the higher frequency.
+    self->cfg.ospi_clock = set->freq_hz;
+    ospi_init(&self->cfg);
+
+    // Switch to octal mode if needed.
+    if (set->flash_init != NULL) {
+        set->flash_init(self);
+
+        // Check the device ID after switching mode.
+        if (ospi_flash_read_id(self) != set->jedec_id) {
+            return -1;
+        }
+    }
+
+    // Enter XIP mode.
+    ospi_flash_xip_enter(self);
+
+    return 0;
+}
+
+uintptr_t ospi_flash_get_xip_base(void) {
+    ospi_flash_t *self = &global_flash;
+    return (uintptr_t)self->cfg.xip_base;
+}
+
+int ospi_flash_xip_enter(ospi_flash_t *self) {
+    if (!self->xip_active) {
+        uint32_t irq_state = disable_irq();
+        self->xip_active = true;
+        ospi_xip_enter_ext(&self->cfg, self->set->inst_len, self->set->xip_data_len,
+            self->set->read_command, self->set->read_command, self->set->read_dummy_cycles);
+        enable_irq(irq_state);
+    }
+    return 0;
+}
+
+int ospi_flash_xip_exit(ospi_flash_t *self) {
+    if (self->xip_active) {
+        uint32_t irq_state = disable_irq();
+        ospi_xip_exit_ext(&self->cfg, self->set->inst_len, self->set->read_command, self->set->read_command);
+        self->xip_active = false;
+        enable_irq(irq_state);
+    }
+    return 0;
+}
+
+int ospi_flash_xip_restore(ospi_flash_t *self) {
+    if (self->xip_active) {
+        ospi_xip_restore_ext(&self->cfg, self->set->xip_data_len);
+    }
+    return 0;
+}
+
+/******************************************************************************/
+// Top-level read/erase/write functions.
+
+int ospi_flash_erase_sector(uint32_t addr) {
+    ospi_flash_t *self = &global_flash;
+
+    ospi_flash_write_cmd(self, self->set->write_en);
+    int ret = ospi_flash_wait_wel1(self);
+    if (ret == 0) {
+        ospi_flash_write_cmd_addr(self, self->set->erase_command, OSPI_ADDR_L_32bit, addr);
+        ret = ospi_flash_wait_wip0(self);
+    }
+
+    ospi_flash_xip_restore(self);
+
+    return ret;
+}
+
+int ospi_flash_read(uint32_t addr, uint32_t len, uint8_t *dest) {
+    ospi_flash_t *self = &global_flash;
+    // Perform an XIP read (memcpy)
+    memcpy(dest, (void *)self->cfg.xip_base + addr, len);
+    return 0;
+}
+
+static int ospi_flash_write_page(uint32_t addr, uint32_t len, const uint8_t *src) {
+    ospi_flash_t *self = &global_flash;
+
+    ospi_flash_write_cmd(self, self->set->write_en);
+    int ret = ospi_flash_wait_wel1(self);
+    if (ret < 0) {
+        return ret;
+    }
+
+    ospi_setup_write_ext(&self->cfg, self->set->rxds, self->set->inst_len, OSPI_ADDR_L_32bit, OSPI_DATA_L_32bit);
+    ospi_push(&self->cfg, self->set->write_command);
+    ospi_push(&self->cfg, addr);
+
+    const uint32_t *src32 = (const uint32_t *)src;
+    if (self->set->bswap16) {
+        // MX flashes swap 16-bit words when read in 8D-8D-8D.
+        for (; len; len -= 4) {
+            ospi_push(&self->cfg, __ROR(*src32++, 16));
+        }
+    } else {
+        // For the rest of the flashes, we just correct the endianness.
+        for (; len; len -= 4) {
+            ospi_push(&self->cfg, __REV(*src32++));
+        }
+    }
+
+    ospi_writel((&self->cfg), ser, self->cfg.ser);
+    while ((ospi_readl((&self->cfg), sr) & (SR_TF_EMPTY | SR_BUSY)) != SR_TF_EMPTY) {
+    }
+
+    return ospi_flash_wait_wip0(self);
+}
+
+int ospi_flash_write(uint32_t addr, uint32_t len, const uint8_t *src) {
+    ospi_flash_t *self = &global_flash;
+
+    int ret = 0;
+    uint32_t offset = addr & (PAGE_SIZE - 1);
+
+    while (len) {
+        size_t rest = PAGE_SIZE - offset;
+        if (rest > len) {
+            rest = len;
+        }
+        ret = ospi_flash_write_page(addr, rest, src);
+        if (ret != 0) {
+            break;
+        }
+        len -= rest;
+        addr += rest;
+        src += rest;
+        offset = 0;
+    }
+
+    ospi_flash_xip_restore(self);
+
+    return ret;
+}
+
+#endif // MICROPY_HW_ENABLE_OSPI
diff --git a/ports/alif/ospi_flash.h b/ports/alif/ospi_flash.h
new file mode 100644
index 0000000000000..f909f4a43c889
--- /dev/null
+++ b/ports/alif/ospi_flash.h
@@ -0,0 +1,104 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#ifndef MICROPY_INCLUDED_ALIF_OSPI_FLASH_H
+#define MICROPY_INCLUDED_ALIF_OSPI_FLASH_H
+
+#include "py/mphal.h"
+#include "ospi_flash_settings.h"
+
+// Format of command, address and data phases.
+enum {
+    OSPI_FLASH_OCTAL_MODE_SSS,
+    OSPI_FLASH_OCTAL_MODE_SDD,
+    OSPI_FLASH_OCTAL_MODE_DDD,
+};
+
+struct _ospi_flash_t;
+
+typedef struct _ospi_pin_settings_t {
+    uint32_t peripheral_number;
+    const mp_hal_pin_obj_t pin_reset;
+    const mp_hal_pin_obj_t pin_cs;
+    const mp_hal_pin_obj_t pin_clk_p;
+    const mp_hal_pin_obj_t pin_clk_n;
+    const mp_hal_pin_obj_t pin_rwds;
+    const mp_hal_pin_obj_t pin_d0;
+    const mp_hal_pin_obj_t pin_d1;
+    const mp_hal_pin_obj_t pin_d2;
+    const mp_hal_pin_obj_t pin_d3;
+    const mp_hal_pin_obj_t pin_d4;
+    const mp_hal_pin_obj_t pin_d5;
+    const mp_hal_pin_obj_t pin_d6;
+    const mp_hal_pin_obj_t pin_d7;
+} ospi_pin_settings_t;
+
+typedef struct _ospi_flash_settings_t {
+    uint32_t jedec_id;
+    uint32_t freq_hz;
+    int (*flash_init)(struct _ospi_flash_t *);
+    uint8_t octal_mode;
+    bool rxds;
+    bool bswap16;
+    uint8_t inst_len;
+    uint8_t xip_data_len;
+    uint16_t read_sr;
+    uint8_t read_sr_dummy_cycles;
+    uint16_t read_id;
+    uint8_t read_id_dummy_cycles;
+    uint16_t write_en;
+    uint16_t read_command;
+    uint8_t read_dummy_cycles;
+    uint16_t write_command;
+    uint16_t erase_command;
+} ospi_flash_settings_t;
+
+// Provided by the board when it enables OSPI.
+extern const ospi_pin_settings_t ospi_pin_settings;
+extern const ospi_flash_settings_t ospi_flash_settings[];
+extern const size_t ospi_flash_settings_len;
+
+// Functions specific to ISSI flash chips.
+int ospi_flash_issi_init(struct _ospi_flash_t *self);
+
+// Functions specific to MX flash chips.
+int ospi_flash_mx_init(struct _ospi_flash_t *self);
+uint8_t ospi_flash_mx_read_cr(struct _ospi_flash_t *self);
+uint8_t ospi_flash_mx_read_cr2(struct _ospi_flash_t *self, uint32_t addr);
+int ospi_flash_mx_write_cr(struct _ospi_flash_t *self, uint8_t value);
+int ospi_flash_mx_write_cr2(struct _ospi_flash_t *self, uint32_t addr, uint8_t value);
+
+// XIP control
+int ospi_flash_xip_enter(struct _ospi_flash_t *self);
+int ospi_flash_xip_exit(struct _ospi_flash_t *self);
+
+// SPI flash interface.
+int ospi_flash_init(void);
+uintptr_t ospi_flash_get_xip_base(void);
+int ospi_flash_erase_sector(uint32_t addr);
+int ospi_flash_read(uint32_t addr, uint32_t len, uint8_t *dest);
+int ospi_flash_write(uint32_t addr, uint32_t len, const uint8_t *src);
+
+#endif // MICROPY_INCLUDED_ALIF_OSPI_FLASH_H
diff --git a/ports/alif/ospi_flash_settings.h b/ports/alif/ospi_flash_settings.h
new file mode 100644
index 0000000000000..89686c4946c4b
--- /dev/null
+++ b/ports/alif/ospi_flash_settings.h
@@ -0,0 +1,82 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef __OSPI_FLASH_SETTINGS_H__
+#define __OSPI_FLASH_SETTINGS_H__
+#include <stdint.h>
+#include "ospi_flash.h"
+
+// Macronix MX25
+#define OSPI_FLASH_SETTINGS_MX25 \
+    .flash_init = ospi_flash_mx_init, \
+    .octal_mode = OSPI_FLASH_OCTAL_MODE_DDD, \
+    .rxds = true, \
+    .bswap16 = true, \
+    .inst_len = OSPI_INST_L_16bit, \
+    .xip_data_len = OSPI_DATA_L_16bit, \
+    .read_sr = 0x05fa, \
+    .read_sr_dummy_cycles = 4, \
+    .write_en = 0x06f9, \
+    .read_id = 0x9f60, \
+    .read_id_dummy_cycles = 4, \
+    .read_command = 0xee11, \
+    .write_command = 0x12ed, \
+    .erase_command = 0x21de
+
+// Everspin EM.
+#define OSPI_FLASH_SETTINGS_EM \
+    .flash_init = ospi_flash_issi_init, \
+    .octal_mode = OSPI_FLASH_OCTAL_MODE_DDD, \
+    .rxds = false, \
+    .bswap16 = false, \
+    .inst_len = OSPI_INST_L_8bit, \
+    .xip_data_len = OSPI_DATA_L_8bit, \
+    .read_sr = 0x05, \
+    .read_sr_dummy_cycles = 8, \
+    .write_en = 0x06, \
+    .read_id = 0x9f, \
+    .read_id_dummy_cycles = 8, \
+    .read_command = 0xfd, \
+    .write_command = 0xc2, \
+    .erase_command = 0x21
+
+// ISSI IS25.
+#define OSPI_FLASH_SETTINGS_IS25 \
+    .flash_init = ospi_flash_issi_init, \
+    .octal_mode = OSPI_FLASH_OCTAL_MODE_DDD, \
+    .rxds = false, \
+    .bswap16 = false, \
+    .inst_len = OSPI_INST_L_8bit, \
+    .xip_data_len = OSPI_DATA_L_8bit, \
+    .read_sr = 0x05, \
+    .read_sr_dummy_cycles = 8, \
+    .write_en = 0x06, \
+    .read_id = 0x9f, \
+    .read_id_dummy_cycles = 8, \
+    .read_command = 0xfd, \
+    .write_command = 0xc2, \
+    .erase_command = 0x21
+#endif  // __OSPI_FLASH_SETTINGS_H__
diff --git a/ports/alif/pendsv.c b/ports/alif/pendsv.c
new file mode 100644
index 0000000000000..965053e6c595a
--- /dev/null
+++ b/ports/alif/pendsv.c
@@ -0,0 +1,49 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "pendsv.h"
+#include "irq.h"
+
+static pendsv_dispatch_t pendsv_dispatch_table[PENDSV_DISPATCH_NUM_SLOTS];
+
+void pendsv_init(void) {
+    NVIC_SetPriority(PendSV_IRQn, IRQ_PRI_PENDSV);
+}
+
+void pendsv_schedule_dispatch(size_t slot, pendsv_dispatch_t f) {
+    pendsv_dispatch_table[slot] = f;
+    SCB->ICSR = SCB_ICSR_PENDSVSET_Msk;
+}
+
+void PendSV_Handler(void) {
+    for (size_t i = 0; i < PENDSV_DISPATCH_NUM_SLOTS; ++i) {
+        if (pendsv_dispatch_table[i] != NULL) {
+            pendsv_dispatch_t f = pendsv_dispatch_table[i];
+            pendsv_dispatch_table[i] = NULL;
+            f();
+        }
+    }
+}
diff --git a/ports/alif/pendsv.h b/ports/alif/pendsv.h
new file mode 100644
index 0000000000000..17d7e82dfc7e7
--- /dev/null
+++ b/ports/alif/pendsv.h
@@ -0,0 +1,51 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#ifndef MICROPY_INCLUDED_ALIF_PENDSV_H
+#define MICROPY_INCLUDED_ALIF_PENDSV_H
+
+#include "py/mpconfig.h"
+
+#ifndef MICROPY_BOARD_PENDSV_ENTRIES
+#define MICROPY_BOARD_PENDSV_ENTRIES
+#endif
+
+enum {
+    PENDSV_DISPATCH_SOFT_TIMER,
+    #if MICROPY_PY_NETWORK_CYW43
+    PENDSV_DISPATCH_CYW43,
+    #endif
+    MICROPY_BOARD_PENDSV_ENTRIES
+    PENDSV_DISPATCH_MAX
+};
+
+#define PENDSV_DISPATCH_NUM_SLOTS PENDSV_DISPATCH_MAX
+
+typedef void (*pendsv_dispatch_t)(void);
+
+void pendsv_init(void);
+void pendsv_schedule_dispatch(size_t slot, pendsv_dispatch_t f);
+
+#endif // MICROPY_INCLUDED_ALIF_PENDSV_H
diff --git a/ports/alif/qstrdefsport.h b/ports/alif/qstrdefsport.h
new file mode 100644
index 0000000000000..00d3e2ae3c555
--- /dev/null
+++ b/ports/alif/qstrdefsport.h
@@ -0,0 +1,2 @@
+// qstrs specific to this port
+// *FORMAT-OFF*
diff --git a/ports/alif/se_services.c b/ports/alif/se_services.c
new file mode 100644
index 0000000000000..1ed6e3fbfdad0
--- /dev/null
+++ b/ports/alif/se_services.c
@@ -0,0 +1,302 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include <stdio.h>
+#include <string.h>
+
+#include "irq.h"
+#include "se_services.h"
+
+#include "mhu.h"
+#include "services_lib_bare_metal.h"
+#include "services_lib_protocol.h"
+
+#include "py/mphal.h"
+
+// MHU indices.
+#define MHU_SESS_MHU0   0
+#define MHU_RTSS_MHU0   1
+#define MAX_MHU         2
+
+// The following timeout is implemented in se_services_handle.c as a
+// simple loop busy polling on a variable set from an IRQ.
+#define TIMEOUT         10000000
+
+typedef struct {
+    volatile unsigned int RST_CTRL; // 0x1A010318
+    volatile unsigned int RST_STAT; // 0x1A01031C
+} CPU_Type;
+
+// HE CPU register flags
+#define RST_CTRL_CPUWAIT_MASK   (1 << 0)
+#define RST_CTRL_RST_REQ_MASK   (1 << 1)
+#define RST_STAT_RST_ACK_MASK   (3 << 1)
+#define HE_CPU                  ((CPU_Type *)0x1A010318)
+
+static const uint32_t mhu_sender_base_address_list[MAX_MHU] = {
+    MHU_SESS_S_TX_BASE,
+    MHU_RTSS_S_TX_BASE
+};
+
+static const uint32_t mhu_receiver_base_address_list[MAX_MHU] = {
+    MHU_SESS_S_RX_BASE,
+    MHU_RTSS_S_RX_BASE
+};
+
+// Must be aligned as a uint32_t.
+static uint32_t packet_buffer[SERVICES_MAX_PACKET_BUFFER_SIZE / sizeof(uint32_t)];
+
+static uint32_t se_sess_handle;
+static uint32_t se_rtss_handle;
+
+static mhu_driver_out_t mhu_driver_out;
+
+void MHU_SESS_S_TX_IRQHandler(void) {
+    mhu_driver_out.sender_irq_handler(MHU_SESS_MHU0);
+}
+
+void MHU_SESS_S_RX_IRQHandler(void) {
+    mhu_driver_out.receiver_irq_handler(MHU_SESS_MHU0);
+}
+
+void MHU_RTSS_S_TX_IRQHandler(void) {
+    mhu_driver_out.sender_irq_handler(MHU_RTSS_MHU0);
+}
+
+void MHU_RTSS_S_RX_IRQHandler(void) {
+    mhu_driver_out.receiver_irq_handler(MHU_RTSS_MHU0);
+}
+
+int dummy_printf(const char *fmt, ...) {
+    (void)fmt;
+    return 0;
+}
+
+static void se_services_irq_config(IRQn_Type irqn, bool enable) {
+    if (enable) {
+        NVIC_ClearPendingIRQ(irqn);
+        NVIC_SetPriority(irqn, IRQ_PRI_MHU);
+        NVIC_EnableIRQ(irqn);
+    } else {
+        NVIC_DisableIRQ(irqn);
+        NVIC_ClearPendingIRQ(irqn);
+    }
+}
+
+void se_services_rx_callback(uint32_t id, uint32_t channel, uint32_t data) {
+    switch (id) {
+        case MHU_SESS_MHU0:
+            SERVICES_rx_msg_callback(id, channel, data);
+            break;
+        case MHU_RTSS_MHU0:
+            #if MICROPY_PY_OPENAMP
+            extern void metal_rproc_notified(void);
+            metal_rproc_notified();
+            #endif
+            break;
+        default:
+            break;
+    }
+}
+
+void se_services_init(void) {
+    // Initialize MHU.
+    mhu_driver_in_t mhu_driver_in;
+    mhu_driver_in.sender_base_address_list = (uint32_t *)mhu_sender_base_address_list;
+    mhu_driver_in.receiver_base_address_list = (uint32_t *)mhu_receiver_base_address_list;
+    mhu_driver_in.mhu_count = MAX_MHU;
+    mhu_driver_in.send_msg_acked_callback = SERVICES_send_msg_acked_callback;
+    mhu_driver_in.rx_msg_callback = se_services_rx_callback;
+    mhu_driver_in.debug_print = NULL; // not currently used by MHU_driver_initialize
+    MHU_driver_initialize(&mhu_driver_in, &mhu_driver_out);
+
+    // Initialize SE services.
+    services_lib_t services_init_params = {
+        .packet_buffer_address = (uint32_t)packet_buffer,
+        .fn_send_mhu_message = mhu_driver_out.send_message,
+        .fn_wait_ms = NULL, // not currently used by services_host_handler.c
+        .wait_timeout = TIMEOUT,
+        .fn_print_msg = dummy_printf,
+    };
+    SERVICES_initialize(&services_init_params);
+
+    // Register SESS MHU channel.
+    se_sess_handle = SERVICES_register_channel(MHU_SESS_MHU0, 0);
+    se_services_irq_config(MHU_SESS_S_RX_IRQ_IRQn, true);
+    se_services_irq_config(MHU_SESS_S_TX_IRQ_IRQn, true);
+
+    // Register RTSS MHU channel.
+    se_rtss_handle = SERVICES_register_channel(MHU_RTSS_MHU0, 0);
+    se_services_irq_config(MHU_RTSS_S_RX_IRQ_IRQn, true);
+    se_services_irq_config(MHU_RTSS_S_TX_IRQ_IRQn, true);
+
+    // Send heartbeat services requests until one succeeds.
+    SERVICES_synchronize_with_se(se_sess_handle);
+}
+
+void se_services_deinit(void) {
+    // Disable SESS MHU channel IRQs.
+    se_services_irq_config(MHU_SESS_S_RX_IRQ_IRQn, false);
+    se_services_irq_config(MHU_SESS_S_TX_IRQ_IRQn, false);
+
+    // Disable RTSS MHU channel IRQs.
+    se_services_irq_config(MHU_RTSS_S_RX_IRQ_IRQn, false);
+    se_services_irq_config(MHU_RTSS_S_TX_IRQ_IRQn, false);
+}
+
+void se_services_dump_device_data(void) {
+    uint32_t error_code;
+
+    uint8_t revision[80];
+    SERVICES_get_se_revision(se_sess_handle, revision, &error_code);
+
+    SERVICES_version_data_t data;
+    SERVICES_system_get_device_data(se_sess_handle, &data, &error_code);
+
+    printf("SE revision: %s\n", revision);
+    printf("ALIF_PN:     %s\n", data.ALIF_PN);
+    printf("Raw device data:\n");
+    for (int i = 0; i < sizeof(data); ++i) {
+        printf(" %02x", ((uint8_t *)&data)[i]);
+        if (i % 16 == 15) {
+            printf("\n");
+        }
+    }
+    printf("\n");
+}
+
+void se_services_get_unique_id(uint8_t id[8]) {
+    uint32_t error_code;
+    SERVICES_system_get_eui_extension(se_sess_handle, false, id, &error_code);
+}
+
+__attribute__((noreturn)) void se_services_reset_soc(void) {
+    SERVICES_boot_reset_soc(se_sess_handle);
+    NVIC_SystemReset();
+}
+
+uint64_t se_services_rand64(void) {
+    // If the SE core is not ready then the return value can be
+    // SERVICES_REQ_NOT_ACKNOWLEDGE.  So retry a few times.
+    for (int retry = 0; retry < 100; ++retry) {
+        uint64_t value;
+        int32_t error_code;
+        uint32_t ret = SERVICES_cryptocell_get_rnd(se_sess_handle, sizeof(uint64_t), &value, &error_code);
+        if (ret == SERVICES_REQ_SUCCESS) {
+            return value;
+        }
+    }
+
+    // No random number available.
+    return 0;
+}
+
+uint32_t se_services_notify(void) {
+    uint32_t ret = SERVICES_send_msg(se_rtss_handle, LocalToGlobal(0));
+    if (ret != SERVICES_REQ_SUCCESS) {
+        return -1;
+    }
+    return 0;
+}
+
+uint32_t se_services_enable_clock(clock_enable_t clock, bool enable) {
+    uint32_t error_code;
+    SERVICES_clocks_enable_clock(se_sess_handle, clock, enable, &error_code);
+    return error_code;
+}
+
+uint32_t se_services_select_pll_source(pll_source_t source, pll_target_t target) {
+    uint32_t error_code;
+    SERVICES_clocks_select_pll_source(se_sess_handle, source, target, &error_code);
+    return error_code;
+}
+
+uint32_t se_services_get_run_profile(run_profile_t *profile) {
+    uint32_t error_code;
+    SERVICES_get_run_cfg(se_sess_handle, profile, &error_code);
+    return error_code;
+}
+
+uint32_t se_services_set_run_profile(run_profile_t *profile) {
+    uint32_t error_code;
+    SERVICES_set_run_cfg(se_sess_handle, profile, &error_code);
+    return error_code;
+}
+
+uint32_t se_services_get_off_profile(off_profile_t *profile) {
+    uint32_t error_code;
+    SERVICES_get_off_cfg(se_sess_handle, profile, &error_code);
+    return error_code;
+}
+
+uint32_t se_services_set_off_profile(off_profile_t *profile) {
+    uint32_t error_code;
+    SERVICES_set_off_cfg(se_sess_handle, profile, &error_code);
+    return error_code;
+}
+
+uint32_t se_services_boot_process_toc_entry(const uint8_t *image_id) {
+    uint32_t error_code;
+    SERVICES_boot_process_toc_entry(se_sess_handle, image_id, &error_code);
+    return error_code;
+}
+
+uint32_t se_services_boot_cpu(uint32_t cpu_id, uint32_t address) {
+    uint32_t error_code;
+    SERVICES_boot_cpu(se_sess_handle, cpu_id, address, &error_code);
+    return error_code;
+}
+
+uint32_t se_services_boot_reset_cpu(uint32_t cpu_id) {
+    uint32_t error_code;
+    if (HE_CPU->RST_CTRL & RST_CTRL_CPUWAIT_MASK) {
+        // CPU held in reset
+        return SERVICES_REQ_SUCCESS;
+    }
+
+    for (mp_uint_t start = mp_hal_ticks_ms(); ; mp_hal_delay_ms(1)) {
+        uint32_t ret = SERVICES_boot_reset_cpu(se_sess_handle, cpu_id, &error_code);
+        if (ret != SERVICES_REQ_SUCCESS) {
+            return error_code;
+        }
+
+        if ((HE_CPU->RST_STAT & RST_STAT_RST_ACK_MASK) == 0x4) {
+            return SERVICES_REQ_SUCCESS;
+        }
+
+        if ((mp_hal_ticks_ms() - start) >= 100) {
+            return SERVICES_REQ_TIMEOUT;
+        }
+    }
+
+    return error_code;
+}
+
+uint32_t se_services_boot_release_cpu(uint32_t cpu_id) {
+    uint32_t error_code;
+    SERVICES_boot_release_cpu(se_sess_handle, cpu_id, &error_code);
+    return error_code;
+}
diff --git a/ports/alif/se_services.h b/ports/alif/se_services.h
new file mode 100644
index 0000000000000..44b6584a20000
--- /dev/null
+++ b/ports/alif/se_services.h
@@ -0,0 +1,51 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#ifndef MICROPY_INCLUDED_ALIF_SE_SERVICES_H
+#define MICROPY_INCLUDED_ALIF_SE_SERVICES_H
+
+#include "services_lib_api.h"
+
+void se_services_init(void);
+void se_services_deinit(void);
+void se_services_dump_device_data(void);
+void se_services_get_unique_id(uint8_t id[8]);
+__attribute__((noreturn)) void se_services_reset_soc(void);
+uint64_t se_services_rand64(void);
+uint32_t se_services_notify(void);
+
+uint32_t se_services_enable_clock(clock_enable_t clock, bool enable);
+uint32_t se_services_select_pll_source(pll_source_t source, pll_target_t target);
+
+uint32_t se_services_get_run_profile(run_profile_t *profile);
+uint32_t se_services_set_run_profile(run_profile_t *profile);
+uint32_t se_services_get_off_profile(off_profile_t *profile);
+uint32_t se_services_set_off_profile(off_profile_t *profile);
+
+uint32_t se_services_boot_process_toc_entry(const uint8_t *image_id);
+uint32_t se_services_boot_cpu(uint32_t cpu_id, uint32_t address);
+uint32_t se_services_boot_reset_cpu(uint32_t cpu_id);
+uint32_t se_services_boot_release_cpu(uint32_t cpu_id);
+#endif // MICROPY_INCLUDED_ALIF_SE_SERVICES_H
diff --git a/ports/alif/system_tick.c b/ports/alif/system_tick.c
new file mode 100644
index 0000000000000..4f161e6709e4b
--- /dev/null
+++ b/ports/alif/system_tick.c
@@ -0,0 +1,363 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "irq.h"
+#include "system_tick.h"
+
+#define MIN(x, y) ((x) < (y) ? (x) : (y))
+
+#if MICROPY_HW_SYSTEM_TICK_USE_SYSTICK
+
+#include "shared/runtime/softtimer.h"
+#include "pendsv.h"
+
+volatile uint32_t system_tick_ms_counter;
+
+void system_tick_init(void) {
+    // Configure SysTick to run at 1kHz (1ms interval)
+    SysTick_Config(SystemCoreClock / 1000);
+    NVIC_SetPriority(SysTick_IRQn, IRQ_PRI_SYSTEM_TICK);
+    NVIC_EnableIRQ(SysTick_IRQn);
+}
+
+void SysTick_Handler(void) {
+    uint32_t uw_tick = system_tick_ms_counter + 1;
+    system_tick_ms_counter = uw_tick;
+
+    // Read the systick control register to clear the COUNTFLAG bit.
+    SysTick->CTRL;
+
+    if (soft_timer_next == uw_tick) {
+        pendsv_schedule_dispatch(PENDSV_DISPATCH_SOFT_TIMER, soft_timer_handler);
+    }
+}
+
+uint32_t system_tick_get_u32(void) {
+    return system_tick_get_u64();
+}
+
+uint64_t system_tick_get_u64(void) {
+    mp_uint_t irq_state = disable_irq();
+    uint32_t counter = SysTick->VAL;
+    uint32_t milliseconds = system_tick_ms_counter;
+    uint32_t status = SysTick->CTRL;
+    enable_irq(irq_state);
+
+    // It's still possible for the COUNTFLAG bit to get set if the counter was
+    // reloaded between reading VAL and reading CTRL.  With interrupts disabled
+    // it definitely takes less than 50 cycles between reading VAL and
+    // reading CTRL, so the test (counter > 50) is to cover the case where VAL
+    // is +ve and very close to zero, and the COUNTFLAG bit is also set.
+    if ((status & SysTick_CTRL_COUNTFLAG_Msk) && counter > 50) {
+        // This means that the HW reloaded VAL between the time we read VAL and the
+        // time we read CTRL, which implies that there is an interrupt pending
+        // to increment the tick counter.
+        milliseconds++;
+    }
+    uint32_t load = SysTick->LOAD;
+    counter = load - counter; // Convert from decrementing to incrementing
+
+    // Calculate 64-bit microsecond counter.
+    return (uint64_t)milliseconds * 1000ULL + (uint64_t)((counter * 1000) / (load + 1));
+}
+
+void system_tick_wfe_with_timeout_us(uint32_t timeout_us) {
+    if (timeout_us > 1000) {
+        // SysTick will wake us in at most 1ms.
+        __WFI();
+    }
+}
+
+#elif MICROPY_HW_SYSTEM_TICK_USE_LPTIMER
+
+#include "lptimer.h"
+#include "sys_ctrl_lptimer.h"
+
+// Channel 0 and 1 are cascaded to make a 64-bit counter.
+// Channel 2 is used for system_tick_wfe_with_timeout_us.
+// Channel 3 is used for system_tick_schedule_after_us.
+#define LPTIMER ((LPTIMER_Type *)LPTIMER_BASE)
+#define LPTIMER_CH_A (0)
+#define LPTIMER_CH_B (1)
+#define LPTIMER_CH_C (2)
+#define LPTIMER_CH_D (3)
+
+uint64_t system_tick_source_hz;
+
+void system_tick_init(void) {
+    lptimer_disable_counter(LPTIMER, LPTIMER_CH_A);
+    lptimer_disable_counter(LPTIMER, LPTIMER_CH_B);
+
+    ANA_REG->MISC_CTRL |= 1 << 0; // SEL_32K, select LXFO
+
+    select_lptimer_clk(LPTIMER_CLK_SOURCE_32K, LPTIMER_CH_A);
+    select_lptimer_clk(LPTIMER_CLK_SOURCE_CASCADE, LPTIMER_CH_B);
+    select_lptimer_clk(LPTIMER_CLK_SOURCE_32K, LPTIMER_CH_C);
+    select_lptimer_clk(LPTIMER_CLK_SOURCE_32K, LPTIMER_CH_D);
+
+    lptimer_load_max_count(LPTIMER, LPTIMER_CH_A);
+    lptimer_set_mode_freerunning(LPTIMER, LPTIMER_CH_A);
+
+    lptimer_load_max_count(LPTIMER, LPTIMER_CH_B);
+    lptimer_set_mode_freerunning(LPTIMER, LPTIMER_CH_B);
+
+    lptimer_enable_counter(LPTIMER, LPTIMER_CH_B);
+    lptimer_enable_counter(LPTIMER, LPTIMER_CH_A);
+
+    system_tick_source_hz = 32768;
+
+    NVIC_ClearPendingIRQ(LPTIMER2_IRQ_IRQn);
+    NVIC_SetPriority(LPTIMER2_IRQ_IRQn, IRQ_PRI_SYSTEM_TICK);
+    NVIC_EnableIRQ(LPTIMER2_IRQ_IRQn);
+
+    NVIC_ClearPendingIRQ(LPTIMER3_IRQ_IRQn);
+    NVIC_SetPriority(LPTIMER3_IRQ_IRQn, IRQ_PRI_SYSTEM_TICK);
+    NVIC_EnableIRQ(LPTIMER3_IRQ_IRQn);
+}
+
+void LPTIMER2_IRQHandler(void) {
+    lptimer_clear_interrupt(LPTIMER, LPTIMER_CH_C);
+    __SEV();
+}
+
+void LPTIMER3_IRQHandler(void) {
+    lptimer_clear_interrupt(LPTIMER, LPTIMER_CH_D);
+    lptimer_mask_interrupt(LPTIMER, LPTIMER_CH_D);
+    lptimer_disable_counter(LPTIMER, LPTIMER_CH_D);
+    system_tick_schedule_callback();
+    __SEV();
+}
+
+uint32_t system_tick_get_u32(void) {
+    return 0xffffffff - lptimer_get_count(LPTIMER, LPTIMER_CH_A);
+}
+
+uint64_t system_tick_get_u64(void) {
+    // Get 64-bit counter value from the hardware timer.
+    // Sample it twice in case the low counter wraps around while sampling.
+    uint32_t irq_state = disable_irq();
+    uint32_t lo0 = lptimer_get_count(LPTIMER, LPTIMER_CH_A);
+    uint32_t hi0 = lptimer_get_count(LPTIMER, LPTIMER_CH_B);
+    uint32_t lo1 = lptimer_get_count(LPTIMER, LPTIMER_CH_A);
+    uint32_t hi1 = lptimer_get_count(LPTIMER, LPTIMER_CH_B);
+    enable_irq(irq_state);
+
+    if (hi0 == hi1) {
+        // Low counter may have wrapped around between sampling of lo0 and hi0, so prefer second sampling.
+        lo0 = lo1;
+        hi0 = hi1;
+    } else {
+        // Low counter wrapped around either between sampling of hi0 and lo1, or sampling of lo1 and hi1.
+        // In either case use the first sampling.
+    }
+
+    // Convert from descending count to ascending.
+    lo0 = 0xffffffff - lo0;
+    hi0 = 0xffffffff - hi0;
+
+    // Return a 64-bit value.
+    return ((uint64_t)hi0 << 32) | (uint64_t)lo0;
+}
+
+void system_tick_wfe_with_timeout_us(uint32_t timeout_us) {
+    // Maximum 131 second timeout, to not overflow 32-bit ticks when
+    // LPTIMER is clocked at 32768Hz.
+    uint32_t timeout_ticks = (uint64_t)MIN(timeout_us, 131000000) * system_tick_source_hz / 1000000;
+
+    // Set up the LPTIMER interrupt to fire after the given timeout.
+    lptimer_disable_counter(LPTIMER, LPTIMER_CH_C);
+    lptimer_set_mode_userdefined(LPTIMER, LPTIMER_CH_C);
+    lptimer_load_count(LPTIMER, LPTIMER_CH_C, &timeout_ticks);
+    lptimer_clear_interrupt(LPTIMER, LPTIMER_CH_C);
+    lptimer_unmask_interrupt(LPTIMER, LPTIMER_CH_C);
+    lptimer_enable_counter(LPTIMER, LPTIMER_CH_C);
+
+    // Wait for an event.
+    __WFE();
+
+    // Disable the LPTIMER interrupt (in case a different interrupt woke the WFE).
+    lptimer_mask_interrupt(LPTIMER, LPTIMER_CH_C);
+    lptimer_disable_counter(LPTIMER, LPTIMER_CH_C);
+}
+
+void system_tick_schedule_after_us(uint32_t ticks_us) {
+    // Disable the interrupt in case it's still active.
+    lptimer_mask_interrupt(LPTIMER, LPTIMER_CH_D);
+
+    // Maximum 131 second timeout, to not overflow 32-bit ticks when
+    // LPTIMER is clocked at 32768Hz.
+    uint32_t timeout_ticks = (uint64_t)MIN(ticks_us, 131000000) * system_tick_source_hz / 1000000;
+
+    // Set up the LPTIMER interrupt to fire after the given timeout.
+    lptimer_disable_counter(LPTIMER, LPTIMER_CH_D);
+    lptimer_set_mode_userdefined(LPTIMER, LPTIMER_CH_D);
+    lptimer_load_count(LPTIMER, LPTIMER_CH_D, &timeout_ticks);
+    lptimer_clear_interrupt(LPTIMER, LPTIMER_CH_D);
+    lptimer_unmask_interrupt(LPTIMER, LPTIMER_CH_D);
+    lptimer_enable_counter(LPTIMER, LPTIMER_CH_D);
+}
+
+#elif MICROPY_HW_SYSTEM_TICK_USE_UTIMER
+
+#include "utimer.h"
+
+#define UTIMER ((UTIMER_Type *)UTIMER_BASE)
+#define UTIMER_CHANNEL (11)
+
+uint64_t system_core_clock_mhz;
+static volatile uint32_t system_tick_hi;
+
+static void system_tick_nvic_config(unsigned int index) {
+    NVIC_ClearPendingIRQ(UTIMER_IRQ0_IRQn + UTIMER_CHANNEL * 8 + index);
+    NVIC_SetPriority(UTIMER_IRQ0_IRQn + UTIMER_CHANNEL * 8 + index, IRQ_PRI_SYSTEM_TICK);
+    NVIC_EnableIRQ(UTIMER_IRQ0_IRQn + UTIMER_CHANNEL * 8 + index);
+}
+
+void system_tick_init(void) {
+    system_tick_hi = 0;
+    system_core_clock_mhz = SystemCoreClock / 1000000;
+
+    // Configure NVIC OVER_FLOW interrupt.
+    system_tick_nvic_config(7);
+
+    utimer_clock_enable(UTIMER, UTIMER_CHANNEL);
+    utimer_channel_config cfg = { 0 };
+    cfg.fixed_buffer = false;
+    utimer_config_direction(UTIMER, UTIMER_CHANNEL, UTIMER_COUNTER_UP, &cfg);
+    utimer_set_count(UTIMER, UTIMER_CHANNEL, UTIMER_CNTR_PTR, 0xffffffff);
+    utimer_unmask_interrupt(UTIMER, UTIMER_CHANNEL, CHAN_INTERRUPT_OVER_FLOW_MASK);
+    utimer_control_enable(UTIMER, UTIMER_CHANNEL);
+    utimer_counter_start(UTIMER, UTIMER_CHANNEL);
+
+    // Set up the UTIMER compare A interrupt, to be used by system_tick_wfe_with_timeout_us.
+    system_tick_nvic_config(2);
+    UTIMER->UTIMER_CHANNEL_CFG[UTIMER_CHANNEL].UTIMER_COMPARE_CTRL_A |= COMPARE_CTRL_DRV_COMPARE_EN;
+
+    // Set up the UTIMER compare B interrupt, to be used by soft-timer.
+    system_tick_nvic_config(4);
+    UTIMER->UTIMER_CHANNEL_CFG[UTIMER_CHANNEL].UTIMER_COMPARE_CTRL_B |= COMPARE_CTRL_DRV_COMPARE_EN;
+}
+
+// COMPARE_A_BUF1
+void UTIMER_IRQ90Handler(void) {
+    uint32_t chan_interrupt = UTIMER->UTIMER_CHANNEL_CFG[UTIMER_CHANNEL].UTIMER_CHAN_INTERRUPT;
+    if (chan_interrupt & CHAN_INTERRUPT_COMPARE_A_BUF1_MASK) {
+        utimer_clear_interrupt(UTIMER, UTIMER_CHANNEL, CHAN_INTERRUPT_COMPARE_A_BUF1_MASK);
+        __SEV();
+    }
+}
+
+// COMPARE_B_BUF1
+void UTIMER_IRQ92Handler(void) {
+    uint32_t chan_interrupt = UTIMER->UTIMER_CHANNEL_CFG[UTIMER_CHANNEL].UTIMER_CHAN_INTERRUPT;
+    if (chan_interrupt & CHAN_INTERRUPT_COMPARE_B_BUF1_MASK) {
+        utimer_clear_interrupt(UTIMER, UTIMER_CHANNEL, CHAN_INTERRUPT_COMPARE_B_BUF1_MASK);
+        utimer_mask_interrupt(UTIMER, UTIMER_CHANNEL, CHAN_INTERRUPT_COMPARE_B_BUF1_MASK);
+        system_tick_schedule_callback();
+        __SEV();
+    }
+}
+
+// OVER_FLOW
+void UTIMER_IRQ95Handler(void) {
+    uint32_t chan_interrupt = UTIMER->UTIMER_CHANNEL_CFG[UTIMER_CHANNEL].UTIMER_CHAN_INTERRUPT;
+    if (chan_interrupt & CHAN_INTERRUPT_OVER_FLOW_MASK) {
+        utimer_clear_interrupt(UTIMER, UTIMER_CHANNEL, CHAN_INTERRUPT_OVER_FLOW_MASK);
+        ++system_tick_hi;
+    }
+}
+
+uint32_t system_tick_get_u32(void) {
+    return utimer_get_count(UTIMER, UTIMER_CHANNEL, UTIMER_CNTR);
+}
+
+uint64_t system_tick_get_u64(void) {
+    uint32_t irq_state = disable_irq();
+    uint32_t ticks_lo = utimer_get_count(UTIMER, UTIMER_CHANNEL, UTIMER_CNTR);
+    uint32_t ticks_hi = system_tick_hi;
+    uint32_t chan_interrupt = UTIMER->UTIMER_CHANNEL_CFG[UTIMER_CHANNEL].UTIMER_CHAN_INTERRUPT;
+    enable_irq(irq_state);
+
+    if (chan_interrupt & CHAN_INTERRUPT_OVER_FLOW_MASK) {
+        // The timer had an overflow while interrupts were disabled.
+        if (ticks_lo < 0x80000000) {
+            // The timer had an overflow just before we sampled it.
+            ++ticks_hi;
+        }
+    }
+
+    // This ticks runs at SystemCoreClock.
+    return (uint64_t)ticks_hi << 32 | ticks_lo;
+}
+
+void system_tick_wfe_with_timeout_us(uint32_t timeout_us) {
+    // Maximum 10 second timeout, to not overflow 32-bit ticks when
+    // system_core_clock_mhz==400.
+    uint32_t timeout_ticks = MIN(timeout_us, 10000000) * system_core_clock_mhz;
+
+    // Set up the UTIMER compare interrupt to fire after the given timeout.
+    uint32_t cntr = utimer_get_count(UTIMER, UTIMER_CHANNEL, UTIMER_CNTR);
+    utimer_set_count(UTIMER, UTIMER_CHANNEL, UTIMER_COMPARE_A_BUF1, cntr + timeout_ticks);
+    utimer_clear_interrupt(UTIMER, UTIMER_CHANNEL, CHAN_INTERRUPT_COMPARE_A_BUF1_MASK);
+    utimer_unmask_interrupt(UTIMER, UTIMER_CHANNEL, CHAN_INTERRUPT_COMPARE_A_BUF1_MASK);
+
+    // Wait for an event (or compare timeout event) if the timeout hasn't expired yet
+    // (this check handles the case of short timeouts).
+    uint32_t cntr2 = utimer_get_count(UTIMER, UTIMER_CHANNEL, UTIMER_CNTR);
+    if ((uint32_t)(cntr2 - cntr) < timeout_ticks) {
+        __WFE();
+    }
+
+    // Disable the UTIMER compare interrupt.
+    utimer_mask_interrupt(UTIMER, UTIMER_CHANNEL, CHAN_INTERRUPT_COMPARE_A_BUF1_MASK);
+}
+
+void system_tick_schedule_after_us(uint32_t ticks_us) {
+    // Disable the interrupt in case it's still active.
+    utimer_mask_interrupt(UTIMER, UTIMER_CHANNEL, CHAN_INTERRUPT_COMPARE_B_BUF1_MASK);
+
+    // Maximum 10 second timeout, to not overflow 32-bit ticks when
+    // system_core_clock_mhz==400.
+    uint32_t timeout_ticks = MIN(ticks_us, 10000000) * system_core_clock_mhz;
+
+    // Set up the UTIMER compare interrupt to fire after the given timeout.
+    uint32_t cntr = utimer_get_count(UTIMER, UTIMER_CHANNEL, UTIMER_CNTR);
+    utimer_set_count(UTIMER, UTIMER_CHANNEL, UTIMER_COMPARE_B_BUF1, cntr + timeout_ticks);
+    utimer_clear_interrupt(UTIMER, UTIMER_CHANNEL, CHAN_INTERRUPT_COMPARE_B_BUF1_MASK);
+    utimer_unmask_interrupt(UTIMER, UTIMER_CHANNEL, CHAN_INTERRUPT_COMPARE_B_BUF1_MASK);
+
+    // Handle the case of short timeouts.
+    uint32_t cntr2 = utimer_get_count(UTIMER, UTIMER_CHANNEL, UTIMER_CNTR);
+    if ((uint32_t)(cntr2 - cntr) >= timeout_ticks) {
+        if (!(UTIMER->UTIMER_CHANNEL_CFG[UTIMER_CHANNEL].UTIMER_CHAN_INTERRUPT_MASK & CHAN_INTERRUPT_COMPARE_B_BUF1_MASK)) {
+            // Interrupt is still enabled, so disable it and manually call the callback.
+            utimer_mask_interrupt(UTIMER, UTIMER_CHANNEL, CHAN_INTERRUPT_COMPARE_B_BUF1_MASK);
+            system_tick_schedule_callback();
+        }
+    }
+}
+
+#endif
diff --git a/ports/alif/system_tick.h b/ports/alif/system_tick.h
new file mode 100644
index 0000000000000..a380808b2e043
--- /dev/null
+++ b/ports/alif/system_tick.h
@@ -0,0 +1,44 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#ifndef MICROPY_INCLUDED_ALIF_SYSTEM_TICK_H
+#define MICROPY_INCLUDED_ALIF_SYSTEM_TICK_H
+
+#include "py/mpconfig.h"
+
+#if MICROPY_HW_SYSTEM_TICK_USE_LPTIMER
+extern uint64_t system_tick_source_hz;
+#elif MICROPY_HW_SYSTEM_TICK_USE_UTIMER
+extern uint64_t system_core_clock_mhz;
+#endif
+
+void system_tick_init(void);
+uint32_t system_tick_get_u32(void);
+uint64_t system_tick_get_u64(void);
+void system_tick_wfe_with_timeout_us(uint32_t timeout_us);
+void system_tick_schedule_after_us(uint32_t ticks_us);
+void system_tick_schedule_callback(void);
+
+#endif // MICROPY_INCLUDED_ALIF_SYSTEM_TICK_H
diff --git a/ports/alif/tinyusb_port/alif_dcd_reg.h b/ports/alif/tinyusb_port/alif_dcd_reg.h
new file mode 100644
index 0000000000000..84220f6be4ce4
--- /dev/null
+++ b/ports/alif/tinyusb_port/alif_dcd_reg.h
@@ -0,0 +1,691 @@
+// *FORMAT-OFF*
+///-------------------------------------------------------------------------------------------------
+/// @file    alif_dcd_reg.h
+/// @author  karol.saja@alifsemi.com
+/// @version 0.0.1
+/// @date    2023-09-08
+/// @brief   Low Level SPI driver
+///-------------------------------------------------------------------------------------------------
+
+#ifndef __ALIF_DCD_REG_H__
+#define __ALIF_DCD_REG_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif // __cplusplus
+
+//--------------------------------------------------------------------------------------------------
+
+#define _rw volatile uint32_t
+#define __w volatile uint32_t
+#define __r volatile const uint32_t
+
+volatile struct {
+    union {
+        _rw gsbuscfg0;
+        struct {
+            _rw incrbrstena    : 1;
+            _rw incr4brstena   : 1;
+            _rw incr8brstena   : 1;
+            _rw incr16brstena  : 1;
+            _rw incr32brstena  : 1;
+            _rw incr64brstena  : 1;
+            _rw incr128brstena : 1;
+            _rw incr256brstena : 1;
+            __r : 2;
+            _rw desbigend      : 1;
+            _rw datbigend      : 1;
+            __r : 4;
+            _rw deswrreqinfo   : 4;
+            _rw datwrreqinfo   : 4;
+            _rw desrdreqinfo   : 4;
+            _rw datrdreqinfo   : 4;
+        } gsbuscfg0_b;
+    };
+
+    union {
+        _rw gsbuscfg1;
+        struct {
+            __r : 8;
+            _rw pipetranslimit : 4;
+            _rw en1kpage       : 1;
+            __r : 19;
+        } gsbuscfg1_b;
+    };
+
+    __r : 32; __r : 32;
+
+    union {
+        _rw gctl;
+        struct {
+            _rw dsblclkgtng      : 1;
+            _rw gblhibernationen : 1;
+            __r : 1;
+            _rw disscramble      : 1;
+            _rw scaledown        : 2;
+            _rw ramclksel        : 2;
+            __r : 2;
+            _rw sofitpsync       : 1;
+            _rw coresoftreset    : 1;
+            _rw prtcapdir        : 2;
+            _rw frmscldwn        : 2;
+            __r : 1;
+            _rw bypssetaddr      : 1;
+            __r : 14;
+        } gctl_b;
+    };
+
+    __r : 32;
+
+    union {
+        _rw gsts;
+        struct {
+            __r curmod        : 2;
+            __r : 2;
+            _rw buserraddrvld : 1;
+            _rw csrtimeout    : 1;
+            __r device_ip     : 1;
+            __r host_ip       : 1;
+            __r adp_ip        : 1;
+            __r bc_ip         : 1;
+            __r otg_ip        : 1;
+            __r ssic_ip       : 1;
+            __r : 8;
+            __r cbelt         : 12;
+        } gsts_b;
+    };
+
+    union {
+        _rw guctl1;
+        struct {
+            _rw loa_filter_en             : 1;
+            _rw ovrld_l1_susp_com         : 1;
+            _rw hc_parchk_disable         : 1;
+            _rw hc_errata_enable          : 1;
+            _rw l1_susp_thrld_for_host    : 4;
+            _rw l1_susp_thrld_en_for_host : 1;
+            _rw dev_hs_nyet_bulk_spr      : 1;
+            _rw resume_opmode_hs_host     : 1;
+            __r : 1;
+            _rw disusb2refclkgtng         : 1;
+            __r : 2;
+            _rw parkmode_disable_fsls     : 1;
+            _rw parkmode_disable_hs       : 1;
+            __r : 1;
+            _rw nak_per_enh_hs            : 1;
+            _rw nak_per_enh_fs            : 1;
+            _rw dev_lsp_tail_lock_dis     : 1;
+            _rw ip_gap_add_on             : 2;
+            _rw dev_l1_exit_by_hw         : 1;
+            __r : 2;
+            _rw dev_trb_out_spr_ind       : 1;
+            _rw tx_ipgap_linecheck_dis    : 1;
+            _rw filter_se0_fsls_eop       : 1;
+            __r : 1;
+            _rw dev_decouple_l1l2_evt     : 1;
+        } guctl1_b;
+    };
+
+    union {
+        _rw gsnpsid;
+    };
+
+    __r : 32;
+
+    union {
+        _rw guid;
+        struct {
+            _rw userid : 32;
+        } guid_b;
+    };
+
+    union { // <- host only, leaving unimplemented for now [FIXME]
+        _rw guctl;
+        struct {
+        } guctl_b;
+    };
+
+    union {
+        _rw gbuserraddrlo;
+        struct {
+            _rw buserraddr : 32;
+        } gbuserraddrlo_b;
+    };
+
+    union {
+        _rw gbuserraddrhi;
+        struct {
+            _rw buserraddr : 32;
+        } gbuserraddrhi_b;
+    };
+
+    __r : 32; __r : 32;
+
+    __r ghwparams[8];
+
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32;
+
+    // base + 0x9C here
+
+    union {
+        _rw guctl2;
+        struct {
+            __r : 11;
+            _rw disablecfc         : 1;
+            _rw enableepcacheevict : 1;
+            __r : 1;
+            _rw rst_actbitlater    : 1;
+            __r : 4;
+            _rw en_hp_pm_timer     : 7;
+            __r : 6;
+        } guctl2_b;
+    };
+
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+
+    // base + 0x100 here
+
+    union {
+        _rw gusb2phycfg0;
+        struct {
+            _rw toutcal                  : 3;
+            _rw phyif                    : 1;
+            __r ulpi_utmi_sel            : 1;
+            __r fsintf                   : 1;
+            _rw suspendusb20             : 1;
+            _rw physel                   : 1;
+            _rw enblslpm                 : 1;
+            _rw xcvrdly                  : 1;
+            _rw usbtrdtim                : 4;
+            __r : 5;
+            _rw lsipd                    : 3;
+            _rw lstrd                    : 3;
+            _rw ovrd_fsls_disc_time      : 1;
+            __r inv_sel_hsic             : 1;
+            __r hsic_con_width_adj       : 2;
+            _rw ulpi_lpm_with_opmode_chk : 1;
+            _rw u2_freeclk_exists        : 1;
+            _rw physoftrst               : 1;
+        } gusb2phycfg0_b;
+    };
+
+    __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+
+    // base + 0x200 here
+
+    union {
+        _rw gtxfifosiz[4];
+        struct {
+            _rw txfdep : 16;
+            _rw txfstaddr : 16;
+        } gtxfifosiz_b[4];
+    };
+
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+
+    // base + 0x280 here
+
+    union {
+        _rw grxfifosiz[4];
+        struct {
+            _rw rxfdep : 16;
+            _rw rxfstaddr : 16;
+        } grxfifosiz_b[4];
+    };
+
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+
+    // base + 0x300 here
+
+    union {
+        _rw gevntadrlo0;
+        struct {
+            _rw evntadrlo : 32;
+        } gevntadrlo0_b;
+    };
+
+    union {
+        _rw gevntadrhi0;
+        struct {
+            _rw evntadrhi : 32;
+        } gevntadrhi0_b;
+    };
+
+    union {
+        _rw gevntsiz0;
+        struct {
+            _rw eventsiz : 16;
+            __r : 15;
+            _rw evntintrptmask : 1;
+        } gevntsiz0_b;
+    };
+
+    union {
+        _rw gevntcount0;
+        struct {
+            _rw evntcount : 16;
+            __r : 15;
+            _rw evnt_handler_busy : 1;
+        } gevntcount0_b;
+    };
+
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+
+    // base + 0x500 here
+
+    __r ghwparams8;
+
+    __r : 32; __r : 32; __r : 32;
+
+    // base + 0x510 here
+
+    union {
+        _rw gtxfifopridev;
+        struct {
+            _rw gtxfifopridev : 4;
+            __r : 28;
+        } gtxfifopridev_b;
+    };
+
+    __r : 32;
+
+    union {
+        _rw gtxfifoprihst;
+        struct {
+            _rw gtxfifoprihst : 2;
+            __r : 30;
+        } gtxfifoprihst_b;
+    };
+
+    union {
+        _rw grxfifoprihst;
+        struct {
+            _rw grxfifoprihst : 2;
+            __r : 30;
+        } grxfifoprihst_b;
+    };
+
+    __r : 32; __r : 32; __r : 32; __r : 32;
+
+    // base + 0x530 here
+
+    union {
+        _rw gfladj;
+        struct {
+            _rw gfladj_30mhz : 6;
+            __r : 1;
+            _rw gfladj_30mhz_sdbnd_sel : 1;
+            _rw gfladj_refclk_fladj : 14;
+            __r : 1;
+            _rw gfladj_refclk_lpm_sel : 1;
+            _rw gfladj_refclk_240mhz_decr : 7;
+            _rw gfladj_refclk_240mhzdecr_pls1 : 1;
+        } gfladj_b;
+    };
+
+    __r : 32; __r : 32; __r : 32;
+
+    // base + 0x540 here
+
+    union {
+        _rw gusb2rhbctl0;
+        struct {
+            _rw ovrd_l1timeout : 4;
+            __r : 28;
+        } gusb2rhbctl0_b;
+    };
+
+} *ugbl = (void *) (USB_BASE + 0xC100);
+
+volatile struct {
+    union {
+        _rw dcfg;
+        struct {
+            _rw devspd : 3;
+            _rw devaddr : 7;
+            __r : 2;
+            _rw intrnum : 5;
+            _rw nump : 5;
+            _rw lpmcap : 1;
+            _rw ignstrmpp : 1;
+            __r : 8;
+        } dcfg_b;
+    };
+
+    union {
+        _rw dctl;
+        struct {
+            __r : 1;
+            _rw tstctl : 4;
+            __w ulstchngreq : 4;
+            __r : 7;
+            _rw css : 1;
+            _rw crs : 1;
+            _rw l1hibernationen : 1;
+            _rw keepconnect : 1;
+            _rw lpm_nyet_thres : 4;
+            _rw hirdthres : 5;
+            __r : 1;
+            _rw csftrst : 1;
+            _rw run_stop : 1;
+        } dctl_b;
+    };
+
+    union {
+        _rw devten;
+        struct {
+            _rw dissconnevten : 1;
+            _rw usbrstevten : 1;
+            _rw connectdoneevten : 1;
+            _rw ulstcngen : 1;
+            _rw wkupevten : 1;
+            _rw hibernationreqevten : 1;
+            _rw u3l2l1suspen : 1;
+            _rw softevten : 1;
+            _rw l1suspen : 1;
+            _rw errticerrevten : 1;
+            __r : 2;
+            _rw vendevtstrcvden : 1;
+            __r : 1;
+            _rw l1wkupevten : 1;
+            __r : 1;
+            _rw eccerren : 1;
+            __r : 15;
+        } devten_b;
+    };
+
+    union {
+        _rw dsts;
+        struct {
+            __r connectspd : 3;
+            __r soffn : 14;
+            __r rxfifoempty : 1;
+            __r usblnkst : 4;
+            __r devctrlhlt : 1;
+            __r coreidle : 1;
+            __r sss : 1;
+            __r rss : 1;
+            __r : 2;
+            _rw sre : 1;
+            __r dcnrd : 1;
+            __r : 2;
+        } dsts_b;
+    };
+
+    union {
+        _rw dgcmdpar;
+        struct {
+            _rw parameter : 32;
+        } dgcmdpar_b;
+    };
+
+    union {
+        _rw dgcmd;
+        struct {
+            _rw cmdtyp : 8;
+            _rw cmdioc : 1;
+            __r : 1;
+            _rw cmdact : 1;
+            __r : 1;
+            __r cmdstatus : 4;
+            __r : 16;
+        } dgcmd_b;
+    };
+
+    __r : 32; __r : 32;
+
+    union {
+        _rw dalepena;
+        struct {
+            _rw usbactep : 32;
+        } dalepena_b;
+    };
+
+    __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+
+    // base + 0x100 here
+
+    struct {
+        union {
+            _rw par2;
+            struct {
+                _rw parameter : 32;
+            } par2_b;
+        };
+
+        union {
+            _rw par1;
+            struct {
+                _rw parameter : 32;
+            } par1_b;
+        };
+
+        union {
+            _rw par0;
+            struct {
+                _rw parameter : 32;
+            } par0_b;
+        };
+
+        union {
+            _rw depcmd;
+            struct {
+                _rw cmdtyp : 4;
+                __r : 4;
+                _rw cmdioc : 1;
+                __r : 1;
+                _rw cmdact : 1;
+                _rw hipri_forcerm : 1;
+                _rw cmdstatus : 4;
+                _rw commandparam : 16;
+            } depcmd_b;
+        };
+    } depcmd[8];
+
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+    __r : 32; __r : 32; __r : 32; __r : 32;
+
+    // base + 0x300 here
+
+    union {
+        _rw dev_imod0;
+        struct {
+            _rw device_imodi : 16;
+            _rw device_imocd : 16;
+        } dev_imod0_b;
+    };
+} *udev = (void *) (USB_BASE + 0xC700);
+
+//--------------------------------------------------------------------------------------------------
+
+typedef union {
+    _rw val : 32;
+    struct {
+        _rw sig  : 8;
+        _rw evt  : 5;
+        __r : 3;
+        _rw info : 9;
+        __r : 7;
+    } devt;
+    struct {
+        _rw sig : 1;
+        _rw ep  : 5;
+        _rw evt : 4;
+        __r : 2;
+        _rw sts : 4;
+        _rw par : 16;
+    } depevt;
+} evt_t;
+
+//--------------------------------------------------------------------------------------------------
+
+enum {
+    CMDTYP_RESERVED = 0,
+    CMDTYP_DEPCFG,
+    CMDTYP_DEPXFERCFG,
+    CMDTYP_DEPGETSTATE,
+    CMDTYP_DEPSSTALL,
+    CMDTYP_DEPCSTALL,
+    CMDTYP_DEPSTRTXFER,
+    CMDTYP_DEPUPDXFER,
+    CMDTYP_DEPENDXFER,
+    CMDTYP_DEPSTARTCFG
+} DEPCMD_CMDTYP;
+
+enum {
+    DEVT_DISCONNEVT = 0,
+    DEVT_USBRST,
+    DEVT_CONNECTDONE,
+    DEVT_ULSTCHNG,
+    DEVT_WKUPEVT,
+    // DEVT_HIBRQ not implemented
+    DEVT_USBSUSP = 6,
+    DEVT_SOF,
+    DEVT_L1SUSP,
+    DEVT_ERRTICERR,
+    DEVT_CMDCMPLT,
+    DEVT_EVNTOVERFLOW,
+    DEVT_VNDDEVTSTRCVED,
+    // reserved
+    DEVT_L1RESM = 14,
+    // reserved
+    DEVT_ECCERR = 16
+} DEVT;
+
+enum {
+    // reserved
+    DEPEVT_XFERCOMPLETE = 1,
+    DEPEVT_XFERINPROGRESS,
+    DEPEVT_XFERNOTREADY,
+    // not implemented
+    DEPEVT_STREAMEVT = 6,
+    DEPEVT_EPCMDCMPLT
+} DEPEVT;
+
+enum {
+    // reserved
+    TRBCTL_NORMAL = 1,
+    TRBCTL_CTL_SETUP,
+    TRBCTL_CTL_STAT2,
+    TRBCTL_CTL_STAT3,
+    TRBCTL_CTL_DATA,
+    TRBCTL_ISO_FIRST,
+    TRBCTL_ISO,
+    TRBCTL_LINK,
+    TRBCTL_NORMAL_ZLP
+} TRBCTL;
+
+//--------------------------------------------------------------------------------------------------
+
+//--------------------------------------------------------------------------------------------------
+
+//--------------------------------------------------------------------------------------------------
+
+//--------------------------------------------------------------------------------------------------
+
+#ifdef __cplusplus
+}
+#endif // __cplusplus
+
+
+#endif // __ALIF_DCD_REG_H__
diff --git a/ports/alif/tinyusb_port/tusb_alif_dcd.c b/ports/alif/tinyusb_port/tusb_alif_dcd.c
new file mode 100644
index 0000000000000..9a990cedbe387
--- /dev/null
+++ b/ports/alif/tinyusb_port/tusb_alif_dcd.c
@@ -0,0 +1,695 @@
+// *FORMAT-OFF*
+/* Copyright (C) 2024 Alif Semiconductor - All Rights Reserved.
+ * Use, distribution and modification of this code is permitted under the
+ * terms stated in the Alif Semiconductor Software License Agreement
+ *
+ * You should have received a copy of the Alif Semiconductor Software
+ * License Agreement with this file. If not, please write to:
+ * contact@alifsemi.com, or visit: https://alifsemi.com/license
+ *
+ */
+
+#include "tusb_option.h"
+
+#if CFG_TUD_ENABLED
+
+#if defined(CORE_M55_HE)
+#include "M55_HE.h"
+#elif defined(CORE_M55_HP)
+#include "M55_HP.h"
+#else
+#error "Unsupported core!"
+#endif
+
+#include "device/dcd.h"
+
+#include "alif_dcd_reg.h"
+
+#include "clk.h"
+#include "power.h"
+
+// #define TUSB_ALIF_DEBUG
+// #define TUSB_ALIF_DEBUG_DEPTH (2048)
+
+#if defined(TUSB_ALIF_DEBUG)
+#if (1 < TUSB_ALIF_DEBUG_DEPTH)
+#define LOG(...)      memset(logbuf[bi % TUSB_ALIF_DEBUG_DEPTH], ' ', 48);\
+                          snprintf(logbuf[(bi++) % TUSB_ALIF_DEBUG_DEPTH], 48, __VA_ARGS__);
+char logbuf[TUSB_ALIF_DEBUG_DEPTH][48];
+int bi = 0;
+#else
+#define LOG(...)      memset(logbuf, ' ', 48);\
+                          snprintf(logbuf, 48, __VA_ARGS__)
+char logbuf[48];
+#endif
+#else
+#define LOG(...)
+#endif
+
+/// Structs and Buffers --------------------------------------------------------
+
+static uint32_t  _evnt_buf[1024] CFG_TUSB_MEM_SECTION __attribute__((aligned(4096))); // [TODO] runtime alloc
+static volatile uint32_t* _evnt_tail;
+
+static uint8_t  _ctrl_buf[64] CFG_TUSB_MEM_SECTION __attribute__((aligned(32))); // [TODO] runtime alloc
+static uint32_t _xfer_trb[8][4] CFG_TUSB_MEM_SECTION __attribute__((aligned(32))); // [TODO] runtime alloc
+static uint16_t _xfer_bytes[8];
+static bool     _ctrl_long_data = false;
+static bool     _xfer_cfgd = false;
+// static bool     _addr_req = false;
+static uint32_t _sts_stage = 0;
+
+/// Private Functions ----------------------------------------------------------
+
+static uint8_t _dcd_cmd_wait(uint8_t ep, uint8_t typ, uint16_t param);
+static uint8_t _dcd_start_xfer(uint8_t ep, void* buf, uint32_t size, uint8_t type);
+
+static void _dcd_handle_depevt(uint8_t ep, uint8_t evt, uint8_t sts, uint16_t par);
+static void _dcd_handle_devt(uint8_t evt, uint16_t info);
+
+/// API Extension --------------------------------------------------------------
+
+void dcd_uninit(void);
+
+/// Device Setup ---------------------------------------------------------------
+
+// Initializes the USB peripheral for device mode and enables it.
+// This function should enable internal D+/D- pull-up for enumeration.
+void dcd_init(uint8_t rhport)
+{
+    // enable 20mhz clock
+    enable_cgu_clk20m();
+    // enable usb peripheral clock
+    enable_usb_periph_clk();
+    // power up usb phy
+    enable_usb_phy_power();
+    // disable usb phy isolation
+    disable_usb_phy_isolation();
+    // clear usb phy power-on-reset signal
+    CLKCTL_PER_MST->USB_CTRL2 &= ~(1 << 8);
+
+    // force stop/disconnect
+    udev->dctl_b.run_stop = 0;
+
+    // dctl set csftrst to 1 and wait for 0
+    udev->dctl_b.csftrst = 1;
+    while(0 != udev->dctl_b.csftrst);
+
+    sys_busy_loop_us(50000);
+    ugbl->gctl_b.coresoftreset = 1;
+    ugbl->gusb2phycfg0_b.physoftrst = 1;
+    sys_busy_loop_us(50000);
+    ugbl->gusb2phycfg0_b.physoftrst = 0;
+    sys_busy_loop_us(50000);
+    ugbl->gctl_b.coresoftreset = 0;
+    sys_busy_loop_us(50000);
+
+    ugbl->gsbuscfg0 = 0x00000009;
+    // ugbl->gusb2phycfg0 = 0x4000154F; // [TODO] document as bits
+    uint32_t reg = ugbl->gusb2phycfg0;
+    reg &= ~((1 << 3) | (1 << 4) | (0xF << 10)); // clear phyif, ulpi_utmi_sel and usbtrdtim
+    reg |= ((1 << 3) | (5 << 10));
+    ugbl->gusb2phycfg0 = reg;
+
+    // set device speed (USBHS only)
+    udev->dcfg_b.devspd = 0x0; // HS, this will need #if condition [TODO]
+
+    // allocate ring buffer for events
+    memset(_evnt_buf, 0, sizeof(_evnt_buf));
+    RTSS_CleanDCache_by_Addr(_evnt_buf, sizeof(_evnt_buf));
+    _evnt_tail = _evnt_buf;
+    ugbl->gevntadrlo0 = (uint32_t) LocalToGlobal(_evnt_buf);
+    ugbl->gevntsiz0_b.eventsiz = (uint32_t) sizeof(_evnt_buf);
+    ugbl->gevntcount0_b.evntcount = 0;
+
+    // write devten to enable usb reset, conn done, link state change...
+    udev->devten_b.dissconnevten = 1;
+    udev->devten_b.usbrstevten = 1;
+    udev->devten_b.connectdoneevten = 1;
+    udev->devten_b.ulstcngen = 1;
+
+    // begin endpoint setup
+    _dcd_cmd_wait(0, CMDTYP_DEPSTARTCFG, 0);
+
+    // configure CONTROL IN and OUT eps
+    udev->depcmd[0].par1 = (0 << 25) | (1 << 10) | (1 << 8);
+    udev->depcmd[0].par0 = (0 << 22) | (0 << 17) | (512 << 3) | (0 << 1);
+    _dcd_cmd_wait(0, CMDTYP_DEPCFG, 0);
+
+    udev->depcmd[1].par1 = (1 << 25) | (1 << 10) | (1 << 8);
+    udev->depcmd[1].par0 = (0 << 22) | (0 << 17) | (512 << 3) | (0 << 1);
+    _dcd_cmd_wait(1, CMDTYP_DEPCFG, 0);
+
+    // set initial xfer configuration for CONTROL eps
+    udev->depcmd[0].par0 = 1;
+    _dcd_cmd_wait(0, CMDTYP_DEPXFERCFG, 0);
+
+    udev->depcmd[1].par0 = 1;
+    _dcd_cmd_wait(1, CMDTYP_DEPXFERCFG, 0);
+
+    // enable pull-ups
+    dcd_connect(rhport);
+
+    // prepare trb for the first setup packet
+    memset(_ctrl_buf, 0, sizeof(_ctrl_buf));
+    _xfer_trb[0][0] = (uint32_t) LocalToGlobal(_ctrl_buf);
+    _xfer_trb[0][1] = 0;
+    _xfer_trb[0][2] = 8;
+    _xfer_trb[0][3] = (1 << 11) | (1 << 10) | (TRBCTL_CTL_SETUP << 4) | (1 << 1) | (1 << 0);
+    RTSS_CleanDCache_by_Addr(_xfer_trb[0], sizeof(_xfer_trb[0]));
+
+    // send trb to the usb dma
+    udev->depcmd[0].par1 = (uint32_t) LocalToGlobal(_xfer_trb[0]);
+    udev->depcmd[0].par0 = 0;
+    _dcd_cmd_wait(0, CMDTYP_DEPSTRTXFER, 0);
+
+    // enable ep event interrupts for CONTROL OUT and IN
+    udev->dalepena_b.usbactep = (1 << 1) | (1 << 0);
+
+    // enable interrupts in the NVIC
+#if !defined(TUSB_ALIF_NO_IRQ_CFG)
+    NVIC_ClearPendingIRQ(USB_IRQ_IRQn);
+    NVIC_SetPriority(USB_IRQ_IRQn, 5);
+#endif
+    dcd_int_enable(rhport);
+}
+
+
+// Processes all the hardware generated events e.g bus reset, new data packet
+// from host... It will be called by application in the MCU USB interrupt handler.
+void dcd_int_handler(uint8_t rhport)
+{
+    LOG("%010u IRQ enter, evntcount %u", DWT->CYCCNT, ugbl->gevntcount0_b.evntcount);
+
+    // process failures first
+    if (ugbl->gsts_b.device_ip) {
+        if (ugbl->gsts_b.csrtimeout || ugbl->gsts_b.buserraddrvld) {
+            // buserraddrvld is usually set when USB tries to write to protected
+            // memory region. Check linker script to ensure USB event buffer and
+            // TRBs reside in bulk memory or other NS-allowed region
+            __BKPT(0);
+        }
+    }
+
+    // cycle through event queue
+    // evaluate on every iteration to prevent unnecessary isr exit/reentry
+    while (0 < ugbl->gevntcount0_b.evntcount) {
+        RTSS_InvalidateDCache_by_Addr(_evnt_buf, sizeof(_evnt_buf));
+        volatile evt_t e = {.val = *_evnt_tail++};
+
+        LOG("%010u IRQ loop, evntcount %u evnt %08x", DWT->CYCCNT,
+            ugbl->gevntcount0_b.evntcount, e.val);
+
+        // wrap around
+        if (_evnt_tail >= (_evnt_buf + 1024)) _evnt_tail = _evnt_buf;
+
+        // dispatch the right handler for the event type
+        if (0 == e.depevt.sig) { // DEPEVT
+            _dcd_handle_depevt(e.depevt.ep, e.depevt.evt, e.depevt.sts, e.depevt.par);
+        } else if (1 == e.devt.sig) { // DEVT
+            _dcd_handle_devt(e.devt.evt, e.devt.info);
+        } else {
+            // bad event??
+            LOG("Unknown event %u", e.val);
+            __BKPT(0);
+        }
+
+        // consume one event
+        ugbl->gevntcount0 = 4;
+    }
+
+    LOG("%010u IRQ exit, evntcount %u", DWT->CYCCNT, ugbl->gevntcount0_b.evntcount);
+}
+
+
+// Enables the USB device interrupt.
+// May be used to prevent concurrency issues when mutating data structures
+// shared between main code and the interrupt handler.
+void dcd_int_enable (uint8_t rhport)
+{
+    NVIC_EnableIRQ(USB_IRQ_IRQn);
+
+    (void) rhport;
+}
+
+// Disables the USB device interrupt.
+// May be used to prevent concurrency issues when mutating data structures
+// shared between main code and the interrupt handler.
+void dcd_int_disable(uint8_t rhport)
+{
+    NVIC_DisableIRQ(USB_IRQ_IRQn);
+
+    (void) rhport;
+}
+
+// Receive Set Address request, mcu port must also include status IN response.
+// If your peripheral automatically changes address during enumeration you may
+// leave this empty and also no queue an event for the corresponding SETUP packet.
+void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
+{
+    LOG("%010u >%s", DWT->CYCCNT, __func__);
+
+    udev->dcfg_b.devaddr = dev_addr;
+    dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_IN), NULL, 0);
+}
+
+// Called to remote wake up host when suspended (e.g hid keyboard)
+void dcd_remote_wakeup(uint8_t rhport)
+{
+    LOG("%010u >%s", DWT->CYCCNT, __func__);
+}
+
+// Connect by enabling internal pull-up resistor on D+/D-
+void dcd_connect(uint8_t rhport)
+{
+    udev->dctl_b.run_stop = 1;
+
+    (void) rhport;
+}
+
+// Disconnect by disabling internal pull-up resistor on D+/D-
+void dcd_disconnect(uint8_t rhport)
+{
+    // [TODO] clear all xfers and eps first
+
+    udev->dctl_b.run_stop = 0;
+
+    (void) rhport;
+}
+
+// Enable/Disable Start-of-frame interrupt. Default is disabled
+void dcd_sof_enable(uint8_t rhport, bool en)
+{
+    LOG("%010u >%s", DWT->CYCCNT, __func__);
+
+    udev->devten_b.softevten = en;
+}
+
+
+/// Endpoint Management --------------------------------------------------------
+
+// Invoked when a control transfer's status stage is complete.
+// May help DCD to prepare for next control transfer, this API is optional.
+void dcd_edpt0_status_complete(uint8_t rhport, tusb_control_request_t const * request)
+{
+    LOG("%010u >%s", DWT->CYCCNT, __func__);
+
+    _ctrl_long_data = false;
+    _dcd_start_xfer(TUSB_DIR_OUT, _ctrl_buf, 8, TRBCTL_CTL_SETUP);
+}
+
+// Opening an endpoint is done for all non-control endpoints once the host picks
+// a configuration that the device should use.
+// At this point, the endpoint should be enabled in the peripheral and
+// configured to match the endpoint descriptor.
+// Pay special attention to the direction of the endpoint you can get from the
+// helper methods above. It will likely change what registers you are setting.
+// Also make sure to enable endpoint specific interrupts.
+bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * desc_ep)
+{
+    LOG("%010u >%s %u %s %u %u", DWT->CYCCNT, __func__, desc_ep->bEndpointAddress,
+        desc_ep->bmAttributes.xfer == TUSB_XFER_BULK ? "bulk" : "int",
+        desc_ep->wMaxPacketSize, desc_ep->bInterval);
+
+    if (TUSB_XFER_ISOCHRONOUS == desc_ep->bmAttributes.xfer)
+        return false;
+
+    uint8_t ep = (tu_edpt_number(desc_ep->bEndpointAddress) << 1) |
+                 tu_edpt_dir(desc_ep->bEndpointAddress);
+
+    // [TODO] verify that the num doesn't exceed hw max
+
+    if (false == _xfer_cfgd) {
+        _dcd_cmd_wait(0, CMDTYP_DEPSTARTCFG, 2);
+        _xfer_cfgd = true;
+    }
+
+    uint8_t fifo_num = TUSB_DIR_IN == tu_edpt_dir(desc_ep->bEndpointAddress) ?
+                       tu_edpt_number(desc_ep->bEndpointAddress) : 0;
+    uint8_t interval = 0 < desc_ep->bInterval ? (desc_ep->bInterval - 1) : 0;
+
+    udev->depcmd[ep].par1 = (ep << 25) | (interval << 16) |
+                            (1 << 10) | (1 << 8);
+    udev->depcmd[ep].par0 = (0 << 30) | (0 << 22) | (fifo_num << 17) |
+                            ((desc_ep->wMaxPacketSize & 0x7FF) << 3) |
+                            (desc_ep->bmAttributes.xfer << 1);
+
+    _dcd_cmd_wait(ep, CMDTYP_DEPCFG, 0);
+    udev->depcmd[ep].par0 = 1;
+    _dcd_cmd_wait(ep, CMDTYP_DEPXFERCFG, 0);
+
+    udev->dalepena_b.usbactep |= (1 << ep);
+
+    return true;
+}
+
+// Close all non-control endpoints, cancel all pending transfers if any.
+// Invoked when switching from a non-zero Configuration by SET_CONFIGURE therefore
+// required for multiple configuration support.
+void dcd_edpt_close_all(uint8_t rhport)
+{
+    LOG("%010u >%s", DWT->CYCCNT, __func__);
+}
+
+// Close an endpoint. his function is used for implementing alternate settings.
+// After calling this, the device should not respond to any packets directed
+// towards this endpoint. When called, this function must abort any transfers in
+// progress through this endpoint, before returning.
+// Implementation is optional. Must be called from the USB task.
+// Interrupts could be disabled or enabled during the call.
+void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr) TU_ATTR_WEAK;
+
+// Submit a transfer, When complete dcd_event_xfer_complete() is invoked to
+// notify the stack
+bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes)
+{
+    // DEPSTRTXFER command
+    LOG("%010u >%s %u %x %u", DWT->CYCCNT, __func__, ep_addr, (uint32_t) buffer, total_bytes);
+
+    uint8_t ep = (tu_edpt_number(ep_addr) << 1) | tu_edpt_dir(ep_addr);
+
+    switch (ep) {
+        case 0: { // CONTROL OUT
+            if (0 < total_bytes) {
+                // DATA OUT request
+                _xfer_bytes[0] = total_bytes;
+                _dcd_start_xfer(0, buffer, total_bytes, TRBCTL_CTL_STAT3);
+            } else {
+                // TinyUSB explicitly requests STATUS OUT fetch after DATA IN
+                if (2 == ++_sts_stage) {
+                    _sts_stage = 0;
+                    dcd_event_xfer_complete(TUD_OPT_RHPORT, tu_edpt_addr(0, TUSB_DIR_OUT),
+                                            0, XFER_RESULT_SUCCESS, true);
+                }
+            }
+        } break;
+        case 1: { // CONTROL IN
+            _xfer_bytes[1] = total_bytes;
+
+            if (0 < total_bytes) {
+                RTSS_CleanDCache_by_Addr(buffer, total_bytes);
+                uint8_t type = _ctrl_long_data ? TRBCTL_NORMAL : TRBCTL_CTL_DATA;
+                if (64 == total_bytes) {
+                    _ctrl_long_data = true;
+                }
+                _dcd_start_xfer(1, buffer, total_bytes, type);
+            } else {
+                // status events are handled directly from the ISR when USB
+                // controller triggers XferNotReady event for status stage
+
+                if (2 == ++_sts_stage) {
+                    _sts_stage = 0;
+                    dcd_event_xfer_complete(TUD_OPT_RHPORT, tu_edpt_addr(0, TUSB_DIR_IN),
+                                            0, XFER_RESULT_SUCCESS, true);
+                }
+                // dcd_event_xfer_complete(rhport, tu_edpt_addr(0, TUSB_DIR_IN),
+                //                         0, XFER_RESULT_SUCCESS, false);
+            }
+        } break;
+        default: { // DATA EPs (BULK & INTERRUPT only)
+            _xfer_bytes[ep] = total_bytes;
+            if (TUSB_DIR_IN == tu_edpt_dir(ep_addr)) {
+                RTSS_CleanDCache_by_Addr(buffer, total_bytes);
+            } else {
+                total_bytes = 512; // temporary hack, controller requires max
+                                   // size requests on OUT endpoints [FIXME]
+            }
+            uint8_t ret = _dcd_start_xfer(ep, buffer, total_bytes,
+                            total_bytes ? TRBCTL_NORMAL : TRBCTL_NORMAL_ZLP);
+            LOG("start xfer sts %u", ret);
+        }
+    }
+
+    return true;
+}
+
+// Submit a transfer using fifo, When complete dcd_event_xfer_complete() is invoked to notify the stack
+// This API is optional, may be useful for register-based for transferring data.
+bool dcd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_t total_bytes) TU_ATTR_WEAK;
+
+// Stall endpoint, any queuing transfer should be removed from endpoint
+void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
+{
+    // DEPSSTALL command
+    LOG(">%s", __func__);
+
+    uint8_t ep = (tu_edpt_number(ep_addr) << 1) | tu_edpt_dir(ep_addr);
+
+    _dcd_cmd_wait(ep, CMDTYP_DEPSSTALL, 0);
+
+    if (0 == tu_edpt_number(ep_addr)) {
+        _ctrl_long_data = false;
+        _dcd_start_xfer(TUSB_DIR_OUT, _ctrl_buf, 8, TRBCTL_CTL_SETUP);
+    }
+}
+
+// clear stall, data toggle is also reset to DATA0
+// This API never calls with control endpoints, since it is auto cleared when
+// receiving setup packet
+void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
+{
+    // DEPCSTALL command
+    LOG(">%s", __func__);
+
+    uint8_t ep = (tu_edpt_number(ep_addr) << 1) | tu_edpt_dir(ep_addr);
+
+    _dcd_cmd_wait(ep, CMDTYP_DEPCSTALL, 0);
+}
+
+void dcd_uninit(void)
+{
+    CLKCTL_PER_MST->USB_CTRL2 |= 1 << 8; // set usb phy power-on-reset signal
+    enable_usb_phy_isolation(); // enable usb phy isolation
+    disable_usb_phy_power(); // power down usb phy
+    disable_usb_periph_clk(); // disable usb peripheral clock
+    dcd_int_disable(TUD_OPT_RHPORT);
+    NVIC_ClearPendingIRQ(USB_IRQ_IRQn);
+}
+
+void USB_IRQHandler(void)
+{
+    dcd_int_handler(TUD_OPT_RHPORT);
+}
+
+
+static uint8_t _dcd_cmd_wait(uint8_t ep, uint8_t typ, uint16_t param)
+{
+    // capture phy state and disable lpm and suspend
+    uint32_t phycfg = ugbl->gusb2phycfg0;
+    ugbl->gusb2phycfg0_b.enblslpm = 0;
+    ugbl->gusb2phycfg0_b.suspendusb20 = 0;
+
+    // set up command in depcmd register
+    udev->depcmd[ep].depcmd_b.cmdtyp = typ;
+    udev->depcmd[ep].depcmd_b.cmdioc = 0;
+    udev->depcmd[ep].depcmd_b.commandparam = param;
+
+    // dispatch command and wait for completion
+    udev->depcmd[ep].depcmd_b.cmdact = 1;
+    while(0 != udev->depcmd[ep].depcmd_b.cmdact);
+
+    // restore phy state
+    ugbl->gusb2phycfg0 = phycfg;
+
+    return udev->depcmd[ep].depcmd_b.cmdstatus;
+}
+
+
+static void _dcd_handle_depevt(uint8_t ep, uint8_t evt, uint8_t sts, uint16_t par)
+{
+    LOG("%010u DEPEVT ep%u evt%u sts%u par%u", DWT->CYCCNT, ep, evt, sts, par);
+
+    switch (evt) {
+        case DEPEVT_XFERCOMPLETE: {
+            LOG("Transfer complete");
+            RTSS_InvalidateDCache_by_Addr(_xfer_trb[ep], sizeof(_xfer_trb[0]));
+            if (0 == ep) {
+                uint8_t trbctl = (_xfer_trb[0][3] >> 4) & 0x3F;
+                LOG("ep0 xfer trb3 = %08x", _xfer_trb[0][3]);
+                if (TRBCTL_CTL_SETUP == trbctl) {
+                    RTSS_InvalidateDCache_by_Addr(_ctrl_buf, sizeof(_ctrl_buf));
+                    LOG("%02x %02x %02x %02x %02x %02x %02x %02x",
+                        _ctrl_buf[0], _ctrl_buf[1], _ctrl_buf[2], _ctrl_buf[3],
+                        _ctrl_buf[4], _ctrl_buf[5], _ctrl_buf[6], _ctrl_buf[7]);
+                    dcd_event_setup_received(TUD_OPT_RHPORT, _ctrl_buf, true);
+                } else if (TRBCTL_CTL_STAT3 == trbctl) {
+                    if (0 < _xfer_bytes[0]) {
+                        RTSS_InvalidateDCache_by_Addr((void*) _xfer_trb[0][0], _xfer_bytes[0]);
+                        dcd_event_xfer_complete(TUD_OPT_RHPORT, tu_edpt_addr(0, TUSB_DIR_OUT),
+                                                _xfer_bytes[0] - (_xfer_trb[0][2] & 0xFFFFFF),
+                                                XFER_RESULT_SUCCESS, true);
+                    } else {
+                        if (2 == ++_sts_stage) {
+                            _sts_stage = 0;
+                            dcd_event_xfer_complete(TUD_OPT_RHPORT, tu_edpt_addr(0, TUSB_DIR_OUT),
+                                                    0, XFER_RESULT_SUCCESS, true);
+
+                            // *(volatile uint32_t*) 0x4900C000 ^= 8; // [TEMP]
+                        }
+                    }
+                } else {
+                    // invalid TRBCTL value
+                    __BKPT(0);
+                }
+            } else if (1 == ep) {
+                uint8_t trbctl = (_xfer_trb[1][3] >> 4) & 0x3F;
+                LOG("ep1 xfer trb3 = %08x trb2 = %08x", _xfer_trb[1][3], _xfer_trb[1][2]);
+                if (TRBCTL_CTL_STAT2 != trbctl) { // STATUS IN notification is done at xfer request
+                    dcd_event_xfer_complete(TUD_OPT_RHPORT, tu_edpt_addr(0, TUSB_DIR_IN),
+                                            _xfer_bytes[1] - (_xfer_trb[1][2] & 0xFFFFFF),
+                                            XFER_RESULT_SUCCESS, true);
+                } else {
+                    if (2 == ++_sts_stage) {
+                        _sts_stage = 0;
+                        dcd_event_xfer_complete(TUD_OPT_RHPORT, tu_edpt_addr(0, TUSB_DIR_IN),
+                                                0, XFER_RESULT_SUCCESS, true);
+
+                        // *(volatile uint32_t*) 0x4900C000 ^= 8; // [TEMP]
+                    }
+                }
+            } else {
+                // [TODO] check if ep is open
+                LOG("ep%u xfer trb3 = %08x trb2 = %08x", ep, _xfer_trb[ep][3], _xfer_trb[ep][2]);
+                if (TUSB_DIR_OUT == tu_edpt_dir(tu_edpt_addr(ep >> 1, ep & 1))) {
+                    RTSS_InvalidateDCache_by_Addr((void*) _xfer_trb[ep][0],
+                                                  512 - _xfer_trb[ep][2]);
+                                                //   _xfer_bytes[ep] - _xfer_trb[ep][2]);
+                dcd_event_xfer_complete(TUD_OPT_RHPORT, tu_edpt_addr(ep >> 1, ep & 1),
+                                        512 - _xfer_trb[ep][2],
+                                        XFER_RESULT_SUCCESS, true);
+                } else
+                dcd_event_xfer_complete(TUD_OPT_RHPORT, tu_edpt_addr(ep >> 1, ep & 1),
+                                        _xfer_bytes[ep] - _xfer_trb[ep][2],
+                                        XFER_RESULT_SUCCESS, true);
+            }
+        } break;
+        case DEPEVT_XFERINPROGRESS: {
+            LOG("Transfer in progress");
+        } break;
+        case DEPEVT_XFERNOTREADY: {
+            LOG("Transfer not ready: %s", sts & 8 ? "no TRB" : "no XFER");
+
+            // XferNotReady NotActive for status stage
+            if ((1 == ep) && (0b0010 == (sts & 0b1011))) {
+                _dcd_start_xfer(1, NULL, 0, TRBCTL_CTL_STAT2);
+                break;
+            }
+
+            if ((0 == ep) && (0b0010 == (sts & 0b1011))) {
+                _xfer_bytes[0] = 0;
+                _dcd_start_xfer(0, _ctrl_buf, 64, TRBCTL_CTL_STAT3);
+                break;
+            }
+
+            if ((1 > ep) && (sts & (1 << 3))) {
+                if (_xfer_trb[ep][3] & (1 << 0)) { // transfer was configured
+                    // dependxfer can only block when actbitlater is set
+                    ugbl->guctl2_b.rst_actbitlater = 1;
+                    _dcd_cmd_wait(ep, CMDTYP_DEPENDXFER, 0);
+                    ugbl->guctl2_b.rst_actbitlater = 0;
+
+                    // reset the trb byte count and clean the cache
+                    RTSS_InvalidateDCache_by_Addr(_xfer_trb[ep], sizeof(_xfer_trb[0]));
+                    _xfer_trb[ep][2] = _xfer_bytes[ep];
+                    RTSS_CleanDCache_by_Addr(_xfer_trb[ep], sizeof(_xfer_trb[ep]));
+
+                    // prepare ep command
+                    udev->depcmd[ep].par1 = (uint32_t) LocalToGlobal(_xfer_trb[ep]);
+                    udev->depcmd[ep].par0 = 0;
+
+                    // issue the block command and pass the status
+                    _dcd_cmd_wait(ep, CMDTYP_DEPSTRTXFER, 0);
+
+                    *(volatile uint32_t*) 0x49007000 ^= 16; // [TEMP]
+                }
+            }
+        } break;
+        case DEPEVT_EPCMDCMPLT: {
+            // redundant, currently no commands are issued with IOC bit set
+        } break;
+    }
+}
+
+
+static void _dcd_handle_devt(uint8_t evt, uint16_t info)
+{
+    LOG("%010u DEVT evt%u info%u", DWT->CYCCNT, evt, info);
+    switch (evt) {
+        case DEVT_USBRST: {
+            _xfer_cfgd = false;
+
+            // [TODO] issue depcstall for any ep in stall mode
+            udev->dcfg_b.devaddr = 0;
+            LOG("USB reset");
+            dcd_event_bus_reset(TUD_OPT_RHPORT, TUSB_SPEED_HIGH, true); // [TODO] actual speed
+        } break;
+        case DEVT_CONNECTDONE: {
+            // read conn speed from dsts
+            // program ramclksel in gctl if needed
+            LOG("Connect done");
+
+            udev->depcmd[0].par1 = (0 << 25) | (1 << 10) | (1 << 8);
+            udev->depcmd[0].par0 = (2 << 30) | (0 << 22) | (0 << 17) | (64 << 3) | (0 << 1);
+            _dcd_cmd_wait(0, CMDTYP_DEPCFG, 0);
+
+            udev->depcmd[1].par1 = (1 << 25) | (1 << 10) | (1 << 8);
+            udev->depcmd[1].par0 = (2 << 30) | (0 << 22) | (0 << 17) | (64 << 3) | (0 << 1);
+            _dcd_cmd_wait(1, CMDTYP_DEPCFG, 0);
+        } break;
+        case DEVT_ULSTCHNG: {
+            LOG("Link status change");
+            switch (info) {
+                case 0x3: { // suspend (L2)
+                    dcd_event_bus_signal(TUD_OPT_RHPORT, DCD_EVENT_SUSPEND, true);
+                } break;
+                case 0x4: { // disconnected
+                    dcd_event_bus_signal(TUD_OPT_RHPORT, DCD_EVENT_UNPLUGGED, true);
+                } break;
+                case 0xF: { // resume
+                    dcd_event_bus_signal(TUD_OPT_RHPORT, DCD_EVENT_RESUME, true);
+                } break;
+                default: {}
+            }
+            // 0x0: ON state
+            // 0x2: L1 state (sleep)
+            // 0x3: L2 state (suspend)
+            // 0x4: disconnected state
+            // 0x5: early suspend
+            // 0xE: reset
+            // 0xF: resume
+        } break;
+        case DEVT_SOF: {
+            dcd_event_bus_signal(TUD_OPT_RHPORT, DCD_EVENT_SOF, true);
+        } break;
+        case DEVT_ERRTICERR: {
+            __BKPT(0);
+        } break;
+        default: {
+            LOG("Unknown DEVT event");
+        }
+    }
+}
+
+
+static uint8_t _dcd_start_xfer(uint8_t ep, void* buf, uint32_t size, uint8_t type)
+{
+    dcd_int_disable(TUD_OPT_RHPORT); // prevent race conditions
+
+    // program the trb and clean the cache
+    _xfer_trb[ep][0] = buf ? (uint32_t) LocalToGlobal(buf) : 0;
+    _xfer_trb[ep][1] = 0;
+    _xfer_trb[ep][2] = size;
+    _xfer_trb[ep][3] = (1 << 11) | (1 << 10) | (type << 4) | (1 << 1) | (1 << 0);
+    RTSS_CleanDCache_by_Addr(_xfer_trb[ep], sizeof(_xfer_trb[ep]));
+
+    // prepare ep command
+    udev->depcmd[ep].par1 = (uint32_t) LocalToGlobal(_xfer_trb[ep]);
+    udev->depcmd[ep].par0 = 0;
+
+    dcd_int_enable(TUD_OPT_RHPORT);
+
+    // issue the block command and pass the status
+    return _dcd_cmd_wait(ep, CMDTYP_DEPSTRTXFER, 0);
+}
+
+#endif // CFG_TUD_ENABLED
diff --git a/ports/alif/tinyusb_port/tusb_config.h b/ports/alif/tinyusb_port/tusb_config.h
new file mode 100644
index 0000000000000..6c4ead1128846
--- /dev/null
+++ b/ports/alif/tinyusb_port/tusb_config.h
@@ -0,0 +1,73 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ */
+
+#ifndef _ALIF_TUSB_CONFIG_H_
+#define _ALIF_TUSB_CONFIG_H_
+
+// --------------------------------------------------------------------+
+// Board Specific Configuration
+// --------------------------------------------------------------------+
+
+#define CFG_TUSB_MCU OPT_MCU_NONE
+// #define CFG_TUSB_RHPORT0_MODE OPT_MODE_DEVICE
+#define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | OPT_MODE_HIGH_SPEED)
+#define TUP_DCD_ENDPOINT_MAX 8
+#define TUD_OPT_RHPORT 0
+
+// --------------------------------------------------------------------
+// COMMON CONFIGURATION
+// --------------------------------------------------------------------
+
+#define CFG_TUSB_OS           OPT_OS_NONE
+#define CFG_TUSB_DEBUG        0
+
+// Enable Device stack
+#define CFG_TUD_ENABLED       (CORE_M55_HP)
+
+// Default is max speed that hardware controller could support with on-chip PHY
+#define CFG_TUD_MAX_SPEED OPT_MODE_HIGH_SPEED
+
+/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment.
+ * Tinyusb use follows macros to declare transferring memory so that they can be put
+ * into those specific section.
+ */
+#define CFG_TUSB_MEM_SECTION        __attribute__((section(".bss.sram0")))
+
+#define CFG_TUSB_MEM_ALIGN          __attribute__ ((aligned(32)))
+
+// --------------------------------------------------------------------
+// DEVICE CONFIGURATION
+// --------------------------------------------------------------------
+
+#define CFG_TUD_ENDPOINT0_SIZE    64
+
+// CDC Endpoint transfer buffer size, more is faster
+#define CFG_TUD_CDC_EP_BUFSIZE  (4096)
+#define CFG_TUD_CDC_RX_BUFSIZE  (4096)
+#define CFG_TUD_CDC_TX_BUFSIZE  (4096)
+
+#include "shared/tinyusb/tusb_config.h"
+
+#endif /* _ALIF_TUSB_CONFIG_H_ */
diff --git a/ports/alif/usbd.c b/ports/alif/usbd.c
new file mode 100644
index 0000000000000..8d841d188c333
--- /dev/null
+++ b/ports/alif/usbd.c
@@ -0,0 +1,42 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "py/mpconfig.h"
+
+#if MICROPY_HW_ENABLE_USBDEV
+
+#include "shared/tinyusb/mp_usbd.h"
+#include "tusb.h"
+#include "se_services.h"
+
+void mp_usbd_port_get_serial_number(char *serial_buf) {
+    uint8_t id[8] = {0};
+    se_services_get_unique_id(id);
+    MP_STATIC_ASSERT(sizeof(id) * 2 <= MICROPY_HW_USB_DESC_STR_MAX);
+    mp_usbd_hex_str(serial_buf, id, sizeof(id));
+}
+
+#endif
diff --git a/ports/alif/vfs_rom_ioctl.c b/ports/alif/vfs_rom_ioctl.c
new file mode 100644
index 0000000000000..d82ac6f8417e2
--- /dev/null
+++ b/ports/alif/vfs_rom_ioctl.c
@@ -0,0 +1,175 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2025 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "py/mperrno.h"
+#include "py/objarray.h"
+#include "py/runtime.h"
+#include "extmod/vfs.h"
+#include "modalif.h"
+#include "mpu.h"
+#include "mram.h"
+#include "ospi_flash.h"
+
+#if MICROPY_VFS_ROM_IOCTL
+
+#if MICROPY_HW_ROMFS_ENABLE_PART0 && !defined(MICROPY_HW_ROMFS_PART0_START)
+#define MICROPY_HW_ROMFS_PART0_START (uintptr_t)(&_micropy_hw_romfs_part0_start)
+#define MICROPY_HW_ROMFS_PART0_SIZE (uintptr_t)(&_micropy_hw_romfs_part0_size)
+extern uint8_t _micropy_hw_romfs_part0_start;
+extern uint8_t _micropy_hw_romfs_part0_size;
+#endif
+
+#if MICROPY_HW_ROMFS_ENABLE_PART1 && !defined(MICROPY_HW_ROMFS_PART1_START)
+#define MICROPY_HW_ROMFS_PART1_START (uintptr_t)(&_micropy_hw_romfs_part1_start)
+#define MICROPY_HW_ROMFS_PART1_SIZE (uintptr_t)(&_micropy_hw_romfs_part1_size)
+extern uint8_t _micropy_hw_romfs_part1_start;
+extern uint8_t _micropy_hw_romfs_part1_size;
+#endif
+
+#define ROMFS_MEMORYVIEW(base, size) {{&mp_type_memoryview}, 'B', 0, (size), (void *)(base)}
+
+static const mp_obj_array_t romfs_obj_table[] = {
+    #if MICROPY_HW_ROMFS_ENABLE_PART0
+    ROMFS_MEMORYVIEW(MICROPY_HW_ROMFS_PART0_START, MICROPY_HW_ROMFS_PART0_SIZE),
+    #endif
+    #if MICROPY_HW_ROMFS_ENABLE_PART1
+    ROMFS_MEMORYVIEW(MICROPY_HW_ROMFS_PART1_START, MICROPY_HW_ROMFS_PART1_SIZE),
+    #endif
+};
+
+static inline bool mram_is_valid_addr(uintptr_t addr) {
+    return MRAM_BASE <= addr && addr < MRAM_BASE + MRAM_SIZE;
+}
+
+static inline bool ospi_is_valid_addr(uintptr_t xip_base, uintptr_t addr) {
+    MP_STATIC_ASSERT(OSPI0_XIP_SIZE == OSPI1_XIP_SIZE);
+    return xip_base <= addr && addr < xip_base + OSPI0_XIP_SIZE;
+}
+
+mp_obj_t mp_vfs_rom_ioctl(size_t n_args, const mp_obj_t *args) {
+    mp_int_t cmd = mp_obj_get_int(args[0]);
+    if (cmd == MP_VFS_ROM_IOCTL_GET_NUMBER_OF_SEGMENTS) {
+        return MP_OBJ_NEW_SMALL_INT(MP_ARRAY_SIZE(romfs_obj_table));
+    }
+
+    if (n_args < 2) {
+        return MP_OBJ_NEW_SMALL_INT(-MP_EINVAL);
+    }
+
+    mp_int_t romfs_id = mp_obj_get_int(args[1]);
+    if (!(0 <= romfs_id && romfs_id < MP_ARRAY_SIZE(romfs_obj_table))) {
+        return MP_OBJ_NEW_SMALL_INT(-MP_EINVAL);
+    }
+
+    const mp_obj_array_t *romfs_obj = &romfs_obj_table[romfs_id];
+
+    if (cmd == MP_VFS_ROM_IOCTL_GET_SEGMENT) {
+        // Return the ROMFS memoryview object.
+        return MP_OBJ_FROM_PTR(romfs_obj);
+    }
+
+    uintptr_t romfs_base = (uintptr_t)romfs_obj->items;
+    uintptr_t romfs_len = romfs_obj->len;
+
+    #if MICROPY_HW_ENABLE_OSPI
+    const uintptr_t ospi_base = ospi_flash_get_xip_base();
+    #endif
+
+    if (cmd == MP_VFS_ROM_IOCTL_WRITE_PREPARE) {
+        if (n_args < 3) {
+            return MP_OBJ_NEW_SMALL_INT(-MP_EINVAL);
+        }
+        uint32_t dest = romfs_base;
+        uint32_t dest_max = dest + mp_obj_get_int(args[2]);
+        if (dest_max > romfs_base + romfs_len) {
+            return MP_OBJ_NEW_SMALL_INT(-MP_EINVAL);
+        }
+
+        if (mram_is_valid_addr(dest)) {
+            // No preparation needed for MRAM.
+            // Return the minimum write size.
+            return MP_OBJ_NEW_SMALL_INT(MRAM_SECTOR_SIZE);
+        }
+
+        #if MICROPY_HW_ENABLE_OSPI
+        if (ospi_is_valid_addr(ospi_base, dest)) {
+            // Erase OSPI flash.
+            dest -= ospi_base;
+            dest_max -= ospi_base;
+            while (dest < dest_max) {
+                int ret = ospi_flash_erase_sector(dest);
+                mp_event_handle_nowait();
+                if (ret < 0) {
+                    return MP_OBJ_NEW_SMALL_INT(ret);
+                }
+                dest += MICROPY_HW_FLASH_BLOCK_SIZE_BYTES;
+            }
+            // Return the minimum write size.
+            return MP_OBJ_NEW_SMALL_INT(4);
+        }
+        #endif
+    }
+
+    if (cmd == MP_VFS_ROM_IOCTL_WRITE) {
+        if (n_args < 4) {
+            return MP_OBJ_NEW_SMALL_INT(-MP_EINVAL);
+        }
+        uint32_t dest = romfs_base + mp_obj_get_int(args[2]);
+        mp_buffer_info_t bufinfo;
+        mp_get_buffer_raise(args[3], &bufinfo, MP_BUFFER_READ);
+        if (dest + bufinfo.len > romfs_base + romfs_len) {
+            return MP_OBJ_NEW_SMALL_INT(-MP_EINVAL);
+        }
+
+        if (mram_is_valid_addr(dest)) {
+            // Write data to MRAM.
+            mpu_config_mram(false);
+            const uint8_t *src = bufinfo.buf;
+            const uint8_t *max = src + bufinfo.len;
+            while (src < max) {
+                mram_write_128bit((uint8_t *)dest, src);
+                dest += MRAM_SECTOR_SIZE;
+                src += MRAM_SECTOR_SIZE;
+            }
+            mpu_config_mram(true);
+            return MP_OBJ_NEW_SMALL_INT(0); // success
+        }
+
+        #if MICROPY_HW_ENABLE_OSPI
+        if (ospi_is_valid_addr(ospi_base, dest)) {
+            // Write data to OSPI flash.
+            dest -= ospi_base;
+            int ret = ospi_flash_write(dest, bufinfo.len, bufinfo.buf);
+            mp_event_handle_nowait();
+            return MP_OBJ_NEW_SMALL_INT(ret);
+        }
+        #endif
+    }
+
+    return MP_OBJ_NEW_SMALL_INT(-MP_EINVAL);
+}
+
+#endif // MICROPY_VFS_ROM_IOCTL
diff --git a/ports/cc3200/misc/mperror.c b/ports/cc3200/misc/mperror.c
index 6d6c0ff0bae8a..69f0a25371c13 100644
--- a/ports/cc3200/misc/mperror.c
+++ b/ports/cc3200/misc/mperror.c
@@ -159,7 +159,7 @@ void mperror_heartbeat_signal (void) {
     }
 }
 
-void NORETURN __fatal_error(const char *msg) {
+void MP_NORETURN __fatal_error(const char *msg) {
 #ifdef DEBUG
     if (msg != NULL) {
         // wait for 20ms
diff --git a/ports/cc3200/misc/mperror.h b/ports/cc3200/misc/mperror.h
index 1c3eb62697009..30effbbf91162 100644
--- a/ports/cc3200/misc/mperror.h
+++ b/ports/cc3200/misc/mperror.h
@@ -27,7 +27,7 @@
 #ifndef MICROPY_INCLUDED_CC3200_MISC_MPERROR_H
 #define MICROPY_INCLUDED_CC3200_MISC_MPERROR_H
 
-extern void NORETURN __fatal_error(const char *msg);
+extern void MP_NORETURN __fatal_error(const char *msg);
 
 void mperror_init0 (void);
 void mperror_bootloader_check_reset_cause (void);
diff --git a/ports/cc3200/mods/modmachine.c b/ports/cc3200/mods/modmachine.c
index f7184df442736..8986635ac6577 100644
--- a/ports/cc3200/mods/modmachine.c
+++ b/ports/cc3200/mods/modmachine.c
@@ -93,7 +93,7 @@ extern OsiTaskHandle    xSimpleLinkSpawnTaskHndl;
 /******************************************************************************/
 // MicroPython bindings;
 
-NORETURN static void mp_machine_reset(void) {
+MP_NORETURN static void mp_machine_reset(void) {
     // disable wlan
     wlan_stop(SL_STOP_TIMEOUT_LONG);
     // reset the cpu and it's peripherals
@@ -161,7 +161,7 @@ static void mp_machine_lightsleep(size_t n_args, const mp_obj_t *args) {
     pyb_sleep_sleep();
 }
 
-NORETURN static void mp_machine_deepsleep(size_t n_args, const mp_obj_t *args) {
+MP_NORETURN static void mp_machine_deepsleep(size_t n_args, const mp_obj_t *args) {
     pyb_sleep_deepsleep();
     for (;;) {
     }
diff --git a/ports/cc3200/mods/pybpin.c b/ports/cc3200/mods/pybpin.c
index 037c78a32cbf2..ea40aa9df8d20 100644
--- a/ports/cc3200/mods/pybpin.c
+++ b/ports/cc3200/mods/pybpin.c
@@ -680,6 +680,20 @@ static mp_obj_t pin_value(size_t n_args, const mp_obj_t *args) {
 }
 static MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pin_value_obj, 1, 2, pin_value);
 
+// pin.toggle()
+static mp_obj_t pin_toggle(mp_obj_t self_in) {
+    pin_obj_t *self = self_in;
+    if (self->value) {
+        self->value = 0;
+        MAP_GPIOPinWrite(self->port, self->bit, 0);
+    } else {
+        self->value = 1;
+        MAP_GPIOPinWrite(self->port, self->bit, self->bit);
+    }
+    return mp_const_none;
+}
+static MP_DEFINE_CONST_FUN_OBJ_1(pin_toggle_obj, pin_toggle);
+
 static mp_obj_t pin_id(mp_obj_t self_in) {
     pin_obj_t *self = self_in;
     return MP_OBJ_NEW_QSTR(self->name);
@@ -902,6 +916,7 @@ static const mp_rom_map_elem_t pin_locals_dict_table[] = {
     // instance methods
     { MP_ROM_QSTR(MP_QSTR_init),                    MP_ROM_PTR(&pin_init_obj) },
     { MP_ROM_QSTR(MP_QSTR_value),                   MP_ROM_PTR(&pin_value_obj) },
+    { MP_ROM_QSTR(MP_QSTR_toggle),                  MP_ROM_PTR(&pin_toggle_obj) },
     { MP_ROM_QSTR(MP_QSTR_id),                      MP_ROM_PTR(&pin_id_obj) },
     { MP_ROM_QSTR(MP_QSTR_mode),                    MP_ROM_PTR(&pin_mode_obj) },
     { MP_ROM_QSTR(MP_QSTR_pull),                    MP_ROM_PTR(&pin_pull_obj) },
diff --git a/ports/cc3200/mods/pybsleep.c b/ports/cc3200/mods/pybsleep.c
index 9d04dd411ddcd..291860de8d676 100644
--- a/ports/cc3200/mods/pybsleep.c
+++ b/ports/cc3200/mods/pybsleep.c
@@ -136,7 +136,7 @@ static MP_DEFINE_CONST_OBJ_TYPE(
  ******************************************************************************/
 static pyb_sleep_obj_t *pyb_sleep_find (mp_obj_t obj);
 static void pyb_sleep_flash_powerdown (void);
-static NORETURN void pyb_sleep_suspend_enter (void);
+static MP_NORETURN void pyb_sleep_suspend_enter (void);
 void pyb_sleep_suspend_exit (void);
 static void pyb_sleep_obj_wakeup (void);
 static void PRCMInterruptHandler (void);
@@ -360,7 +360,7 @@ static void pyb_sleep_flash_powerdown (void) {
     MAP_SPICSDisable(SSPI_BASE);
 }
 
-static NORETURN void pyb_sleep_suspend_enter (void) {
+static MP_NORETURN void pyb_sleep_suspend_enter (void) {
     // enable full RAM retention
     MAP_PRCMSRAMRetentionEnable(PRCM_SRAM_COL_1 | PRCM_SRAM_COL_2 | PRCM_SRAM_COL_3 | PRCM_SRAM_COL_4, PRCM_SRAM_LPDS_RET);
 
diff --git a/ports/esp32/CMakeLists.txt b/ports/esp32/CMakeLists.txt
index c3a675eb2b78f..1db374b40a431 100644
--- a/ports/esp32/CMakeLists.txt
+++ b/ports/esp32/CMakeLists.txt
@@ -61,8 +61,5 @@ set(SDKCONFIG_DEFAULTS ${CMAKE_BINARY_DIR}/sdkconfig.combined)
 # Include main IDF cmake file.
 include($ENV{IDF_PATH}/tools/cmake/project.cmake)
 
-# Set the location of the main component for the project (one per target).
-list(APPEND EXTRA_COMPONENT_DIRS main_${IDF_TARGET})
-
 # Define the project.
 project(micropython)
diff --git a/ports/esp32/Makefile b/ports/esp32/Makefile
index 1ce4d97208da7..7f31ea69192ab 100644
--- a/ports/esp32/Makefile
+++ b/ports/esp32/Makefile
@@ -70,12 +70,12 @@ endif
 HELP_BUILD_ERROR ?= "See \033[1;31mhttps://github.com/micropython/micropython/wiki/Build-Troubleshooting\033[0m"
 
 define RUN_IDF_PY
-	idf.py $(IDFPY_FLAGS) -B $(BUILD) $(1)
+	$(Q)idf.py $(IDFPY_FLAGS) -B $(BUILD) $(1)
 endef
 
 all:
-	idf.py $(IDFPY_FLAGS) -B $(BUILD) build || (echo -e $(HELP_BUILD_ERROR); false)
-	@$(PYTHON) makeimg.py \
+	$(Q)idf.py $(IDFPY_FLAGS) -B $(BUILD) build || (echo -e $(HELP_BUILD_ERROR); false)
+	$(Q)$(PYTHON) makeimg.py \
 		$(BUILD)/sdkconfig \
 		$(BUILD)/bootloader/bootloader.bin \
 		$(BUILD)/partition_table/partition-table.bin \
@@ -106,12 +106,10 @@ size-components:
 size-files:
 	$(call RUN_IDF_PY,size-files)
 
-# Running the build with ECHO_SUBMODULES set will trigger py/mkrules.cmake to
-# print out the value of the GIT_SUBMODULES variable, prefixed with
-# "GIT_SUBMODULES", and then abort. This extracts out that line from the idf.py
-# output and passes the list of submodules to py/mkrules.mk which does the
-# `git submodule init` on each.
+# Run idf.py with the UPDATE_SUBMODULES flag to update
+# necessary submodules for this board.
+#
+# This is done in a dedicated build directory as some CMake cache values are not
+# set correctly if not all submodules are loaded yet.
 submodules:
-	@GIT_SUBMODULES=$$(IDF_COMPONENT_MANAGER=0 idf.py $(IDFPY_FLAGS) -B $(BUILD)/submodules -D ECHO_SUBMODULES=1 build 2>&1 | \
-	                  grep '^GIT_SUBMODULES=' | cut -d= -f2); \
-	$(MAKE) -f ../../py/mkrules.mk GIT_SUBMODULES="$${GIT_SUBMODULES}" GIT_SUBMODULES_FAIL_IF_EMPTY=1 submodules
+	$(Q)IDF_COMPONENT_MANAGER=0 idf.py $(IDFPY_FLAGS) -B $(BUILD)/submodules -D UPDATE_SUBMODULES=1 reconfigure
diff --git a/ports/esp32/README.md b/ports/esp32/README.md
index 6ed7eddb8b80f..e11c64ad70797 100644
--- a/ports/esp32/README.md
+++ b/ports/esp32/README.md
@@ -5,6 +5,9 @@ This is a port of MicroPython to the Espressif ESP32 series of
 microcontrollers.  It uses the ESP-IDF framework and MicroPython runs as
 a task under FreeRTOS.
 
+Currently supports ESP32, ESP32-C3, ESP32-C6, ESP32-S2 and ESP32-S3
+(ESP8266 is supported by a separate MicroPython port).
+
 Supported features include:
 - REPL (Python prompt) over UART0.
 - 16k stack for the MicroPython task and approximately 100k Python heap.
@@ -28,7 +31,7 @@ manage the ESP32 microcontroller, as well as a way to manage the required
 build environment and toolchains needed to build the firmware.
 
 The ESP-IDF changes quickly and MicroPython only supports certain versions.
-Currently MicroPython supports v5.2, v5.2.2, v5.3 and v5.4.
+Currently MicroPython supports v5.2, v5.2.2, v5.3, v5.4 and v5.4.1.
 
 To install the ESP-IDF the full instructions can be found at the
 [Espressif Getting Started guide](https://docs.espressif.com/projects/esp-idf/en/latest/esp32/get-started/index.html#installation-step-by-step).
@@ -46,10 +49,10 @@ The steps to take are summarised below.
 To check out a copy of the IDF use git clone:
 
 ```bash
-$ git clone -b v5.2.2 --recursive https://github.com/espressif/esp-idf.git
+$ git clone -b v5.4.1 --recursive https://github.com/espressif/esp-idf.git
 ```
 
-You can replace `v5.2.2` with any other supported version.
+You can replace `v5.4.1` with any other supported version.
 (You don't need a full recursive clone; see the `ci_esp32_setup` function in
 `tools/ci.sh` in this repository for more detailed set-up commands.)
 
@@ -58,7 +61,7 @@ MicroPython and update the submodules using:
 
 ```bash
 $ cd esp-idf
-$ git checkout v5.2.2
+$ git checkout v5.4.1
 $ git submodule update --init --recursive
 ```
 
@@ -67,12 +70,16 @@ After you've cloned and checked out the IDF to the correct version, run the
 
 ```bash
 $ cd esp-idf
-$ ./install.sh       # (or install.bat on Windows)
+$ ./install.sh esp32 # (or install.bat on Windows)
 $ source export.sh   # (or export.bat on Windows)
 ```
 
-The `install.sh` step only needs to be done once. You will need to source
-`export.sh` for every new session.
+The `install.sh` step only needs to be done once. Change `esp32` if you are
+targeting other chip. Use comma-separated list like `esp32,esp32s2` to
+install for multiple chips. Or omit the chip to install for all Espressif
+chips (which is slower).
+
+You will need to source `export.sh` for every new session.
 
 Building the firmware
 ---------------------
@@ -85,7 +92,7 @@ this repository):
 $ make -C mpy-cross
 ```
 
-Then to build MicroPython for the ESP32 run:
+Then to build MicroPython for ESP32 run:
 
 ```bash
 $ cd ports/esp32
@@ -106,7 +113,7 @@ rebooting or logging out and in again. (Note: on some distributions this may
 be the `uucp` group, run `ls -la /dev/ttyUSB0` to check.)
 
 ```bash
-$ sudo adduser <username> dialout
+$ sudo usermod -aG dialout <username>
 ```
 
 If you are installing MicroPython to your module for the first time, or
@@ -141,7 +148,7 @@ $ idf.py -D MICROPY_BOARD=ESP32_GENERIC build
 $ idf.py flash
 ```
 
-Some boards also support "variants", which are allow for small variations of
+Some boards also support "variants", which allow for small variations of
 an otherwise similar board. For example different flash sizes or features. For
 example to build the `OTA` variant of `ESP32_GENERIC`.
 
@@ -173,7 +180,7 @@ or
 $ miniterm.py /dev/ttyUSB0 115200
 ```
 
-You can also use `idf.py monitor`.
+You can also use `idf.py monitor` or `mpremote`.
 
 Configuring the WiFi and using the board
 ----------------------------------------
diff --git a/ports/esp32/adc.c b/ports/esp32/adc.c
index 83af6dce0b2a5..d0e5e81330d7e 100644
--- a/ports/esp32/adc.c
+++ b/ports/esp32/adc.c
@@ -26,83 +26,73 @@
  */
 
 #include "py/mphal.h"
+#include "py/mperrno.h"
 #include "adc.h"
-#include "driver/adc.h"
+#include "esp_adc/adc_oneshot.h"
 #include "esp_adc/adc_cali_scheme.h"
 
-#define DEFAULT_VREF 1100
+static esp_err_t ensure_adc_calibration(machine_adc_block_obj_t *self, adc_atten_t atten);
 
-void madcblock_bits_helper(machine_adc_block_obj_t *self, mp_int_t bits) {
-    if (bits < SOC_ADC_RTC_MIN_BITWIDTH && bits > SOC_ADC_RTC_MAX_BITWIDTH) {
-        // Invalid value for the current chip, raise exception in the switch below.
-        bits = -1;
+void adc_is_init_guard(machine_adc_block_obj_t *self) {
+    if (!self->handle) {
+        mp_raise_OSError(MP_EPERM);
     }
-    switch (bits) {
-        case 9:
-            self->width = ADC_BITWIDTH_9;
-            break;
-        case 10:
-            self->width = ADC_BITWIDTH_10;
-            break;
-        case 11:
-            self->width = ADC_BITWIDTH_11;
-            break;
-        case 12:
-            self->width = ADC_BITWIDTH_12;
-            break;
-        case 13:
-            self->width = ADC_BITWIDTH_13;
-            break;
-        default:
-            mp_raise_ValueError(MP_ERROR_TEXT("invalid bits"));
-    }
-    self->bits = bits;
+}
 
-    if (self->unit_id == ADC_UNIT_1) {
-        adc1_config_width(self->width);
-    }
+esp_err_t apply_self_adc_channel_atten(const machine_adc_obj_t *self, uint8_t atten) {
+    adc_is_init_guard(self->block);
+
+    adc_oneshot_chan_cfg_t config = {
+        .atten = atten,
+        .bitwidth = self->block->bitwidth,
+    };
+    esp_err_t ret = adc_oneshot_config_channel(self->block->handle, self->channel_id, &config);
+    return ret;
 }
 
 mp_int_t madcblock_read_helper(machine_adc_block_obj_t *self, adc_channel_t channel_id) {
-    int raw = 0;
-    if (self->unit_id == ADC_UNIT_1) {
-        raw = adc1_get_raw(channel_id);
-    } else {
-        #if (SOC_ADC_PERIPH_NUM >= 2)
-        check_esp_err(adc2_get_raw(channel_id, self->width, &raw));
-        #endif
-    }
-    return raw;
+    adc_is_init_guard(self);
+
+    int reading = 0;
+    adc_oneshot_read(self->handle, channel_id, &reading);
+    return reading;
+}
+
+/*
+During testing, it turned out that the function `adc_cali_raw_to_voltage` does not account for the lower resolution,
+instead it expects the full resolution value as an argument, hence the scaling applied here
+*/
+mp_int_t madcblock_read_uv_helper(machine_adc_block_obj_t *self, adc_channel_t channel_id, adc_atten_t atten) {
+    int raw = madcblock_read_helper(self, channel_id);
+    int uv = 0;
+
+    check_esp_err(ensure_adc_calibration(self, atten));
+    check_esp_err(adc_cali_raw_to_voltage(self->calib[atten], (raw << (ADC_WIDTH_MAX - self->bitwidth)), &uv));
+    return (mp_int_t)uv * 1000;
 }
 
 static esp_err_t ensure_adc_calibration(machine_adc_block_obj_t *self, adc_atten_t atten) {
-    if (self->handle[atten] != NULL) {
+    if (self->calib[atten] != NULL) {
         return ESP_OK;
     }
 
+    esp_err_t ret = ESP_OK;
+
     #if ADC_CALI_SCHEME_CURVE_FITTING_SUPPORTED
     adc_cali_curve_fitting_config_t cali_config = {
         .unit_id = self->unit_id,
         .atten = atten,
-        .bitwidth = self->width,
+        .bitwidth = self->bitwidth,
     };
-    return adc_cali_create_scheme_curve_fitting(&cali_config, &self->handle[atten]);
+    ret = adc_cali_create_scheme_curve_fitting(&cali_config, &self->calib[atten]);
     #else
     adc_cali_line_fitting_config_t cali_config = {
         .unit_id = self->unit_id,
         .atten = atten,
-        .bitwidth = self->width,
+        .bitwidth = self->bitwidth,
     };
-    return adc_cali_create_scheme_line_fitting(&cali_config, &self->handle[atten]);
+    ret = adc_cali_create_scheme_line_fitting(&cali_config, &self->calib[atten]);
     #endif
-}
 
-mp_int_t madcblock_read_uv_helper(machine_adc_block_obj_t *self, adc_channel_t channel_id, adc_atten_t atten) {
-    int raw = madcblock_read_helper(self, channel_id);
-    int uv;
-
-    check_esp_err(ensure_adc_calibration(self, atten));
-    check_esp_err(adc_cali_raw_to_voltage(self->handle[atten], raw, &uv));
-
-    return (mp_int_t)uv * 1000;
+    return ret;
 }
diff --git a/ports/esp32/adc.h b/ports/esp32/adc.h
index 5688e0a29a706..ebf7fcc21aa4f 100644
--- a/ports/esp32/adc.h
+++ b/ports/esp32/adc.h
@@ -29,17 +29,45 @@
 #define MICROPY_INCLUDED_ESP32_ADC_H
 
 #include "py/runtime.h"
-#include "esp_adc_cal.h"
+#include "esp_adc/adc_oneshot.h"
 #include "esp_adc/adc_cali_scheme.h"
 
-#define ADC_ATTEN_MAX SOC_ADC_ATTEN_NUM
+#define ADC_ATTEN_COUNT SOC_ADC_ATTEN_NUM
+#define ADC_ATTEN_MIN ADC_ATTEN_DB_0
+#define ADC_ATTEN_MAX ADC_ATTEN_DB_11
+
+/*
+https://github.com/espressif/esp-idf/issues/13128
+https://github.com/espressif/esp-idf/blob/release/v5.2/components/soc/esp32s3/include/soc/soc_caps.h
+https://docs.espressif.com/projects/esp-chip-errata/en/latest/esp32s2/03-errata-description/index.html
+https://docs.espressif.com/projects/esp-idf/en/v4.2/esp32/api-reference/peripherals/adc.html
+
+Looks like only the original esp32 is capable of bitwidth adjustment, all others are stuck at 12 bits,
+except the S2, which is locked at 13 bits, otherwise attenuation doesn't work.
+*/
+#if CONFIG_IDF_TARGET_ESP32S2
+
+#define ADC_WIDTH_MIN ADC_BITWIDTH_13
+#define ADC_WIDTH_MAX ADC_BITWIDTH_13
+
+#elif CONFIG_IDF_TARGET_ESP32
+
+#define ADC_WIDTH_MIN ADC_BITWIDTH_9
+#define ADC_WIDTH_MAX ADC_BITWIDTH_12
+
+#else
+
+#define ADC_WIDTH_MIN ADC_BITWIDTH_12
+#define ADC_WIDTH_MAX ADC_BITWIDTH_12
+
+#endif
 
 typedef struct _machine_adc_block_obj_t {
     mp_obj_base_t base;
     adc_unit_t unit_id;
-    mp_int_t bits;
-    adc_bits_width_t width;
-    adc_cali_handle_t handle[ADC_ATTEN_MAX];
+    adc_oneshot_unit_handle_t handle;
+    adc_bitwidth_t bitwidth;
+    adc_cali_handle_t calib[ADC_ATTEN_COUNT];
 } machine_adc_block_obj_t;
 
 typedef struct _machine_adc_obj_t {
@@ -51,11 +79,18 @@ typedef struct _machine_adc_obj_t {
 
 extern machine_adc_block_obj_t madcblock_obj[];
 
-void madcblock_bits_helper(machine_adc_block_obj_t *self, mp_int_t bits);
+esp_err_t apply_self_adc_channel_atten(const machine_adc_obj_t *self, uint8_t atten);
+
 mp_int_t madcblock_read_helper(machine_adc_block_obj_t *self, adc_channel_t channel_id);
 mp_int_t madcblock_read_uv_helper(machine_adc_block_obj_t *self, adc_channel_t channel_id, adc_atten_t atten);
 
 const machine_adc_obj_t *madc_search_helper(machine_adc_block_obj_t *block, adc_channel_t channel_id, gpio_num_t gpio_id);
 void madc_init_helper(const machine_adc_obj_t *self, size_t n_pos_args, const mp_obj_t *pos_args, mp_map_t *kw_args);
 
+mp_int_t mp_machine_adc_atten_get_helper(const machine_adc_obj_t *self);
+void mp_machine_adc_atten_set_helper(const machine_adc_obj_t *self, mp_int_t atten);
+
+mp_int_t mp_machine_adc_width_get_helper(const machine_adc_obj_t *self);
+void mp_machine_adc_block_width_set_helper(machine_adc_block_obj_t *self, mp_int_t width);
+
 #endif // MICROPY_INCLUDED_ESP32_ADC_H
diff --git a/ports/esp32/boards/ARDUINO_NANO_ESP32/board.json b/ports/esp32/boards/ARDUINO_NANO_ESP32/board.json
index 9d0016017fc6c..936a498b5e1fe 100644
--- a/ports/esp32/boards/ARDUINO_NANO_ESP32/board.json
+++ b/ports/esp32/boards/ARDUINO_NANO_ESP32/board.json
@@ -17,8 +17,8 @@
         "ABX00092_01.iso_1000x750.jpg"
     ],
     "mcu": "esp32s3",
-    "product": "Arduino Nano ESP32",
+    "product": "Nano ESP32",
     "thumbnail": "",
-    "url": "https://store.arduino.cc/products/arduino-nano-esp32",
+    "url": "https://docs.arduino.cc/hardware/nano-esp32/",
     "vendor": "Arduino"
 }
diff --git a/ports/esp32/boards/ESP32_GENERIC_C3/mpconfigboard.h b/ports/esp32/boards/ESP32_GENERIC_C3/mpconfigboard.h
index a6cebdf6ee64f..988c7db8a144b 100644
--- a/ports/esp32/boards/ESP32_GENERIC_C3/mpconfigboard.h
+++ b/ports/esp32/boards/ESP32_GENERIC_C3/mpconfigboard.h
@@ -3,7 +3,5 @@
 #define MICROPY_HW_BOARD_NAME               "ESP32C3 module"
 #define MICROPY_HW_MCU_NAME                 "ESP32C3"
 
-#define MICROPY_HW_ENABLE_SDCARD            (0)
-
 // Enable UART REPL for modules that have an external USB-UART and don't use native USB.
 #define MICROPY_HW_ENABLE_UART_REPL         (1)
diff --git a/ports/esp32/boards/ESP32_GENERIC_C6/mpconfigboard.h b/ports/esp32/boards/ESP32_GENERIC_C6/mpconfigboard.h
index be530ad3a87ba..d6cc9a6f67855 100644
--- a/ports/esp32/boards/ESP32_GENERIC_C6/mpconfigboard.h
+++ b/ports/esp32/boards/ESP32_GENERIC_C6/mpconfigboard.h
@@ -3,7 +3,6 @@
 #define MICROPY_HW_BOARD_NAME               "ESP32C6 module"
 #define MICROPY_HW_MCU_NAME                 "ESP32C6"
 
-#define MICROPY_HW_ENABLE_SDCARD            (0)
 #define MICROPY_PY_MACHINE_I2S              (0)
 
 // Enable UART REPL for modules that have an external USB-UART and don't use native USB.
diff --git a/ports/esp32/boards/ESP32_GENERIC_S2/mpconfigboard.h b/ports/esp32/boards/ESP32_GENERIC_S2/mpconfigboard.h
index aaea41bcdec2b..9e03e8269b1b8 100644
--- a/ports/esp32/boards/ESP32_GENERIC_S2/mpconfigboard.h
+++ b/ports/esp32/boards/ESP32_GENERIC_S2/mpconfigboard.h
@@ -2,7 +2,6 @@
 #define MICROPY_HW_MCU_NAME "ESP32S2"
 
 #define MICROPY_PY_BLUETOOTH (0)
-#define MICROPY_HW_ENABLE_SDCARD (0)
 
 // Enable UART REPL for modules that have an external USB-UART and don't use native USB.
 #define MICROPY_HW_ENABLE_UART_REPL         (1)
diff --git a/ports/esp32/boards/LILYGO_TTGO_LORA32/board.json b/ports/esp32/boards/LILYGO_TTGO_LORA32/board.json
index d68a9baaddaa6..7521c01a6bb77 100644
--- a/ports/esp32/boards/LILYGO_TTGO_LORA32/board.json
+++ b/ports/esp32/boards/LILYGO_TTGO_LORA32/board.json
@@ -19,8 +19,8 @@
         "lilygo-ttgo-lora-32-v1-6.jpg"
     ],
     "mcu": "esp32",
-    "product": "LILYGO TTGO LoRa32",
+    "product": "TTGO LoRa32",
     "thumbnail": "",
-    "url": "http://www.lilygo.cn/prod_view.aspx?TypeId=50060&Id=1270&FId=t3:50060:3",
+    "url": "https://www.lilygo.cc/products/lora3",
     "vendor": "LILYGO"
 }
diff --git a/ports/esp32/boards/LOLIN_C3_MINI/mpconfigboard.h b/ports/esp32/boards/LOLIN_C3_MINI/mpconfigboard.h
index 46d720edc758f..9eb0bada1ee59 100644
--- a/ports/esp32/boards/LOLIN_C3_MINI/mpconfigboard.h
+++ b/ports/esp32/boards/LOLIN_C3_MINI/mpconfigboard.h
@@ -2,8 +2,6 @@
 #define MICROPY_HW_MCU_NAME                 "ESP32-C3FH4"
 #define MICROPY_PY_NETWORK_HOSTNAME_DEFAULT "mpy-c3-mini"
 
-#define MICROPY_HW_ENABLE_SDCARD            (0)
-
 #define MICROPY_HW_I2C0_SCL                 (10)
 #define MICROPY_HW_I2C0_SDA                 (8)
 
diff --git a/ports/esp32/boards/LOLIN_S2_MINI/mpconfigboard.h b/ports/esp32/boards/LOLIN_S2_MINI/mpconfigboard.h
index 9776b7b478aa1..08badc3845737 100644
--- a/ports/esp32/boards/LOLIN_S2_MINI/mpconfigboard.h
+++ b/ports/esp32/boards/LOLIN_S2_MINI/mpconfigboard.h
@@ -3,7 +3,6 @@
 #define MICROPY_PY_NETWORK_HOSTNAME_DEFAULT "mpy-s2-mini"
 
 #define MICROPY_PY_BLUETOOTH                (0)
-#define MICROPY_HW_ENABLE_SDCARD            (0)
 
 #define MICROPY_HW_I2C0_SCL                 (35)
 #define MICROPY_HW_I2C0_SDA                 (33)
diff --git a/ports/esp32/boards/LOLIN_S2_PICO/mpconfigboard.h b/ports/esp32/boards/LOLIN_S2_PICO/mpconfigboard.h
index 9241280dec6a3..07db116c28471 100644
--- a/ports/esp32/boards/LOLIN_S2_PICO/mpconfigboard.h
+++ b/ports/esp32/boards/LOLIN_S2_PICO/mpconfigboard.h
@@ -3,7 +3,6 @@
 #define MICROPY_PY_NETWORK_HOSTNAME_DEFAULT "mpy-s2-pico"
 
 #define MICROPY_PY_BLUETOOTH     (0)
-#define MICROPY_HW_ENABLE_SDCARD (0)
 
 #define MICROPY_HW_I2C0_SCL      (9)
 #define MICROPY_HW_I2C0_SDA      (8)
diff --git a/ports/esp32/boards/M5STACK_ATOM/board.json b/ports/esp32/boards/M5STACK_ATOM/board.json
index 3a1e7ce359c50..c3908a47794fa 100644
--- a/ports/esp32/boards/M5STACK_ATOM/board.json
+++ b/ports/esp32/boards/M5STACK_ATOM/board.json
@@ -18,8 +18,8 @@
         "m5stack_atom.jpg"
     ],
     "mcu": "esp32",
-    "product": "M5 Stack Atom",
+    "product": "Atom",
     "thumbnail": "",
-    "url": "https://m5stack.com/",
-    "vendor": "M5 Stack"
+    "url": "https://shop.m5stack.com/products/atom-matrix-esp32-development-kit",
+    "vendor": "M5Stack"
 }
diff --git a/ports/esp32/boards/M5STACK_ATOMS3_LITE/board.json b/ports/esp32/boards/M5STACK_ATOMS3_LITE/board.json
index fe0e97f9f9ce6..26b1a4d54a1c2 100644
--- a/ports/esp32/boards/M5STACK_ATOMS3_LITE/board.json
+++ b/ports/esp32/boards/M5STACK_ATOMS3_LITE/board.json
@@ -20,5 +20,5 @@
     "product": "AtomS3 Lite",
     "thumbnail": "",
     "url": "https://shop.m5stack.com/products/atoms3-lite-esp32s3-dev-kit",
-    "vendor": "M5 Stack"
+    "vendor": "M5Stack"
 }
diff --git a/ports/esp32/boards/M5STACK_NANOC6/board.json b/ports/esp32/boards/M5STACK_NANOC6/board.json
index 087851ae5ee0b..ddf3406c837e6 100644
--- a/ports/esp32/boards/M5STACK_NANOC6/board.json
+++ b/ports/esp32/boards/M5STACK_NANOC6/board.json
@@ -18,7 +18,7 @@
         "m5stack_nanoc6.jpg"
     ],
     "mcu": "esp32c6",
-    "product": "M5Stack NanoC6",
+    "product": "NanoC6",
     "url": "https://shop.m5stack.com/products/m5stack-nanoc6-dev-kit",
     "vendor": "M5Stack"
 }
diff --git a/ports/esp32/boards/M5STACK_NANOC6/mpconfigboard.h b/ports/esp32/boards/M5STACK_NANOC6/mpconfigboard.h
index 9acab7096853b..656ec0bc6c3c5 100644
--- a/ports/esp32/boards/M5STACK_NANOC6/mpconfigboard.h
+++ b/ports/esp32/boards/M5STACK_NANOC6/mpconfigboard.h
@@ -1,7 +1,6 @@
 #define MICROPY_HW_BOARD_NAME    "M5Stack NanoC6"
 #define MICROPY_HW_MCU_NAME      "ESP32C6"
 
-#define MICROPY_HW_ENABLE_SDCARD (0)
 #define MICROPY_PY_MACHINE_I2S   (0)
 
 #define MICROPY_HW_I2C0_SCL      (1)
diff --git a/ports/esp32/boards/OLIMEX_ESP32_EVB/board.json b/ports/esp32/boards/OLIMEX_ESP32_EVB/board.json
index 3eb9a5e0a71e5..198f1d4b6d918 100644
--- a/ports/esp32/boards/OLIMEX_ESP32_EVB/board.json
+++ b/ports/esp32/boards/OLIMEX_ESP32_EVB/board.json
@@ -18,8 +18,8 @@
         "ESP32-EVB_Rev_K1.png"
     ],
     "mcu": "esp32",
-    "product": "Olimex ESP32 EVB",
+    "product": "ESP32 EVB",
     "thumbnail": "",
-    "url": "https://www.olimex.com/Products/IoT/ESP32/ESP32-EVB/open-source-hardware",
-    "vendor": "OLIMEX"
+    "url": "https://www.olimex.com/Products/IoT/ESP32/ESP32-EVB",
+    "vendor": "Olimex"
 }
diff --git a/ports/esp32/boards/OLIMEX_ESP32_POE/board.json b/ports/esp32/boards/OLIMEX_ESP32_POE/board.json
index cda26178d75f2..1b00d213c713c 100644
--- a/ports/esp32/boards/OLIMEX_ESP32_POE/board.json
+++ b/ports/esp32/boards/OLIMEX_ESP32_POE/board.json
@@ -19,8 +19,8 @@
         "ESP32-POE-ISO-1.jpg"
     ],
     "mcu": "esp32",
-    "product": "Olimex ESP32 POE",
+    "product": "ESP32 POE",
     "thumbnail": "",
-    "url": "https://www.olimex.com/",
-    "vendor": "OLIMEX"
+    "url": "https://www.olimex.com/Products/IoT/ESP32/ESP32-POE",
+    "vendor": "Olimex"
 }
diff --git a/ports/esp32/boards/SIL_WESP32/board.json b/ports/esp32/boards/SIL_WESP32/board.json
index 53a50f3286d23..7126fa7ea1bf2 100644
--- a/ports/esp32/boards/SIL_WESP32/board.json
+++ b/ports/esp32/boards/SIL_WESP32/board.json
@@ -18,7 +18,7 @@
         "wesp32-top.jpg"
     ],
     "mcu": "esp32",
-    "product": "SIL WESP32",
+    "product": "wESP32",
     "thumbnail": "",
     "url": "https://wesp32.com/",
     "vendor": "Silicognition"
diff --git a/ports/esp32/boards/SPARKFUN_IOT_REDBOARD_ESP32/board.json b/ports/esp32/boards/SPARKFUN_IOT_REDBOARD_ESP32/board.json
new file mode 100644
index 0000000000000..8bce1a001336f
--- /dev/null
+++ b/ports/esp32/boards/SPARKFUN_IOT_REDBOARD_ESP32/board.json
@@ -0,0 +1,23 @@
+{
+    "deploy": [
+        "../deploy.md"
+    ],
+    "deploy_options": {
+        "flash_offset": "0x1000"
+    },
+    "docs": "",
+    "features": [
+        "BLE",
+        "External Flash",
+        "WiFi",
+        "USB-C"
+    ],
+    "images": [
+        "19177-Sparkfun_IoT_Redboard-ESP32.jpg"
+    ],
+    "mcu": "esp32",
+    "product": "ESP32 / WROOM",
+    "thumbnail": "",
+    "url": "https://www.sparkfun.com/sparkfun-iot-redboard-esp32-development-board.html",
+    "vendor": "SparkFun"
+}
diff --git a/ports/esp32/boards/SPARKFUN_IOT_REDBOARD_ESP32/manifest.py b/ports/esp32/boards/SPARKFUN_IOT_REDBOARD_ESP32/manifest.py
new file mode 100644
index 0000000000000..73446ecac9892
--- /dev/null
+++ b/ports/esp32/boards/SPARKFUN_IOT_REDBOARD_ESP32/manifest.py
@@ -0,0 +1,2 @@
+include("$(PORT_DIR)/boards/manifest.py")
+require("sdcard")
diff --git a/ports/esp32/boards/SPARKFUN_IOT_REDBOARD_ESP32/mpconfigboard.cmake b/ports/esp32/boards/SPARKFUN_IOT_REDBOARD_ESP32/mpconfigboard.cmake
new file mode 100644
index 0000000000000..0ffcc38c877b7
--- /dev/null
+++ b/ports/esp32/boards/SPARKFUN_IOT_REDBOARD_ESP32/mpconfigboard.cmake
@@ -0,0 +1,7 @@
+set(SDKCONFIG_DEFAULTS
+    boards/sdkconfig.base
+    boards/sdkconfig.ble
+    boards/sdkconfig.240mhz
+)
+
+set(MICROPY_FROZEN_MANIFEST ${MICROPY_BOARD_DIR}/manifest.py)
diff --git a/ports/esp32/boards/SPARKFUN_IOT_REDBOARD_ESP32/mpconfigboard.h b/ports/esp32/boards/SPARKFUN_IOT_REDBOARD_ESP32/mpconfigboard.h
new file mode 100644
index 0000000000000..4fe888ac17c9a
--- /dev/null
+++ b/ports/esp32/boards/SPARKFUN_IOT_REDBOARD_ESP32/mpconfigboard.h
@@ -0,0 +1,14 @@
+// Board and hardware specific configuration
+
+#define MICROPY_HW_BOARD_NAME "SparkFun IoT RedBoard ESP32"
+#define MICROPY_HW_MCU_NAME "ESP32"
+
+// Enable UART REPL for modules that have an external USB-UART and don't use native USB.
+#define MICROPY_HW_ENABLE_UART_REPL     (1)
+
+#define MICROPY_HW_I2C0_SCL            (22)
+#define MICROPY_HW_I2C0_SDA            (21)
+
+#define MICROPY_HW_SPI1_SCK  (18)
+#define MICROPY_HW_SPI1_MOSI (23)
+#define MICROPY_HW_SPI1_MISO (19)
diff --git a/ports/esp32/boards/SPARKFUN_IOT_REDBOARD_ESP32/pins.csv b/ports/esp32/boards/SPARKFUN_IOT_REDBOARD_ESP32/pins.csv
new file mode 100644
index 0000000000000..d37c51af8f775
--- /dev/null
+++ b/ports/esp32/boards/SPARKFUN_IOT_REDBOARD_ESP32/pins.csv
@@ -0,0 +1,22 @@
+TX,GPIO1
+RX,GPIO3
+ALERT,GPIO4
+TCK,GPIO13
+TMS,GPIO14
+CS,GPIO5
+PICO,GPIO23
+POCI,GPIO19
+SCK,GPIO18
+SDA,GPIO21
+SCL,GPIO22
+A0,GPIO36
+A3,GPIO39
+A4,GPIO32
+A5,GPIO33
+A6,GPIO34
+A7,GPIO35
+LED,GPIO18
+LED_BLUE,GPIO18
+BLUE_LED,GPIO18
+RGB_LED,GPIO2
+NEOPIXEL,GPIO2
diff --git a/ports/esp32/boards/UM_FEATHERS2/mpconfigboard.h b/ports/esp32/boards/UM_FEATHERS2/mpconfigboard.h
index d8529b6342fe2..a2a00c0e46c0e 100644
--- a/ports/esp32/boards/UM_FEATHERS2/mpconfigboard.h
+++ b/ports/esp32/boards/UM_FEATHERS2/mpconfigboard.h
@@ -3,7 +3,6 @@
 #define MICROPY_PY_NETWORK_HOSTNAME_DEFAULT "FeatherS2"
 
 #define MICROPY_PY_BLUETOOTH                (0)
-#define MICROPY_HW_ENABLE_SDCARD            (0)
 
 #define MICROPY_HW_I2C0_SCL (9)
 #define MICROPY_HW_I2C0_SDA (8)
diff --git a/ports/esp32/boards/UM_FEATHERS2NEO/mpconfigboard.h b/ports/esp32/boards/UM_FEATHERS2NEO/mpconfigboard.h
index e7e4d37ece95a..bcc809895d12f 100644
--- a/ports/esp32/boards/UM_FEATHERS2NEO/mpconfigboard.h
+++ b/ports/esp32/boards/UM_FEATHERS2NEO/mpconfigboard.h
@@ -3,7 +3,6 @@
 #define MICROPY_PY_NETWORK_HOSTNAME_DEFAULT "FeatherS2-Neo"
 
 #define MICROPY_PY_BLUETOOTH                (0)
-#define MICROPY_HW_ENABLE_SDCARD            (0)
 
 #define MICROPY_HW_I2C0_SCL (9)
 #define MICROPY_HW_I2C0_SDA (8)
diff --git a/ports/esp32/boards/UM_TINYC6/mpconfigboard.h b/ports/esp32/boards/UM_TINYC6/mpconfigboard.h
index 1a3f1c904a799..09392d55594a0 100644
--- a/ports/esp32/boards/UM_TINYC6/mpconfigboard.h
+++ b/ports/esp32/boards/UM_TINYC6/mpconfigboard.h
@@ -1,7 +1,6 @@
 #define MICROPY_HW_BOARD_NAME    "Unexpected Maker TinyC6"
 #define MICROPY_HW_MCU_NAME      "ESP32C6"
 
-#define MICROPY_HW_ENABLE_SDCARD (0)
 #define MICROPY_PY_MACHINE_I2S   (0)
 
 #define MICROPY_HW_I2C0_SCL      (7)
diff --git a/ports/esp32/boards/UM_TINYS2/mpconfigboard.h b/ports/esp32/boards/UM_TINYS2/mpconfigboard.h
index e0bde417c8a2a..ecfb0056b43b0 100644
--- a/ports/esp32/boards/UM_TINYS2/mpconfigboard.h
+++ b/ports/esp32/boards/UM_TINYS2/mpconfigboard.h
@@ -3,7 +3,6 @@
 #define MICROPY_PY_NETWORK_HOSTNAME_DEFAULT "TinyS2"
 
 #define MICROPY_PY_BLUETOOTH                (0)
-#define MICROPY_HW_ENABLE_SDCARD            (0)
 
 #define MICROPY_HW_I2C0_SCL (9)
 #define MICROPY_HW_I2C0_SDA (8)
diff --git a/ports/esp32/boards/sdkconfig.base b/ports/esp32/boards/sdkconfig.base
index 530db427119ca..823b916d960a5 100644
--- a/ports/esp32/boards/sdkconfig.base
+++ b/ports/esp32/boards/sdkconfig.base
@@ -50,7 +50,6 @@ CONFIG_ESP_SYSTEM_MEMPROT_FEATURE=n
 CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS=2
 CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION=y
 CONFIG_FREERTOS_ENABLE_STATIC_TASK_CLEAN_UP=n
-CONFIG_FREERTOS_TASK_PRE_DELETION_HOOK=y
 
 # UDP
 CONFIG_LWIP_PPP_SUPPORT=y
@@ -118,7 +117,6 @@ CONFIG_ADC_CAL_LUT_ENABLE=y
 CONFIG_UART_ISR_IN_IRAM=y
 
 # IDF 5 deprecated
-CONFIG_ADC_SUPPRESS_DEPRECATE_WARN=y
 CONFIG_RMT_SUPPRESS_DEPRECATE_WARN=y
 
 CONFIG_ETH_USE_SPI_ETHERNET=y
diff --git a/ports/esp32/boards/sdkconfig.spiram b/ports/esp32/boards/sdkconfig.spiram
index 35fe3c676ddf4..f5503d554149c 100644
--- a/ports/esp32/boards/sdkconfig.spiram
+++ b/ports/esp32/boards/sdkconfig.spiram
@@ -13,6 +13,6 @@ CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL=8192
 # to PSRAM bug workarounds.  Apply some options to reduce the firmware size.
 CONFIG_COMPILER_OPTIMIZATION_SIZE=y
 CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT=y
-# CONFIG_RINGBUF_PLACE_FUNCTIONS_INTO_FLASH=y # Workaround required: see main_esp32/linker.lf
+CONFIG_RINGBUF_PLACE_FUNCTIONS_INTO_FLASH=y
 CONFIG_FREERTOS_PLACE_FUNCTIONS_INTO_FLASH=y
 CONFIG_FREERTOS_PLACE_SNAPSHOT_FUNS_INTO_FLASH=y
diff --git a/ports/esp32/esp32_common.cmake b/ports/esp32/esp32_common.cmake
index e03d2ff11aada..09b120391305f 100644
--- a/ports/esp32/esp32_common.cmake
+++ b/ports/esp32/esp32_common.cmake
@@ -14,6 +14,25 @@ if(NOT MICROPY_PORT_DIR)
     get_filename_component(MICROPY_PORT_DIR ${MICROPY_DIR}/ports/esp32 ABSOLUTE)
 endif()
 
+# RISC-V specific inclusions
+if(CONFIG_IDF_TARGET_ARCH_RISCV)
+    list(APPEND MICROPY_SOURCE_LIB
+        ${MICROPY_DIR}/shared/runtime/gchelper_native.c
+        ${MICROPY_DIR}/shared/runtime/gchelper_rv32i.s
+    )
+endif()
+
+if(NOT DEFINED MICROPY_PY_TINYUSB)
+    if(CONFIG_IDF_TARGET_ESP32S2 OR CONFIG_IDF_TARGET_ESP32S3)
+        set(MICROPY_PY_TINYUSB ON)
+    endif()
+endif()
+
+# Enable error text compression by default.
+if(NOT MICROPY_ROM_TEXT_COMPRESSION)
+    set(MICROPY_ROM_TEXT_COMPRESSION ON)
+endif()
+
 # Include core source components.
 include(${MICROPY_DIR}/py/py.cmake)
 
@@ -23,7 +42,9 @@ include(${MICROPY_DIR}/py/py.cmake)
 if(NOT CMAKE_BUILD_EARLY_EXPANSION)
     # Enable extmod components that will be configured by extmod.cmake.
     # A board may also have enabled additional components.
-    set(MICROPY_PY_BTREE ON)
+    if (NOT DEFINED MICROPY_PY_BTREE)
+        set(MICROPY_PY_BTREE ON)
+    endif()
 
     include(${MICROPY_DIR}/py/usermod.cmake)
     include(${MICROPY_DIR}/extmod/extmod.cmake)
@@ -59,9 +80,7 @@ list(APPEND MICROPY_SOURCE_DRIVERS
     ${MICROPY_DIR}/drivers/dht/dht.c
 )
 
-string(CONCAT GIT_SUBMODULES "${GIT_SUBMODULES} " lib/tinyusb)
-if(MICROPY_PY_TINYUSB AND NOT ECHO_SUBMODULES)
-    set(TINYUSB_SRC "${MICROPY_DIR}/lib/tinyusb/src")
+if(MICROPY_PY_TINYUSB)
     string(TOUPPER OPT_MCU_${IDF_TARGET} tusb_mcu)
 
     list(APPEND MICROPY_DEF_TINYUSB
@@ -69,12 +88,6 @@ if(MICROPY_PY_TINYUSB AND NOT ECHO_SUBMODULES)
     )
 
     list(APPEND MICROPY_SOURCE_TINYUSB
-        ${TINYUSB_SRC}/tusb.c
-        ${TINYUSB_SRC}/common/tusb_fifo.c
-        ${TINYUSB_SRC}/device/usbd.c
-        ${TINYUSB_SRC}/device/usbd_control.c
-        ${TINYUSB_SRC}/class/cdc/cdc_device.c
-        ${TINYUSB_SRC}/portable/synopsys/dwc2/dcd_dwc2.c
         ${MICROPY_DIR}/shared/tinyusb/mp_usbd.c
         ${MICROPY_DIR}/shared/tinyusb/mp_usbd_cdc.c
         ${MICROPY_DIR}/shared/tinyusb/mp_usbd_descriptor.c
@@ -82,13 +95,8 @@ if(MICROPY_PY_TINYUSB AND NOT ECHO_SUBMODULES)
     )
 
     list(APPEND MICROPY_INC_TINYUSB
-        ${TINYUSB_SRC}
         ${MICROPY_DIR}/shared/tinyusb/
     )
-
-    list(APPEND MICROPY_LINK_TINYUSB
-        -Wl,--wrap=dcd_event_handler
-    )
 endif()
 
 list(APPEND MICROPY_SOURCE_PORT
@@ -178,6 +186,22 @@ list(APPEND IDF_COMPONENTS
     vfs
 )
 
+# Provide the default LD fragment if not set
+if (MICROPY_USER_LDFRAGMENTS)
+    set(MICROPY_LDFRAGMENTS ${MICROPY_USER_LDFRAGMENTS})
+endif()
+
+if (UPDATE_SUBMODULES)
+    # ESP-IDF checks if some paths exist before CMake does. Some paths don't
+    # yet exist if this is an UPDATE_SUBMODULES pass on a brand new checkout, so remove
+    # any path which might not exist yet. A "real" build will not set UPDATE_SUBMODULES.
+    unset(MICROPY_SOURCE_TINYUSB)
+    unset(MICROPY_SOURCE_EXTMOD)
+    unset(MICROPY_SOURCE_LIB)
+    unset(MICROPY_INC_TINYUSB)
+    unset(MICROPY_INC_CORE)
+endif()
+
 # Register the main IDF component.
 idf_component_register(
     SRCS
@@ -197,7 +221,7 @@ idf_component_register(
         ${MICROPY_BOARD_DIR}
         ${CMAKE_BINARY_DIR}
     LDFRAGMENTS
-        linker.lf
+        ${MICROPY_LDFRAGMENTS}
     REQUIRES
         ${IDF_COMPONENTS}
 )
@@ -206,16 +230,18 @@ idf_component_register(
 set(MICROPY_TARGET ${COMPONENT_TARGET})
 
 # Define mpy-cross flags, for use with frozen code.
-if(CONFIG_IDF_TARGET_ARCH STREQUAL "xtensa")
-set(MICROPY_CROSS_FLAGS -march=xtensawin)
+if(CONFIG_IDF_TARGET_ARCH_XTENSA)
+    set(MICROPY_CROSS_FLAGS -march=xtensawin)
+elseif(CONFIG_IDF_TARGET_ARCH_RISCV)
+    set(MICROPY_CROSS_FLAGS -march=rv32imc)
 endif()
 
 # Set compile options for this port.
 target_compile_definitions(${MICROPY_TARGET} PUBLIC
+    ${MICROPY_DEF_COMPONENT}
     ${MICROPY_DEF_CORE}
     ${MICROPY_DEF_BOARD}
     ${MICROPY_DEF_TINYUSB}
-    MICROPY_ESP_IDF_4=1
     MICROPY_VFS_FAT=1
     MICROPY_VFS_LFS2=1
     FFCONF_H=\"${MICROPY_OOFATFS_DIR}/ffconf.h\"
@@ -225,22 +251,21 @@ target_compile_definitions(${MICROPY_TARGET} PUBLIC
 
 # Disable some warnings to keep the build output clean.
 target_compile_options(${MICROPY_TARGET} PUBLIC
+    ${MICROPY_COMPILE_COMPONENT}
     -Wno-clobbered
     -Wno-deprecated-declarations
     -Wno-missing-field-initializers
 )
 
-target_link_options(${MICROPY_TARGET} PUBLIC
-     ${MICROPY_LINK_TINYUSB}
-)
-
 # Additional include directories needed for private NimBLE headers.
 target_include_directories(${MICROPY_TARGET} PUBLIC
     ${IDF_PATH}/components/bt/host/nimble/nimble
 )
 
 # Add additional extmod and usermod components.
-target_link_libraries(${MICROPY_TARGET} micropy_extmod_btree)
+if (MICROPY_PY_BTREE)
+    target_link_libraries(${MICROPY_TARGET} micropy_extmod_btree)
+endif()
 target_link_libraries(${MICROPY_TARGET} usermod)
 
 # Extra linker options
diff --git a/ports/esp32/esp32_partition.c b/ports/esp32/esp32_partition.c
index 55830a285b0b6..f33e9da671b8c 100644
--- a/ports/esp32/esp32_partition.c
+++ b/ports/esp32/esp32_partition.c
@@ -53,6 +53,20 @@ typedef struct _esp32_partition_obj_t {
     uint16_t block_size;
 } esp32_partition_obj_t;
 
+#if MICROPY_VFS_ROM_IOCTL
+
+static esp32_partition_obj_t esp32_partition_romfs_obj = {
+    .base = { .type = NULL },
+    .part = NULL,
+    .cache = NULL,
+    .block_size = NATIVE_BLOCK_SIZE_BYTES,
+};
+
+static const void *esp32_partition_romfs_ptr = NULL;
+static esp_partition_mmap_handle_t esp32_partition_romfs_handle;
+
+#endif
+
 static esp32_partition_obj_t *esp32_partition_new(const esp_partition_t *part, uint16_t block_size) {
     if (part == NULL) {
         mp_raise_OSError(MP_ENOENT);
@@ -114,6 +128,24 @@ static mp_obj_t esp32_partition_make_new(const mp_obj_type_t *type, size_t n_arg
     return MP_OBJ_FROM_PTR(esp32_partition_new(part, block_size));
 }
 
+#if MICROPY_VFS_ROM_IOCTL
+static mp_int_t esp32_partition_get_buffer(mp_obj_t self_in, mp_buffer_info_t *bufinfo, mp_uint_t flags) {
+    esp32_partition_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    if (self == &esp32_partition_romfs_obj && flags == MP_BUFFER_READ) {
+        if (esp32_partition_romfs_ptr == NULL) {
+            check_esp_err(esp_partition_mmap(self->part, 0, self->part->size, ESP_PARTITION_MMAP_DATA, &esp32_partition_romfs_ptr, &esp32_partition_romfs_handle));
+        }
+        bufinfo->buf = (void *)esp32_partition_romfs_ptr;
+        bufinfo->len = self->part->size;
+        bufinfo->typecode = 'B';
+        return 0;
+    } else {
+        // Unsupported.
+        return 1;
+    }
+}
+#endif
+
 static mp_obj_t esp32_partition_find(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
     // Parse args
     enum { ARG_type, ARG_subtype, ARG_label, ARG_block_size };
@@ -284,11 +316,55 @@ static const mp_rom_map_elem_t esp32_partition_locals_dict_table[] = {
 };
 static MP_DEFINE_CONST_DICT(esp32_partition_locals_dict, esp32_partition_locals_dict_table);
 
+#if MICROPY_VFS_ROM_IOCTL
+#define ESP32_PARTITION_GET_BUFFER buffer, esp32_partition_get_buffer,
+#else
+#define ESP32_PARTITION_GET_BUFFER
+#endif
+
 MP_DEFINE_CONST_OBJ_TYPE(
     esp32_partition_type,
     MP_QSTR_Partition,
     MP_TYPE_FLAG_NONE,
     make_new, esp32_partition_make_new,
     print, esp32_partition_print,
+    ESP32_PARTITION_GET_BUFFER
     locals_dict, &esp32_partition_locals_dict
     );
+
+/******************************************************************************/
+// romfs partition
+
+#if MICROPY_VFS_ROM_IOCTL
+
+mp_obj_t mp_vfs_rom_ioctl(size_t n_args, const mp_obj_t *args) {
+    if (esp32_partition_romfs_obj.base.type == NULL) {
+        esp32_partition_romfs_obj.base.type = &esp32_partition_type;
+        // Get the romfs partition.
+        // TODO: number of segments ioctl can be used if there is more than one romfs.
+        esp_partition_iterator_t iter = esp_partition_find(ESP_PARTITION_TYPE_DATA, ESP_PARTITION_SUBTYPE_ANY, "romfs");
+        if (iter != NULL) {
+            esp32_partition_romfs_obj.part = esp_partition_get(iter);
+        }
+        esp_partition_iterator_release(iter);
+    }
+
+    switch (mp_obj_get_int(args[0])) {
+        case MP_VFS_ROM_IOCTL_GET_NUMBER_OF_SEGMENTS:
+            if (esp32_partition_romfs_obj.part == NULL) {
+                return MP_OBJ_NEW_SMALL_INT(0);
+            } else {
+                return MP_OBJ_NEW_SMALL_INT(1);
+            }
+        case MP_VFS_ROM_IOCTL_GET_SEGMENT:
+            if (esp32_partition_romfs_obj.part == NULL) {
+                return MP_OBJ_NEW_SMALL_INT(-MP_EINVAL);
+            } else {
+                return MP_OBJ_FROM_PTR(&esp32_partition_romfs_obj);
+            }
+        default:
+            return MP_OBJ_NEW_SMALL_INT(-MP_EINVAL);
+    }
+}
+
+#endif // MICROPY_VFS_ROM_IOCTL
diff --git a/ports/esp32/machine_adc.c b/ports/esp32/machine_adc.c
index be1725c3709a6..02acaa22da035 100644
--- a/ports/esp32/machine_adc.c
+++ b/ports/esp32/machine_adc.c
@@ -30,7 +30,7 @@
 
 #include "py/mphal.h"
 #include "adc.h"
-#include "driver/adc.h"
+#include "esp_adc/adc_oneshot.h"
 
 #define ADCBLOCK1 (&madcblock_obj[0])
 #define ADCBLOCK2 (&madcblock_obj[1])
@@ -126,20 +126,8 @@ static const machine_adc_obj_t madc_obj[] = {
     #endif
 };
 
-// These values are initialised to 0, which means the corresponding ADC channel is not initialised.
-// The madc_atten_get/madc_atten_set functions store (atten+1) here so that the uninitialised state
-// can be distinguished from the initialised state.
 static uint8_t madc_obj_atten[MP_ARRAY_SIZE(madc_obj)];
 
-static inline adc_atten_t madc_atten_get(const machine_adc_obj_t *self) {
-    uint8_t value = madc_obj_atten[self - &madc_obj[0]];
-    return value == 0 ? ADC_ATTEN_MAX : value - 1;
-}
-
-static inline void madc_atten_set(const machine_adc_obj_t *self, adc_atten_t atten) {
-    madc_obj_atten[self - &madc_obj[0]] = atten + 1;
-}
-
 const machine_adc_obj_t *madc_search_helper(machine_adc_block_obj_t *block, adc_channel_t channel_id, gpio_num_t gpio_id) {
     for (int i = 0; i < MP_ARRAY_SIZE(madc_obj); i++) {
         const machine_adc_obj_t *adc = &madc_obj[i];
@@ -152,22 +140,7 @@ const machine_adc_obj_t *madc_search_helper(machine_adc_block_obj_t *block, adc_
 
 static void mp_machine_adc_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
     const machine_adc_obj_t *self = MP_OBJ_TO_PTR(self_in);
-    mp_printf(print, "ADC(Pin(%u), atten=%u)", self->gpio_id, madc_atten_get(self));
-}
-
-static void madc_atten_helper(const machine_adc_obj_t *self, mp_int_t atten) {
-    esp_err_t err = ESP_FAIL;
-    if (self->block->unit_id == ADC_UNIT_1) {
-        err = adc1_config_channel_atten(self->channel_id, atten);
-    } else {
-        #if SOC_ADC_PERIPH_NUM >= 2
-        err = adc2_config_channel_atten(self->channel_id, atten);
-        #endif
-    }
-    if (err != ESP_OK) {
-        mp_raise_ValueError(MP_ERROR_TEXT("invalid atten"));
-    }
-    madc_atten_set(self, atten);
+    mp_printf(print, "ADC(Pin(%u), atten=%u)", self->gpio_id, mp_machine_adc_atten_get_helper(self));
 }
 
 void madc_init_helper(const machine_adc_obj_t *self, size_t n_pos_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
@@ -182,18 +155,32 @@ void madc_init_helper(const machine_adc_obj_t *self, size_t n_pos_args, const mp
     mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
     mp_arg_parse_all(n_pos_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
 
-    mp_int_t atten = args[ARG_atten].u_int;
-    if (atten != -1) {
-        madc_atten_helper(self, atten);
-    } else if (madc_atten_get(self) == ADC_ATTEN_MAX) {
-        madc_atten_helper(self, ADC_ATTEN_DB_0);
+
+    if (!self->block->handle) {
+        adc_oneshot_unit_init_cfg_t init_config = {
+            .unit_id = self->block->unit_id
+        };
+        check_esp_err(adc_oneshot_new_unit(&init_config, &self->block->handle));
     }
+
+    mp_int_t atten = args[ARG_atten].u_int;
+    mp_machine_adc_atten_set_helper(self, atten != -1 ? atten : ADC_ATTEN_MAX);
+    mp_machine_adc_block_width_set_helper(self->block, ADC_WIDTH_MAX);
+    apply_self_adc_channel_atten(self, mp_machine_adc_atten_get_helper(self));
+
 }
 
 static void mp_machine_adc_init_helper(machine_adc_obj_t *self, size_t n_pos_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
     madc_init_helper(self, n_pos_args, pos_args, kw_args);
 }
 
+static void mp_machine_adc_deinit(machine_adc_obj_t *self) {
+    if (self->block->handle) {
+        check_esp_err(adc_oneshot_del_unit(self->block->handle));
+        self->block->handle = NULL;
+    }
+}
+
 static mp_obj_t mp_machine_adc_make_new(const mp_obj_type_t *type, size_t n_pos_args, size_t n_kw_args, const mp_obj_t *args) {
     mp_arg_check_num(n_pos_args, n_kw_args, 1, MP_OBJ_FUN_ARGS_MAX, true);
     gpio_num_t gpio_id = machine_pin_get_id(args[0]);
@@ -202,10 +189,6 @@ static mp_obj_t mp_machine_adc_make_new(const mp_obj_type_t *type, size_t n_pos_
         mp_raise_ValueError(MP_ERROR_TEXT("invalid pin"));
     }
 
-    if (self->block->width == -1) {
-        madcblock_bits_helper(self->block, self->block->bits);
-    }
-
     mp_map_t kw_args;
     mp_map_init_fixed_table(&kw_args, n_kw_args, args + n_pos_args);
     madc_init_helper(self, n_pos_args - 1, args + 1, &kw_args);
@@ -225,20 +208,46 @@ static mp_int_t mp_machine_adc_read(machine_adc_obj_t *self) {
 static mp_int_t mp_machine_adc_read_u16(machine_adc_obj_t *self) {
     mp_uint_t raw = madcblock_read_helper(self->block, self->channel_id);
     // Scale raw reading to 16 bit value using a Taylor expansion (for 8 <= bits <= 16)
-    mp_int_t bits = self->block->bits;
+    mp_int_t bits = mp_machine_adc_width_get_helper(self);
     mp_uint_t u16 = raw << (16 - bits) | raw >> (2 * bits - 16);
     return u16;
 }
 
 static mp_int_t mp_machine_adc_read_uv(machine_adc_obj_t *self) {
-    adc_atten_t atten = madc_atten_get(self);
-    return madcblock_read_uv_helper(self->block, self->channel_id, atten);
+    return madcblock_read_uv_helper(self->block, self->channel_id, mp_machine_adc_atten_get_helper(self));
+}
+
+mp_int_t mp_machine_adc_atten_get_helper(const machine_adc_obj_t *self) {
+    uint8_t value = madc_obj_atten[self - &madc_obj[0]];
+    return value == 0 ? ADC_ATTEN_MAX : value - 1;
+}
+
+void mp_machine_adc_atten_set_helper(const machine_adc_obj_t *self, mp_int_t atten) {
+    if (atten < ADC_ATTEN_MIN || atten > ADC_ATTEN_MAX) {
+        mp_raise_ValueError(MP_ERROR_TEXT("invalid attenuation"));
+    }
+
+    madc_obj_atten[self - &madc_obj[0]] = atten + 1;
 }
 
 static void mp_machine_adc_atten_set(machine_adc_obj_t *self, mp_int_t atten) {
-    madc_atten_helper(self, atten);
+    mp_machine_adc_atten_set_helper(self, atten);
+    apply_self_adc_channel_atten(self, mp_machine_adc_atten_get_helper(self));
+}
+
+mp_int_t mp_machine_adc_width_get_helper(const machine_adc_obj_t *self) {
+    return self->block->bitwidth;
+}
+
+void mp_machine_adc_block_width_set_helper(machine_adc_block_obj_t *self, mp_int_t width) {
+    if (width < ADC_WIDTH_MIN || width > ADC_WIDTH_MAX) {
+        mp_raise_ValueError(MP_ERROR_TEXT("invalid bit-width"));
+    }
+
+    self->bitwidth = width;
 }
 
 static void mp_machine_adc_width_set(machine_adc_obj_t *self, mp_int_t width) {
-    madcblock_bits_helper(self->block, width);
+    mp_machine_adc_block_width_set_helper(self->block, width);
+    apply_self_adc_channel_atten(self, mp_machine_adc_atten_get_helper(self));
 }
diff --git a/ports/esp32/machine_adc_block.c b/ports/esp32/machine_adc_block.c
index a373603b7e396..6b06b432c28e4 100644
--- a/ports/esp32/machine_adc_block.c
+++ b/ports/esp32/machine_adc_block.c
@@ -29,25 +29,21 @@
 
 #include "py/mphal.h"
 #include "adc.h"
-#include "driver/adc.h"
+#include "esp_adc/adc_oneshot.h"
 
 machine_adc_block_obj_t madcblock_obj[] = {
-    {{&machine_adc_block_type}, ADC_UNIT_1, SOC_ADC_RTC_MAX_BITWIDTH, -1, {0}},
+    {{&machine_adc_block_type}, ADC_UNIT_1, NULL, ADC_WIDTH_MAX, {0}},
     #if SOC_ADC_PERIPH_NUM > 1
-    {{&machine_adc_block_type}, ADC_UNIT_2, SOC_ADC_RTC_MAX_BITWIDTH, -1, {0}},
+    {{&machine_adc_block_type}, ADC_UNIT_2, NULL, ADC_WIDTH_MAX, {0}},
     #endif
 };
 
 static void mp_machine_adc_block_print(const mp_print_t *print, machine_adc_block_obj_t *self) {
-    mp_printf(print, "ADCBlock(%u, bits=%u)", self->unit_id, self->bits);
+    mp_printf(print, "ADCBlock(%u, bits=%u)", self->unit_id, self->bitwidth);
 }
 
 static void mp_machine_adc_block_bits_set(machine_adc_block_obj_t *self, mp_int_t bits) {
-    if (bits != -1) {
-        madcblock_bits_helper(self, bits);
-    } else if (self->width == -1) {
-        madcblock_bits_helper(self, self->bits);
-    }
+    mp_machine_adc_block_width_set_helper(self, bits);
 }
 
 static machine_adc_block_obj_t *mp_machine_adc_block_get(mp_int_t unit) {
diff --git a/ports/esp32/machine_i2c.c b/ports/esp32/machine_i2c.c
index 732a62f47f193..259101ee7e145 100644
--- a/ports/esp32/machine_i2c.c
+++ b/ports/esp32/machine_i2c.c
@@ -35,9 +35,14 @@
 #if MICROPY_PY_MACHINE_I2C || MICROPY_PY_MACHINE_SOFTI2C
 
 #ifndef MICROPY_HW_I2C0_SCL
+#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
+#define MICROPY_HW_I2C0_SCL (GPIO_NUM_9)
+#define MICROPY_HW_I2C0_SDA (GPIO_NUM_8)
+#else
 #define MICROPY_HW_I2C0_SCL (GPIO_NUM_18)
 #define MICROPY_HW_I2C0_SDA (GPIO_NUM_19)
 #endif
+#endif
 
 #ifndef MICROPY_HW_I2C1_SCL
 #if CONFIG_IDF_TARGET_ESP32
@@ -146,12 +151,15 @@ static void machine_hw_i2c_print(const mp_print_t *print, mp_obj_t self_in, mp_p
 }
 
 mp_obj_t machine_hw_i2c_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) {
-    MP_MACHINE_I2C_CHECK_FOR_LEGACY_SOFTI2C_CONSTRUCTION(n_args, n_kw, all_args);
+    // Create a SoftI2C instance if no id is specified (or is -1) but other arguments are given
+    if (n_args != 0) {
+        MP_MACHINE_I2C_CHECK_FOR_LEGACY_SOFTI2C_CONSTRUCTION(n_args, n_kw, all_args);
+    }
 
     // Parse args
     enum { ARG_id, ARG_scl, ARG_sda, ARG_freq, ARG_timeout };
     static const mp_arg_t allowed_args[] = {
-        { MP_QSTR_id, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
+        { MP_QSTR_id, MP_ARG_INT, {.u_int = I2C_NUM_0} },
         { MP_QSTR_scl, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
         { MP_QSTR_sda, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
         { MP_QSTR_freq, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 400000} },
@@ -161,7 +169,9 @@ mp_obj_t machine_hw_i2c_make_new(const mp_obj_type_t *type, size_t n_args, size_
     mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
 
     // Get I2C bus
-    mp_int_t i2c_id = mp_obj_get_int(args[ARG_id].u_obj);
+    mp_int_t i2c_id = args[ARG_id].u_int;
+
+    // Check if the I2C bus is valid
     if (!(I2C_NUM_0 <= i2c_id && i2c_id < I2C_NUM_MAX)) {
         mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("I2C(%d) doesn't exist"), i2c_id);
     }
diff --git a/ports/esp32/machine_pin.c b/ports/esp32/machine_pin.c
index 74202d6f758cd..d0c4ee1a7eca7 100644
--- a/ports/esp32/machine_pin.c
+++ b/ports/esp32/machine_pin.c
@@ -158,12 +158,12 @@ static mp_obj_t machine_pin_obj_init_helper(const machine_pin_obj_t *self, size_
         }
     }
 
-    #if CONFIG_IDF_TARGET_ESP32C3 && MICROPY_HW_ESP_USB_SERIAL_JTAG
+    #if CONFIG_IDF_TARGET_ESP32C3 && !MICROPY_HW_ESP_USB_SERIAL_JTAG
     if (index == 18 || index == 19) {
         CLEAR_PERI_REG_MASK(USB_SERIAL_JTAG_CONF0_REG, USB_SERIAL_JTAG_USB_PAD_ENABLE);
     }
     #endif
-    #if CONFIG_IDF_TARGET_ESP32C6 && CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG_ENABLED
+    #if CONFIG_IDF_TARGET_ESP32C6 && !MICROPY_HW_ESP_USB_SERIAL_JTAG
     if (index == 12 || index == 13) {
         CLEAR_PERI_REG_MASK(USB_SERIAL_JTAG_CONF0_REG, USB_SERIAL_JTAG_USB_PAD_ENABLE);
     }
@@ -287,6 +287,15 @@ static mp_obj_t machine_pin_on(mp_obj_t self_in) {
 }
 static MP_DEFINE_CONST_FUN_OBJ_1(machine_pin_on_obj, machine_pin_on);
 
+// pin.toggle()
+static mp_obj_t machine_pin_toggle(mp_obj_t self_in) {
+    machine_pin_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    gpio_num_t index = PIN_OBJ_PTR_INDEX(self);
+    gpio_set_level(index, 1 - mp_hal_pin_read_output(index));
+    return mp_const_none;
+}
+static MP_DEFINE_CONST_FUN_OBJ_1(machine_pin_toggle_obj, machine_pin_toggle);
+
 // pin.irq(handler=None, trigger=IRQ_FALLING|IRQ_RISING)
 static mp_obj_t machine_pin_irq(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
     enum { ARG_handler, ARG_trigger, ARG_wake };
@@ -366,6 +375,7 @@ static const mp_rom_map_elem_t machine_pin_locals_dict_table[] = {
     { MP_ROM_QSTR(MP_QSTR_value), MP_ROM_PTR(&machine_pin_value_obj) },
     { MP_ROM_QSTR(MP_QSTR_off), MP_ROM_PTR(&machine_pin_off_obj) },
     { MP_ROM_QSTR(MP_QSTR_on), MP_ROM_PTR(&machine_pin_on_obj) },
+    { MP_ROM_QSTR(MP_QSTR_toggle), MP_ROM_PTR(&machine_pin_toggle_obj) },
     { MP_ROM_QSTR(MP_QSTR_irq), MP_ROM_PTR(&machine_pin_irq_obj) },
 
     // class attributes
diff --git a/ports/esp32/machine_pin.h b/ports/esp32/machine_pin.h
index 3f94508e015f8..47f1ddebebf44 100644
--- a/ports/esp32/machine_pin.h
+++ b/ports/esp32/machine_pin.h
@@ -108,7 +108,7 @@
 #define MICROPY_HW_ENABLE_GPIO9 (1)
 #define MICROPY_HW_ENABLE_GPIO10 (1)
 #define MICROPY_HW_ENABLE_GPIO11 (1)
-#if !CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG
+#if !MICROPY_HW_ESP_USB_SERIAL_JTAG
 #define MICROPY_HW_ENABLE_GPIO12 (1)
 #define MICROPY_HW_ENABLE_GPIO13 (1)
 #endif
diff --git a/ports/esp32/machine_pwm.c b/ports/esp32/machine_pwm.c
index 6e3610b156679..7cb84640eecaf 100644
--- a/ports/esp32/machine_pwm.c
+++ b/ports/esp32/machine_pwm.c
@@ -6,7 +6,8 @@
  * Copyright (c) 2016-2021 Damien P. George
  * Copyright (c) 2018 Alan Dragomirecky
  * Copyright (c) 2020 Antoine Aubert
- * Copyright (c) 2021 Ihor Nehrutsa
+ * Copyright (c) 2021, 2023-2025 Ihor Nehrutsa
+ * Copyright (c) 2024 Yoann Darche
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this software and associated documentation files (the "Software"), to deal
@@ -32,79 +33,41 @@
 
 #include <math.h>
 #include "py/mphal.h"
-#include "driver/ledc.h"
 #include "esp_err.h"
+#include "driver/ledc.h"
+#include "soc/ledc_periph.h"
 #include "soc/gpio_sig_map.h"
-
-#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 1, 0)
 #include "esp_clk_tree.h"
-#endif
-
-#define PWM_DBG(...)
-// #define PWM_DBG(...) mp_printf(&mp_plat_print, __VA_ARGS__); mp_printf(&mp_plat_print, "\n");
-
-// Total number of channels
-#define PWM_CHANNEL_MAX (LEDC_SPEED_MODE_MAX * LEDC_CHANNEL_MAX)
-
-typedef struct _chan_t {
-    // Which channel has which GPIO pin assigned?
-    // (-1 if not assigned)
-    gpio_num_t pin;
-    // Which channel has which timer assigned?
-    // (-1 if not assigned)
-    int timer_idx;
-} chan_t;
+#include "py/mpprint.h"
 
-// List of PWM channels
-static chan_t chans[PWM_CHANNEL_MAX];
+#define debug_printf(...) mp_printf(&mp_plat_print, __VA_ARGS__); mp_printf(&mp_plat_print, " | %d at %s\n", __LINE__, __FILE__);
 
-// channel_idx is an index (end-to-end sequential numbering) for all channels
-// available on the chip and described in chans[]
-#define CHANNEL_IDX(mode, channel) (mode * LEDC_CHANNEL_MAX + channel)
-#define CHANNEL_IDX_TO_MODE(channel_idx) (channel_idx / LEDC_CHANNEL_MAX)
-#define CHANNEL_IDX_TO_CHANNEL(channel_idx) (channel_idx % LEDC_CHANNEL_MAX)
+#define FADE 0
 
-// Total number of timers
-#define PWM_TIMER_MAX (LEDC_SPEED_MODE_MAX * LEDC_TIMER_MAX)
+// 10-bit user interface resolution compatible with esp8266 PWM.duty()
+#define UI_RES_10_BIT  (10)
+#define DUTY_10        UI_RES_10_BIT
+// Maximum duty value on 10-bit resolution is 1024 but reduced to 1023 in UI
+#define MAX_10_DUTY    (1U << UI_RES_10_BIT)
 
-// List of timer configs
-static ledc_timer_config_t timers[PWM_TIMER_MAX];
+// 16-bit user interface resolution used in PWM.duty_u16()
+#define UI_RES_16_BIT  (16)
+#define DUTY_16        UI_RES_16_BIT
+// Maximum duty value on 16-bit resolution is 65536 but reduced to 65535 in UI
+#define MAX_16_DUTY    (1U << UI_RES_16_BIT)
 
-// timer_idx is an index (end-to-end sequential numbering) for all timers
-// available on the chip and configured in timers[]
-#define TIMER_IDX(mode, timer) (mode * LEDC_TIMER_MAX + timer)
-#define TIMER_IDX_TO_MODE(timer_idx) (timer_idx / LEDC_TIMER_MAX)
-#define TIMER_IDX_TO_TIMER(timer_idx) (timer_idx % LEDC_TIMER_MAX)
+// ns user interface used in PWM.duty_ns()
+#define DUTY_NS        (1)
 
-// Params for PWM operation
 // 5khz is default frequency
-#define PWM_FREQ (5000)
-
-// 10-bit resolution (compatible with esp8266 PWM)
-#define PWM_RES_10_BIT (LEDC_TIMER_10_BIT)
-
-// Maximum duty value on 10-bit resolution
-#define MAX_DUTY_U10 ((1 << PWM_RES_10_BIT) - 1)
-// https://docs.espressif.com/projects/esp-idf/en/latest/esp32/api-reference/peripherals/ledc.html#supported-range-of-frequency-and-duty-resolutions
-// duty() uses 10-bit resolution or less
-// duty_u16() and duty_ns() use 16-bit resolution or less
-
-// Possible highest resolution in device
-#if (LEDC_TIMER_BIT_MAX - 1) < LEDC_TIMER_16_BIT
-#define HIGHEST_PWM_RES (LEDC_TIMER_BIT_MAX - 1)
-#else
-#define HIGHEST_PWM_RES (LEDC_TIMER_16_BIT) // 20 bit for ESP32, but 16 bit is used
-#endif
-// Duty resolution of user interface in `duty_u16()` and `duty_u16` parameter in constructor/initializer
-#define UI_RES_16_BIT (16)
-// Maximum duty value on highest user interface resolution
-#define UI_MAX_DUTY ((1 << UI_RES_16_BIT) - 1)
-// How much to shift from the HIGHEST_PWM_RES duty resolution to the user interface duty resolution UI_RES_16_BIT
-#define UI_RES_SHIFT (UI_RES_16_BIT - HIGHEST_PWM_RES) // 0 for ESP32, 2 for S2, S3, C3
-
-#if SOC_LEDC_SUPPORT_REF_TICK
+#define PWM_FREQ       (5000)
+// default duty 50%
+#define PWM_DUTY       ((1U << UI_RES_16_BIT) / 2)
+
+// All chips except esp32 and esp32s2 do not have timer-specific clock sources, which means clock source for all timers must be the same one.
+#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2
 // If the PWM frequency is less than EMPIRIC_FREQ, then LEDC_REF_CLK_HZ(1 MHz) source is used, else LEDC_APB_CLK_HZ(80 MHz) source is used
-#define EMPIRIC_FREQ (10) // Hz
+#define EMPIRIC_FREQ   (10) // Hz
 #endif
 
 // Config of timer upon which we run all PWM'ed GPIO pins
@@ -113,484 +76,675 @@ static bool pwm_inited = false;
 // MicroPython PWM object struct
 typedef struct _machine_pwm_obj_t {
     mp_obj_base_t base;
-    gpio_num_t pin;
-    bool active;
-    int mode;
-    int channel;
-    int timer;
-    int duty_x; // PWM_RES_10_BIT if duty(), HIGHEST_PWM_RES if duty_u16(), -HIGHEST_PWM_RES if duty_ns()
-    int duty_u10; // stored values from previous duty setters
-    int duty_u16; // - / -
-    int duty_ns; // - / -
+    int8_t pin;
+    int8_t mode;
+    int8_t channel;
+    int8_t timer;
+    bool lightsleep;
+    int32_t freq;
+    int8_t duty_scale; // DUTY_10 if duty(), DUTY_16 if duty_u16(), DUTY_NS if duty_ns()
+    int duty_ui;       // saved values of UI duty
+    int channel_duty;  // saved values of UI duty, calculated to raw channel->duty
+    bool output_invert;
+    bool output_invert_prev;
 } machine_pwm_obj_t;
 
-static bool is_timer_in_use(int current_channel_idx, int timer_idx);
-static void set_duty_u16(machine_pwm_obj_t *self, int duty);
-static void set_duty_u10(machine_pwm_obj_t *self, int duty);
-static void set_duty_ns(machine_pwm_obj_t *self, int ns);
+typedef struct _chans_t {
+    int8_t pin;      // Which channel has which GPIO pin assigned? (-1 if not assigned)
+    int8_t timer;    // Which channel has which timer assigned? (-1 if not assigned)
+    bool lightsleep; // Is light sleep enable has been set for this pin
+} chans_t;
+
+// List of PWM channels
+static chans_t chans[LEDC_SPEED_MODE_MAX][LEDC_CHANNEL_MAX];
+
+typedef struct _timers_t {
+    int32_t freq;
+    int8_t duty_resolution;
+    ledc_clk_cfg_t clk_cfg;
+} timers_t;
+
+// List of PWM timers
+static timers_t timers[LEDC_SPEED_MODE_MAX][LEDC_TIMER_MAX];
+
+// register-unregister channel
+static void register_channel(int mode, int channel, int pin, int timer) {
+    chans[mode][channel].pin = pin;
+    chans[mode][channel].timer = timer;
+}
+
+static void unregister_channel(int mode, int channel) {
+    register_channel(mode, channel, -1, -1);
+    chans[mode][channel].lightsleep = false;
+}
+
+static void unregister_timer(int mode, int timer) {
+    timers[mode][timer].freq = -1; // unused timer freq is -1
+    timers[mode][timer].duty_resolution = 0;
+    timers[mode][timer].clk_cfg = LEDC_AUTO_CLK;
+}
 
 static void pwm_init(void) {
-    // Initial condition: no channels assigned
-    for (int i = 0; i < PWM_CHANNEL_MAX; ++i) {
-        chans[i].pin = -1;
-        chans[i].timer_idx = -1;
+    for (int mode = 0; mode < LEDC_SPEED_MODE_MAX; ++mode) {
+        // Initial condition: no channels assigned
+        for (int channel = 0; channel < LEDC_CHANNEL_MAX; ++channel) {
+            unregister_channel(mode, channel);
+        }
+        // Initial condition: no timers assigned
+        for (int timer = 0; timer < LEDC_TIMER_MAX; ++timer) {
+            unregister_timer(mode, timer);
+        }
     }
+}
 
-    // Prepare all timers config
-    // Initial condition: no timers assigned
-    for (int i = 0; i < PWM_TIMER_MAX; ++i) {
-        timers[i].duty_resolution = HIGHEST_PWM_RES;
-        // unset timer is -1
-        timers[i].freq_hz = -1;
-        timers[i].speed_mode = TIMER_IDX_TO_MODE(i);
-        timers[i].timer_num = TIMER_IDX_TO_TIMER(i);
-        timers[i].clk_cfg = LEDC_AUTO_CLK; // will reinstall later according to the EMPIRIC_FREQ
+// Returns true if the timer is in use in addition to current channel
+static bool is_timer_in_use(int mode, int current_channel, int timer) {
+    for (int channel = 0; channel < LEDC_CHANNEL_MAX; ++channel) {
+        if ((channel != current_channel) && (chans[mode][channel].timer == timer) && (chans[mode][channel].pin >= 0)) {
+            return true;
+        }
     }
+    return false;
 }
 
 // Deinit channel and timer if the timer is unused
-static void pwm_deinit(int channel_idx) {
-    // Valid channel?
-    if ((channel_idx >= 0) && (channel_idx < PWM_CHANNEL_MAX)) {
+static void pwm_deinit(int mode, int channel, int level) {
+    // Is valid channel?
+    if ((mode >= 0) && (mode < LEDC_SPEED_MODE_MAX) && (channel >= 0) && (channel < LEDC_CHANNEL_MAX)) {
         // Clean up timer if necessary
-        int timer_idx = chans[channel_idx].timer_idx;
-        if (timer_idx != -1) {
-            if (!is_timer_in_use(channel_idx, timer_idx)) {
-                check_esp_err(ledc_timer_rst(TIMER_IDX_TO_MODE(timer_idx), TIMER_IDX_TO_TIMER(timer_idx)));
-                // Flag it unused
-                timers[chans[channel_idx].timer_idx].freq_hz = -1;
+        int timer = chans[mode][channel].timer;
+        if (timer >= 0) {
+            if (!is_timer_in_use(mode, channel, timer)) {
+                check_esp_err(ledc_timer_pause(mode, timer));
+                ledc_timer_config_t ledc_timer = {
+                    .deconfigure = true,
+                    .speed_mode = mode,
+                    .timer_num = timer,
+                };
+                ledc_timer_config(&ledc_timer);
+                unregister_timer(mode, timer);
             }
         }
 
-        int pin = chans[channel_idx].pin;
-        if (pin != -1) {
-            int mode = CHANNEL_IDX_TO_MODE(channel_idx);
-            int channel = CHANNEL_IDX_TO_CHANNEL(channel_idx);
-            // Mark it unused, and tell the hardware to stop routing
-            check_esp_err(ledc_stop(mode, channel, 0));
-            // Disable ledc signal for the pin
-            // esp_rom_gpio_connect_out_signal(pin, SIG_GPIO_OUT_IDX, false, false);
-            if (mode == LEDC_LOW_SPEED_MODE) {
-                esp_rom_gpio_connect_out_signal(pin, LEDC_LS_SIG_OUT0_IDX + channel, false, true);
-            } else {
-                #if LEDC_SPEED_MODE_MAX > 1
-                #if CONFIG_IDF_TARGET_ESP32
-                esp_rom_gpio_connect_out_signal(pin, LEDC_HS_SIG_OUT0_IDX + channel, false, true);
-                #else
-                #error Add supported CONFIG_IDF_TARGET_ESP32_xxx
-                #endif
-                #endif
+        int pin = chans[mode][channel].pin;
+        if (pin >= 0) {
+            // Disable LEDC output, and set idle level
+            check_esp_err(ledc_stop(mode, channel, level));
+            if (chans[mode][channel].lightsleep) {
+                // Enable SLP_SEL to change GPIO status automantically in lightsleep.
+                check_esp_err(gpio_sleep_sel_en(pin));
+                chans[mode][channel].lightsleep = false;
             }
         }
-        chans[channel_idx].pin = -1;
-        chans[channel_idx].timer_idx = -1;
+        unregister_channel(mode, channel);
     }
 }
 
 // This called from Ctrl-D soft reboot
 void machine_pwm_deinit_all(void) {
     if (pwm_inited) {
-        for (int channel_idx = 0; channel_idx < PWM_CHANNEL_MAX; ++channel_idx) {
-            pwm_deinit(channel_idx);
+        for (int mode = 0; mode < LEDC_SPEED_MODE_MAX; ++mode) {
+            for (int channel = 0; channel < LEDC_CHANNEL_MAX; ++channel) {
+                pwm_deinit(mode, channel, 0);
+            }
         }
+        #if FADE
+        ledc_fade_func_uninstall();
+        #endif
         pwm_inited = false;
     }
 }
 
-static void configure_channel(machine_pwm_obj_t *self) {
-    ledc_channel_config_t cfg = {
-        .channel = self->channel,
-        .duty = (1 << (timers[TIMER_IDX(self->mode, self->timer)].duty_resolution)) / 2,
-        .gpio_num = self->pin,
-        .intr_type = LEDC_INTR_DISABLE,
-        .speed_mode = self->mode,
-        .timer_sel = self->timer,
-    };
-    if (ledc_channel_config(&cfg) != ESP_OK) {
-        mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("PWM not supported on Pin(%d)"), self->pin);
-    }
-}
-
-static void set_freq(machine_pwm_obj_t *self, unsigned int freq, ledc_timer_config_t *timer) {
-    esp_err_t err;
-    if (freq != timer->freq_hz) {
-        // Configure the new frequency and resolution
-        timer->freq_hz = freq;
-
-        #if SOC_LEDC_SUPPORT_PLL_DIV_CLOCK
-        timer->clk_cfg = LEDC_USE_PLL_DIV_CLK;
-        #elif SOC_LEDC_SUPPORT_APB_CLOCK
-        timer->clk_cfg = LEDC_USE_APB_CLK;
-        #elif SOC_LEDC_SUPPORT_XTAL_CLOCK
-        timer->clk_cfg = LEDC_USE_XTAL_CLK;
-        #else
-        #error No supported PWM / LEDC clocks.
-        #endif
-        #if SOC_LEDC_SUPPORT_REF_TICK
-        if (freq < EMPIRIC_FREQ) {
-            timer->clk_cfg = LEDC_USE_REF_TICK;
-        }
-        #endif
-        uint32_t src_clk_freq = 0;
-        err = esp_clk_tree_src_get_freq_hz(timer->clk_cfg, ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED, &src_clk_freq);
-        if (err != ESP_OK) {
-            mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("unable to query source clock frequency %d"), (int)timer->clk_cfg);
-        }
-
-        timer->duty_resolution = ledc_find_suitable_duty_resolution(src_clk_freq, timer->freq_hz);
-
-        // Set frequency
-        err = ledc_timer_config(timer);
-        if (err != ESP_OK) {
-            if (err == ESP_FAIL) {
-                mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("unreachable frequency %d"), freq);
-            } else {
-                check_esp_err(err);
-            }
-        }
-        // Reset the timer if low speed
-        if (self->mode == LEDC_LOW_SPEED_MODE) {
-            check_esp_err(ledc_timer_rst(self->mode, self->timer));
-        }
-    }
-
-    // Save the same duty cycle when frequency is changed
-    if (self->duty_x == HIGHEST_PWM_RES) {
-        set_duty_u16(self, self->duty_u16);
-    } else if (self->duty_x == PWM_RES_10_BIT) {
-        set_duty_u10(self, self->duty_u10);
-    } else if (self->duty_x == -HIGHEST_PWM_RES) {
-        set_duty_ns(self, self->duty_ns);
+static void pwm_is_active(machine_pwm_obj_t *self) {
+    if (self->timer < 0) {
+        mp_raise_msg(&mp_type_RuntimeError, MP_ERROR_TEXT("PWM is inactive"));
     }
 }
 
 // Calculate the duty parameters based on an ns value
 static int ns_to_duty(machine_pwm_obj_t *self, int ns) {
-    ledc_timer_config_t timer = timers[TIMER_IDX(self->mode, self->timer)];
-    int64_t duty = ((int64_t)ns * UI_MAX_DUTY * timer.freq_hz + 500000000LL) / 1000000000LL;
+    pwm_is_active(self);
+    int64_t duty = ((int64_t)ns * (int64_t)MAX_16_DUTY * self->freq + 500000000LL) / 1000000000LL;
     if ((ns > 0) && (duty == 0)) {
         duty = 1;
-    } else if (duty > UI_MAX_DUTY) {
-        duty = UI_MAX_DUTY;
+    } else if (duty > MAX_16_DUTY) {
+        duty = MAX_16_DUTY;
     }
     return duty;
 }
 
 static int duty_to_ns(machine_pwm_obj_t *self, int duty) {
-    ledc_timer_config_t timer = timers[TIMER_IDX(self->mode, self->timer)];
-    int64_t ns = ((int64_t)duty * 1000000000LL + (int64_t)timer.freq_hz * UI_MAX_DUTY / 2) / ((int64_t)timer.freq_hz * UI_MAX_DUTY);
-    return ns;
+    pwm_is_active(self);
+    return ((int64_t)duty * 1000000000LL + (int64_t)self->freq * (int64_t)(MAX_16_DUTY / 2)) / ((int64_t)self->freq * (int64_t)MAX_16_DUTY);
 }
 
-#define get_duty_raw(self) ledc_get_duty(self->mode, self->channel)
+// Reconfigure PWM pin output as input/output.
+static void reconfigure_pin(machine_pwm_obj_t *self) {
+    #if ESP_IDF_VERSION < ESP_IDF_VERSION_VAL(5, 4, 0)
+    // This allows to read the pin level.
+    gpio_set_direction(self->pin, GPIO_MODE_INPUT_OUTPUT);
+    #endif
+    esp_rom_gpio_connect_out_signal(self->pin, ledc_periph_signal[self->mode].sig_out0_idx + self->channel, self->output_invert, 0);
+}
 
-static void pwm_is_active(machine_pwm_obj_t *self) {
-    if (self->active == false) {
-        mp_raise_msg(&mp_type_RuntimeError, MP_ERROR_TEXT("PWM inactive"));
+static void apply_duty(machine_pwm_obj_t *self) {
+    pwm_is_active(self);
+
+    int duty = 0;
+    if (self->duty_scale == DUTY_16) {
+        duty = self->duty_ui;
+    } else if (self->duty_scale == DUTY_10) {
+        duty = self->duty_ui << (UI_RES_16_BIT - UI_RES_10_BIT);
+    } else if (self->duty_scale == DUTY_NS) {
+        duty = ns_to_duty(self, self->duty_ui);
+    }
+    self->channel_duty = duty >> (UI_RES_16_BIT - timers[self->mode][self->timer].duty_resolution);
+    if ((chans[self->mode][self->channel].pin == -1) || (self->output_invert_prev != self->output_invert)) {
+        self->output_invert_prev = self->output_invert;
+        // New PWM assignment
+        ledc_channel_config_t cfg = {
+            .channel = self->channel,
+            .duty = self->channel_duty,
+            .gpio_num = self->pin,
+            .intr_type = LEDC_INTR_DISABLE,
+            .speed_mode = self->mode,
+            .timer_sel = self->timer,
+            .hpoint = 0,
+            .flags.output_invert = self->output_invert,
+        };
+        check_esp_err(ledc_channel_config(&cfg));
+        reconfigure_pin(self);
+    } else {
+        #if FADE
+        check_esp_err(ledc_set_duty_and_update(self->mode, self->channel, self->channel_duty, 0));
+        #else
+        check_esp_err(ledc_set_duty(self->mode, self->channel, self->channel_duty));
+        check_esp_err(ledc_update_duty(self->mode, self->channel));
+        #endif
+    }
+    if (self->lightsleep) {
+        // Disable SLP_SEL to change GPIO status automantically in lightsleep.
+        check_esp_err(gpio_sleep_sel_dis(self->pin));
+        chans[self->mode][self->channel].lightsleep = true;
     }
+    register_channel(self->mode, self->channel, self->pin, self->timer);
+}
+
+static uint32_t find_suitable_duty_resolution(uint32_t src_clk_freq, uint32_t timer_freq) {
+    unsigned int resolution = ledc_find_suitable_duty_resolution(src_clk_freq, timer_freq);
+    if (resolution > UI_RES_16_BIT) {
+        // limit resolution to user interface
+        resolution = UI_RES_16_BIT;
+    }
+    // Note: On ESP32, ESP32S2, ESP32S3, ESP32C3, ESP32C2, ESP32C6, ESP32H2, ESP32P4, due to a hardware bug,
+    //       100% duty cycle (i.e. 2**duty_res) is not reachable when the binded timer selects the maximum duty
+    //       resolution. For example, the max duty resolution on ESP32C3 is 14-bit width, then set duty to (2**14)
+    //       will mess up the duty calculation in hardware.
+    // Reduce the resolution from 14 to 13 bits to resolve the hardware bug.
+    if (resolution >= SOC_LEDC_TIMER_BIT_WIDTH) {
+        resolution -= 1;
+    }
+    return resolution;
 }
 
 static uint32_t get_duty_u16(machine_pwm_obj_t *self) {
     pwm_is_active(self);
-    int resolution = timers[TIMER_IDX(self->mode, self->timer)].duty_resolution;
-    int duty = ledc_get_duty(self->mode, self->channel);
-    if (resolution <= UI_RES_16_BIT) {
-        duty <<= (UI_RES_16_BIT - resolution);
+    int duty = ledc_get_duty(self->mode, self->channel) << (UI_RES_16_BIT - timers[self->mode][self->timer].duty_resolution);
+    if (duty != MAX_16_DUTY) {
+        return duty;
     } else {
-        duty >>= (resolution - UI_RES_16_BIT);
+        return MAX_16_DUTY - 1;
     }
-    return duty;
 }
 
 static uint32_t get_duty_u10(machine_pwm_obj_t *self) {
-    pwm_is_active(self);
-    return get_duty_u16(self) >> 6; // Scale down from 16 bit to 10 bit resolution
+    // Scale down from 16 bit to 10 bit resolution
+    return get_duty_u16(self) >> (UI_RES_16_BIT - UI_RES_10_BIT);
 }
 
 static uint32_t get_duty_ns(machine_pwm_obj_t *self) {
-    pwm_is_active(self);
     return duty_to_ns(self, get_duty_u16(self));
 }
 
-static void set_duty_u16(machine_pwm_obj_t *self, int duty) {
-    pwm_is_active(self);
-    if ((duty < 0) || (duty > UI_MAX_DUTY)) {
-        mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("duty_u16 must be from 0 to %d"), UI_MAX_DUTY);
-    }
-    ledc_timer_config_t timer = timers[TIMER_IDX(self->mode, self->timer)];
-    int channel_duty;
-    if (timer.duty_resolution <= UI_RES_16_BIT) {
-        channel_duty = duty >> (UI_RES_16_BIT - timer.duty_resolution);
-    } else {
-        channel_duty = duty << (timer.duty_resolution - UI_RES_16_BIT);
+static void check_duty_u16(machine_pwm_obj_t *self, int duty) {
+    if ((duty < 0) || (duty > MAX_16_DUTY - 1)) {
+        mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("duty_u16 must be from 0 to %d"), MAX_16_DUTY);
     }
-    int max_duty = (1 << timer.duty_resolution) - 1;
-    if (channel_duty < 0) {
-        channel_duty = 0;
-    } else if (channel_duty > max_duty) {
-        channel_duty = max_duty;
+    if (duty == MAX_16_DUTY - 1) {
+        duty = MAX_16_DUTY;
     }
-    check_esp_err(ledc_set_duty(self->mode, self->channel, channel_duty));
-    check_esp_err(ledc_update_duty(self->mode, self->channel));
+    self->duty_scale = DUTY_16;
+    self->duty_ui = duty;
+}
 
-    /*
-    // Bug: Sometimes duty is not set right now.
-    // Not a bug. It's a feature. The duty is applied at the beginning of the next signal period.
-    // Bug: It has been experimentally established that the duty is set during 2 signal periods, but 1 period is expected.
-    // See https://github.com/espressif/esp-idf/issues/7288
-    if (duty != get_duty_u16(self)) {
-        PWM_DBG("set_duty_u16(%u), get_duty_u16():%u, channel_duty:%d, duty_resolution:%d, freq_hz:%d", duty, get_duty_u16(self), channel_duty, timer.duty_resolution, timer.freq_hz);
-        esp_rom_delay_us(2 * 1000000 / timer.freq_hz);
-        if (duty != get_duty_u16(self)) {
-            PWM_DBG("set_duty_u16(%u), get_duty_u16():%u, channel_duty:%d, duty_resolution:%d, freq_hz:%d", duty, get_duty_u16(self), channel_duty, timer.duty_resolution, timer.freq_hz);
-        }
-    }
-    */
+static void set_duty_u16(machine_pwm_obj_t *self, int duty) {
+    check_duty_u16(self, duty);
+    apply_duty(self);
+}
 
-    self->duty_x = HIGHEST_PWM_RES;
-    self->duty_u16 = duty;
+static void check_duty_u10(machine_pwm_obj_t *self, int duty) {
+    if ((duty < 0) || (duty > MAX_10_DUTY - 1)) {
+        mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("duty must be from 0 to %u"), MAX_10_DUTY - 1);
+    }
+    if (duty == MAX_10_DUTY - 1) {
+        duty = MAX_10_DUTY;
+    }
+    self->duty_scale = DUTY_10;
+    self->duty_ui = duty;
 }
 
 static void set_duty_u10(machine_pwm_obj_t *self, int duty) {
-    pwm_is_active(self);
-    if ((duty < 0) || (duty > MAX_DUTY_U10)) {
-        mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("duty must be from 0 to %u"), MAX_DUTY_U10);
+    check_duty_u10(self, duty);
+    apply_duty(self);
+}
+
+static void check_duty_ns(machine_pwm_obj_t *self, int ns) {
+    if ((ns < 0) || (ns > duty_to_ns(self, MAX_16_DUTY))) {
+        mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("duty_ns must be from 0 to %d ns"), duty_to_ns(self, MAX_16_DUTY));
     }
-    set_duty_u16(self, duty << (UI_RES_16_BIT - PWM_RES_10_BIT));
-    self->duty_x = PWM_RES_10_BIT;
-    self->duty_u10 = duty;
+    self->duty_scale = DUTY_NS;
+    self->duty_ui = ns;
 }
 
 static void set_duty_ns(machine_pwm_obj_t *self, int ns) {
-    pwm_is_active(self);
-    if ((ns < 0) || (ns > duty_to_ns(self, UI_MAX_DUTY))) {
-        mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("duty_ns must be from 0 to %d ns"), duty_to_ns(self, UI_MAX_DUTY));
+    check_duty_ns(self, ns);
+    apply_duty(self);
+}
+
+#if !(CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2)
+// This check if a clock is already set in the timer list, if yes, return the LEDC_XXX value
+static ledc_clk_cfg_t find_clock_in_use() {
+    for (int mode = 0; mode < LEDC_SPEED_MODE_MAX; ++mode) {
+        for (int timer = 0; timer < LEDC_TIMER_MAX; ++timer) {
+            if (timers[mode][timer].clk_cfg != LEDC_AUTO_CLK) {
+                return timers[mode][timer].clk_cfg;
+            }
+        }
     }
-    set_duty_u16(self, ns_to_duty(self, ns));
-    self->duty_x = -HIGHEST_PWM_RES;
-    self->duty_ns = ns;
+    return LEDC_AUTO_CLK;
 }
 
-/******************************************************************************/
+// Check if a timer is already set with a different clock source
+static bool is_timer_with_different_clock(int mode, int current_timer, ledc_clk_cfg_t clk_cfg) {
+    for (int timer = 0; timer < LEDC_TIMER_MAX; ++timer) {
+        if ((timer != current_timer) && (clk_cfg != LEDC_AUTO_CLK) && (timers[mode][timer].clk_cfg != LEDC_AUTO_CLK) && (timers[mode][timer].clk_cfg != clk_cfg)) {
+            return true;
+        }
+    }
+    return false;
+}
+#endif
 
-#define SAME_FREQ_ONLY (true)
-#define SAME_FREQ_OR_FREE (false)
-#define ANY_MODE (-1)
+static void check_freq_ranges(machine_pwm_obj_t *self, int freq, int upper_freq) {
+    if ((freq <= 0) || (freq > upper_freq)) {
+        mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("frequency must be from 1Hz to %dMHz"), upper_freq / 1000000);
+    }
+}
 
-// Return timer_idx. Use TIMER_IDX_TO_MODE(timer_idx) and TIMER_IDX_TO_TIMER(timer_idx) to get mode and timer
-static int find_timer(unsigned int freq, bool same_freq_only, int mode) {
-    int free_timer_idx_found = -1;
-    // Find a free PWM Timer using the same freq
-    for (int timer_idx = 0; timer_idx < PWM_TIMER_MAX; ++timer_idx) {
-        if ((mode == ANY_MODE) || (mode == TIMER_IDX_TO_MODE(timer_idx))) {
-            if (timers[timer_idx].freq_hz == freq) {
-                // A timer already uses the same freq. Use it now.
-                return timer_idx;
-            }
-            if (!same_freq_only && (free_timer_idx_found == -1) && (timers[timer_idx].freq_hz == -1)) {
-                free_timer_idx_found = timer_idx;
-                // Continue to check if a channel with the same freq is in use.
+// Set timer frequency
+static void set_freq(machine_pwm_obj_t *self, unsigned int freq) {
+    self->freq = freq;
+    if ((timers[self->mode][self->timer].freq != freq) || (self->lightsleep)) {
+        ledc_timer_config_t timer = {};
+        timer.speed_mode = self->mode;
+        timer.timer_num = self->timer;
+        timer.freq_hz = freq;
+        timer.deconfigure = false;
+
+        timer.clk_cfg = LEDC_AUTO_CLK;
+        #if !(CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2)
+        ledc_clk_cfg_t clk_cfg = find_clock_in_use();
+        if (clk_cfg != LEDC_AUTO_CLK) {
+            timer.clk_cfg = clk_cfg;
+        } else
+        #endif
+        if (self->lightsleep) {
+            timer.clk_cfg = LEDC_USE_RC_FAST_CLK; // 8 or 20 MHz
+        } else {
+            #if SOC_LEDC_SUPPORT_APB_CLOCK
+            timer.clk_cfg = LEDC_USE_APB_CLK; // 80 MHz
+            #elif SOC_LEDC_SUPPORT_PLL_DIV_CLOCK
+            timer.clk_cfg = LEDC_USE_PLL_DIV_CLK; // 60 or 80 or 96 MHz
+            #elif SOC_LEDC_SUPPORT_XTAL_CLOCK
+            timer.clk_cfg = LEDC_USE_XTAL_CLK; // 40 MHz
+            #else
+            #error No supported PWM / LEDC clocks.
+            #endif
+
+            #ifdef EMPIRIC_FREQ // ESP32 and ESP32S2 only
+            if (freq < EMPIRIC_FREQ) {
+                timer.clk_cfg = LEDC_USE_REF_TICK; // 1 MHz
             }
+            #endif
         }
-    }
+        #if !(CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2)
+        // Check for clock source conflict
+        clk_cfg = find_clock_in_use();
+        if ((clk_cfg != LEDC_AUTO_CLK) && (clk_cfg != timer.clk_cfg)) {
+            mp_raise_msg(&mp_type_RuntimeError, MP_ERROR_TEXT("one or more active timers use a different clock source, not supported by the current SoC."));
+        }
+        #endif
 
-    return free_timer_idx_found;
+        uint32_t src_clk_freq = 0;
+        check_esp_err(esp_clk_tree_src_get_freq_hz(timer.clk_cfg, ESP_CLK_TREE_SRC_FREQ_PRECISION_APPROX, &src_clk_freq));
+        // machine.freq(20_000_000) reduces APB_CLK_FREQ to 20MHz and the highest PWM frequency to 10MHz
+        check_freq_ranges(self, freq, src_clk_freq / 2);
+
+        // Configure the new resolution
+        timer.duty_resolution = find_suitable_duty_resolution(src_clk_freq, self->freq);
+        // Configure timer - Set frequency
+        if ((timers[self->mode][self->timer].duty_resolution == timer.duty_resolution) && (timers[self->mode][self->timer].clk_cfg == timer.clk_cfg)) {
+            check_esp_err(ledc_set_freq(self->mode, self->timer, freq));
+        } else {
+            check_esp_err(ledc_timer_config(&timer));
+        }
+        // Reset the timer if low speed
+        if (self->mode == LEDC_LOW_SPEED_MODE) {
+            check_esp_err(ledc_timer_rst(self->mode, self->timer));
+        }
+        timers[self->mode][self->timer].freq = freq;
+        timers[self->mode][self->timer].duty_resolution = timer.duty_resolution;
+        timers[self->mode][self->timer].clk_cfg = timer.clk_cfg;
+    }
 }
 
-// Return true if the timer is in use in addition to current channel
-static bool is_timer_in_use(int current_channel_idx, int timer_idx) {
-    for (int i = 0; i < PWM_CHANNEL_MAX; ++i) {
-        if ((i != current_channel_idx) && (chans[i].timer_idx == timer_idx)) {
+static bool is_free_channels(int mode, int pin) {
+    for (int channel = 0; channel < LEDC_CHANNEL_MAX; ++channel) {
+        if ((chans[mode][channel].pin < 0) || (chans[mode][channel].pin == pin)) {
             return true;
         }
     }
+    return false;
+}
 
+static bool is_free_timers(int mode, int32_t freq) {
+    for (int timer = 0; timer < LEDC_TIMER_MAX; ++timer) {
+        if ((timers[mode][timer].freq < 0) || (timers[mode][timer].freq == freq)) {
+            return true;
+        }
+    }
     return false;
 }
 
-// Find a free PWM channel, also spot if our pin is already mentioned.
-// Return channel_idx. Use CHANNEL_IDX_TO_MODE(channel_idx) and CHANNEL_IDX_TO_CHANNEL(channel_idx) to get mode and channel
-static int find_channel(int pin, int mode) {
-    int avail_idx = -1;
-    int channel_idx;
-    for (channel_idx = 0; channel_idx < PWM_CHANNEL_MAX; ++channel_idx) {
-        if ((mode == ANY_MODE) || (mode == CHANNEL_IDX_TO_MODE(channel_idx))) {
-            if (chans[channel_idx].pin == pin) {
-                break;
+// Find self channel or free channel
+static void find_channel(machine_pwm_obj_t *self, int *ret_mode, int *ret_channel, int32_t freq) {
+    // Try to find self channel first
+    for (int mode = 0; mode < LEDC_SPEED_MODE_MAX; ++mode) {
+        #if SOC_LEDC_SUPPORT_HS_MODE
+        if (self->lightsleep && (mode == LEDC_HIGH_SPEED_MODE)) {
+            continue;
+        }
+        #endif
+        for (int channel = 0; channel < LEDC_CHANNEL_MAX; ++channel) {
+            if (chans[mode][channel].pin == self->pin) {
+                *ret_mode = mode;
+                *ret_channel = channel;
+                return;
             }
-            if ((avail_idx == -1) && (chans[channel_idx].pin == -1)) {
-                avail_idx = channel_idx;
+        }
+    }
+    // Find free channel
+    for (int mode = 0; mode < LEDC_SPEED_MODE_MAX; ++mode) {
+        #if SOC_LEDC_SUPPORT_HS_MODE
+        if (self->lightsleep && (mode == LEDC_HIGH_SPEED_MODE)) {
+            continue;
+        }
+        #endif
+        for (int channel = 0; channel < LEDC_CHANNEL_MAX; ++channel) {
+            if ((chans[mode][channel].pin < 0) && is_free_timers(mode, freq)) {
+                *ret_mode = mode;
+                *ret_channel = channel;
+                return;
             }
         }
     }
-    if (channel_idx >= PWM_CHANNEL_MAX) {
-        channel_idx = avail_idx;
+}
+
+// Returns timer with the same frequency, freq == -1 means free timer
+static void find_timer(machine_pwm_obj_t *self, int freq, int *ret_mode, int *ret_timer) {
+    for (int mode = 0; mode < LEDC_SPEED_MODE_MAX; ++mode) {
+        #if SOC_LEDC_SUPPORT_HS_MODE
+        if (self->lightsleep && (mode == LEDC_HIGH_SPEED_MODE)) {
+            continue;
+        }
+        #endif
+        if (is_free_channels(mode, self->pin)) {
+            for (int timer = 0; timer < LEDC_TIMER_MAX; ++timer) {
+                if (timers[mode][timer].freq == freq) {
+                    *ret_mode = mode;
+                    *ret_timer = timer;
+                    return;
+                }
+            }
+        }
     }
-    return channel_idx;
 }
 
-/******************************************************************************/
+// Try to find a timer with the same frequency in the current mode, otherwise in the next mode.
+// If no existing timer and channel was found, then try to find free timer in any mode.
+// If the mode or channel is changed, release the channel and register a new channel in the next mode.
+static void select_timer(machine_pwm_obj_t *self, int freq) {
+    // mode, channel, timer may be -1(not defined) or actual values
+    int mode = -1;
+    int timer = -1;
+    // Check if an already running timer with the required frequency is running
+    find_timer(self, freq, &mode, &timer);
+    if (timer < 0) {
+        // Try to reuse self timer
+        if ((self->mode >= 0) && (self->channel >= 0)) {
+            if (!is_timer_in_use(self->mode, self->channel, self->timer)) {
+                mode = self->mode;
+                timer = self->timer;
+            }
+        }
+        // If no existing timer and channel was found, then try to find free timer in any mode
+        if (timer < 0) {
+            find_timer(self, -1, &mode, &timer);
+        }
+    }
+    if (timer < 0) {
+        mp_raise_msg_varg(&mp_type_RuntimeError, MP_ERROR_TEXT("out of %sPWM timers:%d"), self->lightsleep ? "light sleep capable " : "", self->lightsleep ? LEDC_TIMER_MAX : LEDC_SPEED_MODE_MAX *LEDC_TIMER_MAX);
+    }
+    // If the timer is found, then register
+    if (self->timer != timer) {
+        unregister_channel(self->mode, self->channel);
+        // Rregister the channel to the timer
+        self->mode = mode;
+        self->timer = timer;
+        register_channel(self->mode, self->channel, -1, self->timer);
+    }
+    #if !(CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2)
+    if (is_timer_with_different_clock(self->mode, self->timer, timers[self->mode][self->timer].clk_cfg)) {
+        mp_raise_msg(&mp_type_RuntimeError, MP_ERROR_TEXT("one or more active timers use a different clock source, not supported by the current SoC."));
+    }
+    #endif
+}
+
+static void set_freq_duty(machine_pwm_obj_t *self, unsigned int freq) {
+    select_timer(self, freq);
+    set_freq(self, freq);
+    apply_duty(self);
+}
+
+// ******************************************************************************
 // MicroPython bindings for PWM
 
 static void mp_machine_pwm_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
     machine_pwm_obj_t *self = MP_OBJ_TO_PTR(self_in);
     mp_printf(print, "PWM(Pin(%u)", self->pin);
-    if (self->active) {
+    if (self->timer >= 0) {
         mp_printf(print, ", freq=%u", ledc_get_freq(self->mode, self->timer));
-
-        if (self->duty_x == PWM_RES_10_BIT) {
+        if (self->duty_scale == DUTY_10) {
             mp_printf(print, ", duty=%d", get_duty_u10(self));
-        } else if (self->duty_x == -HIGHEST_PWM_RES) {
+        } else if (self->duty_scale == DUTY_NS) {
             mp_printf(print, ", duty_ns=%d", get_duty_ns(self));
         } else {
             mp_printf(print, ", duty_u16=%d", get_duty_u16(self));
         }
-        int resolution = timers[TIMER_IDX(self->mode, self->timer)].duty_resolution;
-        mp_printf(print, ", resolution=%d", resolution);
-
-        mp_printf(print, ", (duty=%.2f%%, resolution=%.3f%%)", 100.0 * get_duty_raw(self) / (1 << resolution), 100.0 * 1 / (1 << resolution)); // percents
-
-        mp_printf(print, ", mode=%d, channel=%d, timer=%d", self->mode, self->channel, self->timer);
+        if (self->output_invert) {
+            mp_printf(print, ", invert=True");
+        }
+        if (self->lightsleep) {
+            mp_printf(print, ", lightsleep=True");
+        }
+        mp_printf(print, ")");
+
+        #if MICROPY_ERROR_REPORTING > MICROPY_ERROR_REPORTING_NORMAL
+        mp_printf(print, "  # duty=%.2f%%", 100.0 * get_duty_u16(self) / MAX_16_DUTY);
+        mp_printf(print, ", raw_duty=%d, resolution=%d", ledc_get_duty(self->mode, self->channel), timers[self->mode][self->timer].duty_resolution);
+        mp_printf(print, ", mode=%d, timer=%d, channel=%d", self->mode, self->timer, self->channel);
+        int clk_cfg = timers[self->mode][self->timer].clk_cfg;
+        mp_printf(print, ", clk_cfg=%d=", clk_cfg);
+        if (clk_cfg == LEDC_USE_RC_FAST_CLK) {
+            mp_printf(print, "RC_FAST_CLK");
+        }
+        #if SOC_LEDC_SUPPORT_APB_CLOCK
+        else if (clk_cfg == LEDC_USE_APB_CLK) {
+            mp_printf(print, "APB_CLK");
+        }
+        #endif
+        #if SOC_LEDC_SUPPORT_XTAL_CLOCK
+        else if (clk_cfg == LEDC_USE_XTAL_CLK) {
+            mp_printf(print, "XTAL_CLK");
+        }
+        #endif
+        #if SOC_LEDC_SUPPORT_REF_TICK
+        else if (clk_cfg == LEDC_USE_REF_TICK) {
+            mp_printf(print, "REF_TICK");
+        }
+        #endif
+        #if SOC_LEDC_SUPPORT_PLL_DIV_CLOCK
+        else if (clk_cfg == LEDC_USE_PLL_DIV_CLK) {
+            mp_printf(print, "PLL_CLK");
+        }
+        #endif
+        else if (clk_cfg == LEDC_AUTO_CLK) {
+            mp_printf(print, "AUTO_CLK");
+        } else {
+            mp_printf(print, "UNKNOWN");
+        }
+        #endif
+    } else {
+        mp_printf(print, ")");
     }
-    mp_printf(print, ")");
 }
 
 // This called from pwm.init() method
+//
+// Check the current mode.
+// If the frequency is changed, try to find a timer with the same frequency
+// in the current mode, otherwise in the new mode.
+// If the mode is changed, release the channel and select a new channel in the new mode.
+// Then set the frequency with the same duty.
 static void mp_machine_pwm_init_helper(machine_pwm_obj_t *self,
     size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
-    enum { ARG_freq, ARG_duty, ARG_duty_u16, ARG_duty_ns };
-    static const mp_arg_t allowed_args[] = {
+
+    enum { ARG_freq, ARG_duty, ARG_duty_u16, ARG_duty_ns, ARG_invert, ARG_lightsleep };
+    mp_arg_t allowed_args[] = {
         { MP_QSTR_freq, MP_ARG_INT, {.u_int = -1} },
         { MP_QSTR_duty, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
         { MP_QSTR_duty_u16, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
         { MP_QSTR_duty_ns, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
+        { MP_QSTR_invert, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = self->output_invert} },
+        { MP_QSTR_lightsleep, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = self->lightsleep} },
     };
     mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
     mp_arg_parse_all(n_args, pos_args, kw_args,
         MP_ARRAY_SIZE(allowed_args), allowed_args, args);
 
-    int channel_idx = find_channel(self->pin, ANY_MODE);
-    if (channel_idx == -1) {
-        mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("out of PWM channels:%d"), PWM_CHANNEL_MAX); // in all modes
+    self->lightsleep = args[ARG_lightsleep].u_bool;
+
+    int freq = args[ARG_freq].u_int;
+    if (freq != -1) {
+        check_freq_ranges(self, freq, 40000000);
     }
 
     int duty = args[ARG_duty].u_int;
     int duty_u16 = args[ARG_duty_u16].u_int;
     int duty_ns = args[ARG_duty_ns].u_int;
-    if (((duty != -1) && (duty_u16 != -1)) || ((duty != -1) && (duty_ns != -1)) || ((duty_u16 != -1) && (duty_ns != -1))) {
-        mp_raise_ValueError(MP_ERROR_TEXT("only one of parameters 'duty', 'duty_u16' or 'duty_ns' is allowed"));
+    if (duty_u16 >= 0) {
+        check_duty_u16(self, duty_u16);
+    } else if (duty_ns >= 0) {
+        check_duty_ns(self, duty_ns);
+    } else if (duty >= 0) {
+        check_duty_u10(self, duty);
+    } else if (self->duty_scale == 0) {
+        self->duty_scale = DUTY_16;
+        self->duty_ui = PWM_DUTY;
+    }
+
+    self->output_invert = args[ARG_invert].u_bool;
+
+    // Check the current mode and channel
+    int mode = -1;
+    int channel = -1;
+    find_channel(self, &mode, &channel, freq);
+    if (channel < 0) {
+        mp_raise_msg_varg(&mp_type_RuntimeError, MP_ERROR_TEXT("out of %sPWM channels:%d"), self->lightsleep ? "light sleep capable " : "", self->lightsleep ? LEDC_CHANNEL_MAX : LEDC_SPEED_MODE_MAX *LEDC_CHANNEL_MAX);
     }
+    self->mode = mode;
+    self->channel = channel;
 
-    int freq = args[ARG_freq].u_int;
     // Check if freq wasn't passed as an argument
-    if (freq == -1) {
+    if ((freq == -1) && (mode >= 0) && (channel >= 0)) {
         // Check if already set, otherwise use the default freq.
         // It is possible in case:
         // pwm = PWM(pin, freq=1000, duty=256)
         // pwm = PWM(pin, duty=128)
-        if (chans[channel_idx].timer_idx != -1) {
-            freq = timers[chans[channel_idx].timer_idx].freq_hz;
+        if (chans[mode][channel].timer >= 0) {
+            freq = timers[mode][chans[mode][channel].timer].freq;
         }
         if (freq <= 0) {
             freq = PWM_FREQ;
         }
     }
-    if ((freq <= 0) || (freq > 40000000)) {
-        mp_raise_ValueError(MP_ERROR_TEXT("frequency must be from 1Hz to 40MHz"));
-    }
-
-    int timer_idx;
-    int current_timer_idx = chans[channel_idx].timer_idx;
-    bool current_in_use = is_timer_in_use(channel_idx, current_timer_idx);
-    if (current_in_use) {
-        timer_idx = find_timer(freq, SAME_FREQ_OR_FREE, CHANNEL_IDX_TO_MODE(channel_idx));
-    } else {
-        timer_idx = chans[channel_idx].timer_idx;
-    }
-
-    if (timer_idx == -1) {
-        timer_idx = find_timer(freq, SAME_FREQ_OR_FREE, ANY_MODE);
-    }
-    if (timer_idx == -1) {
-        mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("out of PWM timers:%d"), PWM_TIMER_MAX); // in all modes
-    }
-
-    int mode = TIMER_IDX_TO_MODE(timer_idx);
-    if (CHANNEL_IDX_TO_MODE(channel_idx) != mode) {
-        // unregister old channel
-        chans[channel_idx].pin = -1;
-        chans[channel_idx].timer_idx = -1;
-        // find new channel
-        channel_idx = find_channel(self->pin, mode);
-        if (CHANNEL_IDX_TO_MODE(channel_idx) != mode) {
-            mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("out of PWM channels:%d"), PWM_CHANNEL_MAX); // in current mode
-        }
-    }
-    self->mode = mode;
-    self->timer = TIMER_IDX_TO_TIMER(timer_idx);
-    self->channel = CHANNEL_IDX_TO_CHANNEL(channel_idx);
-
-    // New PWM assignment
-    if ((chans[channel_idx].pin == -1) || (chans[channel_idx].timer_idx != timer_idx)) {
-        configure_channel(self);
-        chans[channel_idx].pin = self->pin;
-    }
-    chans[channel_idx].timer_idx = timer_idx;
-    self->active = true;
-
-    // Set timer frequency
-    set_freq(self, freq, &timers[timer_idx]);
+    set_freq_duty(self, freq);
+}
 
-    // Set duty cycle?
-    if (duty_u16 != -1) {
-        set_duty_u16(self, duty_u16);
-    } else if (duty_ns != -1) {
-        set_duty_ns(self, duty_ns);
-    } else if (duty != -1) {
-        set_duty_u10(self, duty);
-    } else if (self->duty_x == 0) {
-        set_duty_u10(self, (1 << PWM_RES_10_BIT) / 2); // 50%
-    }
+static void self_reset(machine_pwm_obj_t *self) {
+    self->mode = -1;
+    self->channel = -1;
+    self->timer = -1;
+    self->freq = -1;
+    self->duty_scale = 0;
+    self->duty_ui = 0;
+    self->channel_duty = -1;
+    self->output_invert = false;
+    self->output_invert_prev = false;
+    self->lightsleep = false;
 }
 
 // This called from PWM() constructor
 static mp_obj_t mp_machine_pwm_make_new(const mp_obj_type_t *type,
     size_t n_args, size_t n_kw, const mp_obj_t *args) {
     mp_arg_check_num(n_args, n_kw, 1, 2, true);
-    gpio_num_t pin_id = machine_pin_get_id(args[0]);
-
-    // create PWM object from the given pin
-    machine_pwm_obj_t *self = mp_obj_malloc(machine_pwm_obj_t, &machine_pwm_type);
-    self->pin = pin_id;
-    self->active = false;
-    self->mode = -1;
-    self->channel = -1;
-    self->timer = -1;
-    self->duty_x = 0;
 
     // start the PWM subsystem if it's not already running
     if (!pwm_inited) {
         pwm_init();
+        #if FADE
+        ledc_fade_func_install(0);
+        #endif
         pwm_inited = true;
     }
 
-    // start the PWM running for this channel
+    // create PWM object from the given pin
+    machine_pwm_obj_t *self = mp_obj_malloc(machine_pwm_obj_t, &machine_pwm_type);
+    self_reset(self);
+
+    self->pin = machine_pin_get_id(args[0]);
+
+    // Process the remaining parameters.
     mp_map_t kw_args;
     mp_map_init_fixed_table(&kw_args, n_kw, args + n_args);
     mp_machine_pwm_init_helper(self, n_args - 1, args + 1, &kw_args);
-
     return MP_OBJ_FROM_PTR(self);
 }
 
 // This called from pwm.deinit() method
 static void mp_machine_pwm_deinit(machine_pwm_obj_t *self) {
-    int channel_idx = CHANNEL_IDX(self->mode, self->channel);
-    pwm_deinit(channel_idx);
-    self->active = false;
-    self->mode = -1;
-    self->channel = -1;
-    self->timer = -1;
-    self->duty_x = 0;
+    pwm_deinit(self->mode, self->channel, self->output_invert);
+    self_reset(self);
 }
 
 // Set and get methods of PWM class
@@ -602,51 +756,11 @@ static mp_obj_t mp_machine_pwm_freq_get(machine_pwm_obj_t *self) {
 
 static void mp_machine_pwm_freq_set(machine_pwm_obj_t *self, mp_int_t freq) {
     pwm_is_active(self);
-    if ((freq <= 0) || (freq > 40000000)) {
-        mp_raise_ValueError(MP_ERROR_TEXT("frequency must be from 1Hz to 40MHz"));
-    }
-    if (freq == timers[TIMER_IDX(self->mode, self->timer)].freq_hz) {
+    check_freq_ranges(self, freq, 40000000);
+    if (freq == timers[self->mode][self->timer].freq) {
         return;
     }
-
-    int current_timer_idx = chans[CHANNEL_IDX(self->mode, self->channel)].timer_idx;
-    bool current_in_use = is_timer_in_use(CHANNEL_IDX(self->mode, self->channel), current_timer_idx);
-
-    // Check if an already running timer with the same freq is running
-    int new_timer_idx = find_timer(freq, SAME_FREQ_ONLY, self->mode);
-
-    // If no existing timer was found, and the current one is in use, then find a new one
-    if ((new_timer_idx == -1) && current_in_use) {
-        // Have to find a new timer
-        new_timer_idx = find_timer(freq, SAME_FREQ_OR_FREE, self->mode);
-
-        if (new_timer_idx == -1) {
-            mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("out of PWM timers:%d"), PWM_TIMER_MAX); // in current mode
-        }
-    }
-
-    if ((new_timer_idx != -1) && (new_timer_idx != current_timer_idx)) {
-        // Bind the channel to the new timer
-        chans[self->channel].timer_idx = new_timer_idx;
-
-        if (ledc_bind_channel_timer(self->mode, self->channel, TIMER_IDX_TO_TIMER(new_timer_idx)) != ESP_OK) {
-            mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("failed to bind timer to channel"));
-        }
-
-        if (!current_in_use) {
-            // Free the old timer
-            check_esp_err(ledc_timer_rst(self->mode, self->timer));
-            // Flag it unused
-            timers[current_timer_idx].freq_hz = -1;
-        }
-
-        current_timer_idx = new_timer_idx;
-    }
-    self->mode = TIMER_IDX_TO_MODE(current_timer_idx);
-    self->timer = TIMER_IDX_TO_TIMER(current_timer_idx);
-
-    // Set the frequency
-    set_freq(self, freq, &timers[current_timer_idx]);
+    set_freq_duty(self, freq);
 }
 
 static mp_obj_t mp_machine_pwm_duty_get(machine_pwm_obj_t *self) {
diff --git a/ports/esp32/machine_sdcard.c b/ports/esp32/machine_sdcard.c
index da6b0df282caf..0f8bd844692b4 100644
--- a/ports/esp32/machine_sdcard.c
+++ b/ports/esp32/machine_sdcard.c
@@ -33,7 +33,9 @@
 
 #if MICROPY_HW_ENABLE_SDCARD
 
+#if SOC_SDMMC_HOST_SUPPORTED
 #include "driver/sdmmc_host.h"
+#endif
 #include "driver/sdspi_host.h"
 #include "sdmmc_cmd.h"
 #include "esp_log.h"
@@ -69,18 +71,34 @@ typedef struct _sdcard_obj_t {
 
 #define _SECTOR_SIZE(self) (self->card.csd.sector_size)
 
+// Number SPI buses available for firmware app (including for SD)
+#define NUM_SD_SPI_BUS (SOC_SPI_PERIPH_NUM - 1)
+
+#if CONFIG_IDF_TARGET_ESP32
+#define SD_SLOT_MIN 1
+#elif SOC_SDMMC_HOST_SUPPORTED
+#define SD_SLOT_MIN 0
+#else
+#define SD_SLOT_MIN 2
+#endif
+#define SD_SLOT_MAX (NUM_SD_SPI_BUS + 1) // Inclusive
+
 // SPI bus default bus and device configuration.
 
-static const spi_bus_config_t spi_bus_defaults[2] = {
+static const spi_bus_config_t spi_bus_defaults[NUM_SD_SPI_BUS] = {
     {
         #if CONFIG_IDF_TARGET_ESP32
         .miso_io_num = GPIO_NUM_19,
         .mosi_io_num = GPIO_NUM_23,
         .sclk_io_num = GPIO_NUM_18,
-        #else
+        #elif CONFIG_IDF_TARGET_ESP32S3
         .miso_io_num = GPIO_NUM_36,
         .mosi_io_num = GPIO_NUM_35,
         .sclk_io_num = GPIO_NUM_37,
+        #else
+        .miso_io_num = GPIO_NUM_NC,
+        .mosi_io_num = GPIO_NUM_NC,
+        .sclk_io_num = GPIO_NUM_NC,
         #endif
         .data2_io_num = GPIO_NUM_NC,
         .data3_io_num = GPIO_NUM_NC,
@@ -92,6 +110,7 @@ static const spi_bus_config_t spi_bus_defaults[2] = {
         .flags = SPICOMMON_BUSFLAG_MASTER | SPICOMMON_BUSFLAG_SCLK | SPICOMMON_BUSFLAG_MISO | SPICOMMON_BUSFLAG_MOSI,
         .intr_flags = 0,
     },
+    #if NUM_SD_SPI_BUS > 1
     {
         .miso_io_num = GPIO_NUM_2,
         .mosi_io_num = GPIO_NUM_15,
@@ -106,28 +125,34 @@ static const spi_bus_config_t spi_bus_defaults[2] = {
         .flags = SPICOMMON_BUSFLAG_MASTER | SPICOMMON_BUSFLAG_SCLK | SPICOMMON_BUSFLAG_MISO | SPICOMMON_BUSFLAG_MOSI,
         .intr_flags = 0,
     },
+    #endif
 };
 
 #if CONFIG_IDF_TARGET_ESP32
-static const uint8_t spi_dma_channel_defaults[2] = {
+static const uint8_t spi_dma_channel_defaults[NUM_SD_SPI_BUS] = {
     2,
     1,
 };
 #endif
 
-static const sdspi_device_config_t spi_dev_defaults[2] = {
+static const sdspi_device_config_t spi_dev_defaults[NUM_SD_SPI_BUS] = {
+    #if NUM_SD_SPI_BUS > 1
     {
         #if CONFIG_IDF_TARGET_ESP32
         .host_id = VSPI_HOST,
         .gpio_cs = GPIO_NUM_5,
-        #else
+        #elif CONFIG_IDF_TARGET_ESP32S3
         .host_id = SPI3_HOST,
         .gpio_cs = GPIO_NUM_34,
+        #else
+        .host_id = SPI3_HOST,
+        .gpio_cs = GPIO_NUM_NC,
         #endif
         .gpio_cd = SDSPI_SLOT_NO_CD,
         .gpio_wp = SDSPI_SLOT_NO_WP,
         .gpio_int = SDSPI_SLOT_NO_INT,
     },
+    #endif
     SDSPI_DEVICE_CONFIG_DEFAULT(), // HSPI (ESP32) / SPI2 (ESP32S3)
 };
 
@@ -159,12 +184,15 @@ static esp_err_t sdcard_ensure_card_init(sdcard_card_obj_t *self, bool force) {
 // Expose the SD card or MMC as an object with the block protocol.
 
 // Create a new SDCard object
-// The driver supports either the host SD/MMC controller (default) or SPI mode
-// In both cases there are two "slots". Slot 0 on the SD/MMC controller is
-// typically tied up with the flash interface in most ESP32 modules but in
-// theory supports 1, 4 or 8-bit transfers. Slot 1 supports only 1 and 4-bit
-// transfers. Only 1-bit is supported on the SPI interfaces.
-// card = SDCard(slot=1, width=None, present_pin=None, wp_pin=None)
+//
+// SD/MMC or SPI mode is determined by the slot argument
+// 0,1 is SD/MMC mode where supported.
+// 2,3 is SPI mode where supported (1-bit only)
+//
+// Original ESP32 can't use 0
+// ESP32-C3/C6/etc can only use 2 (only one SPI bus, no SD/MMC controller)
+//
+// Consult machine.SDCard docs for more details.
 
 static mp_obj_t machine_sdcard_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) {
     // check arguments
@@ -177,10 +205,19 @@ static mp_obj_t machine_sdcard_make_new(const mp_obj_type_t *type, size_t n_args
         ARG_mosi,
         ARG_sck,
         ARG_cs,
+        #if SOC_SDMMC_USE_GPIO_MATRIX
+        ARG_cmd,
+        ARG_data,
+        #endif
         ARG_freq,
     };
+    #if SOC_SDMMC_HOST_SUPPORTED
+    static const int DEFAULT_SLOT = 1;
+    #else
+    static const int DEFAULT_SLOT = SD_SLOT_MAX;
+    #endif
     static const mp_arg_t allowed_args[] = {
-        { MP_QSTR_slot,     MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 1} },
+        { MP_QSTR_slot,     MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = DEFAULT_SLOT} },
         { MP_QSTR_width,    MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 1} },
         { MP_QSTR_cd,       MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} },
         { MP_QSTR_wp,       MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} },
@@ -189,6 +226,11 @@ static mp_obj_t machine_sdcard_make_new(const mp_obj_type_t *type, size_t n_args
         { MP_QSTR_mosi,     MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} },
         { MP_QSTR_sck,      MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} },
         { MP_QSTR_cs,       MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} },
+        // Optional assignment of SDMMC interface pins, if host supports this
+        #if SOC_SDMMC_USE_GPIO_MATRIX
+        { MP_QSTR_cmd,      MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} },
+        { MP_QSTR_data,     MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} },
+        #endif
         // freq is valid for both SPI and SDMMC interfaces
         { MP_QSTR_freq,     MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 20000000} },
     };
@@ -211,16 +253,41 @@ static mp_obj_t machine_sdcard_make_new(const mp_obj_type_t *type, size_t n_args
         arg_vals[ARG_miso].u_obj, arg_vals[ARG_mosi].u_obj,
         arg_vals[ARG_sck].u_obj, arg_vals[ARG_cs].u_obj);
 
+    #if SOC_SDMMC_USE_GPIO_MATRIX
+    DEBUG_printf("  cmd=%p, data=%p",
+        arg_vals[ARG_cmd].u_obj, arg_vals[ARG_data].u_obj);
+    #endif
+
     int slot_num = arg_vals[ARG_slot].u_int;
-    if (slot_num < 0 || slot_num > 3) {
-        mp_raise_ValueError(MP_ERROR_TEXT("slot number must be between 0 and 3 inclusive"));
+    if (slot_num < SD_SLOT_MIN || slot_num > SD_SLOT_MAX) {
+        mp_raise_ValueError(MP_ERROR_TEXT("invalid slot number"));
     }
 
+    #if SOC_SDMMC_HOST_SUPPORTED
     // Slots 0 and 1 are native SD/MMC, slots 2 and 3 are SPI
     bool is_spi = (slot_num >= 2);
+    #else
+    bool is_spi = true;
+    #endif
     if (is_spi) {
         slot_num -= 2;
+        assert(slot_num < NUM_SD_SPI_BUS);
+    }
+
+    // Verify valid argument combinations
+    #if SOC_SDMMC_USE_GPIO_MATRIX
+    if (is_spi && (arg_vals[ARG_cmd].u_obj != mp_const_none
+                   || arg_vals[ARG_data].u_obj != mp_const_none)) {
+        mp_raise_ValueError(MP_ERROR_TEXT("invalid config: SPI slot with SDMMC pin arguments"));
     }
+    #endif
+    #if SOC_SDMMC_HOST_SUPPORTED
+    if (!is_spi && (arg_vals[ARG_miso].u_obj != mp_const_none
+                    || arg_vals[ARG_mosi].u_obj != mp_const_none
+                    || arg_vals[ARG_cs].u_obj != mp_const_none)) {
+        mp_raise_ValueError(MP_ERROR_TEXT("invalid config: SDMMC slot with SPI pin arguments"));
+    }
+    #endif
 
     DEBUG_printf("  Setting up host configuration");
 
@@ -232,21 +299,17 @@ static mp_obj_t machine_sdcard_make_new(const mp_obj_type_t *type, size_t n_args
     if (is_spi) {
         sdmmc_host_t _temp_host = SDSPI_HOST_DEFAULT();
         _temp_host.max_freq_khz = freq / 1000;
+        // SPI SDMMC sets the slot to the SPI host ID
+        _temp_host.slot = spi_dev_defaults[slot_num].host_id;
         self->host = _temp_host;
-    } else {
+    }
+    #if SOC_SDMMC_HOST_SUPPORTED
+    else {
         sdmmc_host_t _temp_host = SDMMC_HOST_DEFAULT();
         _temp_host.max_freq_khz = freq / 1000;
         self->host = _temp_host;
     }
-
-    if (is_spi) {
-        // Needs to match spi_dev_defaults above.
-        #if CONFIG_IDF_TARGET_ESP32
-        self->host.slot = slot_num ? HSPI_HOST : VSPI_HOST;
-        #else
-        self->host.slot = slot_num ? SPI2_HOST : SPI3_HOST;
-        #endif
-    }
+    #endif
 
     DEBUG_printf("  Calling host.init()");
 
@@ -273,6 +336,15 @@ static mp_obj_t machine_sdcard_make_new(const mp_obj_type_t *type, size_t n_args
         SET_CONFIG_PIN(dev_config, gpio_cd, ARG_cd);
         SET_CONFIG_PIN(dev_config, gpio_wp, ARG_wp);
 
+        // On chips other than original ESP32 and S3, there are not
+        // always default SPI pins assigned
+        if (dev_config.gpio_cs == GPIO_NUM_NC
+            || bus_config.miso_io_num == GPIO_NUM_NC
+            || bus_config.mosi_io_num == GPIO_NUM_NC
+            || bus_config.sclk_io_num == GPIO_NUM_NC) {
+            mp_raise_ValueError(MP_ERROR_TEXT("SPI pin values required"));
+        }
+
         DEBUG_printf("  Calling spi_bus_initialize()");
         check_esp_err(spi_bus_initialize(spi_host_id, &bus_config, dma_channel));
 
@@ -288,7 +360,9 @@ static mp_obj_t machine_sdcard_make_new(const mp_obj_type_t *type, size_t n_args
             spi_bus_free(spi_host_id);
             mp_raise_ValueError(MP_ERROR_TEXT("SPI bus already in use"));
         }
-    } else {
+    }
+    #if SOC_SDMMC_HOST_SUPPORTED
+    else {
         // SD/MMC interface
         DEBUG_printf("  Setting up SDMMC slot configuration");
         sdmmc_slot_config_t slot_config = SDMMC_SLOT_CONFIG_DEFAULT();
@@ -307,9 +381,36 @@ static mp_obj_t machine_sdcard_make_new(const mp_obj_type_t *type, size_t n_args
             mp_raise_ValueError(MP_ERROR_TEXT("width must be 1 or 4 (or 8 on slot 0)"));
         }
 
+        #if SOC_SDMMC_USE_GPIO_MATRIX
+        // Optionally configure all the SDMMC pins, if chip supports this
+        SET_CONFIG_PIN(slot_config, clk, ARG_sck); // reuse SPI SCK for CLK
+        SET_CONFIG_PIN(slot_config, cmd, ARG_cmd);
+        if (arg_vals[ARG_data].u_obj != mp_const_none) {
+            mp_obj_t *data_vals;
+            size_t data_len;
+            mp_obj_get_array(arg_vals[ARG_data].u_obj, &data_len, &data_vals);
+            if (data_len != width) {
+                mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("data argument length must match width %d"), width);
+            }
+            slot_config.d0 = machine_pin_get_id(data_vals[0]);
+            if (width > 1) {
+                slot_config.d1 = machine_pin_get_id(data_vals[1]);
+                slot_config.d2 = machine_pin_get_id(data_vals[2]);
+                slot_config.d3 = machine_pin_get_id(data_vals[3]);
+            }
+            if (width == 8) {
+                slot_config.d4 = machine_pin_get_id(data_vals[4]);
+                slot_config.d5 = machine_pin_get_id(data_vals[5]);
+                slot_config.d6 = machine_pin_get_id(data_vals[6]);
+                slot_config.d7 = machine_pin_get_id(data_vals[7]);
+            }
+        }
+        #endif
+
         DEBUG_printf("  Calling init_slot()");
         check_esp_err(sdmmc_host_init_slot(self->host.slot, &slot_config));
     }
+    #endif // SOC_SDMMC_HOST_SUPPORTED
 
     DEBUG_printf("  Returning new card object: %p", self);
     return MP_OBJ_FROM_PTR(self);
diff --git a/ports/esp32/machine_timer.c b/ports/esp32/machine_timer.c
index 82b432bbacddd..a104288f6ee3c 100644
--- a/ports/esp32/machine_timer.c
+++ b/ports/esp32/machine_timer.c
@@ -50,12 +50,13 @@
 const mp_obj_type_t machine_timer_type;
 
 static mp_obj_t machine_timer_init_helper(machine_timer_obj_t *self, mp_uint_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args);
+static mp_obj_t machine_timer_deinit(mp_obj_t self_in);
 
 void machine_timer_deinit_all(void) {
     // Disable, deallocate and remove all timers from list
     machine_timer_obj_t **t = &MP_STATE_PORT(machine_timer_obj_head);
     while (*t != NULL) {
-        machine_timer_disable(*t);
+        machine_timer_deinit(*t);
         machine_timer_obj_t *next = (*t)->next;
         m_del_obj(machine_timer_obj_t, *t);
         *t = next;
@@ -96,6 +97,7 @@ machine_timer_obj_t *machine_timer_create(mp_uint_t timer) {
         self = mp_obj_malloc(machine_timer_obj_t, &machine_timer_type);
         self->group = group;
         self->index = index;
+        self->handle = NULL;
 
         // Add the timer to the linked-list of timers
         self->next = MP_STATE_PORT(machine_timer_obj_head);
@@ -131,9 +133,8 @@ void machine_timer_disable(machine_timer_obj_t *self) {
     }
 
     if (self->handle) {
-        // Free the interrupt handler.
-        esp_intr_free(self->handle);
-        self->handle = NULL;
+        // Disable the interrupt
+        ESP_ERROR_CHECK(esp_intr_disable(self->handle));
     }
 
     // We let the disabled timer stay in the list, as it might be
@@ -150,12 +151,16 @@ static void machine_timer_isr(void *self_in) {
         if (self->repeat) {
             timer_ll_enable_alarm(self->hal_context.dev, self->index, true);
         }
-        mp_sched_schedule(self->callback, self);
-        mp_hal_wake_main_task_from_isr();
+        self->handler(self);
     }
 }
 
-void machine_timer_enable(machine_timer_obj_t *self, void (*timer_isr)) {
+static void machine_timer_isr_handler(machine_timer_obj_t *self) {
+    mp_sched_schedule(self->callback, self);
+    mp_hal_wake_main_task_from_isr();
+}
+
+void machine_timer_enable(machine_timer_obj_t *self) {
     // Initialise the timer.
     timer_hal_init(&self->hal_context, self->group, self->index);
     timer_ll_enable_counter(self->hal_context.dev, self->index, false);
@@ -167,10 +172,17 @@ void machine_timer_enable(machine_timer_obj_t *self, void (*timer_isr)) {
     // Allocate and enable the alarm interrupt.
     timer_ll_enable_intr(self->hal_context.dev, TIMER_LL_EVENT_ALARM(self->index), false);
     timer_ll_clear_intr_status(self->hal_context.dev, TIMER_LL_EVENT_ALARM(self->index));
-    ESP_ERROR_CHECK(
-        esp_intr_alloc(timer_group_periph_signals.groups[self->group].timer_irq_id[self->index],
-            TIMER_FLAGS, timer_isr, self, &self->handle)
-        );
+    if (self->handle) {
+        ESP_ERROR_CHECK(esp_intr_enable(self->handle));
+    } else {
+        ESP_ERROR_CHECK(esp_intr_alloc(
+            timer_group_periph_signals.groups[self->group].timer_irq_id[self->index],
+            TIMER_FLAGS,
+            machine_timer_isr,
+            self,
+            &self->handle
+            ));
+    }
     timer_ll_enable_intr(self->hal_context.dev, TIMER_LL_EVENT_ALARM(self->index), true);
 
     // Enable the alarm to trigger at the given period.
@@ -224,16 +236,22 @@ static mp_obj_t machine_timer_init_helper(machine_timer_obj_t *self, mp_uint_t n
     }
 
     self->repeat = args[ARG_mode].u_int;
+    self->handler = machine_timer_isr_handler;
     self->callback = args[ARG_callback].u_obj;
-    self->handle = NULL;
 
-    machine_timer_enable(self, machine_timer_isr);
+    machine_timer_enable(self);
 
     return mp_const_none;
 }
 
 static mp_obj_t machine_timer_deinit(mp_obj_t self_in) {
-    machine_timer_disable(self_in);
+    machine_timer_obj_t *self = self_in;
+
+    machine_timer_disable(self);
+    if (self->handle) {
+        ESP_ERROR_CHECK(esp_intr_free(self->handle));
+        self->handle = NULL;
+    }
 
     return mp_const_none;
 }
@@ -246,6 +264,9 @@ static MP_DEFINE_CONST_FUN_OBJ_KW(machine_timer_init_obj, 1, machine_timer_init)
 
 static mp_obj_t machine_timer_value(mp_obj_t self_in) {
     machine_timer_obj_t *self = self_in;
+    if (self->handle == NULL) {
+        mp_raise_ValueError(MP_ERROR_TEXT("timer not set"));
+    }
     uint64_t result = timer_ll_get_counter_value(self->hal_context.dev, self->index);
     return MP_OBJ_NEW_SMALL_INT((mp_uint_t)(result / (TIMER_SCALE / 1000))); // value in ms
 }
diff --git a/ports/esp32/machine_timer.h b/ports/esp32/machine_timer.h
index 914bedd86baa9..10fe2f39c90ae 100644
--- a/ports/esp32/machine_timer.h
+++ b/ports/esp32/machine_timer.h
@@ -55,12 +55,13 @@ typedef struct _machine_timer_obj_t {
     mp_obj_t callback;
 
     intr_handle_t handle;
+    void (*handler)(struct _machine_timer_obj_t *timer);
 
     struct _machine_timer_obj_t *next;
 } machine_timer_obj_t;
 
 machine_timer_obj_t *machine_timer_create(mp_uint_t timer);
-void machine_timer_enable(machine_timer_obj_t *self, void (*timer_isr));
+void machine_timer_enable(machine_timer_obj_t *self);
 void machine_timer_disable(machine_timer_obj_t *self);
 
 #endif // MICROPY_INCLUDED_ESP32_MACHINE_TIMER_H
diff --git a/ports/esp32/machine_uart.c b/ports/esp32/machine_uart.c
index 73089ef463681..982d9a7e27aed 100644
--- a/ports/esp32/machine_uart.c
+++ b/ports/esp32/machine_uart.c
@@ -59,6 +59,7 @@
 #define UART_IRQ_BREAK (1 << UART_BREAK)
 #define MP_UART_ALLOWED_FLAGS (UART_IRQ_RX | UART_IRQ_RXIDLE | UART_IRQ_BREAK)
 #define RXIDLE_TIMER_MIN (5000)  // 500 us
+#define UART_QUEUE_SIZE (3)
 
 enum {
     RXIDLE_INACTIVE,
@@ -109,30 +110,19 @@ static const char *_parity_name[] = {"None", "1", "0"};
     { MP_ROM_QSTR(MP_QSTR_IRQ_RXIDLE), MP_ROM_INT(UART_IRQ_RXIDLE) }, \
     { MP_ROM_QSTR(MP_QSTR_IRQ_BREAK), MP_ROM_INT(UART_IRQ_BREAK) }, \
 
-static void uart_timer_callback(void *self_in) {
-    machine_timer_obj_t *self = self_in;
-
-    uint32_t intr_status = timer_ll_get_intr_status(self->hal_context.dev);
-
-    if (intr_status & TIMER_LL_EVENT_ALARM(self->index)) {
-        timer_ll_clear_intr_status(self->hal_context.dev, TIMER_LL_EVENT_ALARM(self->index));
-        if (self->repeat) {
-            timer_ll_enable_alarm(self->hal_context.dev, self->index, true);
-        }
-    }
-
+static void uart_timer_callback(machine_timer_obj_t *timer) {
     // The UART object is referred here by the callback field.
-    machine_uart_obj_t *uart = (machine_uart_obj_t *)self->callback;
-    if (uart->rxidle_state == RXIDLE_ALERT) {
+    machine_uart_obj_t *self = (machine_uart_obj_t *)timer->callback;
+    if (self->rxidle_state == RXIDLE_ALERT) {
         // At the first call, just switch the state
-        uart->rxidle_state = RXIDLE_ARMED;
-    } else if (uart->rxidle_state == RXIDLE_ARMED) {
+        self->rxidle_state = RXIDLE_ARMED;
+    } else if (self->rxidle_state == RXIDLE_ARMED) {
         // At the second call, run the irq callback and stop the timer
-        uart->rxidle_state = RXIDLE_STANDBY;
-        uart->mp_irq_flags = UART_IRQ_RXIDLE;
-        mp_irq_handler(uart->mp_irq_obj);
+        self->rxidle_state = RXIDLE_STANDBY;
+        self->mp_irq_flags = UART_IRQ_RXIDLE;
+        mp_irq_handler(self->mp_irq_obj);
         mp_hal_wake_main_task_from_isr();
-        machine_timer_disable(uart->rxidle_timer);
+        machine_timer_disable(self->rxidle_timer);
     }
 }
 
@@ -149,9 +139,7 @@ static void uart_event_task(void *self_in) {
                     if (self->mp_irq_trigger & UART_IRQ_RXIDLE) {
                         if (self->rxidle_state != RXIDLE_INACTIVE) {
                             if (self->rxidle_state == RXIDLE_STANDBY) {
-                                self->rxidle_timer->repeat = true;
-                                self->rxidle_timer->handle = NULL;
-                                machine_timer_enable(self->rxidle_timer, uart_timer_callback);
+                                machine_timer_enable(self->rxidle_timer);
                             }
                         }
                         self->rxidle_state = RXIDLE_ALERT;
@@ -174,6 +162,13 @@ static void uart_event_task(void *self_in) {
     }
 }
 
+static inline void uart_event_task_create(machine_uart_obj_t *self) {
+    if (xTaskCreatePinnedToCore(uart_event_task, "uart_event_task", 2048, self,
+        ESP_TASKD_EVENT_PRIO, (TaskHandle_t *)&self->uart_event_task, MP_TASK_COREID) != pdPASS) {
+        mp_raise_msg(&mp_type_RuntimeError, MP_ERROR_TEXT("failed to create UART event task"));
+    }
+}
+
 static void mp_machine_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
     machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
     uint32_t baudrate;
@@ -250,7 +245,7 @@ static void mp_machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args,
     // wait for all data to be transmitted before changing settings
     uart_wait_tx_done(self->uart_num, pdMS_TO_TICKS(1000));
 
-    if (args[ARG_txbuf].u_int >= 0 || args[ARG_rxbuf].u_int >= 0) {
+    if ((args[ARG_txbuf].u_int >= 0 && args[ARG_txbuf].u_int != self->txbuf) || (args[ARG_rxbuf].u_int >= 0 && args[ARG_rxbuf].u_int != self->rxbuf)) {
         // must reinitialise driver to change the tx/rx buffer size
         #if MICROPY_HW_ENABLE_UART_REPL
         if (self->uart_num == MICROPY_HW_UART_REPL) {
@@ -275,9 +270,12 @@ static void mp_machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args,
         check_esp_err(uart_get_word_length(self->uart_num, &uartcfg.data_bits));
         check_esp_err(uart_get_parity(self->uart_num, &uartcfg.parity));
         check_esp_err(uart_get_stop_bits(self->uart_num, &uartcfg.stop_bits));
-        check_esp_err(uart_driver_delete(self->uart_num));
+        mp_machine_uart_deinit(self);
         check_esp_err(uart_param_config(self->uart_num, &uartcfg));
-        check_esp_err(uart_driver_install(self->uart_num, self->rxbuf, self->txbuf, 0, NULL, 0));
+        check_esp_err(uart_driver_install(self->uart_num, self->rxbuf, self->txbuf, UART_QUEUE_SIZE, &self->uart_queue, 0));
+        if (self->mp_irq_obj != NULL && self->mp_irq_obj->handler != mp_const_none) {
+            uart_event_task_create(self);
+        }
     }
 
     // set baudrate
@@ -437,7 +435,8 @@ static mp_obj_t mp_machine_uart_make_new(const mp_obj_type_t *type, size_t n_arg
     self->timeout_char = 0;
     self->invert = 0;
     self->flowcontrol = 0;
-    self->uart_event_task = 0;
+    self->uart_event_task = NULL;
+    self->uart_queue = NULL;
     self->rxidle_state = RXIDLE_INACTIVE;
 
     switch (uart_num) {
@@ -470,12 +469,13 @@ static mp_obj_t mp_machine_uart_make_new(const mp_obj_type_t *type, size_t n_arg
     {
         // Remove any existing configuration
         check_esp_err(uart_driver_delete(self->uart_num));
+        self->uart_queue = NULL;
 
         // init the peripheral
         // Setup
         check_esp_err(uart_param_config(self->uart_num, &uartcfg));
 
-        check_esp_err(uart_driver_install(uart_num, self->rxbuf, self->txbuf, 3, &self->uart_queue, 0));
+        check_esp_err(uart_driver_install(uart_num, self->rxbuf, self->txbuf, UART_QUEUE_SIZE, &self->uart_queue, 0));
     }
 
     mp_map_t kw_args;
@@ -489,7 +489,12 @@ static mp_obj_t mp_machine_uart_make_new(const mp_obj_type_t *type, size_t n_arg
 }
 
 static void mp_machine_uart_deinit(machine_uart_obj_t *self) {
+    if (self->uart_event_task != NULL) {
+        vTaskDelete(self->uart_event_task);
+        self->uart_event_task = NULL;
+    }
     check_esp_err(uart_driver_delete(self->uart_num));
+    self->uart_queue = NULL;
 }
 
 static mp_int_t mp_machine_uart_any(machine_uart_obj_t *self) {
@@ -535,11 +540,11 @@ static void uart_irq_configure_timer(machine_uart_obj_t *self, mp_uint_t trigger
         }
         self->rxidle_period = period;
         self->rxidle_timer->period = period;
+        self->rxidle_timer->handler = uart_timer_callback;
         // The Python callback is not used. So use this
         // data field to hold a reference to the UART object.
         self->rxidle_timer->callback = self;
         self->rxidle_timer->repeat = true;
-        self->rxidle_timer->handle = NULL;
         self->rxidle_state = RXIDLE_STANDBY;
     }
 }
@@ -568,6 +573,12 @@ static const mp_irq_methods_t uart_irq_methods = {
 };
 
 static mp_irq_obj_t *mp_machine_uart_irq(machine_uart_obj_t *self, bool any_args, mp_arg_val_t *args) {
+    #if MICROPY_HW_ENABLE_UART_REPL
+    if (self->uart_num == MICROPY_HW_UART_REPL) {
+        mp_raise_ValueError(MP_ERROR_TEXT("UART does not support IRQs"));
+    }
+    #endif
+
     if (self->mp_irq_obj == NULL) {
         self->mp_irq_trigger = 0;
         self->mp_irq_obj = mp_irq_new(&uart_irq_methods, MP_OBJ_FROM_PTR(self));
@@ -597,9 +608,8 @@ static mp_irq_obj_t *mp_machine_uart_irq(machine_uart_obj_t *self, bool any_args
         uart_irq_configure_timer(self, trigger);
 
         // Start a task for handling events
-        if (handler != mp_const_none && self->uart_event_task == NULL) {
-            xTaskCreatePinnedToCore(uart_event_task, "uart_event_task", 2048, self,
-                ESP_TASKD_EVENT_PRIO, (TaskHandle_t *)&self->uart_event_task, MP_TASK_COREID);
+        if (handler != mp_const_none && self->uart_event_task == NULL && self->uart_queue != NULL) {
+            uart_event_task_create(self);
         } else if (handler == mp_const_none && self->uart_event_task != NULL) {
             vTaskDelete(self->uart_event_task);
             self->uart_event_task = NULL;
diff --git a/ports/esp32/main.c b/ports/esp32/main.c
index 4f0c27ee078f8..b8f49a33baaee 100644
--- a/ports/esp32/main.c
+++ b/ports/esp32/main.c
@@ -216,7 +216,7 @@ void boardctrl_startup(void) {
     }
 }
 
-void app_main(void) {
+void MICROPY_ESP_IDF_ENTRY(void) {
     // Hook for a board to run code at start up.
     // This defaults to initialising NVS.
     MICROPY_BOARD_STARTUP();
@@ -225,7 +225,7 @@ void app_main(void) {
     xTaskCreatePinnedToCore(mp_task, "mp_task", MICROPY_TASK_STACK_SIZE / sizeof(StackType_t), NULL, MP_TASK_PRIORITY, &mp_main_task_handle, MP_TASK_COREID);
 }
 
-void nlr_jump_fail(void *val) {
+MP_WEAK void nlr_jump_fail(void *val) {
     printf("NLR jump failed, val=%p\n", val);
     esp_restart();
 }
diff --git a/ports/esp32/main_esp32/CMakeLists.txt b/ports/esp32/main/CMakeLists.txt
similarity index 100%
rename from ports/esp32/main_esp32/CMakeLists.txt
rename to ports/esp32/main/CMakeLists.txt
diff --git a/ports/esp32/main/idf_component.yml b/ports/esp32/main/idf_component.yml
new file mode 100644
index 0000000000000..f7773f4f4e472
--- /dev/null
+++ b/ports/esp32/main/idf_component.yml
@@ -0,0 +1,14 @@
+## IDF Component Manager Manifest File
+dependencies:
+  espressif/mdns: "~1.1.0"
+  espressif/esp_tinyusb:
+    rules:
+      - if: "target in [esp32s2, esp32s3]"
+    version: "~1.0.0"
+  espressif/lan867x:
+    version: "~1.0.0"
+    rules:
+      - if: "target == esp32"
+      - if: "idf_version >=5.3"
+  idf:
+    version: ">=5.2.0"
diff --git a/ports/esp32/main_esp32/idf_component.yml b/ports/esp32/main_esp32/idf_component.yml
deleted file mode 100644
index 11f078f69f761..0000000000000
--- a/ports/esp32/main_esp32/idf_component.yml
+++ /dev/null
@@ -1,5 +0,0 @@
-## IDF Component Manager Manifest File
-dependencies:
-  espressif/mdns: "~1.1.0"
-  idf:
-    version: ">=5.2.0"
diff --git a/ports/esp32/main_esp32/linker.lf b/ports/esp32/main_esp32/linker.lf
deleted file mode 100644
index e00cd63f5548d..0000000000000
--- a/ports/esp32/main_esp32/linker.lf
+++ /dev/null
@@ -1,39 +0,0 @@
-# This fixes components/esp_ringbuf/linker.lf to allow us to put non-ISR ringbuf functions in flash.
-
-# Requires that both RINGBUF_PLACE_FUNCTIONS_INTO_FLASH and RINGBUF_PLACE_ISR_FUNCTIONS_INTO_FLASH
-# are set to "n" (which is the default), otherwise this would result in duplicate section config
-# when resolving the linker fragments.
-
-# The effect of this file is to leave the ISR functions in RAM (which we require), but apply a fixed
-# version of RINGBUF_PLACE_FUNCTIONS_INTO_FLASH=y (leaving out prvGetFreeSize and prvGetCurMaxSizeByteBuf)
-# See https://github.com/espressif/esp-idf/issues/13378
-
-[mapping:esp_ringbuf_fix]
-archive: libesp_ringbuf.a
-entries:
-    # This is exactly the list of functions from RINGBUF_PLACE_FUNCTIONS_INTO_FLASH=y,
-    # but with prvGetFreeSize and prvGetCurMaxSizeByteBuf removed.
-    ringbuf: prvGetCurMaxSizeNoSplit (default)
-    ringbuf: prvGetCurMaxSizeAllowSplit (default)
-    ringbuf: prvInitializeNewRingbuffer (default)
-    ringbuf: prvReceiveGeneric (default)
-    ringbuf: vRingbufferDelete (default)
-    ringbuf: vRingbufferGetInfo (default)
-    ringbuf: vRingbufferReturnItem (default)
-    ringbuf: xRingbufferAddToQueueSetRead (default)
-    ringbuf: xRingbufferCanRead (default)
-    ringbuf: xRingbufferCreate (default)
-    ringbuf: xRingbufferCreateStatic (default)
-    ringbuf: xRingbufferCreateNoSplit (default)
-    ringbuf: xRingbufferReceive (default)
-    ringbuf: xRingbufferReceiveSplit (default)
-    ringbuf: xRingbufferReceiveUpTo (default)
-    ringbuf: xRingbufferRemoveFromQueueSetRead (default)
-    ringbuf: xRingbufferSend (default)
-    ringbuf: xRingbufferSendAcquire (default)
-    ringbuf: xRingbufferSendComplete (default)
-    ringbuf: xRingbufferPrintInfo (default)
-    ringbuf: xRingbufferGetMaxItemSize (default)
-    ringbuf: xRingbufferGetCurFreeSize (default)
-
-    # Everything else will have the default rule already applied (i.e. noflash_text).
diff --git a/ports/esp32/main_esp32c3/CMakeLists.txt b/ports/esp32/main_esp32c3/CMakeLists.txt
deleted file mode 100644
index 307c0f32183a9..0000000000000
--- a/ports/esp32/main_esp32c3/CMakeLists.txt
+++ /dev/null
@@ -1,14 +0,0 @@
-# Set location of base MicroPython directory.
-if(NOT MICROPY_DIR)
-    get_filename_component(MICROPY_DIR ${CMAKE_CURRENT_LIST_DIR}/../../.. ABSOLUTE)
-endif()
-
-# Set location of the ESP32 port directory.
-if(NOT MICROPY_PORT_DIR)
-    get_filename_component(MICROPY_PORT_DIR ${MICROPY_DIR}/ports/esp32 ABSOLUTE)
-endif()
-
-list(APPEND MICROPY_SOURCE_LIB ${MICROPY_DIR}/shared/runtime/gchelper_generic.c)
-list(APPEND IDF_COMPONENTS riscv)
-
-include(${MICROPY_PORT_DIR}/esp32_common.cmake)
diff --git a/ports/esp32/main_esp32c3/idf_component.yml b/ports/esp32/main_esp32c3/idf_component.yml
deleted file mode 100644
index 11f078f69f761..0000000000000
--- a/ports/esp32/main_esp32c3/idf_component.yml
+++ /dev/null
@@ -1,5 +0,0 @@
-## IDF Component Manager Manifest File
-dependencies:
-  espressif/mdns: "~1.1.0"
-  idf:
-    version: ">=5.2.0"
diff --git a/ports/esp32/main_esp32c3/linker.lf b/ports/esp32/main_esp32c3/linker.lf
deleted file mode 100644
index 31c5b4563ca9a..0000000000000
--- a/ports/esp32/main_esp32c3/linker.lf
+++ /dev/null
@@ -1 +0,0 @@
-# Empty linker fragment (no workaround required for C3, see main_esp32/linker.lf).
diff --git a/ports/esp32/main_esp32c6/CMakeLists.txt b/ports/esp32/main_esp32c6/CMakeLists.txt
deleted file mode 100644
index 307c0f32183a9..0000000000000
--- a/ports/esp32/main_esp32c6/CMakeLists.txt
+++ /dev/null
@@ -1,14 +0,0 @@
-# Set location of base MicroPython directory.
-if(NOT MICROPY_DIR)
-    get_filename_component(MICROPY_DIR ${CMAKE_CURRENT_LIST_DIR}/../../.. ABSOLUTE)
-endif()
-
-# Set location of the ESP32 port directory.
-if(NOT MICROPY_PORT_DIR)
-    get_filename_component(MICROPY_PORT_DIR ${MICROPY_DIR}/ports/esp32 ABSOLUTE)
-endif()
-
-list(APPEND MICROPY_SOURCE_LIB ${MICROPY_DIR}/shared/runtime/gchelper_generic.c)
-list(APPEND IDF_COMPONENTS riscv)
-
-include(${MICROPY_PORT_DIR}/esp32_common.cmake)
diff --git a/ports/esp32/main_esp32c6/idf_component.yml b/ports/esp32/main_esp32c6/idf_component.yml
deleted file mode 100644
index 11f078f69f761..0000000000000
--- a/ports/esp32/main_esp32c6/idf_component.yml
+++ /dev/null
@@ -1,5 +0,0 @@
-## IDF Component Manager Manifest File
-dependencies:
-  espressif/mdns: "~1.1.0"
-  idf:
-    version: ">=5.2.0"
diff --git a/ports/esp32/main_esp32c6/linker.lf b/ports/esp32/main_esp32c6/linker.lf
deleted file mode 100644
index cedabcf979350..0000000000000
--- a/ports/esp32/main_esp32c6/linker.lf
+++ /dev/null
@@ -1 +0,0 @@
-# Empty linker fragment (no workaround required for C6, see main_esp32/linker.lf).
diff --git a/ports/esp32/main_esp32s2/CMakeLists.txt b/ports/esp32/main_esp32s2/CMakeLists.txt
deleted file mode 100644
index bc5ab939c3ce3..0000000000000
--- a/ports/esp32/main_esp32s2/CMakeLists.txt
+++ /dev/null
@@ -1,13 +0,0 @@
-# Set location of base MicroPython directory.
-if(NOT MICROPY_DIR)
-    get_filename_component(MICROPY_DIR ${CMAKE_CURRENT_LIST_DIR}/../../.. ABSOLUTE)
-endif()
-
-# Set location of the ESP32 port directory.
-if(NOT MICROPY_PORT_DIR)
-    get_filename_component(MICROPY_PORT_DIR ${MICROPY_DIR}/ports/esp32 ABSOLUTE)
-endif()
-
-set(MICROPY_PY_TINYUSB ON)
-
-include(${MICROPY_PORT_DIR}/esp32_common.cmake)
diff --git a/ports/esp32/main_esp32s2/idf_component.yml b/ports/esp32/main_esp32s2/idf_component.yml
deleted file mode 100644
index 2ee00b287786b..0000000000000
--- a/ports/esp32/main_esp32s2/idf_component.yml
+++ /dev/null
@@ -1,6 +0,0 @@
-## IDF Component Manager Manifest File
-dependencies:
-  espressif/mdns: "~1.1.0"
-  espressif/esp_tinyusb: "~1.0.0"
-  idf:
-    version: ">=5.2.0"
diff --git a/ports/esp32/main_esp32s2/linker.lf b/ports/esp32/main_esp32s2/linker.lf
deleted file mode 100644
index 3c496fa878b3f..0000000000000
--- a/ports/esp32/main_esp32s2/linker.lf
+++ /dev/null
@@ -1 +0,0 @@
-# Empty linker fragment (no workaround required for S2, see main_esp32/linker.lf).
diff --git a/ports/esp32/main_esp32s3/CMakeLists.txt b/ports/esp32/main_esp32s3/CMakeLists.txt
deleted file mode 100644
index bc5ab939c3ce3..0000000000000
--- a/ports/esp32/main_esp32s3/CMakeLists.txt
+++ /dev/null
@@ -1,13 +0,0 @@
-# Set location of base MicroPython directory.
-if(NOT MICROPY_DIR)
-    get_filename_component(MICROPY_DIR ${CMAKE_CURRENT_LIST_DIR}/../../.. ABSOLUTE)
-endif()
-
-# Set location of the ESP32 port directory.
-if(NOT MICROPY_PORT_DIR)
-    get_filename_component(MICROPY_PORT_DIR ${MICROPY_DIR}/ports/esp32 ABSOLUTE)
-endif()
-
-set(MICROPY_PY_TINYUSB ON)
-
-include(${MICROPY_PORT_DIR}/esp32_common.cmake)
diff --git a/ports/esp32/main_esp32s3/idf_component.yml b/ports/esp32/main_esp32s3/idf_component.yml
deleted file mode 100644
index 2ee00b287786b..0000000000000
--- a/ports/esp32/main_esp32s3/idf_component.yml
+++ /dev/null
@@ -1,6 +0,0 @@
-## IDF Component Manager Manifest File
-dependencies:
-  espressif/mdns: "~1.1.0"
-  espressif/esp_tinyusb: "~1.0.0"
-  idf:
-    version: ">=5.2.0"
diff --git a/ports/esp32/main_esp32s3/linker.lf b/ports/esp32/main_esp32s3/linker.lf
deleted file mode 100644
index 81d27906be0e4..0000000000000
--- a/ports/esp32/main_esp32s3/linker.lf
+++ /dev/null
@@ -1 +0,0 @@
-# Empty linker fragment (no workaround required for S3, see main_esp32/linker.lf).
diff --git a/ports/esp32/memory.h b/ports/esp32/memory.h
deleted file mode 100644
index 1f07fe409d7eb..0000000000000
--- a/ports/esp32/memory.h
+++ /dev/null
@@ -1,2 +0,0 @@
-// this is needed for lib/crypto-algorithms/sha256.c
-#include <string.h>
diff --git a/ports/esp32/modesp32.c b/ports/esp32/modesp32.c
index 164b1918261f4..4572e7b68b72a 100644
--- a/ports/esp32/modesp32.c
+++ b/ports/esp32/modesp32.c
@@ -30,7 +30,6 @@
 #include <time.h>
 #include <sys/time.h>
 #include "driver/gpio.h"
-#include "driver/adc.h"
 #include "esp_heap_caps.h"
 #include "multi_heap.h"
 
@@ -212,6 +211,49 @@ static mp_obj_t esp32_idf_heap_info(const mp_obj_t cap_in) {
 }
 static MP_DEFINE_CONST_FUN_OBJ_1(esp32_idf_heap_info_obj, esp32_idf_heap_info);
 
+#if CONFIG_FREERTOS_USE_TRACE_FACILITY
+static mp_obj_t esp32_idf_task_info(void) {
+    const size_t task_count_max = uxTaskGetNumberOfTasks();
+    TaskStatus_t *task_array = m_new(TaskStatus_t, task_count_max);
+    uint32_t total_time;
+    const size_t task_count = uxTaskGetSystemState(task_array, task_count_max, &total_time);
+
+    mp_obj_list_t *task_list = MP_OBJ_TO_PTR(mp_obj_new_list(task_count, NULL));
+    for (size_t i = 0; i < task_count; i++) {
+        mp_obj_t task_data[] = {
+            mp_obj_new_int_from_uint((mp_uint_t)task_array[i].xHandle),
+            mp_obj_new_str(task_array[i].pcTaskName, strlen(task_array[i].pcTaskName)),
+            MP_OBJ_NEW_SMALL_INT(task_array[i].eCurrentState),
+            MP_OBJ_NEW_SMALL_INT(task_array[i].uxCurrentPriority),
+            #if CONFIG_FREERTOS_GENERATE_RUN_TIME_STATS
+            mp_obj_new_int_from_uint(task_array[i].ulRunTimeCounter),
+            #else
+            mp_const_none,
+            #endif
+            mp_obj_new_int_from_uint(task_array[i].usStackHighWaterMark),
+            #if CONFIG_FREERTOS_VTASKLIST_INCLUDE_COREID
+            MP_OBJ_NEW_SMALL_INT(task_array[i].xCoreID),
+            #else
+            mp_const_none,
+            #endif
+        };
+        task_list->items[i] = mp_obj_new_tuple(7, task_data);
+    }
+
+    m_del(TaskStatus_t, task_array, task_count_max);
+    mp_obj_t task_stats[] = {
+        #if CONFIG_FREERTOS_GENERATE_RUN_TIME_STATS
+        MP_OBJ_NEW_SMALL_INT(total_time),
+        #else
+        mp_const_none,
+        #endif
+        task_list
+    };
+    return mp_obj_new_tuple(2, task_stats);
+}
+static MP_DEFINE_CONST_FUN_OBJ_0(esp32_idf_task_info_obj, esp32_idf_task_info);
+#endif
+
 static const mp_rom_map_elem_t esp32_module_globals_table[] = {
     { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_esp32) },
 
@@ -228,6 +270,9 @@ static const mp_rom_map_elem_t esp32_module_globals_table[] = {
     { MP_ROM_QSTR(MP_QSTR_mcu_temperature), MP_ROM_PTR(&esp32_mcu_temperature_obj) },
     #endif
     { MP_ROM_QSTR(MP_QSTR_idf_heap_info), MP_ROM_PTR(&esp32_idf_heap_info_obj) },
+    #if CONFIG_FREERTOS_USE_TRACE_FACILITY
+    { MP_ROM_QSTR(MP_QSTR_idf_task_info), MP_ROM_PTR(&esp32_idf_task_info_obj) },
+    #endif
 
     { MP_ROM_QSTR(MP_QSTR_NVS), MP_ROM_PTR(&esp32_nvs_type) },
     { MP_ROM_QSTR(MP_QSTR_Partition), MP_ROM_PTR(&esp32_partition_type) },
diff --git a/ports/esp32/modmachine.c b/ports/esp32/modmachine.c
index 0c1b94d02d940..0d7ea44c66960 100644
--- a/ports/esp32/modmachine.c
+++ b/ports/esp32/modmachine.c
@@ -178,7 +178,7 @@ static void mp_machine_lightsleep(size_t n_args, const mp_obj_t *args) {
     machine_sleep_helper(MACHINE_WAKE_SLEEP, n_args, args);
 };
 
-NORETURN static void mp_machine_deepsleep(size_t n_args, const mp_obj_t *args) {
+MP_NORETURN static void mp_machine_deepsleep(size_t n_args, const mp_obj_t *args) {
     machine_sleep_helper(MACHINE_WAKE_DEEPSLEEP, n_args, args);
     mp_machine_reset();
 };
@@ -221,7 +221,7 @@ static mp_int_t mp_machine_reset_cause(void) {
 #include "esp32s3/rom/usb/chip_usb_dw_wrapper.h"
 #endif
 
-NORETURN static void machine_bootloader_rtc(void) {
+MP_NORETURN static void machine_bootloader_rtc(void) {
     #if CONFIG_IDF_TARGET_ESP32S3 && MICROPY_HW_USB_CDC
     usb_usj_mode();
     usb_dc_prepare_persist();
@@ -233,7 +233,7 @@ NORETURN static void machine_bootloader_rtc(void) {
 #endif
 
 #ifdef MICROPY_BOARD_ENTER_BOOTLOADER
-NORETURN void mp_machine_bootloader(size_t n_args, const mp_obj_t *args) {
+MP_NORETURN void mp_machine_bootloader(size_t n_args, const mp_obj_t *args) {
     MICROPY_BOARD_ENTER_BOOTLOADER(n_args, args);
     for (;;) {
     }
@@ -254,7 +254,7 @@ static mp_obj_t machine_wake_reason(size_t n_args, const mp_obj_t *pos_args, mp_
 }
 static MP_DEFINE_CONST_FUN_OBJ_KW(machine_wake_reason_obj, 0,  machine_wake_reason);
 
-NORETURN static void mp_machine_reset(void) {
+MP_NORETURN static void mp_machine_reset(void) {
     esp_restart();
 }
 
diff --git a/ports/esp32/modnetwork.h b/ports/esp32/modnetwork.h
index 387f961976d60..ba69d5cc0f901 100644
--- a/ports/esp32/modnetwork.h
+++ b/ports/esp32/modnetwork.h
@@ -28,7 +28,32 @@
 
 #include "esp_netif.h"
 
-enum { PHY_LAN8710, PHY_LAN8720, PHY_IP101, PHY_RTL8201, PHY_DP83848, PHY_KSZ8041, PHY_KSZ8081, PHY_KSZ8851SNL = 100, PHY_DM9051, PHY_W5500 };
+// lan867x component requires newer IDF version
+#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 3, 0) && CONFIG_IDF_TARGET_ESP32
+#define PHY_LAN867X_ENABLED (1)
+#else
+#define PHY_LAN867X_ENABLED (0)
+#endif
+
+// PHY_GENERIC support requires newer IDF version
+#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 4, 0) && CONFIG_IDF_TARGET_ESP32
+#define PHY_GENERIC_ENABLED (1)
+#else
+#define PHY_GENERIC_ENABLED (0)
+#endif
+
+enum {
+    // PHYs supported by the internal Ethernet MAC:
+    PHY_LAN8710, PHY_LAN8720, PHY_IP101, PHY_RTL8201, PHY_DP83848, PHY_KSZ8041, PHY_KSZ8081,
+    #if PHY_LAN867X_ENABLED
+    PHY_LAN8670,
+    #endif
+    #if PHY_GENERIC_ENABLED
+    PHY_GENERIC,
+    #endif
+    // PHYs which are actually SPI Ethernet MAC+PHY chips:
+    PHY_KSZ8851SNL = 100, PHY_DM9051, PHY_W5500
+};
 #define IS_SPI_PHY(NUM) (NUM >= 100)
 enum { ETH_INITIALIZED, ETH_STARTED, ETH_STOPPED, ETH_CONNECTED, ETH_DISCONNECTED, ETH_GOT_IP };
 
@@ -52,7 +77,7 @@ extern const mp_obj_type_t esp_network_wlan_type;
 MP_DECLARE_CONST_FUN_OBJ_0(esp_network_initialize_obj);
 MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(esp_network_get_wlan_obj);
 MP_DECLARE_CONST_FUN_OBJ_KW(esp_network_get_lan_obj);
-MP_DECLARE_CONST_FUN_OBJ_1(esp_network_ppp_make_new_obj);
+extern const struct _mp_obj_type_t esp_network_ppp_lwip_type;
 MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(esp_network_ifconfig_obj);
 MP_DECLARE_CONST_FUN_OBJ_KW(esp_network_ipconfig_obj);
 MP_DECLARE_CONST_FUN_OBJ_KW(esp_nic_ipconfig_obj);
@@ -61,7 +86,7 @@ MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(esp_network_phy_mode_obj);
 
 mp_obj_t esp_ifname(esp_netif_t *netif);
 
-NORETURN void esp_exceptions_helper(esp_err_t e);
+MP_NORETURN void esp_exceptions_helper(esp_err_t e);
 
 static inline void esp_exceptions(esp_err_t e) {
     if (e != ESP_OK) {
diff --git a/ports/esp32/modnetwork_globals.h b/ports/esp32/modnetwork_globals.h
index 1aad785ee3d9c..12252ddbc5de6 100644
--- a/ports/esp32/modnetwork_globals.h
+++ b/ports/esp32/modnetwork_globals.h
@@ -8,7 +8,7 @@
 { MP_ROM_QSTR(MP_QSTR_LAN), MP_ROM_PTR(&esp_network_get_lan_obj) },
 #endif
 #if defined(CONFIG_ESP_NETIF_TCPIP_LWIP) && defined(CONFIG_LWIP_PPP_SUPPORT)
-{ MP_ROM_QSTR(MP_QSTR_PPP), MP_ROM_PTR(&esp_network_ppp_make_new_obj) },
+{ MP_ROM_QSTR(MP_QSTR_PPP), MP_ROM_PTR(&esp_network_ppp_lwip_type) },
 #endif
 { MP_ROM_QSTR(MP_QSTR_phy_mode), MP_ROM_PTR(&esp_network_phy_mode_obj) },
 { MP_ROM_QSTR(MP_QSTR_ipconfig), MP_ROM_PTR(&esp_network_ipconfig_obj) },
@@ -47,6 +47,12 @@
 { MP_ROM_QSTR(MP_QSTR_PHY_DP83848), MP_ROM_INT(PHY_DP83848) },
 { MP_ROM_QSTR(MP_QSTR_PHY_KSZ8041), MP_ROM_INT(PHY_KSZ8041) },
 { MP_ROM_QSTR(MP_QSTR_PHY_KSZ8081), MP_ROM_INT(PHY_KSZ8081) },
+#if PHY_LAN867X_ENABLED
+{ MP_ROM_QSTR(MP_QSTR_PHY_LAN8670), MP_ROM_INT(PHY_LAN8670) },
+#endif
+#if PHY_GENERIC_ENABLED
+{ MP_ROM_QSTR(MP_QSTR_PHY_GENERIC), MP_ROM_INT(PHY_GENERIC) },
+#endif
 
 #if CONFIG_ETH_SPI_ETHERNET_KSZ8851SNL
 { MP_ROM_QSTR(MP_QSTR_PHY_KSZ8851SNL), MP_ROM_INT(PHY_KSZ8851SNL) },
diff --git a/ports/esp32/modsocket.c b/ports/esp32/modsocket.c
index 7ea5e855d325e..2050d1d04d4d6 100644
--- a/ports/esp32/modsocket.c
+++ b/ports/esp32/modsocket.c
@@ -611,7 +611,7 @@ static MP_DEFINE_CONST_FUN_OBJ_2(socket_setblocking_obj, socket_setblocking);
 // XXX this can end up waiting a very long time if the content is dribbled in one character
 // at a time, as the timeout resets each time a recvfrom succeeds ... this is probably not
 // good behaviour.
-static mp_uint_t _socket_read_data(mp_obj_t self_in, void *buf, size_t size,
+static mp_uint_t _socket_read_data(mp_obj_t self_in, void *buf, size_t size, mp_int_t flags,
     struct sockaddr *from, socklen_t *from_len, int *errcode) {
     socket_obj_t *sock = MP_OBJ_TO_PTR(self_in);
 
@@ -645,7 +645,7 @@ static mp_uint_t _socket_read_data(mp_obj_t self_in, void *buf, size_t size,
         if (release_gil) {
             MP_THREAD_GIL_EXIT();
         }
-        int r = lwip_recvfrom(sock->fd, buf, size, 0, from, from_len);
+        int r = lwip_recvfrom(sock->fd, buf, size, flags, from, from_len);
         if (release_gil) {
             MP_THREAD_GIL_ENTER();
         }
@@ -655,7 +655,7 @@ static mp_uint_t _socket_read_data(mp_obj_t self_in, void *buf, size_t size,
         if (r >= 0) {
             return r;
         }
-        if (errno != EWOULDBLOCK) {
+        if (errno != EWOULDBLOCK || (flags & MSG_DONTWAIT)) {
             *errcode = errno;
             return MP_STREAM_ERROR;
         }
@@ -666,14 +666,17 @@ static mp_uint_t _socket_read_data(mp_obj_t self_in, void *buf, size_t size,
     return MP_STREAM_ERROR;
 }
 
-mp_obj_t _socket_recvfrom(mp_obj_t self_in, mp_obj_t len_in,
+mp_obj_t _socket_recvfrom(size_t n_args, const mp_obj_t *args,
     struct sockaddr *from, socklen_t *from_len) {
-    size_t len = mp_obj_get_int(len_in);
+    mp_obj_t self_in = args[0];
+    size_t len = mp_obj_get_int(args[1]);
+    int flags = n_args > 2 ? mp_obj_get_int(args[2]) : 0;
+
     vstr_t vstr;
     vstr_init_len(&vstr, len);
 
     int errcode;
-    mp_uint_t ret = _socket_read_data(self_in, vstr.buf, len, from, from_len, &errcode);
+    mp_uint_t ret = _socket_read_data(self_in, vstr.buf, len, flags, from, from_len, &errcode);
     if (ret == MP_STREAM_ERROR) {
         mp_raise_OSError(errcode);
     }
@@ -682,17 +685,17 @@ mp_obj_t _socket_recvfrom(mp_obj_t self_in, mp_obj_t len_in,
     return mp_obj_new_bytes_from_vstr(&vstr);
 }
 
-static mp_obj_t socket_recv(mp_obj_t self_in, mp_obj_t len_in) {
-    return _socket_recvfrom(self_in, len_in, NULL, NULL);
+static mp_obj_t socket_recv(size_t n_args, const mp_obj_t *args) {
+    return _socket_recvfrom(n_args, args, NULL, NULL);
 }
-static MP_DEFINE_CONST_FUN_OBJ_2(socket_recv_obj, socket_recv);
+static MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(socket_recv_obj, 2, 3, socket_recv);
 
-static mp_obj_t socket_recvfrom(mp_obj_t self_in, mp_obj_t len_in) {
+static mp_obj_t socket_recvfrom(size_t n_args, const mp_obj_t *args) {
     struct sockaddr from;
     socklen_t fromlen = sizeof(from);
 
     mp_obj_t tuple[2];
-    tuple[0] = _socket_recvfrom(self_in, len_in, &from, &fromlen);
+    tuple[0] = _socket_recvfrom(n_args, args, &from, &fromlen);
 
     uint8_t *ip = (uint8_t *)&((struct sockaddr_in *)&from)->sin_addr;
     mp_uint_t port = lwip_ntohs(((struct sockaddr_in *)&from)->sin_port);
@@ -700,7 +703,7 @@ static mp_obj_t socket_recvfrom(mp_obj_t self_in, mp_obj_t len_in) {
 
     return mp_obj_new_tuple(2, tuple);
 }
-static MP_DEFINE_CONST_FUN_OBJ_2(socket_recvfrom_obj, socket_recvfrom);
+static MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(socket_recvfrom_obj, 2, 3, socket_recvfrom);
 
 int _socket_send(socket_obj_t *sock, const char *data, size_t datalen) {
     int sentlen = 0;
@@ -789,7 +792,7 @@ static mp_obj_t socket_makefile(size_t n_args, const mp_obj_t *args) {
 static MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(socket_makefile_obj, 1, 3, socket_makefile);
 
 static mp_uint_t socket_stream_read(mp_obj_t self_in, void *buf, mp_uint_t size, int *errcode) {
-    return _socket_read_data(self_in, buf, size, NULL, NULL, errcode);
+    return _socket_read_data(self_in, buf, size, 0, NULL, NULL, errcode);
 }
 
 static mp_uint_t socket_stream_write(mp_obj_t self_in, const void *buf, mp_uint_t size, int *errcode) {
@@ -1010,6 +1013,8 @@ static const mp_rom_map_elem_t mp_module_socket_globals_table[] = {
     { MP_ROM_QSTR(MP_QSTR_SO_BINDTODEVICE), MP_ROM_INT(SO_BINDTODEVICE) },
     { MP_ROM_QSTR(MP_QSTR_IP_ADD_MEMBERSHIP), MP_ROM_INT(IP_ADD_MEMBERSHIP) },
     { MP_ROM_QSTR(MP_QSTR_TCP_NODELAY), MP_ROM_INT(TCP_NODELAY) },
+    { MP_ROM_QSTR(MP_QSTR_MSG_PEEK), MP_ROM_INT(MSG_PEEK) },
+    { MP_ROM_QSTR(MP_QSTR_MSG_DONTWAIT), MP_ROM_INT(MSG_DONTWAIT) },
 };
 
 static MP_DEFINE_CONST_DICT(mp_module_socket_globals, mp_module_socket_globals_table);
diff --git a/ports/esp32/mpconfigport.h b/ports/esp32/mpconfigport.h
index b5b7d63a56333..a6f103cdef7a5 100644
--- a/ports/esp32/mpconfigport.h
+++ b/ports/esp32/mpconfigport.h
@@ -62,7 +62,8 @@
 #define MICROPY_STACK_CHECK_MARGIN          (1024)
 #define MICROPY_ENABLE_EMERGENCY_EXCEPTION_BUF (1)
 #define MICROPY_LONGINT_IMPL                (MICROPY_LONGINT_IMPL_MPZ)
-#define MICROPY_ERROR_REPORTING             (MICROPY_ERROR_REPORTING_NORMAL)
+#define MICROPY_ERROR_REPORTING             (MICROPY_ERROR_REPORTING_NORMAL) // Debugging Note: Increase the error reporting level to view
+                                                                             // __FUNCTION__, __LINE__, __FILE__ in check_esp_err() exceptions
 #define MICROPY_WARNINGS                    (1)
 #define MICROPY_FLOAT_IMPL                  (MICROPY_FLOAT_IMPL_FLOAT)
 #define MICROPY_STREAMS_POSIX_API           (1)
@@ -123,6 +124,7 @@
 #define MICROPY_PY_MACHINE_ADC_INCLUDEFILE  "ports/esp32/machine_adc.c"
 #define MICROPY_PY_MACHINE_ADC_ATTEN_WIDTH  (1)
 #define MICROPY_PY_MACHINE_ADC_INIT         (1)
+#define MICROPY_PY_MACHINE_ADC_DEINIT       (1)
 #define MICROPY_PY_MACHINE_ADC_READ         (1)
 #define MICROPY_PY_MACHINE_ADC_READ_UV      (1)
 #define MICROPY_PY_MACHINE_ADC_BLOCK        (1)
@@ -391,3 +393,8 @@ void boardctrl_startup(void);
 #ifndef MICROPY_PY_STRING_TX_GIL_THRESHOLD
 #define MICROPY_PY_STRING_TX_GIL_THRESHOLD  (20)
 #endif
+
+// Code can override this to provide a custom ESP-IDF entry point.
+#ifndef MICROPY_ESP_IDF_ENTRY
+#define MICROPY_ESP_IDF_ENTRY app_main
+#endif
diff --git a/ports/esp32/mphalport.h b/ports/esp32/mphalport.h
index a908d784d7f61..a919a859a4279 100644
--- a/ports/esp32/mphalport.h
+++ b/ports/esp32/mphalport.h
@@ -36,6 +36,7 @@
 #include "freertos/task.h"
 
 #include "driver/spi_master.h"
+#include "soc/gpio_reg.h"
 
 #define MICROPY_PLATFORM_VERSION "IDF" IDF_VER
 
@@ -133,6 +134,15 @@ static inline void mp_hal_pin_od_high(mp_hal_pin_obj_t pin) {
 static inline int mp_hal_pin_read(mp_hal_pin_obj_t pin) {
     return gpio_get_level(pin);
 }
+static inline int mp_hal_pin_read_output(mp_hal_pin_obj_t pin) {
+    #if defined(GPIO_OUT1_REG)
+    return pin < 32
+        ? (*(uint32_t *)GPIO_OUT_REG >> pin) & 1
+        : (*(uint32_t *)GPIO_OUT1_REG >> (pin - 32)) & 1;
+    #else
+    return (*(uint32_t *)GPIO_OUT_REG >> pin) & 1;
+    #endif
+}
 static inline void mp_hal_pin_write(mp_hal_pin_obj_t pin, int v) {
     gpio_set_level(pin, v);
 }
diff --git a/ports/esp32/mpnimbleport.c b/ports/esp32/mpnimbleport.c
index ce4b77727a190..77185883fd437 100644
--- a/ports/esp32/mpnimbleport.c
+++ b/ports/esp32/mpnimbleport.c
@@ -58,7 +58,7 @@ void mp_bluetooth_nimble_port_start(void) {
     nimble_port_freertos_init(ble_host_task);
 }
 
-void mp_bluetooth_nimble_port_shutdown(void) {
+int mp_bluetooth_nimble_port_shutdown(void) {
     DEBUG_printf("mp_bluetooth_nimble_port_shutdown\n");
 
     #if MICROPY_PY_BLUETOOTH_USE_SYNC_EVENTS_WITH_INTERLOCK
@@ -79,6 +79,8 @@ void mp_bluetooth_nimble_port_shutdown(void) {
 
     // Mark stack as shutdown.
     mp_bluetooth_nimble_ble_state = MP_BLUETOOTH_NIMBLE_BLE_STATE_OFF;
+
+    return 0;
 }
 
 #endif
diff --git a/ports/esp32/mpthreadport.c b/ports/esp32/mpthreadport.c
index f436ebb80a7ad..67917e33e5189 100644
--- a/ports/esp32/mpthreadport.c
+++ b/ports/esp32/mpthreadport.c
@@ -41,10 +41,16 @@
 #define MP_THREAD_DEFAULT_STACK_SIZE                    (MP_THREAD_MIN_STACK_SIZE + MICROPY_STACK_CHECK_MARGIN)
 #define MP_THREAD_PRIORITY                              (ESP_TASK_PRIO_MIN + 1)
 
+typedef enum {
+    MP_THREAD_RUN_STATE_NEW,
+    MP_THREAD_RUN_STATE_RUNNING,
+    MP_THREAD_RUN_STATE_FINISHED,
+} mp_thread_run_state_t;
+
 // this structure forms a linked list, one node per active thread
 typedef struct _mp_thread_t {
     TaskHandle_t id;        // system id of thread
-    int ready;              // whether the thread is ready and running
+    mp_thread_run_state_t run_state; // current run state of the thread
     void *arg;              // thread Python args, a GC root pointer
     void *stack;            // pointer to the stack
     size_t stack_len;       // number of words in the stack
@@ -60,18 +66,16 @@ void mp_thread_init(void *stack, uint32_t stack_len) {
     mp_thread_set_state(&mp_state_ctx.thread);
     // create the first entry in the linked list of all threads
     thread_entry0.id = xTaskGetCurrentTaskHandle();
-    thread_entry0.ready = 1;
+    thread_entry0.run_state = MP_THREAD_RUN_STATE_RUNNING;
     thread_entry0.arg = NULL;
     thread_entry0.stack = stack;
     thread_entry0.stack_len = stack_len;
     thread_entry0.next = NULL;
+    thread = &thread_entry0;
     mp_thread_mutex_init(&thread_mutex);
 
     // memory barrier to ensure above data is committed
     __sync_synchronize();
-
-    // vTaskPreDeletionHook needs the thread ready after thread_mutex is ready
-    thread = &thread_entry0;
 }
 
 void mp_thread_gc_others(void) {
@@ -82,7 +86,7 @@ void mp_thread_gc_others(void) {
         if (th->id == xTaskGetCurrentTaskHandle()) {
             continue;
         }
-        if (!th->ready) {
+        if (th->run_state != MP_THREAD_RUN_STATE_RUNNING) {
             continue;
         }
         gc_collect_root(th->stack, th->stack_len);
@@ -106,7 +110,7 @@ void mp_thread_start(void) {
     mp_thread_mutex_lock(&thread_mutex, 1);
     for (mp_thread_t *th = thread; th != NULL; th = th->next) {
         if (th->id == xTaskGetCurrentTaskHandle()) {
-            th->ready = 1;
+            th->run_state = MP_THREAD_RUN_STATE_RUNNING;
             break;
         }
     }
@@ -116,12 +120,22 @@ void mp_thread_start(void) {
 static void *(*ext_thread_entry)(void *) = NULL;
 
 static void freertos_entry(void *arg) {
+    // Run the Python code.
     if (ext_thread_entry) {
         ext_thread_entry(arg);
     }
-    vTaskDelete(NULL);
-    for (;;) {;
+
+    // Remove the thread from the linked-list of active threads.
+    mp_thread_mutex_lock(&thread_mutex, 1);
+    for (mp_thread_t **th = &thread; *th != NULL; th = &(*th)->next) {
+        if ((*th)->id == xTaskGetCurrentTaskHandle()) {
+            *th = (*th)->next;
+        }
     }
+    mp_thread_mutex_unlock(&thread_mutex);
+
+    // Delete this FreeRTOS task (this call to vTaskDelete will not return).
+    vTaskDelete(NULL);
 }
 
 mp_uint_t mp_thread_create_ex(void *(*entry)(void *), void *arg, size_t *stack_size, int priority, char *name) {
@@ -147,7 +161,7 @@ mp_uint_t mp_thread_create_ex(void *(*entry)(void *), void *arg, size_t *stack_s
     }
 
     // add thread to linked list of all threads
-    th->ready = 0;
+    th->run_state = MP_THREAD_RUN_STATE_NEW;
     th->arg = arg;
     th->stack = pxTaskGetStackStart(th->id);
     th->stack_len = *stack_size / sizeof(uintptr_t);
@@ -167,33 +181,7 @@ void mp_thread_finish(void) {
     mp_thread_mutex_lock(&thread_mutex, 1);
     for (mp_thread_t *th = thread; th != NULL; th = th->next) {
         if (th->id == xTaskGetCurrentTaskHandle()) {
-            th->ready = 0;
-            break;
-        }
-    }
-    mp_thread_mutex_unlock(&thread_mutex);
-}
-
-// This is called either from vTaskDelete() or from the FreeRTOS idle task, so
-// may not be within Python context. Therefore MP_STATE_THREAD may not be valid
-// and it does not have the GIL.
-void vTaskPreDeletionHook(void *tcb) {
-    if (thread == NULL) {
-        // threading not yet initialised
-        return;
-    }
-    mp_thread_t *prev = NULL;
-    mp_thread_mutex_lock(&thread_mutex, 1);
-    for (mp_thread_t *th = thread; th != NULL; prev = th, th = th->next) {
-        // unlink the node from the list
-        if ((void *)th->id == tcb) {
-            if (prev != NULL) {
-                prev->next = th->next;
-            } else {
-                // move the start pointer
-                thread = th->next;
-            }
-            // The "th" memory will eventually be reclaimed by the GC.
+            th->run_state = MP_THREAD_RUN_STATE_FINISHED;
             break;
         }
     }
@@ -213,7 +201,7 @@ int mp_thread_mutex_lock(mp_thread_mutex_t *mutex, int wait) {
 
 void mp_thread_mutex_unlock(mp_thread_mutex_t *mutex) {
     xSemaphoreGive(mutex->handle);
-    // Python threads run at equal priority, so pre-emptively yield here to
+    // Python threads run at equal priority, so preemptively yield here to
     // prevent pathological imbalances where a thread unlocks and then
     // immediately re-locks a mutex before a context switch can occur, leaving
     // another thread waiting for an unbounded period of time.
@@ -221,32 +209,22 @@ void mp_thread_mutex_unlock(mp_thread_mutex_t *mutex) {
 }
 
 void mp_thread_deinit(void) {
-    for (;;) {
-        // Find a task to delete
-        TaskHandle_t id = NULL;
-        mp_thread_mutex_lock(&thread_mutex, 1);
-        for (mp_thread_t *th = thread; th != NULL; th = th->next) {
-            // Don't delete the current task
-            if (th->id != xTaskGetCurrentTaskHandle()) {
-                id = th->id;
-                break;
-            }
-        }
-        mp_thread_mutex_unlock(&thread_mutex);
+    // The current task should be thread_entry0 and should be the last in the linked list.
+    assert(thread_entry0.id == xTaskGetCurrentTaskHandle());
+    assert(thread_entry0.next == NULL);
 
-        if (id == NULL) {
-            // No tasks left to delete
-            break;
-        } else {
-            // Call FreeRTOS to delete the task (it will call vTaskPreDeletionHook)
-            vTaskDelete(id);
+    // Delete all tasks except the main one.
+    mp_thread_mutex_lock(&thread_mutex, 1);
+    for (mp_thread_t *th = thread; th != NULL; th = th->next) {
+        if (th != &thread_entry0) {
+            vTaskDelete(th->id);
         }
     }
-}
-
-#else
+    thread = &thread_entry0;
+    mp_thread_mutex_unlock(&thread_mutex);
 
-void vTaskPreDeletionHook(void *tcb) {
+    // Give the idle task a chance to run, to clean up any deleted tasks.
+    vTaskDelay(1);
 }
 
 #endif // MICROPY_PY_THREAD
diff --git a/ports/esp32/network_common.c b/ports/esp32/network_common.c
index fce8a0304c8be..bd34f1b41fdfc 100644
--- a/ports/esp32/network_common.c
+++ b/ports/esp32/network_common.c
@@ -45,7 +45,7 @@
 #include "lwip/sockets.h"
 #include "lwip/dns.h"
 
-NORETURN void esp_exceptions_helper(esp_err_t e) {
+MP_NORETURN void esp_exceptions_helper(esp_err_t e) {
     switch (e) {
         case ESP_ERR_WIFI_NOT_INIT:
             mp_raise_msg(&mp_type_OSError, MP_ERROR_TEXT("Wifi Not Initialized"));
@@ -77,6 +77,8 @@ NORETURN void esp_exceptions_helper(esp_err_t e) {
             mp_raise_msg(&mp_type_OSError, MP_ERROR_TEXT("Wifi Would Block"));
         case ESP_ERR_WIFI_NOT_CONNECT:
             mp_raise_msg(&mp_type_OSError, MP_ERROR_TEXT("Wifi Not Connected"));
+        case ESP_ERR_NO_MEM:
+            mp_raise_msg(&mp_type_OSError, MP_ERROR_TEXT("WiFi Out of Memory"));
         default:
             mp_raise_msg_varg(&mp_type_RuntimeError, MP_ERROR_TEXT("Wifi Unknown Error 0x%04x"), e);
     }
diff --git a/ports/esp32/network_lan.c b/ports/esp32/network_lan.c
index e1a8c957857c4..309ee0b14a23c 100644
--- a/ports/esp32/network_lan.c
+++ b/ports/esp32/network_lan.c
@@ -45,6 +45,10 @@
 #include "modnetwork.h"
 #include "extmod/modnetwork.h"
 
+#if PHY_LAN867X_ENABLED
+#include "esp_eth_phy_lan867x.h"
+#endif
+
 typedef struct _lan_if_obj_t {
     base_if_obj_t base;
     bool initialized;
@@ -156,6 +160,12 @@ static mp_obj_t get_lan(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_ar
         args[ARG_phy_type].u_int != PHY_RTL8201 &&
         args[ARG_phy_type].u_int != PHY_KSZ8041 &&
         args[ARG_phy_type].u_int != PHY_KSZ8081 &&
+        #if PHY_LAN867X_ENABLED
+        args[ARG_phy_type].u_int != PHY_LAN8670 &&
+        #endif
+        #if PHY_GENERIC_ENABLED
+        args[ARG_phy_type].u_int != PHY_GENERIC &&
+        #endif
         #if CONFIG_ETH_USE_SPI_ETHERNET
         #if CONFIG_ETH_SPI_ETHERNET_KSZ8851SNL
         args[ARG_phy_type].u_int != PHY_KSZ8851SNL &&
@@ -231,7 +241,17 @@ static mp_obj_t get_lan(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_ar
         case PHY_KSZ8081:
             self->phy = esp_eth_phy_new_ksz80xx(&phy_config);
             break;
+        #if PHY_LAN867X_ENABLED
+        case PHY_LAN8670:
+            self->phy = esp_eth_phy_new_lan867x(&phy_config);
+            break;
+        #endif
+        #if PHY_GENERIC_ENABLED
+        case PHY_GENERIC:
+            self->phy = esp_eth_phy_new_generic(&phy_config);
+            break;
         #endif
+        #endif // CONFIG_IDF_TARGET_ESP32
         #if CONFIG_ETH_USE_SPI_ETHERNET
         #if CONFIG_ETH_SPI_ETHERNET_KSZ8851SNL
         case PHY_KSZ8851SNL: {
diff --git a/ports/esp32/network_ppp.c b/ports/esp32/network_ppp.c
index 4dd5a3718c295..8b700c98ef386 100644
--- a/ports/esp32/network_ppp.c
+++ b/ports/esp32/network_ppp.c
@@ -4,6 +4,7 @@
  * The MIT License (MIT)
  *
  * Copyright (c) 2018 "Eric Poulsen" <eric@zyxod.com>
+ * Copyright (c) 2024 Damien P. George
  *
  * Based on the ESP IDF example code which is Public Domain / CC0
  *
@@ -26,172 +27,265 @@
  * THE SOFTWARE.
  */
 
+// This file is intended to closely match extmod/network_ppp_lwip.c. Changes can
+// and should probably be applied to both files. Compare them directly by using:
+// git diff --no-index extmod/network_ppp_lwip.c ports/esp32/network_ppp.c
+
 #include "py/runtime.h"
 #include "py/mphal.h"
-#include "py/objtype.h"
 #include "py/stream.h"
-#include "shared/netutils/netutils.h"
-#include "modmachine.h"
-#include "ppp_set_auth.h"
 
-#include "netif/ppp/ppp.h"
-#include "netif/ppp/pppos.h"
-#include "lwip/err.h"
-#include "lwip/sockets.h"
-#include "lwip/sys.h"
-#include "lwip/netdb.h"
+#if defined(CONFIG_ESP_NETIF_TCPIP_LWIP) && defined(CONFIG_LWIP_PPP_SUPPORT)
+
 #include "lwip/dns.h"
+#include "netif/ppp/ppp.h"
 #include "netif/ppp/pppapi.h"
+#include "netif/ppp/pppos.h"
 
-#if defined(CONFIG_ESP_NETIF_TCPIP_LWIP) && defined(CONFIG_LWIP_PPP_SUPPORT)
+// Includes for port-specific changes compared to network_ppp_lwip.c
+#include "shared/netutils/netutils.h"
+#include "ppp_set_auth.h"
 
-#define PPP_CLOSE_TIMEOUT_MS (4000)
+// Enable this to see the serial data going between the PPP layer.
+#define PPP_TRACE_IN_OUT (0)
 
-typedef struct _ppp_if_obj_t {
+typedef enum {
+    STATE_INACTIVE,
+    STATE_ACTIVE,
+    STATE_ERROR,
+    STATE_CONNECTING,
+    STATE_CONNECTED,
+} network_ppp_state_t;
+
+typedef struct _network_ppp_obj_t {
     mp_obj_base_t base;
-    bool active;
-    bool connected;
-    volatile bool clean_close;
-    ppp_pcb *pcb;
+    network_ppp_state_t state;
+    int error_code;
     mp_obj_t stream;
-    SemaphoreHandle_t inactiveWaitSem;
-    volatile TaskHandle_t client_task_handle;
-    struct netif pppif;
-} ppp_if_obj_t;
+    ppp_pcb *pcb;
+    struct netif netif;
+} network_ppp_obj_t;
 
-const mp_obj_type_t ppp_if_type;
+const mp_obj_type_t esp_network_ppp_lwip_type;
+
+static mp_obj_t network_ppp___del__(mp_obj_t self_in);
+
+static void network_ppp_stream_uart_irq_disable(network_ppp_obj_t *self) {
+    if (self->stream == mp_const_none) {
+        return;
+    }
 
-static void ppp_status_cb(ppp_pcb *pcb, int err_code, void *ctx) {
-    ppp_if_obj_t *self = ctx;
-    struct netif *pppif = ppp_netif(self->pcb);
+    // Disable UART IRQ.
+    mp_obj_t dest[3];
+    mp_load_method(self->stream, MP_QSTR_irq, dest);
+    dest[2] = mp_const_none;
+    mp_call_method_n_kw(1, 0, dest);
+}
 
+static void network_ppp_status_cb(ppp_pcb *pcb, int err_code, void *ctx) {
+    network_ppp_obj_t *self = ctx;
     switch (err_code) {
         case PPPERR_NONE:
-            #if CONFIG_LWIP_IPV6
-            self->connected = (pppif->ip_addr.u_addr.ip4.addr != 0);
-            #else
-            self->connected = (pppif->ip_addr.addr != 0);
-            #endif // CONFIG_LWIP_IPV6
+            self->state = STATE_CONNECTED;
             break;
         case PPPERR_USER:
-            self->clean_close = true;
-            break;
-        case PPPERR_CONNECT:
-            self->connected = false;
+            if (self->state >= STATE_ERROR) {
+                // Indicate that we are no longer connected and thus
+                // only need to free the PPP PCB, not close it.
+                self->state = STATE_ACTIVE;
+            }
+            // Clean up the PPP PCB.
+            network_ppp___del__(MP_OBJ_FROM_PTR(self));
             break;
         default:
+            self->state = STATE_ERROR;
+            self->error_code = err_code;
             break;
     }
 }
 
-static mp_obj_t ppp_make_new(mp_obj_t stream) {
+static mp_obj_t network_ppp_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) {
+    mp_arg_check_num(n_args, n_kw, 1, 1, false);
+
+    mp_obj_t stream = all_args[0];
+
     if (stream != mp_const_none) {
         mp_get_stream_raise(stream, MP_STREAM_OP_READ | MP_STREAM_OP_WRITE);
     }
 
-    ppp_if_obj_t *self = mp_obj_malloc_with_finaliser(ppp_if_obj_t, &ppp_if_type);
+    network_ppp_obj_t *self = mp_obj_malloc_with_finaliser(network_ppp_obj_t, type);
+    self->state = STATE_INACTIVE;
     self->stream = stream;
-    self->active = false;
-    self->connected = false;
-    self->clean_close = false;
-    self->client_task_handle = NULL;
+    self->pcb = NULL;
 
     return MP_OBJ_FROM_PTR(self);
 }
-MP_DEFINE_CONST_FUN_OBJ_1(esp_network_ppp_make_new_obj, ppp_make_new);
 
-#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 4, 0)
-static u32_t ppp_output_callback(ppp_pcb *pcb, const void *data, u32_t len, void *ctx)
-#else
-static u32_t ppp_output_callback(ppp_pcb *pcb, u8_t *data, u32_t len, void *ctx)
-#endif
-{
-    ppp_if_obj_t *self = ctx;
-
-    mp_obj_t stream = self->stream;
-    if (stream == mp_const_none) {
-        return 0;
+static mp_obj_t network_ppp___del__(mp_obj_t self_in) {
+    network_ppp_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    if (self->state >= STATE_ACTIVE) {
+        if (self->state >= STATE_ERROR) {
+            // Still connected over the stream.
+            // Force the connection to close, with nocarrier=1.
+            self->state = STATE_INACTIVE;
+            pppapi_close(self->pcb, 1);
+        }
+        network_ppp_stream_uart_irq_disable(self);
+        // Free PPP PCB and reset state.
+        self->state = STATE_INACTIVE;
+        pppapi_free(self->pcb);
+        self->pcb = NULL;
     }
-
-    int err;
-    return mp_stream_rw(stream, (void *)data, len, &err, MP_STREAM_RW_WRITE);
+    return mp_const_none;
 }
+static MP_DEFINE_CONST_FUN_OBJ_1(network_ppp___del___obj, network_ppp___del__);
 
-static void pppos_client_task(void *self_in) {
-    ppp_if_obj_t *self = (ppp_if_obj_t *)self_in;
-    uint8_t buf[256];
+static mp_obj_t network_ppp_poll(size_t n_args, const mp_obj_t *args) {
+    network_ppp_obj_t *self = MP_OBJ_TO_PTR(args[0]);
 
-    int len = 0;
-    while (ulTaskNotifyTake(pdTRUE, len <= 0) == 0) {
-        mp_obj_t stream = self->stream;
-        if (stream == mp_const_none) {
-            len = 0;
-        } else {
-            int err;
-            len = mp_stream_rw(stream, buf, sizeof(buf), &err, 0);
-            if (len > 0) {
-                pppos_input_tcpip(self->pcb, (u8_t *)buf, len);
-            }
-        }
+    if (self->state <= STATE_ERROR) {
+        return MP_OBJ_NEW_SMALL_INT(-MP_EPERM);
     }
 
-    self->client_task_handle = NULL;
-    vTaskDelete(NULL);
-    for (;;) {
+    mp_int_t total_len = 0;
+    mp_obj_t stream = self->stream;
+    while (stream != mp_const_none) {
+        uint8_t buf[256];
+        int err;
+        mp_uint_t len = mp_stream_rw(stream, buf, sizeof(buf), &err, 0);
+        if (len == 0) {
+            break;
+        }
+        #if PPP_TRACE_IN_OUT
+        mp_printf(&mp_plat_print, "ppp_in(n=%u,data=", len);
+        for (size_t i = 0; i < len; ++i) {
+            mp_printf(&mp_plat_print, "%02x:", buf[i]);
+        }
+        mp_printf(&mp_plat_print, ")\n");
+        #endif
+        pppos_input(self->pcb, (u8_t *)buf, len);
+        total_len += len;
     }
+
+    return MP_OBJ_NEW_SMALL_INT(total_len);
 }
+static MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(network_ppp_poll_obj, 1, 2, network_ppp_poll);
 
-static mp_obj_t ppp_active(size_t n_args, const mp_obj_t *args) {
-    ppp_if_obj_t *self = MP_OBJ_TO_PTR(args[0]);
+static void network_ppp_stream_uart_irq_enable(network_ppp_obj_t *self) {
+    if (self->stream == mp_const_none) {
+        return;
+    }
 
-    if (n_args > 1) {
-        if (mp_obj_is_true(args[1])) {
-            if (self->active) {
-                return mp_const_true;
-            }
+    // Enable UART IRQ to call PPP.poll() when incoming data is ready.
+    mp_obj_t dest[4];
+    mp_load_method(self->stream, MP_QSTR_irq, dest);
+    dest[2] = mp_obj_new_bound_meth(MP_OBJ_FROM_PTR(&network_ppp_poll_obj), MP_OBJ_FROM_PTR(self));
+    dest[3] = mp_load_attr(self->stream, MP_QSTR_IRQ_RXIDLE);
+    mp_call_method_n_kw(2, 0, dest);
+}
 
-            self->pcb = pppapi_pppos_create(&self->pppif, ppp_output_callback, ppp_status_cb, self);
+static mp_obj_t network_ppp_config(size_t n_args, const mp_obj_t *args, mp_map_t *kwargs) {
+    if (n_args != 1 && kwargs->used != 0) {
+        mp_raise_TypeError(MP_ERROR_TEXT("either pos or kw args are allowed"));
+    }
+    network_ppp_obj_t *self = MP_OBJ_TO_PTR(args[0]);
 
-            if (self->pcb == NULL) {
-                mp_raise_msg(&mp_type_RuntimeError, MP_ERROR_TEXT("init failed"));
-            }
-            self->active = true;
-        } else {
-            if (!self->active) {
-                return mp_const_false;
+    if (kwargs->used != 0) {
+        for (size_t i = 0; i < kwargs->alloc; i++) {
+            if (mp_map_slot_is_filled(kwargs, i)) {
+                switch (mp_obj_str_get_qstr(kwargs->table[i].key)) {
+                    case MP_QSTR_stream: {
+                        if (kwargs->table[i].value != mp_const_none) {
+                            mp_get_stream_raise(kwargs->table[i].value, MP_STREAM_OP_READ | MP_STREAM_OP_WRITE);
+                        }
+                        if (self->state >= STATE_ACTIVE) {
+                            network_ppp_stream_uart_irq_disable(self);
+                        }
+                        self->stream = kwargs->table[i].value;
+                        if (self->state >= STATE_ACTIVE) {
+                            network_ppp_stream_uart_irq_enable(self);
+                        }
+                        break;
+                    }
+                    default:
+                        break;
+                }
             }
+        }
+        return mp_const_none;
+    }
 
-            if (self->client_task_handle != NULL) { // is connecting or connected?
-                // Wait for PPPERR_USER, with timeout
-                pppapi_close(self->pcb, 0);
-                uint32_t t0 = mp_hal_ticks_ms();
-                while (!self->clean_close && mp_hal_ticks_ms() - t0 < PPP_CLOSE_TIMEOUT_MS) {
-                    mp_hal_delay_ms(10);
-                }
+    if (n_args != 2) {
+        mp_raise_TypeError(MP_ERROR_TEXT("can query only one param"));
+    }
 
-                // Shutdown task
-                xTaskNotifyGive(self->client_task_handle);
-                t0 = mp_hal_ticks_ms();
-                while (self->client_task_handle != NULL && mp_hal_ticks_ms() - t0 < PPP_CLOSE_TIMEOUT_MS) {
-                    mp_hal_delay_ms(10);
+    mp_obj_t val = mp_const_none;
+
+    switch (mp_obj_str_get_qstr(args[1])) {
+        case MP_QSTR_stream: {
+            val = self->stream;
+            break;
+        }
+        case MP_QSTR_ifname: {
+            if (self->pcb != NULL) {
+                struct netif *pppif = ppp_netif(self->pcb);
+                char ifname[NETIF_NAMESIZE + 1] = {0};
+                netif_index_to_name(netif_get_index(pppif), ifname);
+                if (ifname[0] != 0) {
+                    val = mp_obj_new_str_from_cstr((char *)ifname);
                 }
             }
-
-            // Release PPP
-            pppapi_free(self->pcb);
-            self->pcb = NULL;
-            self->active = false;
-            self->connected = false;
-            self->clean_close = false;
+            break;
         }
+        default:
+            mp_raise_ValueError(MP_ERROR_TEXT("unknown config param"));
+    }
+
+    return val;
+}
+static MP_DEFINE_CONST_FUN_OBJ_KW(network_ppp_config_obj, 1, network_ppp_config);
+
+static mp_obj_t network_ppp_status(mp_obj_t self_in) {
+    network_ppp_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    if (self->state == STATE_ERROR) {
+        return MP_OBJ_NEW_SMALL_INT(-self->error_code);
+    } else {
+        return MP_OBJ_NEW_SMALL_INT(self->state);
+    }
+}
+static MP_DEFINE_CONST_FUN_OBJ_1(network_ppp_status_obj, network_ppp_status);
+
+#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 4, 0)
+static u32_t network_ppp_output_callback(ppp_pcb *pcb, const void *data, u32_t len, void *ctx)
+#else
+static u32_t network_ppp_output_callback(ppp_pcb *pcb, u8_t *data, u32_t len, void *ctx)
+#endif
+{
+    network_ppp_obj_t *self = ctx;
+    #if PPP_TRACE_IN_OUT
+    mp_printf(&mp_plat_print, "ppp_out(n=%u,data=", len);
+    for (size_t i = 0; i < len; ++i) {
+        mp_printf(&mp_plat_print, "%02x:", ((const uint8_t *)data)[i]);
+    }
+    mp_printf(&mp_plat_print, ")\n");
+    #endif
+    mp_obj_t stream = self->stream;
+    if (stream == mp_const_none) {
+        return 0;
     }
-    return mp_obj_new_bool(self->active);
+    int err;
+    // The return value from this output callback is the number of bytes written out.
+    // If it's less than the requested number of bytes then lwIP will propagate out an error.
+    return mp_stream_rw(stream, (void *)data, len, &err, MP_STREAM_RW_WRITE);
 }
-static MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(ppp_active_obj, 1, 2, ppp_active);
 
-static mp_obj_t ppp_connect_py(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) {
-    enum { ARG_authmode, ARG_username, ARG_password };
+static mp_obj_t network_ppp_connect(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) {
+    enum { ARG_security, ARG_user, ARG_key, ARG_authmode, ARG_username, ARG_password };
     static const mp_arg_t allowed_args[] = {
+        { MP_QSTR_security, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
+        { MP_QSTR_user, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE} },
+        { MP_QSTR_key, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE} },
+        // Deprecated arguments for backwards compatibility
         { MP_QSTR_authmode, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = PPPAUTHTYPE_NONE} },
         { MP_QSTR_username, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE} },
         { MP_QSTR_password, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE} },
@@ -200,17 +294,34 @@ static mp_obj_t ppp_connect_py(size_t n_args, const mp_obj_t *args, mp_map_t *kw
     mp_arg_val_t parsed_args[MP_ARRAY_SIZE(allowed_args)];
     mp_arg_parse_all(n_args - 1, args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, parsed_args);
 
-    ppp_if_obj_t *self = MP_OBJ_TO_PTR(args[0]);
+    // Use deprecated arguments as defaults
+    if (parsed_args[ARG_security].u_int == -1) {
+        parsed_args[ARG_security].u_int = parsed_args[ARG_authmode].u_int;
+    }
+    if (parsed_args[ARG_user].u_obj == mp_const_none) {
+        parsed_args[ARG_user].u_obj = parsed_args[ARG_username].u_obj;
+    }
+    if (parsed_args[ARG_key].u_obj == mp_const_none) {
+        parsed_args[ARG_key].u_obj = parsed_args[ARG_password].u_obj;
+    }
+
+    network_ppp_obj_t *self = MP_OBJ_TO_PTR(args[0]);
+
+    if (self->state == STATE_INACTIVE) {
+        self->pcb = pppapi_pppos_create(&self->netif, network_ppp_output_callback, network_ppp_status_cb, self);
+        if (self->pcb == NULL) {
+            mp_raise_msg(&mp_type_OSError, MP_ERROR_TEXT("pppos_create failed"));
+        }
+        self->state = STATE_ACTIVE;
 
-    if (!self->active) {
-        mp_raise_msg(&mp_type_OSError, MP_ERROR_TEXT("must be active"));
+        network_ppp_stream_uart_irq_enable(self);
     }
 
-    if (self->client_task_handle != NULL) {
+    if (self->state == STATE_CONNECTING || self->state == STATE_CONNECTED) {
         mp_raise_OSError(MP_EALREADY);
     }
 
-    switch (parsed_args[ARG_authmode].u_int) {
+    switch (parsed_args[ARG_security].u_int) {
         case PPPAUTHTYPE_NONE:
         case PPPAUTHTYPE_PAP:
         case PPPAUTHTYPE_CHAP:
@@ -219,39 +330,49 @@ static mp_obj_t ppp_connect_py(size_t n_args, const mp_obj_t *args, mp_map_t *kw
             mp_raise_ValueError(MP_ERROR_TEXT("invalid auth"));
     }
 
-    if (parsed_args[ARG_authmode].u_int != PPPAUTHTYPE_NONE) {
-        const char *username_str = mp_obj_str_get_str(parsed_args[ARG_username].u_obj);
-        const char *password_str = mp_obj_str_get_str(parsed_args[ARG_password].u_obj);
-        pppapi_set_auth(self->pcb, parsed_args[ARG_authmode].u_int, username_str, password_str);
+    if (parsed_args[ARG_security].u_int != PPPAUTHTYPE_NONE) {
+        const char *user_str = mp_obj_str_get_str(parsed_args[ARG_user].u_obj);
+        const char *key_str = mp_obj_str_get_str(parsed_args[ARG_key].u_obj);
+        pppapi_set_auth(self->pcb, parsed_args[ARG_security].u_int, user_str, key_str);
     }
-    if (pppapi_set_default(self->pcb) != ESP_OK) {
-        mp_raise_msg(&mp_type_OSError, MP_ERROR_TEXT("set default failed"));
+
+    if (pppapi_set_default(self->pcb) != ERR_OK) {
+        mp_raise_msg(&mp_type_OSError, MP_ERROR_TEXT("ppp_set_default failed"));
     }
 
     ppp_set_usepeerdns(self->pcb, true);
 
-    if (pppapi_connect(self->pcb, 0) != ESP_OK) {
-        mp_raise_msg(&mp_type_OSError, MP_ERROR_TEXT("connect failed"));
+    if (pppapi_connect(self->pcb, 0) != ERR_OK) {
+        mp_raise_msg(&mp_type_OSError, MP_ERROR_TEXT("ppp_connect failed"));
     }
 
-    if (xTaskCreatePinnedToCore(pppos_client_task, "ppp", 2048, self, 1, (TaskHandle_t *)&self->client_task_handle, MP_TASK_COREID) != pdPASS) {
-        mp_raise_msg(&mp_type_RuntimeError, MP_ERROR_TEXT("failed to create worker task"));
-    }
+    self->state = STATE_CONNECTING;
+
+    // Do a poll in case there is data waiting on the input stream.
+    network_ppp_poll(1, args);
 
     return mp_const_none;
 }
-MP_DEFINE_CONST_FUN_OBJ_KW(ppp_connect_obj, 1, ppp_connect_py);
+static MP_DEFINE_CONST_FUN_OBJ_KW(network_ppp_connect_obj, 1, network_ppp_connect);
 
-static mp_obj_t ppp_delete(mp_obj_t self_in) {
-    ppp_if_obj_t *self = MP_OBJ_TO_PTR(self_in);
-    mp_obj_t args[] = {self, mp_const_false};
-    ppp_active(2, args);
+static mp_obj_t network_ppp_disconnect(mp_obj_t self_in) {
+    network_ppp_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    if (self->state == STATE_CONNECTING || self->state == STATE_CONNECTED) {
+        // Initiate close and wait for PPPERR_USER callback.
+        pppapi_close(self->pcb, 0);
+    }
     return mp_const_none;
 }
-MP_DEFINE_CONST_FUN_OBJ_1(ppp_delete_obj, ppp_delete);
+static MP_DEFINE_CONST_FUN_OBJ_1(network_ppp_disconnect_obj, network_ppp_disconnect);
+
+static mp_obj_t network_ppp_isconnected(mp_obj_t self_in) {
+    network_ppp_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    return mp_obj_new_bool(self->state == STATE_CONNECTED);
+}
+static MP_DEFINE_CONST_FUN_OBJ_1(network_ppp_isconnected_obj, network_ppp_isconnected);
 
-static mp_obj_t ppp_ifconfig(size_t n_args, const mp_obj_t *args) {
-    ppp_if_obj_t *self = MP_OBJ_TO_PTR(args[0]);
+static mp_obj_t network_ppp_ifconfig(size_t n_args, const mp_obj_t *args) {
+    network_ppp_obj_t *self = MP_OBJ_TO_PTR(args[0]);
     if (n_args == 1) {
         // get
         const ip_addr_t *dns;
@@ -282,11 +403,11 @@ static mp_obj_t ppp_ifconfig(size_t n_args, const mp_obj_t *args) {
         return mp_const_none;
     }
 }
-MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(ppp_ifconfig_obj, 1, 2, ppp_ifconfig);
+static MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(network_ppp_ifconfig_obj, 1, 2, network_ppp_ifconfig);
 
-static mp_obj_t ppp_ipconfig(size_t n_args, const mp_obj_t *args, mp_map_t *kwargs) {
+static mp_obj_t network_ppp_ipconfig(size_t n_args, const mp_obj_t *args, mp_map_t *kwargs) {
+    network_ppp_obj_t *self = MP_OBJ_TO_PTR(args[0]);
     if (kwargs->used == 0) {
-        ppp_if_obj_t *self = MP_OBJ_TO_PTR(args[0]);
         if (self->pcb == NULL) {
             mp_raise_ValueError(MP_ERROR_TEXT("PPP not active"));
         }
@@ -318,94 +439,64 @@ static mp_obj_t ppp_ipconfig(size_t n_args, const mp_obj_t *args, mp_map_t *kwar
     }
     return mp_const_none;
 }
-static MP_DEFINE_CONST_FUN_OBJ_KW(ppp_ipconfig_obj, 1, ppp_ipconfig);
+static MP_DEFINE_CONST_FUN_OBJ_KW(network_ppp_ipconfig_obj, 1, network_ppp_ipconfig);
 
-static mp_obj_t ppp_status(mp_obj_t self_in) {
-    return mp_const_none;
-}
-static MP_DEFINE_CONST_FUN_OBJ_1(ppp_status_obj, ppp_status);
-
-static mp_obj_t ppp_isconnected(mp_obj_t self_in) {
-    ppp_if_obj_t *self = MP_OBJ_TO_PTR(self_in);
-    return mp_obj_new_bool(self->connected);
-}
-static MP_DEFINE_CONST_FUN_OBJ_1(ppp_isconnected_obj, ppp_isconnected);
-
-static mp_obj_t ppp_config(size_t n_args, const mp_obj_t *args, mp_map_t *kwargs) {
-    if (n_args != 1 && kwargs->used != 0) {
-        mp_raise_TypeError(MP_ERROR_TEXT("either pos or kw args are allowed"));
-    }
-    ppp_if_obj_t *self = MP_OBJ_TO_PTR(args[0]);
-
-    if (kwargs->used != 0) {
-        for (size_t i = 0; i < kwargs->alloc; i++) {
-            if (mp_map_slot_is_filled(kwargs, i)) {
-                switch (mp_obj_str_get_qstr(kwargs->table[i].key)) {
-                    case MP_QSTR_stream: {
-                        if (kwargs->table[i].value != mp_const_none) {
-                            mp_get_stream_raise(kwargs->table[i].value, MP_STREAM_OP_READ | MP_STREAM_OP_WRITE);
-                        }
-                        self->stream = kwargs->table[i].value;
-                        break;
-                    }
-                    default:
-                        break;
-                }
+static mp_obj_t network_ppp_active(size_t n_args, const mp_obj_t *args) {
+    network_ppp_obj_t *self = MP_OBJ_TO_PTR(args[0]);
+    if (n_args > 1) {
+        if (mp_obj_is_true(args[1])) {
+            if (self->state >= STATE_ACTIVE) {
+                return mp_const_true;
             }
-        }
-        return mp_const_none;
-    }
 
-    if (n_args != 2) {
-        mp_raise_TypeError(MP_ERROR_TEXT("can query only one param"));
-    }
-
-    mp_obj_t val = mp_const_none;
+            self->pcb = pppapi_pppos_create(&self->netif, network_ppp_output_callback, network_ppp_status_cb, self);
+            if (self->pcb == NULL) {
+                mp_raise_msg(&mp_type_OSError, MP_ERROR_TEXT("pppos_create failed"));
+            }
+            self->state = STATE_ACTIVE;
 
-    switch (mp_obj_str_get_qstr(args[1])) {
-        case MP_QSTR_stream: {
-            val = self->stream;
-            break;
-        }
-        case MP_QSTR_ifname: {
-            if (self->pcb != NULL) {
-                struct netif *pppif = ppp_netif(self->pcb);
-                char ifname[NETIF_NAMESIZE + 1] = {0};
-                netif_index_to_name(netif_get_index(pppif), ifname);
-                if (ifname[0] != 0) {
-                    val = mp_obj_new_str_from_cstr((char *)ifname);
-                }
+            network_ppp_stream_uart_irq_enable(self);
+        } else {
+            if (self->state < STATE_ACTIVE) {
+                return mp_const_false;
             }
-            break;
+
+            network_ppp___del__(MP_OBJ_FROM_PTR(self));
         }
-        default:
-            mp_raise_ValueError(MP_ERROR_TEXT("unknown config param"));
     }
-
-    return val;
+    return mp_obj_new_bool(self->state >= STATE_ACTIVE);
 }
-static MP_DEFINE_CONST_FUN_OBJ_KW(ppp_config_obj, 1, ppp_config);
-
-static const mp_rom_map_elem_t ppp_if_locals_dict_table[] = {
-    { MP_ROM_QSTR(MP_QSTR_active), MP_ROM_PTR(&ppp_active_obj) },
-    { MP_ROM_QSTR(MP_QSTR_connect), MP_ROM_PTR(&ppp_connect_obj) },
-    { MP_ROM_QSTR(MP_QSTR_isconnected), MP_ROM_PTR(&ppp_isconnected_obj) },
-    { MP_ROM_QSTR(MP_QSTR_status), MP_ROM_PTR(&ppp_status_obj) },
-    { MP_ROM_QSTR(MP_QSTR_config), MP_ROM_PTR(&ppp_config_obj) },
-    { MP_ROM_QSTR(MP_QSTR_ifconfig), MP_ROM_PTR(&ppp_ifconfig_obj) },
-    { MP_ROM_QSTR(MP_QSTR_ipconfig), MP_ROM_PTR(&ppp_ipconfig_obj) },
-    { MP_ROM_QSTR(MP_QSTR___del__), MP_ROM_PTR(&ppp_delete_obj) },
+static MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(network_ppp_active_obj, 1, 2, network_ppp_active);
+
+static const mp_rom_map_elem_t network_ppp_locals_dict_table[] = {
+    { MP_ROM_QSTR(MP_QSTR___del__), MP_ROM_PTR(&network_ppp___del___obj) },
+    { MP_ROM_QSTR(MP_QSTR_config), MP_ROM_PTR(&network_ppp_config_obj) },
+    { MP_ROM_QSTR(MP_QSTR_status), MP_ROM_PTR(&network_ppp_status_obj) },
+    { MP_ROM_QSTR(MP_QSTR_connect), MP_ROM_PTR(&network_ppp_connect_obj) },
+    { MP_ROM_QSTR(MP_QSTR_disconnect), MP_ROM_PTR(&network_ppp_disconnect_obj) },
+    { MP_ROM_QSTR(MP_QSTR_isconnected), MP_ROM_PTR(&network_ppp_isconnected_obj) },
+    { MP_ROM_QSTR(MP_QSTR_ifconfig), MP_ROM_PTR(&network_ppp_ifconfig_obj) },
+    { MP_ROM_QSTR(MP_QSTR_ipconfig), MP_ROM_PTR(&network_ppp_ipconfig_obj) },
+    { MP_ROM_QSTR(MP_QSTR_poll), MP_ROM_PTR(&network_ppp_poll_obj) },
+
+    { MP_ROM_QSTR(MP_QSTR_SEC_NONE), MP_ROM_INT(PPPAUTHTYPE_NONE) },
+    { MP_ROM_QSTR(MP_QSTR_SEC_PAP), MP_ROM_INT(PPPAUTHTYPE_PAP) },
+    { MP_ROM_QSTR(MP_QSTR_SEC_CHAP), MP_ROM_INT(PPPAUTHTYPE_CHAP) },
+
+    // Deprecated interface for backwards compatibility
+    { MP_ROM_QSTR(MP_QSTR_active), MP_ROM_PTR(&network_ppp_active_obj) },
     { MP_ROM_QSTR(MP_QSTR_AUTH_NONE), MP_ROM_INT(PPPAUTHTYPE_NONE) },
     { MP_ROM_QSTR(MP_QSTR_AUTH_PAP), MP_ROM_INT(PPPAUTHTYPE_PAP) },
     { MP_ROM_QSTR(MP_QSTR_AUTH_CHAP), MP_ROM_INT(PPPAUTHTYPE_CHAP) },
 };
-static MP_DEFINE_CONST_DICT(ppp_if_locals_dict, ppp_if_locals_dict_table);
+static MP_DEFINE_CONST_DICT(network_ppp_locals_dict, network_ppp_locals_dict_table);
 
 MP_DEFINE_CONST_OBJ_TYPE(
-    ppp_if_type,
+    esp_network_ppp_lwip_type,
     MP_QSTR_PPP,
     MP_TYPE_FLAG_NONE,
-    locals_dict, &ppp_if_locals_dict
+    make_new, network_ppp_make_new,
+    locals_dict, &network_ppp_locals_dict
     );
 
 #endif
diff --git a/ports/esp32/partitions-4MiB-romfs.csv b/ports/esp32/partitions-4MiB-romfs.csv
new file mode 100644
index 0000000000000..dd02506e54684
--- /dev/null
+++ b/ports/esp32/partitions-4MiB-romfs.csv
@@ -0,0 +1,8 @@
+# Notes: the offset of the partition table itself is set in
+# $IDF_PATH/components/partition_table/Kconfig.projbuild.
+# Name,   Type, SubType, Offset,  Size, Flags
+nvs,      data, nvs,     0x9000,  0x6000,
+phy_init, data, phy,     0xf000,  0x1000,
+factory,  app,  factory, 0x10000, 0x1D0000,
+romfs,    data, 0x8f,    0x1E0000, 0x20000,
+vfs,      data, fat,     0x200000, 0x200000,
diff --git a/ports/esp32/tools/metrics_esp32.py b/ports/esp32/tools/metrics_esp32.py
index 66a6a588ba212..9efaae63a9baf 100755
--- a/ports/esp32/tools/metrics_esp32.py
+++ b/ports/esp32/tools/metrics_esp32.py
@@ -32,11 +32,12 @@
 # column of the table is really D/IRAM.
 import os
 import re
+import shutil
 import sys
 import subprocess
 from dataclasses import dataclass
 
-IDF_VERS = ("v5.2.2",)
+IDF_VERS = ("v5.4.1",)
 
 BUILDS = (
     ("ESP32_GENERIC", ""),
@@ -47,6 +48,13 @@
 )
 
 
+def rmtree(path):
+    try:
+        shutil.rmtree(path)
+    except FileNotFoundError:
+        pass
+
+
 @dataclass
 class BuildSizes:
     idf_ver: str
@@ -99,7 +107,7 @@ def __lt__(self, other):
 
     def build_dir(self):
         if self.variant:
-            return f"build-{self.board}_{self.variant}"
+            return f"build-{self.board}-{self.variant}"
         else:
             return f"build-{self.board}"
 
@@ -124,12 +132,23 @@ def run_make(self, target):
     def make_size(self):
         try:
             size_out = self.run_make("size")
-            # "Used static DRAM:" or "Used stat D/IRAM:"
-            RE_DRAM = r"Used stat(?:ic)? D.*: *(\d+) bytes"
-            RE_IRAM = r"Used static IRAM: *(\d+) bytes"
+            try:
+                # pre IDF v5.4 size output
+                # "Used static DRAM:" or "Used stat D/IRAM:"
+                RE_DRAM = r"Used stat(?:ic)? D.*: *(\d+) bytes"
+                RE_IRAM = r"Used static IRAM: *(\d+) bytes"
+                self.dram_size = re.search(RE_DRAM, size_out).group(1)
+                self.iram_size = re.search(RE_IRAM, size_out).group(1)
+            except AttributeError:
+                # IDF v5.4 size output is much nicer formatted
+                # Note the pipes in these expressions are not the ASCII/RE |
+                RE_DRAM = r"│ *DI?RAM *│ *(\d+)"
+                RE_IRAM = r"│ *IRAM *│ *(\d+)"
+                self.dram_size = re.search(RE_DRAM, size_out).group(1)
+                self.iram_size = re.search(RE_IRAM, size_out).group(1)
+
+            # This line is the same on before/after versions
             RE_BIN = r"Total image size: *(\d+) bytes"
-            self.dram_size = re.search(RE_DRAM, size_out).group(1)
-            self.iram_size = re.search(RE_IRAM, size_out).group(1)
             self.bin_size = re.search(RE_BIN, size_out).group(1)
         except subprocess.CalledProcessError:
             self.bin_size = "build failed"
@@ -139,13 +158,26 @@ def main(do_clean):
     if "IDF_PATH" not in os.environ:
         raise RuntimeError("IDF_PATH must be set")
 
+    if not os.path.exists("Makefile"):
+        raise RuntimeError(
+            "This script must be run from the ports/esp32 directory, i.e. as ./tools/metrics_esp32.py"
+        )
+
+    if "IDF_PYTHON_ENV_PATH" in os.environ:
+        raise RuntimeError(
+            "Run this script without any existing ESP-IDF environment active/exported."
+        )
+
     sizes = []
     for idf_ver in IDF_VERS:
         switch_ver(idf_ver)
+        rmtree("managed_components")
         for board, variant in BUILDS:
             print(f"Building '{board}'/'{variant}'...", file=sys.stderr)
             result = BuildSizes(idf_ver, board, variant)
-            result.run_make("clean")
+            # Rather than running the 'clean' target, delete the build directory to avoid
+            # environment version mismatches, etc.
+            rmtree(result.build_dir())
             result.make_size()
             result.print_summary()
             sizes.append(result)
diff --git a/ports/esp8266/Makefile b/ports/esp8266/Makefile
index 1721075eae172..1c9de01503abd 100644
--- a/ports/esp8266/Makefile
+++ b/ports/esp8266/Makefile
@@ -134,6 +134,7 @@ SRC_C = \
 	fatfs_port.c \
 	posix_helpers.c \
 	hspi.c \
+	vfs_rom_ioctl.c \
 	$(wildcard $(BOARD_DIR)/*.c) \
 
 ifeq ($(MICROPY_PY_ESPNOW),1)
diff --git a/ports/esp8266/boards/ESP8266_GENERIC/board.json b/ports/esp8266/boards/ESP8266_GENERIC/board.json
index 2b3a6b5507db8..8f2aa1240f280 100644
--- a/ports/esp8266/boards/ESP8266_GENERIC/board.json
+++ b/ports/esp8266/boards/ESP8266_GENERIC/board.json
@@ -17,7 +17,8 @@
     "variants": {
         "OTA": "OTA compatible",
         "FLASH_1M": "1MiB flash",
-        "FLASH_512K": "512kiB flash"
+        "FLASH_512K": "512kiB flash",
+        "FLASH_2M_ROMFS": "2MiB flash with ROMFS"
     },
     "vendor": "Espressif"
 }
diff --git a/ports/esp8266/boards/ESP8266_GENERIC/mpconfigvariant_FLASH_2M_ROMFS.mk b/ports/esp8266/boards/ESP8266_GENERIC/mpconfigvariant_FLASH_2M_ROMFS.mk
new file mode 100644
index 0000000000000..9ee3566d8bf35
--- /dev/null
+++ b/ports/esp8266/boards/ESP8266_GENERIC/mpconfigvariant_FLASH_2M_ROMFS.mk
@@ -0,0 +1,12 @@
+LD_FILES = boards/esp8266_2MiB_ROMFS.ld
+
+MICROPY_PY_ESPNOW ?= 1
+MICROPY_PY_BTREE ?= 1
+MICROPY_VFS_FAT ?= 1
+MICROPY_VFS_LFS2 ?= 1
+
+# Add asyncio and extra micropython-lib packages (in addition to the port manifest).
+FROZEN_MANIFEST ?= $(BOARD_DIR)/manifest_2MiB.py
+
+# Configure mpconfigboard.h.
+CFLAGS += -DMICROPY_ESP8266_2M -DMICROPY_VFS_ROM=1
diff --git a/ports/esp8266/boards/esp8266_2MiB_ROMFS.ld b/ports/esp8266/boards/esp8266_2MiB_ROMFS.ld
new file mode 100644
index 0000000000000..ce057981aba88
--- /dev/null
+++ b/ports/esp8266/boards/esp8266_2MiB_ROMFS.ld
@@ -0,0 +1,24 @@
+/* GNU linker script for ESP8266 with 2M or more flash, and includes a ROMFS partition
+
+   Flash layout:
+    0x40200000 36k  header + iram/dram init
+    0x40209000 668k firmware (irom0)
+    0x402c0000 320k ROMFS
+    0x40300000 1M+  filesystem (not memory mapped)
+*/
+
+MEMORY
+{
+    dport0_0_seg : org = 0x3ff00000, len = 16
+    dram0_0_seg :  org = 0x3ffe8000, len = 80K
+    iram1_0_seg :  org = 0x40100000, len = 32K
+    irom0_0_seg :  org = 0x40209000, len = 1M - 36K - 320K
+    FLASH_ROMFS :  org = 0x402b0000, len = 320K
+}
+
+/* define ROMFS extents */
+_micropy_hw_romfs_part0_start = ORIGIN(FLASH_ROMFS);
+_micropy_hw_romfs_part0_size = LENGTH(FLASH_ROMFS);
+
+/* define common sections and symbols */
+INCLUDE boards/esp8266_common.ld
diff --git a/ports/esp8266/boards/esp8266_common.ld b/ports/esp8266/boards/esp8266_common.ld
index cf4883acc9d20..206c3f14b430e 100644
--- a/ports/esp8266/boards/esp8266_common.ld
+++ b/ports/esp8266/boards/esp8266_common.ld
@@ -170,6 +170,7 @@ SECTIONS
         *modonewire.o(.literal* .text*)
         *network_wlan.o(.literal* .text*)
         *esp_mphal.o(.literal* .text*)
+        *vfs_rom_ioctl.o(.literal* .text*)
 
         /* we put as much rodata as possible in this section */
         /* note that only rodata accessed as a machine word is allowed here */
diff --git a/ports/esp8266/esp_init_data.c b/ports/esp8266/esp_init_data.c
index c369ed58f515f..a3dd6ffed1ea4 100644
--- a/ports/esp8266/esp_init_data.c
+++ b/ports/esp8266/esp_init_data.c
@@ -30,7 +30,7 @@
 #include "user_interface.h"
 #include "extmod/misc.h"
 
-NORETURN void call_user_start(void);
+MP_NORETURN void call_user_start(void);
 void ets_printf(const char *fmt, ...);
 extern char flashchip;
 
diff --git a/ports/esp8266/esp_mphal.h b/ports/esp8266/esp_mphal.h
index e677fa450d339..0a4f92ac0bf29 100644
--- a/ports/esp8266/esp_mphal.h
+++ b/ports/esp8266/esp_mphal.h
@@ -100,6 +100,13 @@ void mp_hal_pin_open_drain(mp_hal_pin_obj_t pin);
         else { gpio_output_set(1 << (p), 0, 1 << (p), 0); } \
 } while (0)
 #define mp_hal_pin_read(p) pin_get(p)
+static inline int mp_hal_pin_read_output(mp_hal_pin_obj_t pin) {
+    if (pin >= 16) {
+        return READ_PERI_REG(RTC_GPIO_OUT) & 1;
+    } else {
+        return (GPIO_REG_READ(GPIO_OUT_ADDRESS) >> pin) & 1;
+    }
+}
 #define mp_hal_pin_write(p, v) pin_set((p), (v))
 
 void *ets_get_esf_buf_ctlblk(void);
diff --git a/ports/esp8266/machine_pin.c b/ports/esp8266/machine_pin.c
index ec22c7c588c4e..658966679d1ae 100644
--- a/ports/esp8266/machine_pin.c
+++ b/ports/esp8266/machine_pin.c
@@ -373,6 +373,14 @@ static mp_obj_t pyb_pin_on(mp_obj_t self_in) {
 }
 static MP_DEFINE_CONST_FUN_OBJ_1(pyb_pin_on_obj, pyb_pin_on);
 
+// pin.toggle()
+static mp_obj_t machine_pin_toggle(mp_obj_t self_in) {
+    pyb_pin_obj_t *self = self_in;
+    pin_set(self->phys_port, 1 - mp_hal_pin_read_output(self->phys_port));
+    return mp_const_none;
+}
+static MP_DEFINE_CONST_FUN_OBJ_1(machine_pin_toggle_obj, machine_pin_toggle);
+
 // pin.irq(handler=None, trigger=IRQ_FALLING|IRQ_RISING, hard=False)
 static mp_obj_t pyb_pin_irq(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
     enum { ARG_handler, ARG_trigger, ARG_hard };
@@ -435,6 +443,7 @@ static const mp_rom_map_elem_t pyb_pin_locals_dict_table[] = {
     { MP_ROM_QSTR(MP_QSTR_value),   MP_ROM_PTR(&pyb_pin_value_obj) },
     { MP_ROM_QSTR(MP_QSTR_off),     MP_ROM_PTR(&pyb_pin_off_obj) },
     { MP_ROM_QSTR(MP_QSTR_on),      MP_ROM_PTR(&pyb_pin_on_obj) },
+    { MP_ROM_QSTR(MP_QSTR_toggle), MP_ROM_PTR(&machine_pin_toggle_obj) },
     { MP_ROM_QSTR(MP_QSTR_irq),     MP_ROM_PTR(&pyb_pin_irq_obj) },
 
     // class constants
diff --git a/ports/esp8266/main.c b/ports/esp8266/main.c
index 2dd7c1dece3a4..da712fce9be15 100644
--- a/ports/esp8266/main.c
+++ b/ports/esp8266/main.c
@@ -49,6 +49,64 @@
 
 static char heap[38 * 1024];
 
+#if MICROPY_HW_HARD_FAULT_DEBUG
+
+static void format_hex(uint32_t hex, char *buffer) {
+    static const char table[] = { '0', '1', '2', '3', '4', '5', '6', '7', '8', '9', 'A', 'B', 'C', 'D', 'E', 'F' };
+    int offset = 7;
+    uint32_t value = hex;
+    while (offset >= 0) {
+        buffer[offset--] = table[value & 0x0F];
+        value >>= 4;
+    }
+}
+
+static void print_reset_info(void) {
+    struct rst_info *rst_info = system_get_rst_info();
+    if ((rst_info->reason == REASON_WDT_RST) || (rst_info->reason == REASON_EXCEPTION_RST) || (rst_info->reason == REASON_SOFT_WDT_RST)) {
+        char buffer[8];
+        mp_hal_stdout_tx_str("\r\n\r\nThe system restarted due to an error.\r\n\r\nReason: ");
+        switch (rst_info->reason) {
+            case REASON_WDT_RST:
+                mp_hal_stdout_tx_str("WDT");
+                break;
+
+            case REASON_EXCEPTION_RST:
+                mp_hal_stdout_tx_str("EXCEPTION");
+                break;
+
+            case REASON_SOFT_WDT_RST:
+                mp_hal_stdout_tx_str("SOFT_WDT");
+                break;
+
+            default:
+                assert(!"Should not ever get here.");
+                break;
+        }
+        mp_hal_stdout_tx_str(" Cause: ");
+        format_hex(rst_info->exccause, buffer);
+        mp_hal_stdout_tx_strn(buffer, sizeof(buffer));
+        mp_hal_stdout_tx_str(" EPC1: ");
+        format_hex(rst_info->epc1, buffer);
+        mp_hal_stdout_tx_strn(buffer, sizeof(buffer));
+        mp_hal_stdout_tx_str(" EPC2: ");
+        format_hex(rst_info->epc2, buffer);
+        mp_hal_stdout_tx_strn(buffer, sizeof(buffer));
+        mp_hal_stdout_tx_str(" EPC3: ");
+        format_hex(rst_info->epc3, buffer);
+        mp_hal_stdout_tx_strn(buffer, sizeof(buffer));
+        mp_hal_stdout_tx_str(" Exception Vector address: ");
+        format_hex(rst_info->excvaddr, buffer);
+        mp_hal_stdout_tx_strn(buffer, sizeof(buffer));
+        mp_hal_stdout_tx_str(" DEPC: ");
+        format_hex(rst_info->depc, buffer);
+        mp_hal_stdout_tx_strn(buffer, sizeof(buffer));
+        mp_hal_stdout_tx_str("\r\n\r\n");
+    }
+}
+
+#endif
+
 static void mp_reset(void) {
     mp_stack_set_top((void *)0x40000000);
     mp_stack_set_limit(8192);
@@ -114,6 +172,10 @@ void init_done(void) {
     pyexec_event_repl_init();
     #endif
 
+    #if MICROPY_HW_HARD_FAULT_DEBUG
+    print_reset_info();
+    #endif
+
     #if !MICROPY_REPL_EVENT_DRIVEN
 soft_reset:
     for (;;) {
diff --git a/ports/esp8266/modesp.c b/ports/esp8266/modesp.c
index f303da1a33289..e1f9d39687593 100644
--- a/ports/esp8266/modesp.c
+++ b/ports/esp8266/modesp.c
@@ -164,9 +164,16 @@ static MP_DEFINE_CONST_FUN_OBJ_0(esp_flash_size_obj, esp_flash_size);
 #define IS_OTA_FIRMWARE() ((*(uint32_t *)0x40200000 & 0xff00) == 0x100)
 
 extern byte _firmware_size[];
+#if MICROPY_VFS_ROM_IOCTL
+extern uint8_t _micropy_hw_romfs_part0_size;
+#endif
 
 static mp_obj_t esp_flash_user_start(void) {
-    return MP_OBJ_NEW_SMALL_INT((uint32_t)_firmware_size);
+    uint32_t flash_user_start = (uint32_t)_firmware_size;
+    #if MICROPY_VFS_ROM_IOCTL
+    flash_user_start += (uint32_t)&_micropy_hw_romfs_part0_size;
+    #endif
+    return MP_OBJ_NEW_SMALL_INT(flash_user_start);
 }
 static MP_DEFINE_CONST_FUN_OBJ_0(esp_flash_user_start_obj, esp_flash_user_start);
 
diff --git a/ports/esp8266/modmachine.c b/ports/esp8266/modmachine.c
index 23ccf8cebfb0d..6ac17da457622 100644
--- a/ports/esp8266/modmachine.c
+++ b/ports/esp8266/modmachine.c
@@ -71,7 +71,7 @@ static void mp_machine_set_freq(size_t n_args, const mp_obj_t *args) {
     system_update_cpu_freq(freq);
 }
 
-NORETURN static void mp_machine_reset(void) {
+MP_NORETURN static void mp_machine_reset(void) {
     system_restart();
 
     // we must not return
@@ -114,7 +114,7 @@ static void mp_machine_lightsleep(size_t n_args, const mp_obj_t *args) {
     }
 }
 
-NORETURN static void mp_machine_deepsleep(size_t n_args, const mp_obj_t *args) {
+MP_NORETURN static void mp_machine_deepsleep(size_t n_args, const mp_obj_t *args) {
     // default to sleep forever
     uint32_t sleep_us = 0;
 
diff --git a/ports/esp8266/mpconfigport.h b/ports/esp8266/mpconfigport.h
index 83d80a7c963f6..03f3bb643d19b 100644
--- a/ports/esp8266/mpconfigport.h
+++ b/ports/esp8266/mpconfigport.h
@@ -117,6 +117,9 @@
 #define MICROPY_FATFS_LFN_CODE_PAGE    437 /* 1=SFN/ANSI 437=LFN/U.S.(OEM) */
 #define MICROPY_ESP8266_APA102         (1)
 
+// Print error information at reboot time if the board crashed.
+#define MICROPY_HW_HARD_FAULT_DEBUG    (0)
+
 // No blocking wait-for-event on ESP8266, only non-blocking pump of the "OS" event
 // loop
 //
diff --git a/ports/esp8266/network_wlan.c b/ports/esp8266/network_wlan.c
index 7131b88bac9ab..9084f246feaae 100644
--- a/ports/esp8266/network_wlan.c
+++ b/ports/esp8266/network_wlan.c
@@ -170,6 +170,29 @@ static mp_obj_t esp_disconnect(mp_obj_t self_in) {
 }
 static MP_DEFINE_CONST_FUN_OBJ_1(esp_disconnect_obj, esp_disconnect);
 
+static void build_stations_list_cleanup_callback(void *station_info) {
+    if (station_info != NULL) {
+        wifi_softap_free_station_info();
+    }
+}
+
+static mp_obj_t build_stations_list(void) {
+    struct station_info *info = wifi_softap_get_station_info();
+    MP_DEFINE_NLR_JUMP_CALLBACK_FUNCTION_1(ctx, build_stations_list_cleanup_callback, (void *)info);
+    nlr_push_jump_callback(&ctx.callback, mp_call_function_1_from_nlr_jump_callback);
+    mp_obj_list_t *stations = MP_OBJ_TO_PTR(mp_obj_new_list(0, NULL));
+    struct station_info *current = info;
+    mp_obj_t entry[2] = { 0 };
+    while (current != NULL) {
+        entry[0] = mp_obj_new_bytes(current->bssid, sizeof(current->bssid));
+        entry[1] = netutils_format_ipv4_addr((uint8_t *)&current->ip.addr, NETUTILS_BIG);
+        mp_obj_list_append(stations, mp_obj_new_tuple(2, entry));
+        current = STAILQ_NEXT(current, next);
+    }
+    nlr_pop_jump_callback(true);
+    return MP_OBJ_FROM_PTR(stations);
+}
+
 static mp_obj_t esp_status(size_t n_args, const mp_obj_t *args) {
     wlan_if_obj_t *self = MP_OBJ_TO_PTR(args[0]);
     if (n_args == 1) {
@@ -185,6 +208,12 @@ static mp_obj_t esp_status(size_t n_args, const mp_obj_t *args) {
                 if (self->if_id == STATION_IF) {
                     return MP_OBJ_NEW_SMALL_INT(wifi_station_get_rssi());
                 }
+                break;
+            case MP_QSTR_stations:
+                if (self->if_id == SOFTAP_IF) {
+                    return build_stations_list();
+                }
+                break;
         }
         mp_raise_ValueError(MP_ERROR_TEXT("unknown status param"));
     }
diff --git a/ports/esp8266/vfs_rom_ioctl.c b/ports/esp8266/vfs_rom_ioctl.c
new file mode 100644
index 0000000000000..eb260cb50f471
--- /dev/null
+++ b/ports/esp8266/vfs_rom_ioctl.c
@@ -0,0 +1,89 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024-2025 Damien P. George
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "py/mperrno.h"
+#include "py/objarray.h"
+#include "extmod/vfs.h"
+#include "ets_alt_task.h"
+#include "user_interface.h"
+
+#if MICROPY_VFS_ROM_IOCTL
+
+#define FLASH_MEM_BASE (0x40200000)
+#define FLASH_PAGE_SIZE (4096)
+
+#define MICROPY_HW_ROMFS_BASE (uintptr_t)(&_micropy_hw_romfs_part0_start)
+#define MICROPY_HW_ROMFS_BYTES (uintptr_t)(&_micropy_hw_romfs_part0_size)
+
+#define ROMFS_SPI_FLASH_OFFSET (MICROPY_HW_ROMFS_BASE - FLASH_MEM_BASE)
+
+extern uint8_t _micropy_hw_romfs_part0_start;
+extern uint8_t _micropy_hw_romfs_part0_size;
+
+static const MP_DEFINE_MEMORYVIEW_OBJ(romfs_obj, 'B', 0, MICROPY_HW_ROMFS_BYTES, (void *)MICROPY_HW_ROMFS_BASE);
+
+mp_obj_t mp_vfs_rom_ioctl(size_t n_args, const mp_obj_t *args) {
+    switch (mp_obj_get_int(args[0])) {
+        case MP_VFS_ROM_IOCTL_GET_NUMBER_OF_SEGMENTS:
+            return MP_OBJ_NEW_SMALL_INT(1);
+
+        case MP_VFS_ROM_IOCTL_GET_SEGMENT:
+            return MP_OBJ_FROM_PTR(&romfs_obj);
+
+        case MP_VFS_ROM_IOCTL_WRITE_PREPARE: {
+            uint32_t dest = ROMFS_SPI_FLASH_OFFSET;
+            uint32_t dest_max = dest + mp_obj_get_int(args[2]);
+            while (dest < dest_max) {
+                ets_loop_iter(); // flash access takes time so run any pending tasks
+                SpiFlashOpResult res = spi_flash_erase_sector(dest / FLASH_PAGE_SIZE);
+                ets_loop_iter();
+                if (res != SPI_FLASH_RESULT_OK) {
+                    return MP_OBJ_NEW_SMALL_INT(res == SPI_FLASH_RESULT_TIMEOUT ? -MP_ETIMEDOUT : -MP_EIO);
+                }
+                dest += FLASH_PAGE_SIZE;
+            }
+            return MP_OBJ_NEW_SMALL_INT(4); // minimum write size
+        }
+
+        case MP_VFS_ROM_IOCTL_WRITE: {
+            mp_int_t offset = ROMFS_SPI_FLASH_OFFSET + mp_obj_get_int(args[2]);
+            mp_buffer_info_t bufinfo;
+            mp_get_buffer_raise(args[3], &bufinfo, MP_BUFFER_READ);
+            ets_loop_iter(); // flash access takes time so run any pending tasks
+            SpiFlashOpResult res = spi_flash_write(offset, bufinfo.buf, (bufinfo.len + 3) & ~3);
+            ets_loop_iter();
+            if (res == SPI_FLASH_RESULT_OK) {
+                return MP_OBJ_NEW_SMALL_INT(0);
+            }
+            return MP_OBJ_NEW_SMALL_INT(res == SPI_FLASH_RESULT_TIMEOUT ? -MP_ETIMEDOUT : -MP_EIO);
+        }
+
+        default:
+            return MP_OBJ_NEW_SMALL_INT(-MP_EINVAL);
+    }
+}
+
+#endif // MICROPY_VFS_ROM_IOCTL
diff --git a/ports/mimxrt/Makefile b/ports/mimxrt/Makefile
index 8106ab4f3ff03..7788b54ca57ff 100644
--- a/ports/mimxrt/Makefile
+++ b/ports/mimxrt/Makefile
@@ -326,6 +326,8 @@ SRC_SS = \
 
 SRC_S += shared/runtime/gchelper_thumb2.s \
 
+hal/resethandler_MIMXRT10xx.S: $(GEN_FLEXRAM_CONFIG_SRC)
+
 # =============================================================================
 # QSTR Sources
 # =============================================================================
@@ -520,16 +522,16 @@ $(BUILD)/firmware.uf2: $(BUILD)/firmware.elf
 # any of the objects. The normal dependency generation will deal with the
 # case when pins.h is modified. But when it doesn't exist, we don't know
 # which source files might need it.
-$(OBJ): | $(GEN_PINS_HDR) $(GEN_FLEXRAM_CONFIG_SRC)
+$(OBJ): | $(GEN_PINS_HDR)
 
 # With conditional pins, we may need to regenerate qstrdefs.h when config
 # options change.
 $(HEADER_BUILD)/qstrdefs.generated.h: $(BOARD_DIR)/mpconfigboard.h
 
-$(GEN_FLEXRAM_CONFIG_SRC):
+$(GEN_FLEXRAM_CONFIG_SRC): $(HEADER_BUILD)
 	$(ECHO) "Create $@"
 	$(Q)$(PYTHON) $(MAKE_FLEXRAM_LD) -d $(TOP)/$(MCU_DIR)/$(MCU_SERIES)$(MCU_CORE).h \
-		-f $(TOP)/$(MCU_DIR)/$(MCU_SERIES)$(MCU_CORE)_features.h -l boards/$(MCU_SERIES).ld -c $(MCU_SERIES) > $(GEN_FLEXRAM_CONFIG_SRC)
+		-f $(TOP)/$(MCU_DIR)/$(MCU_SERIES)$(MCU_CORE)_features.h -l boards/$(MCU_SERIES).ld -c $(MCU_SERIES) > $@
 
 # Use a pattern rule here so that make will only call make-pins.py once to make
 # both pins_gen.c and pins.h
diff --git a/ports/mimxrt/boards/ADAFRUIT_METRO_M7/board.json b/ports/mimxrt/boards/ADAFRUIT_METRO_M7/board.json
index 9f260b3a00f9b..804b4fd734373 100644
--- a/ports/mimxrt/boards/ADAFRUIT_METRO_M7/board.json
+++ b/ports/mimxrt/boards/ADAFRUIT_METRO_M7/board.json
@@ -15,7 +15,7 @@
         "Metro_M7.jpg"
     ],
     "mcu": "mimxrt",
-    "product": "Adafruit Metro M7",
+    "product": "Metro M7",
     "thumbnail": "",
     "url": "https://www.adafruit.com/product/4950",
     "vendor": "Adafruit"
diff --git a/ports/mimxrt/boards/ADAFRUIT_METRO_M7/deploy_metro_m7.md b/ports/mimxrt/boards/ADAFRUIT_METRO_M7/deploy_metro_m7.md
index c5bfd1a28a79f..a2d6f5c824f0b 100644
--- a/ports/mimxrt/boards/ADAFRUIT_METRO_M7/deploy_metro_m7.md
+++ b/ports/mimxrt/boards/ADAFRUIT_METRO_M7/deploy_metro_m7.md
@@ -8,4 +8,8 @@ here: https://learn.adafruit.com/adafruit-metro-m7-microsd/installing-the-bootlo
 
 Once the bootloader is installed and started, you can install MicroPython
 by copying the .uf2 version of the firmware file to the bootloader
-drive. When the firmware is installed, the drive will disappear.
+drive. A LED on the board will start flickering, indicating that the
+upload is ongoing. Once the upload is complete, the drive icon will
+disappear. Wait until the LED stops flickering. In rare cases there
+may be an error message coming up, especially when there are only few
+or no changes in the firmware file. Then just repeat the upload.
\ No newline at end of file
diff --git a/ports/mimxrt/boards/ADAFRUIT_METRO_M7/mpconfigboard.h b/ports/mimxrt/boards/ADAFRUIT_METRO_M7/mpconfigboard.h
index 784373c939478..1ce06e7f408d7 100644
--- a/ports/mimxrt/boards/ADAFRUIT_METRO_M7/mpconfigboard.h
+++ b/ports/mimxrt/boards/ADAFRUIT_METRO_M7/mpconfigboard.h
@@ -52,7 +52,7 @@
     { IOMUXC_GPIO_02_LPI2C1_SCL }, { IOMUXC_GPIO_01_LPI2C1_SDA }, \
     { IOMUXC_GPIO_10_LPI2C2_SCL }, { IOMUXC_GPIO_09_LPI2C2_SDA },
 
-// Wifi Deinitions
+// Wifi Definitions
 #define MICROPY_PY_NETWORK_HOSTNAME_DEFAULT "mpy-metro-m7"
 
 #define MICROPY_HW_WIFI_SPI_ID       (0)
diff --git a/ports/mimxrt/boards/ADAFRUIT_METRO_M7/mpconfigboard.mk b/ports/mimxrt/boards/ADAFRUIT_METRO_M7/mpconfigboard.mk
index b9c1716a7f60c..520cea063fb7e 100644
--- a/ports/mimxrt/boards/ADAFRUIT_METRO_M7/mpconfigboard.mk
+++ b/ports/mimxrt/boards/ADAFRUIT_METRO_M7/mpconfigboard.mk
@@ -4,7 +4,7 @@ MCU_VARIANT = MIMXRT1011DAE5A
 MICROPY_FLOAT_IMPL = single
 MICROPY_HW_FLASH_TYPE ?= qspi_nor_flash
 MICROPY_HW_FLASH_SIZE ?= 0x800000  # 8MB
-MICROPY_HW_FLASH_CLK = kFlexSpiSerialClk_133MHz
+MICROPY_HW_FLASH_CLK = kFlexSpiSerialClk_100MHz
 MICROPY_HW_FLASH_QE_CMD = 0x31
 MICROPY_HW_FLASH_QE_ARG = 0x02
 
diff --git a/ports/mimxrt/boards/MAKERDIARY_RT1011_NANO_KIT/board.json b/ports/mimxrt/boards/MAKERDIARY_RT1011_NANO_KIT/board.json
new file mode 100644
index 0000000000000..ee04a5965fed7
--- /dev/null
+++ b/ports/mimxrt/boards/MAKERDIARY_RT1011_NANO_KIT/board.json
@@ -0,0 +1,19 @@
+{
+    "deploy": [
+        "deploy_makerdiary.md"
+    ],
+    "docs": "",
+    "features": [
+        "External Flash",
+        "USB",
+        "microSD"
+    ],
+    "images": [
+        "MAKERDIARY_RT1011_NANO_KIT.jpg"
+    ],
+    "mcu": "mimxrt",
+    "product": "iMX RT1011 Nano Kit",
+    "thumbnail": "",
+    "url": "https://makerdiary.com/products/imxrt1011-nanokit",
+    "vendor": "Makerdiary"
+}
diff --git a/ports/mimxrt/boards/MAKERDIARY_RT1011_NANO_KIT/deploy_makerdiary.md b/ports/mimxrt/boards/MAKERDIARY_RT1011_NANO_KIT/deploy_makerdiary.md
new file mode 100644
index 0000000000000..49922183b1248
--- /dev/null
+++ b/ports/mimxrt/boards/MAKERDIARY_RT1011_NANO_KIT/deploy_makerdiary.md
@@ -0,0 +1,39 @@
+## 1. Deploy the MicroPython firmware to the iMX RT1011 Nano Kit.
+
+The iMX RT1011 Nano Kit comes pre-installed with a UF2 bootloader.
+It can be started by pushing reset twice. Then the bootloader drive will
+appear. If that does not happen or the bootloader was lost, you can
+reinstall the bootloader using the procedure below.
+
+Once the bootloader is installed and started, you can install MicroPython
+by copying the .uf2 version of the firmware file to the bootloader
+drive. When the firmware is installed, the drive will disappear.
+
+## 2. Reinstall the bootloader iMX RT1011 Nano Kit.
+
+1. Get the NXP program sdphost for your operating system, e.g. from
+https://github.com/adafruit/tinyuf2/tree/master/ports/mimxrt10xx/sdphost.
+You can also get them from the NXP web sites.
+
+2. Get the UF2 boot-loader package https://github.com/adafruit/tinyuf2/releases/tag/0.21.0
+and extract the file  tinyuf2-makerdiary_rt1011-0.21.0.bin. You may as
+well go for a newer release.
+
+Now you have all files at hand that you will need for updating.
+
+1. Push and hold the "USR/BT" button, then press "RST", and release both buttons.
+
+2. Run the commands:
+
+```
+sudo ./sdphost -u 0x1fc9,0x0145 -- write-file 0x20206400 tinyuf2-makerdiary_rt1011-0.21.0.bin
+sudo ./sdphost -u 0x1fc9,0x0145 -- jump-address 0x20207000
+```
+Wait until a drive icon appears on the computer (or mount it explicitly).
+At this point the bootloader is installed. You can now copy the
+MicroPython .uf2 file to the board to start the firmware upload.
+A LED on the board will start flickering, indicating that the
+upload is ongoing. Once the upload is complete, the drive icon will
+disappear. Wait until the LED stops flickering. In rare cases there
+may be an error message coming up, especially when there are only few
+or no changes in the firmware file. Then just repeat the upload.
diff --git a/ports/mimxrt/boards/MAKERDIARY_RT1011_NANO_KIT/mpconfigboard.h b/ports/mimxrt/boards/MAKERDIARY_RT1011_NANO_KIT/mpconfigboard.h
new file mode 100644
index 0000000000000..28085294f1410
--- /dev/null
+++ b/ports/mimxrt/boards/MAKERDIARY_RT1011_NANO_KIT/mpconfigboard.h
@@ -0,0 +1,87 @@
+#define MICROPY_HW_BOARD_NAME "iMX_RT1011_Nano_Kit"
+#define MICROPY_HW_MCU_NAME   "MIMXRT1011DAE5A"
+#define MICROPY_HW_USB_MANUFACTURER_STRING "Makerdiary"
+#define MICROPY_HW_USB_VID 0xf055
+#define MICROPY_HW_USB_PID 0x9802
+#define MICROPY_PY_OS_DUPTERM_BUILTIN_STREAM (0)
+
+// RT1011-Nanokit has 1 board LED
+#define MICROPY_HW_LED1_PIN (pin_GPIO_SD_04)
+#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin))
+#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin))
+
+#define MICROPY_HW_NUM_PIN_IRQS (2 * 32)
+#define MICROPY_PY_MACHINE_SDCARD    (0)
+
+
+#define MICROPY_HW_UART_NUM     (sizeof(uart_index_table) / sizeof(uart_index_table)[0])
+#define MICROPY_HW_UART_INDEX   { 0, 1, 2, 3, 4 }
+
+#define IOMUX_TABLE_UART \
+    { IOMUXC_GPIO_10_LPUART1_TXD }, { IOMUXC_GPIO_09_LPUART1_RXD }, \
+    { IOMUXC_GPIO_AD_00_LPUART2_TXD }, { IOMUXC_GPIO_13_LPUART2_RXD }, \
+    { IOMUXC_GPIO_12_LPUART3_TXD }, { IOMUXC_GPIO_11_LPUART3_RXD }, \
+    { IOMUXC_GPIO_AD_02_LPUART4_TXD }, { IOMUXC_GPIO_AD_01_LPUART4_RXD },
+
+#define IOMUX_TABLE_UART_CTS_RTS \
+    { IOMUXC_GPIO_08_LPUART1_CTS_B }, { IOMUXC_GPIO_07_LPUART1_RTS_B }, \
+    { IOMUXC_GPIO_AD_08_LPUART2_CTS_B }, { IOMUXC_GPIO_AD_07_LPUART2_RTS_B }, \
+    { IOMUXC_GPIO_AD_14_LPUART3_CTS_B }, { IOMUXC_GPIO_AD_13_LPUART3_RTS_B }, \
+    { IOMUXC_GPIO_AD_14_LPUART4_CTS_B }, { IOMUXC_GPIO_AD_13_LPUART4_RTS_B },
+
+#define MICROPY_HW_SPI_INDEX { 1, 2 }
+
+#define IOMUX_TABLE_SPI \
+    { IOMUXC_GPIO_AD_06_LPSPI1_SCK }, { IOMUXC_GPIO_AD_05_LPSPI1_PCS0 }, \
+    { IOMUXC_GPIO_AD_04_LPSPI1_SDO }, { IOMUXC_GPIO_AD_03_LPSPI1_SDI }, \
+    { IOMUXC_GPIO_AD_02_LPSPI1_PCS1 }, \
+    { IOMUXC_GPIO_AD_12_LPSPI2_SCK }, { IOMUXC_GPIO_AD_11_LPSPI2_PCS0 }, \
+    { IOMUXC_GPIO_AD_10_LPSPI2_SDO }, { IOMUXC_GPIO_AD_09_LPSPI2_SDI }, \
+    { IOMUXC_GPIO_AD_01_LPSPI2_PCS1 }
+
+#define DMA_REQ_SRC_RX { 0, kDmaRequestMuxLPSPI1Rx, kDmaRequestMuxLPSPI2Rx }
+#define DMA_REQ_SRC_TX { 0, kDmaRequestMuxLPSPI1Tx, kDmaRequestMuxLPSPI2Tx }
+
+// Define mapping hardware I2C # to logical I2C #
+// SDA/SCL    HW-I2C    Logical I2C
+// SDA1/SCL1  LPI2C1 ->    0
+// SDA2/SCL2  LPI2C2 ->    1
+
+#define MICROPY_HW_I2C_INDEX   { 1, 2 }
+
+#define IOMUX_TABLE_I2C \
+    { IOMUXC_GPIO_02_LPI2C1_SCL }, { IOMUXC_GPIO_01_LPI2C1_SDA }, \
+    { IOMUXC_GPIO_AD_08_LPI2C2_SCL }, { IOMUXC_GPIO_AD_07_LPI2C2_SDA },
+
+#define MICROPY_PY_MACHINE_I2S (1)
+#define MICROPY_HW_I2S_NUM (3)
+#define I2S_CLOCK_MUX { 0, kCLOCK_Sai1Mux, 0, kCLOCK_Sai3Mux }
+#define I2S_CLOCK_PRE_DIV { 0, kCLOCK_Sai1PreDiv, 0, kCLOCK_Sai3PreDiv }
+#define I2S_CLOCK_DIV { 0, kCLOCK_Sai1Div, 0, kCLOCK_Sai3Div }
+#define I2S_IOMUXC_GPR_MODE { 0, kIOMUXC_GPR_SAI1MClkOutputDir, 0, kIOMUXC_GPR_SAI3MClkOutputDir }
+#define I2S_DMA_REQ_SRC_RX { 0, kDmaRequestMuxSai1Rx, 0, kDmaRequestMuxSai3Rx }
+#define I2S_DMA_REQ_SRC_TX { 0, kDmaRequestMuxSai1Tx, 0, kDmaRequestMuxSai3Tx }
+#define I2S_AUDIO_PLL_CLOCK (2U)
+
+#define I2S_GPIO(_hwid, _fn, _mode, _pin, _iomux) \
+    { \
+        .hw_id = _hwid, \
+        .fn = _fn, \
+        .mode = _mode, \
+        .name = MP_QSTR_##_pin, \
+        .iomux = {_iomux}, \
+    }
+
+#define I2S_GPIO_MAP \
+    { \
+        I2S_GPIO(1, MCK, TX, GPIO_08, IOMUXC_GPIO_08_SAI1_MCLK), /* pin D8 */ \
+        I2S_GPIO(1, SCK, RX, GPIO_01, IOMUXC_GPIO_01_SAI1_RX_BCLK), /* pin D1 */ \
+        I2S_GPIO(1, WS, RX, GPIO_02, IOMUXC_GPIO_02_SAI1_RX_SYNC), /* pin D2 */ \
+        I2S_GPIO(1, SD, RX, GPIO_03, IOMUXC_GPIO_03_SAI1_RX_DATA00), /* pin D3 */ \
+        I2S_GPIO(1, SCK, TX, GPIO_06, IOMUXC_GPIO_06_SAI1_TX_BCLK), /* pin D6 */ \
+        I2S_GPIO(1, WS, TX, GPIO_07, IOMUXC_GPIO_07_SAI1_TX_SYNC), /* pin D7 */ \
+        I2S_GPIO(1, SD, TX, GPIO_04, IOMUXC_GPIO_04_SAI1_TX_DATA00), /* pin D4 */ \
+        I2S_GPIO(3, SCK, TX, GPIO_SD_01, IOMUXC_GPIO_SD_01_SAI3_TX_BCLK), /* pin SD1 */ \
+        I2S_GPIO(3, WS, TX, GPIO_SD_00, IOMUXC_GPIO_SD_00_SAI3_TX_SYNC), /* pin SD0 */ \
+        I2S_GPIO(3, SD, TX, GPIO_SD_02, IOMUXC_GPIO_SD_02_SAI3_TX_DATA) /* pin SD2 */ \
+    }
diff --git a/ports/mimxrt/boards/MAKERDIARY_RT1011_NANO_KIT/mpconfigboard.mk b/ports/mimxrt/boards/MAKERDIARY_RT1011_NANO_KIT/mpconfigboard.mk
new file mode 100644
index 0000000000000..942012157dd22
--- /dev/null
+++ b/ports/mimxrt/boards/MAKERDIARY_RT1011_NANO_KIT/mpconfigboard.mk
@@ -0,0 +1,16 @@
+MCU_SERIES = MIMXRT1011
+MCU_VARIANT = MIMXRT1011DAE5A
+
+MICROPY_FLOAT_IMPL = single
+MICROPY_HW_FLASH_TYPE = qspi_nor_flash
+MICROPY_HW_FLASH_SIZE = 0x1000000  # 16MB
+MICROPY_HW_FLASH_CLK = kFlexSpiSerialClk_100MHz
+MICROPY_HW_FLASH_QE_CMD = 0x31
+MICROPY_HW_FLASH_QE_ARG = 0x02
+
+USE_UF2_BOOTLOADER = 1
+
+CFLAGS += -DMICROPY_HW_FLASH_SAMPLE_CLK=kFLEXSPIReadSampleClk_LoopbackInternally
+
+SRC_C += \
+	hal/flexspi_nor_flash.c \
diff --git a/ports/mimxrt/boards/MAKERDIARY_RT1011_NANO_KIT/pins.csv b/ports/mimxrt/boards/MAKERDIARY_RT1011_NANO_KIT/pins.csv
new file mode 100644
index 0000000000000..c3f432e59f733
--- /dev/null
+++ b/ports/mimxrt/boards/MAKERDIARY_RT1011_NANO_KIT/pins.csv
@@ -0,0 +1,42 @@
+A0,GPIO_AD_00
+A1,GPIO_AD_01
+A2,GPIO_AD_02
+A3,GPIO_AD_03
+A4,GPIO_AD_04
+A5,GPIO_AD_05
+A6,GPIO_AD_06
+A7,GPIO_AD_07
+A8,GPIO_AD_08
+A9,GPIO_AD_09
+A10,GPIO_AD_10
+A11,GPIO_AD_11
+A14,GPIO_AD_14
+
+D0,GPIO_00
+D1,GPIO_01
+D2,GPIO_02
+D3,GPIO_03
+D4,GPIO_04
+D5,GPIO_05
+D6,GPIO_06
+D7,GPIO_07
+D8,GPIO_08
+D9,GPIO_09
+D10,GPIO_10
+D11,GPIO_11
+D12,GPIO_12
+D13,GPIO_13
+
+SD0,GPIO_SD_00
+SD1,GPIO_SD_01
+SD2,GPIO_SD_02
+SD5,GPIO_SD_05
+# Test pads at the bottom side
+SD3,GPIO_SD_03
+SD4,GPIO_SD_04
+SD12,GPIO_SD_12
+SD13,GPIO_SD_13
+
+LED,GPIO_SD_04
+CLK,GPIO_AD_12
+DIO,GPIO_AD_13
diff --git a/ports/mimxrt/boards/OLIMEX_RT1010/board.json b/ports/mimxrt/boards/OLIMEX_RT1010/board.json
index 882b931f8b7d2..a6f0316bc85fd 100644
--- a/ports/mimxrt/boards/OLIMEX_RT1010/board.json
+++ b/ports/mimxrt/boards/OLIMEX_RT1010/board.json
@@ -12,8 +12,8 @@
         "OLIMEX_RT1010Py.jpg"
     ],
     "mcu": "mimxrt",
-    "product": "Olimex_RT1010Py",
+    "product": "RT1010-Py",
     "thumbnail": "",
-    "url": "https://www.olimex.com/Products/ARM/NXP",
-    "vendor": "OLIMEX"
+    "url": "https://www.olimex.com/Products/MicroPython/RT1010-Py",
+    "vendor": "Olimex"
 }
diff --git a/ports/mimxrt/boards/OLIMEX_RT1010/deploy_olimex.md b/ports/mimxrt/boards/OLIMEX_RT1010/deploy_olimex.md
index 7abba784b940b..4db0b6f611942 100644
--- a/ports/mimxrt/boards/OLIMEX_RT1010/deploy_olimex.md
+++ b/ports/mimxrt/boards/OLIMEX_RT1010/deploy_olimex.md
@@ -33,10 +33,16 @@ and you will not need it for Windows.
 
 4. Once the upload of the bootloader is finished, push Reset twice.
 
-The bootloader should start and show a drive icon. Copy the .uf2 version of MicroPython
-to this drive to install or update MicroPython.
+The bootloader should start and show a drive icon.
 
-Once the UF2 bootloader is installed, only step 4 is required to deploy MicroPython. If
+5. Copy the .uf2 version of MicroPython to this drive to install or update MicroPython.
+
+A LED on the board will start flickering, indicating that the upload is ongoing. Once the upload
+is complete, the drive icon will disappear. Wait until the LED stops flickering. In rare cases there
+may be an error message coming up, especially when there are only few or no changes in
+the firmware file. Then just repeat the copy.
+
+Once the UF2 bootloader is installed, only steps 4 and 5 are required to deploy MicroPython. If
 MicroPython is already installed, the bootloader can as well be invoked by calling
 `machine.bootloader()`.
 
diff --git a/ports/mimxrt/boards/deploy_mimxrt.md b/ports/mimxrt/boards/deploy_mimxrt.md
index 7ad21fe64ca17..2c7f3500979c3 100644
--- a/ports/mimxrt/boards/deploy_mimxrt.md
+++ b/ports/mimxrt/boards/deploy_mimxrt.md
@@ -41,5 +41,8 @@ installed.
 
 If there is no valid Firmware on the device, the bootloader will start automatically.
 Once it's started, a drive ICON will appear. The MicroPython firmware file with .uf2
-extension must then be copied to that drive. When the file is copied and MicroPython
-is installed, the drive disappears and MicroPython starts.
+extension must then be copied to that drive. A LED on the board may start flickering,
+indicating that the upload is ongoing. Once the upload is complete, the drive icon
+will disappear. Wait until the LED stops flickering. In rare cases there
+may be an error message coming up, especially when there are only few or
+no changes in the firmware file. Then just repeat the copy.
diff --git a/ports/mimxrt/cyw43_configport.h b/ports/mimxrt/cyw43_configport.h
index 619db24b1b579..b1dd6fbe6ae9f 100644
--- a/ports/mimxrt/cyw43_configport.h
+++ b/ports/mimxrt/cyw43_configport.h
@@ -28,14 +28,12 @@
 #define MICROPY_INCLUDED_MIMXRT_CYW43_CONFIGPORT_H
 
 // The board-level config will be included here, so it can set some CYW43 values.
-#include "py/mpconfig.h"
-#include "py/mperrno.h"
-#include "py/mphal.h"
-#include "extmod/modnetwork.h"
-#include "pendsv.h"
+#include "extmod/mpbthci.h"
+#include "extmod/cyw43_config_common.h"
 #include "sdio.h"
 
 #define CYW43_USE_SPI                   (0)
+#define CYW43_ENABLE_BLUETOOTH_OVER_UART (1)
 #define CYW43_LWIP                      (1)
 #define CYW43_USE_STATS                 (0)
 
@@ -47,49 +45,32 @@
 #define CYW43_WIFI_NVRAM_INCLUDE_FILE   "lib/cyw43-driver/firmware/wifi_nvram_1dx.h"
 #endif
 
-#define CYW43_IOCTL_TIMEOUT_US          (1000000)
-#define CYW43_SLEEP_MAX                 (50)
-#define CYW43_NETUTILS                  (1)
-#define CYW43_CLEAR_SDIO_INT            (1)
+#ifndef CYW43_BT_FIRMWARE_INCLUDE_FILE
+#define CYW43_BT_FIRMWARE_INCLUDE_FILE  "lib/cyw43-driver/firmware/cyw43_btfw_4343A1.h"
+#endif
 
-#define CYW43_EPERM                     MP_EPERM // Operation not permitted
-#define CYW43_EIO                       MP_EIO // I/O error
-#define CYW43_EINVAL                    MP_EINVAL // Invalid argument
-#define CYW43_ETIMEDOUT                 MP_ETIMEDOUT // Connection timed out
+#ifdef MICROPY_HW_BLE_UART_BAUDRATE_SECONDARY
+#define CYW43_BT_UART_BAUDRATE_ACTIVE_USE MICROPY_HW_BLE_UART_BAUDRATE_SECONDARY
+#endif
 
-#define CYW43_THREAD_ENTER              MICROPY_PY_LWIP_ENTER
-#define CYW43_THREAD_EXIT               MICROPY_PY_LWIP_EXIT
-#define CYW43_THREAD_LOCK_CHECK
+#ifdef MICROPY_HW_BLE_UART_BAUDRATE_DOWNLOAD_FIRMWARE
+#define CYW43_BT_UART_BAUDRATE_DOWNLOAD_FIRMWARE MICROPY_HW_BLE_UART_BAUDRATE_DOWNLOAD_FIRMWARE
+#endif
 
-#define CYW43_HOST_NAME                 mod_network_hostname_data
+#define CYW43_CLEAR_SDIO_INT            (1)
 
 #define CYW43_SDPCM_SEND_COMMON_WAIT    __WFI();
 #define CYW43_DO_IOCTL_WAIT             __WFI();
 
-#define CYW43_ARRAY_SIZE(a)             MP_ARRAY_SIZE(a)
-
-#define CYW43_HAL_PIN_MODE_INPUT        MP_HAL_PIN_MODE_INPUT
-#define CYW43_HAL_PIN_MODE_OUTPUT       MP_HAL_PIN_MODE_OUTPUT
-#define CYW43_HAL_PIN_PULL_NONE         MP_HAL_PIN_PULL_NONE
-#define CYW43_HAL_PIN_PULL_UP           MP_HAL_PIN_PULL_UP
-#define CYW43_HAL_PIN_PULL_DOWN         MP_HAL_PIN_PULL_DOWN
+#define cyw43_hal_uart_set_baudrate     mp_bluetooth_hci_uart_set_baudrate
+#define cyw43_hal_uart_write            mp_bluetooth_hci_uart_write
+#define cyw43_hal_uart_readchar         mp_bluetooth_hci_uart_readchar
 
-#define CYW43_HAL_MAC_WLAN0             MP_HAL_MAC_WLAN0
-
-#define cyw43_hal_ticks_us              mp_hal_ticks_us
-#define cyw43_hal_ticks_ms              mp_hal_ticks_ms
-
-#define cyw43_hal_pin_obj_t             mp_hal_pin_obj_t
-#define cyw43_hal_pin_read              mp_hal_pin_read
-#define cyw43_hal_pin_low               mp_hal_pin_low
-#define cyw43_hal_pin_high              mp_hal_pin_high
-
-#define cyw43_hal_get_mac               mp_hal_get_mac
-#define cyw43_hal_get_mac_ascii         mp_hal_get_mac_ascii
-#define cyw43_hal_generate_laa_mac      mp_hal_generate_laa_mac
-
-#define cyw43_delay_us                  mp_hal_delay_us
-#define cyw43_delay_ms                  mp_hal_delay_ms
+#define cyw43_bluetooth_controller_init     mp_bluetooth_hci_controller_init
+#define cyw43_bluetooth_controller_deinit   mp_bluetooth_hci_controller_deinit
+#define cyw43_bluetooth_controller_woken    mp_bluetooth_hci_controller_woken
+#define cyw43_bluetooth_controller_wakeup   mp_bluetooth_hci_controller_wakeup
+#define cyw43_bluetooth_controller_sleep_maybe mp_bluetooth_hci_controller_sleep_maybe
 
 #define CYW43_PIN_WL_REG_ON             MICROPY_HW_WL_REG_ON
 #define CYW43_PIN_WL_HOST_WAKE          MICROPY_HW_WL_HOST_WAKE
@@ -107,10 +88,10 @@
 #endif
 
 #if MICROPY_HW_ENABLE_RF_SWITCH
-#define CYW43_PIN_WL_RFSW_VDD           pin_WL_RFSW_VDD
+#define CYW43_PIN_RFSW_VDD              pin_WL_RFSW_VDD
 #endif
 
-#define cyw43_schedule_internal_poll_dispatch(func) pendsv_schedule_dispatch(PENDSV_DISPATCH_CYW43, func)
+#undef cyw43_hal_pin_config // mp_hal_pin_config not yet implemented on this port
 
 static inline void cyw43_hal_pin_config(cyw43_hal_pin_obj_t pin, uint8_t mode, uint8_t pull, uint8_t alt) {
     machine_pin_set_mode(pin, mode);
@@ -150,6 +131,4 @@ static inline int cyw43_sdio_transfer_cmd53(bool write, uint32_t block_size, uin
     return sdio_transfer_cmd53(write, block_size, arg, len, buf);
 }
 
-#define CYW43_EVENT_POLL_HOOK MICROPY_EVENT_POLL_HOOK
-
 #endif // MICROPY_INCLUDED_MIMXRT_CYW43_CONFIGPORT_H
diff --git a/ports/mimxrt/eth.c b/ports/mimxrt/eth.c
index 3eb1a0cc35202..1ac19b83d6d44 100644
--- a/ports/mimxrt/eth.c
+++ b/ports/mimxrt/eth.c
@@ -327,7 +327,7 @@ static void eth_gpio_init(const iomux_table_t iomux_table[], size_t iomux_table_
     }
 }
 
-// eth_phy_init: Initilaize the PHY interface
+// eth_phy_init: Initialize the PHY interface
 static void eth_phy_init(phy_handle_t *phyHandle, phy_config_t *phy_config,
     phy_speed_t *speed, phy_duplex_t *duplex, uint32_t phy_settle_time) {
 
diff --git a/ports/mimxrt/hal/flexspi_flash_config.h b/ports/mimxrt/hal/flexspi_flash_config.h
index d9aa5ed5eab69..239d7b3b4f868 100644
--- a/ports/mimxrt/hal/flexspi_flash_config.h
+++ b/ports/mimxrt/hal/flexspi_flash_config.h
@@ -119,7 +119,7 @@ enum
     kFlexSpiMiscOffset_WordAddressableEnable    = 3, // !< Bit for Word Addressable enable
     kFlexSpiMiscOffset_SafeConfigFreqEnable     = 4, // !< Bit for Safe Configuration Frequency enable
     kFlexSpiMiscOffset_PadSettingOverrideEnable = 5, // !< Bit for Pad setting override enable
-    kFlexSpiMiscOffset_DdrModeEnable            = 6, // !< Bit for DDR clock confiuration indication.
+    kFlexSpiMiscOffset_DdrModeEnable            = 6, // !< Bit for DDR clock configuration indication.
 };
 
 // !@brief Flash Type Definition
diff --git a/ports/mimxrt/hal/flexspi_nor_flash.c b/ports/mimxrt/hal/flexspi_nor_flash.c
index 7fdb6b7c13df6..1476c1ec3a5db 100644
--- a/ports/mimxrt/hal/flexspi_nor_flash.c
+++ b/ports/mimxrt/hal/flexspi_nor_flash.c
@@ -83,7 +83,7 @@ static ps_div_t div_table_mhz[] = {
     { 18, 8 }, // 60 -> 60 MHz
     { 23, 5 }, // 75 -> 75.13 MHz
     { 18, 6 }, // 80 -> 80 MHz
-    { 17, 5 }, // 100 -> 191 Mhz
+    { 17, 5 }, // 100 -> 101 Mhz
     { 13, 5 }, // 133 -> 132.92 MHz
     { 13, 4 }  // 166  -> 166.15 MHz
 };
diff --git a/ports/mimxrt/hal/qspi_nor_flash_config.c b/ports/mimxrt/hal/qspi_nor_flash_config.c
index 36ccc30fc1922..0ed1b5032bb88 100644
--- a/ports/mimxrt/hal/qspi_nor_flash_config.c
+++ b/ports/mimxrt/hal/qspi_nor_flash_config.c
@@ -38,8 +38,8 @@ const flexspi_nor_config_t qspiflash_config = {
         .tag = FLEXSPI_CFG_BLK_TAG,
         .version = FLEXSPI_CFG_BLK_VERSION,
         .readSampleClkSrc = MICROPY_HW_FLASH_DQS,
-        .csHoldTime = 3u,
-        .csSetupTime = 3u,
+        .csHoldTime = 5u,   // safe time for all flash devices
+        .csSetupTime = 5u,
         .busyOffset = FLASH_BUSY_STATUS_OFFSET,         // Status bit 0 indicates busy.
         .busyBitPolarity = FLASH_BUSY_STATUS_POL,       // Busy when the bit is 1.
         .deviceModeCfgEnable = 1u,
diff --git a/ports/mimxrt/machine_adc.c b/ports/mimxrt/machine_adc.c
index 29b73a20652ce..c332bd703128a 100644
--- a/ports/mimxrt/machine_adc.c
+++ b/ports/mimxrt/machine_adc.c
@@ -41,6 +41,12 @@
 // The ADC class doesn't have any constants for this port.
 #define MICROPY_PY_MACHINE_ADC_CLASS_CONSTANTS
 
+#if defined(MIMXRT117x_SERIES)
+#define ADC_UV_FULL_RANGE (3840000)
+#else
+#define ADC_UV_FULL_RANGE (3300000)
+#endif
+
 typedef struct _machine_adc_obj_t {
     mp_obj_base_t base;
     ADC_Type *adc;
@@ -78,15 +84,6 @@ static mp_obj_t mp_machine_adc_make_new(const mp_obj_type_t *type, size_t n_args
     ADC_Type *adc_instance = pin->adc_list[0].instance;  // NOTE: we only use the first ADC assignment - multiple assignments are not supported for now
     uint8_t channel = pin->adc_list[0].channel;
 
-    #if 0 // done in adc_read_u16
-    // Configure ADC peripheral channel
-    adc_channel_config_t channel_config = {
-        .channelNumber = (uint32_t)channel,
-        .enableInterruptOnConversionCompleted = false,
-    };
-    ADC_SetChannelConfig(adc_instance, 0UL, &channel_config);  // NOTE: we always choose channel group '0' since we only perform software triggered conversion
-    #endif
-
     // Create ADC Instance
     machine_adc_obj_t *o = mp_obj_malloc(machine_adc_obj_t, &machine_adc_type);
     o->adc = adc_instance;
@@ -169,3 +166,7 @@ void machine_adc_init(void) {
     }
 }
 #endif
+
+static mp_int_t mp_machine_adc_read_uv(machine_adc_obj_t *self) {
+    return (uint64_t)ADC_UV_FULL_RANGE * mp_machine_adc_read_u16(self) / 65536;
+}
diff --git a/ports/mimxrt/machine_i2c.c b/ports/mimxrt/machine_i2c.c
index 89fe47dbf60c1..d170804f4f058 100644
--- a/ports/mimxrt/machine_i2c.c
+++ b/ports/mimxrt/machine_i2c.c
@@ -34,8 +34,10 @@
 #include "fsl_iomuxc.h"
 #include "fsl_lpi2c.h"
 
+#define DEFAULT_I2C_ID          (0)
 #define DEFAULT_I2C_FREQ        (400000)
 #define DEFAULT_I2C_DRIVE       (6)
+#define DEFAULT_I2C_TIMEOUT     (50000)
 
 typedef struct _machine_i2c_obj_t {
     mp_obj_base_t base;
@@ -82,16 +84,18 @@ bool lpi2c_set_iomux(int8_t hw_i2c, uint8_t drive) {
 
 static void machine_i2c_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
     machine_i2c_obj_t *self = MP_OBJ_TO_PTR(self_in);
-    mp_printf(print, "I2C(%u, freq=%u)",
-        self->i2c_id, self->master_config->baudRate_Hz);
+    mp_printf(print, "I2C(%u, freq=%u, timeout=%u)",
+        self->i2c_id, self->master_config->baudRate_Hz,
+        self->master_config->pinLowTimeout_ns / 1000);
 }
 
 mp_obj_t machine_i2c_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) {
-    enum { ARG_id, ARG_freq, ARG_drive};
+    enum { ARG_id, ARG_freq, ARG_drive, ARG_timeout};
     static const mp_arg_t allowed_args[] = {
-        { MP_QSTR_id, MP_ARG_REQUIRED | MP_ARG_OBJ },
+        { MP_QSTR_id, MP_ARG_INT, {.u_int = DEFAULT_I2C_ID} },
         { MP_QSTR_freq, MP_ARG_INT, {.u_int = DEFAULT_I2C_FREQ} },
         { MP_QSTR_drive, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = DEFAULT_I2C_DRIVE} },
+        { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = DEFAULT_I2C_TIMEOUT} },
     };
 
     // Parse args.
@@ -99,7 +103,7 @@ mp_obj_t machine_i2c_make_new(const mp_obj_type_t *type, size_t n_args, size_t n
     mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
 
     // Get I2C bus.
-    int i2c_id = mp_obj_get_int(args[ARG_id].u_obj);
+    int i2c_id = args[ARG_id].u_int;
     if (i2c_id < 0 || i2c_id >= MICROPY_HW_I2C_NUM || i2c_index_table[i2c_id] == 0) {
         mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("I2C(%d) doesn't exist"), i2c_id);
     }
@@ -121,6 +125,9 @@ mp_obj_t machine_i2c_make_new(const mp_obj_type_t *type, size_t n_args, size_t n
     LPI2C_MasterGetDefaultConfig(self->master_config);
     // Initialise the I2C peripheral.
     self->master_config->baudRate_Hz = args[ARG_freq].u_int;
+    if (args[ARG_timeout].u_int >= 0) {
+        self->master_config->pinLowTimeout_ns = args[ARG_timeout].u_int * 1000; // to be set as ns
+    }
     LPI2C_MasterInit(self->i2c_inst, self->master_config, BOARD_BOOTCLOCKRUN_LPI2C_CLK_ROOT);
 
     return MP_OBJ_FROM_PTR(self);
diff --git a/ports/mimxrt/machine_spi.c b/ports/mimxrt/machine_spi.c
index 56e155ff22f4b..4f6480607aa36 100644
--- a/ports/mimxrt/machine_spi.c
+++ b/ports/mimxrt/machine_spi.c
@@ -37,6 +37,7 @@
 #include "fsl_lpspi.h"
 #include "fsl_lpspi_edma.h"
 
+#define DEFAULT_SPI_ID          (0)
 #define DEFAULT_SPI_BAUDRATE    (1000000)
 #define DEFAULT_SPI_POLARITY    (0)
 #define DEFAULT_SPI_PHASE       (0)
@@ -130,7 +131,7 @@ static void machine_spi_print(const mp_print_t *print, mp_obj_t self_in, mp_prin
 mp_obj_t machine_spi_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) {
     enum { ARG_id, ARG_baudrate, ARG_polarity, ARG_phase, ARG_bits, ARG_firstbit, ARG_gap_ns, ARG_drive, ARG_cs };
     static const mp_arg_t allowed_args[] = {
-        { MP_QSTR_id,       MP_ARG_REQUIRED | MP_ARG_OBJ },
+        { MP_QSTR_id,       MP_ARG_INT, {.u_int = DEFAULT_SPI_ID} },
         { MP_QSTR_baudrate, MP_ARG_INT, {.u_int = DEFAULT_SPI_BAUDRATE} },
         { MP_QSTR_polarity, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = DEFAULT_SPI_POLARITY} },
         { MP_QSTR_phase,    MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = DEFAULT_SPI_PHASE} },
@@ -146,7 +147,7 @@ mp_obj_t machine_spi_make_new(const mp_obj_type_t *type, size_t n_args, size_t n
     mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
 
     // Get the SPI bus id.
-    int spi_id = mp_obj_get_int(args[ARG_id].u_obj);
+    int spi_id = args[ARG_id].u_int;
     if (spi_id < 0 || spi_id >= MP_ARRAY_SIZE(spi_index_table) || spi_index_table[spi_id] == 0) {
         mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("SPI(%d) doesn't exist"), spi_id);
     }
diff --git a/ports/mimxrt/machine_uart.c b/ports/mimxrt/machine_uart.c
index 9f9d6c8fd256f..107af72297d4f 100644
--- a/ports/mimxrt/machine_uart.c
+++ b/ports/mimxrt/machine_uart.c
@@ -37,6 +37,7 @@
 #include "modmachine.h"
 #include "pin.h"
 
+#define DEFAULT_UART_ID  (1)
 #define DEFAULT_UART_BAUDRATE (115200)
 #define DEFAULT_BUFFER_SIZE (256)
 #define MIN_BUFFER_SIZE  (32)
@@ -66,6 +67,8 @@ typedef struct _machine_uart_obj_t {
     uint16_t tx_status;
     uint8_t *txbuf;
     uint16_t txbuf_len;
+    uint8_t *rxbuf;
+    uint16_t rxbuf_len;
     bool new;
     uint16_t mp_irq_trigger;   // user IRQ trigger mask
     uint16_t mp_irq_flags;     // user IRQ active IRQ flags
@@ -133,7 +136,7 @@ bool lpuart_set_iomux_cts(int8_t uart) {
     int index = (uart - 1) * 2;
 
     if (CTS.muxRegister != 0) {
-        IOMUXC_SetPinMux(CTS.muxRegister, CTS.muxMode, CTS.inputRegister, CTS.inputDaisy, CTS.configRegister, 0U);
+        IOMUXC_SetPinMux(CTS.muxRegister, CTS.muxMode, CTS.inputRegister, CTS.inputDaisy, CTS.configRegister, 1U);
         IOMUXC_SetPinConfig(CTS.muxRegister, CTS.muxMode, CTS.inputRegister, CTS.inputDaisy, CTS.configRegister,
             pin_generate_config(PIN_PULL_UP_100K, PIN_MODE_IN, PIN_DRIVE_6, CTS.configRegister));
         return true;
@@ -197,7 +200,7 @@ static void mp_machine_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_
         self->id, self->config.baudRate_Bps, 8 - self->config.dataBitsCount,
         _parity_name[self->config.parityMode], self->config.stopBitCount + 1,
         _flow_name[(self->config.enableTxCTS << 1) | self->config.enableRxRTS],
-        self->handle.rxRingBufferSize, self->txbuf_len, self->timeout, self->timeout_char,
+        self->rxbuf_len, self->txbuf_len, self->timeout, self->timeout_char,
         _invert_name[self->invert], self->mp_irq_trigger);
 }
 
@@ -291,25 +294,33 @@ static void mp_machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args,
     self->config.enableRx = true;
 
     // Set the RX buffer size if configured.
-    size_t rxbuf_len = DEFAULT_BUFFER_SIZE;
     if (args[ARG_rxbuf].u_int > 0) {
-        rxbuf_len = args[ARG_rxbuf].u_int;
+        size_t rxbuf_len = args[ARG_rxbuf].u_int;
         if (rxbuf_len < MIN_BUFFER_SIZE) {
             rxbuf_len = MIN_BUFFER_SIZE;
         } else if (rxbuf_len > MAX_BUFFER_SIZE) {
             mp_raise_ValueError(MP_ERROR_TEXT("rxbuf too large"));
         }
+        // Force re-allocting of the buffer if the size changed
+        if (rxbuf_len != self->rxbuf_len) {
+            self->rxbuf = NULL;
+            self->rxbuf_len = rxbuf_len;
+        }
     }
 
     // Set the TX buffer size if configured.
-    size_t txbuf_len = DEFAULT_BUFFER_SIZE;
     if (args[ARG_txbuf].u_int > 0) {
-        txbuf_len = args[ARG_txbuf].u_int;
+        size_t txbuf_len = args[ARG_txbuf].u_int;
         if (txbuf_len < MIN_BUFFER_SIZE) {
             txbuf_len = MIN_BUFFER_SIZE;
         } else if (txbuf_len > MAX_BUFFER_SIZE) {
             mp_raise_ValueError(MP_ERROR_TEXT("txbuf too large"));
         }
+        // Force re-allocting of the buffer if the size is changed
+        if (txbuf_len != self->txbuf_len) {
+            self->txbuf = NULL;
+            self->txbuf_len = txbuf_len;
+        }
     }
 
     // Initialise the UART peripheral if any arguments given, or it was not initialised previously.
@@ -326,22 +337,26 @@ static void mp_machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args,
             self->timeout_char = min_timeout_char;
         }
 
+        self->config.rxIdleType = kLPUART_IdleTypeStartBit;
+        self->config.rxIdleConfig = kLPUART_IdleCharacter4;
         #if defined(MIMXRT117x_SERIES)
         // Use the Lpuart1 clock value, which is set for All UART devices.
         LPUART_Init(self->lpuart, &self->config, CLOCK_GetRootClockFreq(kCLOCK_Root_Lpuart1));
         #else
         LPUART_Init(self->lpuart, &self->config, CLOCK_GetClockRootFreq(kCLOCK_UartClkRoot));
         #endif
-        self->config.rxIdleType = kLPUART_IdleTypeStartBit;
-        self->config.rxIdleConfig = kLPUART_IdleCharacter4;
-        LPUART_Init(self->lpuart, &self->config, BOARD_BOOTCLOCKRUN_UART_CLK_ROOT);
         LPUART_TransferCreateHandle(self->lpuart, &self->handle,  LPUART_UserCallback, self);
-        uint8_t *buffer = m_new(uint8_t, rxbuf_len + 1);
-        LPUART_TransferStartRingBuffer(self->lpuart, &self->handle, buffer, rxbuf_len);
-        self->txbuf = m_new(uint8_t, txbuf_len); // Allocate the TX buffer.
-        self->txbuf_len = txbuf_len;
+        if (self->rxbuf == NULL) {
+            self->rxbuf = m_new(uint8_t, self->rxbuf_len + 1);
+        }
+        LPUART_TransferStartRingBuffer(self->lpuart, &self->handle, self->rxbuf, self->rxbuf_len);
+        if (self->txbuf == NULL) {
+            self->txbuf = m_new(uint8_t, self->txbuf_len); // Allocate the TX buffer.
+        }
 
+        #if MICROPY_PY_MACHINE_UART_IRQ
         LPUART_EnableInterrupts(self->lpuart, kLPUART_IdleLineInterruptEnable);
+        #endif
 
         // The Uart supports inverting, but not the fsl API, so it has to coded directly
         // And it has to be done after LPUART_Init.
@@ -363,10 +378,17 @@ static void mp_machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args,
 }
 
 static mp_obj_t mp_machine_uart_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) {
-    mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true);
+    mp_arg_check_num(n_args, n_kw, 0, MP_OBJ_FUN_ARGS_MAX, true);
 
     // Get UART bus.
-    int uart_id = mp_obj_get_int(args[0]);
+    int uart_id;
+    if (n_args > 0) {
+        uart_id = mp_obj_get_int(args[0]);
+        n_args--;
+        args++;
+    } else {
+        uart_id = DEFAULT_UART_ID;
+    }
     if (uart_id < 0 || uart_id > MICROPY_HW_UART_NUM || uart_index_table[uart_id] == 0) {
         mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("UART(%d) doesn't exist"), uart_id);
     }
@@ -379,8 +401,13 @@ static mp_obj_t mp_machine_uart_make_new(const mp_obj_type_t *type, size_t n_arg
     self->invert = false;
     self->timeout = 1;
     self->timeout_char = 1;
+    self->rxbuf = NULL;
+    self->rxbuf_len = DEFAULT_BUFFER_SIZE;
+    self->txbuf = NULL;
+    self->txbuf_len = DEFAULT_BUFFER_SIZE;
     self->new = true;
     self->mp_irq_obj = NULL;
+    self->mp_irq_trigger = 0;
 
     LPUART_GetDefaultConfig(&self->config);
 
@@ -390,7 +417,7 @@ static mp_obj_t mp_machine_uart_make_new(const mp_obj_type_t *type, size_t n_arg
     if (uart_present) {
         mp_map_t kw_args;
         mp_map_init_fixed_table(&kw_args, n_kw, args + n_args);
-        mp_machine_uart_init_helper(self, n_args - 1, args + 1, &kw_args);
+        mp_machine_uart_init_helper(self, n_args, args, &kw_args);
         return MP_OBJ_FROM_PTR(self);
     } else {
         return mp_const_none;
@@ -427,6 +454,7 @@ void machine_uart_deinit_all(void) {
     }
 }
 
+#if MICROPY_PY_MACHINE_UART_IRQ
 static mp_uint_t uart_irq_trigger(mp_obj_t self_in, mp_uint_t new_trigger) {
     machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
     self->mp_irq_trigger = new_trigger;
@@ -475,6 +503,7 @@ static mp_irq_obj_t *mp_machine_uart_irq(machine_uart_obj_t *self, bool any_args
 
     return self->mp_irq_obj;
 }
+#endif
 
 static mp_uint_t mp_machine_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, int *errcode) {
     machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
diff --git a/ports/mimxrt/modmachine.c b/ports/mimxrt/modmachine.c
index 204699bcc4263..ad078ff3ac6d2 100644
--- a/ports/mimxrt/modmachine.c
+++ b/ports/mimxrt/modmachine.c
@@ -87,7 +87,7 @@ static mp_obj_t mp_machine_unique_id(void) {
     return mp_obj_new_bytes(id, sizeof(id));
 }
 
-NORETURN static void mp_machine_reset(void) {
+MP_NORETURN static void mp_machine_reset(void) {
     WDOG_TriggerSystemSoftwareReset(WDOG1);
     while (true) {
         ;
@@ -131,7 +131,7 @@ static void mp_machine_lightsleep(size_t n_args, const mp_obj_t *args) {
     mp_raise_NotImplementedError(NULL);
 }
 
-NORETURN static void mp_machine_deepsleep(size_t n_args, const mp_obj_t *args) {
+MP_NORETURN static void mp_machine_deepsleep(size_t n_args, const mp_obj_t *args) {
     if (n_args != 0) {
         mp_int_t seconds = mp_obj_get_int(args[0]) / 1000;
         if (seconds > 0) {
@@ -159,7 +159,7 @@ NORETURN static void mp_machine_deepsleep(size_t n_args, const mp_obj_t *args) {
     }
 }
 
-NORETURN void mp_machine_bootloader(size_t n_args, const mp_obj_t *args) {
+MP_NORETURN void mp_machine_bootloader(size_t n_args, const mp_obj_t *args) {
     #if defined(MICROPY_BOARD_ENTER_BOOTLOADER)
     // If a board has a custom bootloader, call it first.
     MICROPY_BOARD_ENTER_BOOTLOADER(n_args, args);
diff --git a/ports/mimxrt/mpconfigport.h b/ports/mimxrt/mpconfigport.h
index 7da85f1aee579..9a7dfc630f32a 100644
--- a/ports/mimxrt/mpconfigport.h
+++ b/ports/mimxrt/mpconfigport.h
@@ -84,6 +84,7 @@ uint32_t trng_random_u32(void);
 #define MICROPY_PY_MACHINE_DISABLE_IRQ_ENABLE_IRQ (1)
 #define MICROPY_PY_MACHINE_ADC              (1)
 #define MICROPY_PY_MACHINE_ADC_INCLUDEFILE  "ports/mimxrt/machine_adc.c"
+#define MICROPY_PY_MACHINE_ADC_READ_UV      (1)
 #define MICROPY_PY_MACHINE_PIN_MAKE_NEW     mp_pin_make_new
 #define MICROPY_PY_MACHINE_BITSTREAM        (1)
 #define MICROPY_PY_MACHINE_DHT_READINTO     (1)
@@ -113,7 +114,9 @@ uint32_t trng_random_u32(void);
 #define MICROPY_PY_MACHINE_UART             (1)
 #define MICROPY_PY_MACHINE_UART_INCLUDEFILE "ports/mimxrt/machine_uart.c"
 #define MICROPY_PY_MACHINE_UART_SENDBREAK   (1)
+#ifndef MICROPY_PY_MACHINE_UART_IRQ
 #define MICROPY_PY_MACHINE_UART_IRQ         (1)
+#endif
 #define MICROPY_PY_ONEWIRE                  (1)
 #define MICROPY_PY_MACHINE_BOOTLOADER       (1)
 
@@ -124,6 +127,7 @@ uint32_t trng_random_u32(void);
 #define MICROPY_FATFS_RPATH                 (2)
 #define MICROPY_FATFS_MULTI_PARTITION       (1)
 #define MICROPY_FATFS_MAX_SS                (4096)
+#define MICROPY_FATFS_EXFAT                 (1)
 
 #ifndef MICROPY_PY_NETWORK
 #define MICROPY_PY_NETWORK                  (1)
@@ -137,6 +141,10 @@ uint32_t trng_random_u32(void);
 #define MICROPY_PY_HASHLIB_MD5              (MICROPY_PY_SSL)
 #define MICROPY_PY_HASHLIB_SHA1             (MICROPY_PY_SSL)
 #define MICROPY_PY_CRYPTOLIB                (MICROPY_PY_SSL)
+#ifndef MICROPY_PY_NETWORK_PPP_LWIP
+#define MICROPY_PY_NETWORK_PPP_LWIP         (MICROPY_PY_LWIP)
+#endif
+#define MICROPY_PY_LWIP_PPP                 (MICROPY_PY_NETWORK_PPP_LWIP)
 
 #ifndef MICROPY_PY_BLUETOOTH_ENABLE_CENTRAL_MODE
 #define MICROPY_PY_BLUETOOTH_ENABLE_CENTRAL_MODE (1)
diff --git a/ports/mimxrt/sdcard.c b/ports/mimxrt/sdcard.c
index ae52ed5d2cd09..84e2c98949d22 100644
--- a/ports/mimxrt/sdcard.c
+++ b/ports/mimxrt/sdcard.c
@@ -980,7 +980,7 @@ bool sdcard_power_on(mimxrt_sdcard_obj_t *card) {
         return false;
     }
 
-    // Finialize initialization
+    // Finalize initialization
     card->state->initialized = true;
     return true;
 }
diff --git a/ports/minimal/main.c b/ports/minimal/main.c
index 5f472c1afd657..b9e9034bf5172 100644
--- a/ports/minimal/main.c
+++ b/ports/minimal/main.c
@@ -87,7 +87,7 @@ void nlr_jump_fail(void *val) {
     }
 }
 
-void NORETURN __fatal_error(const char *msg) {
+void MP_NORETURN __fatal_error(const char *msg) {
     while (1) {
         ;
     }
diff --git a/ports/nrf/Makefile b/ports/nrf/Makefile
index 59e74dce4215a..7b16974f97023 100644
--- a/ports/nrf/Makefile
+++ b/ports/nrf/Makefile
@@ -129,14 +129,7 @@ CFLAGS_MCU_m4 = $(CFLAGS_CORTEX_M) -mtune=cortex-m4 -mcpu=cortex-m4 -mfpu=fpv4-s
 
 CFLAGS_MCU_m0 = $(CFLAGS_CORTEX_M) -fshort-enums -mtune=cortex-m0 -mcpu=cortex-m0 -mfloat-abi=soft
 
-# linker wrap does not work with lto on older gcc/binutils: https://sourceware.org/bugzilla/show_bug.cgi?id=24406
-GCC_VERSION = $(shell arm-none-eabi-gcc -dumpversion)
-GCC_MAJOR_VERS = $(word 1,$(subst ., ,$(GCC_VERSION)))
-ifeq ($(shell test $(GCC_MAJOR_VERS) -ge 10; echo $$?),0)
 LTO ?= 1
-else
-LTO ?= 0
-endif
 
 ifeq ($(LTO),1)
 CFLAGS += -flto
@@ -268,7 +261,6 @@ SRC_C += $(addprefix lib/tinyusb/src/,\
 	portable/nordic/nrf5x/dcd_nrf5x.c \
 	)
 
-LDFLAGS += -Wl,--wrap=dcd_event_handler
 endif
 
 DRIVERS_SRC_C += $(addprefix modules/,\
diff --git a/ports/nrf/boards/ACTINIUS_ICARUS/board.json b/ports/nrf/boards/ACTINIUS_ICARUS/board.json
index c1d9f1c4ef637..09ed3fcba3bcc 100644
--- a/ports/nrf/boards/ACTINIUS_ICARUS/board.json
+++ b/ports/nrf/boards/ACTINIUS_ICARUS/board.json
@@ -8,7 +8,7 @@
         "icarus-v1.4-front-shadow-p-800.jpg"
     ],
     "mcu": "nrf91",
-    "product": "actinius_icarus",
+    "product": "Icarus",
     "thumbnail": "",
     "url": "https://www.actinius.com/icarus",
     "vendor": "Actinius"
diff --git a/ports/nrf/boards/ARDUINO_NANO_33_BLE_SENSE/board.json b/ports/nrf/boards/ARDUINO_NANO_33_BLE_SENSE/board.json
index 9079fbd666d7a..72b51356114fd 100644
--- a/ports/nrf/boards/ARDUINO_NANO_33_BLE_SENSE/board.json
+++ b/ports/nrf/boards/ARDUINO_NANO_33_BLE_SENSE/board.json
@@ -15,7 +15,7 @@
         "ABX00031_01.iso_998x749.jpg"
     ],
     "mcu": "nrf52",
-    "product": "Arduino Nano 33 BLE Sense",
+    "product": "Nano 33 BLE Sense",
     "thumbnail": "",
     "url": "https://store.arduino.cc/products/arduino-nano-33-ble-sense",
     "vendor": "Arduino"
diff --git a/ports/nrf/boards/ARDUINO_PRIMO/board.json b/ports/nrf/boards/ARDUINO_PRIMO/board.json
index f7afed0ced576..236acfd448c03 100644
--- a/ports/nrf/boards/ARDUINO_PRIMO/board.json
+++ b/ports/nrf/boards/ARDUINO_PRIMO/board.json
@@ -8,8 +8,8 @@
         "arduino_primo.jpg"
     ],
     "mcu": "nrf52",
-    "product": "arduino_primo",
+    "product": "Primo",
     "thumbnail": "",
-    "url": "",
+    "url": "https://docs.arduino.cc/retired/boards/arduino-primo/",
     "vendor": "Arduino"
 }
diff --git a/ports/nrf/boards/BLUEIO_TAG_EVIM/board.json b/ports/nrf/boards/BLUEIO_TAG_EVIM/board.json
index 5b6e5747d5838..e910ea8db2731 100644
--- a/ports/nrf/boards/BLUEIO_TAG_EVIM/board.json
+++ b/ports/nrf/boards/BLUEIO_TAG_EVIM/board.json
@@ -8,7 +8,7 @@
         "blyst-nano-mod-4_jpg_project-body.jpg"
     ],
     "mcu": "nrf52",
-    "product": "blueio_tag_evim",
+    "product": "BLUEIO Tag EVIM",
     "thumbnail": "",
     "url": "https://www.i-syst.com/index.php/products/blyst-nano",
     "vendor": "I-SYST"
diff --git a/ports/nrf/boards/DVK_BL652/board.json b/ports/nrf/boards/DVK_BL652/board.json
index 5c9cfad26e6f5..d0942ca256c70 100644
--- a/ports/nrf/boards/DVK_BL652/board.json
+++ b/ports/nrf/boards/DVK_BL652/board.json
@@ -8,8 +8,8 @@
         "BL652-SA_JPG-500.jpg"
     ],
     "mcu": "nrf52",
-    "product": "dvk_bl652",
+    "product": "DVK-BL652",
     "thumbnail": "",
-    "url": "https://www.lairdconnect.com/wireless-modules/bluetooth-modules/bluetooth-5-modules/bl652-series-bluetooth-v5-nfc-module",
-    "vendor": "Laird Connectivity"
+    "url": "https://www.ezurio.com/wireless-modules/bluetooth-modules/bluetooth-5-modules/bl652-series-bluetooth-v5-nfc-module",
+    "vendor": "Ezurio"
 }
diff --git a/ports/nrf/boards/EVK_NINA_B1/board.json b/ports/nrf/boards/EVK_NINA_B1/board.json
index 657b0fa06db54..ef9c6ae5be2b1 100644
--- a/ports/nrf/boards/EVK_NINA_B1/board.json
+++ b/ports/nrf/boards/EVK_NINA_B1/board.json
@@ -8,7 +8,7 @@
         "EVK-NINA-B1_.jpg"
     ],
     "mcu": "nrf52",
-    "product": "evk_nina_b1",
+    "product": "EVK-NINA-B1",
     "thumbnail": "",
     "url": "https://www.u-blox.com/en/product/evk-nina-b1",
     "vendor": "u-blox"
diff --git a/ports/nrf/boards/EVK_NINA_B3/board.json b/ports/nrf/boards/EVK_NINA_B3/board.json
index 54e3dc3585c3f..6311b17338148 100644
--- a/ports/nrf/boards/EVK_NINA_B3/board.json
+++ b/ports/nrf/boards/EVK_NINA_B3/board.json
@@ -8,7 +8,7 @@
         "EVK-NINA-B3-top.jpg"
     ],
     "mcu": "nrf52",
-    "product": "evk_nina_b3",
+    "product": "EVK-NINA-B3",
     "thumbnail": "",
     "url": "https://www.u-blox.com/en/product/evk-nina-b3",
     "vendor": "u-blox"
diff --git a/ports/nrf/boards/IBK_BLYST_NANO/board.json b/ports/nrf/boards/IBK_BLYST_NANO/board.json
index 562c33607b153..ddbbef66f5b20 100644
--- a/ports/nrf/boards/IBK_BLYST_NANO/board.json
+++ b/ports/nrf/boards/IBK_BLYST_NANO/board.json
@@ -8,7 +8,7 @@
         "blyst-nano-fingertip-close_jpg_content-body-gallery.jpg"
     ],
     "mcu": "nrf52",
-    "product": "ibk_blyst_nano",
+    "product": "IBK BLYST Nano",
     "thumbnail": "",
     "url": "https://www.i-syst.com/products/blyst-nano",
     "vendor": "I-SYST"
diff --git a/ports/nrf/boards/IDK_BLYST_NANO/board.json b/ports/nrf/boards/IDK_BLYST_NANO/board.json
index 199721698d403..cb692f44cda9b 100644
--- a/ports/nrf/boards/IDK_BLYST_NANO/board.json
+++ b/ports/nrf/boards/IDK_BLYST_NANO/board.json
@@ -8,7 +8,7 @@
         "blyst-nano-fingertip-close_jpg_content-body-gallery.jpg"
     ],
     "mcu": "nrf52",
-    "product": "idk_blyst_nano",
+    "product": "IDK BLYST Nano",
     "thumbnail": "",
     "url": "https://www.i-syst.com/products/blyst-nano",
     "vendor": "I-SYST"
diff --git a/ports/nrf/boards/MICROBIT/modules/microbitfont.h b/ports/nrf/boards/MICROBIT/modules/microbitfont.h
index 2ae0c8fab86ba..6e80acfe07214 100644
--- a/ports/nrf/boards/MICROBIT/modules/microbitfont.h
+++ b/ports/nrf/boards/MICROBIT/modules/microbitfont.h
@@ -36,7 +36,7 @@ DEALINGS IN THE SOFTWARE.
   *
   * Example: { 0x08, 0x08, 0x08, 0x0, 0x08 }
   *
-  * The above will produce an exclaimation mark on the second column in form the left.
+  * The above will produce an exclamation mark on the second column in form the left.
   *
   * We could compress further, but the complexity of decode would likely outweigh the gains.
   */
diff --git a/ports/nrf/boards/NRF52840_MDK_USB_DONGLE/board.json b/ports/nrf/boards/NRF52840_MDK_USB_DONGLE/board.json
index 99d0caad235df..102102b6c23b2 100644
--- a/ports/nrf/boards/NRF52840_MDK_USB_DONGLE/board.json
+++ b/ports/nrf/boards/NRF52840_MDK_USB_DONGLE/board.json
@@ -8,7 +8,7 @@
         "dongle_pcba_case.jpg"
     ],
     "mcu": "nrf52",
-    "product": "nrf52840-mdk-usb-dongle",
+    "product": "nrf52840 MDK USB Dongle",
     "thumbnail": "",
     "url": "https://wiki.makerdiary.com/nrf52840-mdk-usb-dongle",
     "vendor": "Makerdiary"
diff --git a/ports/nrf/boards/PCA10028/mpconfigboard.h b/ports/nrf/boards/PCA10028/mpconfigboard.h
index 3dc8ed3459b53..df2e4e85d931f 100644
--- a/ports/nrf/boards/PCA10028/mpconfigboard.h
+++ b/ports/nrf/boards/PCA10028/mpconfigboard.h
@@ -60,3 +60,8 @@
 #define MICROPY_HW_SPI0_MISO        (28)
 
 #define HELP_TEXT_BOARD_LED         "1,2,3,4"
+
+// The JLink CDC on the PCA10028 cannot accept more than 64 incoming bytes at a time.
+// That makes the UART REPL unreliable in general.  But it can be improved to some
+// extent by setting the raw-paste buffer size to that limit of 64.
+#define MICROPY_REPL_STDIN_BUFFER_MAX (64)
diff --git a/ports/nrf/boards/PCA10040/mpconfigboard.h b/ports/nrf/boards/PCA10040/mpconfigboard.h
index b965bf319d082..2b1c4c7ef5cfb 100644
--- a/ports/nrf/boards/PCA10040/mpconfigboard.h
+++ b/ports/nrf/boards/PCA10040/mpconfigboard.h
@@ -64,3 +64,8 @@
 #define MICROPY_HW_PWM2_NAME        "PWM2"
 
 #define HELP_TEXT_BOARD_LED         "1,2,3,4"
+
+// The JLink CDC on the PCA10040 cannot accept more than 64 incoming bytes at a time.
+// That makes the UART REPL unreliable in general.  But it can be improved to some
+// extent by setting the raw-paste buffer size to that limit of 64.
+#define MICROPY_REPL_STDIN_BUFFER_MAX (64)
diff --git a/ports/nrf/boards/SEEED_XIAO_NRF52/board.json b/ports/nrf/boards/SEEED_XIAO_NRF52/board.json
index d40355bb2e2d8..b00044a56a0c9 100644
--- a/ports/nrf/boards/SEEED_XIAO_NRF52/board.json
+++ b/ports/nrf/boards/SEEED_XIAO_NRF52/board.json
@@ -16,8 +16,8 @@
         "XIAO_nrf52840_front.jpg"
     ],
     "mcu": "nrf52",
-    "product": "SEEED XIAO nRF52840 Sense",
+    "product": "XIAO nRF52840 Sense",
     "thumbnail": "",
-    "url": "https://www.seeedstudio.com",
+    "url": "https://www.seeedstudio.com/Seeed-XIAO-BLE-Sense-nRF52840-p-5253.html",
     "vendor": "Seeed Studio"
 }
diff --git a/ports/nrf/boards/WT51822_S4AT/board.json b/ports/nrf/boards/WT51822_S4AT/board.json
index 89d008c6f5da5..2ec42ac4141e9 100644
--- a/ports/nrf/boards/WT51822_S4AT/board.json
+++ b/ports/nrf/boards/WT51822_S4AT/board.json
@@ -8,8 +8,8 @@
         "WT51822-S4AT.jpg"
     ],
     "mcu": "nrf51",
-    "product": "wt51822_s4at",
+    "product": "WT51822-S4AT",
     "thumbnail": "",
-    "url": "http://www.wireless-tag.com/portfolio/wt51822-s4at-2/",
+    "url": "https://shop.wireless-tag.com/products/esp32-c3-mini-1-10pcs-espressif-esp32-c3-mini-1-4mb-flash-pcb-antenna-15-gpios-wifi-ble-5-module-esp32-c3-module-on-esp32-c3-chip",
     "vendor": "Wireless-Tag"
 }
diff --git a/ports/nrf/examples/seeed_tft.py b/ports/nrf/examples/seeed_tft.py
index f53b560226363..263da7ae0be7f 100644
--- a/ports/nrf/examples/seeed_tft.py
+++ b/ports/nrf/examples/seeed_tft.py
@@ -44,6 +44,7 @@
     tf = mount_tf()
     os.listdir()
 """
+
 import vfs
 import time
 import framebuf
diff --git a/ports/nrf/main.c b/ports/nrf/main.c
index 29550bd77a748..21a71c7c9e48c 100644
--- a/ports/nrf/main.c
+++ b/ports/nrf/main.c
@@ -39,6 +39,8 @@
 #include "py/stackctrl.h"
 #include "py/gc.h"
 #include "py/compile.h"
+#include "py/persistentcode.h"
+#include "extmod/misc.h"
 #include "extmod/modmachine.h"
 #include "shared/runtime/pyexec.h"
 #include "readline.h"
@@ -107,7 +109,7 @@ void do_str(const char *src, mp_parse_input_kind_t input_kind) {
 extern uint32_t _heap_start;
 extern uint32_t _heap_end;
 
-void NORETURN _start(void) {
+void MP_NORETURN _start(void) {
     // Hook for a board to run code at start up, for example check if a
     // bootloader should be entered instead of the main application.
     MICROPY_BOARD_STARTUP();
@@ -171,7 +173,8 @@ void NORETURN _start(void) {
             MP_OBJ_NEW_SMALL_INT(MICROPY_HW_UART_REPL),
             MP_OBJ_NEW_SMALL_INT(MICROPY_HW_UART_REPL_BAUD),
         };
-        MP_STATE_VM(dupterm_objs[0]) = MP_OBJ_TYPE_GET_SLOT(&machine_uart_type, make_new)((mp_obj_t)&machine_uart_type, MP_ARRAY_SIZE(args), 0, args);
+        mp_obj_t uart = MP_OBJ_TYPE_GET_SLOT(&machine_uart_type, make_new)((mp_obj_t)&machine_uart_type, MP_ARRAY_SIZE(args), 0, args);
+        mp_os_dupterm_obj.fun.var(1, &uart);
     }
     #endif
 
@@ -353,7 +356,7 @@ void HardFault_Handler(void) {
     #endif
 }
 
-void NORETURN __fatal_error(const char *msg) {
+void MP_NORETURN __fatal_error(const char *msg) {
     while (1) {
         ;
     }
@@ -369,3 +372,16 @@ void MP_WEAK __assert_func(const char *file, int line, const char *func, const c
     printf("Assertion '%s' failed, at file %s:%d\n", expr, file, line);
     __fatal_error("Assertion failed");
 }
+
+#if MICROPY_EMIT_MACHINE_CODE
+void *nrf_native_code_commit(void *buf, unsigned int len, void *reloc) {
+    (void)len;
+    if (reloc) {
+        // Native code in RAM must execute from the IRAM region at 0x00800000, and so relocations
+        // to text must also point to this region.  The MICROPY_MAKE_POINTER_CALLABLE macro will
+        // adjust the `buf` address from RAM to IRAM.
+        mp_native_relocate(reloc, buf, (uintptr_t)MICROPY_MAKE_POINTER_CALLABLE(buf) & ~1);
+    }
+    return buf;
+}
+#endif
diff --git a/ports/nrf/modules/machine/modmachine.c b/ports/nrf/modules/machine/modmachine.c
index de1d0e31246b4..f543265479c48 100644
--- a/ports/nrf/modules/machine/modmachine.c
+++ b/ports/nrf/modules/machine/modmachine.c
@@ -85,8 +85,6 @@
 
 #define MICROPY_PY_MACHINE_EXTRA_GLOBALS \
     { MP_ROM_QSTR(MP_QSTR_info),               MP_ROM_PTR(&machine_info_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_enable_irq),         MP_ROM_PTR(&machine_enable_irq_obj) }, \
-    { MP_ROM_QSTR(MP_QSTR_disable_irq),        MP_ROM_PTR(&machine_disable_irq_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_sleep),              MP_ROM_PTR(&machine_lightsleep_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_Pin),                MP_ROM_PTR(&pin_type) }, \
     \
@@ -181,11 +179,11 @@ static mp_obj_t mp_machine_unique_id(void) {
 }
 
 // Resets the board in a manner similar to pushing the external RESET button.
-NORETURN static void mp_machine_reset(void) {
+MP_NORETURN static void mp_machine_reset(void) {
     NVIC_SystemReset();
 }
 
-NORETURN void mp_machine_bootloader(size_t n_args, const mp_obj_t *args) {
+MP_NORETURN void mp_machine_bootloader(size_t n_args, const mp_obj_t *args) {
     MICROPY_BOARD_ENTER_BOOTLOADER(n_args, args);
     for (;;) {
     }
@@ -199,7 +197,7 @@ static void mp_machine_lightsleep(size_t n_args, const mp_obj_t *args) {
     __WFE();
 }
 
-NORETURN static void mp_machine_deepsleep(size_t n_args, const mp_obj_t *args) {
+MP_NORETURN static void mp_machine_deepsleep(size_t n_args, const mp_obj_t *args) {
     mp_machine_reset();
 }
 
@@ -214,24 +212,3 @@ static mp_obj_t mp_machine_get_freq(void) {
 static void mp_machine_set_freq(size_t n_args, const mp_obj_t *args) {
     mp_raise_NotImplementedError(NULL);
 }
-
-static mp_obj_t machine_enable_irq(void) {
-    #ifndef BLUETOOTH_SD
-    __enable_irq();
-    #else
-
-    #endif
-    return mp_const_none;
-}
-MP_DEFINE_CONST_FUN_OBJ_0(machine_enable_irq_obj, machine_enable_irq);
-
-// Resets the board in a manner similar to pushing the external RESET button.
-static mp_obj_t machine_disable_irq(void) {
-    #ifndef BLUETOOTH_SD
-    __disable_irq();
-    #else
-
-    #endif
-    return mp_const_none;
-}
-MP_DEFINE_CONST_FUN_OBJ_0(machine_disable_irq_obj, machine_disable_irq);
diff --git a/ports/nrf/modules/machine/uart.c b/ports/nrf/modules/machine/uart.c
index 8d5a73e095f5e..4c75bf8209830 100644
--- a/ports/nrf/modules/machine/uart.c
+++ b/ports/nrf/modules/machine/uart.c
@@ -46,6 +46,11 @@
 #include "nrfx_uarte.h"
 #endif
 
+#if defined(NRF52832)
+// The nRF52832 cannot write more than 255 bytes at a time.
+#define UART_MAX_TX_CHUNK (255)
+#endif
+
 typedef struct _machine_uart_buf_t {
     uint8_t tx_buf[1];
     uint8_t rx_buf[1];
@@ -104,6 +109,7 @@ typedef struct _machine_uart_obj_t {
     uint16_t timeout_char;  // timeout waiting between chars (in ms)
     uint8_t uart_id;
     bool initialized;       // static flag. Initialized to False
+    bool attached_to_repl;
     #if MICROPY_PY_MACHINE_UART_IRQ
     uint16_t mp_irq_trigger;   // user IRQ trigger mask
     uint16_t mp_irq_flags;     // user IRQ active IRQ flags
@@ -118,6 +124,13 @@ static machine_uart_obj_t machine_uart_obj[] = {
 };
 
 void uart_init0(void) {
+    for (int i = 0; i < MP_ARRAY_SIZE(machine_uart_obj); i++) {
+        machine_uart_obj[i].attached_to_repl = false;
+    }
+}
+
+void uart_attach_to_repl(machine_uart_obj_t *self, bool attached) {
+    self->attached_to_repl = attached;
 }
 
 static int uart_find(mp_obj_t id) {
@@ -137,14 +150,16 @@ static void uart_event_handler(nrfx_uart_event_t const *p_event, void *p_context
     if (p_event->type == NRFX_UART_EVT_RX_DONE) {
         nrfx_uart_rx(self->p_uart, &self->buf.rx_buf[0], 1);
         int chr = self->buf.rx_buf[0];
-        #if !MICROPY_PY_BLE_NUS && MICROPY_KBD_EXCEPTION
-        if (chr == mp_interrupt_char) {
-            self->buf.rx_ringbuf.iget = 0;
-            self->buf.rx_ringbuf.iput = 0;
-            mp_sched_keyboard_interrupt();
-        } else
-        #endif
-        {
+        if (self->attached_to_repl) {
+            #if MICROPY_KBD_EXCEPTION
+            if (chr == mp_interrupt_char) {
+                mp_sched_keyboard_interrupt();
+            } else
+            #endif
+            {
+                ringbuf_put((ringbuf_t *)&stdin_ringbuf, chr);
+            }
+        } else {
             ringbuf_put((ringbuf_t *)&self->buf.rx_ringbuf, chr);
         }
         #if MICROPY_PY_MACHINE_UART_IRQ
@@ -446,17 +461,29 @@ static mp_uint_t mp_machine_uart_write(mp_obj_t self_in, const void *buf, mp_uin
     #endif
 
     machine_uart_obj_t *self = self_in;
-    nrfx_err_t err = nrfx_uart_tx(self->p_uart, buf, size);
-    if (err == NRFX_SUCCESS) {
+
+    // Send data out, in chunks if needed.
+    mp_uint_t remaining = size;
+    while (remaining) {
+        #ifdef UART_MAX_TX_CHUNK
+        mp_uint_t chunk = MIN(UART_MAX_TX_CHUNK, remaining);
+        #else
+        mp_uint_t chunk = remaining;
+        #endif
+        nrfx_err_t err = nrfx_uart_tx(self->p_uart, buf, chunk);
+        if (err != NRFX_SUCCESS) {
+            *errcode = mp_hal_status_to_errno_table[err];
+            return MP_STREAM_ERROR;
+        }
         while (nrfx_uart_tx_in_progress(self->p_uart)) {
             MICROPY_EVENT_POLL_HOOK;
         }
-        // return number of bytes written
-        return size;
-    } else {
-        *errcode = mp_hal_status_to_errno_table[err];
-        return MP_STREAM_ERROR;
+        buf += chunk;
+        remaining -= chunk;
     }
+
+    // return number of bytes written
+    return size;
 }
 
 static mp_uint_t mp_machine_uart_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg, int *errcode) {
diff --git a/ports/nrf/modules/machine/uart.h b/ports/nrf/modules/machine/uart.h
index 741473ab7a4e3..85c2092458541 100644
--- a/ports/nrf/modules/machine/uart.h
+++ b/ports/nrf/modules/machine/uart.h
@@ -34,8 +34,7 @@
 typedef struct _machine_uart_obj_t machine_uart_obj_t;
 
 void uart_init0(void);
-void uart_deinit(void);
-void uart_irq_handler(mp_uint_t uart_id);
+void uart_attach_to_repl(machine_uart_obj_t *self, bool attached);
 
 bool uart_rx_any(machine_uart_obj_t *uart_obj);
 int uart_rx_char(machine_uart_obj_t *uart_obj);
diff --git a/ports/nrf/modules/nrf/flashbdev.c b/ports/nrf/modules/nrf/flashbdev.c
index e490dc53dd677..41833b228e2ff 100644
--- a/ports/nrf/modules/nrf/flashbdev.c
+++ b/ports/nrf/modules/nrf/flashbdev.c
@@ -80,7 +80,7 @@ mp_obj_t nrf_flashbdev_writeblocks(size_t n_args, const mp_obj_t *args) {
     nrf_flash_obj_t *self = MP_OBJ_TO_PTR(args[0]);
     uint32_t block_num = mp_obj_get_int(args[1]);
     mp_buffer_info_t bufinfo;
-    mp_get_buffer_raise(args[2], &bufinfo, MP_BUFFER_WRITE);
+    mp_get_buffer_raise(args[2], &bufinfo, MP_BUFFER_READ);
 
     mp_int_t address = self->start + (block_num * FLASH_PAGESIZE);
 
diff --git a/ports/nrf/modules/os/modos.c b/ports/nrf/modules/os/modos.c
index f000e1eeb6457..97ed1e1badbbc 100644
--- a/ports/nrf/modules/os/modos.c
+++ b/ports/nrf/modules/os/modos.c
@@ -30,6 +30,7 @@
 #include "py/runtime.h"
 #include "extmod/modmachine.h"
 #include "drivers/rng.h"
+#include "modules/machine/uart.h"
 
 #if MICROPY_PY_OS_URANDOM
 // Return a bytes object with n random bytes, generated by the hardware random number generator.
@@ -46,10 +47,17 @@ static MP_DEFINE_CONST_FUN_OBJ_1(mp_os_urandom_obj, mp_os_urandom);
 #endif
 
 #if MICROPY_PY_OS_DUPTERM
-// TODO should accept any object with read/write methods.
 void mp_os_dupterm_stream_detached_attached(mp_obj_t stream_detached, mp_obj_t stream_attached) {
-    if (!(stream_attached == mp_const_none || mp_obj_get_type(stream_attached) == &machine_uart_type)) {
-        mp_raise_ValueError(MP_ERROR_TEXT("need a UART object"));
+    #if MICROPY_PY_MACHINE_UART
+    if (mp_obj_get_type(stream_detached) == &machine_uart_type) {
+        uart_attach_to_repl(MP_OBJ_TO_PTR(stream_detached), false);
     }
+    #endif
+
+    #if MICROPY_PY_MACHINE_UART
+    if (mp_obj_get_type(stream_attached) == &machine_uart_type) {
+        uart_attach_to_repl(MP_OBJ_TO_PTR(stream_attached), true);
+    }
+    #endif
 }
 #endif // MICROPY_PY_OS_DUPTERM
diff --git a/ports/nrf/mpconfigport.h b/ports/nrf/mpconfigport.h
index 7cc8a66d9840c..d52b5745d4e8f 100644
--- a/ports/nrf/mpconfigport.h
+++ b/ports/nrf/mpconfigport.h
@@ -181,6 +181,7 @@
 #define MICROPY_PY_MACHINE_RESET    (1)
 #define MICROPY_PY_MACHINE_BARE_METAL_FUNCS (1)
 #define MICROPY_PY_MACHINE_BOOTLOADER (1)
+#define MICROPY_PY_MACHINE_DISABLE_IRQ_ENABLE_IRQ (1)
 #define MICROPY_PY_MACHINE_PULSE    (0)
 #define MICROPY_PY_MACHINE_SOFTI2C  (MICROPY_PY_MACHINE_I2C)
 
@@ -320,7 +321,17 @@
 
 // type definitions for the specific machine
 
-#define MICROPY_MAKE_POINTER_CALLABLE(p) ((void *)((mp_uint_t)(p) | 1))
+#if defined(NRF52832) || defined(NRF52840)
+// On nRF52, the physical SRAM is mapped to 0x20000000 for data access and 0x00800000
+// for instruction access.  So convert addresses to make them executable.
+#define MICROPY_PERSISTENT_CODE_TRACK_FUN_DATA (1)
+#define MICROPY_PERSISTENT_CODE_TRACK_BSS_RODATA (0)
+#define MICROPY_MAKE_POINTER_CALLABLE(p) ((void *)(((uintptr_t)(p) - 0x20000000 + 0x00800000) | 1))
+void *nrf_native_code_commit(void *, unsigned int, void *);
+#define MP_PLAT_COMMIT_EXEC(buf, len, reloc) nrf_native_code_commit(buf, len, reloc)
+#else
+#define MICROPY_MAKE_POINTER_CALLABLE(p) ((void *)((uintptr_t)(p) | 1))
+#endif
 
 #define MP_SSIZE_MAX (0x7fffffff)
 
diff --git a/ports/nrf/mphalport.c b/ports/nrf/mphalport.c
index 9bb51deb12153..3a3d3ad7a6863 100644
--- a/ports/nrf/mphalport.c
+++ b/ports/nrf/mphalport.c
@@ -202,7 +202,7 @@ const byte mp_hal_status_to_errno_table[4] = {
     [HAL_TIMEOUT] = MP_ETIMEDOUT,
 };
 
-NORETURN void mp_hal_raise(HAL_StatusTypeDef status) {
+MP_NORETURN void mp_hal_raise(HAL_StatusTypeDef status) {
     mp_raise_OSError(mp_hal_status_to_errno_table[status]);
 }
 
diff --git a/ports/nrf/mphalport.h b/ports/nrf/mphalport.h
index a0bca58a625ba..12e881d7b636b 100644
--- a/ports/nrf/mphalport.h
+++ b/ports/nrf/mphalport.h
@@ -35,6 +35,22 @@
 #include "nrfx_config.h"
 #include "shared/runtime/interrupt_char.h"
 
+// Entering a critical section.
+#ifndef BLUETOOTH_SD
+#define MICROPY_BEGIN_ATOMIC_SECTION()     disable_irq()
+#define MICROPY_END_ATOMIC_SECTION(state)  enable_irq(state)
+#endif
+
+static inline void enable_irq(mp_uint_t state) {
+    __set_PRIMASK(state);
+}
+
+static inline mp_uint_t disable_irq(void) {
+    mp_uint_t state = __get_PRIMASK();
+    __disable_irq();
+    return state;
+}
+
 typedef enum
 {
     HAL_OK       = 0x00,
@@ -47,7 +63,7 @@ extern const unsigned char mp_hal_status_to_errno_table[4];
 
 extern ringbuf_t stdin_ringbuf;
 
-NORETURN void mp_hal_raise(HAL_StatusTypeDef status);
+MP_NORETURN void mp_hal_raise(HAL_StatusTypeDef status);
 void mp_hal_set_interrupt_char(int c); // -1 to disable
 
 int mp_hal_stdin_rx_chr(void);
diff --git a/ports/pic16bit/main.c b/ports/pic16bit/main.c
index b1fe7321f0d46..437f91ca7c75c 100644
--- a/ports/pic16bit/main.c
+++ b/ports/pic16bit/main.c
@@ -121,7 +121,7 @@ void nlr_jump_fail(void *val) {
     }
 }
 
-void NORETURN __fatal_error(const char *msg) {
+void MP_NORETURN __fatal_error(const char *msg) {
     while (1) {
         ;
     }
diff --git a/ports/powerpc/main.c b/ports/powerpc/main.c
index 4b668c861c96b..bbd2082b42b17 100644
--- a/ports/powerpc/main.c
+++ b/ports/powerpc/main.c
@@ -130,7 +130,7 @@ void nlr_jump_fail(void *val) {
     }
 }
 
-void NORETURN __fatal_error(const char *msg) {
+void MP_NORETURN __fatal_error(const char *msg) {
     while (1) {
         ;
     }
diff --git a/ports/qemu/boards/SABRELITE/mpconfigboard.mk b/ports/qemu/boards/SABRELITE/mpconfigboard.mk
index 80ea08f12cf76..e56dba712ff44 100644
--- a/ports/qemu/boards/SABRELITE/mpconfigboard.mk
+++ b/ports/qemu/boards/SABRELITE/mpconfigboard.mk
@@ -12,6 +12,10 @@ LDSCRIPT = mcu/arm/imx6.ld
 
 SRC_BOARD_O = shared/runtime/gchelper_generic.o
 
+# Use a larger heap than the default so tests run with the native emitter have
+# enough memory (because emitted ARM machine code is larger than Thumb2 code).
+MICROPY_HEAP_SIZE ?= 163840
+
 # It's really armv7a but closest supported value is armv6.
 MPY_CROSS_FLAGS += -march=armv6
 
diff --git a/ports/qemu/mcu/arm/errorhandler.c b/ports/qemu/mcu/arm/errorhandler.c
index a0e7ef930f0b8..a647c0e153606 100644
--- a/ports/qemu/mcu/arm/errorhandler.c
+++ b/ports/qemu/mcu/arm/errorhandler.c
@@ -63,7 +63,7 @@ static const char *EXCEPTION_NAMES_TABLE[] = {
 // R0-R15, PSR, Kind
 uintptr_t registers_copy[18] = { 0 };
 
-__attribute__((naked)) NORETURN void exception_handler(uintptr_t kind) {
+__attribute__((naked)) MP_NORETURN void exception_handler(uintptr_t kind) {
     // Save registers
     __asm volatile (
         "ldr r1, =registers_copy \n"
@@ -137,39 +137,39 @@ __attribute__((naked)) NORETURN void exception_handler(uintptr_t kind) {
     for (;;) {}
 }
 
-__attribute__((naked)) NORETURN void NMI_Handler(void) {
+__attribute__((naked)) MP_NORETURN void NMI_Handler(void) {
     exception_handler(NMI);
 }
 
-__attribute__((naked)) NORETURN void HardFault_Handler(void) {
+__attribute__((naked)) MP_NORETURN void HardFault_Handler(void) {
     exception_handler(HARD_FAULT);
 }
 
-__attribute__((naked)) NORETURN void MemManage_Handler(void) {
+__attribute__((naked)) MP_NORETURN void MemManage_Handler(void) {
     exception_handler(MEM_MANAGE);
 }
 
-__attribute__((naked)) NORETURN void BusFault_Handler(void) {
+__attribute__((naked)) MP_NORETURN void BusFault_Handler(void) {
     exception_handler(BUS_FAULT);
 }
 
-__attribute__((naked)) NORETURN void UsageFault_Handler(void) {
+__attribute__((naked)) MP_NORETURN void UsageFault_Handler(void) {
     exception_handler(USAGE_FAULT);
 }
 
-__attribute__((naked)) NORETURN void SVC_Handler(void) {
+__attribute__((naked)) MP_NORETURN void SVC_Handler(void) {
     exception_handler(SV_CALL);
 }
 
-__attribute__((naked)) NORETURN void DebugMon_Handler(void) {
+__attribute__((naked)) MP_NORETURN void DebugMon_Handler(void) {
     exception_handler(DEBUG_MONITOR);
 }
 
-__attribute__((naked)) NORETURN void PendSV_Handler(void) {
+__attribute__((naked)) MP_NORETURN void PendSV_Handler(void) {
     exception_handler(PENDING_SV);
 }
 
-__attribute__((naked)) NORETURN void SysTick_Handler(void) {
+__attribute__((naked)) MP_NORETURN void SysTick_Handler(void) {
     exception_handler(SYSTEM_TICK);
 }
 
diff --git a/ports/qemu/mcu/arm/startup.c b/ports/qemu/mcu/arm/startup.c
index dbb75e3392287..a7e9efb9fba0f 100644
--- a/ports/qemu/mcu/arm/startup.c
+++ b/ports/qemu/mcu/arm/startup.c
@@ -52,7 +52,7 @@ __attribute__((naked)) void Reset_Handler(void) {
     _start();
 }
 
-NORETURN void Default_Handler(void) {
+MP_NORETURN void Default_Handler(void) {
     for (;;) {
     }
 }
diff --git a/ports/qemu/mpconfigport.h b/ports/qemu/mpconfigport.h
index 0a25df4d0ac10..b02507277323e 100644
--- a/ports/qemu/mpconfigport.h
+++ b/ports/qemu/mpconfigport.h
@@ -64,6 +64,7 @@
 #define MICROPY_PY_MACHINE_PIN_BASE (1)
 #define MICROPY_VFS                 (1)
 #define MICROPY_VFS_ROM             (1)
+#define MICROPY_VFS_ROM_IOCTL       (0)
 
 // type definitions for the specific machine
 
diff --git a/ports/renesas-ra/Makefile b/ports/renesas-ra/Makefile
index 03eb9b52b41b8..fd74c60a8564e 100644
--- a/ports/renesas-ra/Makefile
+++ b/ports/renesas-ra/Makefile
@@ -157,9 +157,6 @@ LIBSTDCPP_FILE_NAME = "$(shell $(CXX) $(CXXFLAGS) -print-file-name=libstdc++.a)"
 LDFLAGS += -L"$(shell dirname $(LIBSTDCPP_FILE_NAME))"
 endif
 
-# Hook tinyusb USB interrupt if used to service usb task.
-LDFLAGS += --wrap=dcd_event_handler
-
 # Options for mpy-cross
 MPY_CROSS_FLAGS += -march=armv7m
 
@@ -250,6 +247,7 @@ SRC_C += \
 	machine_pin.c \
 	machine_rtc.c \
 	machine_sdcard.c \
+	modrenesas.c \
 	extint.c \
 	usrsw.c \
 	flash.c \
diff --git a/ports/renesas-ra/boards/ARDUINO_PORTENTA_C33/board.json b/ports/renesas-ra/boards/ARDUINO_PORTENTA_C33/board.json
index 4c4d4e4326b3d..70a33b3515016 100644
--- a/ports/renesas-ra/boards/ARDUINO_PORTENTA_C33/board.json
+++ b/ports/renesas-ra/boards/ARDUINO_PORTENTA_C33/board.json
@@ -15,7 +15,7 @@
         "ABX00074_01.iso_1000x750.jpg"
     ],
     "mcu": "RA6M5",
-    "product": "Arduino Portenta C33",
+    "product": "Portenta C33",
     "thumbnail": "",
     "url": "https://store.arduino.cc/pages/portenta-c33",
     "vendor": "Arduino"
diff --git a/ports/renesas-ra/main.c b/ports/renesas-ra/main.c
index febb7b6d7aaa3..cfc4611ecb5cd 100644
--- a/ports/renesas-ra/main.c
+++ b/ports/renesas-ra/main.c
@@ -88,7 +88,7 @@ static machine_uart_obj_t machine_uart_repl_obj;
 static uint8_t machine_uart_repl_rxbuf[MICROPY_HW_UART_REPL_RXBUF];
 #endif
 
-void NORETURN __fatal_error(const char *msg) {
+void MP_NORETURN __fatal_error(const char *msg) {
     for (volatile uint delay = 0; delay < 1000000; delay++) {
     }
     led_state(1, 1);
diff --git a/ports/renesas-ra/modmachine.c b/ports/renesas-ra/modmachine.c
index dc38d809dd701..c23ce7e4695da 100644
--- a/ports/renesas-ra/modmachine.c
+++ b/ports/renesas-ra/modmachine.c
@@ -184,12 +184,12 @@ static mp_obj_t mp_machine_unique_id(void) {
 }
 
 // Resets the pyboard in a manner similar to pushing the external RESET button.
-NORETURN static void mp_machine_reset(void) {
+MP_NORETURN static void mp_machine_reset(void) {
     powerctrl_mcu_reset();
 }
 
 // Activate the bootloader without BOOT* pins.
-NORETURN void mp_machine_bootloader(size_t n_args, const mp_obj_t *args) {
+MP_NORETURN void mp_machine_bootloader(size_t n_args, const mp_obj_t *args) {
     #if MICROPY_HW_ENABLE_STORAGE
     storage_flush();
     #endif
@@ -232,7 +232,7 @@ static void mp_machine_lightsleep(size_t n_args, const mp_obj_t *args) {
     powerctrl_enter_stop_mode();
 }
 
-NORETURN static void mp_machine_deepsleep(size_t n_args, const mp_obj_t *args) {
+MP_NORETURN static void mp_machine_deepsleep(size_t n_args, const mp_obj_t *args) {
     if (n_args != 0) {
         mp_obj_t args2[2] = {MP_OBJ_NULL, args[0]};
         machine_rtc_wakeup(2, args2);
diff --git a/ports/renesas-ra/modrenesas.c b/ports/renesas-ra/modrenesas.c
new file mode 100644
index 0000000000000..2524bbe6d7d0c
--- /dev/null
+++ b/ports/renesas-ra/modrenesas.c
@@ -0,0 +1,41 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Damien P. George
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "py/runtime.h"
+#include "storage.h"
+
+static const mp_rom_map_elem_t renesas_module_globals_table[] = {
+    { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_renesas) },
+    { MP_ROM_QSTR(MP_QSTR_Flash),    MP_ROM_PTR(&pyb_flash_type) },
+};
+static MP_DEFINE_CONST_DICT(renesas_module_globals, renesas_module_globals_table);
+
+const mp_obj_module_t mp_module_renesas = {
+    .base = { &mp_type_module },
+    .globals = (mp_obj_dict_t *)&renesas_module_globals,
+};
+
+MP_REGISTER_MODULE(MP_QSTR_renesas, mp_module_renesas);
diff --git a/ports/renesas-ra/mphalport.c b/ports/renesas-ra/mphalport.c
index 1c62c23dd70be..b2587af06de2c 100644
--- a/ports/renesas-ra/mphalport.c
+++ b/ports/renesas-ra/mphalport.c
@@ -61,7 +61,7 @@ const byte mp_hal_status_to_errno_table[4] = {
     [HAL_TIMEOUT] = MP_ETIMEDOUT,
 };
 
-NORETURN void mp_hal_raise(HAL_StatusTypeDef status) {
+MP_NORETURN void mp_hal_raise(HAL_StatusTypeDef status) {
     mp_raise_OSError(mp_hal_status_to_errno_table[status]);
 }
 
diff --git a/ports/renesas-ra/mphalport.h b/ports/renesas-ra/mphalport.h
index 0819abeaf617e..1dab67f9a76db 100644
--- a/ports/renesas-ra/mphalport.h
+++ b/ports/renesas-ra/mphalport.h
@@ -49,7 +49,7 @@ static inline int mp_hal_status_to_neg_errno(HAL_StatusTypeDef status) {
     return -mp_hal_status_to_errno_table[status];
 }
 
-NORETURN void mp_hal_raise(HAL_StatusTypeDef status);
+MP_NORETURN void mp_hal_raise(HAL_StatusTypeDef status);
 void mp_hal_set_interrupt_char(int c); // -1 to disable
 
 static inline void mp_hal_wake_main_task_from_isr(void) {
diff --git a/ports/renesas-ra/powerctrl.c b/ports/renesas-ra/powerctrl.c
index 548d31679adaa..04c39b35110b2 100644
--- a/ports/renesas-ra/powerctrl.c
+++ b/ports/renesas-ra/powerctrl.c
@@ -174,7 +174,7 @@ const lpm_instance_t g_lpm_standby = {
 
 #endif
 
-NORETURN void powerctrl_mcu_reset(void) {
+MP_NORETURN void powerctrl_mcu_reset(void) {
     #if BSP_TZ_SECURE_BUILD
     R_BSP_NonSecureEnter();
     #else
@@ -185,7 +185,7 @@ NORETURN void powerctrl_mcu_reset(void) {
     }
 }
 
-NORETURN void powerctrl_enter_bootloader(uint32_t r0, uint32_t bl_addr) {
+MP_NORETURN void powerctrl_enter_bootloader(uint32_t r0, uint32_t bl_addr) {
     while (1) {
         ;
     }
@@ -245,7 +245,7 @@ void powerctrl_enter_stop_mode(void) {
     enable_irq(irq_state);
 }
 
-NORETURN void powerctrl_enter_standby_mode(void) {
+MP_NORETURN void powerctrl_enter_standby_mode(void) {
     rtc_init_finalise();
 
     #if defined(MICROPY_BOARD_ENTER_STANDBY)
diff --git a/ports/renesas-ra/powerctrl.h b/ports/renesas-ra/powerctrl.h
index 34c40ea1adc32..37932b1002bee 100644
--- a/ports/renesas-ra/powerctrl.h
+++ b/ports/renesas-ra/powerctrl.h
@@ -32,11 +32,11 @@
 
 void SystemClock_Config(void);
 
-NORETURN void powerctrl_mcu_reset(void);
-NORETURN void powerctrl_enter_bootloader(uint32_t r0, uint32_t bl_addr);
+MP_NORETURN void powerctrl_mcu_reset(void);
+MP_NORETURN void powerctrl_enter_bootloader(uint32_t r0, uint32_t bl_addr);
 void powerctrl_check_enter_bootloader(void);
 
 void powerctrl_enter_stop_mode(void);
-NORETURN void powerctrl_enter_standby_mode(void);
+MP_NORETURN void powerctrl_enter_standby_mode(void);
 
 #endif // MICROPY_INCLUDED_RA_POWERCTRL_H
diff --git a/ports/renesas-ra/uart.c b/ports/renesas-ra/uart.c
index c319b4c0a8dca..4800e0ea03f95 100644
--- a/ports/renesas-ra/uart.c
+++ b/ports/renesas-ra/uart.c
@@ -42,7 +42,7 @@
 
 typedef int (*KEYEX_CB)(uint32_t d);
 
-extern void NORETURN __fatal_error(const char *msg);
+extern void MP_NORETURN __fatal_error(const char *msg);
 #if MICROPY_KBD_EXCEPTION
 extern int mp_interrupt_char;
 static KEYEX_CB keyex_cb[MICROPY_HW_MAX_UART] = {(KEYEX_CB)NULL};
diff --git a/ports/rp2/CMakeLists.txt b/ports/rp2/CMakeLists.txt
index 8a4092529b1f2..cf9f180792832 100644
--- a/ports/rp2/CMakeLists.txt
+++ b/ports/rp2/CMakeLists.txt
@@ -66,6 +66,11 @@ if(NOT MICROPY_C_HEAP_SIZE)
     set(MICROPY_C_HEAP_SIZE 0)
 endif()
 
+# Enable error text compression by default.
+if(NOT MICROPY_ROM_TEXT_COMPRESSION)
+    set(MICROPY_ROM_TEXT_COMPRESSION ON)
+endif()
+
 # Enable extmod components that will be configured by extmod.cmake.
 # A board may also have enabled additional components.
 set(MICROPY_SSL_MBEDTLS ON)
@@ -76,8 +81,11 @@ if (MICROPY_PY_NETWORK_CYW43)
 endif()
 
 # Necessary submodules for all boards.
-string(CONCAT GIT_SUBMODULES "${GIT_SUBMODULES} " lib/mbedtls)
-string(CONCAT GIT_SUBMODULES "${GIT_SUBMODULES} " lib/tinyusb)
+list(APPEND GIT_SUBMODULES lib/mbedtls)
+list(APPEND GIT_SUBMODULES lib/tinyusb)
+
+# Workaround for pico-sdk host toolchain issue, see directory for details
+list(APPEND CMAKE_MODULE_PATH "${MICROPY_PORT_DIR}/tools_patch")
 
 # Include component cmake fragments
 include(${MICROPY_DIR}/py/py.cmake)
@@ -165,6 +173,7 @@ set(MICROPY_SOURCE_PORT
     pendsv.c
     rp2_flash.c
     rp2_pio.c
+    rp2_psram.c
     rp2_dma.c
     uart.c
     usbd.c
@@ -276,7 +285,7 @@ if(PICO_RP2040)
 elseif(PICO_RP2350 AND PICO_ARM)
     target_sources(pico_float_micropython INTERFACE
         ${PICO_SDK_PATH}/src/rp2_common/pico_float/float_aeabi_dcp.S
-        ${PICO_SDK_PATH}/src/rp2_common/pico_float/float_conv_m33.S
+        ${PICO_SDK_PATH}/src/rp2_common/pico_float/float_common_m33.S
     )
 endif()
 
@@ -340,7 +349,7 @@ if (MICROPY_PY_BLUETOOTH_CYW43)
 endif()
 
 if (MICROPY_BLUETOOTH_BTSTACK)
-    string(CONCAT GIT_SUBMODULES "${GIT_SUBMODULES} " lib/btstack)
+    list(APPEND GIT_SUBMODULES lib/btstack)
 
     list(APPEND MICROPY_SOURCE_PORT mpbtstackport.c)
 
@@ -358,8 +367,8 @@ if (MICROPY_BLUETOOTH_BTSTACK)
 endif()
 
 if(MICROPY_BLUETOOTH_NIMBLE)
-    string(CONCAT GIT_SUBMODULES "${GIT_SUBMODULES} " lib/mynewt-nimble)
-    if(NOT (${ECHO_SUBMODULES}) AND NOT EXISTS ${MICROPY_DIR}/lib/mynewt-nimble/nimble/host/include/host/ble_hs.h)
+    list(APPEND GIT_SUBMODULES lib/mynewt-nimble)
+    if(NOT UPDATE_SUBMODULES AND NOT EXISTS ${MICROPY_DIR}/lib/mynewt-nimble/nimble/host/include/host/ble_hs.h)
         message(FATAL_ERROR " mynewt-nimble not initialized.\n Run 'make BOARD=${MICROPY_BOARD} submodules'")
     endif()
 
@@ -386,8 +395,8 @@ target_include_directories(${MICROPY_TARGET} PRIVATE
 )
 
 if (MICROPY_PY_NETWORK_CYW43)
-    string(CONCAT GIT_SUBMODULES "${GIT_SUBMODULES} " lib/cyw43-driver)
-    if((NOT (${ECHO_SUBMODULES})) AND NOT EXISTS ${MICROPY_DIR}/lib/cyw43-driver/src/cyw43.h)
+    list(APPEND GIT_SUBMODULES lib/cyw43-driver)
+    if(NOT UPDATE_SUBMODULES AND NOT EXISTS ${MICROPY_DIR}/lib/cyw43-driver/src/cyw43.h)
         message(FATAL_ERROR " cyw43-driver not initialized.\n Run 'make BOARD=${MICROPY_BOARD} submodules'")
     endif()
 
@@ -425,7 +434,7 @@ if (MICROPY_PY_NETWORK_NINAW10)
 
     # Enable NINA-W10 WiFi and Bluetooth drivers.
     list(APPEND MICROPY_SOURCE_DRIVERS
-        ${MICROPY_DIR}/drivers/ninaw10/nina_bt_hci.c
+        ${MICROPY_DIR}/drivers/ninaw10/nina_bthci_uart.c
         ${MICROPY_DIR}/drivers/ninaw10/nina_wifi_drv.c
         ${MICROPY_DIR}/drivers/ninaw10/nina_wifi_bsp.c
         ${MICROPY_DIR}/drivers/ninaw10/machine_pin_nina.c
@@ -433,8 +442,8 @@ if (MICROPY_PY_NETWORK_NINAW10)
 endif()
 
 if (MICROPY_PY_NETWORK_WIZNET5K)
-    string(CONCAT GIT_SUBMODULES "${GIT_SUBMODULES} " lib/wiznet5k)
-    if((NOT (${ECHO_SUBMODULES})) AND NOT EXISTS ${MICROPY_DIR}/lib/wiznet5k/README.md)
+    list(APPEND GIT_SUBMODULES lib/wiznet5k)
+    if(NOT UPDATE_SUBMODULES AND NOT EXISTS ${MICROPY_DIR}/lib/wiznet5k/README.md)
         message(FATAL_ERROR " wiznet5k not initialized.\n Run 'make BOARD=${MICROPY_BOARD} submodules'")
     endif()
 
@@ -516,10 +525,23 @@ target_compile_options(${MICROPY_TARGET} PRIVATE
 
 target_link_options(${MICROPY_TARGET} PRIVATE
     -Wl,--defsym=__micropy_c_heap_size__=${MICROPY_C_HEAP_SIZE}
-    -Wl,--wrap=dcd_event_handler
     -Wl,--wrap=runtime_init_clocks
 )
 
+if(PICO_FLASH_SIZE_BYTES GREATER 0)
+    target_link_options(${MICROPY_TARGET} PRIVATE
+        -Wl,--defsym=__micropy_flash_size__=${PICO_FLASH_SIZE_BYTES}
+    )
+elseif(PICO_RP2040)
+    target_link_options(${MICROPY_TARGET} PRIVATE
+        -Wl,--defsym=__micropy_flash_size__=2048k # Default to 2MB
+    )
+elseif(PICO_RP2350)
+    target_link_options(${MICROPY_TARGET} PRIVATE
+        -Wl,--defsym=__micropy_flash_size__=4096k # Default to 4MB
+    )
+endif()
+
 if(PICO_RP2350)
     target_link_options(${MICROPY_TARGET} PRIVATE
         -Wl,--defsym=__micropy_extra_stack__=4096
diff --git a/ports/rp2/Makefile b/ports/rp2/Makefile
index 200899d338e6a..2895faaca6178 100644
--- a/ports/rp2/Makefile
+++ b/ports/rp2/Makefile
@@ -56,24 +56,25 @@ ifdef MICROPY_PREVIEW_VERSION_2
 CMAKE_ARGS += -DMICROPY_PREVIEW_VERSION_2=1
 endif
 
+HELP_PICO_SDK_SUBMODULE ?= "\033[1;31mError: pico-sdk submodule is not initialized.\033[0m Run 'make submodules'"
 HELP_BUILD_ERROR ?= "See \033[1;31mhttps://github.com/micropython/micropython/wiki/Build-Troubleshooting\033[0m"
 
 all:
-	[ -e $(BUILD)/Makefile ] || cmake -S . -B $(BUILD) -DPICO_BUILD_DOCS=0 ${CMAKE_ARGS}
-	$(MAKE) $(MAKE_ARGS) -C $(BUILD) || (echo -e $(HELP_BUILD_ERROR); false)
+	$(Q)[ -f ../../lib/pico-sdk/README.md ] || (echo -e $(HELP_PICO_SDK_SUBMODULE); false)
+	$(Q)[ -e $(BUILD)/Makefile ] || cmake -S . -B $(BUILD) -DPICO_BUILD_DOCS=0 ${CMAKE_ARGS}
+	$(Q)$(MAKE) $(MAKE_ARGS) -C $(BUILD) || (echo -e $(HELP_BUILD_ERROR); false)
 
 clean:
 	$(RM) -rf $(BUILD)
 
-# First ensure that pico-sdk is initialised, then use cmake to pick everything
-# else (including board-specific dependencies).
-# Running the build with ECHO_SUBMODULES set will trigger py/mkrules.cmake to
-# print out the value of the GIT_SUBMODULES variable, prefixed with
-# "GIT_SUBMODULES", and then abort. This extracts out that line from the cmake
-# output and passes the list of submodules to py/mkrules.mk which does the
-# `git submodule init` on each.
+deploy: all
+	$(Q)picotool load -x $(BUILD)/firmware.elf
+
+# First ensure that pico-sdk is initialised, then run CMake with the
+# UPDATE_SUBMODULES flag to update necessary submodules for this board.
+#
+# This is done in a dedicated build directory as some CMake cache values are not
+# set correctly if not all submodules are loaded yet.
 submodules:
-	$(MAKE) -f ../../py/mkrules.mk GIT_SUBMODULES="lib/pico-sdk" submodules
-	@GIT_SUBMODULES=$$(cmake -B $(BUILD)/submodules -DECHO_SUBMODULES=1 ${CMAKE_ARGS} -S . 2>&1 | \
-	                  grep '^GIT_SUBMODULES=' | cut -d= -f2); \
-	$(MAKE) -f ../../py/mkrules.mk GIT_SUBMODULES="$${GIT_SUBMODULES}" GIT_SUBMODULES_FAIL_IF_EMPTY=1 submodules
+	$(Q)$(MAKE) -f ../../py/mkrules.mk GIT_SUBMODULES="lib/pico-sdk" submodules
+	$(Q)cmake -S . -B $(BUILD)/submodules -DUPDATE_SUBMODULES=1 ${CMAKE_ARGS}
diff --git a/ports/rp2/README.md b/ports/rp2/README.md
index 911d797fe01a2..41fca97f95ec9 100644
--- a/ports/rp2/README.md
+++ b/ports/rp2/README.md
@@ -47,8 +47,10 @@ pass the board name to the build; e.g. for Raspberry Pi Pico W:
 ## Deploying firmware to the device
 
 Firmware can be deployed to the device by putting it into bootloader mode
-(hold down BOOTSEL while powering on or resetting) and then copying
-`firmware.uf2` to the USB mass storage device that appears.
+(hold down BOOTSEL while powering on or resetting) and then either copying
+`firmware.uf2` to the USB mass storage device that appears, or using
+`picotool load -x firmware.elf`.  The latter command can be accessed
+conveniently via `make deploy`.
 
 If MicroPython is already installed then the bootloader can be entered by
 executing `import machine; machine.bootloader()` at the REPL.
diff --git a/ports/rp2/boards/ARDUINO_NANO_RP2040_CONNECT/board.json b/ports/rp2/boards/ARDUINO_NANO_RP2040_CONNECT/board.json
index 5639aaa2a4b7b..5914445ed8373 100644
--- a/ports/rp2/boards/ARDUINO_NANO_RP2040_CONNECT/board.json
+++ b/ports/rp2/boards/ARDUINO_NANO_RP2040_CONNECT/board.json
@@ -17,7 +17,7 @@
         "ABX00052_01.iso_999x750.jpg"
     ],
     "mcu": "rp2040",
-    "product": "Arduino Nano RP2040 Connect",
+    "product": "Nano RP2040 Connect",
     "thumbnail": "",
     "url": "https://store-usa.arduino.cc/products/arduino-nano-rp2040-connect",
     "vendor": "Arduino"
diff --git a/ports/rp2/boards/GARATRONIC_PYBSTICK26_RP2040/board.json b/ports/rp2/boards/GARATRONIC_PYBSTICK26_RP2040/board.json
index df9dd5d0de8e4..108d632678bbf 100644
--- a/ports/rp2/boards/GARATRONIC_PYBSTICK26_RP2040/board.json
+++ b/ports/rp2/boards/GARATRONIC_PYBSTICK26_RP2040/board.json
@@ -13,7 +13,7 @@
         "pybstick-rp2040-26-broches-micropython-c.jpg"
     ],
     "mcu": "rp2040",
-    "product": "PYBSTICK26 RP2040",
+    "product": "RP2040 PYBStick",
     "thumbnail": "",
     "url": "https://shop.mchobby.be/product.php?id_product=2331",
     "vendor": "McHobby"
diff --git a/ports/rp2/boards/MACHDYNE_WERKZEUG/board.json b/ports/rp2/boards/MACHDYNE_WERKZEUG/board.json
new file mode 100644
index 0000000000000..c657f18b21de6
--- /dev/null
+++ b/ports/rp2/boards/MACHDYNE_WERKZEUG/board.json
@@ -0,0 +1,19 @@
+{
+    "deploy": [
+        "../deploy.md"
+    ],
+    "docs": "",
+    "features": [
+        "Dual-core",
+        "External Flash",
+        "USB-C"
+    ],
+    "images": [
+        "werkzeug.jpg"
+    ],
+    "mcu": "rp2040",
+    "product": "Werkzeug",
+    "thumbnail": "",
+    "url": "https://machdyne.com/product/werkzeug-multi-tool/",
+    "vendor": "Machdyne"
+}
diff --git a/ports/rp2/boards/MACHDYNE_WERKZEUG/mpconfigboard.cmake b/ports/rp2/boards/MACHDYNE_WERKZEUG/mpconfigboard.cmake
new file mode 100644
index 0000000000000..281c4e6f1b45f
--- /dev/null
+++ b/ports/rp2/boards/MACHDYNE_WERKZEUG/mpconfigboard.cmake
@@ -0,0 +1,3 @@
+# cmake file for Machdyne Werkzeug
+set(PICO_BOARD "machdyne_werkzeug")
+set(PICO_PLATFORM "rp2040")
diff --git a/ports/rp2/boards/MACHDYNE_WERKZEUG/mpconfigboard.h b/ports/rp2/boards/MACHDYNE_WERKZEUG/mpconfigboard.h
new file mode 100644
index 0000000000000..476ea23b9c86b
--- /dev/null
+++ b/ports/rp2/boards/MACHDYNE_WERKZEUG/mpconfigboard.h
@@ -0,0 +1,3 @@
+// Board and hardware specific configuration
+#define MICROPY_HW_BOARD_NAME                   "Machdyne Werkzeug"
+#define MICROPY_HW_FLASH_STORAGE_BYTES          (384 * 1024)
diff --git a/ports/rp2/boards/MACHDYNE_WERKZEUG/pins.csv b/ports/rp2/boards/MACHDYNE_WERKZEUG/pins.csv
new file mode 100644
index 0000000000000..c3c578132069c
--- /dev/null
+++ b/ports/rp2/boards/MACHDYNE_WERKZEUG/pins.csv
@@ -0,0 +1,30 @@
+GP0,GPIO0
+GP1,GPIO1
+GP2,GPIO2
+GP3,GPIO3
+GP4,GPIO4
+GP5,GPIO5
+GP6,GPIO6
+GP7,GPIO7
+GP8,GPIO8
+GP9,GPIO9
+GP10,GPIO10
+GP11,GPIO11
+PMOD10,GPIO12
+PMOD4,GPIO13
+PMOD9,GPIO14
+PMOD3,GPIO15
+PMOD8,GPIO16
+PMOD2,GPIO17
+PMOD7,GPIO18
+PMOD1,GPIO19
+LED_GREEN,GPIO20
+LED_RED,GPIO21
+USBA_POWER,GPIO22
+USBA_DN,GPIO23
+USBA_DP,GPIO24
+USBA_DP_PU,GPIO25
+GP26,GPIO26
+GP27,GPIO27
+GP28,GPIO28
+GP29,GPIO29
diff --git a/ports/rp2/boards/POLOLU_3PI_2040_ROBOT/board.json b/ports/rp2/boards/POLOLU_3PI_2040_ROBOT/board.json
index 5358db627e125..4b12cfda65c7c 100644
--- a/ports/rp2/boards/POLOLU_3PI_2040_ROBOT/board.json
+++ b/ports/rp2/boards/POLOLU_3PI_2040_ROBOT/board.json
@@ -15,7 +15,7 @@
         "pololu_3pi_2040_robot.jpg"
     ],
     "mcu": "rp2040",
-    "product": "Pololu 3pi+ 2040 Robot",
+    "product": "3pi+ 2040 Robot",
     "thumbnail": "",
     "url": "https://www.pololu.com/3pi",
     "vendor": "Pololu"
diff --git a/ports/rp2/boards/POLOLU_ZUMO_2040_ROBOT/board.json b/ports/rp2/boards/POLOLU_ZUMO_2040_ROBOT/board.json
index 7ef383a9c408b..1ec15ad591d02 100644
--- a/ports/rp2/boards/POLOLU_ZUMO_2040_ROBOT/board.json
+++ b/ports/rp2/boards/POLOLU_ZUMO_2040_ROBOT/board.json
@@ -16,7 +16,7 @@
         "pololu_zumo_2040_robot.jpg"
     ],
     "mcu": "rp2040",
-    "product": "Pololu Zumo 2040 Robot",
+    "product": "Zumo 2040 Robot",
     "thumbnail": "",
     "url": "https://www.pololu.com/zumo",
     "vendor": "Pololu"
diff --git a/ports/rp2/boards/SEEED_XIAO_RP2350/board.json b/ports/rp2/boards/SEEED_XIAO_RP2350/board.json
new file mode 100644
index 0000000000000..9198b17dbc95e
--- /dev/null
+++ b/ports/rp2/boards/SEEED_XIAO_RP2350/board.json
@@ -0,0 +1,24 @@
+{
+    "deploy": [
+        "../deploy.md"
+    ],
+    "docs": "",
+    "features": [
+        "Battery Charging",
+        "Dual-core",
+        "External Flash",
+        "RGB LED",
+        "USB"
+    ],
+    "images": [
+        "xiao_rp2350-font.jpg"
+    ],
+    "mcu": "rp2350",
+    "product": "XIAO RP2350",
+    "thumbnail": "",
+    "url": "https://www.seeedstudio.com/Seeed-XIAO-RP2350-p-5944.html",
+    "variants": {
+        "RISCV": "RISC-V CPU mode"
+    },
+    "vendor": "Seeed Studio"
+}
diff --git a/ports/rp2/boards/SEEED_XIAO_RP2350/mpconfigboard.cmake b/ports/rp2/boards/SEEED_XIAO_RP2350/mpconfigboard.cmake
new file mode 100644
index 0000000000000..a22ea4a5c9df5
--- /dev/null
+++ b/ports/rp2/boards/SEEED_XIAO_RP2350/mpconfigboard.cmake
@@ -0,0 +1,5 @@
+# cmake file for Seeed XIAO RP2350
+set(PICO_BOARD "seeed_xiao_rp2350")
+
+# To change the gpio count for QFN-80
+# set(PICO_NUM_GPIOS 48)
diff --git a/ports/rp2/boards/SEEED_XIAO_RP2350/mpconfigboard.h b/ports/rp2/boards/SEEED_XIAO_RP2350/mpconfigboard.h
new file mode 100644
index 0000000000000..ea7e7437567e1
--- /dev/null
+++ b/ports/rp2/boards/SEEED_XIAO_RP2350/mpconfigboard.h
@@ -0,0 +1,3 @@
+// Board and hardware specific configuration
+#define MICROPY_HW_BOARD_NAME                   "Seeed XIAO RP2350"
+#define MICROPY_HW_FLASH_STORAGE_BYTES          (PICO_FLASH_SIZE_BYTES - 1024 * 1024)
diff --git a/ports/rp2/boards/SEEED_XIAO_RP2350/mpconfigvariant.cmake b/ports/rp2/boards/SEEED_XIAO_RP2350/mpconfigvariant.cmake
new file mode 100644
index 0000000000000..6fe039ba51bba
--- /dev/null
+++ b/ports/rp2/boards/SEEED_XIAO_RP2350/mpconfigvariant.cmake
@@ -0,0 +1 @@
+set(PICO_PLATFORM "rp2350")
diff --git a/ports/rp2/boards/SEEED_XIAO_RP2350/mpconfigvariant_RISCV.cmake b/ports/rp2/boards/SEEED_XIAO_RP2350/mpconfigvariant_RISCV.cmake
new file mode 100644
index 0000000000000..65a97fc3350d1
--- /dev/null
+++ b/ports/rp2/boards/SEEED_XIAO_RP2350/mpconfigvariant_RISCV.cmake
@@ -0,0 +1 @@
+set(PICO_PLATFORM "rp2350-riscv")
diff --git a/ports/rp2/boards/SEEED_XIAO_RP2350/pins.csv b/ports/rp2/boards/SEEED_XIAO_RP2350/pins.csv
new file mode 100644
index 0000000000000..34b71a57c620e
--- /dev/null
+++ b/ports/rp2/boards/SEEED_XIAO_RP2350/pins.csv
@@ -0,0 +1,24 @@
+D0,GPIO26
+D1,GPIO27
+D2,GPIO28
+D3,GPIO5
+D4,GPIO6
+D5,GPIO7
+D6,GPIO0
+D7,GPIO1
+D8,GPIO2
+D9,GPIO4
+D10,GPIO3
+D11,GPIO21
+D12,GPIO20
+D13,GPIO17
+D14,GPIO16
+D15,GPIO11
+D16,GPIO12
+D17,GPIO10
+D18,GPIO9
+LED,GPIO25
+NEOPIXEL_POWER,GPIO23
+NEOPIXEL,GPIO22
+BAT_ADC_EN,GPIO19
+BAT_ADC,GPIO29
diff --git a/ports/rp2/boards/SPARKFUN_IOTNODE_LORAWAN_RP2350/board.json b/ports/rp2/boards/SPARKFUN_IOTNODE_LORAWAN_RP2350/board.json
index 4ddcd999fe5f8..e65a9462c73c3 100644
--- a/ports/rp2/boards/SPARKFUN_IOTNODE_LORAWAN_RP2350/board.json
+++ b/ports/rp2/boards/SPARKFUN_IOTNODE_LORAWAN_RP2350/board.json
@@ -21,5 +21,5 @@
     "product": "IoT Node LoRaWAN RP2350",
     "thumbnail": "",
     "url": "https://www.sparkfun.com/products/26060",
-    "vendor": "Sparkfun"
+    "vendor": "SparkFun"
 }
diff --git a/ports/rp2/boards/SPARKFUN_IOTNODE_LORAWAN_RP2350/manifest.py b/ports/rp2/boards/SPARKFUN_IOTNODE_LORAWAN_RP2350/manifest.py
new file mode 100644
index 0000000000000..3f5fa79bf7460
--- /dev/null
+++ b/ports/rp2/boards/SPARKFUN_IOTNODE_LORAWAN_RP2350/manifest.py
@@ -0,0 +1,3 @@
+include("$(PORT_DIR)/boards/manifest.py")
+
+require("sdcard")
diff --git a/ports/rp2/boards/SPARKFUN_IOTNODE_LORAWAN_RP2350/mpconfigboard.cmake b/ports/rp2/boards/SPARKFUN_IOTNODE_LORAWAN_RP2350/mpconfigboard.cmake
index 11fe1ee28fce2..8a36724599d4a 100644
--- a/ports/rp2/boards/SPARKFUN_IOTNODE_LORAWAN_RP2350/mpconfigboard.cmake
+++ b/ports/rp2/boards/SPARKFUN_IOTNODE_LORAWAN_RP2350/mpconfigboard.cmake
@@ -5,3 +5,6 @@ set(PICO_BOARD_HEADER_DIRS ${MICROPY_PORT_DIR}/boards/${MICROPY_BOARD})
 
 set(PICO_BOARD "sparkfun_iotnode_lorawan_rp2350")
 set(PICO_PLATFORM "rp2350")
+
+# Board specific version of the frozen manifest
+set(MICROPY_FROZEN_MANIFEST ${MICROPY_BOARD_DIR}/manifest.py)
diff --git a/ports/rp2/boards/SPARKFUN_IOTREDBOARD_RP2350/board.json b/ports/rp2/boards/SPARKFUN_IOTREDBOARD_RP2350/board.json
new file mode 100644
index 0000000000000..a0dd4d835a1bc
--- /dev/null
+++ b/ports/rp2/boards/SPARKFUN_IOTREDBOARD_RP2350/board.json
@@ -0,0 +1,26 @@
+{
+    "deploy": [
+        "../deploy.md"
+    ],
+    "docs": "",
+    "features": [
+        "BLE",
+        "Dual-core",
+        "External Flash",
+        "USB-C",
+        "WiFi",
+        "External RAM",
+        "microSD",
+        "RGB LED",
+        "JST-SH",
+        "Battery Charging"
+    ],
+    "images": [
+        "27708-IoT-RedBoard-RP2350-Feature.jpg"
+    ],
+    "mcu": "rp2350",
+    "product": "SparkFun IoT RedBoard RP2350",
+    "thumbnail": "",
+    "url": "https://www.sparkfun.com/sparkfun-iot-redboard-rp2350.html",
+    "vendor": "SparkFun"
+}
diff --git a/ports/rp2/boards/SPARKFUN_IOTREDBOARD_RP2350/manifest.py b/ports/rp2/boards/SPARKFUN_IOTREDBOARD_RP2350/manifest.py
new file mode 100644
index 0000000000000..b1670d6804495
--- /dev/null
+++ b/ports/rp2/boards/SPARKFUN_IOTREDBOARD_RP2350/manifest.py
@@ -0,0 +1,7 @@
+include("$(PORT_DIR)/boards/manifest.py")
+
+require("bundle-networking")
+
+require("aioble")
+
+require("sdcard")
diff --git a/ports/rp2/boards/SPARKFUN_IOTREDBOARD_RP2350/mpconfigboard.cmake b/ports/rp2/boards/SPARKFUN_IOTREDBOARD_RP2350/mpconfigboard.cmake
new file mode 100644
index 0000000000000..beefc90db6557
--- /dev/null
+++ b/ports/rp2/boards/SPARKFUN_IOTREDBOARD_RP2350/mpconfigboard.cmake
@@ -0,0 +1,20 @@
+# cmake file for SparkFun IoT RedBoard RP2350
+
+# TODO: DELETE THIS LINE WHEN SUBMODULED PICO-SDK INCLUDES THIS BOARD
+set(PICO_BOARD_HEADER_DIRS ${MICROPY_PORT_DIR}/boards/${MICROPY_BOARD})
+
+set(PICO_BOARD "sparkfun_iotredboard_rp2350")
+set(PICO_PLATFORM "rp2350")
+
+set(PICO_NUM_GPIOS 48)
+
+set(MICROPY_PY_LWIP ON)
+set(MICROPY_PY_NETWORK_CYW43 ON)
+
+# Bluetooth
+set(MICROPY_PY_BLUETOOTH ON)
+set(MICROPY_BLUETOOTH_BTSTACK ON)
+set(MICROPY_PY_BLUETOOTH_CYW43 ON)
+
+# Board specific version of the frozen manifest
+set(MICROPY_FROZEN_MANIFEST ${MICROPY_BOARD_DIR}/manifest.py)
diff --git a/ports/rp2/boards/SPARKFUN_IOTREDBOARD_RP2350/mpconfigboard.h b/ports/rp2/boards/SPARKFUN_IOTREDBOARD_RP2350/mpconfigboard.h
new file mode 100644
index 0000000000000..34d08b0bec4b3
--- /dev/null
+++ b/ports/rp2/boards/SPARKFUN_IOTREDBOARD_RP2350/mpconfigboard.h
@@ -0,0 +1,61 @@
+// Board and hardware specific configuration
+#define MICROPY_HW_BOARD_NAME                   "SparkFun IoT RedBoard RP2350"
+#define MICROPY_HW_FLASH_STORAGE_BYTES          (PICO_FLASH_SIZE_BYTES - 1536 * 1024)
+
+// Enable networking.
+#define MICROPY_PY_NETWORK 1
+#define MICROPY_PY_NETWORK_HOSTNAME_DEFAULT     "IoTRedBoardRP2350"
+
+#define CYW43_USE_SPI (1)
+#define CYW43_LWIP (1)
+#define CYW43_GPIO (1)
+#define CYW43_SPI_PIO (1)
+
+// USB VID/PID
+#define MICROPY_HW_USB_VID (0x1B4F)
+#define MICROPY_HW_USB_PID (0x0047)
+
+// UART0
+#define MICROPY_HW_UART0_TX  (0)
+#define MICROPY_HW_UART0_RX  (1)
+#define MICROPY_HW_UART0_CTS (30)
+#define MICROPY_HW_UART0_RTS (31)
+
+// UART1
+#define MICROPY_HW_UART1_TX  (40)
+#define MICROPY_HW_UART1_RX  (41)
+#define MICROPY_HW_UART1_CTS (42)
+#define MICROPY_HW_UART1_RTS (43)
+
+// I2C0
+#define MICROPY_HW_I2C0_SCL  (5)
+#define MICROPY_HW_I2C0_SDA  (4)
+
+// I2C1
+#define MICROPY_HW_I2C1_SCL  (31)
+#define MICROPY_HW_I2C1_SDA  (30)
+
+// SPI0
+#define MICROPY_HW_SPI0_SCK  (22)
+#define MICROPY_HW_SPI0_MOSI (23)
+#define MICROPY_HW_SPI0_MISO (20)
+
+// SD Card/SPI1
+#define MICROPY_HW_SPI1_SCK  (10)
+#define MICROPY_HW_SPI1_MOSI (11)
+#define MICROPY_HW_SPI1_MISO (8)
+
+// PSRAM
+#define MICROPY_HW_PSRAM_CS_PIN (47)
+#define MICROPY_HW_ENABLE_PSRAM (1)
+
+// #include "enable_cyw43.h"
+
+// For debugging mbedtls - also set
+// Debug level (0-4) 1=warning, 2=info, 3=debug, 4=verbose
+// #define MODUSSL_MBEDTLS_DEBUG_LEVEL 1
+
+#define MICROPY_HW_PIN_EXT_COUNT    CYW43_WL_GPIO_COUNT
+
+int mp_hal_is_pin_reserved(int n);
+#define MICROPY_HW_PIN_RESERVED(i) mp_hal_is_pin_reserved(i)
diff --git a/ports/rp2/boards/SPARKFUN_IOTREDBOARD_RP2350/mpconfigvariant.cmake b/ports/rp2/boards/SPARKFUN_IOTREDBOARD_RP2350/mpconfigvariant.cmake
new file mode 100644
index 0000000000000..6fe039ba51bba
--- /dev/null
+++ b/ports/rp2/boards/SPARKFUN_IOTREDBOARD_RP2350/mpconfigvariant.cmake
@@ -0,0 +1 @@
+set(PICO_PLATFORM "rp2350")
diff --git a/ports/rp2/boards/SPARKFUN_IOTREDBOARD_RP2350/mpconfigvariant_RISCV.cmake b/ports/rp2/boards/SPARKFUN_IOTREDBOARD_RP2350/mpconfigvariant_RISCV.cmake
new file mode 100644
index 0000000000000..65a97fc3350d1
--- /dev/null
+++ b/ports/rp2/boards/SPARKFUN_IOTREDBOARD_RP2350/mpconfigvariant_RISCV.cmake
@@ -0,0 +1 @@
+set(PICO_PLATFORM "rp2350-riscv")
diff --git a/ports/rp2/boards/SPARKFUN_IOTREDBOARD_RP2350/pins.csv b/ports/rp2/boards/SPARKFUN_IOTREDBOARD_RP2350/pins.csv
new file mode 100644
index 0000000000000..d8d98e1ada9ef
--- /dev/null
+++ b/ports/rp2/boards/SPARKFUN_IOTREDBOARD_RP2350/pins.csv
@@ -0,0 +1,70 @@
+GP0,GPIO0
+GP1,GPIO1
+GP2,GPIO2
+GP3,GPIO3
+GP4,GPIO4
+GP5,GPIO5
+GP6,GPIO6
+GP7,GPIO7
+GP8,GPIO8
+GP9,GPIO9
+GP10,GPIO10
+GP11,GPIO11
+GP12,GPIO12
+GP13,GPIO13
+GP14,GPIO14
+GP15,GPIO15
+GP16,GPIO16
+GP17,GPIO17
+GP18,GPIO18
+GP19,GPIO19
+GP20,GPIO20
+GP21,GPIO21
+GP22,GPIO22
+GP23,GPIO23
+GP25,GPIO25
+GP26,GPIO26
+GP27,GPIO27
+GP28,GPIO28
+GP29,GPIO29
+GP30,GPIO30
+GP31,GPIO31
+GP32,GPIO32
+GP33,GPIO33
+GP34,GPIO34
+GP35,GPIO35
+GP39,GPIO39
+GP40,GPIO40
+GP41,GPIO41
+GP42,GPIO42
+GP43,GPIO43
+GP44,GPIO44
+GP45,GPIO45
+WL_GPIO0,EXT_GPIO0
+WL_GPIO1,EXT_GPIO1
+WL_GPIO2,EXT_GPIO2
+WL_LED,EXT_GPIO0
+SD_DET,GPIO2
+RGB_LED,GPIO3
+NEOPIXEL,GPIO3
+B_ALRT,GPIO6
+PERIPH_POWER,GPIO7
+HSTX0,GPIO12
+HSTX1,GPIO13
+HSTX2,GPIO14
+HSTX3,GPIO15
+HSTX4,GPIO16
+HSTX5,GPIO17
+HSTX6,GPIO18
+HSTX7,GPIO19
+LED,GPIO25
+STAT,GPIO25
+SRC_5V,GPIO26
+BATT_PWR,GPIO27
+USER_SW,GPIO39
+A0,GPIO40
+A1,GPIO41
+A2,GPIO42
+A3,GPIO43
+A4,GPIO44
+A5,GPIO45
diff --git a/ports/rp2/boards/SPARKFUN_IOTREDBOARD_RP2350/sparkfun_iotredboard_rp2350.h b/ports/rp2/boards/SPARKFUN_IOTREDBOARD_RP2350/sparkfun_iotredboard_rp2350.h
new file mode 100644
index 0000000000000..ac0972eb226a6
--- /dev/null
+++ b/ports/rp2/boards/SPARKFUN_IOTREDBOARD_RP2350/sparkfun_iotredboard_rp2350.h
@@ -0,0 +1,183 @@
+/*
+ * Copyright (c) 2024 Raspberry Pi (Trading) Ltd.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+// -----------------------------------------------------
+// NOTE: THIS HEADER IS ALSO INCLUDED BY ASSEMBLER SO
+//       SHOULD ONLY CONSIST OF PREPROCESSOR DIRECTIVES
+// -----------------------------------------------------
+// Board definition for the SparkFun IoT RedBoard - RP2350
+//
+// This header may be included by other board headers as "boards/sparkfun_iotredboard_rp2350.h"
+
+// pico_cmake_set PICO_PLATFORM=rp2350
+// pico_cmake_set PICO_CYW43_SUPPORTED = 1
+
+#ifndef _BOARDS_SPARKFUN_IOTREDBOARD_RP2350_H
+#define _BOARDS_SPARKFUN_IOTREDBOARD_RP2350_H
+
+// For board detection
+#define SPARKFUN_IOTREDBOARD_RP2350
+
+// --- RP2350 VARIANT ---
+#define PICO_RP2350A 0 // 1 for RP2350A, 0 for RP2350B
+
+// --- BOARD SPECIFIC ---
+#define SPARKFUN_IOTREDBOARD_RP2350_USER_SW_PIN 39
+#define SPARKFUN_IOTREDBOARD_RP2350_PSRAM_CS_PIN 47
+
+
+// --- UART ---
+#ifndef PICO_DEFAULT_UART
+#define PICO_DEFAULT_UART 0
+#endif
+#ifndef PICO_DEFAULT_UART_TX_PIN
+#define PICO_DEFAULT_UART_TX_PIN 0
+#endif
+#ifndef PICO_DEFAULT_UART_RX_PIN
+#define PICO_DEFAULT_UART_RX_PIN 1
+#endif
+
+// --- LED ---
+#ifndef PICO_DEFAULT_LED_PIN
+#define PICO_DEFAULT_LED_PIN 25
+#endif
+
+#ifndef PICO_DEFAULT_WS2812_PIN
+#define PICO_DEFAULT_WS2812_PIN 3
+#endif
+
+// --- I2C --- Qwiic connector is on these pins
+#ifndef PICO_DEFAULT_I2C
+#define PICO_DEFAULT_I2C 0
+#endif
+#ifndef PICO_DEFAULT_I2C_SDA_PIN
+#define PICO_DEFAULT_I2C_SDA_PIN 4
+#endif
+#ifndef PICO_DEFAULT_I2C_SCL_PIN
+#define PICO_DEFAULT_I2C_SCL_PIN 5
+#endif
+
+// --- SPI ---
+#ifndef PICO_DEFAULT_SPI
+#define PICO_DEFAULT_SPI 0
+#endif
+#ifndef PICO_DEFAULT_SPI_SCK_PIN
+#define PICO_DEFAULT_SPI_SCK_PIN 22
+#endif
+#ifndef PICO_DEFAULT_SPI_TX_PIN
+#define PICO_DEFAULT_SPI_TX_PIN 23
+#endif
+#ifndef PICO_DEFAULT_SPI_RX_PIN
+#define PICO_DEFAULT_SPI_RX_PIN 20
+#endif
+#ifndef PICO_DEFAULT_SPI_CSN_PIN
+#define PICO_DEFAULT_SPI_CSN_PIN 21
+#endif
+
+// --- FLASH ---
+
+#define PICO_BOOT_STAGE2_CHOOSE_W25Q080 1
+
+#ifndef PICO_FLASH_SPI_CLKDIV
+#define PICO_FLASH_SPI_CLKDIV 2
+#endif
+
+// pico_cmake_set_default PICO_FLASH_SIZE_BYTES = (16 * 1024 * 1024)
+#ifndef PICO_FLASH_SIZE_BYTES
+#define PICO_FLASH_SIZE_BYTES (16 * 1024 * 1024)
+#endif
+
+// The IoT RedBoard has an SD Card.
+#ifndef PICO_SD_CLK_PIN
+#define PICO_SD_CLK_PIN 10
+#endif
+#ifndef PICO_SD_CMD_PIN
+#define PICO_SD_CMD_PIN 11
+#endif
+#ifndef PICO_SD_DAT0_PIN
+#define PICO_SD_DAT0_PIN 8
+#endif
+#ifndef PICO_SD_DAT3_PIN
+#define PICO_SD_DAT3_PIN 9 // DAT3 of the SD card is the chip select pin
+#endif
+#ifndef PICO_SD_DAT_PIN_COUNT
+#define PICO_SD_DAT_PIN_COUNT 1
+#endif
+
+// The GPIO Pin used to monitor VSYS. Typically you would use this with ADC.
+// There is an example in adc/read_vsys in pico-examples.
+#ifndef PICO_VSYS_PIN
+#define PICO_VSYS_PIN 46
+#endif
+
+// pico_cmake_set_default PICO_RP2350_A2_SUPPORTED = 1
+#ifndef PICO_RP2350_A2_SUPPORTED
+#define PICO_RP2350_A2_SUPPORTED 1
+#endif
+
+// Bootloader activity LED in double reset mode.
+#ifndef PICO_BOOTSEL_VIA_DOUBLE_RESET_ACTIVITY_LED
+#define PICO_BOOTSEL_VIA_DOUBLE_RESET_ACTIVITY_LED PICO_DEFAULT_LED_PIN
+#endif
+
+// Bootloader activity LED in USB reset mode.
+#ifndef PICO_STDIO_USB_RESET_BOOTSEL_ACTIVITY_LED
+#define PICO_STDIO_USB_RESET_BOOTSEL_ACTIVITY_LED PICO_DEFAULT_LED_PIN
+#endif
+
+// --- CYW43 ---
+
+#ifndef CYW43_WL_GPIO_COUNT
+#define CYW43_WL_GPIO_COUNT 3
+#endif
+
+#ifndef CYW43_WL_GPIO_LED_PIN
+#define CYW43_WL_GPIO_LED_PIN 0
+#endif
+
+// If CYW43_WL_GPIO_VBUS_PIN is defined then a CYW43 GPIO has to be used to read VBUS.
+// This can be passed to cyw43_arch_gpio_get to determine if the device is battery powered.
+// PICO_VBUS_PIN and CYW43_WL_GPIO_VBUS_PIN should not both be defined.
+#ifndef CYW43_WL_GPIO_VBUS_PIN
+#define CYW43_WL_GPIO_VBUS_PIN 2
+#endif
+
+// cyw43 SPI pins can't be changed at runtime
+#ifndef CYW43_PIN_WL_DYNAMIC
+#define CYW43_PIN_WL_DYNAMIC 0
+#endif
+
+// gpio pin to power up the cyw43 chip
+#ifndef CYW43_DEFAULT_PIN_WL_REG_ON
+#define CYW43_DEFAULT_PIN_WL_REG_ON 24u
+#endif
+
+// gpio pin for spi data out to the cyw43 chip
+#ifndef CYW43_DEFAULT_PIN_WL_DATA_OUT
+#define CYW43_DEFAULT_PIN_WL_DATA_OUT 38u
+#endif
+
+// gpio pin for spi data in from the cyw43 chip
+#ifndef CYW43_DEFAULT_PIN_WL_DATA_IN
+#define CYW43_DEFAULT_PIN_WL_DATA_IN 38u
+#endif
+
+// gpio (irq) pin for the irq line from the cyw43 chip
+#ifndef CYW43_DEFAULT_PIN_WL_HOST_WAKE
+#define CYW43_DEFAULT_PIN_WL_HOST_WAKE 38u
+#endif
+
+// gpio pin for the spi clock line to the cyw43 chip
+#ifndef CYW43_DEFAULT_PIN_WL_CLOCK
+#define CYW43_DEFAULT_PIN_WL_CLOCK 37u
+#endif
+
+// gpio pin for the spi chip select to the cyw43 chip
+#ifndef CYW43_DEFAULT_PIN_WL_CS
+#define CYW43_DEFAULT_PIN_WL_CS 36u
+#endif
+
+#endif // _BOARDS_SPARKFUN_IOTREDBOARD_RP2350_H
diff --git a/ports/rp2/boards/SPARKFUN_PROMICRO/board.json b/ports/rp2/boards/SPARKFUN_PROMICRO/board.json
index b8c8afc914eac..5ee6bcb7549cc 100644
--- a/ports/rp2/boards/SPARKFUN_PROMICRO/board.json
+++ b/ports/rp2/boards/SPARKFUN_PROMICRO/board.json
@@ -14,8 +14,8 @@
         "18288-SparkFun_Pro_Micro_-_RP2040-01.jpg"
     ],
     "mcu": "rp2040",
-    "product": "Pro Micro RP2040",
+    "product": "Pro Micro - RP2040",
     "thumbnail": "",
     "url": "https://www.sparkfun.com/products/18288",
-    "vendor": "Sparkfun"
+    "vendor": "SparkFun"
 }
diff --git a/ports/rp2/boards/SPARKFUN_PROMICRO_RP2350/board.json b/ports/rp2/boards/SPARKFUN_PROMICRO_RP2350/board.json
index d2bfa80a348d7..8e8b6319007ab 100644
--- a/ports/rp2/boards/SPARKFUN_PROMICRO_RP2350/board.json
+++ b/ports/rp2/boards/SPARKFUN_PROMICRO_RP2350/board.json
@@ -18,5 +18,5 @@
     "product": "Pro Micro RP2350",
     "thumbnail": "",
     "url": "https://www.sparkfun.com/products/24870",
-    "vendor": "Sparkfun"
+    "vendor": "SparkFun"
 }
diff --git a/ports/rp2/boards/SPARKFUN_THINGPLUS/board.json b/ports/rp2/boards/SPARKFUN_THINGPLUS/board.json
index 3eeb397265572..ebd68bc5d98f7 100644
--- a/ports/rp2/boards/SPARKFUN_THINGPLUS/board.json
+++ b/ports/rp2/boards/SPARKFUN_THINGPLUS/board.json
@@ -17,8 +17,8 @@
         "17745-SparkFun_Thing_Plus_-_RP2040-01a.jpg"
     ],
     "mcu": "rp2040",
-    "product": "Thing Plus RP2040",
+    "product": "Thing Plus - RP2040",
     "thumbnail": "",
     "url": "https://www.sparkfun.com/products/17745",
-    "vendor": "Sparkfun"
+    "vendor": "SparkFun"
 }
diff --git a/ports/rp2/boards/SPARKFUN_THINGPLUS_RP2350/board.json b/ports/rp2/boards/SPARKFUN_THINGPLUS_RP2350/board.json
index 09bbefe04dc1e..a6222d7a0def0 100644
--- a/ports/rp2/boards/SPARKFUN_THINGPLUS_RP2350/board.json
+++ b/ports/rp2/boards/SPARKFUN_THINGPLUS_RP2350/board.json
@@ -23,5 +23,5 @@
     "product": "Thing Plus RP2350",
     "thumbnail": "",
     "url": "https://www.sparkfun.com/products/25134",
-    "vendor": "Sparkfun"
+    "vendor": "SparkFun"
 }
diff --git a/ports/rp2/boards/SPARKFUN_XRP_CONTROLLER/board.json b/ports/rp2/boards/SPARKFUN_XRP_CONTROLLER/board.json
new file mode 100644
index 0000000000000..6a06c0875bde0
--- /dev/null
+++ b/ports/rp2/boards/SPARKFUN_XRP_CONTROLLER/board.json
@@ -0,0 +1,25 @@
+{
+    "deploy": [
+        "../deploy.md"
+    ],
+    "docs": "",
+    "features": [
+        "BLE",
+        "Dual-core",
+        "External Flash",
+        "External RAM",
+        "IMU",
+        "JST-SH",
+        "RGB LED",
+        "USB-C",
+        "WiFi"
+    ],
+    "images": [
+        "26619-XRP-Controller-Board-Feature.jpg"
+    ],
+    "mcu": "rp2350",
+    "product": "XRP Controller",
+    "thumbnail": "",
+    "url": "https://www.sparkfun.com/sparkfun-experiential-robotics-platform-xrp-controller.html",
+    "vendor": "SparkFun"
+}
diff --git a/ports/rp2/boards/SPARKFUN_XRP_CONTROLLER/manifest.py b/ports/rp2/boards/SPARKFUN_XRP_CONTROLLER/manifest.py
new file mode 100644
index 0000000000000..4e38f09cdee4f
--- /dev/null
+++ b/ports/rp2/boards/SPARKFUN_XRP_CONTROLLER/manifest.py
@@ -0,0 +1,6 @@
+include("$(PORT_DIR)/boards/manifest.py")
+
+require("bundle-networking")
+
+# Bluetooth
+require("aioble")
diff --git a/ports/rp2/boards/SPARKFUN_XRP_CONTROLLER/mpconfigboard.cmake b/ports/rp2/boards/SPARKFUN_XRP_CONTROLLER/mpconfigboard.cmake
new file mode 100644
index 0000000000000..2af12f81382d0
--- /dev/null
+++ b/ports/rp2/boards/SPARKFUN_XRP_CONTROLLER/mpconfigboard.cmake
@@ -0,0 +1,20 @@
+# cmake file for SparkFun XRP Controller
+
+# TODO: DELETE THIS LINE WHEN SUBMODULED PICO-SDK INCLUDES THIS BOARD
+set(PICO_BOARD_HEADER_DIRS ${MICROPY_PORT_DIR}/boards/${MICROPY_BOARD})
+
+set(PICO_BOARD "sparkfun_xrp_controller")
+set(PICO_PLATFORM "rp2350")
+
+set(PICO_NUM_GPIOS 48)
+
+set(MICROPY_PY_LWIP ON)
+set(MICROPY_PY_NETWORK_CYW43 ON)
+
+# Bluetooth
+set(MICROPY_PY_BLUETOOTH ON)
+set(MICROPY_BLUETOOTH_BTSTACK ON)
+set(MICROPY_PY_BLUETOOTH_CYW43 ON)
+
+# Board specific version of the frozen manifest
+set(MICROPY_FROZEN_MANIFEST ${MICROPY_BOARD_DIR}/manifest.py)
diff --git a/ports/rp2/boards/SPARKFUN_XRP_CONTROLLER/mpconfigboard.h b/ports/rp2/boards/SPARKFUN_XRP_CONTROLLER/mpconfigboard.h
new file mode 100644
index 0000000000000..13f04b92d7965
--- /dev/null
+++ b/ports/rp2/boards/SPARKFUN_XRP_CONTROLLER/mpconfigboard.h
@@ -0,0 +1,52 @@
+// Board and hardware specific configuration
+#define MICROPY_HW_BOARD_NAME          "SparkFun XRP Controller"
+#define MICROPY_HW_FLASH_STORAGE_BYTES (PICO_FLASH_SIZE_BYTES - 1536 * 1024)
+
+// Enable networking.
+#define MICROPY_PY_NETWORK 1
+#define MICROPY_PY_NETWORK_HOSTNAME_DEFAULT "XRP"
+
+// CYW43 driver configuration.
+#define CYW43_USE_SPI (1)
+#define CYW43_LWIP (1)
+#define CYW43_GPIO (1)
+#define CYW43_SPI_PIO (1)
+
+// For debugging mbedtls - also set
+// Debug level (0-4) 1=warning, 2=info, 3=debug, 4=verbose
+// #define MODUSSL_MBEDTLS_DEBUG_LEVEL 1
+
+#define MICROPY_HW_PIN_EXT_COUNT    CYW43_WL_GPIO_COUNT
+
+int mp_hal_is_pin_reserved(int n);
+#define MICROPY_HW_PIN_RESERVED(i) mp_hal_is_pin_reserved(i)
+
+#define MICROPY_HW_USB_VID (0x1B4F)
+#define MICROPY_HW_USB_PID (0x0046)
+
+#define MICROPY_HW_I2C0_SDA  (4)
+#define MICROPY_HW_I2C0_SCL  (5)
+
+#define MICROPY_HW_I2C1_SDA  (38)
+#define MICROPY_HW_I2C1_SCL  (39)
+
+#define MICROPY_HW_SPI0_SCK  (18)
+#define MICROPY_HW_SPI0_MOSI (19)
+#define MICROPY_HW_SPI0_MISO (16)
+
+#define MICROPY_HW_SPI1_SCK  (14)
+#define MICROPY_HW_SPI1_MOSI (15)
+#define MICROPY_HW_SPI1_MISO (12)
+
+#define MICROPY_HW_UART0_TX (12)
+#define MICROPY_HW_UART0_RX (13)
+#define MICROPY_HW_UART0_CTS (14)
+#define MICROPY_HW_UART0_RTS (15)
+
+#define MICROPY_HW_UART1_TX (8)
+#define MICROPY_HW_UART1_RX (9)
+#define MICROPY_HW_UART1_CTS (10)
+#define MICROPY_HW_UART1_RTS (11)
+
+#define MICROPY_HW_PSRAM_CS_PIN (47)
+#define MICROPY_HW_ENABLE_PSRAM (1)
diff --git a/ports/rp2/boards/SPARKFUN_XRP_CONTROLLER/pins.csv b/ports/rp2/boards/SPARKFUN_XRP_CONTROLLER/pins.csv
new file mode 100644
index 0000000000000..abf77af56c031
--- /dev/null
+++ b/ports/rp2/boards/SPARKFUN_XRP_CONTROLLER/pins.csv
@@ -0,0 +1,84 @@
+# XRP default pin names
+MOTOR_L_IN_1,GPIO34
+MOTOR_L_IN_2,GPIO35
+MOTOR_R_IN_1,GPIO32
+MOTOR_R_IN_2,GPIO33
+MOTOR_3_IN_1,GPIO20
+MOTOR_3_IN_2,GPIO21
+MOTOR_4_IN_1,GPIO10
+MOTOR_4_IN_2,GPIO11
+MOTOR_L_ENCODER_A,GPIO30
+MOTOR_L_ENCODER_B,GPIO31
+MOTOR_R_ENCODER_A,GPIO24
+MOTOR_R_ENCODER_B,GPIO25
+MOTOR_3_ENCODER_A,GPIO22
+MOTOR_3_ENCODER_B,GPIO23
+MOTOR_4_ENCODER_A,GPIO2
+MOTOR_4_ENCODER_B,GPIO3
+MOTOR_L_CURRENT,GPIO40
+MOTOR_R_CURRENT,GPIO43
+MOTOR_3_CURRENT,GPIO41
+MOTOR_4_CURRENT,GPIO42
+SERVO_1,GPIO6
+SERVO_2,GPIO9
+SERVO_3,GPIO7
+SERVO_4,GPIO8
+I2C_SDA_0,GPIO4
+I2C_SCL_0,GPIO5
+I2C_SDA_1,GPIO38
+I2C_SCL_1,GPIO39
+DISTANCE_TRIGGER,GPIO0
+DISTANCE_ECHO,GPIO1
+LINE_L,GPIO44
+LINE_R,GPIO45
+BOARD_VIN_MEASURE,GPIO46
+BOARD_USER_BUTTON,GPIO36
+BOARD_NEOPIXEL,GPIO37
+BOARD_LED,EXT_GPIO0
+
+# XRP alternate pin names
+ML_IN_1,GPIO34
+ML_IN_2,GPIO35
+MR_IN_1,GPIO32
+MR_IN_2,GPIO33
+M3_IN_1,GPIO20
+M3_IN_2,GPIO21
+M4_IN_1,GPIO10
+M4_IN_2,GPIO11
+ML_ENC_A,GPIO30
+ML_ENC_B,GPIO31
+MR_ENC_A,GPIO24
+MR_ENC_B,GPIO25
+M3_ENC_A,GPIO22
+M3_ENC_B,GPIO23
+M4_ENC_A,GPIO2
+M4_ENC_B,GPIO3
+ML_CUR,GPIO40
+MR_CUR,GPIO43
+M3_CUR,GPIO41
+M4_CUR,GPIO42
+S1,GPIO6
+S2,GPIO9
+S3,GPIO7
+S4,GPIO8
+SDA_0,GPIO4
+SCL_0,GPIO5
+SDA_1,GPIO38
+SCL_1,GPIO39
+RANGE_TRIGGER,GPIO0
+RANGE_ECHO,GPIO1
+REFLECTANCE_L,GPIO44
+REFLECTANCE_R,GPIO45
+BRD_VIN,GPIO46
+BRD_USR_BTN,GPIO36
+BRD_RGB_LED,GPIO37
+BRD_LED,EXT_GPIO0
+
+# LED default names
+LED,EXT_GPIO0
+NEOPIXEL,GPIO37
+
+# Radio GPIO pins
+WL_GPIO0,EXT_GPIO0
+WL_GPIO1,EXT_GPIO1
+WL_GPIO2,EXT_GPIO2
diff --git a/ports/rp2/boards/SPARKFUN_XRP_CONTROLLER/sparkfun_xrp_controller.h b/ports/rp2/boards/SPARKFUN_XRP_CONTROLLER/sparkfun_xrp_controller.h
new file mode 100644
index 0000000000000..70c2f13c753fe
--- /dev/null
+++ b/ports/rp2/boards/SPARKFUN_XRP_CONTROLLER/sparkfun_xrp_controller.h
@@ -0,0 +1,133 @@
+/*
+ * Copyright (c) 2024 Raspberry Pi (Trading) Ltd.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+// -----------------------------------------------------
+// NOTE: THIS HEADER IS ALSO INCLUDED BY ASSEMBLER SO
+//       SHOULD ONLY CONSIST OF PREPROCESSOR DIRECTIVES
+// -----------------------------------------------------
+// Board definition for the SparkFun XRP Controller
+//
+// This header may be included by other board headers as "boards/sparkfun_xrp_controller.h"
+
+// pico_cmake_set PICO_PLATFORM=rp2350
+// pico_cmake_set PICO_CYW43_SUPPORTED = 1
+
+#ifndef _BOARDS_SPARKFUN_XRP_CONTROLLER_H
+#define _BOARDS_SPARKFUN_XRP_CONTROLLER_H
+
+// For board detection
+#define SPARKFUN_XRP_CONTROLLER
+
+// --- RP2350 VARIANT ---
+#define PICO_RP2350A 0
+
+// --- UART ---
+#ifndef PICO_DEFAULT_UART
+#define PICO_DEFAULT_UART 0
+#endif
+#ifndef PICO_DEFAULT_UART_TX_PIN
+#define PICO_DEFAULT_UART_TX_PIN 12
+#endif
+#ifndef PICO_DEFAULT_UART_RX_PIN
+#define PICO_DEFAULT_UART_RX_PIN 13
+#endif
+
+// --- LED ---
+// no PICO_DEFAULT_LED_PIN - LED is on Wireless chip
+#ifndef PICO_DEFAULT_WS2812_PIN
+#define PICO_DEFAULT_WS2812_PIN 37
+#endif
+
+// --- I2C --- Qwiic connector is on these pins
+#ifndef PICO_DEFAULT_I2C
+#define PICO_DEFAULT_I2C 0
+#endif
+#ifndef PICO_DEFAULT_I2C_SDA_PIN
+#define PICO_DEFAULT_I2C_SDA_PIN 4
+#endif
+#ifndef PICO_DEFAULT_I2C_SCL_PIN
+#define PICO_DEFAULT_I2C_SCL_PIN 5
+#endif
+
+// --- SPI ---
+#ifndef PICO_DEFAULT_SPI
+#define PICO_DEFAULT_SPI 0
+#endif
+#ifndef PICO_DEFAULT_SPI_SCK_PIN
+#define PICO_DEFAULT_SPI_SCK_PIN 18
+#endif
+#ifndef PICO_DEFAULT_SPI_TX_PIN
+#define PICO_DEFAULT_SPI_TX_PIN 19
+#endif
+#ifndef PICO_DEFAULT_SPI_RX_PIN
+#define PICO_DEFAULT_SPI_RX_PIN 16
+#endif
+#ifndef PICO_DEFAULT_SPI_CSN_PIN
+#define PICO_DEFAULT_SPI_CSN_PIN 17
+#endif
+
+// --- FLASH ---
+
+#define PICO_BOOT_STAGE2_CHOOSE_W25Q080 1
+
+#ifndef PICO_FLASH_SPI_CLKDIV
+#define PICO_FLASH_SPI_CLKDIV 2
+#endif
+
+// pico_cmake_set_default PICO_FLASH_SIZE_BYTES = (16 * 1024 * 1024)
+#ifndef PICO_FLASH_SIZE_BYTES
+#define PICO_FLASH_SIZE_BYTES (16 * 1024 * 1024)
+#endif
+
+#ifndef CYW43_WL_GPIO_COUNT
+#define CYW43_WL_GPIO_COUNT 3
+#endif
+
+#ifndef CYW43_WL_GPIO_LED_PIN
+#define CYW43_WL_GPIO_LED_PIN 0
+#endif
+
+// pico_cmake_set_default PICO_RP2350_A2_SUPPORTED = 1
+#ifndef PICO_RP2350_A2_SUPPORTED
+#define PICO_RP2350_A2_SUPPORTED 1
+#endif
+
+// cyw43 SPI pins can't be changed at runtime
+#ifndef CYW43_PIN_WL_DYNAMIC
+#define CYW43_PIN_WL_DYNAMIC 0
+#endif
+
+// gpio pin to power up the cyw43 chip
+#ifndef CYW43_DEFAULT_PIN_WL_REG_ON
+#define CYW43_DEFAULT_PIN_WL_REG_ON 26u
+#endif
+
+// gpio pin for spi data out to the cyw43 chip
+#ifndef CYW43_DEFAULT_PIN_WL_DATA_OUT
+#define CYW43_DEFAULT_PIN_WL_DATA_OUT 29u
+#endif
+
+// gpio pin for spi data in from the cyw43 chip
+#ifndef CYW43_DEFAULT_PIN_WL_DATA_IN
+#define CYW43_DEFAULT_PIN_WL_DATA_IN 29u
+#endif
+
+// gpio (irq) pin for the irq line from the cyw43 chip
+#ifndef CYW43_DEFAULT_PIN_WL_HOST_WAKE
+#define CYW43_DEFAULT_PIN_WL_HOST_WAKE 29u
+#endif
+
+// gpio pin for the spi clock line to the cyw43 chip
+#ifndef CYW43_DEFAULT_PIN_WL_CLOCK
+#define CYW43_DEFAULT_PIN_WL_CLOCK 28u
+#endif
+
+// gpio pin for the spi chip select to the cyw43 chip
+#ifndef CYW43_DEFAULT_PIN_WL_CS
+#define CYW43_DEFAULT_PIN_WL_CS 27u
+#endif
+
+#endif
diff --git a/ports/rp2/boards/SPARKFUN_XRP_CONTROLLER_BETA/board.json b/ports/rp2/boards/SPARKFUN_XRP_CONTROLLER_BETA/board.json
new file mode 100644
index 0000000000000..b0566459a05e8
--- /dev/null
+++ b/ports/rp2/boards/SPARKFUN_XRP_CONTROLLER_BETA/board.json
@@ -0,0 +1,23 @@
+{
+    "deploy": [
+        "../deploy.md"
+    ],
+    "docs": "",
+    "features": [
+        "BLE",
+        "Dual-core",
+        "External Flash",
+        "IMU",
+        "JST-SH",
+        "USB",
+        "WiFi"
+    ],
+    "images": [
+        "22727-_01.jpg"
+    ],
+    "mcu": "rp2040",
+    "product": "XRP Controller (Beta)",
+    "thumbnail": "",
+    "url": "https://www.sparkfun.com/sparkfun-experiential-robotics-platform-xrp-controller-beta.html",
+    "vendor": "SparkFun"
+}
diff --git a/ports/rp2/boards/SPARKFUN_XRP_CONTROLLER_BETA/manifest.py b/ports/rp2/boards/SPARKFUN_XRP_CONTROLLER_BETA/manifest.py
new file mode 100644
index 0000000000000..4e38f09cdee4f
--- /dev/null
+++ b/ports/rp2/boards/SPARKFUN_XRP_CONTROLLER_BETA/manifest.py
@@ -0,0 +1,6 @@
+include("$(PORT_DIR)/boards/manifest.py")
+
+require("bundle-networking")
+
+# Bluetooth
+require("aioble")
diff --git a/ports/rp2/boards/SPARKFUN_XRP_CONTROLLER_BETA/mpconfigboard.cmake b/ports/rp2/boards/SPARKFUN_XRP_CONTROLLER_BETA/mpconfigboard.cmake
new file mode 100644
index 0000000000000..6c06efefb6479
--- /dev/null
+++ b/ports/rp2/boards/SPARKFUN_XRP_CONTROLLER_BETA/mpconfigboard.cmake
@@ -0,0 +1,14 @@
+# cmake file for SparkFun XRP Controller (Beta)
+
+set(PICO_BOARD "pico_w")
+
+set(MICROPY_PY_LWIP ON)
+set(MICROPY_PY_NETWORK_CYW43 ON)
+
+# Bluetooth
+set(MICROPY_PY_BLUETOOTH ON)
+set(MICROPY_BLUETOOTH_BTSTACK ON)
+set(MICROPY_PY_BLUETOOTH_CYW43 ON)
+
+# Board specific version of the frozen manifest
+set(MICROPY_FROZEN_MANIFEST ${MICROPY_BOARD_DIR}/manifest.py)
diff --git a/ports/rp2/boards/SPARKFUN_XRP_CONTROLLER_BETA/mpconfigboard.h b/ports/rp2/boards/SPARKFUN_XRP_CONTROLLER_BETA/mpconfigboard.h
new file mode 100644
index 0000000000000..931391d972e0c
--- /dev/null
+++ b/ports/rp2/boards/SPARKFUN_XRP_CONTROLLER_BETA/mpconfigboard.h
@@ -0,0 +1,32 @@
+// Board and hardware specific configuration
+#define MICROPY_HW_BOARD_NAME                   "SparkFun XRP Controller (Beta)"
+
+// todo: We need something to check our binary size
+#define MICROPY_HW_FLASH_STORAGE_BYTES          (848 * 1024)
+
+// Enable networking.
+#define MICROPY_PY_NETWORK 1
+#define MICROPY_PY_NETWORK_HOSTNAME_DEFAULT "XRP"
+
+// CYW43 driver configuration.
+#define CYW43_USE_SPI (1)
+#define CYW43_LWIP (1)
+#define CYW43_GPIO (1)
+#define CYW43_SPI_PIO (1)
+
+// For debugging mbedtls - also set
+// Debug level (0-4) 1=warning, 2=info, 3=debug, 4=verbose
+// #define MODUSSL_MBEDTLS_DEBUG_LEVEL 1
+
+#define MICROPY_HW_PIN_EXT_COUNT    CYW43_WL_GPIO_COUNT
+
+// If this returns true for a pin then its irq will not be disabled on a soft reboot
+int mp_hal_is_pin_reserved(int n);
+#define MICROPY_HW_PIN_RESERVED(i) mp_hal_is_pin_reserved(i)
+
+// Set the default I2C to I2C1 on pins 18 and 19 which route to the qwiic connector
+#undef PICO_DEFAULT_I2C
+#define PICO_DEFAULT_I2C (1)
+
+#define MICROPY_HW_I2C1_SDA (18)
+#define MICROPY_HW_I2C1_SCL (19)
diff --git a/ports/rp2/boards/SPARKFUN_XRP_CONTROLLER_BETA/pins.csv b/ports/rp2/boards/SPARKFUN_XRP_CONTROLLER_BETA/pins.csv
new file mode 100644
index 0000000000000..dd047063b5c02
--- /dev/null
+++ b/ports/rp2/boards/SPARKFUN_XRP_CONTROLLER_BETA/pins.csv
@@ -0,0 +1,65 @@
+# XRP default pin names
+MOTOR_L_IN_1,GPIO6
+MOTOR_L_IN_2,GPIO7
+MOTOR_R_IN_1,GPIO14
+MOTOR_R_IN_2,GPIO15
+MOTOR_3_IN_1,GPIO2
+MOTOR_3_IN_2,GPIO3
+MOTOR_4_IN_1,GPIO10
+MOTOR_4_IN_2,GPIO11
+MOTOR_L_ENCODER_A,GPIO4
+MOTOR_L_ENCODER_B,GPIO5
+MOTOR_R_ENCODER_A,GPIO12
+MOTOR_R_ENCODER_B,GPIO13
+MOTOR_3_ENCODER_A,GPIO0
+MOTOR_3_ENCODER_B,GPIO1
+MOTOR_4_ENCODER_A,GPIO8
+MOTOR_4_ENCODER_B,GPIO9
+SERVO_1,GPIO16
+SERVO_2,GPIO17
+I2C_SDA_1,GPIO18
+I2C_SCL_1,GPIO19
+DISTANCE_TRIGGER,GPIO20
+DISTANCE_ECHO,GPIO21
+LINE_L,GPIO26
+LINE_R,GPIO27
+BOARD_VIN_MEASURE,GPIO28
+BOARD_USER_BUTTON,GPIO22
+BOARD_LED,EXT_GPIO0
+
+# XRP alternate pin names
+ML_IN_1,GPIO6
+ML_IN_2,GPIO7
+MR_IN_1,GPIO14
+MR_IN_2,GPIO15
+M3_IN_1,GPIO2
+M3_IN_2,GPIO3
+M4_IN_1,GPIO10
+M4_IN_2,GPIO11
+ML_ENC_A,GPIO4
+ML_ENC_B,GPIO5
+MR_ENC_A,GPIO12
+MR_ENC_B,GPIO13
+M3_ENC_A,GPIO0
+M3_ENC_B,GPIO1
+M4_ENC_A,GPIO8
+M4_ENC_B,GPIO9
+S1,GPIO16
+S2,GPIO17
+SDA_1,GPIO18
+SCL_1,GPIO19
+RANGE_TRIGGER,GPIO20
+RANGE_ECHO,GPIO21
+REFLECTANCE_L,GPIO26
+REFLECTANCE_R,GPIO27
+BRD_VIN,GPIO28
+BRD_USR_BTN,GPIO22
+BRD_LED,EXT_GPIO0
+
+# LED default names
+LED,EXT_GPIO0
+
+# Radio GPIO pins
+WL_GPIO0,EXT_GPIO0
+WL_GPIO1,EXT_GPIO1
+WL_GPIO2,EXT_GPIO2
diff --git a/ports/rp2/boards/W5100S_EVB_PICO/board.json b/ports/rp2/boards/W5100S_EVB_PICO/board.json
index daaf1cf8ac8af..3d052de420472 100644
--- a/ports/rp2/boards/W5100S_EVB_PICO/board.json
+++ b/ports/rp2/boards/W5100S_EVB_PICO/board.json
@@ -13,8 +13,8 @@
         "W5100S-EVB-Pico.jpg"
     ],
     "mcu": "rp2040",
-    "product": "Wiznet W5100S-EVB-Pico",
+    "product": "W5100S-EVB-Pico",
     "thumbnail": "",
-    "url": "https://www.wiznet.io/product-item/w5100s-evb-pico/",
-    "vendor": "Wiznet"
+    "url": "https://docs.wiznet.io/Product/iEthernet/W5100S/w5100s-evb-pico",
+    "vendor": "WIZnet"
 }
diff --git a/ports/rp2/boards/W5500_EVB_PICO/board.json b/ports/rp2/boards/W5500_EVB_PICO/board.json
index e7625c343698e..d4298014c0f69 100644
--- a/ports/rp2/boards/W5500_EVB_PICO/board.json
+++ b/ports/rp2/boards/W5500_EVB_PICO/board.json
@@ -13,8 +13,8 @@
         "W5500-EVB-Pico.jpg"
     ],
     "mcu": "rp2040",
-    "product": "Wiznet W5500-EVB-Pico",
+    "product": "W5500-EVB-Pico",
     "thumbnail": "",
     "url": "https://docs.wiznet.io/Product/iEthernet/W5500/w5500-evb-pico",
-    "vendor": "Wiznet"
+    "vendor": "WIZnet"
 }
diff --git a/ports/rp2/boards/WEACTSTUDIO/board.json b/ports/rp2/boards/WEACTSTUDIO/board.json
index 8881b40e732a7..58d89ddf2e34e 100644
--- a/ports/rp2/boards/WEACTSTUDIO/board.json
+++ b/ports/rp2/boards/WEACTSTUDIO/board.json
@@ -12,7 +12,7 @@
         "weact_rp2040.jpg"
     ],
     "mcu": "rp2040",
-    "product": "WeAct Studio RP2040",
+    "product": "Studio RP2040",
     "url": "https://github.com/WeActTC/WeActStudio.RP2040CoreBoard",
     "variants": {
         "FLASH_2M": "2 MiB Flash",
diff --git a/ports/rp2/boards/WEACTSTUDIO_RP2350B_CORE/board.json b/ports/rp2/boards/WEACTSTUDIO_RP2350B_CORE/board.json
new file mode 100644
index 0000000000000..bd280820fd3bb
--- /dev/null
+++ b/ports/rp2/boards/WEACTSTUDIO_RP2350B_CORE/board.json
@@ -0,0 +1,23 @@
+{
+    "deploy": [
+        "../deploy.md"
+    ],
+    "docs": "",
+    "features": [
+        "Dual-core",
+        "External Flash",
+        "External RAM",
+        "USB-C"
+    ],
+    "images": [
+        "weactstudio_rp2350_core.png"
+    ],
+    "mcu": "rp2350",
+    "product": "RP2350B Core",
+    "thumbnail": "",
+    "url": "https://github.com/WeActStudio/WeActStudio.RP2350BCoreBoard",
+    "variants": {
+        "RISCV": "RISC V"
+    },
+    "vendor": "WeAct Studio"
+}
diff --git a/ports/rp2/boards/WEACTSTUDIO_RP2350B_CORE/manifest.py b/ports/rp2/boards/WEACTSTUDIO_RP2350B_CORE/manifest.py
new file mode 100644
index 0000000000000..832942f052606
--- /dev/null
+++ b/ports/rp2/boards/WEACTSTUDIO_RP2350B_CORE/manifest.py
@@ -0,0 +1 @@
+include("$(PORT_DIR)/boards/manifest.py")
diff --git a/ports/rp2/boards/WEACTSTUDIO_RP2350B_CORE/mpconfigboard.cmake b/ports/rp2/boards/WEACTSTUDIO_RP2350B_CORE/mpconfigboard.cmake
new file mode 100644
index 0000000000000..f03452c6273dc
--- /dev/null
+++ b/ports/rp2/boards/WEACTSTUDIO_RP2350B_CORE/mpconfigboard.cmake
@@ -0,0 +1,13 @@
+# CMake file for WeAct Studio RP2350B Core
+
+# The Core is powered by an RP2350B with 48 GPIOs
+set(PICO_NUM_GPIOS 48)
+
+# The WeAct Studio boards don't have official pico-sdk support.
+# So, add this board directory to the header search path and define PICO_BOARD
+# which will instruct pico-sdk to look for weactstudio_rp2350b_core.h
+list(APPEND PICO_BOARD_HEADER_DIRS ${MICROPY_BOARD_DIR})
+set(PICO_BOARD "weactstudio_rp2350b_core")
+
+# Freeze manifest and modules
+set(MICROPY_FROZEN_MANIFEST ${MICROPY_BOARD_DIR}/manifest.py)
diff --git a/ports/rp2/boards/WEACTSTUDIO_RP2350B_CORE/mpconfigboard.h b/ports/rp2/boards/WEACTSTUDIO_RP2350B_CORE/mpconfigboard.h
new file mode 100644
index 0000000000000..1f0963db85c47
--- /dev/null
+++ b/ports/rp2/boards/WEACTSTUDIO_RP2350B_CORE/mpconfigboard.h
@@ -0,0 +1,16 @@
+// Board and hardware specific configuration
+#define MICROPY_HW_BOARD_NAME "WeAct Studio RP2350B Core"
+#define PICO_FLASH_SIZE_BYTES (16 * 1024 * 1024)
+#define MICROPY_HW_FLASH_STORAGE_BYTES (PICO_FLASH_SIZE_BYTES - (2 * 1024 * 1024))
+
+// TODO: Split PSRAM option off as a variant
+#define MICROPY_HW_PSRAM_CS_PIN (0)
+#define MICROPY_HW_ENABLE_PSRAM (0)
+
+// Override machine_uart.c definitions.
+// See weactstudio_rp2350b.h and note that the PICO_DEFAULT_UART configuration
+// is not currently referenced in machine_uart.c.
+#define MICROPY_HW_UART0_TX     (16)
+#define MICROPY_HW_UART0_RX     (17)
+#define MICROPY_HW_UART0_CTS    (-1)
+#define MICROPY_HW_UART0_RTS    (-1)
diff --git a/ports/rp2/boards/WEACTSTUDIO_RP2350B_CORE/mpconfigvariant.cmake b/ports/rp2/boards/WEACTSTUDIO_RP2350B_CORE/mpconfigvariant.cmake
new file mode 100644
index 0000000000000..531c91524402b
--- /dev/null
+++ b/ports/rp2/boards/WEACTSTUDIO_RP2350B_CORE/mpconfigvariant.cmake
@@ -0,0 +1,2 @@
+# Set the ARM-based RP2350 platform
+set(PICO_PLATFORM "rp2350")
diff --git a/ports/rp2/boards/WEACTSTUDIO_RP2350B_CORE/mpconfigvariant_RISCV.cmake b/ports/rp2/boards/WEACTSTUDIO_RP2350B_CORE/mpconfigvariant_RISCV.cmake
new file mode 100644
index 0000000000000..9f62e459aa053
--- /dev/null
+++ b/ports/rp2/boards/WEACTSTUDIO_RP2350B_CORE/mpconfigvariant_RISCV.cmake
@@ -0,0 +1,2 @@
+# Set the RISC-V-based RP2350 platform
+set(PICO_PLATFORM "rp2350-riscv")
diff --git a/ports/rp2/boards/WEACTSTUDIO_RP2350B_CORE/pins.csv b/ports/rp2/boards/WEACTSTUDIO_RP2350B_CORE/pins.csv
new file mode 100644
index 0000000000000..50d0de8560a33
--- /dev/null
+++ b/ports/rp2/boards/WEACTSTUDIO_RP2350B_CORE/pins.csv
@@ -0,0 +1,48 @@
+GP0,GPIO0
+GP1,GPIO1
+GP2,GPIO2
+GP3,GPIO3
+GP4,GPIO4
+GP5,GPIO5
+GP6,GPIO6
+GP7,GPIO7
+GP8,GPIO8
+GP9,GPIO9
+GP10,GPIO10
+GP11,GPIO11
+GP12,GPIO12
+GP13,GPIO13
+GP14,GPIO14
+GP15,GPIO15
+GP16,GPIO16
+GP17,GPIO17
+GP18,GPIO18
+GP19,GPIO19
+GP20,GPIO20
+GP21,GPIO21
+GP22,GPIO22
+GP25,GPIO25
+GP26,GPIO26
+GP27,GPIO27
+GP28,GPIO28
+GP29,GPIO29
+GP30,GPIO30
+GP31,GPIO31
+GP32,GPIO32
+GP33,GPIO33
+GP34,GPIO34
+GP35,GPIO35
+GP36,GPIO36
+GP37,GPIO37
+GP38,GPIO38
+GP39,GPIO39
+GP40,GPIO40
+GP41,GPIO41
+GP42,GPIO42
+GP43,GPIO43
+GP44,GPIO44
+GP45,GPIO45
+GP46,GPIO46
+GP47,GPIO47
+KEY,GPIO23
+LED,GPIO25
diff --git a/ports/rp2/boards/WEACTSTUDIO_RP2350B_CORE/weactstudio_rp2350b_core.h b/ports/rp2/boards/WEACTSTUDIO_RP2350B_CORE/weactstudio_rp2350b_core.h
new file mode 100644
index 0000000000000..bb00ff2827518
--- /dev/null
+++ b/ports/rp2/boards/WEACTSTUDIO_RP2350B_CORE/weactstudio_rp2350b_core.h
@@ -0,0 +1,58 @@
+#ifndef _BOARDS_WEACTSTUDIO_RP2350B_CORE_COMMON_H
+#define _BOARDS_WEACTSTUDIO_RP2350B_CORE_COMMON_H
+
+// --- LED ---
+#ifndef PICO_DEFAULT_LED_PIN
+#define PICO_DEFAULT_LED_PIN 25
+#endif
+
+// Note: Avoid using Pin 0 for any default peripheral since it can be used for
+// extra PSRAM/flash
+
+// --- UART ---
+#ifndef PICO_DEFAULT_UART
+#define PICO_DEFAULT_UART 0
+#endif
+#ifndef PICO_DEFAULT_UART_TX_PIN
+#define PICO_DEFAULT_UART_TX_PIN 12
+#endif
+#ifndef PICO_DEFAULT_UART_RX_PIN
+#define PICO_DEFAULT_UART_RX_PIN 13
+#endif
+
+// --- I2C ---
+#ifndef PICO_DEFAULT_I2C
+#define PICO_DEFAULT_I2C 0
+#endif
+#ifndef PICO_DEFAULT_I2C_SDA_PIN
+#define PICO_DEFAULT_I2C_SDA_PIN 8
+#endif
+#ifndef PICO_DEFAULT_I2C_SCL_PIN
+#define PICO_DEFAULT_I2C_SCL_PIN 9
+#endif
+
+// --- SPI ---
+#ifndef PICO_DEFAULT_SPI
+#define PICO_DEFAULT_SPI 0
+#endif
+#ifndef PICO_DEFAULT_SPI_SCK_PIN
+#define PICO_DEFAULT_SPI_SCK_PIN 18
+#endif
+#ifndef PICO_DEFAULT_SPI_TX_PIN
+#define PICO_DEFAULT_SPI_TX_PIN 19
+#endif
+#ifndef PICO_DEFAULT_SPI_RX_PIN
+#define PICO_DEFAULT_SPI_RX_PIN 16
+#endif
+#ifndef PICO_DEFAULT_SPI_CSN_PIN
+#define PICO_DEFAULT_SPI_CSN_PIN 17
+#endif
+
+// Flash configuration
+#define PICO_BOOT_STAGE2_CHOOSE_W25Q080 1
+
+#ifndef PICO_FLASH_SPI_CLKDIV
+#define PICO_FLASH_SPI_CLKDIV 2
+#endif
+
+#endif
diff --git a/ports/rp2/cyw43_configport.h b/ports/rp2/cyw43_configport.h
index 4294691c66657..2da0b1f8a4982 100644
--- a/ports/rp2/cyw43_configport.h
+++ b/ports/rp2/cyw43_configport.h
@@ -26,32 +26,27 @@
 #ifndef MICROPY_INCLUDED_RP2_CYW43_CONFIGPORT_H
 #define MICROPY_INCLUDED_RP2_CYW43_CONFIGPORT_H
 
-// The board-level config will be included here, so it can set some CYW43 values.
-#include <stdio.h>
-#include "py/mpconfig.h"
-#include "py/mperrno.h"
-#include "py/mphal.h"
-#include "py/runtime.h"
-#include "extmod/modnetwork.h"
-#include "pendsv.h"
+#include "extmod/cyw43_config_common.h"
 
+#define CYW43_INCLUDE_LEGACY_F1_OVERFLOW_WORKAROUND_VARIABLES (1)
 #define CYW43_WIFI_NVRAM_INCLUDE_FILE   "wifi_nvram_43439.h"
-#define CYW43_IOCTL_TIMEOUT_US          (1000000)
-#define CYW43_SLEEP_MAX                 (10)
-#define CYW43_NETUTILS                  (1)
+#define CYW43_SLEEP_MAX                 (10) // Unclear why rp2 port overrides the default here
 #define CYW43_USE_OTP_MAC               (1)
-#define CYW43_PRINTF(...)               mp_printf(MP_PYTHON_PRINTER, __VA_ARGS__)
 
-#define CYW43_EPERM                     MP_EPERM // Operation not permitted
-#define CYW43_EIO                       MP_EIO // I/O error
-#define CYW43_EINVAL                    MP_EINVAL // Invalid argument
-#define CYW43_ETIMEDOUT                 MP_ETIMEDOUT // Connection timed out
+static inline bool cyw43_poll_is_pending(void) {
+    return pendsv_is_pending(PENDSV_DISPATCH_CYW43);
+}
 
-#define CYW43_THREAD_ENTER              MICROPY_PY_LWIP_ENTER
-#define CYW43_THREAD_EXIT               MICROPY_PY_LWIP_EXIT
-#define CYW43_THREAD_LOCK_CHECK
+static inline void cyw43_yield(void) {
+    if (!cyw43_poll_is_pending()) {
+        best_effort_wfe_or_timeout(make_timeout_time_ms(1));
+    }
+}
 
-#define CYW43_HOST_NAME                 mod_network_hostname_data
+#define CYW43_POST_POLL_HOOK            cyw43_post_poll_hook();
+
+// set in SDK board header
+#define CYW43_NUM_GPIOS                 CYW43_WL_GPIO_COUNT
 
 #if CYW43_PIN_WL_DYNAMIC
 
@@ -98,36 +93,6 @@ uint cyw43_get_pin_wl(cyw43_pin_index_t pin_id);
         cyw43_yield(); \
     } \
 
-#define CYW43_ARRAY_SIZE(a)             MP_ARRAY_SIZE(a)
-
-#define CYW43_HAL_PIN_MODE_INPUT        MP_HAL_PIN_MODE_INPUT
-#define CYW43_HAL_PIN_MODE_OUTPUT       MP_HAL_PIN_MODE_OUTPUT
-#define CYW43_HAL_PIN_PULL_NONE         MP_HAL_PIN_PULL_NONE
-#define CYW43_HAL_PIN_PULL_UP           MP_HAL_PIN_PULL_UP
-#define CYW43_HAL_PIN_PULL_DOWN         MP_HAL_PIN_PULL_DOWN
-
-#define CYW43_HAL_MAC_WLAN0             MP_HAL_MAC_WLAN0
-
-// set in SDK board header
-#define CYW43_NUM_GPIOS                 CYW43_WL_GPIO_COUNT
-
-#define CYW43_POST_POLL_HOOK            cyw43_post_poll_hook();
-
-#define cyw43_hal_ticks_us              mp_hal_ticks_us
-#define cyw43_hal_ticks_ms              mp_hal_ticks_ms
-
-#define cyw43_hal_pin_obj_t             mp_hal_pin_obj_t
-#define cyw43_hal_pin_config            mp_hal_pin_config
-#define cyw43_hal_pin_read              mp_hal_pin_read
-#define cyw43_hal_pin_low               mp_hal_pin_low
-#define cyw43_hal_pin_high              mp_hal_pin_high
-
-#define cyw43_hal_get_mac               mp_hal_get_mac
-#define cyw43_hal_get_mac_ascii         mp_hal_get_mac_ascii
-#define cyw43_hal_generate_laa_mac      mp_hal_generate_laa_mac
-
-#define cyw43_schedule_internal_poll_dispatch(func) pendsv_schedule_dispatch(PENDSV_DISPATCH_CYW43, func)
-
 // Bluetooth requires dynamic memory allocation to load its firmware (the allocation
 // call is made from pico-sdk).  This allocation is always done at thread-level, not
 // from an IRQ, so is safe to delegate to the MicroPython GC heap.
@@ -138,30 +103,4 @@ uint cyw43_get_pin_wl(cyw43_pin_index_t pin_id);
 #define cyw43_free m_tracked_free
 #endif
 
-void cyw43_post_poll_hook(void);
-extern volatile int cyw43_has_pending;
-
-static inline void cyw43_yield(void) {
-    if (!cyw43_has_pending) {
-        best_effort_wfe_or_timeout(make_timeout_time_ms(1));
-    }
-}
-
-static inline void cyw43_delay_us(uint32_t us) {
-    uint32_t start = mp_hal_ticks_us();
-    while (mp_hal_ticks_us() - start < us) {
-    }
-}
-
-static inline void cyw43_delay_ms(uint32_t ms) {
-    // PendSV may be disabled via CYW43_THREAD_ENTER, so this delay is a busy loop.
-    uint32_t us = ms * 1000;
-    uint32_t start = mp_hal_ticks_us();
-    while (mp_hal_ticks_us() - start < us) {
-        mp_event_handle_nowait();
-    }
-}
-
-#define CYW43_EVENT_POLL_HOOK mp_event_handle_nowait()
-
 #endif // MICROPY_INCLUDED_RP2_CYW43_CONFIGPORT_H
diff --git a/ports/rp2/machine_i2c.c b/ports/rp2/machine_i2c.c
index 28032e8085c24..94212fb487043 100644
--- a/ports/rp2/machine_i2c.c
+++ b/ports/rp2/machine_i2c.c
@@ -97,7 +97,11 @@ static void machine_i2c_print(const mp_print_t *print, mp_obj_t self_in, mp_prin
 mp_obj_t machine_i2c_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) {
     enum { ARG_id, ARG_freq, ARG_scl, ARG_sda, ARG_timeout };
     static const mp_arg_t allowed_args[] = {
-        { MP_QSTR_id, MP_ARG_REQUIRED | MP_ARG_OBJ },
+        #ifdef PICO_DEFAULT_I2C
+        { MP_QSTR_id, MP_ARG_INT, {.u_int = PICO_DEFAULT_I2C} },
+        #else
+        { MP_QSTR_id, MP_ARG_INT | MP_ARG_REQUIRED },
+        #endif
         { MP_QSTR_freq, MP_ARG_INT, {.u_int = DEFAULT_I2C_FREQ} },
         { MP_QSTR_scl, MICROPY_I2C_PINS_ARG_OPTS | MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE} },
         { MP_QSTR_sda, MICROPY_I2C_PINS_ARG_OPTS | MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE} },
@@ -108,8 +112,9 @@ mp_obj_t machine_i2c_make_new(const mp_obj_type_t *type, size_t n_args, size_t n
     mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
     mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
 
-    // Get I2C bus.
-    int i2c_id = mp_obj_get_int(args[ARG_id].u_obj);
+    int i2c_id = args[ARG_id].u_int;
+
+    // Check if the I2C bus is valid
     if (i2c_id < 0 || i2c_id >= MP_ARRAY_SIZE(machine_i2c_obj)) {
         mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("I2C(%d) doesn't exist"), i2c_id);
     }
diff --git a/ports/rp2/machine_pin.c b/ports/rp2/machine_pin.c
index 8ba0b44a684f7..7a2de0c0bc690 100644
--- a/ports/rp2/machine_pin.c
+++ b/ports/rp2/machine_pin.c
@@ -46,15 +46,6 @@
 
 #define GPIO_IRQ_ALL (0xf)
 
-// Macros to access the state of the hardware.
-#define GPIO_GET_FUNCSEL(id) ((iobank0_hw->io[(id)].ctrl & IO_BANK0_GPIO0_CTRL_FUNCSEL_BITS) >> IO_BANK0_GPIO0_CTRL_FUNCSEL_LSB)
-#define GPIO_IS_OUT(id) (sio_hw->gpio_oe & (1 << (id)))
-#define GPIO_IS_PULL_UP(id) (padsbank0_hw->io[(id)] & PADS_BANK0_GPIO0_PUE_BITS)
-#define GPIO_IS_PULL_DOWN(id) (padsbank0_hw->io[(id)] & PADS_BANK0_GPIO0_PDE_BITS)
-
-// Open drain behaviour is simulated.
-#define GPIO_IS_OPEN_DRAIN(id) (machine_pin_open_drain_mask & (1 << (id)))
-
 #ifndef MICROPY_HW_PIN_RESERVED
 #define MICROPY_HW_PIN_RESERVED(i) (0)
 #endif
@@ -89,7 +80,11 @@ static const mp_irq_methods_t machine_pin_irq_methods;
 static const int num_intr_regs = sizeof(iobank0_hw->intr) / sizeof(iobank0_hw->intr[0]);
 
 // Mask with "1" indicating that the corresponding pin is in simulated open-drain mode.
+#if NUM_BANK0_GPIOS > 32
 uint64_t machine_pin_open_drain_mask;
+#else
+uint32_t machine_pin_open_drain_mask;
+#endif
 
 #if MICROPY_HW_PIN_EXT_COUNT
 static inline bool is_ext_pin(__unused const machine_pin_obj_t *self) {
@@ -193,18 +188,18 @@ const machine_pin_obj_t *machine_pin_find(mp_obj_t pin) {
             return &machine_pin_obj_table[wanted_pin];
         }
     }
-    mp_raise_ValueError("invalid pin");
+    mp_raise_ValueError(MP_ERROR_TEXT("invalid pin"));
 }
 
 static void machine_pin_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
     machine_pin_obj_t *self = self_in;
-    uint funcsel = GPIO_GET_FUNCSEL(self->id);
+    uint funcsel = gpio_get_function(self->id);
     qstr mode_qst;
     if (!is_ext_pin(self)) {
         if (funcsel == GPIO_FUNC_SIO) {
             if (GPIO_IS_OPEN_DRAIN(self->id)) {
                 mode_qst = MP_QSTR_OPEN_DRAIN;
-            } else if (GPIO_IS_OUT(self->id)) {
+            } else if (gpio_is_dir_out(self->id)) {
                 mode_qst = MP_QSTR_OUT;
             } else {
                 mode_qst = MP_QSTR_IN;
@@ -214,11 +209,11 @@ static void machine_pin_print(const mp_print_t *print, mp_obj_t self_in, mp_prin
         }
         mp_printf(print, "Pin(%q, mode=%q", self->name, mode_qst);
         bool pull_up = false;
-        if (GPIO_IS_PULL_UP(self->id)) {
+        if (gpio_is_pulled_up(self->id)) {
             mp_printf(print, ", pull=%q", MP_QSTR_PULL_UP);
             pull_up = true;
         }
-        if (GPIO_IS_PULL_DOWN(self->id)) {
+        if (gpio_is_pulled_down(self->id)) {
             if (pull_up) {
                 mp_printf(print, "|%q", MP_QSTR_PULL_DOWN);
             } else {
@@ -259,11 +254,11 @@ static mp_obj_t machine_pin_obj_init_helper(const machine_pin_obj_t *self, size_
     mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
 
     if (is_ext_pin(self) && args[ARG_pull].u_obj != mp_const_none) {
-        mp_raise_ValueError("pulls are not supported for external pins");
+        mp_raise_ValueError(MP_ERROR_TEXT("pulls are not supported for external pins"));
     }
 
     if (is_ext_pin(self) && args[ARG_alt].u_int != GPIO_FUNC_SIO) {
-        mp_raise_ValueError("alternate functions are not supported for external pins");
+        mp_raise_ValueError(MP_ERROR_TEXT("alternate functions are not supported for external pins"));
     }
 
     // get initial value of pin (only valid for OUT and OPEN_DRAIN modes)
@@ -298,7 +293,7 @@ static mp_obj_t machine_pin_obj_init_helper(const machine_pin_obj_t *self, size_
                 mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("invalid pin af: %d"), af);
             }
             gpio_set_function(self->id, af);
-            machine_pin_open_drain_mask &= ~(1ULL << self->id);
+            GPIO_DISABLE_OPEN_DRAIN(self->id);
         }
     }
 
@@ -411,7 +406,7 @@ static mp_obj_t machine_pin_toggle(mp_obj_t self_in) {
         machine_pin_ext_set(self, self->last_output_value ^ 1);
         #endif
     } else if (GPIO_IS_OPEN_DRAIN(self->id)) {
-        if (GPIO_IS_OUT(self->id)) {
+        if (gpio_is_dir_out(self->id)) {
             gpio_set_dir(self->id, GPIO_IN);
         } else {
             gpio_set_dir(self->id, GPIO_OUT);
diff --git a/ports/rp2/machine_pin_cyw43.c b/ports/rp2/machine_pin_cyw43.c
index 9fc262454f86c..f79d932f7a535 100644
--- a/ports/rp2/machine_pin_cyw43.c
+++ b/ports/rp2/machine_pin_cyw43.c
@@ -70,7 +70,7 @@ void machine_pin_ext_config(machine_pin_obj_t *self, int mode, int value) {
             self->is_output = true;
         }
     } else {
-        mp_raise_ValueError("only Pin.OUT and Pin.IN are supported for this pin");
+        mp_raise_ValueError(MP_ERROR_TEXT("only Pin.OUT and Pin.IN are supported for this pin"));
     }
 
     if (value != -1) {
diff --git a/ports/rp2/machine_spi.c b/ports/rp2/machine_spi.c
index abf0a70bd0ebc..680a3df287850 100644
--- a/ports/rp2/machine_spi.c
+++ b/ports/rp2/machine_spi.c
@@ -80,6 +80,9 @@
 
 #endif
 
+// Assume we won't get an RP2-compatible with 255 GPIO pins
+#define MICROPY_HW_SPI_PIN_UNUSED UINT8_MAX
+
 // SPI0 can be GP{0..7,16..23}, SPI1 can be GP{8..15,24..29}.
 #define IS_VALID_PERIPH(spi, pin)   ((((pin) & 8) >> 3) == (spi))
 // GP{2,6,10,14,...}
@@ -120,15 +123,24 @@ static machine_spi_obj_t machine_spi_obj[] = {
 
 static void machine_spi_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
     machine_spi_obj_t *self = MP_OBJ_TO_PTR(self_in);
-    mp_printf(print, "SPI(%u, baudrate=%u, polarity=%u, phase=%u, bits=%u, sck=%u, mosi=%u, miso=%u)",
+    mp_printf(print, "SPI(%u, baudrate=%u, polarity=%u, phase=%u, bits=%u, sck=%u, mosi=%u, miso=",
         self->spi_id, self->baudrate, self->polarity, self->phase, self->bits,
-        self->sck, self->mosi, self->miso);
+        self->sck, self->mosi);
+    if (self->miso == MICROPY_HW_SPI_PIN_UNUSED) {
+        mp_printf(print, "None)");
+    } else {
+        mp_printf(print, "%u)", self->miso);
+    }
 }
 
 mp_obj_t machine_spi_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) {
     enum { ARG_id, ARG_baudrate, ARG_polarity, ARG_phase, ARG_bits, ARG_firstbit, ARG_sck, ARG_mosi, ARG_miso };
     static const mp_arg_t allowed_args[] = {
-        { MP_QSTR_id,       MP_ARG_REQUIRED | MP_ARG_OBJ },
+        #ifdef PICO_DEFAULT_SPI
+        { MP_QSTR_id,       MP_ARG_INT, {.u_int = PICO_DEFAULT_SPI} },
+        #else
+        { MP_QSTR_id,       MP_ARG_REQUIRED | MP_ARG_INT, },
+        #endif
         { MP_QSTR_baudrate, MP_ARG_INT, {.u_int = DEFAULT_SPI_BAUDRATE} },
         { MP_QSTR_polarity, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = DEFAULT_SPI_POLARITY} },
         { MP_QSTR_phase,    MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = DEFAULT_SPI_PHASE} },
@@ -136,7 +148,7 @@ mp_obj_t machine_spi_make_new(const mp_obj_type_t *type, size_t n_args, size_t n
         { MP_QSTR_firstbit, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = DEFAULT_SPI_FIRSTBIT} },
         { MP_QSTR_sck,      MICROPY_SPI_PINS_ARG_OPTS | MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE} },
         { MP_QSTR_mosi,     MICROPY_SPI_PINS_ARG_OPTS | MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE} },
-        { MP_QSTR_miso,     MICROPY_SPI_PINS_ARG_OPTS | MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE} },
+        { MP_QSTR_miso,     MICROPY_SPI_PINS_ARG_OPTS | MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_INT(-1)} },
     };
 
     // Parse the arguments.
@@ -144,7 +156,7 @@ mp_obj_t machine_spi_make_new(const mp_obj_type_t *type, size_t n_args, size_t n
     mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
 
     // Get the SPI bus id.
-    int spi_id = mp_obj_get_int(args[ARG_id].u_obj);
+    int spi_id = args[ARG_id].u_int;
     if (spi_id < 0 || spi_id >= MP_ARRAY_SIZE(machine_spi_obj)) {
         mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("SPI(%d) doesn't exist"), spi_id);
     }
@@ -167,7 +179,10 @@ mp_obj_t machine_spi_make_new(const mp_obj_type_t *type, size_t n_args, size_t n
         }
         self->mosi = mosi;
     }
-    if (args[ARG_miso].u_obj != mp_const_none) {
+
+    if (args[ARG_miso].u_obj == mp_const_none) {
+        self->miso = MICROPY_HW_SPI_PIN_UNUSED;
+    } else if (args[ARG_miso].u_obj != MP_OBJ_NEW_SMALL_INT(-1)) {
         int miso = mp_hal_get_pin_obj(args[ARG_miso].u_obj);
         if (!IS_VALID_MISO(self->spi_id, miso)) {
             mp_raise_ValueError(MP_ERROR_TEXT("bad MISO pin"));
@@ -190,7 +205,9 @@ mp_obj_t machine_spi_make_new(const mp_obj_type_t *type, size_t n_args, size_t n
         self->baudrate = spi_set_baudrate(self->spi_inst, self->baudrate);
         spi_set_format(self->spi_inst, self->bits, self->polarity, self->phase, self->firstbit);
         gpio_set_function(self->sck, GPIO_FUNC_SPI);
-        gpio_set_function(self->miso, GPIO_FUNC_SPI);
+        if (self->miso != MICROPY_HW_SPI_PIN_UNUSED) {
+            gpio_set_function(self->miso, GPIO_FUNC_SPI);
+        }
         gpio_set_function(self->mosi, GPIO_FUNC_SPI);
     }
 
diff --git a/ports/rp2/machine_uart.c b/ports/rp2/machine_uart.c
index 334c6fda328f3..9a4507ada69c4 100644
--- a/ports/rp2/machine_uart.c
+++ b/ports/rp2/machine_uart.c
@@ -116,8 +116,10 @@ typedef struct _machine_uart_obj_t {
     uint16_t timeout_char;  // timeout waiting between chars (in ms)
     uint8_t invert;
     uint8_t flow;
+    uint16_t rxbuf_len;
     ringbuf_t read_buffer;
     mutex_t *read_mutex;
+    uint16_t txbuf_len;
     ringbuf_t write_buffer;
     mutex_t *write_mutex;
     uint16_t mp_irq_trigger;   // user IRQ trigger mask
@@ -128,10 +130,10 @@ typedef struct _machine_uart_obj_t {
 static machine_uart_obj_t machine_uart_obj[] = {
     {{&machine_uart_type}, uart0, 0, 0, DEFAULT_UART_BITS, UART_PARITY_NONE, DEFAULT_UART_STOP,
      MICROPY_HW_UART0_TX, MICROPY_HW_UART0_RX, MICROPY_HW_UART0_CTS, MICROPY_HW_UART0_RTS,
-     0, 0, 0, 0, {NULL, 1, 0, 0}, &read_mutex_0, {NULL, 1, 0, 0}, &write_mutex_0, 0, 0, NULL},
+     0, 0, 0, 0, 0, {NULL, 1, 0, 0}, &read_mutex_0, 0, {NULL, 1, 0, 0}, &write_mutex_0, 0, 0, NULL},
     {{&machine_uart_type}, uart1, 1, 0, DEFAULT_UART_BITS, UART_PARITY_NONE, DEFAULT_UART_STOP,
      MICROPY_HW_UART1_TX, MICROPY_HW_UART1_RX, MICROPY_HW_UART1_CTS, MICROPY_HW_UART1_RTS,
-     0, 0, 0, 0, {NULL, 1, 0, 0}, &read_mutex_1, {NULL, 1, 0, 0}, &write_mutex_1},
+     0, 0, 0, 0, 0, {NULL, 1, 0, 0}, &read_mutex_1, 0, {NULL, 1, 0, 0}, &write_mutex_1, 0, 0, NULL},
 };
 
 static const char *_parity_name[] = {"None", "0", "1"};
@@ -252,7 +254,7 @@ static void mp_machine_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_
     mp_printf(print, "UART(%u, baudrate=%u, bits=%u, parity=%s, stop=%u, tx=%d, rx=%d, "
         "txbuf=%d, rxbuf=%d, timeout=%u, timeout_char=%u, invert=%s, irq=%d)",
         self->uart_id, self->baudrate, self->bits, _parity_name[self->parity],
-        self->stop, self->tx, self->rx, self->write_buffer.size - 1, self->read_buffer.size - 1,
+        self->stop, self->tx, self->rx, self->txbuf_len, self->rxbuf_len,
         self->timeout, self->timeout_char, _invert_name[self->invert], self->mp_irq_trigger);
 }
 
@@ -365,25 +367,33 @@ static void mp_machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args,
     }
 
     // Set the RX buffer size if configured.
-    size_t rxbuf_len = DEFAULT_BUFFER_SIZE;
     if (args[ARG_rxbuf].u_int > 0) {
-        rxbuf_len = args[ARG_rxbuf].u_int;
+        size_t rxbuf_len = args[ARG_rxbuf].u_int;
         if (rxbuf_len < MIN_BUFFER_SIZE) {
             rxbuf_len = MIN_BUFFER_SIZE;
         } else if (rxbuf_len > MAX_BUFFER_SIZE) {
             mp_raise_ValueError(MP_ERROR_TEXT("rxbuf too large"));
         }
+        // Force re-allocting of the buffer if the size changed
+        if (rxbuf_len != self->rxbuf_len) {
+            self->read_buffer.buf = NULL;
+            self->rxbuf_len = rxbuf_len;
+        }
     }
 
     // Set the TX buffer size if configured.
-    size_t txbuf_len = DEFAULT_BUFFER_SIZE;
     if (args[ARG_txbuf].u_int > 0) {
-        txbuf_len = args[ARG_txbuf].u_int;
+        size_t txbuf_len = args[ARG_txbuf].u_int;
         if (txbuf_len < MIN_BUFFER_SIZE) {
             txbuf_len = MIN_BUFFER_SIZE;
         } else if (txbuf_len > MAX_BUFFER_SIZE) {
             mp_raise_ValueError(MP_ERROR_TEXT("txbuf too large"));
         }
+        // Force re-allocting of the buffer if the size changed
+        if (txbuf_len != self->txbuf_len) {
+            self->write_buffer.buf = NULL;
+            self->txbuf_len = txbuf_len;
+        }
     }
 
     // Initialise the UART peripheral if any arguments given, or it was not initialised previously.
@@ -423,11 +433,14 @@ static void mp_machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args,
         uart_set_hw_flow(self->uart, self->flow & UART_HWCONTROL_CTS, self->flow & UART_HWCONTROL_RTS);
 
         // Allocate the RX/TX buffers.
-        ringbuf_alloc(&(self->read_buffer), rxbuf_len + 1);
-        MP_STATE_PORT(rp2_uart_rx_buffer[self->uart_id]) = self->read_buffer.buf;
-
-        ringbuf_alloc(&(self->write_buffer), txbuf_len + 1);
-        MP_STATE_PORT(rp2_uart_tx_buffer[self->uart_id]) = self->write_buffer.buf;
+        if (self->read_buffer.buf == NULL) {
+            ringbuf_alloc(&(self->read_buffer), self->rxbuf_len + 1);
+            MP_STATE_PORT(rp2_uart_rx_buffer[self->uart_id]) = self->read_buffer.buf;
+        }
+        if (self->write_buffer.buf == NULL) {
+            ringbuf_alloc(&(self->write_buffer), self->txbuf_len + 1);
+            MP_STATE_PORT(rp2_uart_tx_buffer[self->uart_id]) = self->write_buffer.buf;
+        }
 
         // Set the irq handler.
         if (self->uart_id == 0) {
@@ -454,6 +467,10 @@ static mp_obj_t mp_machine_uart_make_new(const mp_obj_type_t *type, size_t n_arg
 
     // Get static peripheral object.
     machine_uart_obj_t *self = (machine_uart_obj_t *)&machine_uart_obj[uart_id];
+    self->rxbuf_len = DEFAULT_BUFFER_SIZE;
+    self->read_buffer.buf = NULL;
+    self->txbuf_len = DEFAULT_BUFFER_SIZE;
+    self->write_buffer.buf = NULL;
 
     // Initialise the UART peripheral.
     mp_map_t kw_args;
diff --git a/ports/rp2/main.c b/ports/rp2/main.c
index d6bf448267152..0f10f63c6d296 100644
--- a/ports/rp2/main.c
+++ b/ports/rp2/main.c
@@ -26,6 +26,7 @@
 
 #include <stdio.h>
 
+#include "rp2_flash.h"
 #include "py/compile.h"
 #include "py/cstack.h"
 #include "py/runtime.h"
@@ -46,6 +47,7 @@
 #include "mpnetworkport.h"
 #include "genhdr/mpversion.h"
 #include "mp_usbd.h"
+#include "rp2_psram.h"
 
 #include "pico/stdlib.h"
 #include "pico/binary_info.h"
@@ -90,9 +92,16 @@ int main(int argc, char **argv) {
     // Set the MCU frequency and as a side effect the peripheral clock to 48 MHz.
     set_sys_clock_khz(SYS_CLK_KHZ, false);
 
-    // Hook for setting up anything that needs to be super early in the bootup process.
+    // Hook for setting up anything that needs to be super early in the boot-up process.
     MICROPY_BOARD_STARTUP();
 
+    // Set the flash divisor to an appropriate value
+    rp2_flash_set_timing();
+
+    #if MICROPY_HW_ENABLE_PSRAM
+    size_t psram_size = psram_init(MICROPY_HW_PSRAM_CS_PIN);
+    #endif
+
     #if MICROPY_HW_ENABLE_UART_REPL
     bi_decl(bi_program_feature("UART REPL"))
     setup_default_uart();
@@ -120,7 +129,21 @@ int main(int argc, char **argv) {
 
     // Initialise stack extents and GC heap.
     mp_cstack_init_with_top(&__StackTop, &__StackTop - &__StackBottom);
+
+    #if MICROPY_HW_ENABLE_PSRAM
+    if (psram_size) {
+        #if MICROPY_GC_SPLIT_HEAP
+        gc_init(&__GcHeapStart, &__GcHeapEnd);
+        gc_add((void *)PSRAM_BASE, (void *)(PSRAM_BASE + psram_size));
+        #else
+        gc_init((void *)PSRAM_BASE, (void *)(PSRAM_BASE + psram_size));
+        #endif
+    } else {
+        gc_init(&__GcHeapStart, &__GcHeapEnd);
+    }
+    #else
     gc_init(&__GcHeapStart, &__GcHeapEnd);
+    #endif
 
     #if MICROPY_PY_LWIP
     // lwIP doesn't allow to reinitialise itself by subsequent calls to this function
diff --git a/ports/rp2/memmap_mp_rp2040.ld b/ports/rp2/memmap_mp_rp2040.ld
index a5799cd88be0e..5c8d9f4718891 100644
--- a/ports/rp2/memmap_mp_rp2040.ld
+++ b/ports/rp2/memmap_mp_rp2040.ld
@@ -23,7 +23,7 @@
 
 MEMORY
 {
-    FLASH(rx) : ORIGIN = 0x10000000, LENGTH = 2048k
+    FLASH(rx) : ORIGIN = 0x10000000, LENGTH = __micropy_flash_size__
     RAM(rwx) : ORIGIN =  0x20000000, LENGTH = 256k
     SCRATCH_X(rwx) : ORIGIN = 0x20040000, LENGTH = 4k
     SCRATCH_Y(rwx) : ORIGIN = 0x20041000, LENGTH = 4k
diff --git a/ports/rp2/memmap_mp_rp2350.ld b/ports/rp2/memmap_mp_rp2350.ld
index 1e1cbbfd70296..1c4770efe1027 100644
--- a/ports/rp2/memmap_mp_rp2350.ld
+++ b/ports/rp2/memmap_mp_rp2350.ld
@@ -23,7 +23,7 @@
 
 MEMORY
 {
-    FLASH(rx) : ORIGIN = 0x10000000, LENGTH = 4096k
+    FLASH(rx) : ORIGIN = 0x10000000, LENGTH = __micropy_flash_size__
     RAM(rwx) : ORIGIN =  0x20000000, LENGTH = 512k
     SCRATCH_X(rwx) : ORIGIN = 0x20080000, LENGTH = 4k
     SCRATCH_Y(rwx) : ORIGIN = 0x20081000, LENGTH = 4k
diff --git a/ports/rp2/modmachine.c b/ports/rp2/modmachine.c
index 954ea216497fe..1f1b0e2f59b1e 100644
--- a/ports/rp2/modmachine.c
+++ b/ports/rp2/modmachine.c
@@ -31,6 +31,8 @@
 #include "mp_usbd.h"
 #include "modmachine.h"
 #include "uart.h"
+#include "rp2_psram.h"
+#include "rp2_flash.h"
 #include "clocks_extra.h"
 #include "hardware/pll.h"
 #include "hardware/structs/rosc.h"
@@ -63,7 +65,7 @@ static mp_obj_t mp_machine_unique_id(void) {
     return mp_obj_new_bytes(id.id, sizeof(id.id));
 }
 
-NORETURN static void mp_machine_reset(void) {
+MP_NORETURN static void mp_machine_reset(void) {
     watchdog_reboot(0, SRAM_END, 0);
     for (;;) {
         __wfi();
@@ -80,7 +82,7 @@ static mp_int_t mp_machine_reset_cause(void) {
     return reset_cause;
 }
 
-NORETURN void mp_machine_bootloader(size_t n_args, const mp_obj_t *args) {
+MP_NORETURN void mp_machine_bootloader(size_t n_args, const mp_obj_t *args) {
     MICROPY_BOARD_ENTER_BOOTLOADER(n_args, args);
     rosc_hw->ctrl = ROSC_CTRL_ENABLE_VALUE_ENABLE << ROSC_CTRL_ENABLE_LSB;
     reset_usb_boot(0, 0);
@@ -94,6 +96,11 @@ static mp_obj_t mp_machine_get_freq(void) {
 
 static void mp_machine_set_freq(size_t n_args, const mp_obj_t *args) {
     mp_int_t freq = mp_obj_get_int(args[0]);
+
+    // If necessary, increase the flash divider before increasing the clock speed
+    const int old_freq = clock_get_hz(clk_sys);
+    rp2_flash_set_timing_for_freq(MAX(freq, old_freq));
+
     if (!set_sys_clock_khz(freq / 1000, false)) {
         mp_raise_ValueError(MP_ERROR_TEXT("cannot change frequency"));
     }
@@ -111,16 +118,31 @@ static void mp_machine_set_freq(size_t n_args, const mp_obj_t *args) {
             }
         }
     }
+
+    // If clock speed was reduced, maybe we can reduce the flash divider
+    if (freq < old_freq) {
+        rp2_flash_set_timing_for_freq(freq);
+    }
+
     #if MICROPY_HW_ENABLE_UART_REPL
     setup_default_uart();
     mp_uart_init();
     #endif
+    #if MICROPY_HW_ENABLE_PSRAM
+    psram_init(MICROPY_HW_PSRAM_CS_PIN);
+    #endif
 }
 
 static void mp_machine_idle(void) {
     MICROPY_INTERNAL_WFE(1);
 }
 
+static void alarm_sleep_callback(uint alarm_id) {
+}
+
+// Set this to 1 to enable some debug of the interrupt that woke the device
+#define DEBUG_LIGHTSLEEP 0
+
 static void mp_machine_lightsleep(size_t n_args, const mp_obj_t *args) {
     mp_int_t delay_ms = 0;
     bool use_timer_alarm = false;
@@ -145,12 +167,22 @@ static void mp_machine_lightsleep(size_t n_args, const mp_obj_t *args) {
 
     uint32_t my_interrupts = MICROPY_BEGIN_ATOMIC_SECTION();
     #if MICROPY_PY_NETWORK_CYW43
-    if (cyw43_has_pending && cyw43_poll != NULL) {
+    if (cyw43_poll_is_pending()) {
         MICROPY_END_ATOMIC_SECTION(my_interrupts);
         return;
     }
     #endif
 
+    #if MICROPY_PY_THREAD
+    static bool in_lightsleep;
+    if (in_lightsleep) {
+        // The other CPU is also in machine.lightsleep()
+        MICROPY_END_ATOMIC_SECTION(my_interrupts);
+        return;
+    }
+    in_lightsleep = true;
+    #endif
+
     #if MICROPY_HW_ENABLE_USBDEV
     // Only disable the USB clock if a USB host has not configured the device
     // or if going to DORMANT mode.
@@ -190,6 +222,15 @@ static void mp_machine_lightsleep(size_t n_args, const mp_obj_t *args) {
     // Disable ROSC.
     rosc_hw->ctrl = ROSC_CTRL_ENABLE_VALUE_DISABLE << ROSC_CTRL_ENABLE_LSB;
 
+    #if DEBUG_LIGHTSLEEP
+    #if PICO_RP2040
+    uint32_t pending_intr = 0;
+    #else
+    uint32_t pending_intr[2] = { 0 };
+    #endif
+    #endif
+
+    bool alarm_armed = false;
     if (n_args == 0) {
         #if MICROPY_PY_NETWORK_CYW43
         gpio_set_dormant_irq_enabled(CYW43_PIN_WL_HOST_WAKE, GPIO_IRQ_LEVEL_HIGH, true);
@@ -198,16 +239,7 @@ static void mp_machine_lightsleep(size_t n_args, const mp_obj_t *args) {
     } else {
         uint32_t save_sleep_en0 = clocks_hw->sleep_en0;
         uint32_t save_sleep_en1 = clocks_hw->sleep_en1;
-        bool timer3_enabled = irq_is_enabled(3);
-
-        const uint32_t alarm_num = 3;
-        const uint32_t irq_num = TIMER_ALARM_IRQ_NUM(timer_hw, alarm_num);
         if (use_timer_alarm) {
-            // Make sure ALARM3/IRQ3 is enabled on _this_ core
-            if (!timer3_enabled) {
-                irq_set_enabled(irq_num, true);
-            }
-            hw_set_bits(&timer_hw->inte, 1u << alarm_num);
             // Use timer alarm to wake.
             clocks_hw->sleep_en0 = 0x0;
             #if PICO_RP2040
@@ -217,8 +249,11 @@ static void mp_machine_lightsleep(size_t n_args, const mp_obj_t *args) {
             #else
             #error Unknown processor
             #endif
-            timer_hw->intr = 1u << alarm_num; // clear any IRQ
-            timer_hw->alarm[alarm_num] = timer_hw->timerawl + delay_ms * 1000;
+            hardware_alarm_claim(MICROPY_HW_LIGHTSLEEP_ALARM_NUM);
+            hardware_alarm_set_callback(MICROPY_HW_LIGHTSLEEP_ALARM_NUM, alarm_sleep_callback);
+            if (hardware_alarm_set_target(MICROPY_HW_LIGHTSLEEP_ALARM_NUM, make_timeout_time_ms(delay_ms)) == PICO_OK) {
+                alarm_armed = true;
+            }
         } else {
             // TODO: Use RTC alarm to wake.
             clocks_hw->sleep_en0 = 0x0;
@@ -248,10 +283,17 @@ static void mp_machine_lightsleep(size_t n_args, const mp_obj_t *args) {
         #endif
 
         // Go into low-power mode.
-        __wfi();
+        if (alarm_armed) {
+            __wfi();
 
-        if (!timer3_enabled) {
-            irq_set_enabled(irq_num, false);
+            #if DEBUG_LIGHTSLEEP
+            #if PICO_RP2040
+            pending_intr = nvic_hw->ispr;
+            #else
+            pending_intr[0] = nvic_hw->ispr[0];
+            pending_intr[1] = nvic_hw->ispr[1];
+            #endif
+            #endif
         }
         clocks_hw->sleep_en0 = save_sleep_en0;
         clocks_hw->sleep_en1 = save_sleep_en1;
@@ -266,9 +308,37 @@ static void mp_machine_lightsleep(size_t n_args, const mp_obj_t *args) {
 
     // Re-sync mp_hal_time_ns() counter with aon timer.
     mp_hal_time_ns_set_from_rtc();
+
+    // Note: This must be done after MICROPY_END_ATOMIC_SECTION
+    if (use_timer_alarm) {
+        if (alarm_armed) {
+            hardware_alarm_cancel(MICROPY_HW_LIGHTSLEEP_ALARM_NUM);
+        }
+        hardware_alarm_set_callback(MICROPY_HW_LIGHTSLEEP_ALARM_NUM, NULL);
+        hardware_alarm_unclaim(MICROPY_HW_LIGHTSLEEP_ALARM_NUM);
+
+        #if DEBUG_LIGHTSLEEP
+        // Check irq.h for the list of IRQ's
+        // for rp2040 00000042: TIMER_IRQ_1 woke the device as expected
+        //            00000020: USBCTRL_IRQ woke the device (probably early)
+        // For rp2350 00000000:00000002: TIMER0_IRQ_1 woke the device as expected
+        //            00000000:00004000: USBCTRL_IRQ woke the device (probably early)
+        #if PICO_RP2040
+        mp_printf(MP_PYTHON_PRINTER, "lightsleep: pending_intr=%08lx\n", pending_intr);
+        #else
+        mp_printf(MP_PYTHON_PRINTER, "lightsleep: pending_intr=%08lx:%08lx\n", pending_intr[1], pending_intr[0]);
+        #endif
+        #endif
+    }
+
+    #if MICROPY_PY_THREAD
+    // Clearing the flag here is atomic, and we know we're the ones who set it
+    // (higher up, inside the critical section)
+    in_lightsleep = false;
+    #endif
 }
 
-NORETURN static void mp_machine_deepsleep(size_t n_args, const mp_obj_t *args) {
+MP_NORETURN static void mp_machine_deepsleep(size_t n_args, const mp_obj_t *args) {
     mp_machine_lightsleep(n_args, args);
     mp_machine_reset();
 }
diff --git a/ports/rp2/modrp2.c b/ports/rp2/modrp2.c
index c90b6d5840208..5a43c11e71928 100644
--- a/ports/rp2/modrp2.c
+++ b/ports/rp2/modrp2.c
@@ -42,11 +42,17 @@
 MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(mod_network_country_obj);
 #endif
 
+#define CS_PIN_INDEX 1
+
+#if PICO_RP2040
+#define CS_BIT (1u << CS_PIN_INDEX)
+#else
+#define CS_BIT SIO_GPIO_HI_IN_QSPI_CSN_BITS
+#endif
+
 // Improved version of
 // https://github.com/raspberrypi/pico-examples/blob/master/picoboard/button/button.c
 static bool __no_inline_not_in_flash_func(bootsel_button)(void) {
-    const uint CS_PIN_INDEX = 1;
-
     // Disable interrupts and the other core since they might be
     // executing code from flash and we are about to temporarily
     // disable flash access.
@@ -65,7 +71,7 @@ static bool __no_inline_not_in_flash_func(bootsel_button)(void) {
 
     // The HI GPIO registers in SIO can observe and control the 6 QSPI pins.
     // The button pulls the QSPI_SS pin *low* when pressed.
-    bool button_state = !(sio_hw->gpio_hi_in & (1 << CS_PIN_INDEX));
+    bool button_state = !(sio_hw->gpio_hi_in & CS_BIT);
 
     // Restore the QSPI_SS pin so we can use flash again.
     hw_write_masked(&ioqspi_hw->io[CS_PIN_INDEX].ctrl,
diff --git a/ports/rp2/mpconfigport.h b/ports/rp2/mpconfigport.h
index fe8287ba1d6e5..877cea08717fd 100644
--- a/ports/rp2/mpconfigport.h
+++ b/ports/rp2/mpconfigport.h
@@ -67,12 +67,34 @@
 #endif
 #endif
 
+// Number of bytes of flash to allocate to the ROMFS partition.
+#ifndef MICROPY_HW_ROMFS_BYTES
+#define MICROPY_HW_ROMFS_BYTES (0)
+#endif
+
+// Number of bytes of flash to allocate to read/write filesystem storage.
+#ifndef MICROPY_HW_FLASH_STORAGE_BYTES
+#define MICROPY_HW_FLASH_STORAGE_BYTES (1408 * 1024)
+#endif
+
 #ifndef MICROPY_CONFIG_ROM_LEVEL
 #define MICROPY_CONFIG_ROM_LEVEL                (MICROPY_CONFIG_ROM_LEVEL_EXTRA_FEATURES)
 #endif
 
+#ifndef MICROPY_HW_ENABLE_PSRAM
+#define MICROPY_HW_ENABLE_PSRAM (0)
+#endif
+
 // Memory allocation policies
+#if MICROPY_HW_ENABLE_PSRAM
+#define MICROPY_GC_STACK_ENTRY_TYPE             uint32_t
+#define MICROPY_ALLOC_GC_STACK_SIZE             (1024) // Avoid slowdown when GC stack overflow causes a full sweep of PSRAM-backed heap
+#else
 #define MICROPY_GC_STACK_ENTRY_TYPE             uint16_t
+#endif
+#ifndef MICROPY_GC_SPLIT_HEAP
+#define MICROPY_GC_SPLIT_HEAP                   MICROPY_HW_ENABLE_PSRAM // whether PSRAM is added to or replaces the heap
+#endif
 #define MICROPY_ALLOC_PATH_MAX                  (128)
 #define MICROPY_QSTR_BYTES_IN_HASH              (1)
 
@@ -170,13 +192,15 @@
 #define MICROPY_VFS                             (1)
 #define MICROPY_VFS_LFS2                        (1)
 #define MICROPY_VFS_FAT                         (1)
+#define MICROPY_VFS_ROM                         (MICROPY_HW_ROMFS_BYTES > 0)
 #define MICROPY_SSL_MBEDTLS                     (1)
 #define MICROPY_PY_LWIP_PPP                     (MICROPY_PY_NETWORK_PPP_LWIP)
 #define MICROPY_PY_LWIP_SOCK_RAW                (MICROPY_PY_LWIP)
 
 // Hardware timer alarm index. Available range 0-3.
-// Number 3 is currently used by pico-sdk (PICO_TIME_DEFAULT_ALARM_POOL_HARDWARE_ALARM_NUM)
+// Number 3 is currently used by pico-sdk alarm pool (PICO_TIME_DEFAULT_ALARM_POOL_HARDWARE_ALARM_NUM)
 #define MICROPY_HW_SOFT_TIMER_ALARM_NUM         (2)
+#define MICROPY_HW_LIGHTSLEEP_ALARM_NUM         (1)
 
 // fatfs configuration
 #define MICROPY_FATFS_ENABLE_LFN                (2)
diff --git a/ports/rp2/mphalport.c b/ports/rp2/mphalport.c
index caecb695099d5..b581b3b59f95d 100644
--- a/ports/rp2/mphalport.c
+++ b/ports/rp2/mphalport.c
@@ -266,17 +266,7 @@ void soft_timer_init(void) {
 }
 
 void mp_wfe_or_timeout(uint32_t timeout_ms) {
-    soft_timer_entry_t timer;
-
-    // Note the timer doesn't have an associated callback, it just exists to create a
-    // hardware interrupt to wake the CPU
-    soft_timer_static_init(&timer, SOFT_TIMER_MODE_ONE_SHOT, 0, NULL);
-    soft_timer_insert(&timer, timeout_ms);
-
-    __wfe();
-
-    // Clean up the timer node if it's not already
-    soft_timer_remove(&timer);
+    best_effort_wfe_or_timeout(delayed_by_ms(get_absolute_time(), timeout_ms));
 }
 
 int mp_hal_is_pin_reserved(int n) {
diff --git a/ports/rp2/mphalport.h b/ports/rp2/mphalport.h
index 956db3ec702fb..5012b682b9d29 100644
--- a/ports/rp2/mphalport.h
+++ b/ports/rp2/mphalport.h
@@ -123,7 +123,18 @@ static inline mp_uint_t mp_hal_get_cpu_freq(void) {
 #define MP_HAL_PIN_PULL_UP              (1)
 #define MP_HAL_PIN_PULL_DOWN            (2)
 
+// Open drain behaviour is simulated.
+#if NUM_BANK0_GPIOS > 32
 extern uint64_t machine_pin_open_drain_mask;
+#define GPIO_IS_OPEN_DRAIN(id)          (machine_pin_open_drain_mask & (1ULL << id))
+#define GPIO_ENABLE_OPEN_DRAIN(id)      (machine_pin_open_drain_mask |= (1ULL << id))
+#define GPIO_DISABLE_OPEN_DRAIN(id)     (machine_pin_open_drain_mask &= ~(1ULL << id))
+#else
+extern uint32_t machine_pin_open_drain_mask;
+#define GPIO_IS_OPEN_DRAIN(id)          (machine_pin_open_drain_mask & (1U << id))
+#define GPIO_ENABLE_OPEN_DRAIN(id)      (machine_pin_open_drain_mask |= (1U << id))
+#define GPIO_DISABLE_OPEN_DRAIN(id)     (machine_pin_open_drain_mask &= ~(1U << id))
+#endif
 
 mp_hal_pin_obj_t mp_hal_get_pin_obj(mp_obj_t pin_in);
 
@@ -133,13 +144,13 @@ static inline unsigned int mp_hal_pin_name(mp_hal_pin_obj_t pin) {
 
 static inline void mp_hal_pin_input(mp_hal_pin_obj_t pin) {
     gpio_set_dir(pin, GPIO_IN);
-    machine_pin_open_drain_mask &= ~(1 << pin);
+    GPIO_DISABLE_OPEN_DRAIN(pin);
     gpio_set_function(pin, GPIO_FUNC_SIO);
 }
 
 static inline void mp_hal_pin_output(mp_hal_pin_obj_t pin) {
     gpio_set_dir(pin, GPIO_OUT);
-    machine_pin_open_drain_mask &= ~(1 << pin);
+    GPIO_DISABLE_OPEN_DRAIN(pin);
     gpio_set_function(pin, GPIO_FUNC_SIO);
 }
 
@@ -151,7 +162,7 @@ static inline void mp_hal_pin_open_drain_with_value(mp_hal_pin_obj_t pin, int v)
         gpio_put(pin, 0);
         gpio_set_dir(pin, GPIO_OUT);
     }
-    machine_pin_open_drain_mask |= 1 << pin;
+    GPIO_ENABLE_OPEN_DRAIN(pin);
     gpio_set_function(pin, GPIO_FUNC_SIO);
 }
 
diff --git a/ports/rp2/mpnetworkport.c b/ports/rp2/mpnetworkport.c
index af2cabb3bff0f..fed34be380a50 100644
--- a/ports/rp2/mpnetworkport.c
+++ b/ports/rp2/mpnetworkport.c
@@ -31,6 +31,7 @@
 #if MICROPY_PY_LWIP
 
 #include "shared/runtime/softtimer.h"
+#include "lwip/netif.h"
 #include "lwip/timeouts.h"
 
 // Poll lwIP every 64ms by default
@@ -39,10 +40,12 @@
 // Soft timer for running lwIP in the background.
 static soft_timer_entry_t mp_network_soft_timer;
 
+// Callback for change of netif state
+NETIF_DECLARE_EXT_CALLBACK(netif_callback)
+
 #if MICROPY_PY_NETWORK_CYW43
 #include "lib/cyw43-driver/src/cyw43.h"
 #include "lib/cyw43-driver/src/cyw43_stats.h"
-#include "hardware/irq.h"
 
 #if !defined(__riscv)
 #if PICO_RP2040
@@ -57,18 +60,39 @@ static soft_timer_entry_t mp_network_soft_timer;
 #define CYW43_IRQ_LEVEL GPIO_IRQ_LEVEL_HIGH
 #define CYW43_SHARED_IRQ_HANDLER_PRIORITY PICO_SHARED_IRQ_HANDLER_HIGHEST_ORDER_PRIORITY
 
-volatile int cyw43_has_pending = 0;
 
+// The Pico SDK only lets us set GPIO wake on the current running CPU, but the
+// hardware doesn't have this limit. We need to always enable/disable the pin
+// interrupt on CPU0, regardless of which CPU runs PendSV and
+// cyw43_post_poll_hook(). See feature request at https://github.com/raspberrypi/pico-sdk/issues/2354
+static void gpio_set_cpu0_host_wake_irq_enabled(bool enable) {
+    // This is a re-implementation of gpio_set_irq_enabled() and _gpio_set_irq_enabled()
+    // from the pico-sdk, but with the core, gpio, and event type hardcoded to shrink
+    // code size.
+    io_bank0_irq_ctrl_hw_t *irq_ctrl_base = &io_bank0_hw->proc0_irq_ctrl;
+    uint32_t gpio = CYW43_PIN_WL_HOST_WAKE;
+    uint32_t events = CYW43_IRQ_LEVEL;
+    io_rw_32 *en_reg = &irq_ctrl_base->inte[gpio / 8];
+    events <<= 4 * (gpio % 8);
+    if (enable) {
+        hw_set_bits(en_reg, events);
+    } else {
+        hw_clear_bits(en_reg, events);
+    }
+}
+
+// GPIO IRQ always runs on CPU0
 static void gpio_irq_handler(void) {
     uint32_t events = gpio_get_irq_event_mask(CYW43_PIN_WL_HOST_WAKE);
     if (events & CYW43_IRQ_LEVEL) {
-        // As we use a high level interrupt, it will go off forever until it's serviced.
-        // So disable the interrupt until this is done.  It's re-enabled again by
-        // CYW43_POST_POLL_HOOK which is called at the end of cyw43_poll_func.
-        gpio_set_irq_enabled(CYW43_PIN_WL_HOST_WAKE, CYW43_IRQ_LEVEL, false);
-        cyw43_has_pending = 1;
-        __sev();
+        // As we use a level interrupt (and can't use an edge interrupt
+        // as CYW43_PIN_WL_HOST_WAKE is also a SPI data pin), we need to disable
+        // the interrupt to stop it re-triggering until after PendSV run
+        // cyw43_poll(). It is re-enabled in cyw43_post_poll_hook(), implemented
+        // below.
+        gpio_set_cpu0_host_wake_irq_enabled(false);
         pendsv_schedule_dispatch(PENDSV_DISPATCH_CYW43, cyw43_poll);
+        __sev();
         CYW43_STAT_INC(IRQ_COUNT);
     }
 }
@@ -76,14 +100,11 @@ static void gpio_irq_handler(void) {
 void cyw43_irq_init(void) {
     gpio_add_raw_irq_handler_with_order_priority(CYW43_PIN_WL_HOST_WAKE, gpio_irq_handler, CYW43_SHARED_IRQ_HANDLER_PRIORITY);
     irq_set_enabled(IO_IRQ_BANK0, true);
-    #if !defined(__riscv)
-    NVIC_SetPriority(PendSV_IRQn, IRQ_PRI_PENDSV);
-    #endif
 }
 
+// This hook will run on whichever CPU serviced the PendSV interrupt
 void cyw43_post_poll_hook(void) {
-    cyw43_has_pending = 0;
-    gpio_set_irq_enabled(CYW43_PIN_WL_HOST_WAKE, CYW43_IRQ_LEVEL, true);
+    gpio_set_cpu0_host_wake_irq_enabled(true);
 }
 
 #endif
@@ -120,17 +141,48 @@ static void mp_network_soft_timer_callback(soft_timer_entry_t *self) {
     #if MICROPY_PY_NETWORK_WIZNET5K
     wiznet5k_poll();
     #endif
+
+    // Only keep the timer running if any TCP sockets are active, or any netif is up
+    struct netif *netif;
+    extern void *tcp_active_pcbs;
+    bool keep_running = (tcp_active_pcbs != NULL);
+    if (!keep_running) {
+        NETIF_FOREACH(netif) {
+            if (netif->flags & NETIF_FLAG_LINK_UP) {
+                keep_running = true;
+                break;
+            }
+        }
+    }
+
+    // Periodic timer will re-queue as soon as this handler exits,
+    // one shot timer will not
+    mp_network_soft_timer.mode = keep_running ? SOFT_TIMER_MODE_PERIODIC : SOFT_TIMER_MODE_ONE_SHOT;
 }
 
+static void mp_network_netif_status_cb(struct netif *netif, netif_nsc_reason_t reason, const netif_ext_callback_args_t *args);
+
 void mod_network_lwip_init(void) {
     soft_timer_static_init(
         &mp_network_soft_timer,
-        SOFT_TIMER_MODE_PERIODIC,
+        SOFT_TIMER_MODE_ONE_SHOT,
         LWIP_TICK_RATE_MS,
         mp_network_soft_timer_callback
         );
 
-    soft_timer_reinsert(&mp_network_soft_timer, LWIP_TICK_RATE_MS);
+    if (netif_callback.callback_fn == NULL) {
+        netif_add_ext_callback(&netif_callback, mp_network_netif_status_cb);
+    }
+}
+
+static void mp_network_netif_status_cb(struct netif *netif, netif_nsc_reason_t reason, const netif_ext_callback_args_t *args) {
+    // Start the network soft timer any time an interface comes up, unless
+    // it's already running
+    if (reason == LWIP_NSC_LINK_CHANGED && args->link_changed.state
+        && mp_network_soft_timer.mode == SOFT_TIMER_MODE_ONE_SHOT) {
+        mp_network_soft_timer.mode = SOFT_TIMER_MODE_PERIODIC;
+        soft_timer_reinsert(&mp_network_soft_timer, LWIP_TICK_RATE_MS);
+    }
 }
 
 #endif // MICROPY_PY_LWIP
diff --git a/ports/rp2/mpthreadport.c b/ports/rp2/mpthreadport.c
index 8fd5e5d790277..043a878c89b06 100644
--- a/ports/rp2/mpthreadport.c
+++ b/ports/rp2/mpthreadport.c
@@ -106,6 +106,9 @@ static void core1_entry_wrapper(void) {
     // Allow MICROPY_BEGIN_ATOMIC_SECTION to be invoked from core0.
     multicore_lockout_victim_init();
 
+    // Set PendSV interrupt priority correctly for CPU1
+    pendsv_init();
+
     if (core1_entry) {
         core1_entry(core1_arg);
     }
diff --git a/ports/rp2/pendsv.c b/ports/rp2/pendsv.c
index 4ba1e81604b0f..05b521fde2607 100644
--- a/ports/rp2/pendsv.c
+++ b/ports/rp2/pendsv.c
@@ -28,6 +28,7 @@
 #include "py/mpconfig.h"
 #include "py/mpthread.h"
 #include "pendsv.h"
+#include "hardware/irq.h"
 
 #if PICO_RP2040
 #include "RP2040.h"
@@ -43,14 +44,27 @@
 
 static pendsv_dispatch_t pendsv_dispatch_table[PENDSV_DISPATCH_NUM_SLOTS];
 
+static inline void pendsv_resume_run_dispatch(void);
+
+// PendSV IRQ priority, to run system-level tasks that preempt the main thread.
+#define IRQ_PRI_PENDSV PICO_LOWEST_IRQ_PRIORITY
+
 void PendSV_Handler(void);
 
-// Using the nowait variant here as softtimer updates PendSV from the loop of mp_wfe_or_timeout(),
-// where we don't want the CPU event bit to be set.
+#if MICROPY_PY_THREAD
+
+// Important to use a 'nowait' mutex here as softtimer updates PendSV from the
+// loop of mp_wfe_or_timeout(), where we don't want the CPU event bit to be set.
 static mp_thread_recursive_mutex_t pendsv_mutex;
 
+// Called from CPU0 during boot, but may be called later when CPU1 wakes up
 void pendsv_init(void) {
-    mp_thread_recursive_mutex_init(&pendsv_mutex);
+    if (get_core_num() == 0) {
+        mp_thread_recursive_mutex_init(&pendsv_mutex);
+    }
+    #if !defined(__riscv)
+    NVIC_SetPriority(PendSV_IRQn, IRQ_PRI_PENDSV);
+    #endif
 }
 
 void pendsv_suspend(void) {
@@ -62,7 +76,44 @@ void pendsv_suspend(void) {
 
 void pendsv_resume(void) {
     mp_thread_recursive_mutex_unlock(&pendsv_mutex);
+    pendsv_resume_run_dispatch();
+}
+
+static inline int pendsv_suspend_count(void) {
+    return pendsv_mutex.mutex.enter_count;
+}
+
+#else
 
+// Without threads we don't include any pico-sdk mutex in the build,
+// but also we don't need to worry about cross-thread contention (or
+// races with interrupts that update this counter).
+static int pendsv_lock;
+
+void pendsv_init(void) {
+}
+
+void pendsv_suspend(void) {
+    pendsv_lock++;
+}
+
+void pendsv_resume(void) {
+    assert(pendsv_lock > 0);
+    pendsv_lock--;
+    pendsv_resume_run_dispatch();
+}
+
+static inline int pendsv_suspend_count(void) {
+    return pendsv_lock;
+}
+
+#endif
+
+bool pendsv_is_pending(size_t slot) {
+    return pendsv_dispatch_table[slot] != NULL;
+}
+
+static inline void pendsv_resume_run_dispatch(void) {
     // Run pendsv if needed.  Find an entry with a dispatch and call pendsv dispatch
     // with it.  If pendsv runs it will service all slots.
     int count = PENDSV_DISPATCH_NUM_SLOTS;
@@ -76,11 +127,13 @@ void pendsv_resume(void) {
 
 void pendsv_schedule_dispatch(size_t slot, pendsv_dispatch_t f) {
     pendsv_dispatch_table[slot] = f;
-    if (pendsv_mutex.mutex.enter_count == 0) {
+    // There is a race here where other core calls pendsv_suspend() before ISR
+    // can execute so this check fails, but dispatch will happen later when
+    // other core calls pendsv_resume().
+    if (pendsv_suspend_count() == 0) {
         #if PICO_ARM
-        // There is a race here where other core calls pendsv_suspend() before
-        // ISR can execute, but dispatch will happen later when other core
-        // calls pendsv_resume().
+        // Note this register is part of each CPU core, so setting it on CPUx
+        // will set the IRQ and run PendSV_Handler on CPUx only.
         SCB->ICSR = SCB_ICSR_PENDSVSET_Msk;
         #elif PICO_RISCV
         struct timespec ts;
@@ -95,15 +148,23 @@ void pendsv_schedule_dispatch(size_t slot, pendsv_dispatch_t f) {
 }
 
 // PendSV interrupt handler to perform background processing.
+//
+// Handler can execute on either CPU if MICROPY_PY_THREAD is set (no code on
+// CPU1 calls pendsv_schedule_dispatch(), but CPU1 can call pendsv_resume()
+// which will trigger it).
 void PendSV_Handler(void) {
 
+    #if MICROPY_PY_THREAD
     if (!mp_thread_recursive_mutex_lock(&pendsv_mutex, 0)) {
-        // Failure here means core 1 holds pendsv_mutex. ISR will
-        // run again after core 1 calls pendsv_resume().
+        // Failure here means other core holds pendsv_mutex. ISR will
+        // run again after that core calls pendsv_resume().
         return;
     }
-    // Core 0 should not already have locked pendsv_mutex
+    // This core should not already have locked pendsv_mutex
     assert(pendsv_mutex.mutex.enter_count == 1);
+    #else
+    assert(pendsv_suspend_count() == 0);
+    #endif
 
     #if MICROPY_PY_NETWORK_CYW43
     CYW43_STAT_INC(PENDSV_RUN_COUNT);
@@ -117,5 +178,7 @@ void PendSV_Handler(void) {
         }
     }
 
+    #if MICROPY_PY_THREAD
     mp_thread_recursive_mutex_unlock(&pendsv_mutex);
+    #endif
 }
diff --git a/ports/rp2/pendsv.h b/ports/rp2/pendsv.h
index a5d9440211a10..de89f0473e7fa 100644
--- a/ports/rp2/pendsv.h
+++ b/ports/rp2/pendsv.h
@@ -42,14 +42,12 @@ enum {
 
 #define PENDSV_DISPATCH_NUM_SLOTS PENDSV_DISPATCH_MAX
 
-// PendSV IRQ priority, to run system-level tasks that preempt the main thread.
-#define IRQ_PRI_PENDSV PICO_LOWEST_IRQ_PRIORITY
-
 typedef void (*pendsv_dispatch_t)(void);
 
 void pendsv_init(void);
 void pendsv_suspend(void);
 void pendsv_resume(void);
 void pendsv_schedule_dispatch(size_t slot, pendsv_dispatch_t f);
+bool pendsv_is_pending(size_t slot);
 
 #endif // MICROPY_INCLUDED_RP2_PENDSV_H
diff --git a/ports/rp2/rp2_dma.c b/ports/rp2/rp2_dma.c
index 78f69e6452758..94c61e226e695 100644
--- a/ports/rp2/rp2_dma.c
+++ b/ports/rp2/rp2_dma.c
@@ -315,7 +315,7 @@ static mp_obj_t rp2_dma_pack_ctrl(size_t n_pos_args, const mp_obj_t *pos_args, m
     // Pack keyword settings into a control register value, using either the default for this
     // DMA channel or the provided defaults
     rp2_dma_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]);
-    mp_uint_t value = DEFAULT_DMA_CONFIG | ((self->channel & 0xf) << 11);
+    mp_uint_t value = DEFAULT_DMA_CONFIG | ((self->channel & 0xf) << DMA_CH0_CTRL_TRIG_CHAIN_TO_LSB);
 
     if (n_pos_args > 1) {
         mp_raise_TypeError(MP_ERROR_TEXT("pack_ctrl only takes keyword arguments"));
diff --git a/ports/rp2/rp2_flash.c b/ports/rp2/rp2_flash.c
index a487fb1633b21..a9beabf051c2d 100644
--- a/ports/rp2/rp2_flash.c
+++ b/ports/rp2/rp2_flash.c
@@ -28,22 +28,34 @@
 
 #include "py/mphal.h"
 #include "py/runtime.h"
+#include "py/mperrno.h"
 #include "extmod/vfs.h"
 #include "modrp2.h"
 #include "hardware/flash.h"
 #include "pico/binary_info.h"
+#include "rp2_psram.h"
+#ifdef PICO_RP2350
+#include "hardware/structs/ioqspi.h"
+#include "hardware/structs/qmi.h"
+#else
+#include "hardware/structs/ssi.h"
+#endif
 
 #define BLOCK_SIZE_BYTES (FLASH_SECTOR_SIZE)
 
-#ifndef MICROPY_HW_FLASH_STORAGE_BYTES
-#define MICROPY_HW_FLASH_STORAGE_BYTES (1408 * 1024)
-#endif
+// Size of buffer for flash writes from PSRAM, since they are mutually exclusive
+#define COPY_BUFFER_SIZE_BYTES (FLASH_PAGE_SIZE)
+
+static_assert(MICROPY_HW_ROMFS_BYTES % 4096 == 0, "ROMFS size must be a multiple of 4K");
 static_assert(MICROPY_HW_FLASH_STORAGE_BYTES % 4096 == 0, "Flash storage size must be a multiple of 4K");
 
 #ifndef MICROPY_HW_FLASH_STORAGE_BASE
 #define MICROPY_HW_FLASH_STORAGE_BASE (PICO_FLASH_SIZE_BYTES - MICROPY_HW_FLASH_STORAGE_BYTES)
 #endif
 
+// Put ROMFS at the upper end of the code space.
+#define MICROPY_HW_ROMFS_BASE (MICROPY_HW_FLASH_STORAGE_BASE - MICROPY_HW_ROMFS_BYTES)
+
 static_assert(MICROPY_HW_FLASH_STORAGE_BYTES <= PICO_FLASH_SIZE_BYTES, "MICROPY_HW_FLASH_STORAGE_BYTES too big");
 static_assert(MICROPY_HW_FLASH_STORAGE_BASE + MICROPY_HW_FLASH_STORAGE_BYTES <= PICO_FLASH_SIZE_BYTES, "MICROPY_HW_FLASH_STORAGE_BYTES too big");
 
@@ -53,6 +65,14 @@ typedef struct _rp2_flash_obj_t {
     uint32_t flash_size;
 } rp2_flash_obj_t;
 
+#if MICROPY_HW_ROMFS_BYTES > 0
+static rp2_flash_obj_t rp2_flash_romfs_obj = {
+    .base = { &rp2_flash_type },
+    .flash_base = MICROPY_HW_ROMFS_BASE,
+    .flash_size = MICROPY_HW_ROMFS_BYTES,
+};
+#endif
+
 static rp2_flash_obj_t rp2_flash_obj = {
     .base = { &rp2_flash_type },
     .flash_base = MICROPY_HW_FLASH_STORAGE_BASE,
@@ -80,16 +100,76 @@ static bool use_multicore_lockout(void) {
     ;
 }
 
+// Function to set the flash divisor to the correct divisor, assumes interrupts disabled
+// and core1 locked out if relevant.
+static void __no_inline_not_in_flash_func(rp2_flash_set_timing_internal)(int clock_hz) {
+
+    // Use the minimum divisor assuming a 133MHz flash.
+    const int max_flash_freq = 133000000;
+    int divisor = (clock_hz + max_flash_freq - 1) / max_flash_freq;
+
+    #if PICO_RP2350
+    // Make sure flash is deselected - QMI doesn't appear to have a busy flag(!)
+    while ((ioqspi_hw->io[1].status & IO_QSPI_GPIO_QSPI_SS_STATUS_OUTTOPAD_BITS) != IO_QSPI_GPIO_QSPI_SS_STATUS_OUTTOPAD_BITS) {
+        ;
+    }
+
+    // RX delay equal to the divisor means sampling at the same time as the next falling edge of SCK after the
+    // falling edge that generated the data.  This is pretty tight at 133MHz but seems to work with the Winbond flash chips.
+    const int rxdelay = divisor;
+    qmi_hw->m[0].timing = (1 << QMI_M0_TIMING_COOLDOWN_LSB) |
+        rxdelay << QMI_M1_TIMING_RXDELAY_LSB |
+        divisor << QMI_M1_TIMING_CLKDIV_LSB;
+
+    // Force a read through XIP to ensure the timing is applied
+    volatile uint32_t *ptr = (volatile uint32_t *)0x14000000;
+    (void)*ptr;
+    #else
+    // RP2040 SSI hardware only supports even divisors
+    if (divisor & 1) {
+        divisor += 1;
+    }
+
+    // Wait for SSI not busy
+    while (ssi_hw->sr & SSI_SR_BUSY_BITS) {
+        ;
+    }
+
+    // Disable, set the new divisor, and re-enable
+    hw_clear_bits(&ssi_hw->ssienr, SSI_SSIENR_SSI_EN_BITS);
+    ssi_hw->baudr = divisor;
+    hw_set_bits(&ssi_hw->ssienr, SSI_SSIENR_SSI_EN_BITS);
+    #endif
+}
+
 // Flash erase and write must run with interrupts disabled and the other core suspended,
 // because the XIP bit gets disabled.
 static uint32_t begin_critical_flash_section(void) {
     if (use_multicore_lockout()) {
         multicore_lockout_start_blocking();
     }
-    return save_and_disable_interrupts();
+    uint32_t state = save_and_disable_interrupts();
+
+    #if MICROPY_HW_ENABLE_PSRAM
+    // We're about to invalidate the XIP cache, clean it first to commit any dirty writes to PSRAM
+    // Use the upper 16k of the maintenance space (0x1bffc000 through 0x1bffffff) to workaround
+    // incorrect behaviour of the XIP clean operation, where it also alters the tag of the associated
+    // cache line: https://forums.raspberrypi.com/viewtopic.php?t=378249#p2263677
+    volatile uint8_t *maintenance_ptr = (volatile uint8_t *)(XIP_SRAM_BASE + (XIP_MAINTENANCE_BASE - XIP_BASE));
+    for (int i = 1; i < 16 * 1024; i += 8) {
+        maintenance_ptr[i] = 0;
+    }
+    #endif
+
+    return state;
 }
 
 static void end_critical_flash_section(uint32_t state) {
+    // The ROM function to program flash will have reset flash and PSRAM timings to defaults
+    rp2_flash_set_timing_internal(clock_get_hz(clk_sys));
+    #if MICROPY_HW_ENABLE_PSRAM
+    psram_init(MICROPY_HW_PSRAM_CS_PIN);
+    #endif
     restore_interrupts(state);
     if (use_multicore_lockout()) {
         multicore_lockout_end_blocking();
@@ -138,6 +218,19 @@ static mp_obj_t rp2_flash_make_new(const mp_obj_type_t *type, size_t n_args, siz
     return MP_OBJ_FROM_PTR(self);
 }
 
+static mp_int_t rp2_flash_get_buffer(mp_obj_t self_in, mp_buffer_info_t *bufinfo, mp_uint_t flags) {
+    rp2_flash_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    if (flags == MP_BUFFER_READ) {
+        bufinfo->buf = (void *)(XIP_BASE + self->flash_base);
+        bufinfo->len = self->flash_size;
+        bufinfo->typecode = 'B';
+        return 0;
+    } else {
+        // Write unsupported.
+        return 1;
+    }
+}
+
 static mp_obj_t rp2_flash_readblocks(size_t n_args, const mp_obj_t *args) {
     rp2_flash_obj_t *self = MP_OBJ_TO_PTR(args[0]);
     uint32_t offset = mp_obj_get_int(args[1]) * BLOCK_SIZE_BYTES;
@@ -169,10 +262,43 @@ static mp_obj_t rp2_flash_writeblocks(size_t n_args, const mp_obj_t *args) {
     } else {
         offset += mp_obj_get_int(args[3]);
     }
-    mp_uint_t atomic_state = begin_critical_flash_section();
-    flash_range_program(self->flash_base + offset, bufinfo.buf, bufinfo.len);
-    end_critical_flash_section(atomic_state);
-    mp_event_handle_nowait();
+
+    // If copying from SRAM, can write direct to flash.
+    // If copying from PSRAM/flash, use an SRAM buffer and write in chunks.
+    #if MICROPY_HW_ENABLE_PSRAM
+    bool write_direct = (uintptr_t)bufinfo.buf >= SRAM_BASE;
+    #else
+    bool write_direct = true;
+    #endif
+
+    if (write_direct) {
+        // If copying from SRAM, write direct
+        mp_uint_t atomic_state = begin_critical_flash_section();
+        flash_range_program(self->flash_base + offset, bufinfo.buf, bufinfo.len);
+        end_critical_flash_section(atomic_state);
+        mp_event_handle_nowait();
+    }
+    #if MICROPY_HW_ENABLE_PSRAM
+    else {
+        size_t bytes_left = bufinfo.len;
+        size_t bytes_offset = 0;
+        static uint8_t copy_buffer[COPY_BUFFER_SIZE_BYTES] = {0};
+
+        while (bytes_left) {
+            memcpy(copy_buffer, bufinfo.buf + bytes_offset, MIN(bytes_left, COPY_BUFFER_SIZE_BYTES));
+            mp_uint_t atomic_state = begin_critical_flash_section();
+            flash_range_program(self->flash_base + offset + bytes_offset, copy_buffer, MIN(bytes_left, COPY_BUFFER_SIZE_BYTES));
+            end_critical_flash_section(atomic_state);
+            bytes_offset += COPY_BUFFER_SIZE_BYTES;
+            if (bytes_left <= COPY_BUFFER_SIZE_BYTES) {
+                break;
+            }
+            bytes_left -= COPY_BUFFER_SIZE_BYTES;
+            mp_event_handle_nowait();
+        }
+    }
+    #endif
+
     // TODO check return value
     return mp_const_none;
 }
@@ -218,5 +344,41 @@ MP_DEFINE_CONST_OBJ_TYPE(
     MP_QSTR_Flash,
     MP_TYPE_FLAG_NONE,
     make_new, rp2_flash_make_new,
+    buffer, rp2_flash_get_buffer,
     locals_dict, &rp2_flash_locals_dict
     );
+
+#if MICROPY_VFS_ROM_IOCTL
+mp_obj_t mp_vfs_rom_ioctl(size_t n_args, const mp_obj_t *args) {
+    switch (mp_obj_get_int(args[0])) {
+        #if MICROPY_HW_ROMFS_BYTES > 0
+        case MP_VFS_ROM_IOCTL_GET_NUMBER_OF_SEGMENTS:
+            return MP_OBJ_NEW_SMALL_INT(1);
+        case MP_VFS_ROM_IOCTL_GET_SEGMENT:
+            return MP_OBJ_FROM_PTR(&rp2_flash_romfs_obj);
+        #endif
+        default:
+            return MP_OBJ_NEW_SMALL_INT(-MP_EINVAL);
+    }
+}
+#endif
+
+// Modify the flash timing.  Ensure flash access is suspended while
+// the timings are altered.
+void rp2_flash_set_timing_for_freq(int clock_hz) {
+    if (multicore_lockout_victim_is_initialized(1 - get_core_num())) {
+        multicore_lockout_start_blocking();
+    }
+    uint32_t state = save_and_disable_interrupts();
+
+    rp2_flash_set_timing_internal(clock_hz);
+
+    restore_interrupts(state);
+    if (multicore_lockout_victim_is_initialized(1 - get_core_num())) {
+        multicore_lockout_end_blocking();
+    }
+}
+
+void rp2_flash_set_timing(void) {
+    rp2_flash_set_timing_for_freq(clock_get_hz(clk_sys));
+}
diff --git a/ports/rp2/rp2_flash.h b/ports/rp2/rp2_flash.h
new file mode 100644
index 0000000000000..3c1fbbff2f9cd
--- /dev/null
+++ b/ports/rp2/rp2_flash.h
@@ -0,0 +1,34 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2025 Mike Bell
+ *                    Phil Howard
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef MICROPY_INCLUDED_RP2_RP2_FLASH_H
+#define MICROPY_INCLUDED_RP2_RP2_FLASH_H
+
+extern void rp2_flash_set_timing_for_freq(int clock_hz);
+extern void rp2_flash_set_timing(void);
+
+#endif
diff --git a/ports/rp2/rp2_pio.c b/ports/rp2/rp2_pio.c
index 56c576581e0df..d936553b55573 100644
--- a/ports/rp2/rp2_pio.c
+++ b/ports/rp2/rp2_pio.c
@@ -126,7 +126,7 @@ void rp2_pio_irq_set_exclusive_handler(PIO pio, uint irq) {
     irq_handler_t current = irq_get_exclusive_handler(irq);
     // If the IRQ is set and isn't our handler, or a shared handler is set, then raise an error
     if ((current && current != rp2_pio_get_irq_handler(pio)) || irq_has_shared_handler(irq)) {
-        mp_raise_ValueError("irq claimed by external resource");
+        mp_raise_ValueError(MP_ERROR_TEXT("irq claimed by external resource"));
         // If the IRQ is not set, add our handler
     } else if (!current) {
         irq_set_exclusive_handler(irq, rp2_pio_get_irq_handler(pio));
@@ -304,7 +304,7 @@ static mp_obj_t rp2_pio_make_new(const mp_obj_type_t *type, size_t n_args, size_
     // Get the PIO object.
     int pio_id = mp_obj_get_int(args[0]);
     if (!(0 <= pio_id && pio_id < MP_ARRAY_SIZE(rp2_pio_obj))) {
-        mp_raise_ValueError("invalid PIO");
+        mp_raise_ValueError(MP_ERROR_TEXT("invalid PIO"));
     }
     const rp2_pio_obj_t *self = &rp2_pio_obj[pio_id];
 
@@ -353,7 +353,7 @@ static mp_obj_t rp2_pio_remove_program(size_t n_args, const mp_obj_t *args) {
         length = bufinfo.len / 2;
         offset = mp_obj_get_int(prog[PROG_OFFSET_PIO0 + pio_get_index(self->pio)]);
         if (offset < 0) {
-            mp_raise_ValueError("prog not in instruction memory");
+            mp_raise_ValueError(MP_ERROR_TEXT("prog not in instruction memory"));
         }
         // Invalidate the program offset in the program object.
         prog[PROG_OFFSET_PIO0 + pio_get_index(self->pio)] = MP_OBJ_NEW_SMALL_INT(-1);
@@ -374,7 +374,7 @@ static mp_obj_t rp2_pio_state_machine(size_t n_args, const mp_obj_t *pos_args, m
     // Get and verify the state machine id.
     mp_int_t sm_id = mp_obj_get_int(pos_args[1]);
     if (!(0 <= sm_id && sm_id < 4)) {
-        mp_raise_ValueError("invalid StateMachine");
+        mp_raise_ValueError(MP_ERROR_TEXT("invalid StateMachine"));
     }
 
     // Return the correct StateMachine object.
@@ -400,7 +400,7 @@ static mp_obj_t rp2_pio_gpio_base(size_t n_args, const mp_obj_t *args) {
 
         // Must be 0 for GPIOs 0 to 31 inclusive, or 16 for GPIOs 16 to 48 inclusive.
         if (!(gpio_base == 0 || gpio_base == 16)) {
-            mp_raise_ValueError("invalid GPIO base");
+            mp_raise_ValueError(MP_ERROR_TEXT("invalid GPIO base"));
         }
 
         if (pio_set_gpio_base(self->pio, gpio_base) != PICO_OK) {
@@ -556,14 +556,14 @@ static const rp2_state_machine_obj_t rp2_state_machine_obj[] = {
 
 static const rp2_state_machine_obj_t *rp2_state_machine_get_object(mp_int_t sm_id) {
     if (!(0 <= sm_id && sm_id < MP_ARRAY_SIZE(rp2_state_machine_obj))) {
-        mp_raise_ValueError("invalid StateMachine");
+        mp_raise_ValueError(MP_ERROR_TEXT("invalid StateMachine"));
     }
 
     const rp2_state_machine_obj_t *sm_obj = &rp2_state_machine_obj[sm_id];
 
     if (!(rp2_state_machine_claimed_mask & (1 << sm_id))) {
         if (pio_sm_is_claimed(sm_obj->pio, sm_obj->sm)) {
-            mp_raise_ValueError("StateMachine claimed by external resource");
+            mp_raise_ValueError(MP_ERROR_TEXT("StateMachine claimed by external resource"));
         }
         pio_sm_claim(sm_obj->pio, sm_obj->sm);
         rp2_state_machine_claimed_mask |= 1 << sm_id;
@@ -830,7 +830,7 @@ static mp_obj_t rp2_state_machine_get(size_t n_args, const mp_obj_t *args) {
             *(uint32_t *)dest = value;
             dest += sizeof(uint32_t);
         } else {
-            mp_raise_ValueError("unsupported buffer type");
+            mp_raise_ValueError(MP_ERROR_TEXT("unsupported buffer type"));
         }
         if (dest >= dest_top) {
             return args[1];
@@ -868,7 +868,7 @@ static mp_obj_t rp2_state_machine_put(size_t n_args, const mp_obj_t *args) {
             value = *(uint32_t *)src;
             src += sizeof(uint32_t);
         } else {
-            mp_raise_ValueError("unsupported buffer type");
+            mp_raise_ValueError(MP_ERROR_TEXT("unsupported buffer type"));
         }
         while (pio_sm_is_tx_fifo_full(self->pio, self->sm)) {
             // This delay must be fast.
diff --git a/ports/rp2/rp2_psram.c b/ports/rp2/rp2_psram.c
new file mode 100644
index 0000000000000..bb063f4af7a06
--- /dev/null
+++ b/ports/rp2/rp2_psram.c
@@ -0,0 +1,198 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2025 Phil Howard
+ *                    Mike Bell
+ *                    Kirk D. Benell
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "py/mphal.h"
+
+#if MICROPY_HW_ENABLE_PSRAM
+
+#include "hardware/structs/ioqspi.h"
+#include "hardware/structs/qmi.h"
+#include "hardware/structs/xip_ctrl.h"
+#include "hardware/clocks.h"
+#include "hardware/sync.h"
+#include "rp2_psram.h"
+
+size_t __no_inline_not_in_flash_func(psram_detect)(void) {
+    int psram_size = 0;
+
+    // Try and read the PSRAM ID via direct_csr.
+    qmi_hw->direct_csr = 30 << QMI_DIRECT_CSR_CLKDIV_LSB | QMI_DIRECT_CSR_EN_BITS;
+
+    // Need to poll for the cooldown on the last XIP transfer to expire
+    // (via direct-mode BUSY flag) before it is safe to perform the first
+    // direct-mode operation
+    while ((qmi_hw->direct_csr & QMI_DIRECT_CSR_BUSY_BITS) != 0) {
+    }
+
+    // Exit out of QMI in case we've inited already
+    qmi_hw->direct_csr |= QMI_DIRECT_CSR_ASSERT_CS1N_BITS;
+
+    // Transmit as quad.
+    qmi_hw->direct_tx = QMI_DIRECT_TX_OE_BITS | QMI_DIRECT_TX_IWIDTH_VALUE_Q << QMI_DIRECT_TX_IWIDTH_LSB | 0xf5;
+
+    while ((qmi_hw->direct_csr & QMI_DIRECT_CSR_BUSY_BITS) != 0) {
+    }
+
+    (void)qmi_hw->direct_rx;
+
+    qmi_hw->direct_csr &= ~(QMI_DIRECT_CSR_ASSERT_CS1N_BITS);
+
+    // Read the id
+    qmi_hw->direct_csr |= QMI_DIRECT_CSR_ASSERT_CS1N_BITS;
+    uint8_t kgd = 0;
+    uint8_t eid = 0;
+
+    for (size_t i = 0; i < 7; i++) {
+        if (i == 0) {
+            qmi_hw->direct_tx = 0x9f;
+        } else {
+            qmi_hw->direct_tx = 0xff;
+        }
+
+        while ((qmi_hw->direct_csr & QMI_DIRECT_CSR_TXEMPTY_BITS) == 0) {
+        }
+
+        while ((qmi_hw->direct_csr & QMI_DIRECT_CSR_BUSY_BITS) != 0) {
+        }
+
+        if (i == 5) {
+            kgd = qmi_hw->direct_rx;
+        } else if (i == 6) {
+            eid = qmi_hw->direct_rx;
+        } else {
+            (void)qmi_hw->direct_rx;
+        }
+    }
+
+    // Disable direct csr.
+    qmi_hw->direct_csr &= ~(QMI_DIRECT_CSR_ASSERT_CS1N_BITS | QMI_DIRECT_CSR_EN_BITS);
+
+    if (kgd == 0x5D) {
+        psram_size = 1024 * 1024; // 1 MiB
+        uint8_t size_id = eid >> 5;
+        if (eid == 0x26 || size_id == 2) {
+            psram_size *= 8; // 8 MiB
+        } else if (size_id == 0) {
+            psram_size *= 2; // 2 MiB
+        } else if (size_id == 1) {
+            psram_size *= 4; // 4 MiB
+        }
+    }
+
+    return psram_size;
+}
+
+size_t __no_inline_not_in_flash_func(psram_init)(uint cs_pin) {
+    gpio_set_function(cs_pin, GPIO_FUNC_XIP_CS1);
+
+    uint32_t intr_stash = save_and_disable_interrupts();
+
+    size_t psram_size = psram_detect();
+
+    if (!psram_size) {
+        restore_interrupts(intr_stash);
+        return 0;
+    }
+
+    // Enable direct mode, PSRAM CS, clkdiv of 10.
+    qmi_hw->direct_csr = 10 << QMI_DIRECT_CSR_CLKDIV_LSB | \
+        QMI_DIRECT_CSR_EN_BITS | \
+        QMI_DIRECT_CSR_AUTO_CS1N_BITS;
+    while (qmi_hw->direct_csr & QMI_DIRECT_CSR_BUSY_BITS) {
+    }
+
+    // Enable QPI mode on the PSRAM
+    const uint CMD_QPI_EN = 0x35;
+    qmi_hw->direct_tx = QMI_DIRECT_TX_NOPUSH_BITS | CMD_QPI_EN;
+
+    while (qmi_hw->direct_csr & QMI_DIRECT_CSR_BUSY_BITS) {
+    }
+
+    // Set PSRAM timing for APS6404
+    //
+    // Using an rxdelay equal to the divisor isn't enough when running the APS6404 close to 133MHz.
+    // So: don't allow running at divisor 1 above 100MHz (because delay of 2 would be too late),
+    // and add an extra 1 to the rxdelay if the divided clock is > 100MHz (i.e. sys clock > 200MHz).
+    const int max_psram_freq = 133000000;
+    const int clock_hz = clock_get_hz(clk_sys);
+    int divisor = (clock_hz + max_psram_freq - 1) / max_psram_freq;
+    if (divisor == 1 && clock_hz > 100000000) {
+        divisor = 2;
+    }
+    int rxdelay = divisor;
+    if (clock_hz / divisor > 100000000) {
+        rxdelay += 1;
+    }
+
+    // - Max select must be <= 8us.  The value is given in multiples of 64 system clocks.
+    // - Min deselect must be >= 18ns.  The value is given in system clock cycles - ceil(divisor / 2).
+    const int clock_period_fs = 1000000000000000ll / clock_hz;
+    const int max_select = (125 * 1000000) / clock_period_fs;  // 125 = 8000ns / 64
+    const int min_deselect = (18 * 1000000 + (clock_period_fs - 1)) / clock_period_fs - (divisor + 1) / 2;
+
+    qmi_hw->m[1].timing = 1 << QMI_M1_TIMING_COOLDOWN_LSB |
+        QMI_M1_TIMING_PAGEBREAK_VALUE_1024 << QMI_M1_TIMING_PAGEBREAK_LSB |
+        max_select << QMI_M1_TIMING_MAX_SELECT_LSB |
+        min_deselect << QMI_M1_TIMING_MIN_DESELECT_LSB |
+        rxdelay << QMI_M1_TIMING_RXDELAY_LSB |
+        divisor << QMI_M1_TIMING_CLKDIV_LSB;
+
+    // Set PSRAM commands and formats
+    qmi_hw->m[1].rfmt =
+        QMI_M0_RFMT_PREFIX_WIDTH_VALUE_Q << QMI_M0_RFMT_PREFIX_WIDTH_LSB | \
+            QMI_M0_RFMT_ADDR_WIDTH_VALUE_Q << QMI_M0_RFMT_ADDR_WIDTH_LSB | \
+            QMI_M0_RFMT_SUFFIX_WIDTH_VALUE_Q << QMI_M0_RFMT_SUFFIX_WIDTH_LSB | \
+            QMI_M0_RFMT_DUMMY_WIDTH_VALUE_Q << QMI_M0_RFMT_DUMMY_WIDTH_LSB | \
+            QMI_M0_RFMT_DATA_WIDTH_VALUE_Q << QMI_M0_RFMT_DATA_WIDTH_LSB | \
+            QMI_M0_RFMT_PREFIX_LEN_VALUE_8 << QMI_M0_RFMT_PREFIX_LEN_LSB | \
+            6 << QMI_M0_RFMT_DUMMY_LEN_LSB;
+
+    qmi_hw->m[1].rcmd = 0xEB;
+
+    qmi_hw->m[1].wfmt =
+        QMI_M0_WFMT_PREFIX_WIDTH_VALUE_Q << QMI_M0_WFMT_PREFIX_WIDTH_LSB | \
+            QMI_M0_WFMT_ADDR_WIDTH_VALUE_Q << QMI_M0_WFMT_ADDR_WIDTH_LSB | \
+            QMI_M0_WFMT_SUFFIX_WIDTH_VALUE_Q << QMI_M0_WFMT_SUFFIX_WIDTH_LSB | \
+            QMI_M0_WFMT_DUMMY_WIDTH_VALUE_Q << QMI_M0_WFMT_DUMMY_WIDTH_LSB | \
+            QMI_M0_WFMT_DATA_WIDTH_VALUE_Q << QMI_M0_WFMT_DATA_WIDTH_LSB | \
+            QMI_M0_WFMT_PREFIX_LEN_VALUE_8 << QMI_M0_WFMT_PREFIX_LEN_LSB;
+
+    qmi_hw->m[1].wcmd = 0x38;
+
+    // Disable direct mode
+    qmi_hw->direct_csr = 0;
+
+    // Enable writes to PSRAM
+    hw_set_bits(&xip_ctrl_hw->ctrl, XIP_CTRL_WRITABLE_M1_BITS);
+
+    restore_interrupts(intr_stash);
+
+    return psram_size;
+}
+
+#endif
diff --git a/ports/rp2/rp2_psram.h b/ports/rp2/rp2_psram.h
new file mode 100644
index 0000000000000..0eddf6341592b
--- /dev/null
+++ b/ports/rp2/rp2_psram.h
@@ -0,0 +1,44 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2025 Phil Howard
+ *                    Mike Bell
+ *                    Kirk D. Benell
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "pico/stdlib.h"
+
+#ifndef MICROPY_INCLUDED_RP2_RP2_PSRAM_H
+#define MICROPY_INCLUDED_RP2_RP2_PSRAM_H
+
+#if MICROPY_HW_ENABLE_PSRAM
+#ifndef MICROPY_HW_PSRAM_CS_PIN
+#error "MICROPY_HW_ENABLE_PSRAM requires MICROPY_HW_PSRAM_CS_PIN"
+#endif
+
+#define PSRAM_BASE _u(0x11000000)
+
+extern size_t psram_init(uint cs_pin);
+#endif
+
+#endif
diff --git a/ports/rp2/tools_patch/Findpioasm.cmake b/ports/rp2/tools_patch/Findpioasm.cmake
new file mode 100644
index 0000000000000..72e6bf6fb61c0
--- /dev/null
+++ b/ports/rp2/tools_patch/Findpioasm.cmake
@@ -0,0 +1,58 @@
+# Finds (or builds) the pioasm executable
+#
+# This will define the following imported targets
+#
+#     pioasm
+#
+
+# This is a temporary patched copy of pico-sdk file Findpioasm.cmake to work around
+# a host toolchain issue with GCC 15.1:
+# https://github.com/raspberrypi/pico-sdk/issues/2448
+
+if (NOT TARGET pioasm)
+    # todo we would like to use pckgconfig to look for it first
+    # see https://pabloariasal.github.io/2018/02/19/its-time-to-do-cmake-right/
+
+    include(ExternalProject)
+
+    set(PIOASM_SOURCE_DIR ${PICO_SDK_PATH}/tools/pioasm)
+    set(PIOASM_BINARY_DIR ${CMAKE_BINARY_DIR}/pioasm)
+    set(PIOASM_INSTALL_DIR ${CMAKE_BINARY_DIR}/pioasm-install CACHE PATH "Directory where pioasm has been installed" FORCE)
+
+    set(pioasmBuild_TARGET pioasmBuild)
+    set(pioasm_TARGET pioasm)
+
+    if (NOT TARGET ${pioasmBuild_TARGET})
+        pico_message_debug("PIOASM will need to be built")
+#        message("Adding external project ${pioasmBuild_Target} in ${CMAKE_CURRENT_LIST_DIR}}")
+        ExternalProject_Add(${pioasmBuild_TARGET}
+                PREFIX pioasm
+                SOURCE_DIR ${PIOASM_SOURCE_DIR}
+                BINARY_DIR ${PIOASM_BINARY_DIR}
+                INSTALL_DIR ${PIOASM_INSTALL_DIR}
+                CMAKE_ARGS
+                    "--no-warn-unused-cli"
+                    "-DCMAKE_MAKE_PROGRAM:FILEPATH=${CMAKE_MAKE_PROGRAM}"
+                    "-DPIOASM_FLAT_INSTALL=1"
+                    "-DCMAKE_INSTALL_PREFIX=${PIOASM_INSTALL_DIR}"
+                    "-DCMAKE_RULE_MESSAGES=OFF" # quieten the build
+                    "-DCMAKE_INSTALL_MESSAGE=NEVER" # quieten the install
+                    # Toolchain workaround follows
+                    "-DCMAKE_CXX_FLAGS=-include cstdint"
+                CMAKE_CACHE_ARGS "-DPIOASM_EXTRA_SOURCE_FILES:STRING=${PIOASM_EXTRA_SOURCE_FILES}"
+                BUILD_ALWAYS 1 # force dependency checking
+                EXCLUDE_FROM_ALL TRUE
+                )
+    endif()
+
+    if (CMAKE_HOST_WIN32)
+        set(pioasm_EXECUTABLE ${PIOASM_INSTALL_DIR}/pioasm/pioasm.exe)
+    else()
+        set(pioasm_EXECUTABLE ${PIOASM_INSTALL_DIR}/pioasm/pioasm)
+    endif()
+    add_executable(${pioasm_TARGET} IMPORTED GLOBAL)
+    set_property(TARGET ${pioasm_TARGET} PROPERTY IMPORTED_LOCATION
+            ${pioasm_EXECUTABLE})
+
+    add_dependencies(${pioasm_TARGET} ${pioasmBuild_TARGET})
+endif()
diff --git a/ports/samd/Makefile b/ports/samd/Makefile
index 005664f178d3c..bec530d803f7e 100644
--- a/ports/samd/Makefile
+++ b/ports/samd/Makefile
@@ -113,8 +113,6 @@ LIBSTDCPP_FILE_NAME = "$(shell $(CXX) $(CXXFLAGS) -print-file-name=libstdc++.a)"
 LDFLAGS += -L"$(shell dirname $(LIBSTDCPP_FILE_NAME))"
 endif
 
-LDFLAGS += --wrap=dcd_event_handler
-
 MPY_CROSS_FLAGS += -march=$(MPY_CROSS_MCU_ARCH)
 
 SRC_C += \
diff --git a/ports/samd/boards/ADAFRUIT_FEATHER_M0_EXPRESS/mpconfigboard.h b/ports/samd/boards/ADAFRUIT_FEATHER_M0_EXPRESS/mpconfigboard.h
index 880df8d200390..a2df633765443 100644
--- a/ports/samd/boards/ADAFRUIT_FEATHER_M0_EXPRESS/mpconfigboard.h
+++ b/ports/samd/boards/ADAFRUIT_FEATHER_M0_EXPRESS/mpconfigboard.h
@@ -3,5 +3,9 @@
 
 #define MICROPY_HW_XOSC32K  (1)
 
+#define MICROPY_HW_DEFAULT_UART_ID  (2)
+#define MICROPY_HW_DEFAULT_I2C_ID   (3)
+#define MICROPY_HW_DEFAULT_SPI_ID   (4)
+
 #define MICROPY_HW_SPIFLASH (1)
 #define MICROPY_HW_SPIFLASH_ID (2)
diff --git a/ports/samd/boards/ADAFRUIT_FEATHER_M0_EXPRESS/pins.csv b/ports/samd/boards/ADAFRUIT_FEATHER_M0_EXPRESS/pins.csv
index 8993419a268c5..f2676693ec41d 100644
--- a/ports/samd/boards/ADAFRUIT_FEATHER_M0_EXPRESS/pins.csv
+++ b/ports/samd/boards/ADAFRUIT_FEATHER_M0_EXPRESS/pins.csv
@@ -21,8 +21,8 @@ A2,PB09
 A3,PA04
 A4,PA05
 A5,PB02
-TX,PB22
-RX,PB23
+RX,PA11
+TX,PA10
 SCL,PA23
 SDA,PA22
 MOSI,PB10
diff --git a/ports/samd/boards/ADAFRUIT_FEATHER_M4_EXPRESS/mpconfigboard.h b/ports/samd/boards/ADAFRUIT_FEATHER_M4_EXPRESS/mpconfigboard.h
index a9f7d518e2364..f68a26303197c 100644
--- a/ports/samd/boards/ADAFRUIT_FEATHER_M4_EXPRESS/mpconfigboard.h
+++ b/ports/samd/boards/ADAFRUIT_FEATHER_M4_EXPRESS/mpconfigboard.h
@@ -4,4 +4,8 @@
 #define MICROPY_HW_XOSC32K          (1)
 #define MICROPY_HW_MCU_OSC32KULP    (1)
 
+#define MICROPY_HW_DEFAULT_UART_ID  (5)
+#define MICROPY_HW_DEFAULT_I2C_ID   (2)
+#define MICROPY_HW_DEFAULT_SPI_ID   (1)
+
 #define MICROPY_HW_QSPIFLASH        GD25Q16C
diff --git a/ports/samd/boards/ADAFRUIT_FEATHER_M4_EXPRESS/pins.csv b/ports/samd/boards/ADAFRUIT_FEATHER_M4_EXPRESS/pins.csv
index ec7a8bc1638da..056339de1335f 100644
--- a/ports/samd/boards/ADAFRUIT_FEATHER_M4_EXPRESS/pins.csv
+++ b/ports/samd/boards/ADAFRUIT_FEATHER_M4_EXPRESS/pins.csv
@@ -15,6 +15,8 @@ A2,PB08
 A3,PB09
 A4,PA04
 A5,PB06
+RX,PB17
+TX,PB16
 SCL,PA13
 SDA,PA12
 MOSI,PB23
diff --git a/ports/samd/boards/ADAFRUIT_ITSYBITSY_M0_EXPRESS/mpconfigboard.h b/ports/samd/boards/ADAFRUIT_ITSYBITSY_M0_EXPRESS/mpconfigboard.h
index 16018fdc56356..84b75414f5e32 100644
--- a/ports/samd/boards/ADAFRUIT_ITSYBITSY_M0_EXPRESS/mpconfigboard.h
+++ b/ports/samd/boards/ADAFRUIT_ITSYBITSY_M0_EXPRESS/mpconfigboard.h
@@ -3,5 +3,9 @@
 
 #define MICROPY_HW_DFLL_USB_SYNC    (1)
 
+#define MICROPY_HW_DEFAULT_SPI_ID   (4)
+#define MICROPY_HW_DEFAULT_I2C_ID   (3)
+#define MICROPY_HW_DEFAULT_UART_ID  (0)
+
 #define MICROPY_HW_SPIFLASH         (1)
 #define MICROPY_HW_SPIFLASH_ID      (5)
diff --git a/ports/samd/boards/ADAFRUIT_ITSYBITSY_M0_EXPRESS/pins.csv b/ports/samd/boards/ADAFRUIT_ITSYBITSY_M0_EXPRESS/pins.csv
index 845cefb8a972b..250e42d9d04bc 100644
--- a/ports/samd/boards/ADAFRUIT_ITSYBITSY_M0_EXPRESS/pins.csv
+++ b/ports/samd/boards/ADAFRUIT_ITSYBITSY_M0_EXPRESS/pins.csv
@@ -16,6 +16,8 @@ A2,PB09
 A3,PA04
 A4,PA05
 A5,PB02
+RX,PA11
+TX,PA10
 SDA,PA22
 SCL,PA23
 MOSI,PB10
diff --git a/ports/samd/boards/ADAFRUIT_ITSYBITSY_M4_EXPRESS/mpconfigboard.h b/ports/samd/boards/ADAFRUIT_ITSYBITSY_M4_EXPRESS/mpconfigboard.h
index 2f246c60b188c..47eabbd8787b6 100644
--- a/ports/samd/boards/ADAFRUIT_ITSYBITSY_M4_EXPRESS/mpconfigboard.h
+++ b/ports/samd/boards/ADAFRUIT_ITSYBITSY_M4_EXPRESS/mpconfigboard.h
@@ -3,4 +3,8 @@
 
 #define MICROPY_HW_DFLL_USB_SYNC    (1)
 
+#define MICROPY_HW_DEFAULT_SPI_ID   (1)
+#define MICROPY_HW_DEFAULT_I2C_ID   (2)
+#define MICROPY_HW_DEFAULT_UART_ID  (3)
+
 #define MICROPY_HW_QSPIFLASH        GD25Q16C
diff --git a/ports/samd/boards/ADAFRUIT_ITSYBITSY_M4_EXPRESS/pins.csv b/ports/samd/boards/ADAFRUIT_ITSYBITSY_M4_EXPRESS/pins.csv
index c82beccfa2be3..8597815a124d9 100644
--- a/ports/samd/boards/ADAFRUIT_ITSYBITSY_M4_EXPRESS/pins.csv
+++ b/ports/samd/boards/ADAFRUIT_ITSYBITSY_M4_EXPRESS/pins.csv
@@ -16,6 +16,9 @@ A2,PB08
 A3,PB09
 A4,PA04
 A5,PA06
+
+RX,PA16
+TX,PA17
 SDA,PA12
 SCL,PA13
 MOSI,PA00
diff --git a/ports/samd/boards/ADAFRUIT_METRO_M4_EXPRESS/mpconfigboard.h b/ports/samd/boards/ADAFRUIT_METRO_M4_EXPRESS/mpconfigboard.h
index 7893cd706ac1a..0a2a1c2debe0b 100644
--- a/ports/samd/boards/ADAFRUIT_METRO_M4_EXPRESS/mpconfigboard.h
+++ b/ports/samd/boards/ADAFRUIT_METRO_M4_EXPRESS/mpconfigboard.h
@@ -4,6 +4,10 @@
 #define MICROPY_HW_XOSC32K                  (1)
 #define MICROPY_HW_QSPIFLASH                GD25Q16C
 
+#define MICROPY_HW_DEFAULT_UART_ID          (3)
+#define MICROPY_HW_DEFAULT_I2C_ID           (5)
+#define MICROPY_HW_DEFAULT_SPI_ID           (2)
+
 // defines for WLAN
 #define MICROPY_HW_WIFI_SPI_ID              (2)
 #define MICROPY_HW_WIFI_SPI_BAUDRATE        (8000000)
diff --git a/ports/samd/boards/ADAFRUIT_METRO_M4_EXPRESS/pins.csv b/ports/samd/boards/ADAFRUIT_METRO_M4_EXPRESS/pins.csv
index cee4bf02b7a39..aef7391d12d3b 100644
--- a/ports/samd/boards/ADAFRUIT_METRO_M4_EXPRESS/pins.csv
+++ b/ports/samd/boards/ADAFRUIT_METRO_M4_EXPRESS/pins.csv
@@ -21,6 +21,9 @@ D11,PA19
 D12,PA17
 D13,PA16
 
+RX,PA23
+TX,PA22
+
 SDA,PB02
 SCL,PB03
 
diff --git a/ports/samd/boards/ADAFRUIT_QTPY_SAMD21/mpconfigboard.h b/ports/samd/boards/ADAFRUIT_QTPY_SAMD21/mpconfigboard.h
index 0acf28afbfe15..78b03ce7fbdb8 100644
--- a/ports/samd/boards/ADAFRUIT_QTPY_SAMD21/mpconfigboard.h
+++ b/ports/samd/boards/ADAFRUIT_QTPY_SAMD21/mpconfigboard.h
@@ -3,4 +3,8 @@
 
 #define MICROPY_HW_DFLL_USB_SYNC    (1)
 
+#define MICROPY_HW_DEFAULT_UART_ID  (0)
+#define MICROPY_HW_DEFAULT_I2C_ID   (1)
+#define MICROPY_HW_DEFAULT_SPI_ID   (0)
+
 #define MICROPY_HW_SPIFLASH_ID (3)
diff --git a/ports/samd/boards/ADAFRUIT_TRINKET_M0/mpconfigboard.h b/ports/samd/boards/ADAFRUIT_TRINKET_M0/mpconfigboard.h
index 5732a20e3adc4..1edff009859c1 100644
--- a/ports/samd/boards/ADAFRUIT_TRINKET_M0/mpconfigboard.h
+++ b/ports/samd/boards/ADAFRUIT_TRINKET_M0/mpconfigboard.h
@@ -2,3 +2,7 @@
 #define MICROPY_HW_MCU_NAME   "SAMD21E18A"
 
 #define MICROPY_HW_DFLL_USB_SYNC    (1)
+
+#define MICROPY_HW_DEFAULT_UART_ID  (0)
+#define MICROPY_HW_DEFAULT_I2C_ID   (2)
+#define MICROPY_HW_DEFAULT_SPI_ID   (0)
diff --git a/ports/samd/boards/ADAFRUIT_TRINKET_M0/pins.csv b/ports/samd/boards/ADAFRUIT_TRINKET_M0/pins.csv
index 47306f8de1ce0..fb1e645cf4ddc 100644
--- a/ports/samd/boards/ADAFRUIT_TRINKET_M0/pins.csv
+++ b/ports/samd/boards/ADAFRUIT_TRINKET_M0/pins.csv
@@ -1,3 +1,10 @@
+RX,PA07
+TX,PA06
+SDA,PA08
+SCL,PA09
+MOSI,PA06
+MISO,PA09
+SCK,PA07
 D0,PA08
 D1,PA02
 D2,PA09
@@ -5,7 +12,6 @@ D3,PA07
 D4,PA06
 DOTSTAR_DATA,PA00
 DOTSTAR_CLK,PA01
-
 LED,PA10
 
 USB_DM,PA24
diff --git a/ports/samd/boards/MINISAM_M4/mpconfigboard.h b/ports/samd/boards/MINISAM_M4/mpconfigboard.h
index 87acf301e36b5..30a7a804542cb 100644
--- a/ports/samd/boards/MINISAM_M4/mpconfigboard.h
+++ b/ports/samd/boards/MINISAM_M4/mpconfigboard.h
@@ -3,4 +3,8 @@
 
 #define MICROPY_HW_DFLL_USB_SYNC    (1)
 
-#define MICROPY_HW_QSPIFLASH   GD25Q16C
+#define MICROPY_HW_DEFAULT_UART_ID  (3)
+#define MICROPY_HW_DEFAULT_I2C_ID   (2)
+#define MICROPY_HW_DEFAULT_SPI_ID   (1)
+
+#define MICROPY_HW_QSPIFLASH   W25Q16JV_IQ
diff --git a/ports/samd/boards/MINISAM_M4/pins.csv b/ports/samd/boards/MINISAM_M4/pins.csv
index 3c1ab4c6038d3..d6a3ef803200b 100644
--- a/ports/samd/boards/MINISAM_M4/pins.csv
+++ b/ports/samd/boards/MINISAM_M4/pins.csv
@@ -7,6 +7,8 @@ A5,PA06
 A6,PA07
 RX,PA16
 TX,PA17
+D0,PA16
+D1,PA17
 D3,PA19
 D4,PA20
 D5,PA21
@@ -15,8 +17,8 @@ BUTTON,PA00
 AREF,PA03
 SDA,PA12
 SCL,PA13
-MOSI,PB22
-MISO,PB23
+MOSI,PB23
+MISO,PB22
 SCK,PA01
 DOTSTAR_DATA,PB03
 DOTSTAR_CLK,PB02
diff --git a/ports/samd/boards/SAMD_GENERIC_D21X18/board.json b/ports/samd/boards/SAMD_GENERIC_D21X18/board.json
index a14730bd1bf49..c00d78addd40e 100644
--- a/ports/samd/boards/SAMD_GENERIC_D21X18/board.json
+++ b/ports/samd/boards/SAMD_GENERIC_D21X18/board.json
@@ -11,6 +11,7 @@
     ],
     "mcu": "samd21",
     "vendor": "Microchip",
+    "url": "https://www.microchip.com/en-us/products/microcontrollers-and-microprocessors/32-bit-mcus/sam-32-bit-mcus/sam-d",
     "product": "Generic SAMD21J18",
     "thumbnail": ""
 }
diff --git a/ports/samd/boards/SAMD_GENERIC_D51X19/board.json b/ports/samd/boards/SAMD_GENERIC_D51X19/board.json
index 21cb114bf65fb..2be5f20851eb7 100644
--- a/ports/samd/boards/SAMD_GENERIC_D51X19/board.json
+++ b/ports/samd/boards/SAMD_GENERIC_D51X19/board.json
@@ -11,6 +11,7 @@
     ],
     "mcu": "samd51",
     "vendor": "Microchip",
+    "url": "https://www.microchip.com/en-us/products/microcontrollers-and-microprocessors/32-bit-mcus/sam-32-bit-mcus/sam-d",
     "product": "Generic SAMD51P19",
     "thumbnail": ""
 }
diff --git a/ports/samd/boards/SAMD_GENERIC_D51X20/board.json b/ports/samd/boards/SAMD_GENERIC_D51X20/board.json
index ae4f83472ecd4..8384484327894 100644
--- a/ports/samd/boards/SAMD_GENERIC_D51X20/board.json
+++ b/ports/samd/boards/SAMD_GENERIC_D51X20/board.json
@@ -11,6 +11,7 @@
     ],
     "mcu": "samd51",
     "vendor": "Microchip",
+    "url": "https://www.microchip.com/en-us/products/microcontrollers-and-microprocessors/32-bit-mcus/sam-32-bit-mcus/sam-d",
     "product": "Generic SAMD51P20",
     "thumbnail": ""
 }
diff --git a/ports/samd/boards/SAMD_GENERIC_D51X20/mpconfigboard.mk b/ports/samd/boards/SAMD_GENERIC_D51X20/mpconfigboard.mk
index ddba3dcbbade9..b240c2587f8d0 100644
--- a/ports/samd/boards/SAMD_GENERIC_D51X20/mpconfigboard.mk
+++ b/ports/samd/boards/SAMD_GENERIC_D51X20/mpconfigboard.mk
@@ -1,13 +1,11 @@
 MCU_SERIES = SAMD51
 CMSIS_MCU = SAMD51P20A
-LD_FILES = boards/samd51x19a.ld sections.ld
+LD_FILES = boards/samd51x20a.ld sections.ld
 TEXT0 = 0x4000
 
-
 # The ?='s allow overriding in mpconfigboard.mk.
 # MicroPython settings
 # The size of a MCU flash filesystem will be
-# 1008k - MICROPY_HW_CODESIZE - MICROPY_HW_VFSROMSIZE
+# 1008k - MICROPY_HW_CODESIZE
 # The default for MICROPY_HW_VFSROMSIZE is 64K
 MICROPY_HW_CODESIZE ?= 752K
-MICROPY_HW_VFSROMSIZE ?= 128K
diff --git a/ports/samd/boards/SEEED_WIO_TERMINAL/mpconfigboard.h b/ports/samd/boards/SEEED_WIO_TERMINAL/mpconfigboard.h
index 062f69ae4e773..7f6d42345776a 100644
--- a/ports/samd/boards/SEEED_WIO_TERMINAL/mpconfigboard.h
+++ b/ports/samd/boards/SEEED_WIO_TERMINAL/mpconfigboard.h
@@ -3,4 +3,8 @@
 
 #define MICROPY_HW_XOSC32K          (1)
 
+#define MICROPY_HW_DEFAULT_UART_ID  (2)
+#define MICROPY_HW_DEFAULT_I2C_ID   (4)
+#define MICROPY_HW_DEFAULT_SPI_ID   (5)
+
 #define MICROPY_HW_QSPIFLASH        W25Q32JV_IQ
diff --git a/ports/samd/boards/SEEED_WIO_TERMINAL/pins.csv b/ports/samd/boards/SEEED_WIO_TERMINAL/pins.csv
index f263253cbaae4..c335ba2baff18 100644
--- a/ports/samd/boards/SEEED_WIO_TERMINAL/pins.csv
+++ b/ports/samd/boards/SEEED_WIO_TERMINAL/pins.csv
@@ -19,6 +19,8 @@ ENABLE_5V,PC14
 ENABLE_3V3,PC15
 TX,PB26
 RX,PB27
+SDA,PA13
+SCL,PA12
 SDA0,PA13
 SCL0,PA12
 SDA1,PA17
diff --git a/ports/samd/boards/SEEED_XIAO_SAMD21/board.json b/ports/samd/boards/SEEED_XIAO_SAMD21/board.json
index 4d19f6b94529a..0d6b2fc30d2c0 100644
--- a/ports/samd/boards/SEEED_XIAO_SAMD21/board.json
+++ b/ports/samd/boards/SEEED_XIAO_SAMD21/board.json
@@ -10,7 +10,7 @@
         "seeeduino-xiao.jpg"
     ],
     "mcu": "samd21",
-    "product": "Seeeduino XIAO (SAMD21)",
+    "product": "XIAO SAMD21",
     "thumbnail": "",
     "url": "https://www.seeedstudio.com/Seeeduino-XIAO-Arduino-Microcontroller-SAMD21-Cortex-M0+-p-4426.html",
     "vendor": "Seeed Studio"
diff --git a/ports/samd/boards/SEEED_XIAO_SAMD21/mpconfigboard.h b/ports/samd/boards/SEEED_XIAO_SAMD21/mpconfigboard.h
index 7447c5c3acf70..f0213a88e2990 100644
--- a/ports/samd/boards/SEEED_XIAO_SAMD21/mpconfigboard.h
+++ b/ports/samd/boards/SEEED_XIAO_SAMD21/mpconfigboard.h
@@ -3,3 +3,7 @@
 
 #define MICROPY_HW_XOSC32K  (1)
 #define MICROPY_HW_ADC_VREF (2)
+
+#define MICROPY_HW_DEFAULT_UART_ID  (4)
+#define MICROPY_HW_DEFAULT_I2C_ID   (2)
+#define MICROPY_HW_DEFAULT_SPI_ID   (0)
diff --git a/ports/samd/boards/SEEED_XIAO_SAMD21/pins.csv b/ports/samd/boards/SEEED_XIAO_SAMD21/pins.csv
index 969c60028b41b..6f70f3308e703 100644
--- a/ports/samd/boards/SEEED_XIAO_SAMD21/pins.csv
+++ b/ports/samd/boards/SEEED_XIAO_SAMD21/pins.csv
@@ -1,3 +1,11 @@
+RX,PB09
+TX,PB08
+SCL,PA09
+SDA,PA08
+MOSI,PA06
+MISO,PA05
+SCK,PA07
+
 A0_D0,PA02
 A1_D1,PA04
 A2_D2,PA10
@@ -9,7 +17,6 @@ A7_D7,PB09
 A8_D8,PA07
 A9_D9,PA05
 A10_D10,PA06
-
 USER_LED,PA17
 RX_LED,PA18
 TX_LED,PA19
diff --git a/ports/samd/boards/SPARKFUN_REDBOARD_TURBO/board.json b/ports/samd/boards/SPARKFUN_REDBOARD_TURBO/board.json
new file mode 100644
index 0000000000000..b7ccac725d4f5
--- /dev/null
+++ b/ports/samd/boards/SPARKFUN_REDBOARD_TURBO/board.json
@@ -0,0 +1,21 @@
+{
+    "deploy": [
+        "../deploy.md"
+    ],
+    "docs": "",
+    "features": [
+        "Battery Charging",
+        "DAC",
+        "External Flash",
+        "USB",
+        "RGB LED"
+    ],
+    "images": [
+        "sparkfun_readboard_turbo.jpg"
+    ],
+    "mcu": "samd21",
+    "product": "SparkFun RedBoard Turbo",
+    "thumbnail": "",
+    "url": "https://www.sparkfun.com/products/14812",
+    "vendor": "Sparkfun"
+}
diff --git a/ports/samd/boards/SPARKFUN_REDBOARD_TURBO/mpconfigboard.h b/ports/samd/boards/SPARKFUN_REDBOARD_TURBO/mpconfigboard.h
new file mode 100644
index 0000000000000..cd0ec51acce0c
--- /dev/null
+++ b/ports/samd/boards/SPARKFUN_REDBOARD_TURBO/mpconfigboard.h
@@ -0,0 +1,11 @@
+#define MICROPY_HW_BOARD_NAME "SparkFun RedBoard Turbo"
+#define MICROPY_HW_MCU_NAME   "SAMD21G18A"
+
+#define MICROPY_HW_XOSC32K     (1)
+
+#define MICROPY_HW_SPIFLASH    (1)
+#define MICROPY_HW_SPIFLASH_ID (5)
+
+#define MICROPY_HW_DEFAULT_UART_ID  (0)
+#define MICROPY_HW_DEFAULT_I2C_ID   (3)
+#define MICROPY_HW_DEFAULT_SPI_ID   (4)
diff --git a/ports/samd/boards/SPARKFUN_REDBOARD_TURBO/mpconfigboard.mk b/ports/samd/boards/SPARKFUN_REDBOARD_TURBO/mpconfigboard.mk
new file mode 100644
index 0000000000000..6ea327a650d40
--- /dev/null
+++ b/ports/samd/boards/SPARKFUN_REDBOARD_TURBO/mpconfigboard.mk
@@ -0,0 +1,8 @@
+MCU_SERIES = SAMD21
+CMSIS_MCU = SAMD21G18A
+LD_FILES = boards/samd21x18a.ld sections.ld
+TEXT0 = 0x2000
+
+# The ?='s allow overriding in mpconfigboard.mk.
+# MicroPython settings
+MICROPY_HW_CODESIZE ?= 232K
diff --git a/ports/samd/boards/SPARKFUN_REDBOARD_TURBO/pins.csv b/ports/samd/boards/SPARKFUN_REDBOARD_TURBO/pins.csv
new file mode 100644
index 0000000000000..f065fc8917051
--- /dev/null
+++ b/ports/samd/boards/SPARKFUN_REDBOARD_TURBO/pins.csv
@@ -0,0 +1,47 @@
+# The lines contain pairs of Pin name and Pin number.
+# Pin names must be valid Python identifiers.
+# Pin numbers have the form Pxnn, with x being A, B, C or D.
+# Lines starting with # or empty lines are ignored.
+
+USB_DM,PA24
+USB_DP,PA25
+
+SWCLK,PA30
+SWDIO,PA31
+
+D0,PA11
+D1,PA10
+D2,PA14
+D3,PA09
+D4,PA08
+D5,PA15
+D6,PA20
+D7,PA21
+D8,PA06
+D9,PA07
+D10,PA18
+D11,PA16
+D12,PA19
+D13,PA17
+A0,PA02
+A1,PB08
+A2,PB09
+A3,PA04
+A4,PA05
+A5,PB02
+AREF,PA03
+RX,PA11
+TX,PA10
+SCL,PA23
+SDA,PA22
+MOSI,PB10
+MISO,PA12
+SCK,PB11
+FLASH_MOSI,PB22
+FLASH_MISO,PB03
+FLASH_SCK,PB23
+FLASH_CS,PA13
+NEOPIXEL,PA30
+
+LED_TX,PA27
+LED_RX,PA31
diff --git a/ports/samd/boards/SPARKFUN_SAMD21_DEV_BREAKOUT/board.json b/ports/samd/boards/SPARKFUN_SAMD21_DEV_BREAKOUT/board.json
new file mode 100644
index 0000000000000..b2e6553b2d2e1
--- /dev/null
+++ b/ports/samd/boards/SPARKFUN_SAMD21_DEV_BREAKOUT/board.json
@@ -0,0 +1,19 @@
+{
+    "deploy": [
+        "../deploy.md"
+    ],
+    "docs": "",
+    "features": [
+        "Battery Charging",
+        "DAC",
+        "USB"
+    ],
+    "images": [
+        "sparkfun_sam21_dev_breakout.jpg"
+    ],
+    "mcu": "samd21",
+    "product": "SparkFun SAMD21 Dev Breakout",
+    "thumbnail": "",
+    "url": "https://www.sparkfun.com/products/13672",
+    "vendor": "Sparkfun"
+}
diff --git a/ports/samd/boards/SPARKFUN_SAMD21_DEV_BREAKOUT/mpconfigboard.h b/ports/samd/boards/SPARKFUN_SAMD21_DEV_BREAKOUT/mpconfigboard.h
new file mode 100644
index 0000000000000..0679a9f4e4b97
--- /dev/null
+++ b/ports/samd/boards/SPARKFUN_SAMD21_DEV_BREAKOUT/mpconfigboard.h
@@ -0,0 +1,8 @@
+#define MICROPY_HW_BOARD_NAME "SparkFun SAMD21 Dev Breakout"
+#define MICROPY_HW_MCU_NAME   "SAMD21G18A"
+
+#define MICROPY_HW_XOSC32K          (1)
+
+#define MICROPY_HW_DEFAULT_UART_ID  (0)
+#define MICROPY_HW_DEFAULT_I2C_ID   (3)
+#define MICROPY_HW_DEFAULT_SPI_ID   (4)
diff --git a/ports/samd/boards/SPARKFUN_SAMD21_DEV_BREAKOUT/mpconfigboard.mk b/ports/samd/boards/SPARKFUN_SAMD21_DEV_BREAKOUT/mpconfigboard.mk
new file mode 100644
index 0000000000000..8696c966bc321
--- /dev/null
+++ b/ports/samd/boards/SPARKFUN_SAMD21_DEV_BREAKOUT/mpconfigboard.mk
@@ -0,0 +1,4 @@
+MCU_SERIES = SAMD21
+CMSIS_MCU = SAMD21G18A
+LD_FILES = boards/samd21x18a.ld sections.ld
+TEXT0 = 0x2000
diff --git a/ports/samd/boards/SPARKFUN_SAMD21_DEV_BREAKOUT/pins.csv b/ports/samd/boards/SPARKFUN_SAMD21_DEV_BREAKOUT/pins.csv
new file mode 100644
index 0000000000000..794be318000cf
--- /dev/null
+++ b/ports/samd/boards/SPARKFUN_SAMD21_DEV_BREAKOUT/pins.csv
@@ -0,0 +1,45 @@
+# The lines contain pairs of Pin name and Pin number.
+# Pin names must be valid Python identifiers.
+# Pin numbers have the form Pxnn, with x being A, B, C or D.
+# Lines starting with # or empty lines are ignored.
+
+USB_DM,PA24
+USB_DP,PA25
+
+SWCLK,PA30
+SWDIO,PA31
+
+D0,PA11
+D1,PA10
+D2,PA14
+D3,PA09
+D4,PA08
+D5,PA15
+D6,PA20
+D7,PA21
+D8,PA06
+D9,PA07
+D10,PA18
+D11,PA16
+D12,PA19
+D13,PA17
+A0,PA02
+A1,PB08
+A2,PB09
+A3,PA04
+A4,PA05
+A5,PB02
+AREF,PA03
+RX,PA11
+TX,PA10
+SCL,PA23
+SDA,PA22
+MOSI,PB10
+MISO,PA12
+SCK,PB11
+D38,PA13
+D30,PB22
+D31,PB23
+
+LED_TX,PA27
+LED_RX,PB03
diff --git a/ports/samd/boards/SPARKFUN_SAMD51_THING_PLUS/board.json b/ports/samd/boards/SPARKFUN_SAMD51_THING_PLUS/board.json
index ee9ca9d3689b0..6e89cebadd61a 100644
--- a/ports/samd/boards/SPARKFUN_SAMD51_THING_PLUS/board.json
+++ b/ports/samd/boards/SPARKFUN_SAMD51_THING_PLUS/board.json
@@ -13,8 +13,8 @@
         "sparkfun_samd51_thing_plus.jpg"
     ],
     "mcu": "samd51",
-    "product": "Sparkfun SAMD51 Thing Plus",
+    "product": "SAMD51 Thing Plus",
     "thumbnail": "",
     "url": "https://www.sparkfun.com/products/14713",
-    "vendor": "Sparkfun"
+    "vendor": "SparkFun"
 }
diff --git a/ports/samd/boards/SPARKFUN_SAMD51_THING_PLUS/mpconfigboard.h b/ports/samd/boards/SPARKFUN_SAMD51_THING_PLUS/mpconfigboard.h
index 706fc3c64c37b..9e0db7875f247 100644
--- a/ports/samd/boards/SPARKFUN_SAMD51_THING_PLUS/mpconfigboard.h
+++ b/ports/samd/boards/SPARKFUN_SAMD51_THING_PLUS/mpconfigboard.h
@@ -1,8 +1,12 @@
-#define MICROPY_HW_BOARD_NAME       "Sparkfun SAMD51 Thing Plus"
+#define MICROPY_HW_BOARD_NAME       "SparkFun SAMD51 Thing Plus"
 #define MICROPY_HW_MCU_NAME         "SAMD51J20A"
 
 #define MICROPY_HW_XOSC32K          (1)
 
+#define MICROPY_HW_DEFAULT_UART_ID  (2)
+#define MICROPY_HW_DEFAULT_I2C_ID   (3)
+#define MICROPY_HW_DEFAULT_SPI_ID   (4)
+
 // There seems to be an inconsistency in the SAMD51 Thing bootloader in that
 // the bootloader magic address is at the end of a 192k RAM area, instead of
 // 256k. Since the SAMD51x20A has 256k RAM, the loader symbol is at that address
diff --git a/ports/samd/boards/SPARKFUN_SAMD51_THING_PLUS/pins.csv b/ports/samd/boards/SPARKFUN_SAMD51_THING_PLUS/pins.csv
index 0ae269724da85..fe47fef27f29c 100644
--- a/ports/samd/boards/SPARKFUN_SAMD51_THING_PLUS/pins.csv
+++ b/ports/samd/boards/SPARKFUN_SAMD51_THING_PLUS/pins.csv
@@ -15,6 +15,8 @@ A2,PB09
 A3,PA04
 A4,PA05
 A5,PB02
+RX,PA13
+TX,PA12
 SDA,PA22
 SCL,PA23
 MOSI,PB12
@@ -30,7 +32,6 @@ TXLED,PA27
 
 USB_DM,PA24
 USB_DP,PA25
-USB_SOF,PA23
 
 SWCLK,PA30
 SWDIO,PA31
diff --git a/ports/samd/machine_i2c.c b/ports/samd/machine_i2c.c
index a7b728ddaf362..172518523d208 100644
--- a/ports/samd/machine_i2c.c
+++ b/ports/samd/machine_i2c.c
@@ -34,11 +34,12 @@
 #include "extmod/modmachine.h"
 #include "samd_soc.h"
 #include "pin_af.h"
+#include "genhdr/pins.h"
 #include "clock_config.h"
 
-#define DEFAULT_I2C_FREQ  (400000)
-#define RISETIME_NS       (200)
-#define I2C_TIMEOUT       (100)
+#define DEFAULT_I2C_FREQ    (400000)
+#define RISETIME_NS         (200)
+#define DEFAULT_I2C_TIMEOUT (50000)
 
 #define IS_BUS_BUSY       (i2c->I2CM.STATUS.bit.BUSSTATE == 3)
 #define NACK_RECVD        (i2c->I2CM.STATUS.bit.RXNACK == 1)
@@ -66,6 +67,7 @@ typedef struct _machine_i2c_obj_t {
     uint8_t state;
     uint32_t freq;
     uint32_t timeout;
+    uint32_t timer;
     size_t len;
     uint8_t *buf;
 } machine_i2c_obj_t;
@@ -87,7 +89,7 @@ void common_i2c_irq_handler(int i2c_id) {
             if (self->len > 0) {
                 *(self->buf)++ = i2c->I2CM.DATA.reg;
                 self->len--;
-                self->timeout = I2C_TIMEOUT;
+                self->timer = self->timeout;
             }
             if (self->len > 0) { // no ACK at the last byte
                 PREPARE_ACK; // Send ACK
@@ -104,7 +106,7 @@ void common_i2c_irq_handler(int i2c_id) {
             } else if (self->len > 0) { // data to be sent
                 i2c->I2CM.DATA.bit.DATA = *(self->buf)++;
                 self->len--;
-                self->timeout = I2C_TIMEOUT;
+                self->timer = self->timeout;
             } else { // No data left, if there was any.
                 self->state = state_done;
                 i2c->I2CM.INTFLAG.reg |= SERCOM_I2CM_INTFLAG_MB;
@@ -119,17 +121,28 @@ void common_i2c_irq_handler(int i2c_id) {
 
 static void machine_i2c_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
     machine_i2c_obj_t *self = MP_OBJ_TO_PTR(self_in);
-    mp_printf(print, "I2C(%u, freq=%u, scl=%u, sda=%u)",
-        self->id, self->freq, self->scl, self->sda);
+    mp_printf(print, "I2C(%u, freq=%u, scl=\"%q\", sda=\"%q\", timeout=%u)",
+        self->id, self->freq, pin_find_by_id(self->scl)->name, pin_find_by_id(self->sda)->name,
+        self->timeout * 1000);
 }
 
 mp_obj_t machine_i2c_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) {
-    enum { ARG_id, ARG_freq, ARG_scl, ARG_sda };
+    enum { ARG_id, ARG_freq, ARG_scl, ARG_sda, ARG_timeout };
     static const mp_arg_t allowed_args[] = {
-        { MP_QSTR_id, MP_ARG_REQUIRED | MP_ARG_OBJ },
+        #if MICROPY_HW_DEFAULT_I2C_ID < 0
+        { MP_QSTR_id, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = -1} },
+        #else
+        { MP_QSTR_id, MP_ARG_INT, {.u_int = MICROPY_HW_DEFAULT_I2C_ID} },
+        #endif
         { MP_QSTR_freq, MP_ARG_INT, {.u_int = DEFAULT_I2C_FREQ} },
+        #if defined(pin_SCL) && defined(pin_SDA)
+        { MP_QSTR_scl, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = pin_SCL} },
+        { MP_QSTR_sda, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = pin_SDA} },
+        #else
         { MP_QSTR_scl, MP_ARG_REQUIRED | MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE} },
         { MP_QSTR_sda, MP_ARG_REQUIRED | MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE} },
+        #endif
+        { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = DEFAULT_I2C_TIMEOUT} },
     };
 
     // Parse args.
@@ -137,7 +150,7 @@ mp_obj_t machine_i2c_make_new(const mp_obj_type_t *type, size_t n_args, size_t n
     mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
 
     // Get I2C bus.
-    int id = mp_obj_get_int(args[ARG_id].u_obj);
+    int id = args[ARG_id].u_int;
     if (id < 0 || id >= SERCOM_INST_NUM) {
         mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("I2C(%d) doesn't exist"), id);
     }
@@ -148,18 +161,18 @@ mp_obj_t machine_i2c_make_new(const mp_obj_type_t *type, size_t n_args, size_t n
     self->instance = sercom_instance[self->id];
 
     // Set SCL/SDA pins.
-    sercom_pad_config_t scl_pad_config;
     self->scl = mp_hal_get_pin_obj(args[ARG_scl].u_obj);
-    scl_pad_config = get_sercom_config(self->scl, self->id);
-
-    sercom_pad_config_t sda_pad_config;
     self->sda = mp_hal_get_pin_obj(args[ARG_sda].u_obj);
-    sda_pad_config = get_sercom_config(self->sda, self->id);
+
+    sercom_pad_config_t scl_pad_config = get_sercom_config(self->scl, self->id);
+    sercom_pad_config_t sda_pad_config = get_sercom_config(self->sda, self->id);
     if (sda_pad_config.pad_nr != 0 || scl_pad_config.pad_nr != 1) {
-        mp_raise_ValueError(MP_ERROR_TEXT("invalid pin for sda or scl"));
+        mp_raise_ValueError(MP_ERROR_TEXT("invalid sda/scl pin"));
     }
     MP_STATE_PORT(sercom_table[self->id]) = self;
     self->freq = args[ARG_freq].u_int;
+    // The unit for ARG_timeout is us, but the code uses ms.
+    self->timeout = args[ARG_timeout].u_int / 1000;
 
     // Configure the Pin mux.
     mp_hal_set_pin_mux(self->scl, scl_pad_config.alt_fct);
@@ -216,13 +229,13 @@ static int machine_i2c_transfer_single(mp_obj_base_t *self_in, uint16_t addr, si
     machine_i2c_obj_t *self = (machine_i2c_obj_t *)self_in;
     Sercom *i2c = self->instance;
 
-    self->timeout = I2C_TIMEOUT;
+    self->timer = self->timeout;
     self->len = len;
     self->buf = buf;
     // Wait a while if the bus is busy
-    while (IS_BUS_BUSY && self->timeout) {
+    while (IS_BUS_BUSY && self->timer) {
         MICROPY_EVENT_POLL_HOOK
-        if (--self->timeout == 0) {
+        if (--self->timer == 0) {
             return -MP_ETIMEDOUT;
         }
     }
@@ -234,9 +247,9 @@ static int machine_i2c_transfer_single(mp_obj_base_t *self_in, uint16_t addr, si
     i2c->I2CM.ADDR.bit.ADDR = (addr << 1) | READ_MODE;
 
     // Transfer the data
-    self->timeout = I2C_TIMEOUT;
-    while (self->state == state_busy && self->timeout) {
-        self->timeout--;
+    self->timer = self->timeout;
+    while (self->state == state_busy && self->timer) {
+        self->timer--;
         MICROPY_EVENT_POLL_HOOK
     }
     i2c->I2CM.INTENCLR.reg = SERCOM_I2CM_INTENSET_MB | SERCOM_I2CM_INTENSET_SB | SERCOM_I2CM_INTENSET_ERROR;
@@ -248,7 +261,7 @@ static int machine_i2c_transfer_single(mp_obj_base_t *self_in, uint16_t addr, si
     } else if (self->state == state_buserr) {
         SET_STOP_STATE;
         return -MP_EIO;
-    } else if (self->timeout == 0) {
+    } else if (self->timer == 0) {
         SET_STOP_STATE;
         return -MP_ETIMEDOUT;
     }
diff --git a/ports/samd/machine_rtc.c b/ports/samd/machine_rtc.c
index 74c2266d60926..4b03488b71b73 100644
--- a/ports/samd/machine_rtc.c
+++ b/ports/samd/machine_rtc.c
@@ -133,6 +133,7 @@ static mp_obj_t machine_rtc_datetime_helper(size_t n_args, const mp_obj_t *args,
         }
         #endif
 
+        mp_hal_time_ns_set_from_rtc();
         return mp_const_none;
     }
 }
diff --git a/ports/samd/machine_spi.c b/ports/samd/machine_spi.c
index 9c31cc2778dba..744de2000b00a 100644
--- a/ports/samd/machine_spi.c
+++ b/ports/samd/machine_spi.c
@@ -33,6 +33,7 @@
 #include "extmod/modmachine.h"
 #include "samd_soc.h"
 #include "pin_af.h"
+#include "genhdr/pins.h"
 #include "clock_config.h"
 
 #define DEFAULT_SPI_BAUDRATE    (1000000)
@@ -82,8 +83,15 @@ void common_spi_irq_handler(int spi_id) {
 
 static void machine_spi_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
     machine_spi_obj_t *self = MP_OBJ_TO_PTR(self_in);
-    mp_printf(print, "SPI(%u, baudrate=%u, firstbit=%u, polarity=%u, phase=%u, bits=8)",
-        self->id, self->baudrate, self->firstbit, self->polarity, self->phase);
+    mp_printf(print, "SPI(%u, baudrate=%u, firstbit=%u, polarity=%u, phase=%u, bits=8,"
+        " sck=\"%q\", mosi=\"%q\", miso=",
+        self->id, self->baudrate, self->firstbit, self->polarity, self->phase,
+        pin_find_by_id(self->sck)->name, pin_find_by_id(self->mosi)->name);
+    if (self->miso == 0xff) {
+        mp_printf(print, "None)");
+    } else {
+        mp_printf(print, "\"%q\")", pin_find_by_id(self->miso)->name);
+    }
 }
 
 static void machine_spi_init(mp_obj_base_t *self_in, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
@@ -96,7 +104,7 @@ static void machine_spi_init(mp_obj_base_t *self_in, size_t n_args, const mp_obj
         { MP_QSTR_firstbit, MP_ARG_INT, {.u_int = -1} },
         { MP_QSTR_sck, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE} },
         { MP_QSTR_mosi, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE} },
-        { MP_QSTR_miso, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE} },
+        { MP_QSTR_miso, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_INT(-1)} },
     };
 
     machine_spi_obj_t *self = MP_OBJ_TO_PTR(self_in);
@@ -132,14 +140,16 @@ static void machine_spi_init(mp_obj_base_t *self_in, size_t n_args, const mp_obj
     if (args[ARG_mosi].u_obj != mp_const_none) {
         self->mosi = mp_hal_get_pin_obj(args[ARG_mosi].u_obj);
     }
-    if (args[ARG_miso].u_obj != mp_const_none) {
-        self->miso = mp_hal_get_pin_obj(args[ARG_miso].u_obj);
+    if (args[ARG_miso].u_obj != MP_ROM_INT(-1)) {
+        self->miso = args[ARG_miso].u_obj == mp_const_none ? 0xff : mp_hal_get_pin_obj(args[ARG_miso].u_obj);
     }
-
     // Initialise the SPI peripheral if any arguments given, or it was not initialised previously.
     if (n_args > 0 || kw_args->used > 0 || self->new) {
         self->new = false;
 
+        if (self->sck == 0xff || self->mosi == 0xff) {
+            mp_raise_ValueError(MP_ERROR_TEXT("missing sck/mosi"));
+        }
         // Get the pad and alt-fct numbers.
         self->sck_pad_config = get_sercom_config(self->sck, self->id);
         self->mosi_pad_config = get_sercom_config(self->mosi, self->id);
@@ -155,7 +165,7 @@ static void machine_spi_init(mp_obj_base_t *self_in, size_t n_args, const mp_obj
         } else if (self->mosi_pad_config.pad_nr == 0 && self->sck_pad_config.pad_nr == 3) {
             dopo = 3;
         } else {
-            mp_raise_ValueError(MP_ERROR_TEXT("invalid pin for sck or mosi"));
+            mp_raise_ValueError(MP_ERROR_TEXT("invalid sck/mosi pin"));
         }
         #elif defined(MCU_SAMD51)
         if (self->mosi_pad_config.pad_nr == 0 && self->sck_pad_config.pad_nr == 1) {
@@ -232,10 +242,16 @@ static void machine_spi_init(mp_obj_base_t *self_in, size_t n_args, const mp_obj
 }
 
 static mp_obj_t machine_spi_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) {
-    mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true);
+    mp_arg_check_num(n_args, n_kw, MICROPY_HW_DEFAULT_SPI_ID < 0 ? 1 : 0, MP_OBJ_FUN_ARGS_MAX, true);
 
     // Get SPI bus.
-    int spi_id = mp_obj_get_int(args[0]);
+    int spi_id = MICROPY_HW_DEFAULT_SPI_ID;
+
+    if (n_args > 0) {
+        spi_id = mp_obj_get_int(args[0]);
+        n_args--;
+        args++;
+    }
     if (spi_id < 0 || spi_id > SERCOM_INST_NUM) {
         mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("SPI(%d) doesn't exist"), spi_id);
     }
@@ -247,16 +263,23 @@ static mp_obj_t machine_spi_make_new(const mp_obj_type_t *type, size_t n_args, s
     self->polarity = DEFAULT_SPI_POLARITY;
     self->phase = DEFAULT_SPI_PHASE;
     self->firstbit = DEFAULT_SPI_FIRSTBIT;
+    #if defined(pin_SCK) && defined(pin_MOSI) && defined(pin_MISO)
+    // Initialize with the default pins
+    self->sck = mp_hal_get_pin_obj((mp_obj_t)pin_SCK);
+    self->mosi = mp_hal_get_pin_obj((mp_obj_t)pin_MOSI);
+    self->miso = mp_hal_get_pin_obj((mp_obj_t)pin_MISO);
+    #else
     self->mosi = 0xff; // 0xff: pin not defined (yet)
     self->miso = 0xff;
     self->sck = 0xff;
+    #endif
 
     self->new = true;
     MP_STATE_PORT(sercom_table[spi_id]) = self;
 
     mp_map_t kw_args;
     mp_map_init_fixed_table(&kw_args, n_kw, args + n_args);
-    machine_spi_init((mp_obj_base_t *)self, n_args - 1, args + 1, &kw_args);
+    machine_spi_init((mp_obj_base_t *)self, n_args, args, &kw_args);
     return self;
 }
 
diff --git a/ports/samd/machine_uart.c b/ports/samd/machine_uart.c
index 6e9a5538647bc..5be38e961c121 100644
--- a/ports/samd/machine_uart.c
+++ b/ports/samd/machine_uart.c
@@ -32,6 +32,7 @@
 #include "py/ringbuf.h"
 #include "samd_soc.h"
 #include "pin_af.h"
+#include "genhdr/pins.h"
 #include "shared/runtime/softtimer.h"
 
 #define DEFAULT_UART_BAUDRATE (115200)
@@ -87,8 +88,10 @@ typedef struct _machine_uart_obj_t {
     uint16_t timeout;       // timeout waiting for first char (in ms)
     uint16_t timeout_char;  // timeout waiting between chars (in ms)
     bool new;
+    uint16_t rxbuf_len;
     ringbuf_t read_buffer;
     #if MICROPY_HW_UART_TXBUF
+    uint16_t txbuf_len;
     ringbuf_t write_buffer;
     #endif
     #if MICROPY_PY_MACHINE_UART_IRQ
@@ -153,7 +156,8 @@ void common_uart_irq_handler(int uart_id) {
                 }
             }
             #endif
-        } else if (uart->USART.INTFLAG.bit.DRE != 0) {
+        }
+        if (uart->USART.INTFLAG.bit.DRE != 0) {
             #if MICROPY_HW_UART_TXBUF
             // handle the outgoing data
             if (ringbuf_avail(&self->write_buffer) > 0) {
@@ -286,19 +290,9 @@ void machine_uart_set_baudrate(mp_obj_t self_in, uint32_t baudrate) {
 
 static void mp_machine_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
     machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
-    size_t rxbuf_len = self->read_buffer.size - 1;
-    #if MICROPY_HW_UART_TXBUF
-    size_t txbuf_len = self->write_buffer.size - 1;
-    #endif
-    if (self->bits > 8) {
-        rxbuf_len /= 2;
-        #if MICROPY_HW_UART_TXBUF
-        txbuf_len /= 2;
-        #endif
-    }
 
     mp_printf(print, "UART(%u, baudrate=%u, bits=%u, parity=%s, stop=%u, "
-        "timeout=%u, timeout_char=%u, rxbuf=%d"
+        "tx=\"%q\", rx=\"%q\", timeout=%u, timeout_char=%u, rxbuf=%d"
         #if MICROPY_HW_UART_TXBUF
         ", txbuf=%d"
         #endif
@@ -310,9 +304,10 @@ static void mp_machine_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_
         #endif
         ")",
         self->id, self->baudrate, self->bits, _parity_name[self->parity],
-        self->stop + 1, self->timeout, self->timeout_char, rxbuf_len
+        self->stop + 1, pin_find_by_id(self->tx)->name, pin_find_by_id(self->rx)->name,
+        self->timeout, self->timeout_char, self->rxbuf_len
         #if MICROPY_HW_UART_TXBUF
-        , txbuf_len
+        , self->txbuf_len
         #endif
         #if MICROPY_HW_UART_RTSCTS
         , self->rts != 0xff ? pin_find_by_id(self->rts)->name : MP_QSTR_None
@@ -356,6 +351,11 @@ static void mp_machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args,
     // Set bits if configured.
     if (args[ARG_bits].u_int > 0) {
         self->bits = args[ARG_bits].u_int;
+        // Invalidate the buffers since the size may have to be changed
+        self->read_buffer.buf = NULL;
+        #if MICROPY_HW_UART_TXBUF
+        self->write_buffer.buf = NULL;
+        #endif
     }
 
     // Set parity if configured.
@@ -412,7 +412,7 @@ static void mp_machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args,
     }
 
     // Set the RX buffer size if configured.
-    size_t rxbuf_len = DEFAULT_BUFFER_SIZE;
+    size_t rxbuf_len = self->rxbuf_len;
     if (args[ARG_rxbuf].u_int > 0) {
         rxbuf_len = args[ARG_rxbuf].u_int;
         if (rxbuf_len < MIN_BUFFER_SIZE) {
@@ -420,11 +420,16 @@ static void mp_machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args,
         } else if (rxbuf_len > MAX_BUFFER_SIZE) {
             mp_raise_ValueError(MP_ERROR_TEXT("rxbuf too large"));
         }
+        // Force re-allocting of the buffer if the size changed
+        if (rxbuf_len != self->rxbuf_len) {
+            self->read_buffer.buf = NULL;
+            self->rxbuf_len = rxbuf_len;
+        }
     }
 
     #if MICROPY_HW_UART_TXBUF
     // Set the TX buffer size if configured.
-    size_t txbuf_len = DEFAULT_BUFFER_SIZE;
+    size_t txbuf_len = self->txbuf_len;
     if (args[ARG_txbuf].u_int > 0) {
         txbuf_len = args[ARG_txbuf].u_int;
         if (txbuf_len < MIN_BUFFER_SIZE) {
@@ -432,6 +437,11 @@ static void mp_machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args,
         } else if (txbuf_len > MAX_BUFFER_SIZE) {
             mp_raise_ValueError(MP_ERROR_TEXT("txbuf too large"));
         }
+        // Force re-allocting of the buffer if the size changed
+        if (txbuf_len != self->txbuf_len) {
+            self->write_buffer.buf = NULL;
+            self->txbuf_len = txbuf_len;
+        }
     }
     #endif
 
@@ -448,7 +458,7 @@ static void mp_machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args,
 
         // Check the rx/tx pin assignments
         if (self->tx == 0xff || self->rx == 0xff || (self->tx / 4) != (self->rx / 4)) {
-            mp_raise_ValueError(MP_ERROR_TEXT("Non-matching or missing rx/tx"));
+            mp_raise_ValueError(MP_ERROR_TEXT("invalid or missing rx/tx"));
         }
         self->rx_pad_config = get_sercom_config(self->rx, self->id);
         self->tx_pad_config = get_sercom_config(self->tx, self->id);
@@ -460,10 +470,14 @@ static void mp_machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args,
         }
 
         // Allocate the RX/TX buffers.
-        ringbuf_alloc(&(self->read_buffer), rxbuf_len + 1);
+        if (self->read_buffer.buf == NULL) {
+            ringbuf_alloc(&(self->read_buffer), rxbuf_len + 1);
+        }
 
         #if MICROPY_HW_UART_TXBUF
-        ringbuf_alloc(&(self->write_buffer), txbuf_len + 1);
+        if (self->write_buffer.buf == NULL) {
+            ringbuf_alloc(&(self->write_buffer), txbuf_len + 1);
+        }
         #endif
 
         // Step 1: Configure the Pin mux.
@@ -479,10 +493,16 @@ static void mp_machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args,
 }
 
 static mp_obj_t mp_machine_uart_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) {
-    mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true);
+    mp_arg_check_num(n_args, n_kw, MICROPY_HW_DEFAULT_UART_ID < 0 ? 1 : 0, MP_OBJ_FUN_ARGS_MAX, true);
 
     // Get UART bus.
-    int uart_id = mp_obj_get_int(args[0]);
+    int uart_id = MICROPY_HW_DEFAULT_UART_ID;
+
+    if (n_args > 0) {
+        uart_id = mp_obj_get_int(args[0]);
+        n_args--;
+        args++;
+    }
     if (uart_id < 0 || uart_id > SERCOM_INST_NUM) {
         mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("UART(%d) doesn't exist"), uart_id);
     }
@@ -495,8 +515,21 @@ static mp_obj_t mp_machine_uart_make_new(const mp_obj_type_t *type, size_t n_arg
     self->stop = 0;
     self->timeout = 1;
     self->timeout_char = 1;
+    self->rxbuf_len = DEFAULT_BUFFER_SIZE;
+    self->read_buffer.buf = NULL;
+    #if MICROPY_HW_UART_TXBUF
+    self->txbuf_len = DEFAULT_BUFFER_SIZE;
+    self->write_buffer.buf = NULL;
+    #endif
+    #if defined(pin_TX) && defined(pin_RX)
+    // Initialize with the default pins
+    self->tx = mp_hal_get_pin_obj((mp_obj_t)pin_TX);
+    self->rx = mp_hal_get_pin_obj((mp_obj_t)pin_RX);
+    #else
+    // Have to be defined
     self->tx = 0xff;
     self->rx = 0xff;
+    #endif
     #if MICROPY_HW_UART_RTSCTS
     self->rts = 0xff;
     self->cts = 0xff;
@@ -510,7 +543,7 @@ static mp_obj_t mp_machine_uart_make_new(const mp_obj_type_t *type, size_t n_arg
 
     mp_map_t kw_args;
     mp_map_init_fixed_table(&kw_args, n_kw, args + n_args);
-    mp_machine_uart_init_helper(self, n_args - 1, args + 1, &kw_args);
+    mp_machine_uart_init_helper(self, n_args, args, &kw_args);
 
     return MP_OBJ_FROM_PTR(self);
 }
diff --git a/ports/samd/main.c b/ports/samd/main.c
index 2bbaf63e6e4c5..a7da95582f76c 100644
--- a/ports/samd/main.c
+++ b/ports/samd/main.c
@@ -28,6 +28,7 @@
 #include "py/runtime.h"
 #include "py/gc.h"
 #include "py/mperrno.h"
+#include "py/mphal.h"
 #include "py/stackctrl.h"
 #include "shared/readline/readline.h"
 #include "shared/runtime/gchelper.h"
@@ -45,6 +46,7 @@ extern void sercom_deinit_all(void);
 void samd_main(void) {
     mp_stack_set_top(&_estack);
     mp_stack_set_limit(&_estack - &_sstack - 1024);
+    mp_hal_time_ns_set_from_rtc();
 
     for (;;) {
         gc_init(&_sheap, &_eheap);
diff --git a/ports/samd/mcu/samd21/mpconfigmcu.h b/ports/samd/mcu/samd21/mpconfigmcu.h
index 29965f50f63a8..f0a7a73e0c027 100644
--- a/ports/samd/mcu/samd21/mpconfigmcu.h
+++ b/ports/samd/mcu/samd21/mpconfigmcu.h
@@ -1,4 +1,4 @@
-// Deinitions common to all SAMD21 boards
+// Definitions common to all SAMD21 boards
 #include "samd21.h"
 
 #define MICROPY_CONFIG_ROM_LEVEL        (MICROPY_CONFIG_ROM_LEVEL_BASIC_FEATURES)
diff --git a/ports/samd/mcu/samd51/mpconfigmcu.h b/ports/samd/mcu/samd51/mpconfigmcu.h
index 9a7b8528f3573..8cce90b886c07 100644
--- a/ports/samd/mcu/samd51/mpconfigmcu.h
+++ b/ports/samd/mcu/samd51/mpconfigmcu.h
@@ -1,4 +1,4 @@
-// Deinitions common to all SAMD51 boards
+// Definitions common to all SAMD51 boards
 #include "samd51.h"
 
 #define MICROPY_CONFIG_ROM_LEVEL        (MICROPY_CONFIG_ROM_LEVEL_FULL_FEATURES)
@@ -23,7 +23,7 @@ unsigned long trng_random_u32(void);
 #define MICROPY_FATFS_MAX_SS                (4096)
 #define MICROPY_FATFS_LFN_CODE_PAGE         437 /* 1=SFN/ANSI 437=LFN/U.S.(OEM) */
 
-#define VFS_BLOCK_SIZE_BYTES            (1536) //
+#define VFS_BLOCK_SIZE_BYTES            (2048) //
 
 #ifndef MICROPY_HW_UART_TXBUF
 #define MICROPY_HW_UART_TXBUF           (1)
diff --git a/ports/samd/modmachine.c b/ports/samd/modmachine.c
index 65dbf8a7f5039..c20ce8d641d39 100644
--- a/ports/samd/modmachine.c
+++ b/ports/samd/modmachine.c
@@ -42,7 +42,7 @@
 #define DBL_TAP_ADDR    ((volatile uint32_t *)(HSRAM_ADDR + HSRAM_SIZE - 4))
 #endif
 // A board may define a DPL_TAP_ADDR_ALT, which will be set as well
-// Needed at the moment for Sparkfun SAMD51 Thing Plus
+// Needed at the moment for SparkFun SAMD51 Thing Plus
 #define DBL_TAP_MAGIC_LOADER 0xf01669ef
 #define DBL_TAP_MAGIC_RESET 0xf02669ef
 
@@ -65,7 +65,7 @@
 extern bool EIC_occured;
 extern uint32_t _dbl_tap_addr;
 
-NORETURN static void mp_machine_reset(void) {
+MP_NORETURN static void mp_machine_reset(void) {
     *DBL_TAP_ADDR = DBL_TAP_MAGIC_RESET;
     #ifdef DBL_TAP_ADDR_ALT
     *DBL_TAP_ADDR_ALT = DBL_TAP_MAGIC_RESET;
@@ -73,7 +73,7 @@ NORETURN static void mp_machine_reset(void) {
     NVIC_SystemReset();
 }
 
-NORETURN void mp_machine_bootloader(size_t n_args, const mp_obj_t *args) {
+MP_NORETURN void mp_machine_bootloader(size_t n_args, const mp_obj_t *args) {
     *DBL_TAP_ADDR = DBL_TAP_MAGIC_LOADER;
     #ifdef DBL_TAP_ADDR_ALT
     *DBL_TAP_ADDR_ALT = DBL_TAP_MAGIC_LOADER;
@@ -164,7 +164,7 @@ static void mp_machine_lightsleep(size_t n_args, const mp_obj_t *args) {
     set_cpu_freq(freq);
 }
 
-NORETURN static void mp_machine_deepsleep(size_t n_args, const mp_obj_t *args) {
+MP_NORETURN static void mp_machine_deepsleep(size_t n_args, const mp_obj_t *args) {
     mp_machine_lightsleep(n_args, args);
     mp_machine_reset();
 }
diff --git a/ports/samd/modtime.c b/ports/samd/modtime.c
index 83072dd16feeb..0bed3cb83a868 100644
--- a/ports/samd/modtime.c
+++ b/ports/samd/modtime.c
@@ -28,6 +28,8 @@
 #include "shared/timeutils/timeutils.h"
 #include "modmachine.h"
 
+static uint64_t time_us_64_offset_from_epoch;
+
 // Return the localtime as an 8-tuple.
 static mp_obj_t mp_time_localtime_get(void) {
     timeutils_struct_time_t tm;
@@ -54,3 +56,15 @@ static mp_obj_t mp_time_time_get(void) {
     return mp_obj_new_int_from_uint(timeutils_mktime(
         tm.tm_year, tm.tm_mon, tm.tm_mday, tm.tm_hour, tm.tm_min, tm.tm_sec));
 }
+
+void mp_hal_time_ns_set_from_rtc(void) {
+    timeutils_struct_time_t tm;
+    rtc_gettime(&tm);
+    uint64_t time_us = (uint64_t)timeutils_mktime(tm.tm_year, tm.tm_mon, tm.tm_mday, tm.tm_hour,
+        tm.tm_min, tm.tm_sec) * 1000000ULL;
+    time_us_64_offset_from_epoch = time_us - mp_hal_ticks_us_64();
+}
+
+uint64_t mp_hal_time_ns(void) {
+    return (time_us_64_offset_from_epoch + mp_hal_ticks_us_64()) * 1000ULL;
+}
diff --git a/ports/samd/mpconfigport.h b/ports/samd/mpconfigport.h
index 0b47500bf7e7c..514f383948838 100644
--- a/ports/samd/mpconfigport.h
+++ b/ports/samd/mpconfigport.h
@@ -138,6 +138,15 @@
 #ifndef MICROPY_HW_USB_PID
 #define MICROPY_HW_USB_PID (0x9802)
 #endif
+#ifndef MICROPY_HW_DEFAULT_UART_ID
+#define MICROPY_HW_DEFAULT_UART_ID          (-1)
+#endif
+#ifndef MICROPY_HW_DEFAULT_I2C_ID
+#define MICROPY_HW_DEFAULT_I2C_ID           (-1)
+#endif
+#ifndef MICROPY_HW_DEFAULT_SPI_ID
+#define MICROPY_HW_DEFAULT_SPI_ID           (-1)
+#endif
 
 // Additional entries for use with pendsv_schedule_dispatch.
 #ifndef MICROPY_BOARD_PENDSV_ENTRIES
diff --git a/ports/samd/mphalport.h b/ports/samd/mphalport.h
index 6c9e525bb9162..69e2b606408be 100644
--- a/ports/samd/mphalport.h
+++ b/ports/samd/mphalport.h
@@ -47,6 +47,7 @@ extern int mp_interrupt_char;
 extern ringbuf_t stdin_ringbuf;
 extern volatile uint32_t systick_ms;
 uint64_t mp_hal_ticks_us_64(void);
+void mp_hal_time_ns_set_from_rtc(void);
 
 void mp_hal_set_interrupt_char(int c);
 
@@ -94,10 +95,6 @@ static inline mp_uint_t mp_hal_ticks_cpu(void) {
 }
 #endif
 
-static inline uint64_t mp_hal_time_ns(void) {
-    return mp_hal_ticks_us_64() * 1000;
-}
-
 // C-level pin HAL
 
 #include "py/obj.h"
diff --git a/ports/samd/samd_qspiflash.c b/ports/samd/samd_qspiflash.c
index e25ddf21efe8f..f314a955197d6 100644
--- a/ports/samd/samd_qspiflash.c
+++ b/ports/samd/samd_qspiflash.c
@@ -105,7 +105,6 @@ static const external_flash_device possible_devices[] = {
 
 #define EXTERNAL_FLASH_DEVICE_COUNT MP_ARRAY_SIZE(possible_devices)
 static external_flash_device const *flash_device;
-static external_flash_device generic_config = GENERIC;
 extern const mp_obj_type_t samd_qspiflash_type;
 
 // The QSPIflash object is a singleton
@@ -248,15 +247,6 @@ static uint8_t get_baud(int32_t freq_mhz) {
     return baud;
 }
 
-int get_sfdp_table(uint8_t *table, int maxlen) {
-    uint8_t header[16];
-    read_memory_single(QSPI_CMD_READ_SFDP_PARAMETER, 0, header, sizeof(header));
-    int len = MIN(header[11] * 4, maxlen);
-    int addr = header[12] + (header[13] << 8) + (header[14] << 16);
-    read_memory_single(QSPI_CMD_READ_SFDP_PARAMETER, addr, table, len);
-    return len;
-}
-
 static mp_obj_t samd_qspiflash_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) {
     mp_arg_check_num(n_args, n_kw, 0, 0, false);
 
@@ -297,19 +287,6 @@ static mp_obj_t samd_qspiflash_make_new(const mp_obj_type_t *type, size_t n_args
     uint8_t jedec_ids[3];
     read_command(QSPI_CMD_READ_JEDEC_ID, jedec_ids, sizeof(jedec_ids));
 
-    // Read the common sfdp table
-    // Check the device addr length, support of 1-1-4 mode and get the sector size
-    uint8_t sfdp_table[128];
-    int len = get_sfdp_table(sfdp_table, sizeof(sfdp_table));
-    if (len >= 29) {
-        self->sectorsize = 1 << sfdp_table[28];
-        bool addr4b = ((sfdp_table[2] >> 1) & 0x03) == 0x02;
-        bool supports_qspi_114 = (sfdp_table[2] & 0x40) != 0;
-        if (addr4b || !supports_qspi_114) {
-            mp_raise_ValueError(MP_ERROR_TEXT("QSPI mode not supported"));
-        }
-    }
-
     // Check, if the flash device is known and get it's properties.
     flash_device = NULL;
     for (uint8_t i = 0; i < EXTERNAL_FLASH_DEVICE_COUNT; i++) {
@@ -321,15 +298,8 @@ static mp_obj_t samd_qspiflash_make_new(const mp_obj_type_t *type, size_t n_args
             break;
         }
     }
-
-    // If the flash device is not known, try generic config options
     if (flash_device == NULL) {
-        if (jedec_ids[0] == 0xc2) { // Macronix devices
-            generic_config.quad_enable_bit_mask = 0x04;
-            generic_config.single_status_byte = true;
-        }
-        generic_config.total_size = 1 << jedec_ids[2];
-        flash_device = &generic_config;
+        mp_raise_ValueError(MP_ERROR_TEXT("QSPI device not supported"));
     }
 
     self->size = flash_device->total_size;
diff --git a/ports/samd/samd_spiflash.c b/ports/samd/samd_spiflash.c
index 8ada7e96092c2..63dc0a83045b1 100644
--- a/ports/samd/samd_spiflash.c
+++ b/ports/samd/samd_spiflash.c
@@ -67,6 +67,19 @@ typedef struct _spiflash_obj_t {
 
 extern const mp_obj_type_t samd_spiflash_type;
 
+typedef struct _spiflash_jedec_id_t {
+    uint32_t jedec_id;
+    uint32_t mask;
+    uint32_t size;
+}  spiflash_jedec_id_t;
+
+spiflash_jedec_id_t jedec_id_table[] = {
+    { 0x1f8401, 0xffff00, 512 * 1024 }, // Adesto/Renesas 4 MBit
+    { 0x1f2400, 0xffff00, 512 * 1024 }, // Adesto 4 MBit
+    { 0x1f4501, 0xffff00, 1024 * 1024 }, // Adesto/Renesas/Atmel 8 MBit
+    { 0xc84013, 0xffffff, 512 * 1024 }, // Gigadevices 4 MBit
+};
+
 // The SPIflash object is a singleton
 static spiflash_obj_t spiflash_obj = {
     { &samd_spiflash_type }, NULL, 0, false, PAGE_SIZE, SECTOR_SIZE, NULL, 0
@@ -124,6 +137,7 @@ static void write_enable(spiflash_obj_t *self) {
     mp_hal_pin_write(self->cs, 1);
 }
 
+#if !defined(MICROPY_HW_SPIFLASH_SIZE)
 // Write status register 1
 static void write_sr1(spiflash_obj_t *self, uint8_t value) {
     uint8_t msg[2];
@@ -134,6 +148,7 @@ static void write_sr1(spiflash_obj_t *self, uint8_t value) {
     spi_transfer(self->spi, 2, msg, NULL);
     mp_hal_pin_write(self->cs, 1);
 }
+#endif
 
 static void get_sfdp(spiflash_obj_t *self, uint32_t addr, uint8_t *buffer, int size) {
     uint8_t dummy[1];
@@ -170,32 +185,46 @@ static mp_obj_t spiflash_make_new(const mp_obj_type_t *type, size_t n_args, size
     // Get the flash size from the device ID (default)
     uint8_t id[3];
     get_id(self, id);
-    bool read_sfdp = true;
-
-    if (id[1] == 0x84 && id[2] == 1) {  // Adesto
-        self->size = 512 * 1024;
-    } else if (id[0] == 0x1f && id[1] == 0x45 && id[2] == 1) {  // Adesto/Renesas 8 MBit
-        self->size = 1024 * 1024;
-        read_sfdp = false;
-        self->sectorsize = 4096;
-        self->addr_is_32bit = false;
-        // Globally unlock the sectors, which are locked after power on.
-        write_enable(self);
-        write_sr1(self, 0);
-    } else {
-        self->size = 1 << id[2];
+
+    #if defined(MICROPY_HW_SPIFLASH_SIZE)
+    self->size = MICROPY_HW_SPIFLASH_SIZE;
+    #else
+    // Assume as default that the size is coded into the last JEDEC ID byte.
+    self->size = 1 << id[2];
+    // Look for specific flash devices with different encoding.
+    uint32_t jedec_id = (id[0] << 16) | (id[1] << 8) | id[2];
+    for (int i = 0; i < MP_ARRAY_SIZE(jedec_id_table); i++) {
+        if (jedec_id_table[i].jedec_id == (jedec_id & jedec_id_table[i].mask)) {
+            self->size = jedec_id_table[i].size;
+            // Globally unlock the sectors, which may be locked after power on.
+            write_enable(self);
+            write_sr1(self, 0);
+            break;
+        }
     }
+    #endif
 
-    // Get the addr_is_32bit flag and the sector size
-    if (read_sfdp) {
-        uint8_t buffer[128];
-        get_sfdp(self, 0, buffer, 16);  // get the header
+    // Get the flash size, addr_is_32bit flag and sector size from SFDP, if present.
+    uint8_t buffer[128];
+    get_sfdp(self, 0, buffer, 16);  // get the header
+    if (*(uint32_t *)buffer == 0x50444653) {  // Header signature "SFDP"
         int len = MIN(buffer[11] * 4, sizeof(buffer));
         if (len >= 29) {
             int addr = buffer[12] + (buffer[13] << 8) + (buffer[14] << 16);
             get_sfdp(self, addr, buffer, len);  // Get the JEDEC mandatory table
             self->sectorsize = 1 << buffer[28];
             self->addr_is_32bit = ((buffer[2] >> 1) & 0x03) != 0;
+            #if !defined(MICROPY_HW_SPIFLASH_SIZE)
+            // Get the bit size from the SFDP data
+            uint32_t size = *(uint32_t *)(buffer + 4);
+            if (size & 0x8000000) {
+                // Byte size is 2 ** lower_31_bits / 8
+                self->size = 1 << ((size & 0x7fffffff) >> 3);
+            } else {
+                // Byte size is lower_31_bits / 8 + 1
+                self->size = ((size & 0x7fffffff) >> 3) + 1;
+            }
+            #endif
         }
     }
     self->commands = self->addr_is_32bit ? _COMMANDS_32BIT : _COMMANDS_24BIT;
diff --git a/ports/stm32/Makefile b/ports/stm32/Makefile
index a9612f1a5792e..8ac9a8af03d1a 100644
--- a/ports/stm32/Makefile
+++ b/ports/stm32/Makefile
@@ -291,6 +291,7 @@ SRC_C += \
 	storage.c \
 	sdcard.c \
 	sdram.c \
+	vfs_rom_ioctl.c \
 	fatfs_port.c \
 	lcd.c \
 	accel.c \
diff --git a/ports/stm32/boardctrl.c b/ports/stm32/boardctrl.c
index 8f0d066f372b4..ea95c8d2d59dd 100644
--- a/ports/stm32/boardctrl.c
+++ b/ports/stm32/boardctrl.c
@@ -35,7 +35,7 @@
 #include "led.h"
 #include "usrsw.h"
 
-NORETURN void boardctrl_fatal_error(const char *msg) {
+MP_NORETURN void boardctrl_fatal_error(const char *msg) {
     for (volatile uint delay = 0; delay < 10000000; delay++) {
     }
     led_state(1, 1);
diff --git a/ports/stm32/boardctrl.h b/ports/stm32/boardctrl.h
index 8f4ce30eff80a..1a03925ef46da 100644
--- a/ports/stm32/boardctrl.h
+++ b/ports/stm32/boardctrl.h
@@ -114,7 +114,7 @@ typedef struct _boardctrl_state_t {
     bool log_soft_reset;
 } boardctrl_state_t;
 
-NORETURN void boardctrl_fatal_error(const char *msg);
+MP_NORETURN void boardctrl_fatal_error(const char *msg);
 void boardctrl_maybe_enter_mboot(size_t n_args, const void *args);
 void boardctrl_before_soft_reset_loop(boardctrl_state_t *state);
 void boardctrl_top_soft_reset_loop(boardctrl_state_t *state);
diff --git a/ports/stm32/boards/ARDUINO_GIGA/board.json b/ports/stm32/boards/ARDUINO_GIGA/board.json
index 53c636c774418..a99e747017773 100644
--- a/ports/stm32/boards/ARDUINO_GIGA/board.json
+++ b/ports/stm32/boards/ARDUINO_GIGA/board.json
@@ -15,7 +15,7 @@
         "ABX00063_01.front_1000x750.jpg"
     ],
     "mcu": "stm32h7",
-    "product": "Arduino Giga",
+    "product": "Giga",
     "thumbnail": "",
     "url": "https://store.arduino.cc/products/giga-r1-wifi",
     "vendor": "Arduino"
diff --git a/ports/stm32/boards/ARDUINO_GIGA/mpconfigboard.h b/ports/stm32/boards/ARDUINO_GIGA/mpconfigboard.h
index fdf3128a3606d..cef45d730cc20 100644
--- a/ports/stm32/boards/ARDUINO_GIGA/mpconfigboard.h
+++ b/ports/stm32/boards/ARDUINO_GIGA/mpconfigboard.h
@@ -32,6 +32,11 @@ typedef unsigned int mp_uint_t;     // must be pointer size
 #define MICROPY_HW_ENTER_BOOTLOADER_VIA_RESET   (0)
 #define MICROPY_HW_TIM_IS_RESERVED(id) (id == 1)
 
+// ROMFS config
+#define MICROPY_HW_ROMFS_ENABLE_EXTERNAL_QSPI       (1)
+#define MICROPY_HW_ROMFS_QSPI_SPIFLASH_OBJ          (&spi_bdev.spiflash)
+#define MICROPY_HW_ROMFS_ENABLE_PART0               (1)
+
 // Flash storage config
 #define MICROPY_HW_SPIFLASH_ENABLE_CACHE            (1)
 #define MICROPY_HW_SPIFLASH_SOFT_RESET              (1)
@@ -125,8 +130,8 @@ void GIGA_board_low_power(int mode);
 // QSPI flash #1 for storage
 #define MICROPY_HW_QSPI_PRESCALER           (2) // 100MHz
 #define MICROPY_HW_QSPIFLASH_SIZE_BITS_LOG2 (27)
-// Reserve 1MiB at the end for compatibility with alternate firmware that places WiFi blob here.
-#define MICROPY_HW_SPIFLASH_SIZE_BITS       (120 * 1024 * 1024)
+// Reserve 4MiB for romfs and 1MiB for WiFi/BT firmware.
+#define MICROPY_HW_SPIFLASH_SIZE_BITS       (88 * 1024 * 1024)
 #define MICROPY_HW_QSPIFLASH_CS             (pyb_pin_QSPI2_CS)
 #define MICROPY_HW_QSPIFLASH_SCK            (pyb_pin_QSPI2_CLK)
 #define MICROPY_HW_QSPIFLASH_IO0            (pyb_pin_QSPI2_D0)
diff --git a/ports/stm32/boards/ARDUINO_GIGA/stm32h747.ld b/ports/stm32/boards/ARDUINO_GIGA/stm32h747.ld
index 793a76b970292..e7bb950dbe6ce 100644
--- a/ports/stm32/boards/ARDUINO_GIGA/stm32h747.ld
+++ b/ports/stm32/boards/ARDUINO_GIGA/stm32h747.ld
@@ -13,11 +13,11 @@ MEMORY
     SRAM3 (xrw)     : ORIGIN = 0x30040000, LENGTH = 32K     /* SRAM3 D2    */
     SRAM4 (xrw)     : ORIGIN = 0x38000000, LENGTH = 64K     /* SRAM4 D3    */
     FLASH (rx)      : ORIGIN = 0x08000000, LENGTH = 2048K   /* Total available flash */
-    FLASH_EXT (rx)  : ORIGIN = 0x90000000, LENGTH = 16384K  /* 16MBs external QSPI flash */
     FLASH_BL (rx)   : ORIGIN = 0x08000000, LENGTH = 128K    /* Arduino bootloader */
     FLASH_FS (r)    : ORIGIN = 0x08020000, LENGTH = 128K    /* filesystem */
     FLASH_TEXT (rx) : ORIGIN = 0x08040000, LENGTH = 1280K   /* CM7 firmware */
     FLASH_CM4 (rx)  : ORIGIN = 0x08180000, LENGTH = 512K    /* CM4 firmware */
+    FLASH_ROMFS (rx) : ORIGIN = 0x90B00000, LENGTH = 4096K   /* romfs partition in QSPI flash */
 }
 
 /* produce a link error if there is not this amount of RAM for these sections */
@@ -44,6 +44,10 @@ _micropy_hw_internal_flash_storage_ram_cache_end = ORIGIN(DTCM) + LENGTH(DTCM);
 _micropy_hw_internal_flash_storage_start = ORIGIN(FLASH_FS);
 _micropy_hw_internal_flash_storage_end = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS);
 
+/* Location of romfs filesystem */
+_micropy_hw_romfs_part0_start = ORIGIN(FLASH_ROMFS);
+_micropy_hw_romfs_part0_size = LENGTH(FLASH_ROMFS);
+
 /* OpenAMP shared memory region */
 _openamp_shm_region_start = ORIGIN(SRAM4);
 _openamp_shm_region_end = ORIGIN(SRAM4) + LENGTH(SRAM4);
diff --git a/ports/stm32/boards/ARDUINO_NICLA_VISION/board.json b/ports/stm32/boards/ARDUINO_NICLA_VISION/board.json
index a4c81d69d4277..129d9f2fc7c0e 100644
--- a/ports/stm32/boards/ARDUINO_NICLA_VISION/board.json
+++ b/ports/stm32/boards/ARDUINO_NICLA_VISION/board.json
@@ -15,7 +15,7 @@
         "ABX00051_01.iso_1000x750.jpg"
     ],
     "mcu": "stm32h7",
-    "product": "Arduino Nicla Vision",
+    "product": "Nicla Vision",
     "thumbnail": "",
     "url": "https://store.arduino.cc/products/nicla-vision",
     "vendor": "Arduino"
diff --git a/ports/stm32/boards/ARDUINO_NICLA_VISION/mpconfigboard.h b/ports/stm32/boards/ARDUINO_NICLA_VISION/mpconfigboard.h
index 505f8b6890169..47bf1be23d460 100644
--- a/ports/stm32/boards/ARDUINO_NICLA_VISION/mpconfigboard.h
+++ b/ports/stm32/boards/ARDUINO_NICLA_VISION/mpconfigboard.h
@@ -32,6 +32,11 @@ typedef unsigned int mp_uint_t;     // must be pointer size
 #define MICROPY_HW_ENTER_BOOTLOADER_VIA_RESET   (0)
 #define MICROPY_HW_TIM_IS_RESERVED(id) (id == 3)
 
+// ROMFS config
+#define MICROPY_HW_ROMFS_ENABLE_EXTERNAL_QSPI       (1)
+#define MICROPY_HW_ROMFS_QSPI_SPIFLASH_OBJ          (&spi_bdev.spiflash)
+#define MICROPY_HW_ROMFS_ENABLE_PART0               (1)
+
 // Flash storage config
 #define MICROPY_HW_SPIFLASH_ENABLE_CACHE            (1)
 #define MICROPY_HW_SPIFLASH_SOFT_RESET              (1)
@@ -130,8 +135,8 @@ void NICLAV_board_osc_enable(int enable);
 // QSPI flash for storage
 #define MICROPY_HW_QSPI_PRESCALER           (2) // 100MHz
 #define MICROPY_HW_QSPIFLASH_SIZE_BITS_LOG2 (27)
-// Reserve 1MiB at the end for compatibility with alternate firmware that places WiFi blob here.
-#define MICROPY_HW_SPIFLASH_SIZE_BITS       (120 * 1024 * 1024)
+// Reserve 4MiB for romfs and 1MiB for WiFi/BT firmware.
+#define MICROPY_HW_SPIFLASH_SIZE_BITS       (88 * 1024 * 1024)
 #define MICROPY_HW_QSPIFLASH_CS             (pyb_pin_QSPI2_CS)
 #define MICROPY_HW_QSPIFLASH_SCK            (pyb_pin_QSPI2_CLK)
 #define MICROPY_HW_QSPIFLASH_IO0            (pyb_pin_QSPI2_D0)
diff --git a/ports/stm32/boards/ARDUINO_NICLA_VISION/stm32h747.ld b/ports/stm32/boards/ARDUINO_NICLA_VISION/stm32h747.ld
index 6d6ce279f299c..9bd7f49a8ecaf 100644
--- a/ports/stm32/boards/ARDUINO_NICLA_VISION/stm32h747.ld
+++ b/ports/stm32/boards/ARDUINO_NICLA_VISION/stm32h747.ld
@@ -13,11 +13,11 @@ MEMORY
     SRAM3 (xrw)     : ORIGIN = 0x30040000, LENGTH = 32K     /* SRAM3 D2    */
     SRAM4 (xrw)     : ORIGIN = 0x38000000, LENGTH = 64K     /* SRAM4 D3    */
     FLASH (rx)      : ORIGIN = 0x08000000, LENGTH = 2048K   /* Total available flash */
-    FLASH_EXT (rx)  : ORIGIN = 0x90000000, LENGTH = 16384K  /* 16MBs external QSPI flash */
     FLASH_BL (rx)   : ORIGIN = 0x08000000, LENGTH = 128K    /* Arduino bootloader */
     FLASH_FS (r)    : ORIGIN = 0x08020000, LENGTH = 128K    /* filesystem */
     FLASH_TEXT (rx) : ORIGIN = 0x08040000, LENGTH = 1280K   /* CM7 firmware */
     FLASH_CM4 (rx)  : ORIGIN = 0x08180000, LENGTH = 512K    /* CM4 firmware */
+    FLASH_ROMFS (rx) : ORIGIN = 0x90B00000, LENGTH = 4096K   /* romfs partition in QSPI flash */
 }
 
 _cm4_ram_start = ORIGIN(SRAM4);
@@ -46,6 +46,10 @@ _micropy_hw_internal_flash_storage_ram_cache_end = ORIGIN(DTCM) + LENGTH(DTCM);
 _micropy_hw_internal_flash_storage_start = ORIGIN(FLASH_FS);
 _micropy_hw_internal_flash_storage_end = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS);
 
+/* Location of romfs filesystem */
+_micropy_hw_romfs_part0_start = ORIGIN(FLASH_ROMFS);
+_micropy_hw_romfs_part0_size = LENGTH(FLASH_ROMFS);
+
 /* OpenAMP shared memory region */
 _openamp_shm_region_start = ORIGIN(SRAM4);
 _openamp_shm_region_end = ORIGIN(SRAM4) + LENGTH(SRAM4);
diff --git a/ports/stm32/boards/ARDUINO_OPTA/board.json b/ports/stm32/boards/ARDUINO_OPTA/board.json
index 3955d7df3182d..dd6c39a191418 100644
--- a/ports/stm32/boards/ARDUINO_OPTA/board.json
+++ b/ports/stm32/boards/ARDUINO_OPTA/board.json
@@ -14,7 +14,7 @@
         "AFX00002_01.iso_1000x750.jpg"
     ],
     "mcu": "stm32h7",
-    "product": "Arduino Opta WiFi",
+    "product": "Opta WiFi",
     "thumbnail": "",
     "url": "https://store.arduino.cc/products/opta-wifi",
     "vendor": "Arduino"
diff --git a/ports/stm32/boards/ARDUINO_PORTENTA_H7/board.json b/ports/stm32/boards/ARDUINO_PORTENTA_H7/board.json
index f39d7d4c4792d..c97b9f165c8dc 100644
--- a/ports/stm32/boards/ARDUINO_PORTENTA_H7/board.json
+++ b/ports/stm32/boards/ARDUINO_PORTENTA_H7/board.json
@@ -16,7 +16,7 @@
         "ABX00042_01.iso_1000x750.jpg"
     ],
     "mcu": "stm32h7",
-    "product": "Arduino Portenta H7",
+    "product": "Portenta H7",
     "thumbnail": "",
     "url": "https://store.arduino.cc/products/portenta-h7",
     "vendor": "Arduino"
diff --git a/ports/stm32/boards/ARDUINO_PORTENTA_H7/mpconfigboard.h b/ports/stm32/boards/ARDUINO_PORTENTA_H7/mpconfigboard.h
index 900bf18673728..90a1469056634 100644
--- a/ports/stm32/boards/ARDUINO_PORTENTA_H7/mpconfigboard.h
+++ b/ports/stm32/boards/ARDUINO_PORTENTA_H7/mpconfigboard.h
@@ -32,6 +32,11 @@ typedef unsigned int mp_uint_t;     // must be pointer size
 #define MICROPY_HW_ENTER_BOOTLOADER_VIA_RESET   (0)
 #define MICROPY_HW_TIM_IS_RESERVED(id) (id == 1)
 
+// ROMFS config
+#define MICROPY_HW_ROMFS_ENABLE_EXTERNAL_QSPI       (1)
+#define MICROPY_HW_ROMFS_QSPI_SPIFLASH_OBJ          (&spi_bdev.spiflash)
+#define MICROPY_HW_ROMFS_ENABLE_PART0               (1)
+
 // Flash storage config
 #define MICROPY_HW_SPIFLASH_ENABLE_CACHE            (1)
 #define MICROPY_HW_SPIFLASH_SOFT_RESET              (1)
@@ -129,8 +134,8 @@ void PORTENTA_board_osc_enable(int enable);
 // QSPI flash #1 for storage
 #define MICROPY_HW_QSPI_PRESCALER           (2) // 100MHz
 #define MICROPY_HW_QSPIFLASH_SIZE_BITS_LOG2 (27)
-// Reserve 1MiB at the end for compatibility with alternate firmware that places WiFi blob here.
-#define MICROPY_HW_SPIFLASH_SIZE_BITS       (120 * 1024 * 1024)
+// Reserve 4MiB for romfs and 1MiB for WiFi/BT firmware.
+#define MICROPY_HW_SPIFLASH_SIZE_BITS       (88 * 1024 * 1024)
 #define MICROPY_HW_QSPIFLASH_CS             (pyb_pin_QSPI2_CS)
 #define MICROPY_HW_QSPIFLASH_SCK            (pyb_pin_QSPI2_CLK)
 #define MICROPY_HW_QSPIFLASH_IO0            (pyb_pin_QSPI2_D0)
diff --git a/ports/stm32/boards/ARDUINO_PORTENTA_H7/stm32h747.ld b/ports/stm32/boards/ARDUINO_PORTENTA_H7/stm32h747.ld
index 793a76b970292..e7bb950dbe6ce 100644
--- a/ports/stm32/boards/ARDUINO_PORTENTA_H7/stm32h747.ld
+++ b/ports/stm32/boards/ARDUINO_PORTENTA_H7/stm32h747.ld
@@ -13,11 +13,11 @@ MEMORY
     SRAM3 (xrw)     : ORIGIN = 0x30040000, LENGTH = 32K     /* SRAM3 D2    */
     SRAM4 (xrw)     : ORIGIN = 0x38000000, LENGTH = 64K     /* SRAM4 D3    */
     FLASH (rx)      : ORIGIN = 0x08000000, LENGTH = 2048K   /* Total available flash */
-    FLASH_EXT (rx)  : ORIGIN = 0x90000000, LENGTH = 16384K  /* 16MBs external QSPI flash */
     FLASH_BL (rx)   : ORIGIN = 0x08000000, LENGTH = 128K    /* Arduino bootloader */
     FLASH_FS (r)    : ORIGIN = 0x08020000, LENGTH = 128K    /* filesystem */
     FLASH_TEXT (rx) : ORIGIN = 0x08040000, LENGTH = 1280K   /* CM7 firmware */
     FLASH_CM4 (rx)  : ORIGIN = 0x08180000, LENGTH = 512K    /* CM4 firmware */
+    FLASH_ROMFS (rx) : ORIGIN = 0x90B00000, LENGTH = 4096K   /* romfs partition in QSPI flash */
 }
 
 /* produce a link error if there is not this amount of RAM for these sections */
@@ -44,6 +44,10 @@ _micropy_hw_internal_flash_storage_ram_cache_end = ORIGIN(DTCM) + LENGTH(DTCM);
 _micropy_hw_internal_flash_storage_start = ORIGIN(FLASH_FS);
 _micropy_hw_internal_flash_storage_end = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS);
 
+/* Location of romfs filesystem */
+_micropy_hw_romfs_part0_start = ORIGIN(FLASH_ROMFS);
+_micropy_hw_romfs_part0_size = LENGTH(FLASH_ROMFS);
+
 /* OpenAMP shared memory region */
 _openamp_shm_region_start = ORIGIN(SRAM4);
 _openamp_shm_region_end = ORIGIN(SRAM4) + LENGTH(SRAM4);
diff --git a/ports/stm32/boards/HYDRABUS/board.json b/ports/stm32/boards/HYDRABUS/board.json
index 20a2ac5eaef7e..24df6ac99f5c1 100644
--- a/ports/stm32/boards/HYDRABUS/board.json
+++ b/ports/stm32/boards/HYDRABUS/board.json
@@ -10,6 +10,6 @@
     "mcu": "stm32f4",
     "product": "HydraBus v1.0",
     "thumbnail": "",
-    "url": "",
+    "url": "https://github.com/hydrabus/hydrabus",
     "vendor": "HydraBus"
 }
diff --git a/ports/stm32/boards/LIMIFROG/board.json b/ports/stm32/boards/LIMIFROG/board.json
index f516963a5bac2..36c80f8f72478 100644
--- a/ports/stm32/boards/LIMIFROG/board.json
+++ b/ports/stm32/boards/LIMIFROG/board.json
@@ -10,6 +10,6 @@
     "mcu": "stm32l4",
     "product": "LimiFrog",
     "thumbnail": "",
-    "url": "",
+    "url": "https://github.com/LimiFrog",
     "vendor": "LimiFrog"
 }
diff --git a/ports/stm32/boards/OLIMEX_E407/board.json b/ports/stm32/boards/OLIMEX_E407/board.json
index c14755c564d91..408df5a320049 100644
--- a/ports/stm32/boards/OLIMEX_E407/board.json
+++ b/ports/stm32/boards/OLIMEX_E407/board.json
@@ -8,8 +8,8 @@
         "olimex_e407.jpg"
     ],
     "mcu": "stm32f4",
-    "product": "E407",
+    "product": "STM32-E407",
     "thumbnail": "",
-    "url": "",
-    "vendor": "OLIMEX"
+    "url": "https://www.olimex.com/Products/ARM/ST/STM32-E407",
+    "vendor": "Olimex"
 }
diff --git a/ports/stm32/boards/OLIMEX_H407/board.json b/ports/stm32/boards/OLIMEX_H407/board.json
index 9ecc860ddc2e3..27d294051312e 100644
--- a/ports/stm32/boards/OLIMEX_H407/board.json
+++ b/ports/stm32/boards/OLIMEX_H407/board.json
@@ -8,8 +8,8 @@
         "olimex_h407.jpg"
     ],
     "mcu": "stm32f4",
-    "product": "H407",
+    "product": "STM32-H407",
     "thumbnail": "",
-    "url": "",
-    "vendor": "OLIMEX"
+    "url": "https://www.olimex.com/Products/ARM/ST/STM32-H407",
+    "vendor": "Olimex"
 }
diff --git a/ports/stm32/boards/PYBD_SF2/board_init.c b/ports/stm32/boards/PYBD_SF2/board_init.c
index b39da97c4584e..2f277d1cce737 100644
--- a/ports/stm32/boards/PYBD_SF2/board_init.c
+++ b/ports/stm32/boards/PYBD_SF2/board_init.c
@@ -61,6 +61,16 @@ void board_early_init(void) {
 
 #if !BUILDING_MBOOT
 
+#include "boardctrl.h"
+#include "qspi.h"
+
+int board_run_boot_py(boardctrl_state_t *state) {
+    // Due to errata 2.4.3, restart memory-mapped mode to deactivate the CS line and save power.
+    qspi_memory_map_restart();
+
+    return boardctrl_run_boot_py(state);
+}
+
 void board_sleep(int value) {
     mp_spiflash_deepsleep(&spi_bdev.spiflash, value);
     mp_spiflash_deepsleep(&spi_bdev2.spiflash, value);
diff --git a/ports/stm32/boards/PYBD_SF2/f722_qspi.ld b/ports/stm32/boards/PYBD_SF2/f722_qspi.ld
index 70d7f9cc4b8e4..354c1919b41a3 100644
--- a/ports/stm32/boards/PYBD_SF2/f722_qspi.ld
+++ b/ports/stm32/boards/PYBD_SF2/f722_qspi.ld
@@ -20,7 +20,8 @@ MEMORY
 {
     FLASH (rx)      : ORIGIN = 0x08000000, LENGTH = 512K
     FLASH_APP (rx)  : ORIGIN = 0x08008000, LENGTH = 480K    /* sectors 2-7 */
-    FLASH_EXT (rx)  : ORIGIN = 0x90000000, LENGTH = 2048K   /* external QSPI */
+    FLASH_EXT (rx)  : ORIGIN = 0x90000000, LENGTH = 1024K   /* external QSPI */
+    FLASH_ROMFS (rx): ORIGIN = 0x90100000, LENGTH = 1024K   /* external QSPI */
     RAM (rwx)       : ORIGIN = 0x20000000, LENGTH = 256K    /* DTCM+SRAM1+SRAM2 */
 }
 
@@ -39,6 +40,10 @@ _ram_end = ORIGIN(RAM) + LENGTH(RAM);
 _heap_start = _ebss; /* heap starts just after statically allocated memory */
 _heap_end = _sstack;
 
+/* ROMFS location */
+_micropy_hw_romfs_part0_start = ORIGIN(FLASH_ROMFS);
+_micropy_hw_romfs_part0_size = LENGTH(FLASH_ROMFS);
+
 /* Define output sections */
 SECTIONS
 {
@@ -49,7 +54,7 @@ SECTIONS
         *lib/mbedtls/*(.text* .rodata*)
         *lib/mynewt-nimble/*(.text* .rodata*)
         *lib/cyw43-driver/*(.rodata.w4343*_combined)
-        *drivers/cyw43/*(.rodata.cyw43_btfw_*)
+        *lib/cyw43-driver/*(.rodata.cyw43_btfw_*)
         . = ALIGN(4);
     } >FLASH_EXT
 }
diff --git a/ports/stm32/boards/PYBD_SF2/mpconfigboard.h b/ports/stm32/boards/PYBD_SF2/mpconfigboard.h
index f0ef67e77e604..da5ab9e7fa1eb 100644
--- a/ports/stm32/boards/PYBD_SF2/mpconfigboard.h
+++ b/ports/stm32/boards/PYBD_SF2/mpconfigboard.h
@@ -43,11 +43,14 @@
 #define MICROPY_HW_ENABLE_RF_SWITCH (1)
 
 #define MICROPY_BOARD_EARLY_INIT    board_early_init
+#define MICROPY_BOARD_RUN_BOOT_PY   board_run_boot_py
 #define MICROPY_BOARD_ENTER_STOP    board_sleep(1);
 #define MICROPY_BOARD_LEAVE_STOP    board_sleep(0);
 #define MICROPY_BOARD_ENTER_STANDBY board_sleep(1);
 #define MICROPY_BOARD_SDCARD_POWER  mp_hal_pin_high(pyb_pin_EN_3V3);
+struct _boardctrl_state_t;
 void board_early_init(void);
+int board_run_boot_py(struct _boardctrl_state_t *state);
 void board_sleep(int value);
 
 // HSE is 25MHz, run SYS at 120MHz
@@ -64,6 +67,11 @@ void board_sleep(int value);
 #define MICROPY_HW_RTC_USE_US       (1)
 #define MICROPY_HW_RTC_USE_CALOUT   (1)
 
+// ROMFS config
+#define MICROPY_HW_ROMFS_ENABLE_EXTERNAL_QSPI (1)
+#define MICROPY_HW_ROMFS_QSPI_SPIFLASH_OBJ (&spi_bdev2.spiflash)
+#define MICROPY_HW_ROMFS_ENABLE_PART0 (1)
+
 // SPI flash #1, for R/W storage
 #define MICROPY_HW_SOFTQSPI_SCK_LOW(self) (GPIOE->BSRR = (0x10000 << 11))
 #define MICROPY_HW_SOFTQSPI_SCK_HIGH(self) (GPIOE->BSRR = (1 << 11))
diff --git a/ports/stm32/boards/PYBD_SF6/board_init.c b/ports/stm32/boards/PYBD_SF6/board_init.c
index c7a9f28006be3..836c4db8b5d24 100644
--- a/ports/stm32/boards/PYBD_SF6/board_init.c
+++ b/ports/stm32/boards/PYBD_SF6/board_init.c
@@ -1 +1,89 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2025 Damien P. George
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include <stdbool.h>
+#include "boardctrl.h"
+#include "qspi.h"
+
+#if BUILDING_MBOOT
+#include "mboot/mboot.h"
+#endif
+
+// Use PYBD_SF2 as base configuration.
 #include "boards/PYBD_SF2/board_init.c"
+
+// Adesto AT25SF161 16-MBit.
+static const mp_spiflash_chip_params_t chip_params_at25sf161 = {
+    .jedec_id = 0x01861f,
+    .memory_size_bytes_log2 = 21,
+    .qspi_prescaler = 3, // maximum frequency 104MHz
+    .qread_num_dummy = 2,
+};
+
+// Infineon S25FL064 64-MBit.
+static const mp_spiflash_chip_params_t chip_params_s25fl064 = {
+    .jedec_id = 0x176001,
+    .memory_size_bytes_log2 = 23,
+    .qspi_prescaler = 2, // maximum frequency 108MHz
+    .qread_num_dummy = 4,
+};
+
+// Selection of possible SPI flash chips.
+static const mp_spiflash_chip_params_t *const chip_params_table[] = {
+    &chip_params_at25sf161,
+    &chip_params_s25fl064,
+};
+
+void board_early_init_sf6(void) {
+    // Initialise default SPI flash parameters.
+    MICROPY_BOARD_SPIFLASH_CHIP_PARAMS0 = &chip_params_at25sf161;
+    MICROPY_BOARD_SPIFLASH_CHIP_PARAMS1 = &chip_params_at25sf161;
+
+    // Continue with standard board early init.
+    board_early_init();
+}
+
+int mp_spiflash_detect(mp_spiflash_t *spiflash, int ret, uint32_t devid) {
+    if (ret != 0) {
+        // Could not identify flash.  Succeed anyway using default chip parameters.
+        return 0;
+    }
+
+    // Try to detect the SPI flash based on the JEDEC id.
+    for (size_t i = 0; i < MP_ARRAY_SIZE(chip_params_table); ++i) {
+        if (devid == chip_params_table[i]->jedec_id) {
+            spiflash->chip_params = chip_params_table[i];
+            if (spiflash->config->bus_kind == MP_SPIFLASH_BUS_QSPI) {
+                // Reinitialise the QSPI but to set new size, prescaler and dummy bytes.
+                uint8_t num_dummy = spiflash->chip_params->qread_num_dummy;
+                spiflash->config->bus.u_qspi.proto->ioctl(spiflash->config->bus.u_qspi.data, MP_QSPI_IOCTL_INIT, num_dummy);
+            }
+            break;
+        }
+    }
+
+    return 0;
+}
diff --git a/ports/stm32/boards/PYBD_SF6/f767.ld b/ports/stm32/boards/PYBD_SF6/f767.ld
index 4262a48a9962c..37fb3715d67ee 100644
--- a/ports/stm32/boards/PYBD_SF6/f767.ld
+++ b/ports/stm32/boards/PYBD_SF6/f767.ld
@@ -18,7 +18,7 @@ MEMORY
 {
     FLASH (rx)      : ORIGIN = 0x08000000, LENGTH = 2048K
     FLASH_APP (rx)  : ORIGIN = 0x08008000, LENGTH = 2016K   /* sectors 1-11 3x32K 1*128K 7*256K */
-    FLASH_EXT (rx)  : ORIGIN = 0x90000000, LENGTH = 2048K   /* external QSPI */
+    FLASH_ROMFS (rx): ORIGIN = 0x90000000, LENGTH = 2048K   /* external QSPI, at least 2MiB */
     RAM (rwx)       : ORIGIN = 0x20000000, LENGTH = 512K    /* DTCM=128k, SRAM1=368K, SRAM2=16K */
 }
 
@@ -37,4 +37,7 @@ _ram_end = ORIGIN(RAM) + LENGTH(RAM);
 _heap_start = _ebss; /* heap starts just after statically allocated memory */
 _heap_end = _sstack;
 
+/* ROMFS location */
+_micropy_hw_romfs_part0_start = ORIGIN(FLASH_ROMFS);
+
 INCLUDE common_bl.ld
diff --git a/ports/stm32/boards/PYBD_SF6/mpconfigboard.h b/ports/stm32/boards/PYBD_SF6/mpconfigboard.h
index 8c11d7b2eec96..8cd1e52d3bd78 100644
--- a/ports/stm32/boards/PYBD_SF6/mpconfigboard.h
+++ b/ports/stm32/boards/PYBD_SF6/mpconfigboard.h
@@ -45,6 +45,11 @@
 #define MICROPY_HW_CLK_PLLQ         (6)
 #define MICROPY_HW_FLASH_LATENCY    (FLASH_LATENCY_4)
 
+// ROMFS config
+#define MICROPY_HW_ROMFS_ENABLE_EXTERNAL_QSPI (1)
+#define MICROPY_HW_ROMFS_QSPI_SPIFLASH_OBJ (&spi_bdev2.spiflash)
+#define MICROPY_HW_ROMFS_ENABLE_PART0 (1)
+
 // Extra UART config
 #define MICROPY_HW_UART7_TX         (pyb_pin_W16)
 #define MICROPY_HW_UART7_RX         (pyb_pin_W22B)
@@ -64,3 +69,53 @@
 #define MICROPY_HW_ETH_RMII_TX_EN   (pyb_pin_W8)
 #define MICROPY_HW_ETH_RMII_TXD0    (pyb_pin_W45)
 #define MICROPY_HW_ETH_RMII_TXD1    (pyb_pin_W49)
+
+// The below code reconfigures SPI flash for dynamic size detection.
+
+#undef MICROPY_BOARD_EARLY_INIT
+#undef MICROPY_HW_SPIFLASH_SIZE_BITS
+#undef MICROPY_HW_QSPIFLASH_SIZE_BITS_LOG2
+#undef MBOOT_SPIFLASH_BYTE_SIZE
+#undef MBOOT_SPIFLASH_LAYOUT
+#undef MBOOT_SPIFLASH_ERASE_BLOCKS_PER_PAGE
+#undef MBOOT_SPIFLASH2_BYTE_SIZE
+#undef MBOOT_SPIFLASH2_LAYOUT
+#undef MBOOT_SPIFLASH2_ERASE_BLOCKS_PER_PAGE
+
+// These are convenience macros to refer to the SPI flash chip parameters for the external SPI flash.
+#define MICROPY_BOARD_SPIFLASH_CHIP_PARAMS0 (spi_bdev.spiflash.chip_params) // SPI flash #1, R/W storage
+#define MICROPY_BOARD_SPIFLASH_CHIP_PARAMS1 (spi_bdev2.spiflash.chip_params) // SPI flash #2, memory mapped
+
+// Early init is needed to initialise the default SPI flash chip parameters.
+#define MICROPY_BOARD_EARLY_INIT    board_early_init_sf6
+
+// Enable dynamic detection of SPI flash.
+#define MICROPY_HW_SPIFLASH_CHIP_PARAMS (1)
+#define MICROPY_HW_SPIFLASH_DETECT_DEVICE (1)
+
+// Settings for SPI flash #1.
+#define MICROPY_HW_SPIFLASH_SIZE_BITS (1 << (MICROPY_BOARD_SPIFLASH_CHIP_PARAMS0->memory_size_bytes_log2 + 3))
+
+// Settings for SPI flash #2.
+#define MICROPY_HW_QSPI_PRESCALER   (MICROPY_BOARD_SPIFLASH_CHIP_PARAMS1->qspi_prescaler)
+#define MICROPY_HW_QSPIFLASH_SIZE_BITS_LOG2 (MICROPY_BOARD_SPIFLASH_CHIP_PARAMS1->memory_size_bytes_log2 + 3)
+
+// ROMFS partition 0 is dynamically sized (SPI flash #2).
+#define MICROPY_HW_ROMFS_PART0_START (uintptr_t)(&_micropy_hw_romfs_part0_start)
+#define MICROPY_HW_ROMFS_PART0_SIZE (1 << MICROPY_BOARD_SPIFLASH_CHIP_PARAMS1->memory_size_bytes_log2)
+
+// Mboot SPI flash #1 configuration.
+#define MBOOT_SPIFLASH_LAYOUT_DYNAMIC_MAX_LEN (20)
+#define MBOOT_SPIFLASH_LAYOUT       (MICROPY_BOARD_SPIFLASH_CHIP_PARAMS0->memory_size_bytes_log2 == 21 ? "/0x80000000/512*4Kg" : "/0x80000000/2048*4Kg")
+#define MBOOT_SPIFLASH_BYTE_SIZE    (1 << MICROPY_BOARD_SPIFLASH_CHIP_PARAMS0->memory_size_bytes_log2)
+#define MBOOT_SPIFLASH_ERASE_BLOCKS_PER_PAGE (1)
+
+// Mboot SPI flash #2 configuration.
+#define MBOOT_SPIFLASH2_LAYOUT_DYNAMIC_MAX_LEN (20)
+#define MBOOT_SPIFLASH2_LAYOUT      (MICROPY_BOARD_SPIFLASH_CHIP_PARAMS1->memory_size_bytes_log2 == 21 ? "/0x90000000/512*4Kg" : "/0x90000000/2048*4Kg")
+#define MBOOT_SPIFLASH2_BYTE_SIZE   (1 << MICROPY_BOARD_SPIFLASH_CHIP_PARAMS1->memory_size_bytes_log2)
+#define MBOOT_SPIFLASH2_ERASE_BLOCKS_PER_PAGE (1)
+
+extern unsigned char _micropy_hw_romfs_part0_start;
+
+void board_early_init_sf6(void);
diff --git a/ports/stm32/boards/SPARKFUN_MICROMOD_STM32/board.json b/ports/stm32/boards/SPARKFUN_MICROMOD_STM32/board.json
index 0bd3573d6445e..5efd188618223 100644
--- a/ports/stm32/boards/SPARKFUN_MICROMOD_STM32/board.json
+++ b/ports/stm32/boards/SPARKFUN_MICROMOD_STM32/board.json
@@ -8,8 +8,8 @@
         "sparkfun_micromod_stm32.jpg"
     ],
     "mcu": "stm32f4",
-    "product": "Micromod STM32",
+    "product": "MicroMod STM32",
     "thumbnail": "",
-    "url": "",
-    "vendor": "Sparkfun"
+    "url": "https://www.sparkfun.com/products/17713",
+    "vendor": "SparkFun"
 }
diff --git a/ports/stm32/boards/SPARKFUN_MICROMOD_STM32/mpconfigboard.h b/ports/stm32/boards/SPARKFUN_MICROMOD_STM32/mpconfigboard.h
index d2f44cf6cccf0..1e17905bb0d6c 100644
--- a/ports/stm32/boards/SPARKFUN_MICROMOD_STM32/mpconfigboard.h
+++ b/ports/stm32/boards/SPARKFUN_MICROMOD_STM32/mpconfigboard.h
@@ -1,4 +1,4 @@
-// The Sparkfun MicroMod spec uses a zero-based peripheral numbering scheme.
+// The SparkFun MicroMod spec uses a zero-based peripheral numbering scheme.
 // In cases where the 0th peripheral is the default, the "0" is omitted from
 // the name (e.g. "I2C" instead of "I2C0").
 //
diff --git a/ports/stm32/boards/STM32F769DISC/board_init.c b/ports/stm32/boards/STM32F769DISC/board_init.c
index 578dc9adb6c82..001b18bc06783 100644
--- a/ports/stm32/boards/STM32F769DISC/board_init.c
+++ b/ports/stm32/boards/STM32F769DISC/board_init.c
@@ -3,6 +3,8 @@
 
 // This configuration is needed for mboot to be able to write to the external QSPI flash
 
+#define QSPI_QREAD_NUM_DUMMY (2)
+
 #if MICROPY_HW_SPIFLASH_ENABLE_CACHE
 static mp_spiflash_cache_t spi_bdev_cache;
 #endif
@@ -21,6 +23,6 @@ spi_bdev_t spi_bdev;
 // This init function is needed to memory map the QSPI flash early in the boot process
 
 void board_early_init(void) {
-    qspi_init();
+    qspi_init(QSPI_QREAD_NUM_DUMMY);
     qspi_memory_map();
 }
diff --git a/ports/stm32/boards/stm32f427_af.csv b/ports/stm32/boards/stm32f427_af.csv
new file mode 100644
index 0000000000000..34d5a94cb8fd3
--- /dev/null
+++ b/ports/stm32/boards/stm32f427_af.csv
@@ -0,0 +1,170 @@
+Port ,Pin ,AF0          ,AF1              ,AF2     ,AF3         ,AF4      ,AF5              ,AF6              ,AF7            ,AF8               ,AF9                   ,AF10           ,AF11                           ,AF12              ,AF13       ,AF14,AF15    ,ADC
+     ,    ,SYS          ,TIM1/2           ,TIM3/4/5,TIM8/9/10/11,I2C1/2/3 ,SPI1/2/3/4/5/6   ,SPI2/3/SAI1      ,SPI3/USART1/2/3,USART6/UART4/5/7/8,CAN1/2/TIM12/13/14/LCD,OTG2_HS/OTG1_FS,ETH                            ,FMC/SDIO/OTG2_FS  ,DCMI       ,LCD ,SYS     ,
+PortA,PA0 ,             ,TIM2_CH1/TIM2_ETR,TIM5_CH1,TIM8_ETR    ,         ,                 ,                 ,USART2_CTS     ,UART4_TX          ,                      ,               ,ETH_MII_CRS                    ,                  ,           ,    ,EVENTOUT,
+PortA,PA1 ,             ,TIM2_CH2         ,TIM5_CH2,            ,         ,                 ,                 ,USART2_RTS     ,UART4_RX          ,                      ,               ,ETH_MII_RX_CLK/ETH_RMII_REF_CLK,                  ,           ,    ,EVENTOUT,ADC123_IN1
+PortA,PA2 ,             ,TIM2_CH3         ,TIM5_CH3,TIM9_CH1    ,         ,                 ,                 ,USART2_TX      ,                  ,                      ,               ,ETH_MDIO                       ,                  ,           ,    ,EVENTOUT,ADC123_IN2
+PortA,PA3 ,             ,TIM2_CH4         ,TIM5_CH4,TIM9_CH2    ,         ,                 ,                 ,USART2_RX      ,                  ,                      ,OTG_HS_ULPI_D0 ,ETH_MII_COL                    ,                  ,           ,    ,EVENTOUT,ADC123_IN3
+PortA,PA4 ,             ,                 ,        ,            ,         ,SPI1_NSS         ,SPI3_NSS/I2S3_WS ,USART2_CK      ,                  ,                      ,               ,                               ,OTG_HS_SOF        ,DCMI_HSYNC ,    ,EVENTOUT,ADC12_IN4
+PortA,PA5 ,             ,TIM2_CH1/TIM2_ETR,        ,TIM8_CH1N   ,         ,SPI1_SCK         ,                 ,               ,                  ,                      ,OTG_HS_ULPI_CK ,                               ,                  ,           ,    ,EVENTOUT,ADC12_IN5
+PortA,PA6 ,             ,TIM1_BKIN        ,TIM3_CH1,TIM8_BKIN   ,         ,SPI1_MISO        ,                 ,               ,                  ,TIM13_CH1             ,               ,                               ,                  ,DCMI_PIXCLK,    ,EVENTOUT,ADC12_IN6
+PortA,PA7 ,             ,TIM1_CH1N        ,TIM3_CH2,TIM8_CH1N   ,         ,SPI1_MOSI        ,                 ,               ,                  ,TIM14_CH1             ,               ,ETH_MII_RX_DV/ETH_RMII_CRS_DV  ,                  ,           ,    ,EVENTOUT,ADC12_IN7
+PortA,PA8 ,MCO1         ,TIM1_CH1         ,        ,            ,I2C3_SCL ,                 ,                 ,USART1_CK      ,                  ,                      ,OTG_FS_SOF     ,                               ,                  ,           ,    ,EVENTOUT,
+PortA,PA9 ,             ,TIM1_CH2         ,        ,            ,I2C3_SMBA,                 ,                 ,USART1_TX      ,                  ,                      ,               ,                               ,                  ,DCMI_D0    ,    ,EVENTOUT,
+PortA,PA10,             ,TIM1_CH3         ,        ,            ,         ,                 ,                 ,USART1_RX      ,                  ,                      ,OTG_FS_ID      ,                               ,                  ,DCMI_D1    ,    ,EVENTOUT,
+PortA,PA11,             ,TIM1_CH4         ,        ,            ,         ,                 ,                 ,USART1_CTS     ,                  ,CAN1_RX               ,OTG_FS_DM      ,                               ,                  ,           ,    ,EVENTOUT,
+PortA,PA12,             ,TIM1_ETR         ,        ,            ,         ,                 ,                 ,USART1_RTS     ,                  ,CAN1_TX               ,OTG_FS_DP      ,                               ,                  ,           ,    ,EVENTOUT,
+PortA,PA13,JTMS/SWDIO   ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,    ,EVENTOUT,
+PortA,PA14,JTCK/SWCLK   ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,    ,EVENTOUT,
+PortA,PA15,JTDI         ,TIM2_CH1/TIM2_ETR,        ,            ,         ,SPI1_NSS         ,SPI3_NSS/I2S3_WS ,               ,                  ,                      ,               ,                               ,                  ,           ,    ,EVENTOUT,
+PortB,PB0 ,             ,TIM1_CH2N        ,TIM3_CH3,TIM8_CH2N   ,         ,                 ,                 ,               ,                  ,                      ,OTG_HS_ULPI_D1 ,ETH_MII_RXD2                   ,                  ,           ,    ,EVENTOUT,ADC12_IN8
+PortB,PB1 ,             ,TIM1_CH3N        ,TIM3_CH4,TIM8_CH3N   ,         ,                 ,                 ,               ,                  ,                      ,OTG_HS_ULPI_D2 ,ETH_MII_RXD3                   ,                  ,           ,    ,EVENTOUT,ADC12_IN9
+PortB,PB2 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,    ,EVENTOUT,
+PortB,PB3 ,JTDO/TRACESWO,TIM2_CH2         ,        ,            ,         ,SPI1_SCK         ,SPI3_SCK/I2S3_CK ,               ,                  ,                      ,               ,                               ,                  ,           ,    ,EVENTOUT,
+PortB,PB4 ,NJTRST       ,                 ,TIM3_CH1,            ,         ,SPI1_MISO        ,SPI3_MISO        ,I2S3ext_SD     ,                  ,                      ,               ,                               ,                  ,           ,    ,EVENTOUT,
+PortB,PB5 ,             ,                 ,TIM3_CH2,            ,I2C1_SMBA,SPI1_MOSI        ,SPI3_MOSI/I2S3_SD,               ,                  ,CAN2_RX               ,OTG_HS_ULPI_D7 ,ETH_PPS_OUT                    ,FMC_SDCKE1        ,DCMI_D10   ,    ,EVENTOUT,
+PortB,PB6 ,             ,                 ,TIM4_CH1,            ,I2C1_SCL ,                 ,                 ,USART1_TX      ,                  ,CAN2_TX               ,               ,                               ,FMC_SDNE1         ,DCMI_D5    ,    ,EVENTOUT,
+PortB,PB7 ,             ,                 ,TIM4_CH2,            ,I2C1_SDA ,                 ,                 ,USART1_RX      ,                  ,                      ,               ,                               ,FMC_NL            ,DCMI_VSYNC ,    ,EVENTOUT,
+PortB,PB8 ,             ,                 ,TIM4_CH3,TIM10_CH1   ,I2C1_SCL ,                 ,                 ,               ,                  ,CAN1_RX               ,               ,ETH_MII_TXD3                   ,SDIO_D4           ,DCMI_D6    ,    ,EVENTOUT,
+PortB,PB9 ,             ,                 ,TIM4_CH4,TIM11_CH1   ,I2C1_SDA ,SPI2_NSS/I2S2_WS ,                 ,               ,                  ,CAN1_TX               ,               ,                               ,SDIO_D5           ,DCMI_D7    ,    ,EVENTOUT,
+PortB,PB10,             ,TIM2_CH3         ,        ,            ,I2C2_SCL ,SPI2_SCK/I2S2_CK ,                 ,USART3_TX      ,                  ,                      ,OTG_HS_ULPI_D3 ,ETH_MII_RX_ER                  ,                  ,           ,    ,EVENTOUT,
+PortB,PB11,             ,TIM2_CH4         ,        ,            ,I2C2_SDA ,                 ,                 ,USART3_RX      ,                  ,                      ,OTG_HS_ULPI_D4 ,ETH_MII_TX_EN/ETH_RMII_TX_EN   ,                  ,           ,    ,EVENTOUT,
+PortB,PB12,             ,TIM1_BKIN        ,        ,            ,I2C2_SMBA,SPI2_NSS/I2S2_WS ,                 ,USART3_CK      ,                  ,CAN2_RX               ,OTG_HS_ULPI_D5 ,ETH_MII_TXD0/ETH_RMII_TXD0     ,OTG_HS_ID         ,           ,    ,EVENTOUT,
+PortB,PB13,             ,TIM1_CH1N        ,        ,            ,         ,SPI2_SCK/I2S2_CK ,                 ,USART3_CTS     ,                  ,CAN2_TX               ,OTG_HS_ULPI_D6 ,ETH_MII_TXD1/ETH_RMII_TXD1     ,                  ,           ,    ,EVENTOUT,
+PortB,PB14,             ,TIM1_CH2N        ,        ,TIM8_CH2N   ,         ,SPI2_MISO        ,I2S2ext_SD       ,USART3_RTS     ,                  ,TIM12_CH1             ,               ,                               ,OTG_HS_DM         ,           ,    ,EVENTOUT,
+PortB,PB15,RTC_REFIN    ,TIM1_CH3N        ,        ,TIM8_CH3N   ,         ,SPI2_MOSI/I2S2_SD,                 ,               ,                  ,TIM12_CH2             ,               ,                               ,OTG_HS_DP         ,           ,    ,EVENTOUT,
+PortC,PC0 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,OTG_HS_ULPI_STP,                               ,FMC_SDNWE         ,           ,    ,EVENTOUT,ADC123_IN10
+PortC,PC1 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,ETH_MDC                        ,                  ,           ,    ,EVENTOUT,ADC123_IN11
+PortC,PC2 ,             ,                 ,        ,            ,         ,SPI2_MISO        ,I2S2ext_SD       ,               ,                  ,                      ,OTG_HS_ULPI_DIR,ETH_MII_TXD2                   ,FMC_SDNE0         ,           ,    ,EVENTOUT,ADC123_IN12
+PortC,PC3 ,             ,                 ,        ,            ,         ,SPI2_MOSI/I2S2_SD,                 ,               ,                  ,                      ,OTG_HS_ULPI_NXT,ETH_MII_TX_CLK                 ,FMC_SDCKE0        ,           ,    ,EVENTOUT,ADC123_IN13
+PortC,PC4 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,ETH_MII_RXD0/ETH_RMII_RXD0     ,                  ,           ,    ,EVENTOUT,ADC12_IN14
+PortC,PC5 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,ETH_MII_RXD1/ETH_RMII_RXD1     ,                  ,           ,    ,EVENTOUT,ADC12_IN15
+PortC,PC6 ,             ,                 ,TIM3_CH1,TIM8_CH1    ,         ,I2S2_MCK         ,                 ,               ,USART6_TX         ,                      ,               ,                               ,SDIO_D6           ,DCMI_D0    ,    ,EVENTOUT,
+PortC,PC7 ,             ,                 ,TIM3_CH2,TIM8_CH2    ,         ,                 ,I2S3_MCK         ,               ,USART6_RX         ,                      ,               ,                               ,SDIO_D7           ,DCMI_D1    ,    ,EVENTOUT,
+PortC,PC8 ,             ,                 ,TIM3_CH3,TIM8_CH3    ,         ,                 ,                 ,               ,USART6_CK         ,                      ,               ,                               ,SDIO_D0           ,DCMI_D2    ,    ,EVENTOUT,
+PortC,PC9 ,MCO2         ,                 ,TIM3_CH4,TIM8_CH4    ,I2C3_SDA ,I2S_CKIN         ,                 ,               ,                  ,                      ,               ,                               ,SDIO_D1           ,DCMI_D3    ,    ,EVENTOUT,
+PortC,PC10,             ,                 ,        ,            ,         ,                 ,SPI3_SCK/I2S3_CK ,USART3_TX      ,UART4_TX          ,                      ,               ,                               ,SDIO_D2           ,DCMI_D8    ,    ,EVENTOUT,
+PortC,PC11,             ,                 ,        ,            ,         ,I2S3ext_SD       ,SPI3_MISO        ,USART3_RX      ,UART4_RX          ,                      ,               ,                               ,SDIO_D3           ,DCMI_D4    ,    ,EVENTOUT,
+PortC,PC12,             ,                 ,        ,            ,         ,                 ,SPI3_MOSI/I2S3_SD,USART3_CK      ,UART5_TX          ,                      ,               ,                               ,SDIO_CK           ,DCMI_D9    ,    ,EVENTOUT,
+PortC,PC13,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,    ,EVENTOUT,
+PortC,PC14,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,    ,EVENTOUT,
+PortC,PC15,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,    ,EVENTOUT,
+PortD,PD0 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,CAN1_RX               ,               ,                               ,FMC_D2            ,           ,    ,EVENTOUT,
+PortD,PD1 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,CAN1_TX               ,               ,                               ,FMC_D3            ,           ,    ,EVENTOUT,
+PortD,PD2 ,             ,                 ,TIM3_ETR,            ,         ,                 ,                 ,               ,UART5_RX          ,                      ,               ,                               ,SDIO_CMD          ,DCMI_D11   ,    ,EVENTOUT,
+PortD,PD3 ,             ,                 ,        ,            ,         ,SPI2_SCK/I2S2_CK ,                 ,USART2_CTS     ,                  ,                      ,               ,                               ,FMC_CLK           ,DCMI_D5    ,    ,EVENTOUT,
+PortD,PD4 ,             ,                 ,        ,            ,         ,                 ,                 ,USART2_RTS     ,                  ,                      ,               ,                               ,FMC_NOE           ,           ,    ,EVENTOUT,
+PortD,PD5 ,             ,                 ,        ,            ,         ,                 ,                 ,USART2_TX      ,                  ,                      ,               ,                               ,FMC_NWE           ,           ,    ,EVENTOUT,
+PortD,PD6 ,             ,                 ,        ,            ,         ,SPI3_MOSI/I2S3_SD,SAI1_SD_A        ,USART2_RX      ,                  ,                      ,               ,                               ,FMC_NWAIT         ,DCMI_D10   ,    ,EVENTOUT,
+PortD,PD7 ,             ,                 ,        ,            ,         ,                 ,                 ,USART2_CK      ,                  ,                      ,               ,                               ,FMC_NE1/FMC_NCE2  ,           ,    ,EVENTOUT,
+PortD,PD8 ,             ,                 ,        ,            ,         ,                 ,                 ,USART3_TX      ,                  ,                      ,               ,                               ,FMC_D13           ,           ,    ,EVENTOUT,
+PortD,PD9 ,             ,                 ,        ,            ,         ,                 ,                 ,USART3_RX      ,                  ,                      ,               ,                               ,FMC_D14           ,           ,    ,EVENTOUT,
+PortD,PD10,             ,                 ,        ,            ,         ,                 ,                 ,USART3_CK      ,                  ,                      ,               ,                               ,FMC_D15           ,           ,    ,EVENTOUT,
+PortD,PD11,             ,                 ,        ,            ,         ,                 ,                 ,USART3_CTS     ,                  ,                      ,               ,                               ,FMC_A16           ,           ,    ,EVENTOUT,
+PortD,PD12,             ,                 ,TIM4_CH1,            ,         ,                 ,                 ,USART3_RTS     ,                  ,                      ,               ,                               ,FMC_A17           ,           ,    ,EVENTOUT,
+PortD,PD13,             ,                 ,TIM4_CH2,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A18           ,           ,    ,EVENTOUT,
+PortD,PD14,             ,                 ,TIM4_CH3,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D0            ,           ,    ,EVENTOUT,
+PortD,PD15,             ,                 ,TIM4_CH4,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D1            ,           ,    ,EVENTOUT,
+PortE,PE0 ,             ,                 ,TIM4_ETR,            ,         ,                 ,                 ,               ,UART8_RX          ,                      ,               ,                               ,FMC_NBL0          ,DCMI_D2    ,    ,EVENTOUT,
+PortE,PE1 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,UART8_TX          ,                      ,               ,                               ,FMC_NBL1          ,DCMI_D3    ,    ,EVENTOUT,
+PortE,PE2 ,TRACECLK     ,                 ,        ,            ,         ,SPI4_SCK         ,SAI1_MCLK_A      ,               ,                  ,                      ,               ,ETH_MII_TXD3                   ,FMC_A23           ,           ,    ,EVENTOUT,
+PortE,PE3 ,TRACED0      ,                 ,        ,            ,         ,                 ,SAI1_SD_B        ,               ,                  ,                      ,               ,                               ,FMC_A19           ,           ,    ,EVENTOUT,
+PortE,PE4 ,TRACED1      ,                 ,        ,            ,         ,SPI4_NSS         ,SAI1_FS_A        ,               ,                  ,                      ,               ,                               ,FMC_A20           ,DCMI_D4    ,    ,EVENTOUT,
+PortE,PE5 ,TRACED2      ,                 ,        ,TIM9_CH1    ,         ,SPI4_MISO        ,SAI1_SCK_A       ,               ,                  ,                      ,               ,                               ,FMC_A21           ,DCMI_D6    ,    ,EVENTOUT,
+PortE,PE6 ,TRACED3      ,                 ,        ,TIM9_CH2    ,         ,SPI4_MOSI        ,SAI1_SD_A        ,               ,                  ,                      ,               ,                               ,FMC_A22           ,DCMI_D7    ,    ,EVENTOUT,
+PortE,PE7 ,             ,TIM1_ETR         ,        ,            ,         ,                 ,                 ,               ,UART7_RX          ,                      ,               ,                               ,FMC_D4            ,           ,    ,EVENTOUT,
+PortE,PE8 ,             ,TIM1_CH1N        ,        ,            ,         ,                 ,                 ,               ,UART7_TX          ,                      ,               ,                               ,FMC_D5            ,           ,    ,EVENTOUT,
+PortE,PE9 ,             ,TIM1_CH1         ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D6            ,           ,    ,EVENTOUT,
+PortE,PE10,             ,TIM1_CH2N        ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D7            ,           ,    ,EVENTOUT,
+PortE,PE11,             ,TIM1_CH2         ,        ,            ,         ,SPI4_NSS         ,                 ,               ,                  ,                      ,               ,                               ,FMC_D8            ,           ,    ,EVENTOUT,
+PortE,PE12,             ,TIM1_CH3N        ,        ,            ,         ,SPI4_SCK         ,                 ,               ,                  ,                      ,               ,                               ,FMC_D9            ,           ,    ,EVENTOUT,
+PortE,PE13,             ,TIM1_CH3         ,        ,            ,         ,SPI4_MISO        ,                 ,               ,                  ,                      ,               ,                               ,FMC_D10           ,           ,    ,EVENTOUT,
+PortE,PE14,             ,TIM1_CH4         ,        ,            ,         ,SPI4_MOSI        ,                 ,               ,                  ,                      ,               ,                               ,FMC_D11           ,           ,    ,EVENTOUT,
+PortE,PE15,             ,TIM1_BKIN        ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D12           ,           ,    ,EVENTOUT,
+PortF,PF0 ,             ,                 ,        ,            ,I2C2_SDA ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A0            ,           ,    ,EVENTOUT,
+PortF,PF1 ,             ,                 ,        ,            ,I2C2_SCL ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A1            ,           ,    ,EVENTOUT,
+PortF,PF2 ,             ,                 ,        ,            ,I2C2_SMBA,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A2            ,           ,    ,EVENTOUT,
+PortF,PF3 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A3            ,           ,    ,EVENTOUT,ADC3_IN9
+PortF,PF4 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A4            ,           ,    ,EVENTOUT,ADC3_IN14
+PortF,PF5 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A5            ,           ,    ,EVENTOUT,ADC3_IN15
+PortF,PF6 ,             ,                 ,        ,TIM10_CH1   ,         ,SPI5_NSS         ,SAI1_SD_B        ,               ,UART7_RX          ,                      ,               ,                               ,FMC_NIORD         ,           ,    ,EVENTOUT,ADC3_IN4
+PortF,PF7 ,             ,                 ,        ,TIM11_CH1   ,         ,SPI5_SCK         ,SAI1_MCLK_B      ,               ,UART7_TX          ,                      ,               ,                               ,FMC_NREG          ,           ,    ,EVENTOUT,ADC3_IN5
+PortF,PF8 ,             ,                 ,        ,            ,         ,SPI5_MISO        ,SAI1_SCK_B       ,               ,                  ,TIM13_CH1             ,               ,                               ,FMC_NIOWR         ,           ,    ,EVENTOUT,ADC3_IN6
+PortF,PF9 ,             ,                 ,        ,            ,         ,SPI5_MOSI        ,SAI1_FS_B        ,               ,                  ,TIM14_CH1             ,               ,                               ,FMC_CD            ,           ,    ,EVENTOUT,ADC3_IN7
+PortF,PF10,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_INTR          ,DCMI_D11   ,    ,EVENTOUT,ADC3_IN8
+PortF,PF11,             ,                 ,        ,            ,         ,SPI5_MOSI        ,                 ,               ,                  ,                      ,               ,                               ,FMC_SDNRAS        ,DCMI_D12   ,    ,EVENTOUT,
+PortF,PF12,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A6            ,           ,    ,EVENTOUT,
+PortF,PF13,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A7            ,           ,    ,EVENTOUT,
+PortF,PF14,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A8            ,           ,    ,EVENTOUT,
+PortF,PF15,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A9            ,           ,    ,EVENTOUT,
+PortG,PG0 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A10           ,           ,    ,EVENTOUT,
+PortG,PG1 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A11           ,           ,    ,EVENTOUT,
+PortG,PG2 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A12           ,           ,    ,EVENTOUT,
+PortG,PG3 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A13           ,           ,    ,EVENTOUT,
+PortG,PG4 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A14/FMC_BA0   ,           ,    ,EVENTOUT,
+PortG,PG5 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_A15/FMC_BA1   ,           ,    ,EVENTOUT,
+PortG,PG6 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_INT2          ,DCMI_D12   ,    ,EVENTOUT,
+PortG,PG7 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,USART6_CK         ,                      ,               ,                               ,FMC_INT3          ,DCMI_D13   ,    ,EVENTOUT,
+PortG,PG8 ,             ,                 ,        ,            ,         ,SPI6_NSS         ,                 ,               ,USART6_RTS        ,                      ,               ,ETH_PPS_OUT                    ,FMC_SDCLK         ,           ,    ,EVENTOUT,
+PortG,PG9 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,USART6_RX         ,                      ,               ,                               ,FMC_NE2/FMC_NCE3  ,DCMI_VSYNC ,    ,EVENTOUT,
+PortG,PG10,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_NCE4_1/FMC_NE3,DCMI_D2    ,    ,EVENTOUT,
+PortG,PG11,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,ETH_MII_TX_EN/ETH_RMII_TX_EN   ,FMC_NCE4_2        ,DCMI_D3    ,    ,EVENTOUT,
+PortG,PG12,             ,                 ,        ,            ,         ,SPI6_MISO        ,                 ,               ,USART6_RTS        ,                      ,               ,                               ,FMC_NE4           ,           ,    ,EVENTOUT,
+PortG,PG13,             ,                 ,        ,            ,         ,SPI6_SCK         ,                 ,               ,USART6_CTS        ,                      ,               ,ETH_MII_TXD0/ETH_RMII_TXD0     ,FMC_A24           ,           ,    ,EVENTOUT,
+PortG,PG14,             ,                 ,        ,            ,         ,SPI6_MOSI        ,                 ,               ,USART6_TX         ,                      ,               ,ETH_MII_TXD1/ETH_RMII_TXD1     ,FMC_A25           ,           ,    ,EVENTOUT,
+PortG,PG15,             ,                 ,        ,            ,         ,                 ,                 ,               ,USART6_CTS        ,                      ,               ,                               ,FMC_SDNCAS        ,DCMI_D13   ,    ,EVENTOUT,
+PortH,PH0 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,    ,EVENTOUT,
+PortH,PH1 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,    ,EVENTOUT,
+PortH,PH2 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,ETH_MII_CRS                    ,FMC_SDCKE0        ,           ,    ,EVENTOUT,
+PortH,PH3 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,ETH_MII_COL                    ,FMC_SDNE0         ,           ,    ,EVENTOUT,
+PortH,PH4 ,             ,                 ,        ,            ,I2C2_SCL ,                 ,                 ,               ,                  ,                      ,OTG_HS_ULPI_NXT,                               ,                  ,           ,    ,EVENTOUT,
+PortH,PH5 ,             ,                 ,        ,            ,I2C2_SDA ,SPI5_NSS         ,                 ,               ,                  ,                      ,               ,                               ,FMC_SDNWE         ,           ,    ,EVENTOUT,
+PortH,PH6 ,             ,                 ,        ,            ,I2C2_SMBA,SPI5_SCK         ,                 ,               ,                  ,TIM12_CH1             ,               ,                               ,FMC_SDNE1         ,DCMI_D8    ,    ,        ,
+PortH,PH7 ,             ,                 ,        ,            ,I2C3_SCL ,SPI5_MISO        ,                 ,               ,                  ,                      ,               ,ETH_MII_RXD3                   ,FMC_SDCKE1        ,DCMI_D9    ,    ,        ,
+PortH,PH8 ,             ,                 ,        ,            ,I2C3_SDA ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D16           ,DCMI_HSYNC ,    ,EVENTOUT,
+PortH,PH9 ,             ,                 ,        ,            ,I2C3_SMBA,                 ,                 ,               ,                  ,TIM12_CH2             ,               ,                               ,FMC_D17           ,DCMI_D0    ,    ,EVENTOUT,
+PortH,PH10,             ,                 ,TIM5_CH1,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D18           ,DCMI_D1    ,    ,EVENTOUT,
+PortH,PH11,             ,                 ,TIM5_CH2,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D19           ,DCMI_D2    ,    ,EVENTOUT,
+PortH,PH12,             ,                 ,TIM5_CH3,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D20           ,DCMI_D3    ,    ,EVENTOUT,
+PortH,PH13,             ,                 ,        ,TIM8_CH1N   ,         ,                 ,                 ,               ,                  ,CAN1_TX               ,               ,                               ,FMC_D21           ,           ,    ,EVENTOUT,
+PortH,PH14,             ,                 ,        ,TIM8_CH2N   ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D22           ,DCMI_D4    ,    ,EVENTOUT,
+PortH,PH15,             ,                 ,        ,TIM8_CH3N   ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D23           ,DCMI_D11   ,    ,EVENTOUT,
+PortI,PI0 ,             ,                 ,TIM5_CH4,            ,         ,SPI2_NSS/I2S2_WS ,                 ,               ,                  ,                      ,               ,                               ,FMC_D24           ,DCMI_D13   ,    ,EVENTOUT,
+PortI,PI1 ,             ,                 ,        ,            ,         ,SPI2_SCK/I2S2_CK ,                 ,               ,                  ,                      ,               ,                               ,FMC_D25           ,DCMI_D8    ,    ,EVENTOUT,
+PortI,PI2 ,             ,                 ,        ,TIM8_CH4    ,         ,SPI2_MISO        ,I2S2ext_SD       ,               ,                  ,                      ,               ,                               ,FMC_D26           ,DCMI_D9    ,    ,EVENTOUT,
+PortI,PI3 ,             ,                 ,        ,TIM8_ETR    ,         ,SPI2_MOSI/I2S2_SD,                 ,               ,                  ,                      ,               ,                               ,FMC_D27           ,DCMI_D10   ,    ,EVENTOUT,
+PortI,PI4 ,             ,                 ,        ,TIM8_BKIN   ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_NBL2          ,DCMI_D5    ,    ,EVENTOUT,
+PortI,PI5 ,             ,                 ,        ,TIM8_CH1    ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_NBL3          ,DCMI_VSYNC ,    ,EVENTOUT,
+PortI,PI6 ,             ,                 ,        ,TIM8_CH2    ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D28           ,DCMI_D6    ,    ,EVENTOUT,
+PortI,PI7 ,             ,                 ,        ,TIM8_CH3    ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,FMC_D29           ,DCMI_D7    ,    ,EVENTOUT,
+PortI,PI8 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,    ,EVENTOUT,
+PortI,PI9 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,CAN1_RX               ,               ,                               ,FMC_D30           ,           ,    ,EVENTOUT,
+PortI,PI10,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,ETH_MII_RX_ER                  ,FMC_D31           ,           ,    ,EVENTOUT,
+PortI,PI11,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,OTG_HS_ULPI_DIR,                               ,                  ,           ,    ,EVENTOUT,
+PortI,PI12,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,    ,EVENTOUT,
+PortI,PI13,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,    ,EVENTOUT,
+PortI,PI14,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,    ,EVENTOUT,
+PortI,PI15,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,    ,EVENTOUT,
+PortJ,PJ0 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,    ,EVENTOUT,
+PortJ,PJ1 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,    ,EVENTOUT,
+PortJ,PJ2 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,    ,EVENTOUT,
+PortJ,PJ3 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,    ,EVENTOUT,
+PortJ,PJ4 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,    ,EVENTOUT,
+PortJ,PJ5 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,    ,EVENTOUT,
+PortJ,PJ6 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,    ,EVENTOUT,
+PortJ,PJ7 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,    ,EVENTOUT,
+PortJ,PJ8 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,    ,EVENTOUT,
+PortJ,PJ9 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,    ,EVENTOUT,
+PortJ,PJ10,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,    ,EVENTOUT,
+PortJ,PJ11,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,    ,EVENTOUT,
+PortJ,PJ12,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,    ,EVENTOUT,
+PortJ,PJ13,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,    ,EVENTOUT,
+PortJ,PJ14,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,    ,EVENTOUT,
+PortJ,PJ15,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,    ,EVENTOUT,
+PortK,PK0 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,    ,EVENTOUT,
+PortK,PK1 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,    ,EVENTOUT,
+PortK,PK2 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,    ,EVENTOUT,
+PortK,PK3 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,    ,EVENTOUT,
+PortK,PK4 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,    ,EVENTOUT,
+PortK,PK5 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,    ,EVENTOUT,
+PortK,PK6 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,    ,EVENTOUT,
+PortK,PK7 ,             ,                 ,        ,            ,         ,                 ,                 ,               ,                  ,                      ,               ,                               ,                  ,           ,    ,EVENTOUT,
diff --git a/ports/stm32/boards/stm32g474_af.csv b/ports/stm32/boards/stm32g474_af.csv
index 5853f5f9008af..59a0e91a14f85 100644
--- a/ports/stm32/boards/stm32g474_af.csv
+++ b/ports/stm32/boards/stm32g474_af.csv
@@ -2,12 +2,12 @@ Port ,Pin ,AF0         ,AF1                   ,AF2
      ,    ,I2C4/SYS_AF ,LPTIM1/TIM2/5/15/16/17,I2C1/3/TIM1/2/3/4/5/8/20/15/COMP1,QUADSPI1/I2C3/4/SAI1/USB/HRTIM1/TIM8/20/15/COMP3,I2C1/2/3/4/TIM1/8/16/17,QUADSPI1/SPI1/2/3/4/I2S2/3/I2C4/UART4/5/TIM8/Infrared,QUADSPI1/SPI2/3/I2S2/3/TIM1/5/8/20/Infrared,USART1/2/3/CAN/COMP7/5/6,I2C3/4/UART4/5/LPUART1/COMP1/2/7/4/5/6/3,CAN/TIM1/8/15/CAN1/2,QUADSPI1/TIM2/3/4/8/17,LPTIM1/TIM1/8/CAN1/3,FMC/LPUART1/SAI1/HRTIM1/TIM1,SAI1SAI1/HRTIM1/OPAMP2,UART4/5/SAI1/TIM2/15/UCPD1,SYS     ,ADC
 PortA,PA0 ,            ,TIM2_CH1              ,TIM5_CH1                         ,                                                ,                       ,                                                     ,                                           ,USART2_CTS              ,COMP1_OUT                               ,TIM8_BKIN           ,TIM8_ETR              ,                    ,                            ,                      ,TIM2_ETR                  ,EVENTOUT,ADC12_IN1
 PortA,PA1 ,RTC_REFIN   ,TIM2_CH2              ,TIM5_CH2                         ,                                                ,                       ,                                                     ,                                           ,USART2_RTS_DE           ,                                        ,TIM15_CH1N          ,                      ,                    ,                            ,                      ,                          ,EVENTOUT,ADC12_IN2
-PortA,PA2 ,            ,TIM2_CH3              ,TIM5_CH3                         ,                                                ,                       ,                                                     ,                                           ,USART2_TX               ,COMP2_OUT                               ,TIM15_CH1           ,QUADSPI1_BK1_NCS      ,                    ,LPUART1_TX                  ,                      ,UCPD1_FRSTX               ,EVENTOUT,ADC1_IN3
-PortA,PA3 ,            ,TIM2_CH4              ,TIM5_CH4                         ,SAI1_CK1                                        ,                       ,                                                     ,                                           ,USART2_RX               ,                                        ,TIM15_CH2           ,QUADSPI1_CLK          ,                    ,LPUART1_RX                  ,SAI1_MCLK_A           ,                          ,EVENTOUT,ADC1_IN4
+PortA,PA2 ,            ,TIM2_CH3              ,TIM5_CH3                         ,                                                ,                       ,                                                     ,                                           ,USART2_TX               ,COMP2_OUT                               ,TIM15_CH1           ,QUADSPI_BK1_NCS      ,                    ,LPUART1_TX                  ,                      ,UCPD1_FRSTX               ,EVENTOUT,ADC1_IN3
+PortA,PA3 ,            ,TIM2_CH4              ,TIM5_CH4                         ,SAI1_CK1                                        ,                       ,                                                     ,                                           ,USART2_RX               ,                                        ,TIM15_CH2           ,QUADSPI_CLK          ,                    ,LPUART1_RX                  ,SAI1_MCLK_A           ,                          ,EVENTOUT,ADC1_IN4
 PortA,PA4 ,            ,                      ,TIM3_CH2                         ,                                                ,                       ,SPI1_NSS                                             ,SPI3_NSS/I2S3_WS                           ,USART2_CK               ,                                        ,                    ,                      ,                    ,                            ,SAI1_FS_B             ,                          ,EVENTOUT,ADC2_IN17
 PortA,PA5 ,            ,TIM2_CH1              ,TIM2_ETR                         ,                                                ,                       ,SPI1_SCK                                             ,                                           ,                        ,                                        ,                    ,                      ,                    ,                            ,                      ,UCPD1_FRSTX               ,EVENTOUT,ADC2_IN13
-PortA,PA6 ,            ,TIM16_CH1             ,TIM3_CH1                         ,                                                ,TIM8_BKIN              ,SPI1_MISO                                            ,TIM1_BKIN                                  ,                        ,COMP1_OUT                               ,                    ,QUADSPI1_BK1_IO3      ,                    ,LPUART1_CTS                 ,                      ,                          ,EVENTOUT,ADC2_IN3
-PortA,PA7 ,            ,TIM17_CH1             ,TIM3_CH2                         ,                                                ,TIM8_CH1N              ,SPI1_MOSI                                            ,TIM1_CH1N                                  ,                        ,COMP2_OUT                               ,                    ,QUADSPI1_BK1_IO2      ,                    ,                            ,                      ,UCPD1_FRSTX               ,EVENTOUT,ADC2_IN4
+PortA,PA6 ,            ,TIM16_CH1             ,TIM3_CH1                         ,                                                ,TIM8_BKIN              ,SPI1_MISO                                            ,TIM1_BKIN                                  ,                        ,COMP1_OUT                               ,                    ,QUADSPI_BK1_IO3      ,                    ,LPUART1_CTS                 ,                      ,                          ,EVENTOUT,ADC2_IN3
+PortA,PA7 ,            ,TIM17_CH1             ,TIM3_CH2                         ,                                                ,TIM8_CH1N              ,SPI1_MOSI                                            ,TIM1_CH1N                                  ,                        ,COMP2_OUT                               ,                    ,QUADSPI_BK1_IO2      ,                    ,                            ,                      ,UCPD1_FRSTX               ,EVENTOUT,ADC2_IN4
 PortA,PA8 ,MCO         ,                      ,I2C3_SCL                         ,                                                ,I2C2_SDA               ,I2S2_MCK                                             ,TIM1_CH1                                   ,USART1_CK               ,COMP7_OUT                               ,                    ,TIM4_ETR              ,CAN3_RX             ,SAI1_CK2                    ,HRTIM1_CHA1           ,SAI1_SCK_A                ,EVENTOUT,ADC5_IN1
 PortA,PA9 ,            ,                      ,I2C3_SMBA                        ,                                                ,I2C2_SCL               ,I2S3_MCK                                             ,TIM1_CH2                                   ,USART1_TX               ,COMP5_OUT                               ,TIM15_BKIN          ,TIM2_CH3              ,                    ,                            ,HRTIM1_CHA2           ,SAI1_FS_A                 ,EVENTOUT,ADC5_IN2
 PortA,PA10,            ,TIM17_BKIN            ,                                 ,USB_CRS_SYNC                                    ,I2C2_SMBA              ,SPI2_MISO                                            ,TIM1_CH3                                   ,USART1_RX               ,COMP6_OUT                               ,                    ,TIM2_CH4              ,TIM8_BKIN           ,SAI1_D1                     ,HRTIM1_CHB1           ,SAI1_SD_A                 ,EVENTOUT,
@@ -16,9 +16,9 @@ PortA,PA12,            ,TIM16_CH1             ,
 PortA,PA13,SWDIOJTMS   ,TIM16_CH1N            ,                                 ,I2C4_SCL                                        ,I2C1_SCL               ,IR_OUT                                               ,                                           ,USART3_CTS              ,                                        ,                    ,TIM4_CH3              ,                    ,                            ,SAI1_SD_B             ,                          ,EVENTOUT,
 PortA,PA14,SWCLKJTCK   ,LPTIM1_OUT            ,                                 ,I2C4_SMBA                                       ,I2C1_SDA               ,TIM8_CH2                                             ,TIM1_BKIN                                  ,USART2_TX               ,                                        ,                    ,                      ,                    ,                            ,SAI1_FS_B             ,                          ,EVENTOUT,
 PortA,PA15,JTDI        ,TIM2_CH1              ,TIM8_CH1                         ,                                                ,I2C1_SCL               ,SPI1_NSS                                             ,SPI3_NSS/I2S3_WS                           ,USART2_RX               ,UART4_RTS_DE                            ,TIM1_BKIN           ,                      ,CAN3_TX             ,                            ,HRTIM1_FLT2           ,TIM2_ETR                  ,EVENTOUT,
-PortB,PB0 ,            ,                      ,TIM3_CH3                         ,                                                ,TIM8_CH2N              ,                                                     ,TIM1_CH2N                                  ,                        ,                                        ,                    ,QUADSPI1_BK1_IO1      ,                    ,                            ,HRTIM1_FLT5           ,UCPD1_FRSTX               ,EVENTOUT,ADC3_IN12/ADC1_IN15
-PortB,PB1 ,            ,                      ,TIM3_CH4                         ,                                                ,TIM8_CH3N              ,                                                     ,TIM1_CH3N                                  ,                        ,COMP4_OUT                               ,                    ,QUADSPI1_BK1_IO0      ,                    ,LPUART1_RTS_DE              ,HRTIM1_SCOUT          ,                          ,EVENTOUT,ADC3_IN1/ADC1_IN12
-PortB,PB2 ,RTC_OUT2    ,LPTIM1_OUT            ,TIM5_CH1                         ,TIM20_CH1                                       ,I2C3_SMBA              ,                                                     ,                                           ,                        ,                                        ,                    ,QUADSPI1_BK2_IO1      ,                    ,                            ,HRTIM1_SCIN           ,                          ,EVENTOUT,ADC2_IN12
+PortB,PB0 ,            ,                      ,TIM3_CH3                         ,                                                ,TIM8_CH2N              ,                                                     ,TIM1_CH2N                                  ,                        ,                                        ,                    ,QUADSPI_BK1_IO1      ,                    ,                            ,HRTIM1_FLT5           ,UCPD1_FRSTX               ,EVENTOUT,ADC3_IN12/ADC1_IN15
+PortB,PB1 ,            ,                      ,TIM3_CH4                         ,                                                ,TIM8_CH3N              ,                                                     ,TIM1_CH3N                                  ,                        ,COMP4_OUT                               ,                    ,QUADSPI_BK1_IO0      ,                    ,LPUART1_RTS_DE              ,HRTIM1_SCOUT          ,                          ,EVENTOUT,ADC3_IN1/ADC1_IN12
+PortB,PB2 ,RTC_OUT2    ,LPTIM1_OUT            ,TIM5_CH1                         ,TIM20_CH1                                       ,I2C3_SMBA              ,                                                     ,                                           ,                        ,                                        ,                    ,QUADSPI_BK2_IO1      ,                    ,                            ,HRTIM1_SCIN           ,                          ,EVENTOUT,ADC2_IN12
 PortB,PB3 ,JTDOTRACESWO,TIM2_CH2              ,TIM4_ETR                         ,USB_CRS_SYNC                                    ,TIM8_CH1N              ,SPI1_SCK                                             ,SPI3_SCK/I2S3_CK                           ,USART2_TX               ,                                        ,                    ,TIM3_ETR              ,CAN3_RX             ,HRTIM1_SCOUT                ,HRTIM1_EEV9           ,SAI1_SCK_B                ,EVENTOUT,
 PortB,PB4 ,JTRST       ,TIM16_CH1             ,TIM3_CH1                         ,                                                ,TIM8_CH2N              ,SPI1_MISO                                            ,SPI3_MISO                                  ,USART2_RX               ,UART5_RTS_DE                            ,                    ,TIM17_BKIN            ,CAN3_TX             ,                            ,HRTIM1_EEV7           ,SAI1_MCLK_B               ,EVENTOUT,
 PortB,PB5 ,            ,TIM16_BKIN            ,TIM3_CH2                         ,TIM8_CH3N                                       ,I2C1_SMBA              ,SPI1_MOSI                                            ,SPI3_MOSI/I2S3_SD                          ,USART2_CK               ,I2C3_SDA                                ,CAN2_RX             ,TIM17_CH1             ,LPTIM1_IN1          ,SAI1_SD_B                   ,HRTIM1_EEV6           ,UART5_CTS                 ,EVENTOUT,
@@ -26,17 +26,17 @@ PortB,PB6 ,            ,TIM16_CH1N            ,TIM4_CH1
 PortB,PB7 ,            ,TIM17_CH1N            ,TIM4_CH2                         ,I2C4_SDA                                        ,I2C1_SDA               ,TIM8_BKIN                                            ,                                           ,USART1_RX               ,COMP3_OUT                               ,                    ,TIM3_CH4              ,LPTIM1_IN2          ,FMC_NL                      ,HRTIM1_EEV3           ,UART4_CTS                 ,EVENTOUT,
 PortB,PB8 ,            ,TIM16_CH1             ,TIM4_CH3                         ,SAI1_CK1                                        ,I2C1_SCL               ,                                                     ,                                           ,USART3_RX               ,COMP1_OUT                               ,CAN1_RX             ,TIM8_CH2              ,                    ,TIM1_BKIN                   ,HRTIM1_EEV8           ,SAI1_MCLK_A               ,EVENTOUT,
 PortB,PB9 ,            ,TIM17_CH1             ,TIM4_CH4                         ,SAI1_D2                                         ,I2C1_SDA               ,                                                     ,IR_OUT                                     ,USART3_TX               ,COMP2_OUT                               ,CAN1_TX             ,TIM8_CH3              ,                    ,TIM1_CH3N                   ,HRTIM1_EEV5           ,SAI1_FS_A                 ,EVENTOUT,
-PortB,PB10,            ,TIM2_CH3              ,                                 ,                                                ,                       ,                                                     ,                                           ,USART3_TX               ,LPUART1_RX                              ,                    ,QUADSPI1_CLK          ,                    ,TIM1_BKIN                   ,HRTIM1_FLT3           ,SAI1_SCK_A                ,EVENTOUT,
-PortB,PB11,            ,TIM2_CH4              ,                                 ,                                                ,                       ,                                                     ,                                           ,USART3_RX               ,LPUART1_TX                              ,                    ,QUADSPI1_BK1_NCS      ,                    ,                            ,HRTIM1_FLT4           ,                          ,EVENTOUT,ADC12_IN14
+PortB,PB10,            ,TIM2_CH3              ,                                 ,                                                ,                       ,                                                     ,                                           ,USART3_TX               ,LPUART1_RX                              ,                    ,QUADSPI_CLK          ,                    ,TIM1_BKIN                   ,HRTIM1_FLT3           ,SAI1_SCK_A                ,EVENTOUT,
+PortB,PB11,            ,TIM2_CH4              ,                                 ,                                                ,                       ,                                                     ,                                           ,USART3_RX               ,LPUART1_TX                              ,                    ,QUADSPI_BK1_NCS      ,                    ,                            ,HRTIM1_FLT4           ,                          ,EVENTOUT,ADC12_IN14
 PortB,PB12,            ,                      ,TIM5_ETR                         ,                                                ,I2C2_SMBA              ,SPI2_NSS/I2S2_WS                                     ,TIM1_BKIN                                  ,USART3_CK               ,LPUART1_RTS_DE                          ,CAN2_RX             ,                      ,                    ,                            ,HRTIM1_CHC1           ,                          ,EVENTOUT,ADC4_IN3/ADC1_IN11
 PortB,PB13,            ,                      ,                                 ,                                                ,                       ,SPI2_SCK/I2S2_CK                                     ,TIM1_CH1N                                  ,USART3_CTS              ,LPUART1_CTS                             ,CAN2_TX             ,                      ,                    ,                            ,HRTIM1_CHC2           ,                          ,EVENTOUT,ADC3_IN5
 PortB,PB14,            ,TIM15_CH1             ,                                 ,                                                ,                       ,SPI2_MISO                                            ,TIM1_CH2N                                  ,USART3_RTS_DE           ,COMP4_OUT                               ,                    ,                      ,                    ,                            ,HRTIM1_CHD1           ,                          ,EVENTOUT,ADC4_IN4/ADC1_IN5
 PortB,PB15,RTC_REFIN   ,TIM15_CH2             ,TIM15_CH1N                       ,COMP3_OUT                                       ,TIM1_CH3N              ,SPI2_MOSI/I2S2_SD                                    ,                                           ,                        ,                                        ,                    ,                      ,                    ,                            ,HRTIM1_CHD2           ,                          ,EVENTOUT,ADC4_IN5/ADC2_IN15
 PortC,PC0 ,            ,LPTIM1_IN1            ,TIM1_CH1                         ,                                                ,                       ,                                                     ,                                           ,                        ,LPUART1_RX                              ,                    ,                      ,                    ,                            ,                      ,                          ,EVENTOUT,ADC12_IN6
-PortC,PC1 ,            ,LPTIM1_OUT            ,TIM1_CH2                         ,                                                ,                       ,                                                     ,                                           ,                        ,LPUART1_TX                              ,                    ,QUADSPI1_BK2_IO0      ,                    ,                            ,SAI1_SD_A             ,                          ,EVENTOUT,ADC12_IN7
-PortC,PC2 ,            ,LPTIM1_IN2            ,TIM1_CH3                         ,COMP3_OUT                                       ,                       ,                                                     ,TIM20_CH2                                  ,                        ,                                        ,                    ,QUADSPI1_BK2_IO1      ,                    ,                            ,                      ,                          ,EVENTOUT,ADC12_IN8
-PortC,PC3 ,            ,LPTIM1_ETR            ,TIM1_CH4                         ,SAI1_D1                                         ,                       ,                                                     ,TIM1_BKIN2                                 ,                        ,                                        ,                    ,QUADSPI1_BK2_IO2      ,                    ,                            ,SAI1_SD_A             ,                          ,EVENTOUT,ADC12_IN9
-PortC,PC4 ,            ,                      ,TIM1_ETR                         ,                                                ,I2C2_SCL               ,                                                     ,                                           ,USART1_TX               ,                                        ,                    ,QUADSPI1_BK2_IO3      ,                    ,                            ,                      ,                          ,EVENTOUT,ADC2_IN5
+PortC,PC1 ,            ,LPTIM1_OUT            ,TIM1_CH2                         ,                                                ,                       ,                                                     ,                                           ,                        ,LPUART1_TX                              ,                    ,QUADSPI_BK2_IO0      ,                    ,                            ,SAI1_SD_A             ,                          ,EVENTOUT,ADC12_IN7
+PortC,PC2 ,            ,LPTIM1_IN2            ,TIM1_CH3                         ,COMP3_OUT                                       ,                       ,                                                     ,TIM20_CH2                                  ,                        ,                                        ,                    ,QUADSPI_BK2_IO1      ,                    ,                            ,                      ,                          ,EVENTOUT,ADC12_IN8
+PortC,PC3 ,            ,LPTIM1_ETR            ,TIM1_CH4                         ,SAI1_D1                                         ,                       ,                                                     ,TIM1_BKIN2                                 ,                        ,                                        ,                    ,QUADSPI_BK2_IO2      ,                    ,                            ,SAI1_SD_A             ,                          ,EVENTOUT,ADC12_IN9
+PortC,PC4 ,            ,                      ,TIM1_ETR                         ,                                                ,I2C2_SCL               ,                                                     ,                                           ,USART1_TX               ,                                        ,                    ,QUADSPI_BK2_IO3      ,                    ,                            ,                      ,                          ,EVENTOUT,ADC2_IN5
 PortC,PC5 ,            ,                      ,TIM15_BKIN                       ,SAI1_D3                                         ,                       ,                                                     ,TIM1_CH4N                                  ,USART1_RX               ,                                        ,                    ,                      ,                    ,                            ,HRTIM1_EEV10          ,                          ,EVENTOUT,ADC2_IN11
 PortC,PC6 ,            ,                      ,TIM3_CH1                         ,HRTIM1_EEV10                                    ,TIM8_CH1               ,                                                     ,I2S2_MCK                                   ,COMP6_OUT               ,I2C4_SCL                                ,                    ,                      ,                    ,                            ,HRTIM1_CHF1           ,                          ,EVENTOUT,
 PortC,PC7 ,            ,                      ,TIM3_CH2                         ,HRTIM1_FLT5                                     ,TIM8_CH2               ,                                                     ,I2S3_MCK                                   ,COMP5_OUT               ,I2C4_SDA                                ,                    ,                      ,                    ,                            ,HRTIM1_CHF2           ,                          ,EVENTOUT,
@@ -51,11 +51,11 @@ PortC,PC15,            ,                      ,
 PortD,PD0 ,            ,                      ,                                 ,                                                ,                       ,                                                     ,TIM8_CH4N                                  ,                        ,                                        ,CAN1_RX             ,                      ,                    ,FMC_D2                      ,                      ,                          ,EVENTOUT,
 PortD,PD1 ,            ,                      ,                                 ,                                                ,TIM8_CH4               ,                                                     ,TIM8_BKIN2                                 ,                        ,                                        ,CAN1_TX             ,                      ,                    ,FMC_D3                      ,                      ,                          ,EVENTOUT,
 PortD,PD2 ,            ,                      ,TIM3_ETR                         ,                                                ,TIM8_BKIN              ,UART5_RX                                             ,                                           ,                        ,                                        ,                    ,                      ,                    ,                            ,                      ,                          ,EVENTOUT,
-PortD,PD3 ,            ,                      ,TIM2_CH1/TIM2_ETR                ,                                                ,                       ,                                                     ,                                           ,USART2_CTS              ,                                        ,                    ,QUADSPI1_BK2_NCS      ,                    ,FMC_CLK                     ,                      ,                          ,EVENTOUT,
-PortD,PD4 ,            ,                      ,TIM2_CH2                         ,                                                ,                       ,                                                     ,                                           ,USART2_RTS_DE           ,                                        ,                    ,QUADSPI1_BK2_IO0      ,                    ,FMC_NOE                     ,                      ,                          ,EVENTOUT,
-PortD,PD5 ,            ,                      ,                                 ,                                                ,                       ,                                                     ,                                           ,USART2_TX               ,                                        ,                    ,QUADSPI1_BK2_IO1      ,                    ,FMC_NWE                     ,                      ,                          ,EVENTOUT,
-PortD,PD6 ,            ,                      ,TIM2_CH4                         ,SAI1_D1                                         ,                       ,                                                     ,                                           ,USART2_RX               ,                                        ,                    ,QUADSPI1_BK2_IO2      ,                    ,FMC_NWAIT                   ,SAI1_SD_A             ,                          ,EVENTOUT,
-PortD,PD7 ,            ,                      ,TIM2_CH3                         ,                                                ,                       ,                                                     ,                                           ,USART2_CK               ,                                        ,                    ,QUADSPI1_BK2_IO3      ,                    ,FMC_NCE/FMC_NE1             ,                      ,                          ,EVENTOUT,
+PortD,PD3 ,            ,                      ,TIM2_CH1/TIM2_ETR                ,                                                ,                       ,                                                     ,                                           ,USART2_CTS              ,                                        ,                    ,QUADSPI_BK2_NCS      ,                    ,FMC_CLK                     ,                      ,                          ,EVENTOUT,
+PortD,PD4 ,            ,                      ,TIM2_CH2                         ,                                                ,                       ,                                                     ,                                           ,USART2_RTS_DE           ,                                        ,                    ,QUADSPI_BK2_IO0      ,                    ,FMC_NOE                     ,                      ,                          ,EVENTOUT,
+PortD,PD5 ,            ,                      ,                                 ,                                                ,                       ,                                                     ,                                           ,USART2_TX               ,                                        ,                    ,QUADSPI_BK2_IO1      ,                    ,FMC_NWE                     ,                      ,                          ,EVENTOUT,
+PortD,PD6 ,            ,                      ,TIM2_CH4                         ,SAI1_D1                                         ,                       ,                                                     ,                                           ,USART2_RX               ,                                        ,                    ,QUADSPI_BK2_IO2      ,                    ,FMC_NWAIT                   ,SAI1_SD_A             ,                          ,EVENTOUT,
+PortD,PD7 ,            ,                      ,TIM2_CH3                         ,                                                ,                       ,                                                     ,                                           ,USART2_CK               ,                                        ,                    ,QUADSPI_BK2_IO3      ,                    ,FMC_NCE/FMC_NE1             ,                      ,                          ,EVENTOUT,
 PortD,PD8 ,            ,                      ,                                 ,                                                ,                       ,                                                     ,                                           ,USART3_TX               ,                                        ,                    ,                      ,                    ,FMC_D13                     ,                      ,                          ,EVENTOUT,ADC4_IN12/ADC5_IN12
 PortD,PD9 ,            ,                      ,                                 ,                                                ,                       ,                                                     ,                                           ,USART3_RX               ,                                        ,                    ,                      ,                    ,FMC_D14                     ,                      ,                          ,EVENTOUT,ADC4_IN13/ADC5_IN13
 PortD,PD10,            ,                      ,                                 ,                                                ,                       ,                                                     ,                                           ,USART3_CK               ,                                        ,                    ,                      ,                    ,FMC_D15                     ,                      ,                          ,EVENTOUT,ADC345_IN7
@@ -74,23 +74,23 @@ PortE,PE6 ,TRACED3     ,                      ,
 PortE,PE7 ,            ,                      ,TIM1_ETR                         ,                                                ,                       ,                                                     ,                                           ,                        ,                                        ,                    ,                      ,                    ,FMC_D4                      ,SAI1_SD_B             ,                          ,EVENTOUT,ADC3_IN4
 PortE,PE8 ,            ,TIM5_CH3              ,TIM1_CH1N                        ,                                                ,                       ,                                                     ,                                           ,                        ,                                        ,                    ,                      ,                    ,FMC_D5                      ,SAI1_SCK_B            ,                          ,EVENTOUT,ADC345_IN6
 PortE,PE9 ,            ,TIM5_CH4              ,TIM1_CH1                         ,                                                ,                       ,                                                     ,                                           ,                        ,                                        ,                    ,                      ,                    ,FMC_D6                      ,SAI1_FS_B             ,                          ,EVENTOUT,ADC3_IN2
-PortE,PE10,            ,                      ,TIM1_CH2N                        ,                                                ,                       ,                                                     ,                                           ,                        ,                                        ,                    ,QUADSPI1_CLK          ,                    ,FMC_D7                      ,SAI1_MCLK_B           ,                          ,EVENTOUT,ADC345_IN14
-PortE,PE11,            ,                      ,TIM1_CH2                         ,                                                ,                       ,SPI4_NSS                                             ,                                           ,                        ,                                        ,                    ,QUADSPI1_BK1_NCS      ,                    ,FMC_D8                      ,                      ,                          ,EVENTOUT,ADC345_IN15
-PortE,PE12,            ,                      ,TIM1_CH3N                        ,                                                ,                       ,SPI4_SCK                                             ,                                           ,                        ,                                        ,                    ,QUADSPI1_BK1_IO0      ,                    ,FMC_D9                      ,                      ,                          ,EVENTOUT,ADC345_IN16
-PortE,PE13,            ,                      ,TIM1_CH3                         ,                                                ,                       ,SPI4_MISO                                            ,                                           ,                        ,                                        ,                    ,QUADSPI1_BK1_IO1      ,                    ,FMC_D10                     ,                      ,                          ,EVENTOUT,ADC3_IN3
-PortE,PE14,            ,                      ,TIM1_CH4                         ,                                                ,                       ,SPI4_MOSI                                            ,TIM1_BKIN2                                 ,                        ,                                        ,                    ,QUADSPI1_BK1_IO2      ,                    ,FMC_D11                     ,                      ,                          ,EVENTOUT,ADC4_IN1
-PortE,PE15,            ,                      ,TIM1_BKIN                        ,                                                ,                       ,                                                     ,TIM1_CH4N                                  ,USART3_RX               ,                                        ,                    ,QUADSPI1_BK1_IO3      ,                    ,FMC_D12                     ,                      ,                          ,EVENTOUT,ADC4_IN2
+PortE,PE10,            ,                      ,TIM1_CH2N                        ,                                                ,                       ,                                                     ,                                           ,                        ,                                        ,                    ,QUADSPI_CLK          ,                    ,FMC_D7                      ,SAI1_MCLK_B           ,                          ,EVENTOUT,ADC345_IN14
+PortE,PE11,            ,                      ,TIM1_CH2                         ,                                                ,                       ,SPI4_NSS                                             ,                                           ,                        ,                                        ,                    ,QUADSPI_BK1_NCS      ,                    ,FMC_D8                      ,                      ,                          ,EVENTOUT,ADC345_IN15
+PortE,PE12,            ,                      ,TIM1_CH3N                        ,                                                ,                       ,SPI4_SCK                                             ,                                           ,                        ,                                        ,                    ,QUADSPI_BK1_IO0      ,                    ,FMC_D9                      ,                      ,                          ,EVENTOUT,ADC345_IN16
+PortE,PE13,            ,                      ,TIM1_CH3                         ,                                                ,                       ,SPI4_MISO                                            ,                                           ,                        ,                                        ,                    ,QUADSPI_BK1_IO1      ,                    ,FMC_D10                     ,                      ,                          ,EVENTOUT,ADC3_IN3
+PortE,PE14,            ,                      ,TIM1_CH4                         ,                                                ,                       ,SPI4_MOSI                                            ,TIM1_BKIN2                                 ,                        ,                                        ,                    ,QUADSPI_BK1_IO2      ,                    ,FMC_D11                     ,                      ,                          ,EVENTOUT,ADC4_IN1
+PortE,PE15,            ,                      ,TIM1_BKIN                        ,                                                ,                       ,                                                     ,TIM1_CH4N                                  ,USART3_RX               ,                                        ,                    ,QUADSPI_BK1_IO3      ,                    ,FMC_D12                     ,                      ,                          ,EVENTOUT,ADC4_IN2
 PortF,PF0 ,            ,                      ,                                 ,                                                ,I2C2_SDA               ,SPI2_NSS/I2S2_WS                                     ,TIM1_CH3N                                  ,                        ,                                        ,                    ,                      ,                    ,                            ,                      ,                          ,EVENTOUT,ADC1_IN10
 PortF,PF1 ,            ,                      ,                                 ,                                                ,                       ,SPI2_SCK/I2S2_CK                                     ,                                           ,                        ,                                        ,                    ,                      ,                    ,                            ,                      ,                          ,EVENTOUT,ADC2_IN10
 PortF,PF2 ,            ,                      ,TIM20_CH3                        ,                                                ,I2C2_SMBA              ,                                                     ,                                           ,                        ,                                        ,                    ,                      ,                    ,FMC_A2                      ,                      ,                          ,EVENTOUT,
 PortF,PF3 ,            ,                      ,TIM20_CH4                        ,                                                ,I2C3_SCL               ,                                                     ,                                           ,                        ,                                        ,                    ,                      ,                    ,FMC_A3                      ,                      ,                          ,EVENTOUT,
 PortF,PF4 ,            ,                      ,COMP1_OUT                        ,TIM20_CH1N                                      ,I2C3_SDA               ,                                                     ,                                           ,                        ,                                        ,                    ,                      ,                    ,FMC_A4                      ,                      ,                          ,EVENTOUT,
 PortF,PF5 ,            ,                      ,TIM20_CH2N                       ,                                                ,                       ,                                                     ,                                           ,                        ,                                        ,                    ,                      ,                    ,FMC_A5                      ,                      ,                          ,EVENTOUT,
-PortF,PF6 ,            ,TIM5_ETR              ,TIM4_CH4                         ,SAI1_SD_B                                       ,I2C2_SCL               ,                                                     ,TIM5_CH1                                   ,USART3_RTS              ,                                        ,                    ,QUADSPI1_BK1_IO3      ,                    ,                            ,                      ,                          ,EVENTOUT,
-PortF,PF7 ,            ,                      ,TIM20_BKIN                       ,                                                ,                       ,                                                     ,TIM5_CH2                                   ,                        ,                                        ,                    ,QUADSPI1_BK1_IO2      ,                    ,FMC_A1                      ,SAI1_MCLK_B           ,                          ,EVENTOUT,
-PortF,PF8 ,            ,                      ,TIM20_BKIN2                      ,                                                ,                       ,                                                     ,TIM5_CH3                                   ,                        ,                                        ,                    ,QUADSPI1_BK1_IO0      ,                    ,FMC_A24                     ,SAI1_SCK_B            ,                          ,EVENTOUT,
-PortF,PF9 ,            ,                      ,TIM20_BKIN                       ,TIM15_CH1                                       ,                       ,SPI2_SCK                                             ,TIM5_CH4                                   ,                        ,                                        ,                    ,QUADSPI1_BK1_IO1      ,                    ,FMC_A25                     ,SAI1_FS_B             ,                          ,EVENTOUT,
-PortF,PF10,            ,                      ,TIM20_BKIN2                      ,TIM15_CH2                                       ,                       ,SPI2_SCK                                             ,                                           ,                        ,                                        ,                    ,QUADSPI1_CLK          ,                    ,FMC_A0                      ,SAI1_D3               ,                          ,EVENTOUT,
+PortF,PF6 ,            ,TIM5_ETR              ,TIM4_CH4                         ,SAI1_SD_B                                       ,I2C2_SCL               ,                                                     ,TIM5_CH1                                   ,USART3_RTS              ,                                        ,                    ,QUADSPI_BK1_IO3      ,                    ,                            ,                      ,                          ,EVENTOUT,
+PortF,PF7 ,            ,                      ,TIM20_BKIN                       ,                                                ,                       ,                                                     ,TIM5_CH2                                   ,                        ,                                        ,                    ,QUADSPI_BK1_IO2      ,                    ,FMC_A1                      ,SAI1_MCLK_B           ,                          ,EVENTOUT,
+PortF,PF8 ,            ,                      ,TIM20_BKIN2                      ,                                                ,                       ,                                                     ,TIM5_CH3                                   ,                        ,                                        ,                    ,QUADSPI_BK1_IO0      ,                    ,FMC_A24                     ,SAI1_SCK_B            ,                          ,EVENTOUT,
+PortF,PF9 ,            ,                      ,TIM20_BKIN                       ,TIM15_CH1                                       ,                       ,SPI2_SCK                                             ,TIM5_CH4                                   ,                        ,                                        ,                    ,QUADSPI_BK1_IO1      ,                    ,FMC_A25                     ,SAI1_FS_B             ,                          ,EVENTOUT,
+PortF,PF10,            ,                      ,TIM20_BKIN2                      ,TIM15_CH2                                       ,                       ,SPI2_SCK                                             ,                                           ,                        ,                                        ,                    ,QUADSPI_CLK          ,                    ,FMC_A0                      ,SAI1_D3               ,                          ,EVENTOUT,
 PortF,PF11,            ,                      ,TIM20_ETR                        ,                                                ,                       ,                                                     ,                                           ,                        ,                                        ,                    ,                      ,                    ,FMC_NE4                     ,                      ,                          ,EVENTOUT,
 PortF,PF12,            ,                      ,TIM20_CH1                        ,                                                ,                       ,                                                     ,                                           ,                        ,                                        ,                    ,                      ,                    ,FMC_A6                      ,                      ,                          ,EVENTOUT,
 PortF,PF13,            ,                      ,TIM20_CH2                        ,                                                ,I2C4_SMBA              ,                                                     ,                                           ,                        ,                                        ,                    ,                      ,                    ,FMC_A7                      ,                      ,                          ,EVENTOUT,
diff --git a/ports/stm32/can.c b/ports/stm32/can.c
index 490faeba709a2..47385e0fa7b5b 100644
--- a/ports/stm32/can.c
+++ b/ports/stm32/can.c
@@ -28,29 +28,15 @@
 #include "py/mperrno.h"
 #include "py/mphal.h"
 #include "can.h"
+#include "pyb_can.h"
 #include "irq.h"
 
 #if MICROPY_HW_ENABLE_CAN
 
-void can_init0(void) {
-    for (uint i = 0; i < MP_ARRAY_SIZE(MP_STATE_PORT(pyb_can_obj_all)); i++) {
-        MP_STATE_PORT(pyb_can_obj_all)[i] = NULL;
-    }
-}
-
-void can_deinit_all(void) {
-    for (int i = 0; i < MP_ARRAY_SIZE(MP_STATE_PORT(pyb_can_obj_all)); i++) {
-        pyb_can_obj_t *can_obj = MP_STATE_PORT(pyb_can_obj_all)[i];
-        if (can_obj != NULL) {
-            can_deinit(can_obj);
-        }
-    }
-}
-
 #if !MICROPY_HW_ENABLE_FDCAN
 
-bool can_init(pyb_can_obj_t *can_obj, uint32_t mode, uint32_t prescaler, uint32_t sjw, uint32_t bs1, uint32_t bs2, bool auto_restart) {
-    CAN_InitTypeDef *init = &can_obj->can.Init;
+bool can_init(CAN_HandleTypeDef *can, int can_id, uint32_t mode, uint32_t prescaler, uint32_t sjw, uint32_t bs1, uint32_t bs2, bool auto_restart) {
+    CAN_InitTypeDef *init = &can->Init;
     init->Mode = mode << 4; // shift-left so modes fit in a small-int
     init->Prescaler = prescaler;
     init->SJW = ((sjw - 1) & 3) << 24;
@@ -67,7 +53,7 @@ bool can_init(pyb_can_obj_t *can_obj, uint32_t mode, uint32_t prescaler, uint32_
     uint32_t sce_irq = 0;
     const machine_pin_obj_t *pins[2];
 
-    switch (can_obj->can_id) {
+    switch (can_id) {
         #if defined(MICROPY_HW_CAN1_TX)
         case PYB_CAN_1:
             CANx = CAN1;
@@ -107,21 +93,16 @@ bool can_init(pyb_can_obj_t *can_obj, uint32_t mode, uint32_t prescaler, uint32_
     uint32_t pin_mode = MP_HAL_PIN_MODE_ALT;
     uint32_t pin_pull = MP_HAL_PIN_PULL_UP;
     for (int i = 0; i < 2; i++) {
-        if (!mp_hal_pin_config_alt(pins[i], pin_mode, pin_pull, AF_FN_CAN, can_obj->can_id)) {
+        if (!mp_hal_pin_config_alt(pins[i], pin_mode, pin_pull, AF_FN_CAN, can_id)) {
             return false;
         }
     }
 
     // init CANx
-    can_obj->can.Instance = CANx;
-    HAL_CAN_Init(&can_obj->can);
+    can->Instance = CANx;
+    HAL_CAN_Init(can);
 
-    can_obj->is_enabled = true;
-    can_obj->num_error_warning = 0;
-    can_obj->num_error_passive = 0;
-    can_obj->num_bus_off = 0;
-
-    __HAL_CAN_ENABLE_IT(&can_obj->can, CAN_IT_ERR | CAN_IT_BOF | CAN_IT_EPV | CAN_IT_EWG);
+    __HAL_CAN_ENABLE_IT(can, CAN_IT_ERR | CAN_IT_BOF | CAN_IT_EPV | CAN_IT_EWG);
 
     NVIC_SetPriority(sce_irq, IRQ_PRI_CAN);
     HAL_NVIC_EnableIRQ(sce_irq);
@@ -129,10 +110,9 @@ bool can_init(pyb_can_obj_t *can_obj, uint32_t mode, uint32_t prescaler, uint32_
     return true;
 }
 
-void can_deinit(pyb_can_obj_t *self) {
-    self->is_enabled = false;
-    HAL_CAN_DeInit(&self->can);
-    if (self->can.Instance == CAN1) {
+void can_deinit(CAN_HandleTypeDef *can) {
+    HAL_CAN_DeInit(can);
+    if (can->Instance == CAN1) {
         HAL_NVIC_DisableIRQ(CAN1_RX0_IRQn);
         HAL_NVIC_DisableIRQ(CAN1_RX1_IRQn);
         HAL_NVIC_DisableIRQ(CAN1_SCE_IRQn);
@@ -140,7 +120,7 @@ void can_deinit(pyb_can_obj_t *self) {
         __HAL_RCC_CAN1_RELEASE_RESET();
         __HAL_RCC_CAN1_CLK_DISABLE();
     #if defined(CAN2)
-    } else if (self->can.Instance == CAN2) {
+    } else if (can->Instance == CAN2) {
         HAL_NVIC_DisableIRQ(CAN2_RX0_IRQn);
         HAL_NVIC_DisableIRQ(CAN2_RX1_IRQn);
         HAL_NVIC_DisableIRQ(CAN2_SCE_IRQn);
@@ -149,7 +129,7 @@ void can_deinit(pyb_can_obj_t *self) {
         __HAL_RCC_CAN2_CLK_DISABLE();
     #endif
     #if defined(CAN3)
-    } else if (self->can.Instance == CAN3) {
+    } else if (can->Instance == CAN3) {
         HAL_NVIC_DisableIRQ(CAN3_RX0_IRQn);
         HAL_NVIC_DisableIRQ(CAN3_RX1_IRQn);
         HAL_NVIC_DisableIRQ(CAN3_SCE_IRQn);
@@ -160,7 +140,19 @@ void can_deinit(pyb_can_obj_t *self) {
     }
 }
 
-void can_clearfilter(pyb_can_obj_t *self, uint32_t f, uint8_t bank) {
+void can_disable_rx_interrupts(CAN_HandleTypeDef *can, can_rx_fifo_t fifo) {
+    __HAL_CAN_DISABLE_IT(can, ((fifo == CAN_RX_FIFO0) ?
+        (CAN_IT_FMP0 | CAN_IT_FF0 | CAN_IT_FOV0) :
+        (CAN_IT_FMP1 | CAN_IT_FF1 | CAN_IT_FOV1)));
+}
+
+void can_enable_rx_interrupts(CAN_HandleTypeDef *can, can_rx_fifo_t fifo, bool enable_msg_received) {
+    __HAL_CAN_ENABLE_IT(can, ((fifo == CAN_RX_FIFO0) ?
+        ((enable_msg_received ? CAN_IT_FMP0 : 0) | CAN_IT_FF0 | CAN_IT_FOV0) :
+        ((enable_msg_received ? CAN_IT_FMP1 : 0) | CAN_IT_FF1 | CAN_IT_FOV1)));
+}
+
+void can_clearfilter(CAN_HandleTypeDef *can, uint32_t filter_num, uint8_t bank) {
     CAN_FilterConfTypeDef filter;
 
     filter.FilterIdHigh = 0;
@@ -168,18 +160,18 @@ void can_clearfilter(pyb_can_obj_t *self, uint32_t f, uint8_t bank) {
     filter.FilterMaskIdHigh = 0;
     filter.FilterMaskIdLow = 0;
     filter.FilterFIFOAssignment = CAN_FILTER_FIFO0;
-    filter.FilterNumber = f;
+    filter.FilterNumber = filter_num;
     filter.FilterMode = CAN_FILTERMODE_IDMASK;
     filter.FilterScale = CAN_FILTERSCALE_16BIT;
     filter.FilterActivation = DISABLE;
     filter.BankNumber = bank;
 
-    HAL_CAN_ConfigFilter(&self->can, &filter);
+    HAL_CAN_ConfigFilter(can, &filter);
 }
 
-int can_receive(CAN_HandleTypeDef *can, int fifo, CanRxMsgTypeDef *msg, uint8_t *data, uint32_t timeout_ms) {
+int can_receive(CAN_HandleTypeDef *can, can_rx_fifo_t fifo, CanRxMsgTypeDef *msg, uint8_t *data, uint32_t timeout_ms) {
     volatile uint32_t *rfr;
-    if (fifo == CAN_FIFO0) {
+    if (fifo == CAN_RX_FIFO0) {
         rfr = &can->Instance->RF0R;
     } else {
         rfr = &can->Instance->RF1R;
@@ -222,13 +214,16 @@ int can_receive(CAN_HandleTypeDef *can, int fifo, CanRxMsgTypeDef *msg, uint8_t
     return 0; // success
 }
 
-// We have our own version of CAN transmit so we can handle Timeout=0 correctly.
-HAL_StatusTypeDef CAN_Transmit(CAN_HandleTypeDef *hcan, uint32_t Timeout) {
+// Lightly modified version of HAL CAN_Transmit to handle Timeout=0 correctly
+HAL_StatusTypeDef can_transmit(CAN_HandleTypeDef *hcan, CanTxMsgTypeDef *txmsg, uint8_t *data, uint32_t Timeout) {
     uint32_t transmitmailbox;
     uint32_t tickstart;
     uint32_t rqcpflag = 0;
     uint32_t txokflag = 0;
 
+    hcan->pTxMsg = txmsg;
+    (void)data; // Not needed here, caller has set it up as &tx_msg->Data
+
     // Check the parameters
     assert_param(IS_CAN_IDTYPE(hcan->pTxMsg->IDE));
     assert_param(IS_CAN_RTR(hcan->pTxMsg->RTR));
@@ -312,79 +307,90 @@ HAL_StatusTypeDef CAN_Transmit(CAN_HandleTypeDef *hcan, uint32_t Timeout) {
     }
 }
 
-static void can_rx_irq_handler(uint can_id, uint fifo_id) {
-    mp_obj_t callback;
-    pyb_can_obj_t *self;
-    mp_obj_t irq_reason = MP_OBJ_NEW_SMALL_INT(0);
-    byte *state;
-
-    self = MP_STATE_PORT(pyb_can_obj_all)[can_id - 1];
-
-    if (fifo_id == CAN_FIFO0) {
-        callback = self->rxcallback0;
-        state = &self->rx_state0;
+// Workaround for the __HAL_CAN macros expecting a CAN_HandleTypeDef which we
+// don't have in the ISR. Using this "fake" struct instead of CAN_HandleTypeDef
+// so it's not possible to accidentally call an API that uses one of the other
+// fields in the structure.
+typedef struct {
+    CAN_TypeDef *Instance;
+} fake_handle_t;
+
+static void can_rx_irq_handler(uint can_id, CAN_TypeDef *instance, can_rx_fifo_t fifo) {
+    uint32_t full_flag, full_int, overrun_flag, overrun_int, pending_int;
+
+    const fake_handle_t handle = {
+        .Instance = instance,
+    };
+
+    if (fifo == CAN_RX_FIFO0) {
+        full_flag = CAN_FLAG_FF0;
+        full_int = CAN_IT_FF0;
+        overrun_flag = CAN_FLAG_FOV0;
+        overrun_int = CAN_IT_FOV0;
+        pending_int = CAN_IT_FMP0;
     } else {
-        callback = self->rxcallback1;
-        state = &self->rx_state1;
+        full_flag = CAN_FLAG_FF1;
+        full_int = CAN_IT_FF1;
+        overrun_flag = CAN_FLAG_FOV1;
+        overrun_int = CAN_IT_FOV1;
+        pending_int = CAN_IT_FMP1;
     }
 
-    switch (*state) {
-        case RX_STATE_FIFO_EMPTY:
-            __HAL_CAN_DISABLE_IT(&self->can,  (fifo_id == CAN_FIFO0) ? CAN_IT_FMP0 : CAN_IT_FMP1);
-            irq_reason = MP_OBJ_NEW_SMALL_INT(0);
-            *state = RX_STATE_MESSAGE_PENDING;
-            break;
-        case RX_STATE_MESSAGE_PENDING:
-            __HAL_CAN_DISABLE_IT(&self->can, (fifo_id == CAN_FIFO0) ? CAN_IT_FF0 : CAN_IT_FF1);
-            __HAL_CAN_CLEAR_FLAG(&self->can, (fifo_id == CAN_FIFO0) ? CAN_FLAG_FF0 : CAN_FLAG_FF1);
-            irq_reason = MP_OBJ_NEW_SMALL_INT(1);
-            *state = RX_STATE_FIFO_FULL;
-            break;
-        case RX_STATE_FIFO_FULL:
-            __HAL_CAN_DISABLE_IT(&self->can, (fifo_id == CAN_FIFO0) ? CAN_IT_FOV0 : CAN_IT_FOV1);
-            __HAL_CAN_CLEAR_FLAG(&self->can, (fifo_id == CAN_FIFO0) ? CAN_FLAG_FOV0 : CAN_FLAG_FOV1);
-            irq_reason = MP_OBJ_NEW_SMALL_INT(2);
-            *state = RX_STATE_FIFO_OVERFLOW;
-            break;
-        case RX_STATE_FIFO_OVERFLOW:
-            // This should never happen
-            break;
+    bool full = __HAL_CAN_GET_FLAG(&handle, full_flag);
+    bool overrun = __HAL_CAN_GET_FLAG(&handle, overrun_flag);
+
+    // Note: receive interrupt bits are disabled below, and re-enabled by the
+    // higher layer after calling can_receive()
+
+    if (full) {
+        __HAL_CAN_DISABLE_IT(&handle, full_int);
+        __HAL_CAN_CLEAR_FLAG(&handle, full_flag);
+        if (!overrun) {
+            can_irq_handler(can_id, CAN_INT_FIFO_FULL, fifo);
+        }
+    }
+    if (overrun) {
+        __HAL_CAN_DISABLE_IT(&handle, overrun_int);
+        __HAL_CAN_CLEAR_FLAG(&handle, overrun_flag);
+        can_irq_handler(can_id, CAN_INT_FIFO_OVERFLOW, fifo);
     }
 
-    pyb_can_handle_callback(self, fifo_id, callback, irq_reason);
+    if (!(full || overrun)) {
+        // Process of elimination, if neither of the above
+        // FIFO status flags are set then message pending interrupt is what fired.
+        __HAL_CAN_DISABLE_IT(&handle, pending_int);
+        can_irq_handler(can_id, CAN_INT_MESSAGE_RECEIVED, fifo);
+    }
 }
 
-static void can_sce_irq_handler(uint can_id) {
-    pyb_can_obj_t *self = MP_STATE_PORT(pyb_can_obj_all)[can_id - 1];
-    if (self) {
-        self->can.Instance->MSR = CAN_MSR_ERRI;
-        uint32_t esr = self->can.Instance->ESR;
-        if (esr & CAN_ESR_BOFF) {
-            ++self->num_bus_off;
-        } else if (esr & CAN_ESR_EPVF) {
-            ++self->num_error_passive;
-        } else if (esr & CAN_ESR_EWGF) {
-            ++self->num_error_warning;
-        }
+static void can_sce_irq_handler(uint can_id, CAN_TypeDef *instance) {
+    instance->MSR = CAN_MSR_ERRI; // Write to clear ERRIE interrupt
+    uint32_t esr = instance->ESR;
+    if (esr & CAN_ESR_BOFF) {
+        can_irq_handler(can_id, CAN_INT_ERR_BUS_OFF, 0);
+    } else if (esr & CAN_ESR_EPVF) {
+        can_irq_handler(can_id, CAN_INT_ERR_PASSIVE, 0);
+    } else if (esr & CAN_ESR_EWGF) {
+        can_irq_handler(can_id, CAN_INT_ERR_WARNING, 0);
     }
 }
 
 #if defined(MICROPY_HW_CAN1_TX)
 void CAN1_RX0_IRQHandler(void) {
     IRQ_ENTER(CAN1_RX0_IRQn);
-    can_rx_irq_handler(PYB_CAN_1, CAN_FIFO0);
+    can_rx_irq_handler(PYB_CAN_1, CAN1, CAN_RX_FIFO0);
     IRQ_EXIT(CAN1_RX0_IRQn);
 }
 
 void CAN1_RX1_IRQHandler(void) {
     IRQ_ENTER(CAN1_RX1_IRQn);
-    can_rx_irq_handler(PYB_CAN_1, CAN_FIFO1);
+    can_rx_irq_handler(PYB_CAN_1, CAN1, CAN_RX_FIFO1);
     IRQ_EXIT(CAN1_RX1_IRQn);
 }
 
 void CAN1_SCE_IRQHandler(void) {
     IRQ_ENTER(CAN1_SCE_IRQn);
-    can_sce_irq_handler(PYB_CAN_1);
+    can_sce_irq_handler(PYB_CAN_1, CAN1);
     IRQ_EXIT(CAN1_SCE_IRQn);
 }
 #endif
@@ -392,19 +398,19 @@ void CAN1_SCE_IRQHandler(void) {
 #if defined(MICROPY_HW_CAN2_TX)
 void CAN2_RX0_IRQHandler(void) {
     IRQ_ENTER(CAN2_RX0_IRQn);
-    can_rx_irq_handler(PYB_CAN_2, CAN_FIFO0);
+    can_rx_irq_handler(PYB_CAN_2, CAN2, CAN_RX_FIFO0);
     IRQ_EXIT(CAN2_RX0_IRQn);
 }
 
 void CAN2_RX1_IRQHandler(void) {
     IRQ_ENTER(CAN2_RX1_IRQn);
-    can_rx_irq_handler(PYB_CAN_2, CAN_FIFO1);
+    can_rx_irq_handler(PYB_CAN_2, CAN2, CAN_RX_FIFO1);
     IRQ_EXIT(CAN2_RX1_IRQn);
 }
 
 void CAN2_SCE_IRQHandler(void) {
     IRQ_ENTER(CAN2_SCE_IRQn);
-    can_sce_irq_handler(PYB_CAN_2);
+    can_sce_irq_handler(PYB_CAN_2, CAN2);
     IRQ_EXIT(CAN2_SCE_IRQn);
 }
 #endif
@@ -412,19 +418,19 @@ void CAN2_SCE_IRQHandler(void) {
 #if defined(MICROPY_HW_CAN3_TX)
 void CAN3_RX0_IRQHandler(void) {
     IRQ_ENTER(CAN3_RX0_IRQn);
-    can_rx_irq_handler(PYB_CAN_3, CAN_FIFO0);
+    can_rx_irq_handler(PYB_CAN_3, CAN3, CAN_RX_FIFO0);
     IRQ_EXIT(CAN3_RX0_IRQn);
 }
 
 void CAN3_RX1_IRQHandler(void) {
     IRQ_ENTER(CAN3_RX1_IRQn);
-    can_rx_irq_handler(PYB_CAN_3, CAN_FIFO1);
+    can_rx_irq_handler(PYB_CAN_3, CAN3, CAN_RX_FIFO1);
     IRQ_EXIT(CAN3_RX1_IRQn);
 }
 
 void CAN3_SCE_IRQHandler(void) {
     IRQ_ENTER(CAN3_SCE_IRQn);
-    can_sce_irq_handler(PYB_CAN_3);
+    can_sce_irq_handler(PYB_CAN_3, CAN3);
     IRQ_EXIT(CAN3_SCE_IRQn);
 }
 #endif
diff --git a/ports/stm32/can.h b/ports/stm32/can.h
index 45ac7187e0040..3422f4180d6df 100644
--- a/ports/stm32/can.h
+++ b/ports/stm32/can.h
@@ -26,10 +26,17 @@
 #ifndef MICROPY_INCLUDED_STM32_CAN_H
 #define MICROPY_INCLUDED_STM32_CAN_H
 
-#include "py/obj.h"
+#include "py/mphal.h"
 
 #if MICROPY_HW_ENABLE_CAN
 
+// This API provides a higher abstraction layer over the two STM32
+// CAN controller APIs provided by the ST HAL (one for their classic
+// CAN controller, one for their FD CAN controller.)
+
+// There are two implementations, can.c and fdcan.c - only one is included in
+// the build for a given board.
+
 #define PYB_CAN_1 (1)
 #define PYB_CAN_2 (2)
 #define PYB_CAN_3 (3)
@@ -61,31 +68,56 @@ typedef enum _rx_state_t {
     RX_STATE_FIFO_OVERFLOW,
 } rx_state_t;
 
-typedef struct _pyb_can_obj_t {
-    mp_obj_base_t base;
-    mp_obj_t rxcallback0;
-    mp_obj_t rxcallback1;
-    mp_uint_t can_id : 8;
-    bool is_enabled : 1;
-    byte rx_state0;
-    byte rx_state1;
-    uint16_t num_error_warning;
-    uint16_t num_error_passive;
-    uint16_t num_bus_off;
-    CAN_HandleTypeDef can;
-} pyb_can_obj_t;
-
-extern const mp_obj_type_t pyb_can_type;
-
-void can_init0(void);
-void can_deinit_all(void);
-bool can_init(pyb_can_obj_t *can_obj, uint32_t mode, uint32_t prescaler, uint32_t sjw, uint32_t bs1, uint32_t bs2, bool auto_restart);
-void can_deinit(pyb_can_obj_t *self);
-
-void can_clearfilter(pyb_can_obj_t *self, uint32_t f, uint8_t bank);
-int can_receive(CAN_HandleTypeDef *can, int fifo, CanRxMsgTypeDef *msg, uint8_t *data, uint32_t timeout_ms);
-HAL_StatusTypeDef CAN_Transmit(CAN_HandleTypeDef *hcan, uint32_t Timeout);
-void pyb_can_handle_callback(pyb_can_obj_t *self, uint fifo_id, mp_obj_t callback, mp_obj_t irq_reason);
+typedef enum {
+    CAN_INT_MESSAGE_RECEIVED,
+    CAN_INT_FIFO_FULL,
+    CAN_INT_FIFO_OVERFLOW, // These first 3 correspond to pyb.CAN.rxcallback args
+
+    CAN_INT_ERR_BUS_OFF,
+    CAN_INT_ERR_PASSIVE,
+    CAN_INT_ERR_WARNING,
+} can_int_t;
+
+// RX FIFO numbering
+//
+// Note: For traditional CAN peripheral, the values of CAN_FIFO0 and CAN_FIFO1 are the same
+// as this enum. FDCAN macros FDCAN_RX_FIFO0 and FDCAN_RX_FIFO1 are hardware offsets and not the same.
+typedef enum {
+    CAN_RX_FIFO0,
+    CAN_RX_FIFO1,
+} can_rx_fifo_t;
+
+bool can_init(CAN_HandleTypeDef *can, int can_id, uint32_t mode, uint32_t prescaler, uint32_t sjw, uint32_t bs1, uint32_t bs2, bool auto_restart);
+void can_deinit(CAN_HandleTypeDef *can);
+
+void can_clearfilter(CAN_HandleTypeDef *can, uint32_t filter_num, uint8_t bank);
+int can_receive(CAN_HandleTypeDef *can, can_rx_fifo_t fifo, CanRxMsgTypeDef *msg, uint8_t *data, uint32_t timeout_ms);
+HAL_StatusTypeDef can_transmit(CAN_HandleTypeDef *hcan, CanTxMsgTypeDef *txmsg, uint8_t *data, uint32_t Timeout);
+
+// Disable all CAN receive interrupts for a FIFO
+void can_disable_rx_interrupts(CAN_HandleTypeDef *can, can_rx_fifo_t fifo);
+
+// Enable CAN receive interrupts for a FIFO.
+//
+// Interrupt for CAN_INT_MESSAGE_RECEIVED is only enabled if enable_msg_received is set.
+void can_enable_rx_interrupts(CAN_HandleTypeDef *can, can_rx_fifo_t fifo, bool enable_msg_received);
+
+// Implemented in pyb_can.c, called from lower layer
+extern void can_irq_handler(uint can_id,  can_int_t interrupt, can_rx_fifo_t fifo);
+
+#if MICROPY_HW_ENABLE_FDCAN
+
+static inline unsigned can_rx_pending(CAN_HandleTypeDef *can, can_rx_fifo_t fifo) {
+    return HAL_FDCAN_GetRxFifoFillLevel(can, fifo == CAN_RX_FIFO0 ? FDCAN_RX_FIFO0 : FDCAN_RX_FIFO1);
+}
+
+#else
+
+static inline unsigned can_rx_pending(CAN_HandleTypeDef *can, can_rx_fifo_t fifo) {
+    return __HAL_CAN_MSG_PENDING(can, fifo == CAN_RX_FIFO0 ? CAN_FIFO0 : CAN_FIFO1);
+}
+
+#endif // MICROPY_HW_ENABLE_FDCAN
 
 #endif // MICROPY_HW_ENABLE_CAN
 
diff --git a/ports/stm32/cyw43_configport.h b/ports/stm32/cyw43_configport.h
index 1ea1ebde17ea2..6528dbc625e85 100644
--- a/ports/stm32/cyw43_configport.h
+++ b/ports/stm32/cyw43_configport.h
@@ -27,16 +27,13 @@
 #ifndef MICROPY_INCLUDED_STM32_CYW43_CONFIGPORT_H
 #define MICROPY_INCLUDED_STM32_CYW43_CONFIGPORT_H
 
-// The board-level config will be included here, so it can set some CYW43 values.
-#include "py/mpconfig.h"
-#include "py/mperrno.h"
-#include "py/mphal.h"
-#include "extmod/modnetwork.h"
 #include "extint.h"
-#include "pendsv.h"
+#include "extmod/mpbthci.h"
+#include "extmod/cyw43_config_common.h"
 #include "sdio.h"
 
 #define CYW43_USE_SPI                   (0)
+#define CYW43_ENABLE_BLUETOOTH_OVER_UART (1)
 #define CYW43_LWIP                      (1)
 #define CYW43_USE_STATS                 (0)
 
@@ -48,47 +45,33 @@
 #define CYW43_WIFI_NVRAM_INCLUDE_FILE   "lib/cyw43-driver/firmware/wifi_nvram_1dx.h"
 #endif
 
-#define CYW43_IOCTL_TIMEOUT_US          (1000000)
-#define CYW43_SLEEP_MAX                 (50)
-#define CYW43_NETUTILS                  (1)
-#define CYW43_CLEAR_SDIO_INT            (1)
+#ifndef CYW43_BT_FIRMWARE_INCLUDE_FILE
+#define CYW43_BT_FIRMWARE_INCLUDE_FILE  "lib/cyw43-driver/firmware/cyw43_btfw_4343A1.h"
+#endif
 
-#define CYW43_EPERM                     MP_EPERM // Operation not permitted
-#define CYW43_EIO                       MP_EIO // I/O error
-#define CYW43_EINVAL                    MP_EINVAL // Invalid argument
-#define CYW43_ETIMEDOUT                 MP_ETIMEDOUT // Connection timed out
+#ifdef MICROPY_HW_BLE_UART_BAUDRATE_SECONDARY
+#define CYW43_BT_UART_BAUDRATE_ACTIVE_USE MICROPY_HW_BLE_UART_BAUDRATE_SECONDARY
+#endif
 
-#define CYW43_THREAD_ENTER              MICROPY_PY_LWIP_ENTER
-#define CYW43_THREAD_EXIT               MICROPY_PY_LWIP_EXIT
-#define CYW43_THREAD_LOCK_CHECK
+#ifdef MICROPY_HW_BLE_UART_BAUDRATE_DOWNLOAD_FIRMWARE
+#define CYW43_BT_UART_BAUDRATE_DOWNLOAD_FIRMWARE MICROPY_HW_BLE_UART_BAUDRATE_DOWNLOAD_FIRMWARE
+#endif
 
-#define CYW43_HOST_NAME                 mod_network_hostname_data
+#define CYW43_CLEAR_SDIO_INT            (1)
 
 #define CYW43_SDPCM_SEND_COMMON_WAIT    __WFI();
 #define CYW43_DO_IOCTL_WAIT             __WFI();
+#define CYW43_HAL_UART_READCHAR_BLOCKING_WAIT __WFI()
 
-#define CYW43_ARRAY_SIZE(a)             MP_ARRAY_SIZE(a)
-
-#define CYW43_HAL_PIN_MODE_INPUT        MP_HAL_PIN_MODE_INPUT
-#define CYW43_HAL_PIN_MODE_OUTPUT       MP_HAL_PIN_MODE_OUTPUT
-#define CYW43_HAL_PIN_PULL_NONE         MP_HAL_PIN_PULL_NONE
-#define CYW43_HAL_PIN_PULL_UP           MP_HAL_PIN_PULL_UP
-#define CYW43_HAL_PIN_PULL_DOWN         MP_HAL_PIN_PULL_DOWN
-
-#define CYW43_HAL_MAC_WLAN0             MP_HAL_MAC_WLAN0
-
-#define cyw43_hal_ticks_us              mp_hal_ticks_us
-#define cyw43_hal_ticks_ms              mp_hal_ticks_ms
-
-#define cyw43_hal_pin_obj_t             mp_hal_pin_obj_t
-#define cyw43_hal_pin_config            mp_hal_pin_config
-#define cyw43_hal_pin_read              mp_hal_pin_read
-#define cyw43_hal_pin_low               mp_hal_pin_low
-#define cyw43_hal_pin_high              mp_hal_pin_high
+#define cyw43_hal_uart_set_baudrate     mp_bluetooth_hci_uart_set_baudrate
+#define cyw43_hal_uart_write            mp_bluetooth_hci_uart_write
+#define cyw43_hal_uart_readchar         mp_bluetooth_hci_uart_readchar
 
-#define cyw43_hal_get_mac               mp_hal_get_mac
-#define cyw43_hal_get_mac_ascii         mp_hal_get_mac_ascii
-#define cyw43_hal_generate_laa_mac      mp_hal_generate_laa_mac
+#define cyw43_bluetooth_controller_init     mp_bluetooth_hci_controller_init
+#define cyw43_bluetooth_controller_deinit   mp_bluetooth_hci_controller_deinit
+#define cyw43_bluetooth_controller_woken    mp_bluetooth_hci_controller_woken
+#define cyw43_bluetooth_controller_wakeup   mp_bluetooth_hci_controller_wakeup
+#define cyw43_bluetooth_controller_sleep_maybe mp_bluetooth_hci_controller_sleep_maybe
 
 #define CYW43_PIN_WL_REG_ON             pyb_pin_WL_REG_ON
 #define CYW43_PIN_WL_HOST_WAKE          pyb_pin_WL_HOST_WAKE
@@ -102,27 +85,10 @@
 #define CYW43_PIN_BT_CTS                pyb_pin_BT_CTS
 
 #if MICROPY_HW_ENABLE_RF_SWITCH
-#define CYW43_PIN_WL_RFSW_VDD           pyb_pin_WL_RFSW_VDD
+#define CYW43_PIN_RFSW_VDD              pyb_pin_WL_RFSW_VDD
+#define CYW43_PIN_RFSW_SELECT           pyb_pin_WL_GPIO_1
 #endif
 
-#define cyw43_schedule_internal_poll_dispatch(func) pendsv_schedule_dispatch(PENDSV_DISPATCH_CYW43, func)
-
-void cyw43_post_poll_hook(void);
-
-static inline void cyw43_delay_us(uint32_t us) {
-    uint32_t start = mp_hal_ticks_us();
-    while (mp_hal_ticks_us() - start < us) {
-    }
-}
-
-static inline void cyw43_delay_ms(uint32_t ms) {
-    uint32_t us = ms * 1000;
-    uint32_t start = mp_hal_ticks_us();
-    while (mp_hal_ticks_us() - start < us) {
-        MICROPY_EVENT_POLL_HOOK;
-    }
-}
-
 static inline void cyw43_hal_pin_config_irq_falling(cyw43_hal_pin_obj_t pin, int enable) {
     if (enable) {
         extint_set(pin, GPIO_MODE_IT_FALLING);
@@ -157,6 +123,4 @@ static inline int cyw43_sdio_transfer_cmd53(bool write, uint32_t block_size, uin
     return sdio_transfer_cmd53(write, block_size, arg, len, buf);
 }
 
-#define CYW43_EVENT_POLL_HOOK MICROPY_EVENT_POLL_HOOK
-
 #endif // MICROPY_INCLUDED_STM32_CYW43_CONFIGPORT_H
diff --git a/ports/stm32/fdcan.c b/ports/stm32/fdcan.c
index 04d8135c081b3..b87ab48f1ccb7 100644
--- a/ports/stm32/fdcan.c
+++ b/ports/stm32/fdcan.c
@@ -28,6 +28,7 @@
 #include "py/mperrno.h"
 #include "py/mphal.h"
 #include "can.h"
+#include "pyb_can.h"
 #include "irq.h"
 
 #if MICROPY_HW_ENABLE_CAN && MICROPY_HW_ENABLE_FDCAN
@@ -44,9 +45,13 @@
 #define FDCAN_ELEMENT_MASK_FIDX  (0x7f000000) // Filter Index
 #define FDCAN_ELEMENT_MASK_ANMF  (0x80000000) // Accepted Non-matching Frame
 
-#define FDCAN_RX_FIFO0_MASK (FDCAN_FLAG_RX_FIFO0_MESSAGE_LOST | FDCAN_FLAG_RX_FIFO0_FULL | FDCAN_FLAG_RX_FIFO0_NEW_MESSAGE)
-#define FDCAN_RX_FIFO1_MASK (FDCAN_FLAG_RX_FIFO1_MESSAGE_LOST | FDCAN_FLAG_RX_FIFO1_FULL | FDCAN_FLAG_RX_FIFO1_NEW_MESSAGE)
-#define FDCAN_ERROR_STATUS_MASK (FDCAN_FLAG_ERROR_PASSIVE | FDCAN_FLAG_ERROR_WARNING | FDCAN_FLAG_BUS_OFF)
+#define FDCAN_IT_RX_FIFO0_MASK (FDCAN_IT_RX_FIFO0_MESSAGE_LOST | FDCAN_IT_RX_FIFO0_FULL | FDCAN_IT_RX_FIFO0_NEW_MESSAGE)
+#define FDCAN_IT_RX_FIFO1_MASK (FDCAN_IT_RX_FIFO1_MESSAGE_LOST | FDCAN_IT_RX_FIFO1_FULL | FDCAN_IT_RX_FIFO1_NEW_MESSAGE)
+#define FDCAN_IT_ERROR_STATUS_MASK (FDCAN_IT_ERROR_PASSIVE | FDCAN_IT_ERROR_WARNING | FDCAN_IT_BUS_OFF)
+
+#define FDCAN_IT_RX_NEW_MESSAGE_MASK (FDCAN_IT_RX_FIFO0_NEW_MESSAGE | FDCAN_IT_RX_FIFO1_NEW_MESSAGE)
+#define FDCAN_IT_RX_FULL_MASK (FDCAN_IT_RX_FIFO0_FULL | FDCAN_IT_RX_FIFO1_FULL)
+#define FDCAN_IT_RX_MESSAGE_LOST_MASK (FDCAN_IT_RX_FIFO0_MESSAGE_LOST | FDCAN_IT_RX_FIFO1_MESSAGE_LOST)
 
 #if defined(STM32H7)
 // adaptations for H7 to G4 naming convention in HAL
@@ -63,10 +68,10 @@
 // also defined in <PROC>_hal_fdcan.c, but not able to declare extern and reach the variable
 const uint8_t DLCtoBytes[16] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 12, 16, 20, 24, 32, 48, 64};
 
-bool can_init(pyb_can_obj_t *can_obj, uint32_t mode, uint32_t prescaler, uint32_t sjw, uint32_t bs1, uint32_t bs2, bool auto_restart) {
+bool can_init(CAN_HandleTypeDef *can, int can_id, uint32_t mode, uint32_t prescaler, uint32_t sjw, uint32_t bs1, uint32_t bs2, bool auto_restart) {
     (void)auto_restart;
 
-    FDCAN_InitTypeDef *init = &can_obj->can.Init;
+    FDCAN_InitTypeDef *init = &can->Init;
     // Configure FDCAN with FD frame and BRS support.
     init->FrameFormat = FDCAN_FRAME_FD_BRS;
     init->Mode = mode;
@@ -94,7 +99,7 @@ bool can_init(pyb_can_obj_t *can_obj, uint32_t mode, uint32_t prescaler, uint32_
     // To support 2 FDCAN instances simultaneously, the Message RAM is divided in half by
     // setting the second FDCAN memory offset to half the RAM size. With this configuration,
     // the maximum words per FDCAN instance is 1280 32-bit words.
-    if (can_obj->can_id == PYB_CAN_1) {
+    if (can_id == PYB_CAN_1) {
         init->MessageRAMOffset = 0;
     } else {
         init->MessageRAMOffset = FDCAN_MESSAGE_RAM_SIZE / 2;
@@ -139,7 +144,7 @@ bool can_init(pyb_can_obj_t *can_obj, uint32_t mode, uint32_t prescaler, uint32_
     FDCAN_GlobalTypeDef *CANx = NULL;
     const machine_pin_obj_t *pins[2];
 
-    switch (can_obj->can_id) {
+    switch (can_id) {
         #if defined(MICROPY_HW_CAN1_TX)
         case PYB_CAN_1:
             CANx = FDCAN1;
@@ -167,39 +172,34 @@ bool can_init(pyb_can_obj_t *can_obj, uint32_t mode, uint32_t prescaler, uint32_
     uint32_t pin_mode = MP_HAL_PIN_MODE_ALT;
     uint32_t pin_pull = MP_HAL_PIN_PULL_UP;
     for (int i = 0; i < 2; ++i) {
-        if (!mp_hal_pin_config_alt(pins[i], pin_mode, pin_pull, AF_FN_CAN, can_obj->can_id)) {
+        if (!mp_hal_pin_config_alt(pins[i], pin_mode, pin_pull, AF_FN_CAN, can_id)) {
             return false;
         }
     }
 
     // init CANx
-    can_obj->can.Instance = CANx;
+    can->Instance = CANx;
     // catch bad configuration errors.
-    if (HAL_FDCAN_Init(&can_obj->can) != HAL_OK) {
+    if (HAL_FDCAN_Init(can) != HAL_OK) {
         return false;
     }
 
     // Disable acceptance of non-matching frames (enabled by default)
-    HAL_FDCAN_ConfigGlobalFilter(&can_obj->can, FDCAN_REJECT, FDCAN_REJECT, DISABLE, DISABLE);
+    HAL_FDCAN_ConfigGlobalFilter(can, FDCAN_REJECT, FDCAN_REJECT, DISABLE, DISABLE);
 
     // The configuration registers are locked after CAN is started.
-    HAL_FDCAN_Start(&can_obj->can);
+    HAL_FDCAN_Start(can);
 
     // Reset all filters
     for (int f = 0; f < init->StdFiltersNbr; ++f) {
-        can_clearfilter(can_obj, f, false);
+        can_clearfilter(can, f, false);
     }
 
     for (int f = 0; f < init->ExtFiltersNbr; ++f) {
-        can_clearfilter(can_obj, f, true);
+        can_clearfilter(can, f, true);
     }
 
-    can_obj->is_enabled = true;
-    can_obj->num_error_warning = 0;
-    can_obj->num_error_passive = 0;
-    can_obj->num_bus_off = 0;
-
-    switch (can_obj->can_id) {
+    switch (can_id) {
         case PYB_CAN_1:
             NVIC_SetPriority(FDCAN1_IT0_IRQn, IRQ_PRI_CAN);
             HAL_NVIC_EnableIRQ(FDCAN1_IT0_IRQn);
@@ -218,22 +218,18 @@ bool can_init(pyb_can_obj_t *can_obj, uint32_t mode, uint32_t prescaler, uint32_
             return false;
     }
     // FDCAN IT 0
-    HAL_FDCAN_ConfigInterruptLines(&can_obj->can, FDCAN_IT_GROUP_RX_FIFO0 | FDCAN_IT_GROUP_BIT_LINE_ERROR | FDCAN_IT_GROUP_PROTOCOL_ERROR, FDCAN_INTERRUPT_LINE0);
+    HAL_FDCAN_ConfigInterruptLines(can, FDCAN_IT_GROUP_RX_FIFO0 | FDCAN_IT_GROUP_BIT_LINE_ERROR | FDCAN_IT_GROUP_PROTOCOL_ERROR, FDCAN_INTERRUPT_LINE0);
     // FDCAN IT 1
-    HAL_FDCAN_ConfigInterruptLines(&can_obj->can, FDCAN_IT_GROUP_RX_FIFO1, FDCAN_INTERRUPT_LINE1);
+    HAL_FDCAN_ConfigInterruptLines(can, FDCAN_IT_GROUP_RX_FIFO1, FDCAN_INTERRUPT_LINE1);
 
-    uint32_t ActiveITs = FDCAN_IT_BUS_OFF | FDCAN_IT_ERROR_WARNING | FDCAN_IT_ERROR_PASSIVE;
-    ActiveITs |= FDCAN_IT_RX_FIFO0_NEW_MESSAGE | FDCAN_IT_RX_FIFO1_NEW_MESSAGE;
-    ActiveITs |= FDCAN_IT_RX_FIFO0_MESSAGE_LOST | FDCAN_IT_RX_FIFO1_MESSAGE_LOST;
-    ActiveITs |= FDCAN_IT_RX_FIFO0_FULL | FDCAN_IT_RX_FIFO1_FULL;
-    HAL_FDCAN_ActivateNotification(&can_obj->can, ActiveITs, 0);
+    // Enable error interrupts. RX-related interrupts are enabled via can_enable_rx_interrupts()
+    HAL_FDCAN_ActivateNotification(can, FDCAN_IT_BUS_OFF | FDCAN_IT_ERROR_WARNING | FDCAN_IT_ERROR_PASSIVE, 0);
     return true;
 }
 
-void can_deinit(pyb_can_obj_t *self) {
-    self->is_enabled = false;
-    HAL_FDCAN_DeInit(&self->can);
-    if (self->can.Instance == FDCAN1) {
+void can_deinit(FDCAN_HandleTypeDef *can) {
+    HAL_FDCAN_DeInit(can);
+    if (can->Instance == FDCAN1) {
         HAL_NVIC_DisableIRQ(FDCAN1_IT0_IRQn);
         HAL_NVIC_DisableIRQ(FDCAN1_IT1_IRQn);
         // TODO check if FDCAN2 is used.
@@ -241,7 +237,7 @@ void can_deinit(pyb_can_obj_t *self) {
         __HAL_RCC_FDCAN_RELEASE_RESET();
         __HAL_RCC_FDCAN_CLK_DISABLE();
     #if defined(MICROPY_HW_CAN2_TX)
-    } else if (self->can.Instance == FDCAN2) {
+    } else if (can->Instance == FDCAN2) {
         HAL_NVIC_DisableIRQ(FDCAN2_IT0_IRQn);
         HAL_NVIC_DisableIRQ(FDCAN2_IT1_IRQn);
         // TODO check if FDCAN2 is used.
@@ -252,25 +248,52 @@ void can_deinit(pyb_can_obj_t *self) {
     }
 }
 
-void can_clearfilter(pyb_can_obj_t *self, uint32_t f, uint8_t extid) {
-    if (self && self->can.Instance) {
-        FDCAN_FilterTypeDef filter = {0};
-        if (extid == 1) {
-            filter.IdType = FDCAN_EXTENDED_ID;
-        } else {
-            filter.IdType = FDCAN_STANDARD_ID;
+void can_clearfilter(FDCAN_HandleTypeDef *can, uint32_t f, uint8_t extid) {
+    FDCAN_FilterTypeDef filter = {0};
+    if (extid == 1) {
+        filter.IdType = FDCAN_EXTENDED_ID;
+    } else {
+        filter.IdType = FDCAN_STANDARD_ID;
+    }
+    filter.FilterIndex = f;
+    filter.FilterConfig = FDCAN_FILTER_DISABLE;
+    HAL_FDCAN_ConfigFilter(can, &filter);
+}
+
+void can_disable_rx_interrupts(CAN_HandleTypeDef *can, can_rx_fifo_t fifo) {
+    HAL_FDCAN_DeactivateNotification(can, (fifo == CAN_RX_FIFO0) ? FDCAN_IT_RX_FIFO0_MASK : FDCAN_IT_RX_FIFO1_MASK);
+}
+
+void can_enable_rx_interrupts(CAN_HandleTypeDef *can, can_rx_fifo_t fifo, bool enable_msg_received) {
+    uint32_t ints = (fifo == CAN_RX_FIFO0) ? FDCAN_IT_RX_FIFO0_MASK : FDCAN_IT_RX_FIFO1_MASK;
+    if (!enable_msg_received) {
+        ints &= FDCAN_IT_RX_NEW_MESSAGE_MASK;
+    }
+    HAL_FDCAN_ActivateNotification(can, ints, 0);
+}
+
+HAL_StatusTypeDef can_transmit(CAN_HandleTypeDef *can, CanTxMsgTypeDef *txmsg, uint8_t *data, uint32_t timeout_ms) {
+    uint32_t start = HAL_GetTick();
+    while (HAL_FDCAN_GetTxFifoFreeLevel(can) == 0) {
+        if (timeout_ms == 0) {
+            mp_raise_OSError(MP_ETIMEDOUT);
+        }
+        // Check for the Timeout
+        if (timeout_ms != HAL_MAX_DELAY) {
+            if (HAL_GetTick() - start >= timeout_ms) {
+                mp_raise_OSError(MP_ETIMEDOUT);
+            }
         }
-        filter.FilterIndex = f;
-        filter.FilterConfig = FDCAN_FILTER_DISABLE;
-        HAL_FDCAN_ConfigFilter(&self->can, &filter);
+        MICROPY_EVENT_POLL_HOOK
     }
+    return HAL_FDCAN_AddMessageToTxFifoQ(can, txmsg, data);
 }
 
-int can_receive(FDCAN_HandleTypeDef *can, int fifo, FDCAN_RxHeaderTypeDef *hdr, uint8_t *data, uint32_t timeout_ms) {
+int can_receive(FDCAN_HandleTypeDef *can, can_rx_fifo_t fifo, FDCAN_RxHeaderTypeDef *hdr, uint8_t *data, uint32_t timeout_ms) {
     volatile uint32_t *rxf, *rxa;
     uint32_t fl;
 
-    if (fifo == FDCAN_RX_FIFO0) {
+    if (fifo == CAN_RX_FIFO0) {
         rxf = &can->Instance->RXF0S;
         rxa = &can->Instance->RXF0A;
         fl = FDCAN_RXF0S_F0FL;
@@ -293,7 +316,7 @@ int can_receive(FDCAN_HandleTypeDef *can, int fifo, FDCAN_RxHeaderTypeDef *hdr,
 
     // Get pointer to incoming message
     uint32_t index, *address;
-    if (fifo == FDCAN_RX_FIFO0) {
+    if (fifo == CAN_RX_FIFO0) {
         index = (*rxf & FDCAN_RXF0S_F0GI) >> FDCAN_RXF0S_F0GI_Pos;
         #if defined(STM32G4)
         address = (uint32_t *)(can->msgRam.RxFIFO0SA + (index * (18U * 4U)));  // SRAMCAN_RF0_SIZE bytes, size not configurable
@@ -303,7 +326,6 @@ int can_receive(FDCAN_HandleTypeDef *can, int fifo, FDCAN_RxHeaderTypeDef *hdr,
     } else {
         index = (*rxf & FDCAN_RXF1S_F1GI) >> FDCAN_RXF1S_F1GI_Pos;
         #if defined(STM32G4)
-        // ToDo: test FIFO1, FIFO 0 is ok
         address = (uint32_t *)(can->msgRam.RxFIFO1SA + (index * (18U * 4U)));  // SRAMCAN_RF1_SIZE bytes, size not configurable
         #else
         address = (uint32_t *)(can->msgRam.RxFIFO1SA + (index * can->Init.RxFifo1ElmtSize * 4));
@@ -340,117 +362,66 @@ int can_receive(FDCAN_HandleTypeDef *can, int fifo, FDCAN_RxHeaderTypeDef *hdr,
     return 0; // success
 }
 
-static void can_rx_irq_handler(uint can_id, uint fifo_id) {
-    mp_obj_t callback;
-    pyb_can_obj_t *self;
-    mp_obj_t irq_reason = MP_OBJ_NEW_SMALL_INT(0);
-    byte *state;
-
-    self = MP_STATE_PORT(pyb_can_obj_all)[can_id - 1];
-
-    CAN_TypeDef *can = self->can.Instance;
-
-    uint32_t RxFifo0ITs;
-    uint32_t RxFifo1ITs;
-    // uint32_t Errors;
-    uint32_t ErrorStatusITs;
-    uint32_t Psr;
-
-    RxFifo0ITs = can->IR & FDCAN_RX_FIFO0_MASK;
-    RxFifo0ITs &= can->IE;
-    RxFifo1ITs = can->IR & FDCAN_RX_FIFO1_MASK;
-    RxFifo1ITs &= can->IE;
-    // Errors = (&self->can)->Instance->IR & FDCAN_ERROR_MASK;
-    // Errors &= (&self->can)->Instance->IE;
-    ErrorStatusITs = can->IR & FDCAN_ERROR_STATUS_MASK;
-    ErrorStatusITs &= can->IE;
-    Psr = can->PSR;
-
-    if (fifo_id == FDCAN_RX_FIFO0) {
-        callback = self->rxcallback0;
-        state = &self->rx_state0;
-        if (RxFifo0ITs & FDCAN_FLAG_RX_FIFO0_NEW_MESSAGE) {
-            __HAL_FDCAN_DISABLE_IT(&self->can, FDCAN_IT_RX_FIFO0_NEW_MESSAGE);
-            __HAL_FDCAN_CLEAR_FLAG(&self->can, FDCAN_FLAG_RX_FIFO0_NEW_MESSAGE);
-            irq_reason = MP_OBJ_NEW_SMALL_INT(0);
-            *state = RX_STATE_MESSAGE_PENDING;
-
-        }
-        if (RxFifo0ITs & FDCAN_FLAG_RX_FIFO0_FULL) {
-            __HAL_FDCAN_DISABLE_IT(&self->can, FDCAN_IT_RX_FIFO0_FULL);
-            __HAL_FDCAN_CLEAR_FLAG(&self->can, FDCAN_FLAG_RX_FIFO0_FULL);
-            irq_reason = MP_OBJ_NEW_SMALL_INT(1);
-            *state = RX_STATE_FIFO_FULL;
+static void can_rx_irq_handler(uint can_id, CAN_TypeDef *instance, can_rx_fifo_t fifo) {
+    uint32_t ints, rx_fifo_ints, error_ints;
 
-        }
-        if (RxFifo0ITs & FDCAN_FLAG_RX_FIFO0_MESSAGE_LOST) {
-            __HAL_FDCAN_DISABLE_IT(&self->can, FDCAN_IT_RX_FIFO0_MESSAGE_LOST);
-            __HAL_FDCAN_CLEAR_FLAG(&self->can, FDCAN_FLAG_RX_FIFO0_MESSAGE_LOST);
-            irq_reason = MP_OBJ_NEW_SMALL_INT(2);
-            *state = RX_STATE_FIFO_OVERFLOW;
-        }
+    ints = instance->IR & instance->IE;
 
+    if (fifo == CAN_RX_FIFO0) {
+        rx_fifo_ints = ints & FDCAN_IT_RX_FIFO0_MASK;
     } else {
-        callback = self->rxcallback1;
-        state = &self->rx_state1;
-        if (RxFifo1ITs & FDCAN_FLAG_RX_FIFO1_NEW_MESSAGE) {
-            __HAL_FDCAN_DISABLE_IT(&self->can, FDCAN_IT_RX_FIFO1_NEW_MESSAGE);
-            __HAL_FDCAN_CLEAR_FLAG(&self->can, FDCAN_FLAG_RX_FIFO1_NEW_MESSAGE);
-            irq_reason = MP_OBJ_NEW_SMALL_INT(0);
-            *state = RX_STATE_MESSAGE_PENDING;
+        rx_fifo_ints = ints & FDCAN_IT_RX_FIFO1_MASK;
+    }
+    error_ints = ints & FDCAN_IT_ERROR_STATUS_MASK;
 
-        }
-        if (RxFifo1ITs & FDCAN_FLAG_RX_FIFO1_FULL) {
-            __HAL_FDCAN_DISABLE_IT(&self->can, FDCAN_IT_RX_FIFO1_FULL);
-            __HAL_FDCAN_CLEAR_FLAG(&self->can, FDCAN_FLAG_RX_FIFO1_FULL);
-            irq_reason = MP_OBJ_NEW_SMALL_INT(1);
-            *state = RX_STATE_FIFO_FULL;
+    // Disable receive interrupts, re-enabled by higher layer after calling can_receive()
+    // (Note: can't use __HAL_CAN API as only have a CAN_TypeDef, not CAN_HandleTypeDef)
+    instance->IE &= ~rx_fifo_ints;
+    instance->IR = rx_fifo_ints | error_ints;
 
+    if (rx_fifo_ints) {
+        if (rx_fifo_ints & FDCAN_IT_RX_NEW_MESSAGE_MASK) {
+            can_irq_handler(can_id, CAN_INT_MESSAGE_RECEIVED, fifo);
+        }
+        if (rx_fifo_ints & FDCAN_IT_RX_FULL_MASK) {
+            can_irq_handler(can_id, CAN_INT_FIFO_FULL, fifo);
         }
-        if (RxFifo1ITs & FDCAN_FLAG_RX_FIFO1_MESSAGE_LOST) {
-            __HAL_FDCAN_DISABLE_IT(&self->can, FDCAN_IT_RX_FIFO1_MESSAGE_LOST);
-            __HAL_FDCAN_CLEAR_FLAG(&self->can, FDCAN_FLAG_RX_FIFO1_MESSAGE_LOST);
-            irq_reason = MP_OBJ_NEW_SMALL_INT(2);
-            *state = RX_STATE_FIFO_OVERFLOW;
+        if (rx_fifo_ints & FDCAN_IT_RX_MESSAGE_LOST_MASK) {
+            can_irq_handler(can_id, CAN_INT_FIFO_OVERFLOW, fifo);
         }
     }
 
-    if (ErrorStatusITs & FDCAN_FLAG_ERROR_WARNING) {
-        __HAL_FDCAN_CLEAR_FLAG(&self->can, FDCAN_FLAG_ERROR_WARNING);
-        if (Psr & FDCAN_PSR_EW) {
-            irq_reason = MP_OBJ_NEW_SMALL_INT(3);
-            // mp_printf(MICROPY_ERROR_PRINTER, "clear warning %08x\n", (can->IR & FDCAN_ERROR_STATUS_MASK));
+    if (error_ints) {
+        uint32_t Psr = instance->PSR;
+
+        if (error_ints & FDCAN_IT_ERROR_WARNING) {
+            if (Psr & FDCAN_PSR_EW) {
+                can_irq_handler(can_id, CAN_INT_ERR_WARNING, 0);
+            }
         }
-    }
-    if (ErrorStatusITs & FDCAN_FLAG_ERROR_PASSIVE) {
-        __HAL_FDCAN_CLEAR_FLAG(&self->can, FDCAN_FLAG_ERROR_PASSIVE);
-        if (Psr & FDCAN_PSR_EP) {
-            irq_reason = MP_OBJ_NEW_SMALL_INT(4);
-            // mp_printf(MICROPY_ERROR_PRINTER, "clear passive %08x\n", (can->IR & FDCAN_ERROR_STATUS_MASK));
+        if (error_ints & FDCAN_IT_ERROR_PASSIVE) {
+            if (Psr & FDCAN_PSR_EP) {
+                can_irq_handler(can_id, CAN_INT_ERR_PASSIVE, 0);
+            }
         }
-    }
-    if (ErrorStatusITs & FDCAN_FLAG_BUS_OFF) {
-        __HAL_FDCAN_CLEAR_FLAG(&self->can, FDCAN_FLAG_BUS_OFF);
-        if (Psr & FDCAN_PSR_BO) {
-            irq_reason = MP_OBJ_NEW_SMALL_INT(5);
-            // mp_printf(MICROPY_ERROR_PRINTER, "bus off %08x\n", (can->IR & FDCAN_ERROR_STATUS_MASK));
+        if (error_ints & FDCAN_IT_BUS_OFF) {
+            if (Psr & FDCAN_PSR_BO) {
+                can_irq_handler(can_id, CAN_INT_ERR_BUS_OFF, 0);
+            }
         }
     }
-
-    pyb_can_handle_callback(self, fifo_id, callback, irq_reason);
-    // mp_printf(MICROPY_ERROR_PRINTER, "Ints: %08x, %08x, %08x\n", RxFifo0ITs, RxFifo1ITs, ErrorStatusITs);
 }
 
 #if defined(MICROPY_HW_CAN1_TX)
 void FDCAN1_IT0_IRQHandler(void) {
     IRQ_ENTER(FDCAN1_IT0_IRQn);
-    can_rx_irq_handler(PYB_CAN_1, FDCAN_RX_FIFO0);
+    can_rx_irq_handler(PYB_CAN_1, FDCAN1, CAN_RX_FIFO0);
     IRQ_EXIT(FDCAN1_IT0_IRQn);
 }
 
 void FDCAN1_IT1_IRQHandler(void) {
     IRQ_ENTER(FDCAN1_IT1_IRQn);
-    can_rx_irq_handler(PYB_CAN_1, FDCAN_RX_FIFO1);
+    can_rx_irq_handler(PYB_CAN_1, FDCAN1, CAN_RX_FIFO1);
     IRQ_EXIT(FDCAN1_IT1_IRQn);
 }
 #endif
@@ -458,13 +429,13 @@ void FDCAN1_IT1_IRQHandler(void) {
 #if defined(MICROPY_HW_CAN2_TX)
 void FDCAN2_IT0_IRQHandler(void) {
     IRQ_ENTER(FDCAN2_IT0_IRQn);
-    can_rx_irq_handler(PYB_CAN_2, FDCAN_RX_FIFO0);
+    can_rx_irq_handler(PYB_CAN_2, FDCAN2, CAN_RX_FIFO0);
     IRQ_EXIT(FDCAN2_IT0_IRQn);
 }
 
 void FDCAN2_IT1_IRQHandler(void) {
     IRQ_ENTER(FDCAN2_IT1_IRQn);
-    can_rx_irq_handler(PYB_CAN_2, FDCAN_RX_FIFO1);
+    can_rx_irq_handler(PYB_CAN_2, FDCAN2, CAN_RX_FIFO1);
     IRQ_EXIT(FDCAN2_IT1_IRQn);
 }
 #endif
diff --git a/ports/stm32/machine_adc.c b/ports/stm32/machine_adc.c
index 8f07075914b88..c3211ea4f4a1a 100644
--- a/ports/stm32/machine_adc.c
+++ b/ports/stm32/machine_adc.c
@@ -445,10 +445,13 @@ static void adc_config_channel(ADC_TypeDef *adc, uint32_t channel, uint32_t samp
 
 static uint32_t adc_read_channel(ADC_TypeDef *adc) {
     uint32_t value;
-    #if defined(STM32G4)
-    // For STM32G4 there is errata 2.7.7, "Wrong ADC result if conversion done late after
-    // calibration or previous conversion".  According to the errata, this can be avoided
-    // by performing two consecutive ADC conversions and keeping the second result.
+    #if defined(STM32G4) || defined(STM32WB)
+    // For STM32G4 errata 2.7.7 / STM32WB errata 2.7.1:
+    // "Wrong ADC result if conversion done late after calibration or previous conversion"
+    // states an incorrect reading is returned if more than 1ms has elapsed since the last
+    // reading or calibration. According to the errata, this can be avoided by performing
+    // two consecutive ADC conversions and keeping the second result.
+    // Note: On STM32WB55 @ 64Mhz each ADC read takes ~ 3us.
     for (uint8_t i = 0; i < 2; i++)
     #endif
     {
diff --git a/ports/stm32/main.c b/ports/stm32/main.c
index ea870ef0da7ca..e8395013b9188 100644
--- a/ports/stm32/main.c
+++ b/ports/stm32/main.c
@@ -86,7 +86,7 @@
 #include "accel.h"
 #include "servo.h"
 #include "dac.h"
-#include "can.h"
+#include "pyb_can.h"
 #include "subghz.h"
 
 #if MICROPY_PY_THREAD
@@ -185,8 +185,15 @@ MP_NOINLINE static bool init_flash_fs(uint reset_mode) {
 
     if (len != -1) {
         // Detected a littlefs filesystem so create correct block device for it
-        mp_obj_t args[] = { MP_OBJ_NEW_QSTR(MP_QSTR_len), MP_OBJ_NEW_SMALL_INT(len) };
-        bdev = MP_OBJ_TYPE_GET_SLOT(&pyb_flash_type, make_new)(&pyb_flash_type, 0, 1, args);
+        mp_obj_t lfs_bdev = pyb_flash_new_obj(0, len);
+        if (lfs_bdev == mp_const_none) {
+            // Invalid len detected, filesystem header block likely corrupted.
+            // Create bdev with default size to attempt to mount the whole flash or
+            // let user attempt recovery if desired.
+            bdev = pyb_flash_new_obj(0, -1);
+        } else {
+            bdev = lfs_bdev;
+        }
     }
 
     #endif
@@ -508,11 +515,8 @@ void stm32_main(uint32_t reset_mode) {
     mp_thread_init();
     #endif
 
-    // Stack limit should be less than real stack size, so we have a chance
-    // to recover from limit hit.  (Limit is measured in bytes.)
-    // Note: stack control relies on main thread being initialised above
-    mp_stack_set_top(&_estack);
-    mp_stack_set_limit((char *)&_estack - (char *)&_sstack - 1024);
+    // Stack limit init.
+    mp_cstack_init_with_top(&_estack, (char *)&_estack - (char *)&_sstack);
 
     // GC init
     gc_init(MICROPY_HEAP_START, MICROPY_HEAP_END);
@@ -536,7 +540,7 @@ void stm32_main(uint32_t reset_mode) {
     timer_init0();
 
     #if MICROPY_HW_ENABLE_CAN
-    can_init0();
+    pyb_can_init0();
     #endif
 
     #if MICROPY_HW_ENABLE_USB
@@ -683,7 +687,7 @@ void stm32_main(uint32_t reset_mode) {
     pyb_i2c_deinit_all();
     #endif
     #if MICROPY_HW_ENABLE_CAN
-    can_deinit_all();
+    pyb_can_deinit_all();
     #endif
     #if MICROPY_HW_ENABLE_DAC
     dac_deinit_all();
diff --git a/ports/stm32/mboot/main.c b/ports/stm32/mboot/main.c
index 9bb2dcfcaf408..ff44dac630aae 100644
--- a/ports/stm32/mboot/main.c
+++ b/ports/stm32/mboot/main.c
@@ -176,7 +176,7 @@ void HAL_Delay(uint32_t ms) {
     mp_hal_delay_ms(ms);
 }
 
-NORETURN static void __fatal_error(const char *msg) {
+MP_NORETURN static void __fatal_error(const char *msg) {
     NVIC_SystemReset();
     for (;;) {
     }
@@ -429,38 +429,82 @@ void mp_hal_pin_config_speed(uint32_t port_pin, uint32_t speed) {
     || defined(STM32F723xx) \
     || defined(STM32F732xx) \
     || defined(STM32F733xx)
-#define FLASH_LAYOUT_STR "@Internal Flash  /0x08000000/04*016Kg,01*064Kg,07*128Kg" MBOOT_SPIFLASH_LAYOUT MBOOT_SPIFLASH2_LAYOUT
+#define INTERNAL_FLASH_LAYOUT "@Internal Flash  /0x08000000/04*016Kg,01*064Kg,07*128Kg"
 #elif defined(STM32F765xx) || defined(STM32F767xx) || defined(STM32F769xx)
-#define FLASH_LAYOUT_STR "@Internal Flash  /0x08000000/04*032Kg,01*128Kg,07*256Kg" MBOOT_SPIFLASH_LAYOUT MBOOT_SPIFLASH2_LAYOUT
+#define INTERNAL_FLASH_LAYOUT "@Internal Flash  /0x08000000/04*032Kg,01*128Kg,07*256Kg"
 #elif defined(STM32G0)
-#define FLASH_LAYOUT_STR "@Internal Flash  /0x08000000/256*02Kg" MBOOT_SPIFLASH_LAYOUT MBOOT_SPIFLASH2_LAYOUT
+#define INTERNAL_FLASH_LAYOUT "@Internal Flash  /0x08000000/256*02Kg"
 #elif defined(STM32H5)
-#define FLASH_LAYOUT_TEMPLATE "@Internal Flash  /0x08000000/???*08Kg" MBOOT_SPIFLASH_LAYOUT MBOOT_SPIFLASH2_LAYOUT
+#define INTERNAL_FLASH_LAYOUT "@Internal Flash  /0x08000000/???*08Kg"
+#define INTERNAL_FLASH_LAYOUT_HAS_TEMPLATE (1)
 #elif defined(STM32H743xx)
-#define FLASH_LAYOUT_STR "@Internal Flash  /0x08000000/16*128Kg" MBOOT_SPIFLASH_LAYOUT MBOOT_SPIFLASH2_LAYOUT
+#define INTERNAL_FLASH_LAYOUT "@Internal Flash  /0x08000000/16*128Kg"
 #elif defined(STM32H750xx)
-#define FLASH_LAYOUT_STR "@Internal Flash  /0x08000000/01*128Kg" MBOOT_SPIFLASH_LAYOUT MBOOT_SPIFLASH2_LAYOUT
+#define INTERNAL_FLASH_LAYOUT "@Internal Flash  /0x08000000/01*128Kg"
 #elif defined(STM32WB)
-#define FLASH_LAYOUT_STR "@Internal Flash  /0x08000000/256*04Kg" MBOOT_SPIFLASH_LAYOUT MBOOT_SPIFLASH2_LAYOUT
+#define INTERNAL_FLASH_LAYOUT "@Internal Flash  /0x08000000/256*04Kg"
 #endif
 
-#if !defined(FLASH_LAYOUT_STR)
+#if INTERNAL_FLASH_LAYOUT_HAS_TEMPLATE \
+    || defined(MBOOT_SPIFLASH_LAYOUT_DYNAMIC_MAX_LEN) \
+    || defined(MBOOT_SPIFLASH2_LAYOUT_DYNAMIC_MAX_LEN)
 
-#define FLASH_LAYOUT_STR_ALLOC (sizeof(FLASH_LAYOUT_TEMPLATE))
+#ifndef MBOOT_SPIFLASH_LAYOUT_DYNAMIC_MAX_LEN
+#define MBOOT_SPIFLASH_LAYOUT_DYNAMIC_MAX_LEN (sizeof(MBOOT_SPIFLASH_LAYOUT) - 1)
+#endif
+
+#ifndef MBOOT_SPIFLASH2_LAYOUT_DYNAMIC_MAX_LEN
+#define MBOOT_SPIFLASH2_LAYOUT_DYNAMIC_MAX_LEN (sizeof(MBOOT_SPIFLASH2_LAYOUT) - 1)
+#endif
+
+#define FLASH_LAYOUT_STR_ALLOC \
+    ( \
+    (sizeof(INTERNAL_FLASH_LAYOUT) - 1) \
+    + MBOOT_SPIFLASH_LAYOUT_DYNAMIC_MAX_LEN \
+    + MBOOT_SPIFLASH2_LAYOUT_DYNAMIC_MAX_LEN \
+    + 1 \
+    )
 
 // Build the flash layout string from a template with total flash size inserted.
-static size_t build_flash_layout_str(char *buf) {
-    size_t len = FLASH_LAYOUT_STR_ALLOC - 1;
-    memcpy(buf, FLASH_LAYOUT_TEMPLATE, len + 1);
+static size_t build_flash_layout_str(uint8_t *buf) {
+    const char *internal_layout = INTERNAL_FLASH_LAYOUT;
+    size_t internal_layout_len = strlen(internal_layout);
+
+    const char *spiflash_layout = MBOOT_SPIFLASH_LAYOUT;
+    size_t spiflash_layout_len = strlen(spiflash_layout);
+
+    const char *spiflash2_layout = MBOOT_SPIFLASH2_LAYOUT;
+    size_t spiflash2_layout_len = strlen(spiflash2_layout);
+
+    uint8_t *buf_orig = buf;
+
+    memcpy(buf, internal_layout, internal_layout_len);
+    buf += internal_layout_len;
+
+    #if INTERNAL_FLASH_LAYOUT_HAS_TEMPLATE
     unsigned int num_sectors = FLASH_SIZE / FLASH_SECTOR_SIZE;
-    buf += 31; // location of "???" in FLASH_LAYOUT_TEMPLATE
+    uint8_t *buf_size = buf_orig + 31; // location of "???" in FLASH_LAYOUT_TEMPLATE
     for (unsigned int i = 0; i < 3; ++i) {
-        *buf-- = '0' + num_sectors % 10;
+        *buf_size-- = '0' + num_sectors % 10;
         num_sectors /= 10;
     }
-    return len;
+    #endif
+
+    memcpy(buf, spiflash_layout, spiflash_layout_len);
+    buf += spiflash_layout_len;
+
+    memcpy(buf, spiflash2_layout, spiflash2_layout_len);
+    buf += spiflash2_layout_len;
+
+    *buf++ = '\0';
+
+    return buf - buf_orig;
 }
 
+#else
+
+#define FLASH_LAYOUT_STR INTERNAL_FLASH_LAYOUT MBOOT_SPIFLASH_LAYOUT MBOOT_SPIFLASH2_LAYOUT
+
 #endif
 
 static bool flash_is_modifiable_addr_range(uint32_t addr, uint32_t len) {
@@ -1188,7 +1232,7 @@ static uint8_t *pyb_usbdd_StrDescriptor(USBD_HandleTypeDef *pdev, uint8_t idx, u
             USBD_GetString((uint8_t *)FLASH_LAYOUT_STR, str_desc, length);
             #else
             {
-                char buf[FLASH_LAYOUT_STR_ALLOC];
+                uint8_t buf[FLASH_LAYOUT_STR_ALLOC];
                 build_flash_layout_str(buf);
                 USBD_GetString((uint8_t *)buf, str_desc, length);
             }
@@ -1399,7 +1443,7 @@ static int pyb_usbdd_shutdown(void) {
 /******************************************************************************/
 // main
 
-NORETURN static __attribute__((naked)) void branch_to_application(uint32_t r0, uint32_t bl_addr) {
+MP_NORETURN static __attribute__((naked)) void branch_to_application(uint32_t r0, uint32_t bl_addr) {
     __asm volatile (
         "ldr r2, [r1, #0]\n"    // get address of stack pointer
         "msr msp, r2\n"         // set stack pointer
diff --git a/ports/stm32/mboot/mboot.h b/ports/stm32/mboot/mboot.h
index 1fabff0080b1c..bc1320c5cdb36 100644
--- a/ports/stm32/mboot/mboot.h
+++ b/ports/stm32/mboot/mboot.h
@@ -36,7 +36,7 @@
 #define ELEM_DATA_START (&_estack[0])
 #define ELEM_DATA_MAX (&_estack[ELEM_DATA_SIZE])
 
-#define NORETURN __attribute__((noreturn))
+#define MP_NORETURN __attribute__((noreturn))
 #define MP_ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
 
 // The default UI code in ui.c only works if there is at least one LED configured.
diff --git a/ports/stm32/modmachine.c b/ports/stm32/modmachine.c
index 7c1c4da60bff2..f3bdf1bc50278 100644
--- a/ports/stm32/modmachine.c
+++ b/ports/stm32/modmachine.c
@@ -247,6 +247,14 @@ static mp_obj_t machine_info(size_t n_args, const mp_obj_t *args) {
         mp_printf(print, "  1=%u 2=%u m=%u\n", info.num_1block, info.num_2block, info.max_block);
     }
 
+    // SPI flash size
+    #if defined(MICROPY_HW_SPIFLASH_SIZE_BITS)
+    mp_printf(print, "SPI flash size: %d\n", MICROPY_HW_SPIFLASH_SIZE_BITS / 8);
+    #endif
+    #if defined(MICROPY_HW_QSPIFLASH_SIZE_BITS_LOG2)
+    mp_printf(print, "QSPI flash size: %d\n", 1 << (MICROPY_HW_QSPIFLASH_SIZE_BITS_LOG2 - 3));
+    #endif
+
     // free space on flash
     {
         #if MICROPY_VFS_FAT
@@ -283,12 +291,12 @@ static mp_obj_t mp_machine_unique_id(void) {
 }
 
 // Resets the pyboard in a manner similar to pushing the external RESET button.
-NORETURN static void mp_machine_reset(void) {
+MP_NORETURN static void mp_machine_reset(void) {
     powerctrl_mcu_reset();
 }
 
 // Activate the bootloader without BOOT* pins.
-NORETURN void mp_machine_bootloader(size_t n_args, const mp_obj_t *args) {
+MP_NORETURN void mp_machine_bootloader(size_t n_args, const mp_obj_t *args) {
     #if MICROPY_HW_ENABLE_USB
     pyb_usb_dev_deinit();
     #endif
diff --git a/ports/stm32/modpyb.c b/ports/stm32/modpyb.c
index 176010a7e5107..3d8696e3c426e 100644
--- a/ports/stm32/modpyb.c
+++ b/ports/stm32/modpyb.c
@@ -41,7 +41,7 @@
 #include "i2c.h"
 #include "spi.h"
 #include "uart.h"
-#include "can.h"
+#include "pyb_can.h"
 #include "adc.h"
 #include "storage.h"
 #include "sdcard.h"
diff --git a/ports/stm32/mpconfigboard_common.h b/ports/stm32/mpconfigboard_common.h
index 4ce0a75b87e2b..e01a4d4b87e0b 100644
--- a/ports/stm32/mpconfigboard_common.h
+++ b/ports/stm32/mpconfigboard_common.h
@@ -67,6 +67,26 @@
 #define MICROPY_HW_ENTER_BOOTLOADER_VIA_RESET (1)
 #endif
 
+// Whether to enable ROMFS on the internal flash.
+#ifndef MICROPY_HW_ROMFS_ENABLE_INTERNAL_FLASH
+#define MICROPY_HW_ROMFS_ENABLE_INTERNAL_FLASH (0)
+#endif
+
+// Whether to enable ROMFS on external QSPI flash.
+#ifndef MICROPY_HW_ROMFS_ENABLE_EXTERNAL_QSPI
+#define MICROPY_HW_ROMFS_ENABLE_EXTERNAL_QSPI (0)
+#endif
+
+// Whether to enable ROMFS partition 0.
+#ifndef MICROPY_HW_ROMFS_ENABLE_PART0
+#define MICROPY_HW_ROMFS_ENABLE_PART0 (0)
+#endif
+
+// Whether to enable ROMFS partition 1.
+#ifndef MICROPY_HW_ROMFS_ENABLE_PART1
+#define MICROPY_HW_ROMFS_ENABLE_PART1 (0)
+#endif
+
 // Whether to enable storage on the internal flash of the MCU
 #ifndef MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE
 #define MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE (1)
diff --git a/ports/stm32/mpconfigport.h b/ports/stm32/mpconfigport.h
index 2b57446ee8233..d1d6fe249bd6f 100644
--- a/ports/stm32/mpconfigport.h
+++ b/ports/stm32/mpconfigport.h
@@ -43,6 +43,7 @@
 #define MICROPY_GC_STACK_ENTRY_TYPE uint16_t
 #endif
 #endif
+#define MICROPY_STACK_CHECK_MARGIN  (1024)
 #define MICROPY_ALLOC_PATH_MAX      (128)
 
 // optimisations
@@ -79,6 +80,9 @@
 #define MICROPY_SCHEDULER_STATIC_NODES (1)
 #define MICROPY_SCHEDULER_DEPTH     (8)
 #define MICROPY_VFS                 (1)
+#ifndef MICROPY_VFS_ROM
+#define MICROPY_VFS_ROM (MICROPY_HW_ROMFS_ENABLE_INTERNAL_FLASH || MICROPY_HW_ROMFS_ENABLE_EXTERNAL_QSPI)
+#endif
 
 // control over Python builtins
 #ifndef MICROPY_PY_BUILTINS_HELP_TEXT
diff --git a/ports/stm32/mphalport.c b/ports/stm32/mphalport.c
index dfd50cebd3dee..b4b2267fa02b1 100644
--- a/ports/stm32/mphalport.c
+++ b/ports/stm32/mphalport.c
@@ -20,7 +20,7 @@ const byte mp_hal_status_to_errno_table[4] = {
 uint8_t mp_hal_unique_id_address[12];
 #endif
 
-NORETURN void mp_hal_raise(HAL_StatusTypeDef status) {
+MP_NORETURN void mp_hal_raise(HAL_StatusTypeDef status) {
     mp_raise_OSError(mp_hal_status_to_errno_table[status]);
 }
 
diff --git a/ports/stm32/mphalport.h b/ports/stm32/mphalport.h
index e520bc54ae6c0..03b0f8e7722ae 100644
--- a/ports/stm32/mphalport.h
+++ b/ports/stm32/mphalport.h
@@ -37,7 +37,7 @@ static inline int mp_hal_status_to_neg_errno(HAL_StatusTypeDef status) {
     return -mp_hal_status_to_errno_table[status];
 }
 
-NORETURN void mp_hal_raise(HAL_StatusTypeDef status);
+MP_NORETURN void mp_hal_raise(HAL_StatusTypeDef status);
 void mp_hal_set_interrupt_char(int c); // -1 to disable
 
 // Atomic section helpers.
diff --git a/ports/stm32/mpu.h b/ports/stm32/mpu.h
index a87c04a58df5c..5756cb0560dde 100644
--- a/ports/stm32/mpu.h
+++ b/ports/stm32/mpu.h
@@ -28,7 +28,7 @@
 
 #include "irq.h"
 
-#if (defined(STM32F4) && defined(MICROPY_HW_ETH_MDC)) || defined(STM32F7) || defined(STM32H7) || defined(STM32WB)
+#if (defined(STM32F4) && defined(MICROPY_HW_ETH_MDC)) || defined(STM32F7) || defined(STM32G4) || defined(STM32H7) || defined(STM32WB)
 
 #define MPU_REGION_ETH      (MPU_REGION_NUMBER0)
 #define MPU_REGION_QSPI1    (MPU_REGION_NUMBER1)
diff --git a/ports/stm32/octospi.c b/ports/stm32/octospi.c
index 407f485664c6b..861941325c615 100644
--- a/ports/stm32/octospi.c
+++ b/ports/stm32/octospi.c
@@ -105,8 +105,9 @@ void octospi_init(void) {
     OCTOSPI1->CR |= OCTOSPI_CR_EN;
 }
 
-static int octospi_ioctl(void *self_in, uint32_t cmd) {
+static int octospi_ioctl(void *self_in, uint32_t cmd, uintptr_t arg) {
     (void)self_in;
+    (void)arg;
     switch (cmd) {
         case MP_QSPI_IOCTL_INIT:
             octospi_init();
@@ -282,7 +283,7 @@ static int octospi_read_cmd(void *self_in, uint8_t cmd, size_t len, uint32_t *de
     return 0;
 }
 
-static int octospi_read_cmd_qaddr_qdata(void *self_in, uint8_t cmd, uint32_t addr, size_t len, uint8_t *dest) {
+static int octospi_read_cmd_qaddr_qdata(void *self_in, uint8_t cmd, uint32_t addr, uint8_t num_dummy, size_t len, uint8_t *dest) {
     (void)self_in;
 
     #if defined(MICROPY_HW_OSPIFLASH_IO1) && !defined(MICROPY_HW_OSPIFLASH_IO2) && !defined(MICROPY_HW_OSPIFLASH_IO4)
@@ -292,7 +293,7 @@ static int octospi_read_cmd_qaddr_qdata(void *self_in, uint8_t cmd, uint32_t add
     uint32_t adsize = MICROPY_HW_SPI_ADDR_IS_32BIT(addr) ? 3 : 2;
     uint32_t dmode = 2; // data on 2-lines
     uint32_t admode = 2; // address on 2-lines
-    uint32_t dcyc = 4; // 4 dummy cycles
+    uint32_t dcyc = 2 * num_dummy; // 2N dummy cycles
 
     if (cmd == 0xeb || cmd == 0xec) {
         // Convert to 2-line command.
diff --git a/ports/stm32/powerctrl.c b/ports/stm32/powerctrl.c
index eea009e2d782b..e3e2fcdd44eb5 100644
--- a/ports/stm32/powerctrl.c
+++ b/ports/stm32/powerctrl.c
@@ -115,7 +115,7 @@ static inline void powerctrl_disable_hsi_if_unused(void) {
     #endif
 }
 
-NORETURN void powerctrl_mcu_reset(void) {
+MP_NORETURN void powerctrl_mcu_reset(void) {
     #if MICROPY_HW_ENTER_BOOTLOADER_VIA_RESET
     *BL_STATE_PTR = BL_STATE_INVALID;
     #if __DCACHE_PRESENT == 1
@@ -125,7 +125,7 @@ NORETURN void powerctrl_mcu_reset(void) {
     NVIC_SystemReset();
 }
 
-NORETURN static __attribute__((naked)) void branch_to_bootloader(uint32_t r0, uint32_t bl_addr) {
+MP_NORETURN static __attribute__((naked)) void branch_to_bootloader(uint32_t r0, uint32_t bl_addr) {
     __asm volatile (
         "ldr r2, [r1, #0]\n"    // get address of stack pointer
         "msr msp, r2\n"         // get stack pointer
@@ -135,7 +135,7 @@ NORETURN static __attribute__((naked)) void branch_to_bootloader(uint32_t r0, ui
     MP_UNREACHABLE;
 }
 
-NORETURN void powerctrl_enter_bootloader(uint32_t r0, uint32_t bl_addr) {
+MP_NORETURN void powerctrl_enter_bootloader(uint32_t r0, uint32_t bl_addr) {
     #if MICROPY_HW_ENTER_BOOTLOADER_VIA_RESET
 
     // Enter the bootloader via a reset, so everything is reset (including WDT).
@@ -1016,7 +1016,7 @@ void powerctrl_enter_stop_mode(void) {
     enable_irq(irq_state);
 }
 
-NORETURN void powerctrl_enter_standby_mode(void) {
+MP_NORETURN void powerctrl_enter_standby_mode(void) {
     rtc_init_finalise();
 
     #if defined(MICROPY_BOARD_ENTER_STANDBY)
diff --git a/ports/stm32/powerctrl.h b/ports/stm32/powerctrl.h
index 5b9240561182f..05a70e52c6aaa 100644
--- a/ports/stm32/powerctrl.h
+++ b/ports/stm32/powerctrl.h
@@ -39,14 +39,14 @@ static inline void stm32_system_init(void) {
 
 void SystemClock_Config(void);
 
-NORETURN void powerctrl_mcu_reset(void);
-NORETURN void powerctrl_enter_bootloader(uint32_t r0, uint32_t bl_addr);
+MP_NORETURN void powerctrl_mcu_reset(void);
+MP_NORETURN void powerctrl_enter_bootloader(uint32_t r0, uint32_t bl_addr);
 void powerctrl_check_enter_bootloader(void);
 
 void powerctrl_config_systick(void);
 int powerctrl_rcc_clock_config_pll(RCC_ClkInitTypeDef *rcc_init, uint32_t sysclk_mhz, bool need_pllsai);
 int powerctrl_set_sysclk(uint32_t sysclk, uint32_t ahb, uint32_t apb1, uint32_t apb2);
 void powerctrl_enter_stop_mode(void);
-NORETURN void powerctrl_enter_standby_mode(void);
+MP_NORETURN void powerctrl_enter_standby_mode(void);
 
 #endif // MICROPY_INCLUDED_STM32_POWERCTRL_H
diff --git a/ports/stm32/pyb_can.c b/ports/stm32/pyb_can.c
index 181b3173866c3..0d004ecfcb5e4 100644
--- a/ports/stm32/pyb_can.c
+++ b/ports/stm32/pyb_can.c
@@ -27,6 +27,7 @@
 #include <string.h>
 #include <stdlib.h>
 
+#include "py/obj.h"
 #include "py/objarray.h"
 #include "py/runtime.h"
 #include "py/gc.h"
@@ -35,6 +36,7 @@
 #include "py/mperrno.h"
 #include "py/mphal.h"
 #include "bufhelper.h"
+#include "pyb_can.h"
 #include "can.h"
 #include "irq.h"
 
@@ -44,8 +46,6 @@
 
 #define CAN_MAX_DATA_FRAME          (64)
 
-#define CAN_FIFO0                   FDCAN_RX_FIFO0
-#define CAN_FIFO1                   FDCAN_RX_FIFO1
 #define CAN_FILTER_FIFO0            (0)
 
 // Default timings; 125Kbps
@@ -82,21 +82,6 @@
 #define CAN2_RX1_IRQn               FDCAN2_IT1_IRQn
 #endif
 
-#define CAN_IT_FIFO0_FULL           FDCAN_IT_RX_FIFO0_FULL
-#define CAN_IT_FIFO1_FULL           FDCAN_IT_RX_FIFO1_FULL
-#define CAN_IT_FIFO0_OVRF           FDCAN_IT_RX_FIFO0_MESSAGE_LOST
-#define CAN_IT_FIFO1_OVRF           FDCAN_IT_RX_FIFO1_MESSAGE_LOST
-#define CAN_IT_FIFO0_PENDING        FDCAN_IT_RX_FIFO0_NEW_MESSAGE
-#define CAN_IT_FIFO1_PENDING        FDCAN_IT_RX_FIFO1_NEW_MESSAGE
-#define CAN_FLAG_FIFO0_FULL         FDCAN_FLAG_RX_FIFO0_FULL
-#define CAN_FLAG_FIFO1_FULL         FDCAN_FLAG_RX_FIFO1_FULL
-#define CAN_FLAG_FIFO0_OVRF         FDCAN_FLAG_RX_FIFO0_MESSAGE_LOST
-#define CAN_FLAG_FIFO1_OVRF         FDCAN_FLAG_RX_FIFO1_MESSAGE_LOST
-
-#define __HAL_CAN_ENABLE_IT         __HAL_FDCAN_ENABLE_IT
-#define __HAL_CAN_DISABLE_IT        __HAL_FDCAN_DISABLE_IT
-#define __HAL_CAN_CLEAR_FLAG        __HAL_FDCAN_CLEAR_FLAG
-#define __HAL_CAN_MSG_PENDING       HAL_FDCAN_GetRxFifoFillLevel
 extern const uint8_t DLCtoBytes[16];
 #else
 
@@ -113,21 +98,27 @@ extern const uint8_t DLCtoBytes[16];
 #define CAN_MAXIMUM_NBS2            (8)
 #define CAN_MINIMUM_TSEG            (1)
 
-#define CAN_IT_FIFO0_FULL           CAN_IT_FF0
-#define CAN_IT_FIFO1_FULL           CAN_IT_FF1
-#define CAN_IT_FIFO0_OVRF           CAN_IT_FOV0
-#define CAN_IT_FIFO1_OVRF           CAN_IT_FOV1
-#define CAN_IT_FIFO0_PENDING        CAN_IT_FMP0
-#define CAN_IT_FIFO1_PENDING        CAN_IT_FMP1
-#define CAN_FLAG_FIFO0_FULL         CAN_FLAG_FF0
-#define CAN_FLAG_FIFO1_FULL         CAN_FLAG_FF1
-#define CAN_FLAG_FIFO0_OVRF         CAN_FLAG_FOV0
-#define CAN_FLAG_FIFO1_OVRF         CAN_FLAG_FOV1
-
 static uint8_t can2_start_bank = 14;
 
 #endif
 
+static mp_obj_t pyb_can_deinit(mp_obj_t self_in);
+
+void pyb_can_init0(void) {
+    for (uint i = 0; i < MP_ARRAY_SIZE(MP_STATE_PORT(pyb_can_obj_all)); i++) {
+        MP_STATE_PORT(pyb_can_obj_all)[i] = NULL;
+    }
+}
+
+void pyb_can_deinit_all(void) {
+    for (int i = 0; i < MP_ARRAY_SIZE(MP_STATE_PORT(pyb_can_obj_all)); i++) {
+        pyb_can_obj_t *can_obj = MP_STATE_PORT(pyb_can_obj_all)[i];
+        if (can_obj != NULL) {
+            pyb_can_deinit(MP_OBJ_FROM_PTR(can_obj));
+        }
+    }
+}
+
 static void pyb_can_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
     pyb_can_obj_t *self = MP_OBJ_TO_PTR(self_in);
     if (!self->is_enabled) {
@@ -283,15 +274,20 @@ static mp_obj_t pyb_can_init_helper(pyb_can_obj_t *self, size_t n_args, const mp
     // Init filter banks for classic CAN.
     can2_start_bank = args[ARG_num_filter_banks].u_int;
     for (int f = 0; f < CAN_MAX_FILTER; f++) {
-        can_clearfilter(self, f, can2_start_bank);
+        can_clearfilter(&self->can, f, can2_start_bank);
     }
     #endif
 
-    if (!can_init(self, args[ARG_mode].u_int, args[ARG_prescaler].u_int, args[ARG_sjw].u_int,
+    if (!can_init(&self->can, self->can_id, args[ARG_mode].u_int, args[ARG_prescaler].u_int, args[ARG_sjw].u_int,
         args[ARG_bs1].u_int, args[ARG_bs2].u_int, args[ARG_auto_restart].u_bool)) {
         mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("CAN(%d) init failure"), self->can_id);
     }
 
+    self->is_enabled = true;
+    self->num_error_warning = 0;
+    self->num_error_passive = 0;
+    self->num_bus_off = 0;
+
     return mp_const_none;
 }
 
@@ -346,7 +342,7 @@ static mp_obj_t pyb_can_make_new(const mp_obj_type_t *type, size_t n_args, size_
         if (self->is_enabled) {
             // The caller is requesting a reconfiguration of the hardware
             // this can only be done if the hardware is in init mode
-            can_deinit(self);
+            pyb_can_deinit(MP_OBJ_FROM_PTR(self));
         }
 
         self->rxcallback0 = mp_const_none;
@@ -373,7 +369,8 @@ static MP_DEFINE_CONST_FUN_OBJ_KW(pyb_can_init_obj, 1, pyb_can_init);
 // deinit()
 static mp_obj_t pyb_can_deinit(mp_obj_t self_in) {
     pyb_can_obj_t *self = MP_OBJ_TO_PTR(self_in);
-    can_deinit(self);
+    can_deinit(&self->can);
+    self->is_enabled = false;
     return mp_const_none;
 }
 static MP_DEFINE_CONST_FUN_OBJ_1(pyb_can_deinit_obj, pyb_can_deinit);
@@ -489,17 +486,8 @@ static MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_can_info_obj, 1, 2, pyb_can_info)
 // any(fifo) - return `True` if any message waiting on the FIFO, else `False`
 static mp_obj_t pyb_can_any(mp_obj_t self_in, mp_obj_t fifo_in) {
     pyb_can_obj_t *self = MP_OBJ_TO_PTR(self_in);
-    mp_int_t fifo = mp_obj_get_int(fifo_in);
-    if (fifo == 0) {
-        if (__HAL_CAN_MSG_PENDING(&self->can, CAN_FIFO0) != 0) {
-            return mp_const_true;
-        }
-    } else {
-        if (__HAL_CAN_MSG_PENDING(&self->can, CAN_FIFO1) != 0) {
-            return mp_const_true;
-        }
-    }
-    return mp_const_false;
+    can_rx_fifo_t fifo = mp_obj_get_int(fifo_in);
+    return mp_obj_new_bool(can_rx_pending(&self->can, fifo) != 0);
 }
 static MP_DEFINE_CONST_FUN_OBJ_2(pyb_can_any_obj, pyb_can_any);
 
@@ -533,6 +521,7 @@ static mp_obj_t pyb_can_send(size_t n_args, const mp_obj_t *pos_args, mp_map_t *
     }
 
     // send the data
+    HAL_StatusTypeDef status;
     CanTxMsgTypeDef tx_msg;
 
     #if MICROPY_HW_ENABLE_FDCAN
@@ -594,27 +583,7 @@ static mp_obj_t pyb_can_send(size_t n_args, const mp_obj_t *pos_args, mp_map_t *
         tx_data[i] = ((byte *)bufinfo.buf)[i];
     }
 
-    HAL_StatusTypeDef status;
-    #if MICROPY_HW_ENABLE_FDCAN
-    uint32_t timeout_ms = args[ARG_timeout].u_int;
-    uint32_t start = HAL_GetTick();
-    while (HAL_FDCAN_GetTxFifoFreeLevel(&self->can) == 0) {
-        if (timeout_ms == 0) {
-            mp_raise_OSError(MP_ETIMEDOUT);
-        }
-        // Check for the Timeout
-        if (timeout_ms != HAL_MAX_DELAY) {
-            if (HAL_GetTick() - start >= timeout_ms) {
-                mp_raise_OSError(MP_ETIMEDOUT);
-            }
-        }
-        MICROPY_EVENT_POLL_HOOK
-    }
-    status = HAL_FDCAN_AddMessageToTxFifoQ(&self->can, &tx_msg, tx_data);
-    #else
-    self->can.pTxMsg = &tx_msg;
-    status = CAN_Transmit(&self->can, args[ARG_timeout].u_int);
-    #endif
+    status = can_transmit(&self->can, &tx_msg, tx_data, args[ARG_timeout].u_int);
 
     if (status != HAL_OK) {
         mp_hal_raise(status);
@@ -646,12 +615,8 @@ static mp_obj_t pyb_can_recv(size_t n_args, const mp_obj_t *pos_args, mp_map_t *
     uint8_t *rx_data = rx_msg.Data;
     #endif
 
-    mp_uint_t fifo = args[ARG_fifo].u_int;
-    if (fifo == 0) {
-        fifo = CAN_FIFO0;
-    } else if (fifo == 1) {
-        fifo = CAN_FIFO1;
-    } else {
+    can_rx_fifo_t fifo = args[ARG_fifo].u_int;
+    if (fifo != CAN_RX_FIFO0 && fifo != CAN_RX_FIFO1) {
         mp_raise_TypeError(NULL);
     }
 
@@ -667,30 +632,28 @@ static mp_obj_t pyb_can_recv(size_t n_args, const mp_obj_t *pos_args, mp_map_t *
     #endif
 
     // Manage the rx state machine
-    if ((fifo == CAN_FIFO0 && self->rxcallback0 != mp_const_none) ||
-        (fifo == CAN_FIFO1 && self->rxcallback1 != mp_const_none)) {
-        byte *state = (fifo == CAN_FIFO0) ? &self->rx_state0 : &self->rx_state1;
-
+    if ((fifo == CAN_RX_FIFO0 && self->rxcallback0 != mp_const_none) ||
+        (fifo == CAN_RX_FIFO1 && self->rxcallback1 != mp_const_none)) {
+        bool fifo_empty = can_rx_pending(&self->can, fifo) == 0;
+        byte *state = (fifo == CAN_RX_FIFO0) ? &self->rx_state0 : &self->rx_state1;
         switch (*state) {
             case RX_STATE_FIFO_EMPTY:
                 break;
             case RX_STATE_MESSAGE_PENDING:
-                if (__HAL_CAN_MSG_PENDING(&self->can, fifo) == 0) {
-                    // Fifo is empty
-                    __HAL_CAN_ENABLE_IT(&self->can, (fifo == CAN_FIFO0) ? CAN_IT_FIFO0_PENDING : CAN_IT_FIFO1_PENDING);
+                if (fifo_empty) {
                     *state = RX_STATE_FIFO_EMPTY;
                 }
                 break;
             case RX_STATE_FIFO_FULL:
-                __HAL_CAN_ENABLE_IT(&self->can, (fifo == CAN_FIFO0) ? CAN_IT_FIFO0_FULL : CAN_IT_FIFO1_FULL);
                 *state = RX_STATE_MESSAGE_PENDING;
                 break;
             case RX_STATE_FIFO_OVERFLOW:
-                __HAL_CAN_ENABLE_IT(&self->can, (fifo == CAN_FIFO0) ? CAN_IT_FIFO0_OVRF : CAN_IT_FIFO1_OVRF);
-                __HAL_CAN_ENABLE_IT(&self->can, (fifo == CAN_FIFO0) ? CAN_IT_FIFO0_FULL : CAN_IT_FIFO1_FULL);
                 *state = RX_STATE_MESSAGE_PENDING;
                 break;
         }
+
+        // Re-enable any interrupts that were disabled in RX IRQ handlers
+        can_enable_rx_interrupts(&self->can, fifo, fifo_empty);
     }
 
     // Create the tuple, or get the list, that will hold the return values
@@ -756,12 +719,12 @@ static mp_obj_t pyb_can_clearfilter(size_t n_args, const mp_obj_t *pos_args, mp_
     mp_arg_parse_all(n_args - 2, pos_args + 2, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
 
     #if MICROPY_HW_ENABLE_FDCAN
-    can_clearfilter(self, f, args[ARG_extframe].u_bool);
+    can_clearfilter(&self->can, f, args[ARG_extframe].u_bool);
     #else
     if (self->can_id == 2) {
         f += can2_start_bank;
     }
-    can_clearfilter(self, f, can2_start_bank);
+    can_clearfilter(&self->can, f, can2_start_bank);
     #endif
     return mp_const_none;
 }
@@ -945,16 +908,12 @@ static MP_DEFINE_CONST_FUN_OBJ_KW(pyb_can_setfilter_obj, 1, pyb_can_setfilter);
 
 static mp_obj_t pyb_can_rxcallback(mp_obj_t self_in, mp_obj_t fifo_in, mp_obj_t callback_in) {
     pyb_can_obj_t *self = MP_OBJ_TO_PTR(self_in);
-    mp_int_t fifo = mp_obj_get_int(fifo_in);
+    can_rx_fifo_t fifo = mp_obj_get_int(fifo_in);
     mp_obj_t *callback;
 
-    callback = (fifo == 0) ? &self->rxcallback0 : &self->rxcallback1;
+    callback = (fifo == CAN_RX_FIFO0) ? &self->rxcallback0 : &self->rxcallback1;
     if (callback_in == mp_const_none) {
-        __HAL_CAN_DISABLE_IT(&self->can, (fifo == 0) ? CAN_IT_FIFO0_PENDING : CAN_IT_FIFO1_PENDING);
-        __HAL_CAN_DISABLE_IT(&self->can, (fifo == 0) ? CAN_IT_FIFO0_FULL : CAN_IT_FIFO1_FULL);
-        __HAL_CAN_DISABLE_IT(&self->can, (fifo == 0) ? CAN_IT_FIFO0_OVRF : CAN_IT_FIFO1_OVRF);
-        __HAL_CAN_CLEAR_FLAG(&self->can, (fifo == CAN_FIFO0) ? CAN_FLAG_FIFO0_FULL : CAN_FLAG_FIFO1_FULL);
-        __HAL_CAN_CLEAR_FLAG(&self->can, (fifo == CAN_FIFO0) ? CAN_FLAG_FIFO0_OVRF : CAN_FLAG_FIFO1_OVRF);
+        can_disable_rx_interrupts(&self->can, fifo);
         *callback = mp_const_none;
     } else if (*callback != mp_const_none) {
         // Rx call backs has already been initialized
@@ -964,21 +923,19 @@ static mp_obj_t pyb_can_rxcallback(mp_obj_t self_in, mp_obj_t fifo_in, mp_obj_t
         *callback = callback_in;
         uint32_t irq = 0;
         if (self->can_id == PYB_CAN_1) {
-            irq = (fifo == 0) ? CAN1_RX0_IRQn : CAN1_RX1_IRQn;
+            irq = (fifo == CAN_RX_FIFO0) ? CAN1_RX0_IRQn : CAN1_RX1_IRQn;
         #if defined(CAN2)
         } else if (self->can_id == PYB_CAN_2) {
-            irq = (fifo == 0) ? CAN2_RX0_IRQn : CAN2_RX1_IRQn;
+            irq = (fifo == CAN_RX_FIFO0) ? CAN2_RX0_IRQn : CAN2_RX1_IRQn;
         #endif
         #if defined(CAN3)
         } else {
-            irq = (fifo == 0) ? CAN3_RX0_IRQn : CAN3_RX1_IRQn;
+            irq = (fifo == CAN_RX_FIFO0) ? CAN3_RX0_IRQn : CAN3_RX1_IRQn;
         #endif
         }
         NVIC_SetPriority(irq, IRQ_PRI_CAN);
         HAL_NVIC_EnableIRQ(irq);
-        __HAL_CAN_ENABLE_IT(&self->can, (fifo == 0) ? CAN_IT_FIFO0_PENDING : CAN_IT_FIFO1_PENDING);
-        __HAL_CAN_ENABLE_IT(&self->can, (fifo == 0) ? CAN_IT_FIFO0_FULL : CAN_IT_FIFO1_FULL);
-        __HAL_CAN_ENABLE_IT(&self->can, (fifo == 0) ? CAN_IT_FIFO0_OVRF : CAN_IT_FIFO1_OVRF);
+        can_enable_rx_interrupts(&self->can, fifo, true);
     }
     return mp_const_none;
 }
@@ -1038,8 +995,8 @@ static mp_uint_t can_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg, i
         uintptr_t flags = arg;
         ret = 0;
         if ((flags & MP_STREAM_POLL_RD)
-            && ((__HAL_CAN_MSG_PENDING(&self->can, CAN_FIFO0) != 0)
-                || (__HAL_CAN_MSG_PENDING(&self->can, CAN_FIFO1) != 0))) {
+            && ((can_rx_pending(&self->can, 0) != 0)
+                || (can_rx_pending(&self->can, 1) != 0))) {
             ret |= MP_STREAM_POLL_RD;
         }
         #if MICROPY_HW_ENABLE_FDCAN
@@ -1057,17 +1014,62 @@ static mp_uint_t can_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg, i
     return ret;
 }
 
-void pyb_can_handle_callback(pyb_can_obj_t *self, uint fifo_id, mp_obj_t callback, mp_obj_t irq_reason) {
+// IRQ handler, called from lower layer can.c or fdcan.c in ISR context
+
+void can_irq_handler(uint can_id,  can_int_t interrupt, can_rx_fifo_t fifo) {
+    mp_obj_t callback;
+    pyb_can_obj_t *self;
+    byte *state;
+
+    self = MP_STATE_PORT(pyb_can_obj_all)[can_id - 1];
+
+    if (fifo == CAN_RX_FIFO0) {
+        callback = self->rxcallback0;
+        state = &self->rx_state0;
+    } else {
+        callback = self->rxcallback1;
+        state = &self->rx_state1;
+    }
+
+    switch (interrupt) {
+        // These interrupts go on to run a Python callback, interrupt arg is the
+        // 'interrupt' enum value as an int.
+        case CAN_INT_MESSAGE_RECEIVED:
+            *state = RX_STATE_MESSAGE_PENDING;
+            break;
+        case CAN_INT_FIFO_FULL:
+            *state = RX_STATE_FIFO_FULL;
+            break;
+        case CAN_INT_FIFO_OVERFLOW:
+            *state = RX_STATE_FIFO_OVERFLOW;
+            break;
+
+        // These interrupts do not run a Python callback
+        case CAN_INT_ERR_BUS_OFF:
+            self->num_bus_off++;
+            return;
+        case CAN_INT_ERR_PASSIVE:
+            self->num_error_passive++;
+            return;
+        case CAN_INT_ERR_WARNING:
+            self->num_error_warning++;
+            return;
+
+        default:
+            return; // Should be unreachable
+    }
+
+    // Run the callback
     if (callback != mp_const_none) {
         mp_sched_lock();
         gc_lock();
         nlr_buf_t nlr;
         if (nlr_push(&nlr) == 0) {
-            mp_call_function_2(callback, MP_OBJ_FROM_PTR(self), irq_reason);
+            mp_call_function_2(callback, MP_OBJ_FROM_PTR(self), MP_OBJ_NEW_SMALL_INT(interrupt));
             nlr_pop();
         } else {
             // Uncaught exception; disable the callback so it doesn't run again.
-            pyb_can_rxcallback(MP_OBJ_FROM_PTR(self), MP_OBJ_NEW_SMALL_INT(fifo_id), mp_const_none);
+            pyb_can_rxcallback(MP_OBJ_FROM_PTR(self), MP_OBJ_NEW_SMALL_INT(fifo), mp_const_none);
             mp_printf(MICROPY_ERROR_PRINTER, "uncaught exception in CAN(%u) rx interrupt handler\n", self->can_id);
             mp_obj_print_exception(&mp_plat_print, MP_OBJ_FROM_PTR(nlr.ret_val));
         }
diff --git a/ports/stm32/pyb_can.h b/ports/stm32/pyb_can.h
new file mode 100644
index 0000000000000..a82043d7863ed
--- /dev/null
+++ b/ports/stm32/pyb_can.h
@@ -0,0 +1,58 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2014 Damien P. George
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#ifndef MICROPY_INCLUDED_STM32_PYB_CAN_H
+#define MICROPY_INCLUDED_STM32_PYB_CAN_H
+
+#include "py/mphal.h"
+
+#if MICROPY_HW_ENABLE_CAN
+
+#include "py/obj.h"
+#include "can.h"
+
+typedef struct _pyb_can_obj_t {
+    mp_obj_base_t base;
+    mp_obj_t rxcallback0;
+    mp_obj_t rxcallback1;
+    mp_uint_t can_id : 8;
+    bool is_enabled : 1;
+    byte rx_state0;
+    byte rx_state1;
+    uint16_t num_error_warning;
+    uint16_t num_error_passive;
+    uint16_t num_bus_off;
+    CAN_HandleTypeDef can;
+} pyb_can_obj_t;
+
+extern const mp_obj_type_t pyb_can_type;
+
+void pyb_can_deinit_all(void);
+void pyb_can_init0(void);
+
+void pyb_can_irq_handler(uint can_id, can_rx_fifo_t fifo, can_int_t interrupt);
+
+#endif
+#endif
diff --git a/ports/stm32/qspi.c b/ports/stm32/qspi.c
index 98364db41d4fb..2ef9a4d0187b0 100644
--- a/ports/stm32/qspi.c
+++ b/ports/stm32/qspi.c
@@ -31,11 +31,10 @@
 #include "mpu.h"
 #include "qspi.h"
 #include "pin_static_af.h"
+#include "storage.h"
 
 #if defined(MICROPY_HW_QSPIFLASH_SIZE_BITS_LOG2)
 
-#define QSPI_MAP_ADDR (0x90000000)
-
 #ifndef MICROPY_HW_QSPI_PRESCALER
 #define MICROPY_HW_QSPI_PRESCALER       3  // F_CLK = F_AHB/3 (72MHz when CPU is 216MHz)
 #endif
@@ -52,17 +51,12 @@
 #define MICROPY_HW_QSPI_CS_HIGH_CYCLES  2  // nCS stays high for 2 cycles
 #endif
 
+// Region size in units of 1024*1024 bytes.
 #ifndef MICROPY_HW_QSPI_MPU_REGION_SIZE
 #define MICROPY_HW_QSPI_MPU_REGION_SIZE ((1 << (MICROPY_HW_QSPIFLASH_SIZE_BITS_LOG2 - 3)) >> 20)
 #endif
 
-#if (MICROPY_HW_QSPIFLASH_SIZE_BITS_LOG2 - 3 - 1) >= 24
-#define QSPI_CMD 0xec
-#define QSPI_ADSIZE 3
-#else
-#define QSPI_CMD 0xeb
-#define QSPI_ADSIZE 2
-#endif
+static uint8_t qspi_num_dummy;
 
 static inline void qspi_mpu_disable_all(void) {
     // Configure MPU to disable access to entire QSPI region, to prevent CPU
@@ -83,36 +77,38 @@ static inline void qspi_mpu_enable_mapped(void) {
     // other enabled region overlaps the disabled subregion, and the access is
     // unprivileged or the background region is disabled, the MPU issues a fault.
     uint32_t irq_state = mpu_config_start();
-    #if MICROPY_HW_QSPI_MPU_REGION_SIZE > 128
-    mpu_config_region(MPU_REGION_QSPI1, QSPI_MAP_ADDR, MPU_CONFIG_NOACCESS(0xFF, MPU_REGION_SIZE_256MB));
-    #elif MICROPY_HW_QSPI_MPU_REGION_SIZE > 64
-    mpu_config_region(MPU_REGION_QSPI1, QSPI_MAP_ADDR, MPU_CONFIG_NOACCESS(0x0F, MPU_REGION_SIZE_256MB));
-    #elif MICROPY_HW_QSPI_MPU_REGION_SIZE > 32
-    mpu_config_region(MPU_REGION_QSPI1, QSPI_MAP_ADDR, MPU_CONFIG_NOACCESS(0x03, MPU_REGION_SIZE_256MB));
-    #elif MICROPY_HW_QSPI_MPU_REGION_SIZE > 16
-    mpu_config_region(MPU_REGION_QSPI1, QSPI_MAP_ADDR, MPU_CONFIG_NOACCESS(0x01, MPU_REGION_SIZE_256MB));
-    #elif MICROPY_HW_QSPI_MPU_REGION_SIZE > 8
-    mpu_config_region(MPU_REGION_QSPI1, QSPI_MAP_ADDR, MPU_CONFIG_NOACCESS(0x01, MPU_REGION_SIZE_256MB));
-    mpu_config_region(MPU_REGION_QSPI2, QSPI_MAP_ADDR, MPU_CONFIG_NOACCESS(0x0F, MPU_REGION_SIZE_32MB));
-    #elif MICROPY_HW_QSPI_MPU_REGION_SIZE > 4
-    mpu_config_region(MPU_REGION_QSPI1, QSPI_MAP_ADDR, MPU_CONFIG_NOACCESS(0x01, MPU_REGION_SIZE_256MB));
-    mpu_config_region(MPU_REGION_QSPI2, QSPI_MAP_ADDR, MPU_CONFIG_NOACCESS(0x03, MPU_REGION_SIZE_32MB));
-    #elif MICROPY_HW_QSPI_MPU_REGION_SIZE > 2
-    mpu_config_region(MPU_REGION_QSPI1, QSPI_MAP_ADDR, MPU_CONFIG_NOACCESS(0x01, MPU_REGION_SIZE_256MB));
-    mpu_config_region(MPU_REGION_QSPI2, QSPI_MAP_ADDR, MPU_CONFIG_NOACCESS(0x01, MPU_REGION_SIZE_32MB));
-    #elif MICROPY_HW_QSPI_MPU_REGION_SIZE > 1
-    mpu_config_region(MPU_REGION_QSPI1, QSPI_MAP_ADDR, MPU_CONFIG_NOACCESS(0x01, MPU_REGION_SIZE_256MB));
-    mpu_config_region(MPU_REGION_QSPI2, QSPI_MAP_ADDR, MPU_CONFIG_NOACCESS(0x0F, MPU_REGION_SIZE_32MB));
-    mpu_config_region(MPU_REGION_QSPI3, QSPI_MAP_ADDR, MPU_CONFIG_NOACCESS(0x01, MPU_REGION_SIZE_16MB));
-    #else
-    mpu_config_region(MPU_REGION_QSPI1, QSPI_MAP_ADDR, MPU_CONFIG_NOACCESS(0x01, MPU_REGION_SIZE_256MB));
-    mpu_config_region(MPU_REGION_QSPI2, QSPI_MAP_ADDR, MPU_CONFIG_NOACCESS(0x01, MPU_REGION_SIZE_32MB));
-    mpu_config_region(MPU_REGION_QSPI3, QSPI_MAP_ADDR, MPU_CONFIG_NOACCESS(0x03, MPU_REGION_SIZE_4MB));
-    #endif
+    if (MICROPY_HW_QSPI_MPU_REGION_SIZE > 128) {
+        mpu_config_region(MPU_REGION_QSPI1, QSPI_MAP_ADDR, MPU_CONFIG_NOACCESS(0xFF, MPU_REGION_SIZE_256MB));
+    } else if (MICROPY_HW_QSPI_MPU_REGION_SIZE > 64) {
+        mpu_config_region(MPU_REGION_QSPI1, QSPI_MAP_ADDR, MPU_CONFIG_NOACCESS(0x0F, MPU_REGION_SIZE_256MB));
+    } else if (MICROPY_HW_QSPI_MPU_REGION_SIZE > 32) {
+        mpu_config_region(MPU_REGION_QSPI1, QSPI_MAP_ADDR, MPU_CONFIG_NOACCESS(0x03, MPU_REGION_SIZE_256MB));
+    } else if (MICROPY_HW_QSPI_MPU_REGION_SIZE > 16) {
+        mpu_config_region(MPU_REGION_QSPI1, QSPI_MAP_ADDR, MPU_CONFIG_NOACCESS(0x01, MPU_REGION_SIZE_256MB));
+    } else if (MICROPY_HW_QSPI_MPU_REGION_SIZE > 8) {
+        mpu_config_region(MPU_REGION_QSPI1, QSPI_MAP_ADDR, MPU_CONFIG_NOACCESS(0x01, MPU_REGION_SIZE_256MB));
+        mpu_config_region(MPU_REGION_QSPI2, QSPI_MAP_ADDR, MPU_CONFIG_NOACCESS(0x0F, MPU_REGION_SIZE_32MB));
+    } else if (MICROPY_HW_QSPI_MPU_REGION_SIZE > 4) {
+        mpu_config_region(MPU_REGION_QSPI1, QSPI_MAP_ADDR, MPU_CONFIG_NOACCESS(0x01, MPU_REGION_SIZE_256MB));
+        mpu_config_region(MPU_REGION_QSPI2, QSPI_MAP_ADDR, MPU_CONFIG_NOACCESS(0x03, MPU_REGION_SIZE_32MB));
+    } else if (MICROPY_HW_QSPI_MPU_REGION_SIZE > 2) {
+        mpu_config_region(MPU_REGION_QSPI1, QSPI_MAP_ADDR, MPU_CONFIG_NOACCESS(0x01, MPU_REGION_SIZE_256MB));
+        mpu_config_region(MPU_REGION_QSPI2, QSPI_MAP_ADDR, MPU_CONFIG_NOACCESS(0x01, MPU_REGION_SIZE_32MB));
+    } else if (MICROPY_HW_QSPI_MPU_REGION_SIZE > 1) {
+        mpu_config_region(MPU_REGION_QSPI1, QSPI_MAP_ADDR, MPU_CONFIG_NOACCESS(0x01, MPU_REGION_SIZE_256MB));
+        mpu_config_region(MPU_REGION_QSPI2, QSPI_MAP_ADDR, MPU_CONFIG_NOACCESS(0x0F, MPU_REGION_SIZE_32MB));
+        mpu_config_region(MPU_REGION_QSPI3, QSPI_MAP_ADDR, MPU_CONFIG_NOACCESS(0x01, MPU_REGION_SIZE_16MB));
+    } else {
+        mpu_config_region(MPU_REGION_QSPI1, QSPI_MAP_ADDR, MPU_CONFIG_NOACCESS(0x01, MPU_REGION_SIZE_256MB));
+        mpu_config_region(MPU_REGION_QSPI2, QSPI_MAP_ADDR, MPU_CONFIG_NOACCESS(0x01, MPU_REGION_SIZE_32MB));
+        mpu_config_region(MPU_REGION_QSPI3, QSPI_MAP_ADDR, MPU_CONFIG_NOACCESS(0x03, MPU_REGION_SIZE_4MB));
+    }
     mpu_config_end(irq_state);
 }
 
-void qspi_init(void) {
+void qspi_init(uint8_t num_dummy) {
+    qspi_num_dummy = num_dummy;
+
     qspi_mpu_disable_all();
 
     // Configure pins
@@ -153,6 +149,17 @@ void qspi_init(void) {
 void qspi_memory_map(void) {
     // Enable memory-mapped mode
 
+    // Work out command to use for reads, based on size of the memory.
+    uint8_t cmd;
+    uint8_t adsize;
+    if ((MICROPY_HW_QSPIFLASH_SIZE_BITS_LOG2 - 3 - 1) >= 24) {
+        cmd = 0xec;
+        adsize = 3;
+    } else {
+        cmd = 0xeb;
+        adsize = 2;
+    }
+
     QUADSPI->ABR = 0; // disable continuous read mode
 
     QUADSPI->CCR =
@@ -160,38 +167,61 @@ void qspi_memory_map(void) {
             | 0 << QUADSPI_CCR_SIOO_Pos // send instruction every transaction
             | 3 << QUADSPI_CCR_FMODE_Pos // memory-mapped mode
             | 3 << QUADSPI_CCR_DMODE_Pos // data on 4 lines
-            | 4 << QUADSPI_CCR_DCYC_Pos // 4 dummy cycles
+            | (2 * qspi_num_dummy) << QUADSPI_CCR_DCYC_Pos // 2N dummy cycles
             | 0 << QUADSPI_CCR_ABSIZE_Pos // 8-bit alternate byte
             | 3 << QUADSPI_CCR_ABMODE_Pos // alternate byte on 4 lines
-            | QSPI_ADSIZE << QUADSPI_CCR_ADSIZE_Pos
+            | adsize << QUADSPI_CCR_ADSIZE_Pos
             | 3 << QUADSPI_CCR_ADMODE_Pos // address on 4 lines
             | 1 << QUADSPI_CCR_IMODE_Pos // instruction on 1 line
-            | QSPI_CMD << QUADSPI_CCR_INSTRUCTION_Pos
+            | cmd << QUADSPI_CCR_INSTRUCTION_Pos
     ;
 
     qspi_mpu_enable_mapped();
 }
 
-static int qspi_ioctl(void *self_in, uint32_t cmd) {
+void qspi_memory_map_exit(void) {
+    // Prevent access to QSPI memory-mapped region.
+    qspi_mpu_disable_all();
+
+    // Abort any ongoing transfer if peripheral is busy
+    if (QUADSPI->SR & QUADSPI_SR_BUSY) {
+        QUADSPI->CR |= QUADSPI_CR_ABORT;
+        while (QUADSPI->CR & QUADSPI_CR_ABORT) {
+        }
+    }
+}
+
+// Needed on F7 due to errata 2.4.3: "Memory-mapped read operations may fail when timeout counter is enabled".
+// Call this function to disable then re-enable memory-mapped mode, which resets the CS pin to inactive.
+void qspi_memory_map_restart(void) {
+    qspi_memory_map_exit();
+    qspi_memory_map();
+}
+
+static int qspi_ioctl(void *self_in, uint32_t cmd, uintptr_t arg) {
     (void)self_in;
     switch (cmd) {
         case MP_QSPI_IOCTL_INIT:
-            qspi_init();
+            qspi_init(arg);
             break;
         case MP_QSPI_IOCTL_BUS_ACQUIRE:
             // Disable memory-mapped region during bus access
-            qspi_mpu_disable_all();
-            // Abort any ongoing transfer if peripheral is busy
-            if (QUADSPI->SR & QUADSPI_SR_BUSY) {
-                QUADSPI->CR |= QUADSPI_CR_ABORT;
-                while (QUADSPI->CR & QUADSPI_CR_ABORT) {
-                }
-            }
+            qspi_memory_map_exit();
             break;
         case MP_QSPI_IOCTL_BUS_RELEASE:
             // Switch to memory-map mode when bus is idle
             qspi_memory_map();
             break;
+        case MP_QSPI_IOCTL_MEMORY_MODIFIED: {
+            #if defined(__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
+            uintptr_t *addr_len = (uintptr_t *)arg;
+            volatile void *addr = (volatile void *)(QSPI_MAP_ADDR + addr_len[0]);
+            size_t len = addr_len[1];
+            SCB_InvalidateICache_by_Addr(addr, len);
+            SCB_InvalidateDCache_by_Addr(addr, len);
+            #endif
+            break;
+        }
     }
     return 0; // success
 }
@@ -350,7 +380,7 @@ static int qspi_read_cmd(void *self_in, uint8_t cmd, size_t len, uint32_t *dest)
     return 0;
 }
 
-static int qspi_read_cmd_qaddr_qdata(void *self_in, uint8_t cmd, uint32_t addr, size_t len, uint8_t *dest) {
+static int qspi_read_cmd_qaddr_qdata(void *self_in, uint8_t cmd, uint32_t addr, uint8_t num_dummy, size_t len, uint8_t *dest) {
     (void)self_in;
 
     uint8_t adsize = MICROPY_HW_SPI_ADDR_IS_32BIT(addr) ? 3 : 2;
@@ -364,7 +394,7 @@ static int qspi_read_cmd_qaddr_qdata(void *self_in, uint8_t cmd, uint32_t addr,
             | 0 << QUADSPI_CCR_SIOO_Pos // send instruction every transaction
             | 1 << QUADSPI_CCR_FMODE_Pos // indirect read mode
             | 3 << QUADSPI_CCR_DMODE_Pos // data on 4 lines
-            | 4 << QUADSPI_CCR_DCYC_Pos // 4 dummy cycles
+            | (2 * num_dummy) << QUADSPI_CCR_DCYC_Pos // 2N dummy cycles
             | 0 << QUADSPI_CCR_ABSIZE_Pos // 8-bit alternate byte
             | 3 << QUADSPI_CCR_ABMODE_Pos // alternate byte on 4 lines
             | adsize << QUADSPI_CCR_ADSIZE_Pos // 32 or 24-bit address size
diff --git a/ports/stm32/qspi.h b/ports/stm32/qspi.h
index c774b12582be6..c8a3181653db7 100644
--- a/ports/stm32/qspi.h
+++ b/ports/stm32/qspi.h
@@ -28,9 +28,18 @@
 
 #include "drivers/bus/qspi.h"
 
+#define QSPI_MAP_ADDR (0x90000000)
+#define QSPI_MAP_ADDR_MAX (0xa0000000)
+
 extern const mp_qspi_proto_t qspi_proto;
 
-void qspi_init(void);
+void qspi_init(uint8_t num_dummy);
 void qspi_memory_map(void);
+void qspi_memory_map_exit(void);
+void qspi_memory_map_restart(void);
+
+static inline bool qspi_is_valid_addr(uint32_t addr) {
+    return QSPI_MAP_ADDR <= addr && addr < QSPI_MAP_ADDR_MAX;
+}
 
 #endif // MICROPY_INCLUDED_STM32_QSPI_H
diff --git a/ports/stm32/sdcard.c b/ports/stm32/sdcard.c
index a7d0629399651..706d6315c44d4 100644
--- a/ports/stm32/sdcard.c
+++ b/ports/stm32/sdcard.c
@@ -158,6 +158,8 @@
 
 static uint8_t pyb_sdmmc_flags;
 
+#define TIMEOUT_MS 30000
+
 // TODO: I think that as an optimization, we can allocate these dynamically
 //       if an sd card is detected. This will save approx 260 bytes of RAM
 //       when no sdcard was being used.
@@ -441,7 +443,7 @@ static void sdcard_reset_periph(void) {
     SDIO->ICR = SDMMC_STATIC_FLAGS;
 }
 
-static HAL_StatusTypeDef sdcard_wait_finished(uint32_t timeout) {
+static HAL_StatusTypeDef sdcard_wait_finished(void) {
     // Wait for HAL driver to be ready (eg for DMA to finish)
     uint32_t start = HAL_GetTick();
     for (;;) {
@@ -463,7 +465,7 @@ static HAL_StatusTypeDef sdcard_wait_finished(uint32_t timeout) {
         }
         __WFI();
         enable_irq(irq_state);
-        if (HAL_GetTick() - start >= timeout) {
+        if (HAL_GetTick() - start >= TIMEOUT_MS) {
             return HAL_TIMEOUT;
         }
     }
@@ -490,7 +492,7 @@ static HAL_StatusTypeDef sdcard_wait_finished(uint32_t timeout) {
         if (!(state == HAL_SD_CARD_SENDING || state == HAL_SD_CARD_RECEIVING || state == HAL_SD_CARD_PROGRAMMING)) {
             return HAL_ERROR;
         }
-        if (HAL_GetTick() - start >= timeout) {
+        if (HAL_GetTick() - start >= TIMEOUT_MS) {
             return HAL_TIMEOUT;
         }
         __WFI();
@@ -498,13 +500,27 @@ static HAL_StatusTypeDef sdcard_wait_finished(uint32_t timeout) {
     return HAL_OK;
 }
 
-mp_uint_t sdcard_read_blocks(uint8_t *dest, uint32_t block_num, uint32_t num_blocks) {
+static HAL_StatusTypeDef sdcard_common_checks(uint32_t block_num, uint32_t num_blocks) {
     // check that SD card is initialised
     if (!(pyb_sdmmc_flags & PYB_SDMMC_FLAG_ACTIVE)) {
         return HAL_ERROR;
     }
 
-    HAL_StatusTypeDef err = HAL_OK;
+    // check that adding block_num & num_blocks don't overflow
+    // (the ST HAL does a bounds check, but only after adding them...)
+    uint32_t end_block;
+    if (__builtin_add_overflow(block_num, num_blocks, &end_block)) {
+        return HAL_ERROR;
+    }
+
+    return HAL_OK;
+}
+
+mp_uint_t sdcard_read_blocks(uint8_t *dest, uint32_t block_num, uint32_t num_blocks) {
+    HAL_StatusTypeDef err = sdcard_common_checks(block_num, num_blocks);
+    if (err != HAL_OK) {
+        return err;
+    }
 
     // check that dest pointer is aligned on a 4-byte boundary
     uint8_t *orig_dest = NULL;
@@ -555,7 +571,7 @@ mp_uint_t sdcard_read_blocks(uint8_t *dest, uint32_t block_num, uint32_t num_blo
             err = HAL_SD_ReadBlocks_DMA(&sdmmc_handle.sd, dest, block_num, num_blocks);
         }
         if (err == HAL_OK) {
-            err = sdcard_wait_finished(60000);
+            err = sdcard_wait_finished();
         }
 
         #if SDIO_USE_GPDMA
@@ -574,14 +590,14 @@ mp_uint_t sdcard_read_blocks(uint8_t *dest, uint32_t block_num, uint32_t num_blo
     } else {
         #if MICROPY_HW_ENABLE_MMCARD
         if (pyb_sdmmc_flags & PYB_SDMMC_FLAG_MMC) {
-            err = HAL_MMC_ReadBlocks(&sdmmc_handle.mmc, dest, block_num, num_blocks, 60000);
+            err = HAL_MMC_ReadBlocks(&sdmmc_handle.mmc, dest, block_num, num_blocks, TIMEOUT_MS);
         } else
         #endif
         {
-            err = HAL_SD_ReadBlocks(&sdmmc_handle.sd, dest, block_num, num_blocks, 60000);
+            err = HAL_SD_ReadBlocks(&sdmmc_handle.sd, dest, block_num, num_blocks, TIMEOUT_MS);
         }
         if (err == HAL_OK) {
-            err = sdcard_wait_finished(60000);
+            err = sdcard_wait_finished();
         }
     }
 
@@ -595,13 +611,11 @@ mp_uint_t sdcard_read_blocks(uint8_t *dest, uint32_t block_num, uint32_t num_blo
 }
 
 mp_uint_t sdcard_write_blocks(const uint8_t *src, uint32_t block_num, uint32_t num_blocks) {
-    // check that SD card is initialised
-    if (!(pyb_sdmmc_flags & PYB_SDMMC_FLAG_ACTIVE)) {
-        return HAL_ERROR;
+    HAL_StatusTypeDef err = sdcard_common_checks(block_num, num_blocks);
+    if (err != HAL_OK) {
+        return err;
     }
 
-    HAL_StatusTypeDef err = HAL_OK;
-
     // check that src pointer is aligned on a 4-byte boundary
     if (((uint32_t)src & 3) != 0) {
         // pointer is not aligned, so allocate a temporary block to do the write
@@ -650,7 +664,7 @@ mp_uint_t sdcard_write_blocks(const uint8_t *src, uint32_t block_num, uint32_t n
             err = HAL_SD_WriteBlocks_DMA(&sdmmc_handle.sd, (uint8_t *)src, block_num, num_blocks);
         }
         if (err == HAL_OK) {
-            err = sdcard_wait_finished(60000);
+            err = sdcard_wait_finished();
         }
 
         #if SDIO_USE_GPDMA
@@ -669,14 +683,14 @@ mp_uint_t sdcard_write_blocks(const uint8_t *src, uint32_t block_num, uint32_t n
     } else {
         #if MICROPY_HW_ENABLE_MMCARD
         if (pyb_sdmmc_flags & PYB_SDMMC_FLAG_MMC) {
-            err = HAL_MMC_WriteBlocks(&sdmmc_handle.mmc, (uint8_t *)src, block_num, num_blocks, 60000);
+            err = HAL_MMC_WriteBlocks(&sdmmc_handle.mmc, (uint8_t *)src, block_num, num_blocks, TIMEOUT_MS);
         } else
         #endif
         {
-            err = HAL_SD_WriteBlocks(&sdmmc_handle.sd, (uint8_t *)src, block_num, num_blocks, 60000);
+            err = HAL_SD_WriteBlocks(&sdmmc_handle.sd, (uint8_t *)src, block_num, num_blocks, TIMEOUT_MS);
         }
         if (err == HAL_OK) {
-            err = sdcard_wait_finished(60000);
+            err = sdcard_wait_finished();
         }
     }
 
diff --git a/ports/stm32/stm32_it.c b/ports/stm32/stm32_it.c
index 2e625a5894dd9..4bf509bb9462e 100644
--- a/ports/stm32/stm32_it.c
+++ b/ports/stm32/stm32_it.c
@@ -775,6 +775,14 @@ void TIM17_FDCAN_IT1_IRQHandler(void) {
 }
 #endif
 
+#if defined(STM32G4)
+void TIM20_UP_IRQHandler(void) {
+    IRQ_ENTER(TIM20_UP_IRQn);
+    timer_irq_handler(20);
+    IRQ_EXIT(TIM20_UP_IRQn);
+}
+#endif
+
 #if defined(STM32H7)
 void TIM15_IRQHandler(void) {
     IRQ_ENTER(TIM15_IRQn);
diff --git a/ports/stm32/storage.c b/ports/stm32/storage.c
index a6594fd4d98c9..d810261fbcedf 100644
--- a/ports/stm32/storage.c
+++ b/ports/stm32/storage.c
@@ -273,6 +273,29 @@ const pyb_flash_obj_t pyb_flash_obj = {
     0, // actual size handled in ioctl, MP_BLOCKDEV_IOCTL_BLOCK_COUNT case
 };
 
+mp_obj_t pyb_flash_new_obj(mp_int_t start, mp_int_t len) {
+    uint32_t bl_len = (storage_get_block_count() - FLASH_PART1_START_BLOCK) * FLASH_BLOCK_SIZE;
+
+    if (start == -1) {
+        start = 0;
+    } else if (!(0 <= start && start < bl_len && start % MICROPY_HW_BDEV_BLOCKSIZE_EXT == 0)) {
+        return mp_const_none;
+    }
+
+    if (len == -1) {
+        len = bl_len - start;
+    } else if (!(0 < len && start + len <= bl_len && len % MICROPY_HW_BDEV_BLOCKSIZE_EXT == 0)) {
+        return mp_const_none;
+    }
+
+    pyb_flash_obj_t *self = mp_obj_malloc(pyb_flash_obj_t, &pyb_flash_type);
+    self->use_native_block_size = false;
+    self->start = start;
+    self->len = len;
+
+    return MP_OBJ_FROM_PTR(self);
+}
+
 static void pyb_flash_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
     pyb_flash_obj_t *self = MP_OBJ_TO_PTR(self_in);
     if (self == &pyb_flash_obj) {
@@ -296,30 +319,15 @@ static mp_obj_t pyb_flash_make_new(const mp_obj_type_t *type, size_t n_args, siz
         // Default singleton object that accesses entire flash, including virtual partition table
         return MP_OBJ_FROM_PTR(&pyb_flash_obj);
     }
-
-    pyb_flash_obj_t *self = mp_obj_malloc(pyb_flash_obj_t, &pyb_flash_type);
-    self->use_native_block_size = false;
-
-    uint32_t bl_len = (storage_get_block_count() - FLASH_PART1_START_BLOCK) * FLASH_BLOCK_SIZE;
-
     mp_int_t start = args[ARG_start].u_int;
-    if (start == -1) {
-        start = 0;
-    } else if (!(0 <= start && start < bl_len && start % MICROPY_HW_BDEV_BLOCKSIZE_EXT == 0)) {
-        mp_raise_ValueError(NULL);
-    }
-
     mp_int_t len = args[ARG_len].u_int;
-    if (len == -1) {
-        len = bl_len - start;
-    } else if (!(0 < len && start + len <= bl_len && len % MICROPY_HW_BDEV_BLOCKSIZE_EXT == 0)) {
+
+    mp_obj_t self = pyb_flash_new_obj(start, len);
+    if (self == mp_const_none) {
+        // Invalid start or end arg
         mp_raise_ValueError(NULL);
     }
-
-    self->start = start;
-    self->len = len;
-
-    return MP_OBJ_FROM_PTR(self);
+    return self;
 }
 
 static mp_obj_t pyb_flash_readblocks(size_t n_args, const mp_obj_t *args) {
diff --git a/ports/stm32/storage.h b/ports/stm32/storage.h
index 05654855aa0e7..accf6c3904383 100644
--- a/ports/stm32/storage.h
+++ b/ports/stm32/storage.h
@@ -77,4 +77,8 @@ extern const struct _pyb_flash_obj_t pyb_flash_obj;
 struct _fs_user_mount_t;
 void pyb_flash_init_vfs(struct _fs_user_mount_t *vfs);
 
+#if !BUILDING_MBOOT
+mp_obj_t pyb_flash_new_obj(mp_int_t start, mp_int_t len);
+#endif
+
 #endif // MICROPY_INCLUDED_STM32_STORAGE_H
diff --git a/ports/stm32/timer.c b/ports/stm32/timer.c
index acfdbd84eb2b6..9d65b484cd196 100644
--- a/ports/stm32/timer.c
+++ b/ports/stm32/timer.c
@@ -264,8 +264,8 @@ uint32_t timer_get_source_freq(uint32_t tim_id) {
     #else
 
     uint32_t source, clk_div;
-    if (tim_id == 1 || (8 <= tim_id && tim_id <= 11)) {
-        // TIM{1,8,9,10,11} are on APB2
+    if (tim_id == 1 || (8 <= tim_id && tim_id <= 11) || tim_id == 20) {
+        // TIM{1,8,9,10,11,20} are on APB2
         #if defined(STM32F0) || defined(STM32G0)
         source = HAL_RCC_GetPCLK1Freq();
         clk_div = RCC->CFGR & RCC_CFGR_PPRE;
@@ -840,7 +840,7 @@ static const uint32_t tim_instance_table[MICROPY_HW_MAX_TIMER] = {
     TIM_ENTRY(1, TIM1_BRK_UP_TRG_COM_IRQn),
     #elif defined(STM32F4) || defined(STM32F7)
     TIM_ENTRY(1, TIM1_UP_TIM10_IRQn),
-    #elif defined(STM32H7)
+    #elif defined(STM32H7) || defined(STM32H5)
     TIM_ENTRY(1, TIM1_UP_IRQn),
     #elif defined(STM32G4) || defined(STM32L4) || defined(STM32WB)
     TIM_ENTRY(1, TIM1_UP_TIM16_IRQn),
diff --git a/ports/stm32/vfs_rom_ioctl.c b/ports/stm32/vfs_rom_ioctl.c
new file mode 100644
index 0000000000000..7592aa22d622a
--- /dev/null
+++ b/ports/stm32/vfs_rom_ioctl.c
@@ -0,0 +1,178 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2025 Damien P. George
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "py/obj.h"
+#include "py/objarray.h"
+#include "py/mperrno.h"
+#include "extmod/vfs.h"
+#include "drivers/memory/spiflash.h"
+
+#include "flash.h"
+#include "qspi.h"
+#include "storage.h"
+
+#if MICROPY_VFS_ROM_IOCTL
+
+#if MICROPY_HW_ROMFS_ENABLE_PART0 && defined(MICROPY_HW_ROMFS_PART0_START)
+#define ROMFS0_DYNAMIC (1)
+static MP_DEFINE_MEMORYVIEW_OBJ(romfs0_obj, 'B', 0, (uintptr_t)-1, (void *)-1);
+#elif MICROPY_HW_ROMFS_ENABLE_PART0 && !defined(MICROPY_HW_ROMFS_PART0_START)
+#define ROMFS0_DYNAMIC (0)
+extern uint8_t _micropy_hw_romfs_part0_start;
+extern uint8_t _micropy_hw_romfs_part0_size;
+static const MP_DEFINE_MEMORYVIEW_OBJ(romfs0_obj, 'B', 0, (uintptr_t)&_micropy_hw_romfs_part0_size, (void *)&_micropy_hw_romfs_part0_start);
+#endif
+
+#if MICROPY_HW_ROMFS_ENABLE_PART1 && defined(MICROPY_HW_ROMFS_PART1_START)
+#define ROMFS1_DYNAMIC (1)
+static MP_DEFINE_MEMORYVIEW_OBJ(romfs1_obj, 'B', 0, (uintptr_t)-1, (void *)-1);
+#elif MICROPY_HW_ROMFS_ENABLE_PART1 && !defined(MICROPY_HW_ROMFS_PART1_START)
+#define ROMFS1_DYNAMIC (0)
+extern uint8_t _micropy_hw_romfs_part1_start;
+extern uint8_t _micropy_hw_romfs_part1_size;
+static const MP_DEFINE_MEMORYVIEW_OBJ(romfs1_obj, 'B', 0, (uintptr_t)&_micropy_hw_romfs_part1_size, (void *)&_micropy_hw_romfs_part1_start);
+#endif
+
+static const mp_obj_array_t *romfs_obj_table[] = {
+    #if MICROPY_HW_ROMFS_ENABLE_PART0
+    &romfs0_obj,
+    #endif
+    #if MICROPY_HW_ROMFS_ENABLE_PART1
+    &romfs1_obj,
+    #endif
+};
+
+mp_obj_t mp_vfs_rom_ioctl(size_t n_args, const mp_obj_t *args) {
+    mp_int_t cmd = mp_obj_get_int(args[0]);
+    if (cmd == MP_VFS_ROM_IOCTL_GET_NUMBER_OF_SEGMENTS) {
+        return MP_OBJ_NEW_SMALL_INT(MP_ARRAY_SIZE(romfs_obj_table));
+    }
+
+    if (n_args < 2) {
+        return MP_OBJ_NEW_SMALL_INT(-MP_EINVAL);
+    }
+
+    mp_int_t romfs_id = mp_obj_get_int(args[1]);
+    if (!(0 <= romfs_id && romfs_id < MP_ARRAY_SIZE(romfs_obj_table))) {
+        return MP_OBJ_NEW_SMALL_INT(-MP_EINVAL);
+    }
+
+    #if ROMFS0_DYNAMIC
+    if (romfs_id == 0) {
+        romfs0_obj.items = (void *)MICROPY_HW_ROMFS_PART0_START;
+        romfs0_obj.len = MICROPY_HW_ROMFS_PART0_SIZE;
+    }
+    #endif
+    #if ROMFS1_DYNAMIC
+    if (romfs_id == 1) {
+        romfs1_obj.items = (void *)MICROPY_HW_ROMFS_PART1_START;
+        romfs1_obj.len = MICROPY_HW_ROMFS_PART1_SIZE;
+    }
+    #endif
+
+    const mp_obj_array_t *romfs_obj = romfs_obj_table[romfs_id];
+    uintptr_t romfs_base = (uintptr_t)romfs_obj->items;
+    uintptr_t romfs_len = romfs_obj->len;
+
+    if (cmd == MP_VFS_ROM_IOCTL_GET_SEGMENT) {
+        // Return the ROMFS memoryview object.
+        return MP_OBJ_FROM_PTR(romfs_obj);
+    }
+
+    if (cmd == MP_VFS_ROM_IOCTL_WRITE_PREPARE) {
+        // Erase sectors in given range.
+        if (n_args < 3) {
+            return MP_OBJ_NEW_SMALL_INT(-MP_EINVAL);
+        }
+        uint32_t dest = romfs_base;
+        uint32_t dest_max = dest + mp_obj_get_int(args[2]);
+        if (dest_max > romfs_base + romfs_len) {
+            return MP_OBJ_NEW_SMALL_INT(-MP_EINVAL);
+        }
+
+        #if MICROPY_HW_ROMFS_ENABLE_INTERNAL_FLASH
+        if (flash_is_valid_addr(dest)) {
+            while (dest < dest_max) {
+                int ret = flash_erase(dest);
+                if (ret < 0) {
+                    return MP_OBJ_NEW_SMALL_INT(ret);
+                }
+                uint32_t sector_size = 0;
+                flash_get_sector_info(dest, NULL, &sector_size);
+                dest += sector_size;
+            }
+            return MP_OBJ_NEW_SMALL_INT(16);
+        }
+        #endif
+
+        #if MICROPY_HW_ROMFS_ENABLE_EXTERNAL_QSPI
+        if (qspi_is_valid_addr(dest)) {
+            dest -= QSPI_MAP_ADDR;
+            dest_max -= QSPI_MAP_ADDR;
+            while (dest < dest_max) {
+                int ret = mp_spiflash_erase_block(MICROPY_HW_ROMFS_QSPI_SPIFLASH_OBJ, dest);
+                if (ret < 0) {
+                    return MP_OBJ_NEW_SMALL_INT(ret);
+                }
+                dest += MP_SPIFLASH_ERASE_BLOCK_SIZE;
+            }
+            return MP_OBJ_NEW_SMALL_INT(4);
+        }
+        #endif
+    }
+
+    if (cmd == MP_VFS_ROM_IOCTL_WRITE) {
+        // Write data to flash.
+        if (n_args < 4) {
+            return MP_OBJ_NEW_SMALL_INT(-MP_EINVAL);
+        }
+        uint32_t dest = romfs_base + mp_obj_get_int(args[2]);
+        mp_buffer_info_t bufinfo;
+        mp_get_buffer_raise(args[3], &bufinfo, MP_BUFFER_READ);
+        if (dest + bufinfo.len > romfs_base + romfs_len) {
+            return MP_OBJ_NEW_SMALL_INT(-MP_EINVAL);
+        }
+
+        #if MICROPY_HW_ROMFS_ENABLE_INTERNAL_FLASH
+        if (flash_is_valid_addr(dest)) {
+            int ret = flash_write(dest, bufinfo.buf, bufinfo.len / 4);
+            return MP_OBJ_NEW_SMALL_INT(ret);
+        }
+        #endif
+
+        #if MICROPY_HW_ROMFS_ENABLE_EXTERNAL_QSPI
+        if (qspi_is_valid_addr(dest)) {
+            dest -= QSPI_MAP_ADDR;
+            int ret = mp_spiflash_write(MICROPY_HW_ROMFS_QSPI_SPIFLASH_OBJ, dest, bufinfo.len, bufinfo.buf);
+            return MP_OBJ_NEW_SMALL_INT(ret);
+        }
+        #endif
+    }
+
+    return MP_OBJ_NEW_SMALL_INT(-MP_EINVAL);
+}
+
+#endif // MICROPY_VFS_ROM_IOCTL
diff --git a/ports/unix/coverage.c b/ports/unix/coverage.c
index 2b65b47fc5bc9..29e1457cb717e 100644
--- a/ports/unix/coverage.c
+++ b/ports/unix/coverage.c
@@ -184,6 +184,18 @@ static void pairheap_test(size_t nops, int *ops) {
     mp_printf(&mp_plat_print, "\n");
 }
 
+static mp_sched_node_t mp_coverage_sched_node;
+static bool coverage_sched_function_continue;
+
+static void coverage_sched_function(mp_sched_node_t *node) {
+    (void)node;
+    mp_printf(&mp_plat_print, "scheduled function\n");
+    if (coverage_sched_function_continue) {
+        // Re-scheduling node will cause it to run again next time scheduled functions are run
+        mp_sched_schedule_node(&mp_coverage_sched_node, coverage_sched_function);
+    }
+}
+
 // function to run extra tests for things that can't be checked by scripts
 static mp_obj_t extra_coverage(void) {
     // mp_printf (used by ports that don't have a native printf)
@@ -621,6 +633,19 @@ static mp_obj_t extra_coverage(void) {
             mp_obj_print_exception(&mp_plat_print, MP_OBJ_FROM_PTR(nlr.ret_val));
         }
         mp_handle_pending(true);
+
+        coverage_sched_function_continue = true;
+        mp_sched_schedule_node(&mp_coverage_sched_node, coverage_sched_function);
+        for (int i = 0; i < 3; ++i) {
+            mp_printf(&mp_plat_print, "loop\n");
+            mp_handle_pending(true);
+        }
+        // Clear this flag to prevent the function scheduling itself again
+        coverage_sched_function_continue = false;
+        // Will only run the first time through this loop, then not scheduled again
+        for (int i = 0; i < 3; ++i) {
+            mp_handle_pending(true);
+        }
     }
 
     // ringbuf
diff --git a/ports/unix/coveragecpp.cpp b/ports/unix/coveragecpp.cpp
index 23c3955ae9d0b..8ba308f6468f3 100644
--- a/ports/unix/coveragecpp.cpp
+++ b/ports/unix/coveragecpp.cpp
@@ -17,10 +17,61 @@ extern "C" {
 #include <py/runtime.h>
 }
 
+// Invoke all (except one, see below) public API macros which initialize structs to make sure
+// they are C++-compatible, meaning they explicitly initialize all struct members.
+mp_obj_t f0();
+MP_DEFINE_CONST_FUN_OBJ_0(f0_obj, f0);
+mp_obj_t f1(mp_obj_t);
+MP_DEFINE_CONST_FUN_OBJ_1(f1_obj, f1);
+mp_obj_t f2(mp_obj_t, mp_obj_t);
+MP_DEFINE_CONST_FUN_OBJ_2(f2_obj, f2);
+mp_obj_t f3(mp_obj_t, mp_obj_t, mp_obj_t);
+MP_DEFINE_CONST_FUN_OBJ_3(f3_obj, f3);
+mp_obj_t fvar(size_t, const mp_obj_t *);
+MP_DEFINE_CONST_FUN_OBJ_VAR(fvar_obj, 1, fvar);
+mp_obj_t fvarbetween(size_t, const mp_obj_t *);
+MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(fvarbetween_obj, 1, 2, fvarbetween);
+mp_obj_t fkw(size_t, const mp_obj_t *, mp_map_t *);
+MP_DEFINE_CONST_FUN_OBJ_KW(fkw_obj, 1, fkw);
+
+static const mp_rom_map_elem_t table[] = {
+    { MP_ROM_QSTR(MP_QSTR_f0), MP_ROM_PTR(&f0_obj) },
+};
+MP_DEFINE_CONST_MAP(map, table);
+MP_DEFINE_CONST_DICT(dict, table);
+
+static const qstr attrtuple_fields[] = {
+    MP_QSTR_f0,
+};
+MP_DEFINE_ATTRTUPLE(attrtuple, attrtuple_fields, 1, MP_ROM_PTR(&f0_obj));
+
+void nlr_cb(void *);
+void nlr_cb(void *){
+}
+
+// The MP_DEFINE_CONST_OBJ_TYPE macro is not C++-compatible because each of the
+// MP_DEFINE_CONST_OBJ_TYPE_NARGS_X macros only initializes some of _mp_obj_type_t's
+// .slot_index_xxx members but that cannot be fixed to be done in a deterministic way.
+
+
 #if defined(MICROPY_UNIX_COVERAGE)
 
 // Just to test building of C++ code.
 static mp_obj_t extra_cpp_coverage_impl() {
+    MP_DEFINE_NLR_JUMP_CALLBACK_FUNCTION_1(ctx, nlr_cb, (void *) nlr_cb);
+
+    // To avoid 'error: unused variable [-Werror,-Wunused-const-variable]'.
+    (void) ctx;
+    (void) f0_obj;
+    (void) f1_obj;
+    (void) f2_obj;
+    (void) f3_obj;
+    (void) fvar_obj;
+    (void) fvarbetween_obj;
+    (void) fkw_obj;
+    (void) map;
+    (void) dict;
+    (void) attrtuple;
     return mp_const_none;
 }
 
diff --git a/ports/unix/main.c b/ports/unix/main.c
index 58fa3ff589a55..530e20a3863b4 100644
--- a/ports/unix/main.c
+++ b/ports/unix/main.c
@@ -45,6 +45,7 @@
 #include "py/gc.h"
 #include "py/objstr.h"
 #include "py/cstack.h"
+#include "py/mperrno.h"
 #include "py/mphal.h"
 #include "py/mpthread.h"
 #include "extmod/misc.h"
@@ -452,10 +453,13 @@ static void set_sys_argv(char *argv[], int argc, int start_arg) {
 
 #if MICROPY_PY_SYS_EXECUTABLE
 extern mp_obj_str_t mp_sys_executable_obj;
-static char executable_path[MICROPY_ALLOC_PATH_MAX];
+static char *executable_path = NULL;
 
 static void sys_set_excecutable(char *argv0) {
-    if (realpath(argv0, executable_path)) {
+    if (executable_path == NULL) {
+        executable_path = realpath(argv0, NULL);
+    }
+    if (executable_path != NULL) {
         mp_obj_str_set_data(&mp_sys_executable_obj, (byte *)executable_path, strlen(executable_path));
     }
 }
@@ -548,7 +552,14 @@ MP_NOINLINE int main_(int argc, char **argv) {
             MP_OBJ_NEW_QSTR(MP_QSTR__slash_),
         };
         mp_vfs_mount(2, args, (mp_map_t *)&mp_const_empty_map);
+
+        // Make sure the root that was just mounted is the current VFS (it's always at
+        // the end of the linked list).  Can't use chdir('/') because that will change
+        // the current path within the VfsPosix object.
         MP_STATE_VM(vfs_cur) = MP_STATE_VM(vfs_mount_table);
+        while (MP_STATE_VM(vfs_cur)->next != NULL) {
+            MP_STATE_VM(vfs_cur) = MP_STATE_VM(vfs_cur)->next;
+        }
     }
     #endif
 
@@ -713,11 +724,9 @@ MP_NOINLINE int main_(int argc, char **argv) {
                 return invalid_args();
             }
         } else {
-            char *pathbuf = malloc(PATH_MAX);
-            char *basedir = realpath(argv[a], pathbuf);
+            char *basedir = realpath(argv[a], NULL);
             if (basedir == NULL) {
                 mp_printf(&mp_stderr_print, "%s: can't open file '%s': [Errno %d] %s\n", argv[0], argv[a], errno, strerror(errno));
-                free(pathbuf);
                 // CPython exits with 2 in such case
                 ret = 2;
                 break;
@@ -726,7 +735,7 @@ MP_NOINLINE int main_(int argc, char **argv) {
             // Set base dir of the script as first entry in sys.path.
             char *p = strrchr(basedir, '/');
             mp_obj_list_store(mp_sys_path, MP_OBJ_NEW_SMALL_INT(0), mp_obj_new_str_via_qstr(basedir, p - basedir));
-            free(pathbuf);
+            free(basedir);
 
             set_sys_argv(argv, argc, a);
             ret = do_file(argv[a]);
@@ -766,7 +775,7 @@ MP_NOINLINE int main_(int argc, char **argv) {
     #endif
 
     #if MICROPY_PY_BLUETOOTH
-    void mp_bluetooth_deinit(void);
+    int mp_bluetooth_deinit(void);
     mp_bluetooth_deinit();
     #endif
 
@@ -792,6 +801,11 @@ MP_NOINLINE int main_(int argc, char **argv) {
     #endif
     #endif
 
+    #if MICROPY_PY_SYS_EXECUTABLE && !defined(NDEBUG)
+    // Again, make memory leak detector happy
+    free(executable_path);
+    #endif
+
     // printf("total bytes = %d\n", m_get_total_bytes_allocated());
     return ret & 0xff;
 }
@@ -803,3 +817,22 @@ void nlr_jump_fail(void *val) {
     fprintf(stderr, "FATAL: uncaught NLR %p\n", val);
     exit(1);
 }
+
+#if MICROPY_VFS_ROM_IOCTL
+
+static uint8_t romfs_buf[4] = { 0xd2, 0xcd, 0x31, 0x00 }; // empty ROMFS
+static const MP_DEFINE_MEMORYVIEW_OBJ(romfs_obj, 'B', 0, sizeof(romfs_buf), romfs_buf);
+
+mp_obj_t mp_vfs_rom_ioctl(size_t n_args, const mp_obj_t *args) {
+    switch (mp_obj_get_int(args[0])) {
+        case MP_VFS_ROM_IOCTL_GET_NUMBER_OF_SEGMENTS:
+            return MP_OBJ_NEW_SMALL_INT(1);
+
+        case MP_VFS_ROM_IOCTL_GET_SEGMENT:
+            return MP_OBJ_FROM_PTR(&romfs_obj);
+    }
+
+    return MP_OBJ_NEW_SMALL_INT(-MP_EINVAL);
+}
+
+#endif
diff --git a/ports/unix/modsocket.c b/ports/unix/modsocket.c
index 6d6059ae44c54..2aaa21183a9d4 100644
--- a/ports/unix/modsocket.c
+++ b/ports/unix/modsocket.c
@@ -701,6 +701,7 @@ static const mp_rom_map_elem_t mp_module_socket_globals_table[] = {
 
     C(MSG_DONTROUTE),
     C(MSG_DONTWAIT),
+    C(MSG_PEEK),
 
     C(SOL_SOCKET),
     C(SO_BROADCAST),
diff --git a/ports/unix/mpthreadport.c b/ports/unix/mpthreadport.c
index 5172645bc147a..ded3bd14aff70 100644
--- a/ports/unix/mpthreadport.c
+++ b/ports/unix/mpthreadport.c
@@ -45,8 +45,14 @@
 // potential conflict with other uses of the more commonly used SIGUSR1.
 #ifdef SIGRTMIN
 #define MP_THREAD_GC_SIGNAL (SIGRTMIN + 5)
+#ifdef __ANDROID__
+#define MP_THREAD_TERMINATE_SIGNAL (SIGRTMIN + 6)
+#endif
 #else
 #define MP_THREAD_GC_SIGNAL (SIGUSR1)
+#ifdef __ANDROID__
+#define MP_THREAD_TERMINATE_SIGNAL (SIGUSR2)
+#endif
 #endif
 
 // This value seems to be about right for both 32-bit and 64-bit builds.
@@ -107,6 +113,18 @@ static void mp_thread_gc(int signo, siginfo_t *info, void *context) {
     }
 }
 
+// On Android, pthread_cancel and pthread_setcanceltype are not implemented.
+// To achieve that result a new signal handler responding on either
+// (SIGRTMIN + 6) or SIGUSR2 is installed on every child thread.  The sole
+// purpose of this new signal handler is to terminate the thread in a safe
+// asynchronous manner.
+
+#ifdef __ANDROID__
+static void mp_thread_terminate(int signo, siginfo_t *info, void *context) {
+    pthread_exit(NULL);
+}
+#endif
+
 void mp_thread_init(void) {
     pthread_key_create(&tls_key, NULL);
     pthread_setspecific(tls_key, &mp_state_ctx.thread);
@@ -135,6 +153,14 @@ void mp_thread_init(void) {
     sa.sa_sigaction = mp_thread_gc;
     sigemptyset(&sa.sa_mask);
     sigaction(MP_THREAD_GC_SIGNAL, &sa, NULL);
+
+    // Install a signal handler for asynchronous termination if needed.
+    #if defined(__ANDROID__)
+    sa.sa_flags = SA_SIGINFO;
+    sa.sa_sigaction = mp_thread_terminate;
+    sigemptyset(&sa.sa_mask);
+    sigaction(MP_THREAD_TERMINATE_SIGNAL, &sa, NULL);
+    #endif
 }
 
 void mp_thread_deinit(void) {
@@ -142,7 +168,11 @@ void mp_thread_deinit(void) {
     while (thread->next != NULL) {
         mp_thread_t *th = thread;
         thread = thread->next;
+        #if defined(__ANDROID__)
+        pthread_kill(th->id, MP_THREAD_TERMINATE_SIGNAL);
+        #else
         pthread_cancel(th->id);
+        #endif
         free(th);
     }
     mp_thread_unix_end_atomic_section();
@@ -200,7 +230,9 @@ void mp_thread_start(void) {
     }
     #endif
 
+    #if !defined(__ANDROID__)
     pthread_setcanceltype(PTHREAD_CANCEL_ASYNCHRONOUS, NULL);
+    #endif
     mp_thread_unix_begin_atomic_section();
     for (mp_thread_t *th = thread; th != NULL; th = th->next) {
         if (th->id == pthread_self()) {
diff --git a/ports/unix/variants/coverage/mpconfigvariant.h b/ports/unix/variants/coverage/mpconfigvariant.h
index e24e0f1b14ade..cfefeb46720f8 100644
--- a/ports/unix/variants/coverage/mpconfigvariant.h
+++ b/ports/unix/variants/coverage/mpconfigvariant.h
@@ -41,4 +41,14 @@
 #define MICROPY_DEBUG_PARSE_RULE_NAME  (1)
 #define MICROPY_TRACKED_ALLOC          (1)
 #define MICROPY_WARNINGS_CATEGORY      (1)
+#undef MICROPY_VFS_ROM_IOCTL
+#define MICROPY_VFS_ROM_IOCTL          (1)
 #define MICROPY_PY_CRYPTOLIB_CTR       (1)
+#define MICROPY_SCHEDULER_STATIC_NODES (1)
+
+// Enable os.uname for attrtuple coverage test
+#define MICROPY_PY_OS_UNAME            (1)
+#define MICROPY_HW_BOARD_NAME          "a machine"
+#define MICROPY_HW_MCU_NAME            MICROPY_PY_SYS_PLATFORM
+// Keep the standard banner message
+#define MICROPY_BANNER_MACHINE MICROPY_PY_SYS_PLATFORM " [" MICROPY_PLATFORM_COMPILER "] version"
diff --git a/ports/unix/variants/mpconfigvariant_common.h b/ports/unix/variants/mpconfigvariant_common.h
index 093477af0aded..9eeed8797366c 100644
--- a/ports/unix/variants/mpconfigvariant_common.h
+++ b/ports/unix/variants/mpconfigvariant_common.h
@@ -123,3 +123,4 @@
 #define MICROPY_PY_MACHINE_PIN_BASE    (1)
 
 #define MICROPY_VFS_ROM                (1)
+#define MICROPY_VFS_ROM_IOCTL          (0)
diff --git a/ports/webassembly/main.c b/ports/webassembly/main.c
index c542f0cd72efe..770dfbe0ca5c7 100644
--- a/ports/webassembly/main.c
+++ b/ports/webassembly/main.c
@@ -233,7 +233,7 @@ void nlr_jump_fail(void *val) {
     }
 }
 
-void NORETURN __fatal_error(const char *msg) {
+void MP_NORETURN __fatal_error(const char *msg) {
     while (1) {
         ;
     }
diff --git a/ports/windows/mpconfigport.h b/ports/windows/mpconfigport.h
index fabc9072d6c70..6e32d5fe5ebdf 100644
--- a/ports/windows/mpconfigport.h
+++ b/ports/windows/mpconfigport.h
@@ -242,7 +242,7 @@ typedef long mp_off_t;
 
 // CL specific overrides from mpconfig
 
-#define NORETURN                    __declspec(noreturn)
+#define MP_NORETURN                 __declspec(noreturn)
 #define MP_WEAK
 #define MP_NOINLINE                 __declspec(noinline)
 #define MP_ALWAYSINLINE             __forceinline
diff --git a/ports/windows/windows_mphal.c b/ports/windows/windows_mphal.c
index b636393f5401c..5a65b2fd2aeae 100644
--- a/ports/windows/windows_mphal.c
+++ b/ports/windows/windows_mphal.c
@@ -70,7 +70,7 @@ void mp_hal_stdio_mode_orig(void) {
 }
 
 // Handler to be installed by SetConsoleCtrlHandler, currently used only to handle Ctrl-C.
-// This handler has to be installed just once (this has to be done elswhere in init code).
+// This handler has to be installed just once (this has to be done elsewhere in init code).
 // Previous versions of the mp_hal code would install a handler whenever Ctrl-C input is
 // allowed and remove the handler again when it is not. That is not necessary though (1),
 // and it might introduce problems (2) because console notifications are delivered to the
diff --git a/ports/zephyr/CMakeLists.txt b/ports/zephyr/CMakeLists.txt
index 68b6c0700b546..debf2bd2c15d4 100644
--- a/ports/zephyr/CMakeLists.txt
+++ b/ports/zephyr/CMakeLists.txt
@@ -34,12 +34,18 @@ set(MICROPY_TARGET      micropython)
 include(${MICROPY_DIR}/py/py.cmake)
 include(${MICROPY_DIR}/extmod/extmod.cmake)
 
+if (CONFIG_MICROPY_FROZEN_MODULES)
+    cmake_path(ABSOLUTE_PATH CONFIG_MICROPY_FROZEN_MANIFEST BASE_DIRECTORY ${CMAKE_CURRENT_LIST_DIR})
+    set(MICROPY_FROZEN_MANIFEST ${CONFIG_MICROPY_FROZEN_MANIFEST})
+endif()
+
 set(MICROPY_SOURCE_PORT
     main.c
     help.c
     machine_i2c.c
     machine_spi.c
     machine_pin.c
+    machine_timer.c
     modbluetooth_zephyr.c
     modsocket.c
     modzephyr.c
@@ -114,13 +120,15 @@ zephyr_library_compile_definitions(
 zephyr_library_sources(${MICROPY_SOURCE_QSTR})
 zephyr_library_link_libraries(kernel)
 
-add_dependencies(${MICROPY_TARGET} zephyr_generated_headers)
-
 include(${MICROPY_DIR}/py/mkrules.cmake)
 
+add_dependencies(BUILD_VERSION_HEADER zephyr_generated_headers)
+add_dependencies(${MICROPY_TARGET} zephyr_generated_headers)
+
 target_sources(app PRIVATE
     src/zephyr_start.c
     src/zephyr_getchar.c
+    src/usbd.c
 )
 
 target_link_libraries(app PRIVATE ${MICROPY_TARGET})
diff --git a/ports/zephyr/Kconfig b/ports/zephyr/Kconfig
index 227e943bcd13c..6db0133f4f15d 100644
--- a/ports/zephyr/Kconfig
+++ b/ports/zephyr/Kconfig
@@ -41,6 +41,22 @@ config MICROPY_VFS_LFS1
 config MICROPY_VFS_LFS2
 	bool "LittleFs version 2 file system"
 
+config MICROPY_FROZEN_MODULES
+	bool "Enable Frozen Modules"
+
+config MICROPY_FROZEN_MANIFEST
+	string "Path to Frozen Modules manifest.py"
+	depends on MICROPY_FROZEN_MODULES
+	default "boards/manifest.py"
+
+config MICROPY_USB_DEVICE_VID
+	hex "USB VID"
+	default 0x2fe3
+
+config MICROPY_USB_DEVICE_PID
+	hex "USB PID"
+	default 0x0001
+
 endmenu # MicroPython Options
 
 source "Kconfig.zephyr"
diff --git a/ports/zephyr/README.md b/ports/zephyr/README.md
index 4590eb7199c25..fc18d25c0aadb 100644
--- a/ports/zephyr/README.md
+++ b/ports/zephyr/README.md
@@ -4,10 +4,13 @@ MicroPython port to Zephyr RTOS
 This is a work-in-progress port of MicroPython to Zephyr RTOS
 (http://zephyrproject.org).
 
-This port requires Zephyr version v3.7.0, and may also work on higher
-versions.  All boards supported
-by Zephyr (with standard level of features support, like UART console)
-should work with MicroPython (but not all were tested).
+This port tries to support all Zephyr versions supported upstream,
+i.e. currently v3.7 (LTS), v4.0 and the development branch. The CI is
+setup to use the latest version, i.e. v4.0.
+
+All boards supported by Zephyr (with standard level of features
+support, like UART console) should work with MicroPython (but not all
+were tested).
 
 Features supported at this time:
 
@@ -16,6 +19,7 @@ Features supported at this time:
 * `machine.Pin` class for GPIO control, with IRQ support.
 * `machine.I2C` class for I2C control.
 * `machine.SPI` class for SPI control.
+* `machine.PWM` class for PWM control
 * `socket` module for networking (IPv4/IPv6).
 * "Frozen modules" support to allow to bundle Python modules together
   with firmware. Including complete applications, including with
@@ -39,13 +43,13 @@ setup is correct.
 If you already have Zephyr installed but are having issues building the
 MicroPython port then try installing the correct version of Zephyr via:
 
-    $ west init zephyrproject -m https://github.com/zephyrproject-rtos/zephyr --mr v3.7.0
+    $ west init zephyrproject -m https://github.com/zephyrproject-rtos/zephyr --mr v4.0.0
 
 Alternatively, you don't have to redo the Zephyr installation to just
 switch from master to a tagged release, you can instead do:
 
     $ cd zephyrproject/zephyr
-    $ git checkout v3.7.0
+    $ git checkout v4.0.0
     $ west update
 
 With Zephyr installed you may then need to configure your environment,
diff --git a/ports/zephyr/boards/beagleconnect_freedom.conf b/ports/zephyr/boards/beagleconnect_freedom.conf
index 14ce9c526e059..8fe2583205b39 100644
--- a/ports/zephyr/boards/beagleconnect_freedom.conf
+++ b/ports/zephyr/boards/beagleconnect_freedom.conf
@@ -1,4 +1,6 @@
 # Hardware features
+CONFIG_ADC=y
+CONFIG_PWM=y
 CONFIG_I2C=y
 CONFIG_SPI=y
 
diff --git a/ports/zephyr/boards/beagleconnect_freedom.overlay b/ports/zephyr/boards/beagleconnect_freedom.overlay
new file mode 100644
index 0000000000000..7dd4469c99247
--- /dev/null
+++ b/ports/zephyr/boards/beagleconnect_freedom.overlay
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2024 Ayush Singh <ayush@beagleboard.org>
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+&pinctrl {
+	/* MB1 PWM */
+	pwm0_default: pwm0_default {
+		pinmux = <17 IOC_PORT_MCU_PORT_EVENT1>;
+		bias-disable;
+		drive-strength = <2>;
+	};
+
+	/* MB2 PWM */
+	pwm1_default: pwm1_default {
+		pinmux = <19 IOC_PORT_MCU_PORT_EVENT3>;
+		bias-disable;
+		drive-strength = <2>;
+	};
+};
+
+&gpt0 {
+	status = "okay";
+};
+
+&gpt1 {
+	status = "okay";
+};
+
+&pwm0 {
+	status = "okay";
+	pinctrl-0 = <&pwm0_default>;
+	pinctrl-names = "default";
+};
+
+&pwm1 {
+	status = "okay";
+	pinctrl-0 = <&pwm1_default>;
+	pinctrl-names = "default";
+};
diff --git a/ports/zephyr/boards/beagleplay_cc1352p7.conf b/ports/zephyr/boards/beagleplay_cc1352p7.conf
new file mode 100644
index 0000000000000..f63d184e38ef0
--- /dev/null
+++ b/ports/zephyr/boards/beagleplay_cc1352p7.conf
@@ -0,0 +1,13 @@
+# Flash drivers
+CONFIG_FLASH=y
+CONFIG_FLASH_MAP=y
+
+# Networking
+CONFIG_BT=n
+CONFIG_NET_IPV4=n
+CONFIG_NET_CONFIG_NEED_IPV6=y
+CONFIG_NET_CONFIG_NEED_IPV4=n
+CONFIG_NET_CONFIG_MY_IPV4_ADDR=""
+CONFIG_NET_L2_IEEE802154=y
+CONFIG_NET_DHCPV4=n
+CONFIG_NET_CONFIG_IEEE802154_CHANNEL=1
diff --git a/ports/zephyr/boards/manifest.py b/ports/zephyr/boards/manifest.py
new file mode 100644
index 0000000000000..df1169c081c59
--- /dev/null
+++ b/ports/zephyr/boards/manifest.py
@@ -0,0 +1,7 @@
+# This is an example frozen module manifest. Enable this by configuring
+# the Zephyr project and enabling the frozen modules config feature.
+
+freeze("$(PORT_DIR)/modules")
+
+# Require a micropython-lib module.
+require("upysh")
diff --git a/ports/zephyr/boards/nrf52840dk_nrf52840.conf b/ports/zephyr/boards/nrf52840dk_nrf52840.conf
index e9ec78b64ffae..dc2ed1c4b49df 100644
--- a/ports/zephyr/boards/nrf52840dk_nrf52840.conf
+++ b/ports/zephyr/boards/nrf52840dk_nrf52840.conf
@@ -1,8 +1,13 @@
 CONFIG_NETWORKING=n
 CONFIG_BT=y
 CONFIG_BT_DEVICE_NAME_DYNAMIC=y
+CONFIG_BT_GATT_DYNAMIC_DB=y
 CONFIG_BT_PERIPHERAL=y
 CONFIG_BT_CENTRAL=y
+CONFIG_BT_GATT_CLIENT=y
+CONFIG_BT_L2CAP_TX_MTU=252
+CONFIG_BT_BUF_ACL_RX_SIZE=256
+CONFIG_BT_GATT_ENFORCE_SUBSCRIPTION=n
 
 CONFIG_MICROPY_HEAP_SIZE=98304
 CONFIG_MAIN_STACK_SIZE=8192
diff --git a/ports/zephyr/boards/nrf5340dk_nrf5340_cpuapp.conf b/ports/zephyr/boards/nrf5340dk_nrf5340_cpuapp.conf
new file mode 100644
index 0000000000000..b4aed364a746e
--- /dev/null
+++ b/ports/zephyr/boards/nrf5340dk_nrf5340_cpuapp.conf
@@ -0,0 +1,2 @@
+CONFIG_FLASH=y
+CONFIG_FLASH_MAP=y
diff --git a/ports/zephyr/boards/nrf5340dk_nrf5340_cpuapp.overlay b/ports/zephyr/boards/nrf5340dk_nrf5340_cpuapp.overlay
new file mode 100644
index 0000000000000..7310d1e55f760
--- /dev/null
+++ b/ports/zephyr/boards/nrf5340dk_nrf5340_cpuapp.overlay
@@ -0,0 +1,16 @@
+// Replace default internal storage partition with external flash
+
+/delete-node/ &storage_partition;
+
+&mx25r64 {
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		storage_partition: partition@0 {
+			reg = <0x00000000 0x800000>;
+			label = "storage";
+		};
+	};
+};
diff --git a/ports/zephyr/boards/nrf9151dk_nrf9151.conf b/ports/zephyr/boards/nrf9151dk_nrf9151.conf
new file mode 100644
index 0000000000000..e89f332ba13d0
--- /dev/null
+++ b/ports/zephyr/boards/nrf9151dk_nrf9151.conf
@@ -0,0 +1,7 @@
+# Enable external flash
+CONFIG_SPI=y
+CONFIG_SPI_NOR=y
+CONFIG_SPI_NOR_SFDP_DEVICETREE=y
+
+CONFIG_FLASH=y
+CONFIG_FLASH_MAP=y
diff --git a/ports/zephyr/boards/nrf9151dk_nrf9151.overlay b/ports/zephyr/boards/nrf9151dk_nrf9151.overlay
new file mode 100644
index 0000000000000..85cab574148fe
--- /dev/null
+++ b/ports/zephyr/boards/nrf9151dk_nrf9151.overlay
@@ -0,0 +1,22 @@
+/ {
+	/* Configure partition manager to use gd25wb256 as the external flash */
+	chosen {
+		nordic,pm-ext-flash = &gd25wb256;
+	};
+};
+
+/delete-node/ &storage_partition;
+
+&gd25wb256 {
+	status = "okay";
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		storage_partition: partition@0 {
+			reg = <0x00000000 0x2000000>;
+			label = "storage";
+		};
+	};
+};
diff --git a/ports/zephyr/machine_pwm.c b/ports/zephyr/machine_pwm.c
new file mode 100644
index 0000000000000..5720dac9caf49
--- /dev/null
+++ b/ports/zephyr/machine_pwm.c
@@ -0,0 +1,205 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 Ayush Singh <ayush@beagleboard.org>
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "extmod/modmachine.h"
+#include "py/runtime.h"
+#include "stdint.h"
+#include "zephyr/drivers/pwm.h"
+#include "zephyr_device.h"
+
+#define VALUE_NOT_SET (-1)
+
+typedef struct _machine_pwm_obj_t {
+    mp_obj_base_t base;
+    const struct device *pwm;
+    uint32_t channel;
+    int32_t freq;
+    int32_t duty_u16;
+    int32_t duty_ns;
+    pwm_flags_t flags;
+} machine_pwm_obj_t;
+
+static void configure_pwm(machine_pwm_obj_t *self) {
+    const uint32_t period = NSEC_PER_SEC / self->freq;
+
+    if ((self->duty_u16 == VALUE_NOT_SET && self->duty_ns == VALUE_NOT_SET) ||
+        self->freq == VALUE_NOT_SET) {
+        mp_raise_ValueError(MP_ERROR_TEXT("Frequency and duty values must be set"));
+    }
+
+    if (self->duty_ns == VALUE_NOT_SET) {
+        self->duty_ns = (self->duty_u16 * period) / UINT16_MAX;
+    }
+
+    if (self->duty_ns < 0) {
+        self->duty_ns = 0;
+    } else if (self->duty_ns > period) {
+        self->duty_ns = period;
+    }
+
+    pwm_set(self->pwm, self->channel, period, self->duty_ns, self->flags);
+}
+
+/******************************************************************************/
+// MicroPython bindings for PWM
+
+static void mp_machine_pwm_print(const mp_print_t *print, mp_obj_t self_in,
+    mp_print_kind_t kind) {
+    machine_pwm_obj_t *self = MP_OBJ_TO_PTR(self_in);
+    mp_printf(print, "<PWM Controller %p channel=%d ", self->pwm, self->channel);
+
+    if (self->duty_ns != VALUE_NOT_SET) {
+        mp_printf(print, " duty_ns=%d", self->duty_ns);
+    } else {
+        mp_printf(print, " duty_u16=%d", self->duty_u16);
+    }
+
+    mp_printf(print, " freq=%d, flags=%u>", self->freq, self->flags);
+}
+
+// This called from pwm.init() method
+static void mp_machine_pwm_init_helper(machine_pwm_obj_t *self, size_t n_args,
+    const mp_obj_t *pos_args,
+    mp_map_t *kw_args) {
+
+    enum {
+        ARG_freq,
+        ARG_duty_u16,
+        ARG_duty_ns,
+        ARG_invert,
+    };
+    static const mp_arg_t allowed_args[] = {
+        {MP_QSTR_freq, MP_ARG_INT, {.u_int = VALUE_NOT_SET}},
+        {MP_QSTR_duty_u16, MP_ARG_INT, {.u_int = VALUE_NOT_SET}},
+        {MP_QSTR_duty_ns, MP_ARG_INT, {.u_int = VALUE_NOT_SET}},
+        {MP_QSTR_invert, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1}},
+    };
+    mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
+    mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args),
+        allowed_args, args);
+
+    // Maybe change PWM timer
+    if (args[ARG_freq].u_int > 0) {
+        self->freq = args[ARG_freq].u_int;
+    }
+
+    // Set duty_u16 cycle?
+    int32_t duty = args[ARG_duty_u16].u_int;
+    if (duty >= 0) {
+        self->duty_u16 = duty;
+        self->duty_ns = VALUE_NOT_SET;
+    }
+    // Set duty_ns value?
+    duty = args[ARG_duty_ns].u_int;
+    if (duty >= 0) {
+        self->duty_ns = duty;
+        self->duty_u16 = VALUE_NOT_SET;
+    }
+
+    self->flags = 0;
+    if (args[ARG_invert].u_int >= 0) {
+        self->flags |= PWM_POLARITY_INVERTED;
+    }
+
+    configure_pwm(self);
+}
+
+// PWM(pin-tuple, freq, [args])
+static mp_obj_t mp_machine_pwm_make_new(const mp_obj_type_t *type,
+    size_t n_args, size_t n_kw,
+    const mp_obj_t *args) {
+    mp_obj_t *items;
+    uint32_t wanted_chan;
+    const struct device *wanted_pwm;
+
+    // Check number of arguments
+    mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true);
+
+    // Get referred Pin object(s)
+    if (!mp_obj_is_type(args[0], &mp_type_tuple)) {
+        mp_raise_ValueError(
+            MP_ERROR_TEXT("Pin id must be tuple of (\"pwm_x\", channel#)"));
+    }
+
+    mp_obj_get_array_fixed_n(args[0], 2, &items);
+    wanted_pwm = zephyr_device_find(items[0]);
+    wanted_chan = mp_obj_get_int(items[1]);
+
+    machine_pwm_obj_t *pwm = mp_obj_malloc(machine_pwm_obj_t, &machine_pwm_type);
+    pwm->pwm = wanted_pwm;
+    pwm->channel = wanted_chan;
+    pwm->duty_ns = VALUE_NOT_SET;
+    pwm->duty_u16 = VALUE_NOT_SET;
+    pwm->freq = VALUE_NOT_SET;
+    pwm->flags = 0;
+
+    if (n_args > 1 || n_kw > 0) {
+        // pin mode given, so configure this GPIO
+        mp_map_t kw_args;
+        mp_map_init_fixed_table(&kw_args, n_kw, args + n_args);
+        mp_machine_pwm_init_helper(pwm, n_args - 1, args + 1, &kw_args);
+    }
+
+    return (mp_obj_t)pwm;
+}
+
+// This called from pwm.deinit() method
+static void mp_machine_pwm_deinit(machine_pwm_obj_t *self) {
+    self->duty_ns = 0;
+    self->duty_u16 = VALUE_NOT_SET;
+    configure_pwm(self);
+}
+
+static mp_obj_t mp_machine_pwm_freq_get(machine_pwm_obj_t *self) {
+    return MP_OBJ_NEW_SMALL_INT(self->freq);
+}
+
+static void mp_machine_pwm_freq_set(machine_pwm_obj_t *self, mp_int_t freq) {
+    self->freq = freq;
+    configure_pwm(self);
+}
+
+static void mp_machine_pwm_duty_set_ns(machine_pwm_obj_t *self,
+    mp_int_t duty_ns) {
+    self->duty_ns = duty_ns;
+    self->duty_u16 = VALUE_NOT_SET;
+    configure_pwm(self);
+}
+
+static mp_obj_t mp_machine_pwm_duty_get_ns(machine_pwm_obj_t *self) {
+    return MP_OBJ_NEW_SMALL_INT(self->duty_ns);
+}
+
+static mp_obj_t mp_machine_pwm_duty_get_u16(machine_pwm_obj_t *self) {
+    return MP_OBJ_NEW_SMALL_INT(self->duty_u16);
+}
+
+static void mp_machine_pwm_duty_set_u16(machine_pwm_obj_t *self,
+    mp_int_t duty_u16) {
+    self->duty_ns = VALUE_NOT_SET;
+    self->duty_u16 = duty_u16;
+    configure_pwm(self);
+}
diff --git a/ports/zephyr/machine_timer.c b/ports/zephyr/machine_timer.c
new file mode 100644
index 0000000000000..8ab2f629131c0
--- /dev/null
+++ b/ports/zephyr/machine_timer.c
@@ -0,0 +1,201 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2025 Daniel Campora on behalf of REMOTE TECH LTD
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include <stdint.h>
+#include <stdio.h>
+
+#include "py/mperrno.h"
+#include "py/obj.h"
+#include "py/runtime.h"
+#include "modmachine.h"
+#include <zephyr/kernel.h>
+#include <zephyr/device.h>
+#include <zephyr/sys/printk.h>
+
+#define TIMER_MS_PER_TICK (1000)
+
+typedef enum _machine_timer_mode_t {
+    TIMER_MODE_ONE_SHOT = 0,
+    TIMER_MODE_PERIODIC
+} machine_timer_mode_t;
+
+typedef struct _machine_timer_obj_t {
+    mp_obj_base_t base;
+
+    struct k_timer my_timer;
+
+    machine_timer_mode_t mode;
+    uint32_t period_ms;
+
+    mp_obj_t callback;
+
+    struct _machine_timer_obj_t *next;
+} machine_timer_obj_t;
+
+const mp_obj_type_t machine_timer_type;
+
+static mp_obj_t machine_timer_init_helper(machine_timer_obj_t *self, mp_uint_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args);
+static mp_obj_t machine_timer_deinit(mp_obj_t self_in);
+
+static void machine_timer_callback(struct k_timer *timer) {
+    machine_timer_obj_t *self = (machine_timer_obj_t *)k_timer_user_data_get(timer);
+    if (self->mode == TIMER_MODE_ONE_SHOT) {
+        machine_timer_deinit(self);
+    }
+    if (self->callback != mp_const_none) {
+        mp_sched_schedule(self->callback, MP_OBJ_FROM_PTR(self));
+    }
+}
+
+static void machine_timer_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
+    machine_timer_obj_t *self = self_in;
+    qstr mode_str = (self->mode == TIMER_MODE_PERIODIC) ? MP_QSTR_PERIODIC : MP_QSTR_ONE_SHOT;
+    mp_printf(print, "Timer(-1, mode=%q, period=%lu)", mode_str, self->period_ms);
+}
+
+static mp_obj_t machine_timer_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) {
+    mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true);
+
+    if (mp_obj_get_int(args[0]) != -1) {
+        mp_raise_ValueError(MP_ERROR_TEXT("only virtual timers are supported"));
+    }
+
+    // Create the new timer.
+    machine_timer_obj_t *self = mp_obj_malloc_with_finaliser(machine_timer_obj_t, &machine_timer_type);
+
+    // Add the timer to the linked-list of timers
+    self->next = MP_STATE_PORT(machine_timer_obj_head);
+    MP_STATE_PORT(machine_timer_obj_head) = self;
+
+    if (n_args > 1 || n_kw > 0) {
+        mp_map_t kw_args;
+        mp_map_init_fixed_table(&kw_args, n_kw, args + n_args);
+        machine_timer_init_helper(self, n_args - 1, args + 1, &kw_args);
+    }
+    return self;
+}
+
+static mp_obj_t machine_timer_init_helper(machine_timer_obj_t *self, mp_uint_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
+    enum {
+        ARG_mode,
+        ARG_callback,
+        ARG_period,
+        ARG_freq,
+    };
+    static const mp_arg_t allowed_args[] = {
+        { MP_QSTR_mode,         MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = TIMER_MODE_PERIODIC} },
+        { MP_QSTR_callback,     MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} },
+        { MP_QSTR_period,       MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0xffffffff} },
+        #if MICROPY_PY_BUILTINS_FLOAT
+        { MP_QSTR_freq,         MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} },
+        #else
+        { MP_QSTR_freq,         MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0xffffffff} },
+        #endif
+    };
+
+    mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
+    mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
+
+    #if MICROPY_PY_BUILTINS_FLOAT
+    if (args[ARG_freq].u_obj != mp_const_none) {
+        self->period_ms = (uint32_t)(TIMER_MS_PER_TICK / mp_obj_get_float(args[ARG_freq].u_obj));
+    }
+    #else
+    if (args[ARG_freq].u_int != 0xffffffff) {
+        self->period_ms = TIMER_MS_PER_TICK / ((uint64_t)args[ARG_freq].u_int);
+    }
+    #endif
+    else {
+        self->period_ms = args[ARG_period].u_int;
+    }
+
+    self->mode = args[ARG_mode].u_int;
+    self->callback = args[ARG_callback].u_obj;
+
+    k_timer_init(&self->my_timer, machine_timer_callback, NULL);
+    k_timer_user_data_set(&self->my_timer, self);
+    k_timer_start(&self->my_timer, K_MSEC(self->period_ms), K_MSEC(self->period_ms));
+
+    return mp_const_none;
+}
+
+static mp_obj_t machine_timer_deinit(mp_obj_t self_in) {
+    machine_timer_obj_t *self = self_in;
+    machine_timer_obj_t *prev = NULL;
+
+    k_timer_stop(&self->my_timer);
+
+    // remove it from the linked list
+    for (machine_timer_obj_t *_timer = MP_STATE_PORT(machine_timer_obj_head); _timer != NULL; _timer = _timer->next) {
+        if (_timer == self) {
+            if (prev != NULL) {
+                prev->next = _timer->next;
+            } else {
+                // move the start pointer
+                MP_STATE_PORT(machine_timer_obj_head) = _timer->next;
+            }
+            break;
+        } else {
+            prev = _timer;
+        }
+    }
+
+    return mp_const_none;
+}
+static MP_DEFINE_CONST_FUN_OBJ_1(machine_timer_deinit_obj, machine_timer_deinit);
+
+static mp_obj_t machine_timer_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) {
+    return machine_timer_init_helper(args[0], n_args - 1, args + 1, kw_args);
+}
+static MP_DEFINE_CONST_FUN_OBJ_KW(machine_timer_init_obj, 1, machine_timer_init);
+
+static mp_obj_t machine_timer_value(mp_obj_t self_in) {
+    machine_timer_obj_t *self = self_in;
+    k_ticks_t ticks = k_timer_remaining_ticks(&self->my_timer);
+    return MP_OBJ_NEW_SMALL_INT(k_ticks_to_ms_near32(ticks));
+}
+static MP_DEFINE_CONST_FUN_OBJ_1(machine_timer_value_obj, machine_timer_value);
+
+static const mp_rom_map_elem_t machine_timer_locals_dict_table[] = {
+    { MP_ROM_QSTR(MP_QSTR___del__),     MP_ROM_PTR(&machine_timer_deinit_obj) },
+    { MP_ROM_QSTR(MP_QSTR_deinit),      MP_ROM_PTR(&machine_timer_deinit_obj) },
+    { MP_ROM_QSTR(MP_QSTR_init),        MP_ROM_PTR(&machine_timer_init_obj) },
+    { MP_ROM_QSTR(MP_QSTR_value),       MP_ROM_PTR(&machine_timer_value_obj) },
+    { MP_ROM_QSTR(MP_QSTR_ONE_SHOT),    MP_ROM_INT(TIMER_MODE_ONE_SHOT) },
+    { MP_ROM_QSTR(MP_QSTR_PERIODIC),    MP_ROM_INT(TIMER_MODE_PERIODIC) },
+};
+static MP_DEFINE_CONST_DICT(machine_timer_locals_dict, machine_timer_locals_dict_table);
+
+MP_DEFINE_CONST_OBJ_TYPE(
+    machine_timer_type,
+    MP_QSTR_Timer,
+    MP_TYPE_FLAG_NONE,
+    make_new, machine_timer_make_new,
+    print, machine_timer_print,
+    locals_dict, &machine_timer_locals_dict
+    );
+
+MP_REGISTER_ROOT_POINTER(struct _machine_timer_obj_t *machine_timer_obj_head);
diff --git a/ports/zephyr/machine_wdt.c b/ports/zephyr/machine_wdt.c
new file mode 100644
index 0000000000000..7c5e6337ca33a
--- /dev/null
+++ b/ports/zephyr/machine_wdt.c
@@ -0,0 +1,92 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2025 Daniel Campora on behalf of REMOTE TECH LTD
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+// This file is never compiled standalone, it's included directly from
+// extmod/machine_wdt.c via MICROPY_PY_MACHINE_WDT_INCLUDEFILE.
+
+#include <zephyr/kernel.h>
+#include <zephyr/device.h>
+#include <zephyr/drivers/watchdog.h>
+#include <zephyr/sys/printk.h>
+#include <stdbool.h>
+
+#include "py/mperrno.h"
+
+typedef struct _machine_wdt_obj_t {
+    mp_obj_base_t base;
+    struct device *wdt;
+    int32_t channel_id;
+} machine_wdt_obj_t;
+
+static machine_wdt_obj_t wdt_default = {
+    {&machine_wdt_type}, NULL, -1
+};
+
+static machine_wdt_obj_t *mp_machine_wdt_make_new_instance(mp_int_t id, mp_int_t timeout_ms) {
+    if (id != 0) {
+        mp_raise_ValueError(MP_ERROR_TEXT("invalid WDT id"));
+    }
+
+    if (timeout_ms <= 0) {
+        mp_raise_ValueError(MP_ERROR_TEXT("watchdog timeout too short"));
+    }
+
+    wdt_default.wdt = (struct device *)DEVICE_DT_GET(DT_ALIAS(watchdog0));
+
+    if (!device_is_ready(wdt_default.wdt)) {
+        mp_raise_OSError(MP_ENODEV);
+    }
+
+    struct wdt_timeout_cfg wdt_config = {
+        /* Reset SoC when watchdog timer expires. */
+        .flags = WDT_FLAG_RESET_SOC,
+
+        /* Expire watchdog after max window */
+        .window.min = 0,
+        .window.max = timeout_ms,
+    };
+
+    wdt_default.channel_id = wdt_install_timeout(wdt_default.wdt, &wdt_config);
+
+    if (wdt_default.channel_id < 0) {
+        mp_raise_OSError(-wdt_default.channel_id);
+    }
+
+    mp_int_t rs_code = wdt_setup(wdt_default.wdt, WDT_OPT_PAUSE_IN_SLEEP | WDT_OPT_PAUSE_HALTED_BY_DBG);
+
+    if (rs_code < 0) {
+        mp_raise_OSError(-rs_code);
+    }
+
+    return &wdt_default;
+}
+
+static void mp_machine_wdt_feed(machine_wdt_obj_t *self) {
+    mp_int_t rs_code = wdt_feed(self->wdt, self->channel_id);
+    if (rs_code < 0) {
+        mp_raise_OSError(-rs_code);
+    }
+}
diff --git a/ports/zephyr/main.c b/ports/zephyr/main.c
index 9fae2b3a873e5..45af7b0c72c40 100644
--- a/ports/zephyr/main.c
+++ b/ports/zephyr/main.c
@@ -30,6 +30,7 @@
 #include <string.h>
 
 #include <zephyr/kernel.h>
+#include <zephyr/version.h>
 #ifdef CONFIG_NETWORKING
 #include <zephyr/net/net_context.h>
 #endif
@@ -62,6 +63,10 @@
 
 static char heap[MICROPY_HEAP_SIZE];
 
+#if defined(CONFIG_USB_DEVICE_STACK_NEXT)
+extern int mp_usbd_init(void);
+#endif // defined(CONFIG_USB_DEVICE_STACK_NEXT)
+
 void init_zephyr(void) {
     // We now rely on CONFIG_NET_APP_SETTINGS to set up bootstrap
     // network addresses.
@@ -97,7 +102,11 @@ static void vfs_init(void) {
     int ret = 0;
 
     #ifdef CONFIG_DISK_DRIVER_SDMMC
+    #if KERNEL_VERSION_NUMBER >= ZEPHYR_VERSION(4, 0, 0)
+    mp_obj_t args[] = { mp_obj_new_str_from_cstr(DT_PROP(DT_INST(0, zephyr_sdmmc_disk), disk_name)) };
+    #else
     mp_obj_t args[] = { mp_obj_new_str_from_cstr(CONFIG_SDMMC_VOLUME_NAME) };
+    #endif
     bdev = MP_OBJ_TYPE_GET_SLOT(&zephyr_disk_access_type, make_new)(&zephyr_disk_access_type, ARRAY_SIZE(args), 0, args);
     mount_point_str = "/sd";
     #elif defined(CONFIG_FLASH_MAP) && FIXED_PARTITION_EXISTS(storage_partition)
@@ -138,6 +147,10 @@ int real_main(void) {
     usb_enable(NULL);
     #endif
 
+    #ifdef CONFIG_USB_DEVICE_STACK_NEXT
+    mp_usbd_init();
+    #endif
+
     #if MICROPY_VFS
     vfs_init();
     #endif
@@ -206,7 +219,7 @@ mp_obj_t mp_builtin_open(size_t n_args, const mp_obj_t *args, mp_map_t *kwargs)
 MP_DEFINE_CONST_FUN_OBJ_KW(mp_builtin_open_obj, 1, mp_builtin_open);
 #endif
 
-NORETURN void nlr_jump_fail(void *val) {
+MP_NORETURN void nlr_jump_fail(void *val) {
     while (1) {
         ;
     }
diff --git a/ports/zephyr/modbluetooth_zephyr.c b/ports/zephyr/modbluetooth_zephyr.c
index 8947bdf53567d..c1b8ddfd8b404 100644
--- a/ports/zephyr/modbluetooth_zephyr.c
+++ b/ports/zephyr/modbluetooth_zephyr.c
@@ -31,8 +31,12 @@
 
 #if MICROPY_PY_BLUETOOTH
 
+#include <zephyr/types.h>
 #include <zephyr/bluetooth/bluetooth.h>
 #include <zephyr/bluetooth/hci.h>
+#include <zephyr/bluetooth/conn.h>
+#include <zephyr/bluetooth/uuid.h>
+#include <zephyr/bluetooth/gatt.h>
 #include "extmod/modbluetooth.h"
 
 #define DEBUG_printf(...) // printk("BLE: " __VA_ARGS__)
@@ -44,6 +48,23 @@
 
 #define ERRNO_BLUETOOTH_NOT_ACTIVE MP_ENODEV
 
+#define MP_BLUETOOTH_ZEPHYR_MAX_SERVICES            (8)
+
+/* This masks Permission bits from GATT API */
+#define GATT_PERM_MASK  (BT_GATT_PERM_READ | \
+    BT_GATT_PERM_READ_AUTHEN | \
+    BT_GATT_PERM_READ_ENCRYPT | \
+    BT_GATT_PERM_WRITE | \
+    BT_GATT_PERM_WRITE_AUTHEN | \
+    BT_GATT_PERM_WRITE_ENCRYPT | \
+    BT_GATT_PERM_PREPARE_WRITE)
+
+#define GATT_PERM_ENC_READ_MASK     (BT_GATT_PERM_READ_ENCRYPT | \
+    BT_GATT_PERM_READ_AUTHEN)
+
+#define GATT_PERM_ENC_WRITE_MASK    (BT_GATT_PERM_WRITE_ENCRYPT | \
+    BT_GATT_PERM_WRITE_AUTHEN)
+
 enum {
     MP_BLUETOOTH_ZEPHYR_BLE_STATE_OFF,
     MP_BLUETOOTH_ZEPHYR_BLE_STATE_ACTIVE,
@@ -56,9 +77,42 @@ enum {
     MP_BLUETOOTH_ZEPHYR_GAP_SCAN_STATE_ACTIVE,
 };
 
+union uuid_u {
+    struct bt_uuid uuid;
+    struct bt_uuid_16 u16;
+    struct bt_uuid_32 u32;
+    struct bt_uuid_128 u128;
+};
+
+struct add_characteristic {
+    uint8_t properties;
+    uint8_t permissions;
+    const struct bt_uuid *uuid;
+};
+
+struct add_descriptor {
+    uint8_t permissions;
+    const struct bt_uuid *uuid;
+};
+
+typedef struct _mp_bt_zephyr_conn_t {
+    struct bt_conn *conn;
+    struct _mp_bt_zephyr_conn_t *next;
+} mp_bt_zephyr_conn_t;
+
 typedef struct _mp_bluetooth_zephyr_root_pointers_t {
+    // list of objects to be tracked by the gc
+    mp_obj_t objs_list;
+
     // Characteristic (and descriptor) value storage.
     mp_gatts_db_t gatts_db;
+
+    // Service definitions.
+    size_t n_services;
+    struct bt_gatt_service *services[MP_BLUETOOTH_ZEPHYR_MAX_SERVICES];
+
+    // active connections
+    mp_bt_zephyr_conn_t *connections;
 } mp_bluetooth_zephyr_root_pointers_t;
 
 static int mp_bluetooth_zephyr_ble_state;
@@ -69,6 +123,98 @@ static struct k_timer mp_bluetooth_zephyr_gap_scan_timer;
 static struct bt_le_scan_cb mp_bluetooth_zephyr_gap_scan_cb_struct;
 #endif
 
+static struct bt_data bt_ad_data[8];
+static size_t bt_ad_len = 0;
+static struct bt_data bt_sd_data[8];
+static size_t bt_sd_len = 0;
+
+static mp_bt_zephyr_conn_t *mp_bt_zephyr_next_conn;
+
+static mp_bt_zephyr_conn_t *mp_bt_zephyr_find_connection(uint8_t conn_handle);
+static void mp_bt_zephyr_insert_connection(mp_bt_zephyr_conn_t *connection);
+static void mp_bt_zephyr_remove_connection(uint8_t conn_handle);
+static void mp_bt_zephyr_connected(struct bt_conn *connected, uint8_t err);
+static void mp_bt_zephyr_disconnected(struct bt_conn *disconn, uint8_t reason);
+static struct bt_uuid *create_zephyr_uuid(const mp_obj_bluetooth_uuid_t *uuid);
+static void gatt_db_add(const struct bt_gatt_attr *pattern, struct bt_gatt_attr *attr, size_t user_data_len);
+static void add_service(const struct bt_uuid *u, struct bt_gatt_attr *attr);
+static void add_characteristic(struct add_characteristic *ch, struct bt_gatt_attr *attr_chrc, struct bt_gatt_attr *attr_value);
+static void add_ccc(struct bt_gatt_attr *attr, struct bt_gatt_attr *attr_desc);
+static void add_cep(const struct bt_gatt_attr *attr_chrc, struct bt_gatt_attr *attr_desc);
+static void add_descriptor(struct bt_gatt_attr *chrc, struct add_descriptor *d, struct bt_gatt_attr *attr_desc);
+static void mp_bt_zephyr_gatt_indicate_done(struct bt_conn *conn, struct bt_gatt_indicate_params *params, uint8_t err);
+static struct bt_gatt_attr *mp_bt_zephyr_find_attr_by_handle(uint16_t value_handle);
+
+static struct bt_conn_cb mp_bt_zephyr_conn_callbacks = {
+    .connected = mp_bt_zephyr_connected,
+    .disconnected = mp_bt_zephyr_disconnected,
+};
+
+static mp_bt_zephyr_conn_t *mp_bt_zephyr_find_connection(uint8_t conn_handle) {
+    struct bt_conn_info info;
+    for (mp_bt_zephyr_conn_t *connection = MP_STATE_PORT(bluetooth_zephyr_root_pointers)->connections; connection != NULL; connection = connection->next) {
+        if (connection->conn) {
+            bt_conn_get_info(connection->conn, &info);
+            if (info.id == conn_handle) {
+                return connection;
+            }
+        }
+    }
+    return NULL;
+}
+
+static void mp_bt_zephyr_insert_connection(mp_bt_zephyr_conn_t *connection) {
+    connection->next = MP_STATE_PORT(bluetooth_zephyr_root_pointers)->connections;
+    MP_STATE_PORT(bluetooth_zephyr_root_pointers)->connections = connection;
+}
+
+static void mp_bt_zephyr_remove_connection(uint8_t conn_handle) {
+    struct bt_conn_info info;
+    mp_bt_zephyr_conn_t *prev = NULL;
+    for (mp_bt_zephyr_conn_t *connection = MP_STATE_PORT(bluetooth_zephyr_root_pointers)->connections; connection != NULL; connection = connection->next) {
+        if (connection->conn) {
+            bt_conn_get_info(connection->conn, &info);
+            if (info.id == conn_handle) {
+                // unlink this item and the gc will eventually collect it
+                if (prev != NULL) {
+                    prev->next = connection->next;
+                } else {
+                    // move the start pointer
+                    MP_STATE_PORT(bluetooth_zephyr_root_pointers)->connections = connection->next;
+                }
+                break;
+            } else {
+                prev = connection;
+            }
+        }
+    }
+}
+
+static void mp_bt_zephyr_connected(struct bt_conn *conn, uint8_t err) {
+    struct bt_conn_info info;
+    bt_conn_get_info(conn, &info);
+
+    if (err) {
+        uint8_t addr[6] = {0};
+        DEBUG_printf("Connection from central failed (err %u)\n", err);
+        mp_bluetooth_gap_on_connected_disconnected(MP_BLUETOOTH_IRQ_CENTRAL_DISCONNECT, info.id, 0xff, addr);
+    } else {
+        DEBUG_printf("Central connected with id %d\n", info.id);
+        mp_bt_zephyr_next_conn->conn = bt_conn_ref(conn);
+        mp_bluetooth_gap_on_connected_disconnected(MP_BLUETOOTH_IRQ_CENTRAL_CONNECT, info.id, info.le.dst->type, info.le.dst->a.val);
+        mp_bt_zephyr_insert_connection(mp_bt_zephyr_next_conn);
+    }
+}
+
+static void mp_bt_zephyr_disconnected(struct bt_conn *conn, uint8_t reason) {
+    struct bt_conn_info info;
+    bt_conn_get_info(conn, &info);
+    DEBUG_printf("Central disconnected (id %d reason %u)\n", info.id, reason);
+    bt_conn_unref(conn);
+    mp_bt_zephyr_remove_connection(info.id);
+    mp_bluetooth_gap_on_connected_disconnected(MP_BLUETOOTH_IRQ_CENTRAL_DISCONNECT, info.id, info.le.dst->type, info.le.dst->a.val);
+}
+
 static int bt_err_to_errno(int err) {
     // Zephyr uses errno codes directly, but they are negative.
     return -err;
@@ -128,6 +274,11 @@ int mp_bluetooth_init(void) {
     MP_STATE_PORT(bluetooth_zephyr_root_pointers) = m_new0(mp_bluetooth_zephyr_root_pointers_t, 1);
     mp_bluetooth_gatts_db_create(&MP_STATE_PORT(bluetooth_zephyr_root_pointers)->gatts_db);
 
+    MP_STATE_PORT(bluetooth_zephyr_root_pointers)->connections = NULL;
+    mp_bt_zephyr_next_conn = NULL;
+
+    MP_STATE_PORT(bluetooth_zephyr_root_pointers)->objs_list = mp_obj_new_list(0, NULL);
+
     #if MICROPY_PY_BLUETOOTH_ENABLE_CENTRAL_MODE
     mp_bluetooth_zephyr_gap_scan_state = MP_BLUETOOTH_ZEPHYR_GAP_SCAN_STATE_INACTIVE;
     k_timer_init(&mp_bluetooth_zephyr_gap_scan_timer, gap_scan_cb_timeout, NULL);
@@ -137,6 +288,9 @@ int mp_bluetooth_init(void) {
     #endif
 
     if (mp_bluetooth_zephyr_ble_state == MP_BLUETOOTH_ZEPHYR_BLE_STATE_OFF) {
+
+        bt_conn_cb_register(&mp_bt_zephyr_conn_callbacks);
+
         // bt_enable can only be called once.
         int ret = bt_enable(NULL);
         if (ret) {
@@ -151,15 +305,22 @@ int mp_bluetooth_init(void) {
     return 0;
 }
 
-void mp_bluetooth_deinit(void) {
+int mp_bluetooth_deinit(void) {
     DEBUG_printf("mp_bluetooth_deinit %d\n", mp_bluetooth_zephyr_ble_state);
     if (mp_bluetooth_zephyr_ble_state == MP_BLUETOOTH_ZEPHYR_BLE_STATE_OFF
         || mp_bluetooth_zephyr_ble_state == MP_BLUETOOTH_ZEPHYR_BLE_STATE_SUSPENDED) {
-        return;
+        return 0;
     }
 
     mp_bluetooth_gap_advertise_stop();
 
+    #if CONFIG_BT_GATT_DYNAMIC_DB
+    for (size_t i = 0; i < MP_STATE_PORT(bluetooth_zephyr_root_pointers)->n_services; ++i) {
+        bt_gatt_service_unregister(MP_STATE_PORT(bluetooth_zephyr_root_pointers)->services[i]);
+        MP_STATE_PORT(bluetooth_zephyr_root_pointers)->services[i] = NULL;
+    }
+    #endif
+
     #if MICROPY_PY_BLUETOOTH_ENABLE_CENTRAL_MODE
     mp_bluetooth_gap_scan_stop();
     bt_le_scan_cb_unregister(&mp_bluetooth_zephyr_gap_scan_cb_struct);
@@ -170,6 +331,8 @@ void mp_bluetooth_deinit(void) {
     mp_bluetooth_zephyr_ble_state = MP_BLUETOOTH_ZEPHYR_BLE_STATE_SUSPENDED;
 
     MP_STATE_PORT(bluetooth_zephyr_root_pointers) = NULL;
+    mp_bt_zephyr_next_conn = NULL;
+    return 0;
 }
 
 bool mp_bluetooth_is_active(void) {
@@ -191,7 +354,7 @@ void mp_bluetooth_get_current_address(uint8_t *addr_type, uint8_t *addr) {
 }
 
 void mp_bluetooth_set_address_mode(uint8_t addr_mode) {
-    // TODO: implement
+    mp_raise_OSError(MP_EOPNOTSUPP);
 }
 
 size_t mp_bluetooth_gap_get_device_name(const uint8_t **buf) {
@@ -232,15 +395,11 @@ int mp_bluetooth_gap_advertise_start(bool connectable, int32_t interval_us, cons
 
     mp_bluetooth_gap_advertise_stop();
 
-    struct bt_data bt_ad_data[8];
-    size_t bt_ad_len = 0;
     if (adv_data) {
         bt_ad_len = MP_ARRAY_SIZE(bt_ad_data);
         mp_bluetooth_prepare_bt_data(adv_data, adv_data_len, bt_ad_data, &bt_ad_len);
     }
 
-    struct bt_data bt_sd_data[8];
-    size_t bt_sd_len = 0;
     if (sr_data) {
         bt_sd_len = MP_ARRAY_SIZE(bt_sd_data);
         mp_bluetooth_prepare_bt_data(sr_data, sr_data_len, bt_sd_data, &bt_sd_len);
@@ -259,6 +418,10 @@ int mp_bluetooth_gap_advertise_start(bool connectable, int32_t interval_us, cons
         .peer = NULL,
     };
 
+    // pre-allocate a new connection structure as we cannot allocate this inside the connection callback
+    mp_bt_zephyr_next_conn = m_new0(mp_bt_zephyr_conn_t, 1);
+    mp_obj_list_append(MP_STATE_PORT(bluetooth_zephyr_root_pointers)->objs_list, MP_OBJ_FROM_PTR(mp_bt_zephyr_next_conn));
+
     return bt_err_to_errno(bt_le_adv_start(&param, bt_ad_data, bt_ad_len, bt_sd_data, bt_sd_len));
 }
 
@@ -271,6 +434,8 @@ void mp_bluetooth_gap_advertise_stop(void) {
 }
 
 int mp_bluetooth_gatts_register_service_begin(bool append) {
+    #if CONFIG_BT_GATT_DYNAMIC_DB
+
     if (!mp_bluetooth_is_active()) {
         return ERRNO_BLUETOOTH_NOT_ACTIVE;
     }
@@ -280,25 +445,190 @@ int mp_bluetooth_gatts_register_service_begin(bool append) {
         return MP_EOPNOTSUPP;
     }
 
+    // Unregister and unref any previous service definitions.
+    for (size_t i = 0; i < MP_STATE_PORT(bluetooth_zephyr_root_pointers)->n_services; ++i) {
+        bt_gatt_service_unregister(MP_STATE_PORT(bluetooth_zephyr_root_pointers)->services[i]);
+        MP_STATE_PORT(bluetooth_zephyr_root_pointers)->services[i] = NULL;
+    }
+    MP_STATE_PORT(bluetooth_zephyr_root_pointers)->n_services = 0;
+
     // Reset the gatt characteristic value db.
     mp_bluetooth_gatts_db_reset(MP_STATE_PORT(bluetooth_zephyr_root_pointers)->gatts_db);
+    MP_STATE_PORT(bluetooth_zephyr_root_pointers)->connections = NULL;
+    MP_STATE_PORT(bluetooth_zephyr_root_pointers)->objs_list = mp_obj_new_list(0, NULL);
+    mp_bt_zephyr_next_conn = NULL;
 
+    return 0;
+
+    #else
     return MP_EOPNOTSUPP;
+    #endif
 }
 
 int mp_bluetooth_gatts_register_service_end(void) {
-    return MP_EOPNOTSUPP;
+    return 0;
 }
 
 int mp_bluetooth_gatts_register_service(mp_obj_bluetooth_uuid_t *service_uuid, mp_obj_bluetooth_uuid_t **characteristic_uuids, uint16_t *characteristic_flags, mp_obj_bluetooth_uuid_t **descriptor_uuids, uint16_t *descriptor_flags, uint8_t *num_descriptors, uint16_t *handles, size_t num_characteristics) {
+    #if CONFIG_BT_GATT_DYNAMIC_DB
+    if (MP_STATE_PORT(bluetooth_zephyr_root_pointers)->n_services >= MP_BLUETOOTH_ZEPHYR_MAX_SERVICES) {
+        return MP_E2BIG;
+    }
+
+    // first of all allocate the entire memory for all the attributes that this service is composed of
+    // 1 for the service itself, 2 for each characteristic (the declaration and the value), and one for each descriptor
+    size_t total_descriptors = 0;
+    for (size_t i = 0; i < num_characteristics; ++i) {
+        total_descriptors += num_descriptors[i];
+        // we have to add the CCC manually
+        if (characteristic_flags[i] & (MP_BLUETOOTH_CHARACTERISTIC_FLAG_NOTIFY | MP_BLUETOOTH_CHARACTERISTIC_FLAG_INDICATE)) {
+            total_descriptors += 1;
+        }
+    }
+    size_t total_attributes = 1 + (num_characteristics * 2) + total_descriptors;
+
+    // allocate one extra so that we can know later where the final attribute is
+    struct bt_gatt_attr *svc_attributes = m_new(struct bt_gatt_attr, total_attributes + 1);
+    mp_obj_list_append(MP_STATE_PORT(bluetooth_zephyr_root_pointers)->objs_list, MP_OBJ_FROM_PTR(svc_attributes));
+
+    size_t handle_index = 0;
+    size_t descriptor_index = 0;
+    size_t attr_index = 0;
+    // bitfield of the handles we should ignore, should be more than enough for most applications
+    uint64_t attrs_to_ignore = 0;
+    uint64_t attrs_are_chrs = 0;
+    uint64_t chr_has_ccc = 0;
+
+    add_service(create_zephyr_uuid(service_uuid), &svc_attributes[attr_index]);
+    attr_index += 1;
+
+    for (size_t i = 0; i < num_characteristics; ++i) {
+
+        struct add_characteristic add_char;
+        add_char.uuid = create_zephyr_uuid(characteristic_uuids[i]);
+        add_char.permissions = 0;
+        add_char.properties = 0;
+        if (characteristic_flags[i] & MP_BLUETOOTH_CHARACTERISTIC_FLAG_READ) {
+            add_char.permissions |= BT_GATT_PERM_READ;
+            add_char.properties |= BT_GATT_CHRC_READ;
+        }
+        if (characteristic_flags[i] & MP_BLUETOOTH_CHARACTERISTIC_FLAG_NOTIFY) {
+            add_char.properties |= BT_GATT_CHRC_NOTIFY;
+        }
+        if (characteristic_flags[i] & MP_BLUETOOTH_CHARACTERISTIC_FLAG_INDICATE) {
+            add_char.properties |= BT_GATT_CHRC_INDICATE;
+        }
+        if (characteristic_flags[i] & (MP_BLUETOOTH_CHARACTERISTIC_FLAG_WRITE | MP_BLUETOOTH_CHARACTERISTIC_FLAG_WRITE_NO_RESPONSE)) {
+            add_char.permissions |= BT_GATT_PERM_WRITE;
+            add_char.properties |= (BT_GATT_CHRC_WRITE | BT_GATT_CHRC_WRITE_WITHOUT_RESP);
+        }
+
+        add_characteristic(&add_char, &svc_attributes[attr_index], &svc_attributes[attr_index + 1]);
+
+        struct bt_gatt_attr *curr_char = &svc_attributes[attr_index];
+        attrs_are_chrs |= (1 << attr_index);
+        if (characteristic_flags[i] & (MP_BLUETOOTH_CHARACTERISTIC_FLAG_NOTIFY | MP_BLUETOOTH_CHARACTERISTIC_FLAG_INDICATE)) {
+            chr_has_ccc |= (1 << attr_index);
+        }
+        attr_index += 1;
+        attrs_to_ignore |= (1 << attr_index);   // ignore the value handle
+        attr_index += 1;
+
+        if (num_descriptors[i] > 0) {
+            for (size_t j = 0; j < num_descriptors[i]; ++j) {
+
+                struct add_descriptor add_desc;
+                add_desc.uuid = create_zephyr_uuid(descriptor_uuids[descriptor_index]);
+                add_desc.permissions = 0;
+                if (descriptor_flags[descriptor_index] & MP_BLUETOOTH_CHARACTERISTIC_FLAG_READ) {
+                    add_desc.permissions |= BT_GATT_PERM_READ;
+                }
+                if (descriptor_flags[descriptor_index] & (MP_BLUETOOTH_CHARACTERISTIC_FLAG_WRITE | MP_BLUETOOTH_CHARACTERISTIC_FLAG_WRITE_NO_RESPONSE)) {
+                    add_desc.permissions |= BT_GATT_PERM_WRITE;
+                }
+
+                add_descriptor(curr_char, &add_desc, &svc_attributes[attr_index]);
+                attr_index += 1;
+
+                descriptor_index++;
+            }
+        }
+
+        // to support indications and notifications we must add the CCC descriptor manually
+        if (characteristic_flags[i] & (MP_BLUETOOTH_CHARACTERISTIC_FLAG_NOTIFY | MP_BLUETOOTH_CHARACTERISTIC_FLAG_INDICATE)) {
+            struct add_descriptor add_desc;
+            mp_obj_bluetooth_uuid_t ccc_uuid;
+            ccc_uuid.base.type = &mp_type_bluetooth_uuid;
+            ccc_uuid.data[0] = BT_UUID_GATT_CCC_VAL & 0xff;
+            ccc_uuid.data[1] = (BT_UUID_GATT_CCC_VAL >> 8) & 0xff;
+            ccc_uuid.type = MP_BLUETOOTH_UUID_TYPE_16;
+            add_desc.uuid = create_zephyr_uuid(&ccc_uuid);
+            add_desc.permissions = BT_GATT_PERM_READ | BT_GATT_PERM_WRITE;
+
+            attrs_to_ignore |= (1 << attr_index);
+
+            add_descriptor(curr_char, &add_desc, &svc_attributes[attr_index]);
+            attr_index += 1;
+        }
+    }
+
+    struct bt_gatt_service *service = m_new(struct bt_gatt_service, 1);
+    mp_obj_list_append(MP_STATE_PORT(bluetooth_zephyr_root_pointers)->objs_list, MP_OBJ_FROM_PTR(service));
+    service->attrs = svc_attributes;
+    service->attr_count = attr_index;
+    // invalidate the last attribute uuid pointer so that we new this is the end of attributes for this service
+    svc_attributes[attr_index].uuid = NULL;
+
+    // Note: advertising must be stopped for gatts registration to work
+
+    int err = bt_gatt_service_register(service);
+    if (err) {
+        return bt_err_to_errno(err);
+    }
+
+    // now that the service has been registered, we can assign the handles for the characteristics and the descriptors
+    // we are not interested in the handle of the service itself, so we start the loop from index 1
+    for (int i = 1; i < total_attributes; i++) {
+        // store all the relevant handles (characteristics and descriptors defined in Python)
+        if (!((uint64_t)(attrs_to_ignore >> i) & (uint64_t)0x01)) {
+            if (svc_attributes[i].user_data == NULL) {
+                mp_bluetooth_gatts_db_create_entry(MP_STATE_PORT(bluetooth_zephyr_root_pointers)->gatts_db, svc_attributes[i].handle, MP_BLUETOOTH_DEFAULT_ATTR_LEN);
+                mp_bluetooth_gatts_db_entry_t *entry = mp_bluetooth_gatts_db_lookup(MP_STATE_PORT(bluetooth_zephyr_root_pointers)->gatts_db, svc_attributes[i].handle);
+                svc_attributes[i].user_data = entry->data;
+            } else if (((uint64_t)(attrs_are_chrs >> i) & (uint64_t)0x01)) {
+                if (svc_attributes[i + 1].user_data == NULL) {
+                    mp_bluetooth_gatts_db_create_entry(MP_STATE_PORT(bluetooth_zephyr_root_pointers)->gatts_db, svc_attributes[i].handle, MP_BLUETOOTH_DEFAULT_ATTR_LEN);
+                    mp_bluetooth_gatts_db_entry_t *entry = mp_bluetooth_gatts_db_lookup(MP_STATE_PORT(bluetooth_zephyr_root_pointers)->gatts_db, svc_attributes[i].handle);
+                    svc_attributes[i + 1].user_data = entry->data;
+
+                    if (((uint64_t)(chr_has_ccc >> i) & (uint64_t)0x01)) {
+                        // create another database entry for the ccc of this characteristic
+                        mp_bluetooth_gatts_db_create_entry(MP_STATE_PORT(bluetooth_zephyr_root_pointers)->gatts_db, svc_attributes[i].handle + 2, 1);
+                    }
+                }
+            }
+            handles[handle_index++] = svc_attributes[i].handle;
+        }
+    }
+
+    MP_STATE_PORT(bluetooth_zephyr_root_pointers)->services[MP_STATE_PORT(bluetooth_zephyr_root_pointers)->n_services++] = service;
+
+    return 0;
+
+    #else
     return MP_EOPNOTSUPP;
+    #endif
 }
 
 int mp_bluetooth_gap_disconnect(uint16_t conn_handle) {
     if (!mp_bluetooth_is_active()) {
         return ERRNO_BLUETOOTH_NOT_ACTIVE;
     }
-    return MP_EOPNOTSUPP;
+    mp_bt_zephyr_conn_t *connection = mp_bt_zephyr_find_connection(conn_handle);
+    if (connection) {
+        return bt_conn_disconnect(connection->conn, BT_HCI_ERR_REMOTE_USER_TERM_CONN);
+    }
+    return MP_ENOENT;
 }
 
 int mp_bluetooth_gatts_read(uint16_t value_handle, const uint8_t **value, size_t *value_len) {
@@ -312,24 +642,155 @@ int mp_bluetooth_gatts_write(uint16_t value_handle, const uint8_t *value, size_t
     if (!mp_bluetooth_is_active()) {
         return ERRNO_BLUETOOTH_NOT_ACTIVE;
     }
-    if (send_update) {
-        return MP_EOPNOTSUPP;
+
+    int err = mp_bluetooth_gatts_db_write(MP_STATE_PORT(bluetooth_zephyr_root_pointers)->gatts_db, value_handle, value, value_len);
+
+    if ((err == 0) && send_update) {
+        struct bt_gatt_attr *attr_val = mp_bt_zephyr_find_attr_by_handle(value_handle + 1);
+        mp_bluetooth_gatts_db_entry_t *ccc_entry = mp_bluetooth_gatts_db_lookup(MP_STATE_PORT(bluetooth_zephyr_root_pointers)->gatts_db, value_handle + 2);
+
+        if (ccc_entry && (ccc_entry->data[0] == BT_GATT_CCC_NOTIFY)) {
+            err = bt_gatt_notify(NULL, attr_val, value, value_len);
+        } else if (ccc_entry && (ccc_entry->data[0] == BT_GATT_CCC_INDICATE)) {
+            struct bt_gatt_indicate_params params = {
+                .uuid = NULL,
+                .attr = attr_val,
+                .func = mp_bt_zephyr_gatt_indicate_done,
+                .destroy = NULL,
+                .data = value,
+                .len = value_len
+            };
+            err = bt_gatt_indicate(NULL, &params);
+        }
+    }
+    return err;
+}
+
+static void mp_bt_zephyr_gatt_indicate_done(struct bt_conn *conn, struct bt_gatt_indicate_params *params, uint8_t err) {
+    struct bt_conn_info info;
+    bt_conn_get_info(conn, &info);
+    uint16_t chr_handle = params->attr->handle - 1;
+    mp_bluetooth_gatts_on_indicate_complete(info.id, chr_handle, err);
+}
+
+static ssize_t mp_bt_zephyr_gatts_attr_read(struct bt_conn *conn, const struct bt_gatt_attr *attr, void *buf, uint16_t len, uint16_t offset) {
+    // we receive the value handle, but to look up in the gatts db we need the characteristic handle, and that is is the value handle minus 1
+    uint16_t _handle = attr->handle - 1;
+
+    DEBUG_printf("BLE attr read for handle %d\n", attr->handle);
+
+    mp_bluetooth_gatts_db_entry_t *entry = mp_bluetooth_gatts_db_lookup(MP_STATE_PORT(bluetooth_zephyr_root_pointers)->gatts_db, _handle);
+    if (!entry) {
+        // it could be a descriptor instead
+        _handle = attr->handle;
+        entry = mp_bluetooth_gatts_db_lookup(MP_STATE_PORT(bluetooth_zephyr_root_pointers)->gatts_db, _handle);
+        if (!entry) {
+            return BT_GATT_ERR(BT_ATT_ERR_INVALID_HANDLE);
+        }
+    }
+
+    return bt_gatt_attr_read(conn, attr, buf, len, offset, entry->data, entry->data_len);
+}
+
+static ssize_t mp_bt_zephyr_gatts_attr_write(struct bt_conn *conn, const struct bt_gatt_attr *attr, const void *buf, uint16_t len, uint16_t offset, uint8_t flags) {
+    struct bt_conn_info info;
+    bt_conn_get_info(conn, &info);
+
+    DEBUG_printf("BLE attr write for handle %d\n", attr->handle);
+
+    // the characteristic handle is the value handle minus 1
+    uint16_t _handle = attr->handle - 1;
+
+    mp_bluetooth_gatts_db_entry_t *entry = mp_bluetooth_gatts_db_lookup(MP_STATE_PORT(bluetooth_zephyr_root_pointers)->gatts_db, _handle);
+    if (!entry) {
+        // it could be a descriptor instead
+        _handle = attr->handle;
+        entry = mp_bluetooth_gatts_db_lookup(MP_STATE_PORT(bluetooth_zephyr_root_pointers)->gatts_db, _handle);
+        if (!entry) {
+            return BT_GATT_ERR(BT_ATT_ERR_INVALID_HANDLE);
+        }
+    }
+
+    // Don't write anything if prepare flag is set
+    if (flags & BT_GATT_WRITE_FLAG_PREPARE) {
+        return 0;
+    }
+
+    if (offset > entry->data_alloc) {
+        return BT_GATT_ERR(BT_ATT_ERR_INVALID_OFFSET);
+    }
+
+    if ((offset + len) > entry->data_alloc) {
+        return BT_GATT_ERR(BT_ATT_ERR_INVALID_ATTRIBUTE_LEN);
+    }
+
+    if (entry->append) {
+        offset = entry->data_len;
+    }
+
+    // copy the data into the buffer in the gatts database
+    memcpy(&entry->data[offset], buf, len);
+    entry->data_len = offset + len;
+
+    mp_bluetooth_gatts_on_write(info.id, _handle);
+
+    return len;
+}
+
+static struct bt_gatt_attr *mp_bt_zephyr_find_attr_by_handle(uint16_t value_handle) {
+    for (int i = 0; i < MP_STATE_PORT(bluetooth_zephyr_root_pointers)->n_services; i++) {
+        int j = 0;
+        while (MP_STATE_PORT(bluetooth_zephyr_root_pointers)->services[i]->attrs[j].uuid != NULL) {
+            if (MP_STATE_PORT(bluetooth_zephyr_root_pointers)->services[i]->attrs[j].handle == value_handle) {
+                return &MP_STATE_PORT(bluetooth_zephyr_root_pointers)->services[i]->attrs[j];
+            }
+            j++;
+        }
     }
-    return mp_bluetooth_gatts_db_write(MP_STATE_PORT(bluetooth_zephyr_root_pointers)->gatts_db, value_handle, value, value_len);
+    return NULL;
 }
 
 int mp_bluetooth_gatts_notify_indicate(uint16_t conn_handle, uint16_t value_handle, int gatts_op, const uint8_t *value, size_t value_len) {
     if (!mp_bluetooth_is_active()) {
         return ERRNO_BLUETOOTH_NOT_ACTIVE;
     }
-    return MP_EOPNOTSUPP;
+
+    int err = MP_ENOENT;
+    mp_bt_zephyr_conn_t *connection = mp_bt_zephyr_find_connection(conn_handle);
+
+    if (connection) {
+        struct bt_gatt_attr *attr_val = mp_bt_zephyr_find_attr_by_handle(value_handle + 1);
+
+        if (attr_val) {
+            switch (gatts_op) {
+                case MP_BLUETOOTH_GATTS_OP_NOTIFY: {
+                    err = bt_gatt_notify(connection->conn, attr_val, value, value_len);
+                    break;
+                }
+                case MP_BLUETOOTH_GATTS_OP_INDICATE: {
+                    struct bt_gatt_indicate_params params = {
+                        .uuid = NULL,
+                        .attr = attr_val,
+                        .func = mp_bt_zephyr_gatt_indicate_done,
+                        .destroy = NULL,
+                        .data = value,
+                        .len = value_len
+                    };
+                    err = bt_gatt_indicate(connection->conn, &params);
+                    break;
+                }
+            }
+        }
+    }
+
+    return err;
 }
 
 int mp_bluetooth_gatts_set_buffer(uint16_t value_handle, size_t len, bool append) {
     if (!mp_bluetooth_is_active()) {
         return ERRNO_BLUETOOTH_NOT_ACTIVE;
     }
-    return MP_EOPNOTSUPP;
+    return mp_bluetooth_gatts_db_resize(MP_STATE_PORT(bluetooth_zephyr_root_pointers)->gatts_db, value_handle, len, append);
 }
 
 int mp_bluetooth_get_preferred_mtu(void) {
@@ -404,6 +865,133 @@ int mp_bluetooth_gap_peripheral_connect_cancel(void) {
 
 #endif // MICROPY_PY_BLUETOOTH_ENABLE_CENTRAL_MODE
 
+// Note: modbluetooth UUIDs store their data in LE.
+static struct bt_uuid *create_zephyr_uuid(const mp_obj_bluetooth_uuid_t *uuid) {
+    struct bt_uuid *result = (struct bt_uuid *)m_new(union uuid_u, 1);
+    mp_obj_list_append(MP_STATE_PORT(bluetooth_zephyr_root_pointers)->objs_list, MP_OBJ_FROM_PTR(result));
+    if (uuid->type == MP_BLUETOOTH_UUID_TYPE_16) {
+        bt_uuid_create(result, uuid->data, 2);
+    } else if (uuid->type == MP_BLUETOOTH_UUID_TYPE_32) {
+        bt_uuid_create(result, uuid->data, 4);
+    } else {    //  MP_BLUETOOTH_UUID_TYPE_128
+        bt_uuid_create(result, uuid->data, 16);
+    }
+    return result;
+}
+
+static void gatt_db_add(const struct bt_gatt_attr *pattern, struct bt_gatt_attr *attr, size_t user_data_len) {
+    const union uuid_u *u = CONTAINER_OF(pattern->uuid, union uuid_u, uuid);
+    size_t uuid_size = sizeof(u->u16);
+
+    if (u->uuid.type == BT_UUID_TYPE_32) {
+        uuid_size = sizeof(u->u32);
+    } else if (u->uuid.type == BT_UUID_TYPE_128) {
+        uuid_size = sizeof(u->u128);
+    }
+
+    memcpy(attr, pattern, sizeof(*attr));
+
+    // Store the UUID.
+    attr->uuid = (const struct bt_uuid *)m_new(union uuid_u, 1);
+    mp_obj_list_append(MP_STATE_PORT(bluetooth_zephyr_root_pointers)->objs_list, MP_OBJ_FROM_PTR(attr->uuid));
+    memcpy((void *)attr->uuid, &u->uuid, uuid_size);
+
+    // Copy user_data to the buffer.
+    if (user_data_len) {
+        attr->user_data = m_new(uint8_t, user_data_len);
+        mp_obj_list_append(MP_STATE_PORT(bluetooth_zephyr_root_pointers)->objs_list, MP_OBJ_FROM_PTR(attr->user_data));
+        memcpy(attr->user_data, pattern->user_data, user_data_len);
+    }
+}
+
+static void add_service(const struct bt_uuid *u, struct bt_gatt_attr *attr) {
+    union uuid_u *uuid = (union uuid_u *)u;
+
+    size_t uuid_size = sizeof(uuid->u16);
+
+    if (uuid->uuid.type == BT_UUID_TYPE_32) {
+        uuid_size = sizeof(uuid->u32);
+    } else if (uuid->uuid.type == BT_UUID_TYPE_128) {
+        uuid_size = sizeof(uuid->u128);
+    }
+
+    gatt_db_add(&(struct bt_gatt_attr)BT_GATT_PRIMARY_SERVICE(&uuid->uuid), attr, uuid_size);
+}
+
+static void add_characteristic(struct add_characteristic *ch, struct bt_gatt_attr *attr_chrc, struct bt_gatt_attr *attr_value) {
+    struct bt_gatt_chrc *chrc_data;
+
+    // Add Characteristic Declaration
+    gatt_db_add(&(struct bt_gatt_attr)
+        BT_GATT_ATTRIBUTE(BT_UUID_GATT_CHRC,
+            BT_GATT_PERM_READ,
+            bt_gatt_attr_read_chrc, NULL,
+            (&(struct bt_gatt_chrc) {})), attr_chrc, sizeof(*chrc_data));
+
+    // Allow prepare writes
+    ch->permissions |= BT_GATT_PERM_PREPARE_WRITE;
+
+    // Add Characteristic Value
+    gatt_db_add(&(struct bt_gatt_attr)
+        BT_GATT_ATTRIBUTE(ch->uuid,
+            ch->permissions & GATT_PERM_MASK,
+            mp_bt_zephyr_gatts_attr_read, mp_bt_zephyr_gatts_attr_write, NULL), attr_value, 0);
+
+    chrc_data = attr_chrc->user_data;
+    chrc_data->properties = ch->properties;
+    chrc_data->uuid = attr_value->uuid;
+}
+
+static void ccc_cfg_changed(const struct bt_gatt_attr *attr, uint16_t value) {
+    mp_bluetooth_gatts_db_entry_t *entry = mp_bluetooth_gatts_db_lookup(MP_STATE_PORT(bluetooth_zephyr_root_pointers)->gatts_db, attr->handle);
+    entry->data[0] = value;
+}
+
+static struct bt_gatt_attr ccc_definition = BT_GATT_CCC(ccc_cfg_changed, BT_GATT_PERM_READ | BT_GATT_PERM_WRITE);
+
+static void add_ccc(struct bt_gatt_attr *attr, struct bt_gatt_attr *attr_desc) {
+    struct bt_gatt_chrc *chrc = attr->user_data;
+
+    // Check characteristic properties
+    if (!(chrc->properties & (BT_GATT_CHRC_NOTIFY | BT_GATT_CHRC_INDICATE))) {
+        mp_raise_OSError(MP_EINVAL);
+    }
+
+    // Add CCC descriptor to GATT database
+    gatt_db_add(&ccc_definition, attr_desc, 0);
+}
+
+static void add_cep(const struct bt_gatt_attr *attr_chrc, struct bt_gatt_attr *attr_desc) {
+    struct bt_gatt_chrc *chrc = attr_chrc->user_data;
+    struct bt_gatt_cep cep_value;
+
+    // Extended Properties bit shall be set
+    if (!(chrc->properties & BT_GATT_CHRC_EXT_PROP)) {
+        mp_raise_OSError(MP_EINVAL);
+    }
+
+    cep_value.properties = 0x0000;
+
+    // Add CEP descriptor to GATT database
+    gatt_db_add(&(struct bt_gatt_attr)BT_GATT_CEP(&cep_value), attr_desc, sizeof(cep_value));
+}
+
+static void add_descriptor(struct bt_gatt_attr *chrc, struct add_descriptor *d, struct bt_gatt_attr *attr_desc) {
+    if (!bt_uuid_cmp(d->uuid, BT_UUID_GATT_CEP)) {
+        add_cep(chrc, attr_desc);
+    } else if (!bt_uuid_cmp(d->uuid, BT_UUID_GATT_CCC)) {
+        add_ccc(chrc, attr_desc);
+    } else {
+        // Allow prepare writes
+        d->permissions |= BT_GATT_PERM_PREPARE_WRITE;
+
+        gatt_db_add(&(struct bt_gatt_attr)
+            BT_GATT_DESCRIPTOR(d->uuid,
+                d->permissions & GATT_PERM_MASK,
+                mp_bt_zephyr_gatts_attr_read, mp_bt_zephyr_gatts_attr_write, NULL), attr_desc, 0);
+    }
+}
+
 MP_REGISTER_ROOT_POINTER(struct _mp_bluetooth_zephyr_root_pointers_t *bluetooth_zephyr_root_pointers);
 
 #endif // MICROPY_PY_BLUETOOTH
diff --git a/ports/zephyr/modmachine.c b/ports/zephyr/modmachine.c
index bbb9280a5dcb9..89ad12f185daa 100644
--- a/ports/zephyr/modmachine.c
+++ b/ports/zephyr/modmachine.c
@@ -44,6 +44,7 @@
     MICROPY_PY_MACHINE_RESET_ENTRY \
     { MP_ROM_QSTR(MP_QSTR_reset_cause), MP_ROM_PTR(&machine_reset_cause_obj) }, \
     { MP_ROM_QSTR(MP_QSTR_Pin), MP_ROM_PTR(&machine_pin_type) }, \
+    { MP_ROM_QSTR(MP_QSTR_Timer), MP_ROM_PTR(&machine_timer_type) }, \
 
 static mp_obj_t machine_reset(void) {
     sys_reboot(SYS_REBOOT_COLD);
diff --git a/ports/zephyr/modzephyr.c b/ports/zephyr/modzephyr.c
index c059c7e395796..08fdf5c5aa44d 100644
--- a/ports/zephyr/modzephyr.c
+++ b/ports/zephyr/modzephyr.c
@@ -30,6 +30,7 @@
 
 #include <stdio.h>
 #include <zephyr/kernel.h>
+#include <zephyr/version.h>
 #include <zephyr/debug/thread_analyzer.h>
 #include <zephyr/shell/shell.h>
 #include <zephyr/shell/shell_uart.h>
@@ -48,11 +49,16 @@ static mp_obj_t mod_current_tid(void) {
 static MP_DEFINE_CONST_FUN_OBJ_0(mod_current_tid_obj, mod_current_tid);
 
 #ifdef CONFIG_THREAD_ANALYZER
-static mp_obj_t mod_thread_analyze(void) {
+static mp_obj_t mod_thread_analyze(mp_obj_t cpu_in) {
+    #if KERNEL_VERSION_NUMBER >= ZEPHYR_VERSION(4, 0, 0)
+    unsigned int cpu = mp_obj_get_int(cpu_in);
+    thread_analyzer_print(cpu);
+    #else
     thread_analyzer_print();
+    #endif
     return mp_const_none;
 }
-static MP_DEFINE_CONST_FUN_OBJ_0(mod_thread_analyze_obj, mod_thread_analyze);
+static MP_DEFINE_CONST_FUN_OBJ_1(mod_thread_analyze_obj, mod_thread_analyze);
 #endif
 
 #ifdef CONFIG_SHELL_BACKEND_SERIAL
diff --git a/ports/zephyr/mpconfigport.h b/ports/zephyr/mpconfigport.h
index a2e74e6928984..3a6e93486228a 100644
--- a/ports/zephyr/mpconfigport.h
+++ b/ports/zephyr/mpconfigport.h
@@ -68,6 +68,12 @@
 #define MICROPY_PY_MACHINE_PIN_MAKE_NEW mp_pin_make_new
 #define MICROPY_PY_MACHINE_UART     (1)
 #define MICROPY_PY_MACHINE_UART_INCLUDEFILE "ports/zephyr/machine_uart.c"
+#ifdef CONFIG_WATCHDOG
+#define MICROPY_PY_MACHINE_WDT      (1)
+#define MICROPY_PY_MACHINE_WDT_INCLUDEFILE  "ports/zephyr/machine_wdt.c"
+#endif
+#define MICROPY_PY_MACHINE_PWM      (1)
+#define MICROPY_PY_MACHINE_PWM_INCLUDEFILE "ports/zephyr/machine_pwm.c"
 #define MICROPY_PY_STRUCT           (0)
 #ifdef CONFIG_NETWORKING
 // If we have networking, we likely want errno comfort
@@ -133,8 +139,8 @@ void mp_hal_signal_event(void);
 #define MICROPY_HW_MCU_NAME "unknown-cpu"
 #endif
 
-typedef int mp_int_t; // must be pointer size
-typedef unsigned mp_uint_t; // must be pointer size
+typedef intptr_t mp_int_t; // must be pointer size
+typedef uintptr_t mp_uint_t; // must be pointer size
 typedef long mp_off_t;
 
 #define MP_STATE_PORT MP_STATE_VM
diff --git a/ports/zephyr/prj.conf b/ports/zephyr/prj.conf
index eac04216c7fac..0325cddd206c4 100644
--- a/ports/zephyr/prj.conf
+++ b/ports/zephyr/prj.conf
@@ -29,7 +29,6 @@ CONFIG_NET_IPV6=y
 CONFIG_NET_UDP=y
 CONFIG_NET_TCP=y
 CONFIG_NET_SOCKETS=y
-CONFIG_NET_SOCKETS_POSIX_NAMES=n
 CONFIG_TEST_RANDOM_GENERATOR=y
 
 CONFIG_NET_CONFIG_SETTINGS=y
@@ -79,3 +78,6 @@ CONFIG_NET_BUF_POOL_USAGE=y
 CONFIG_MICROPY_CONFIGFILE="mpconfigport.h"
 CONFIG_MICROPY_VFS_FAT=y
 CONFIG_MICROPY_VFS_LFS2=y
+
+CONFIG_WATCHDOG=y
+CONFIG_WDT_DISABLE_AT_BOOT=y
diff --git a/ports/zephyr/src/usbd.c b/ports/zephyr/src/usbd.c
new file mode 100644
index 0000000000000..2444706cbeaa9
--- /dev/null
+++ b/ports/zephyr/src/usbd.c
@@ -0,0 +1,183 @@
+/*
+* This file is part of the MicroPython project, http://micropython.org/
+*
+* The MIT License (MIT)
+*
+* Copyright (c) 2024-2025 MASSDRIVER EI (massdriver.space)
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+* THE SOFTWARE.
+*/
+#include <stdint.h>
+
+#include <zephyr/device.h>
+#include <zephyr/usb/usbd.h>
+#include <zephyr/usb/bos.h>
+
+#if defined(CONFIG_USB_DEVICE_STACK_NEXT)
+
+#include <zephyr/logging/log.h>
+LOG_MODULE_REGISTER(mp_usbd);
+
+/* By default, do not register the USB DFU class DFU mode instance. */
+static const char *const blocklist[] = {
+    "dfu_dfu",
+    NULL,
+};
+
+USBD_DEVICE_DEFINE(mp_usbd,
+    DEVICE_DT_GET(DT_NODELABEL(zephyr_udc0)),
+    CONFIG_MICROPY_USB_DEVICE_VID, CONFIG_MICROPY_USB_DEVICE_PID);
+
+USBD_DESC_LANG_DEFINE(mp_lang);
+USBD_DESC_MANUFACTURER_DEFINE(mp_mfr, "Zephyr Project");
+USBD_DESC_PRODUCT_DEFINE(mp_product, "Micropython on Zephyr RTOS");
+USBD_DESC_SERIAL_NUMBER_DEFINE(mp_sn);
+
+USBD_DESC_CONFIG_DEFINE(fs_cfg_desc, "FS Configuration");
+USBD_DESC_CONFIG_DEFINE(hs_cfg_desc, "HS Configuration");
+
+/* not self-powered, no remote wakeup  */
+static const uint8_t attributes = 0;
+
+/* Full speed configuration
+* power = 250 * 2 mA = 500mA
+*/
+USBD_CONFIGURATION_DEFINE(mp_fs_config,
+    attributes,
+    250, &fs_cfg_desc);
+
+/* High speed configuration */
+USBD_CONFIGURATION_DEFINE(mp_hs_config,
+    attributes,
+    250, &hs_cfg_desc);
+
+static void mp_fix_code_triple(struct usbd_context *uds_ctx,
+    const enum usbd_speed speed) {
+    /* Always use class code information from Interface Descriptors */
+    if (IS_ENABLED(CONFIG_USBD_CDC_ACM_CLASS) ||
+        IS_ENABLED(CONFIG_USBD_CDC_ECM_CLASS) ||
+        IS_ENABLED(CONFIG_USBD_CDC_NCM_CLASS) ||
+        IS_ENABLED(CONFIG_USBD_AUDIO2_CLASS)) {
+        /*
+         * Class with multiple interfaces have an Interface
+         * Association Descriptor available, use an appropriate triple
+         * to indicate it.
+         */
+        usbd_device_set_code_triple(uds_ctx, speed,
+            USB_BCC_MISCELLANEOUS, 0x02, 0x01);
+    } else {
+        usbd_device_set_code_triple(uds_ctx, speed, 0, 0, 0);
+    }
+}
+
+struct usbd_context *mp_usbd_init_device(usbd_msg_cb_t msg_cb) {
+    int err;
+
+    err = usbd_add_descriptor(&mp_usbd, &mp_lang);
+    if (err) {
+        LOG_ERR("Failed to initialize language descriptor (%d)", err);
+        return NULL;
+    }
+
+    err = usbd_add_descriptor(&mp_usbd, &mp_mfr);
+    if (err) {
+        LOG_ERR("Failed to initialize manufacturer descriptor (%d)", err);
+        return NULL;
+    }
+
+    err = usbd_add_descriptor(&mp_usbd, &mp_product);
+    if (err) {
+        LOG_ERR("Failed to initialize product descriptor (%d)", err);
+        return NULL;
+    }
+
+    err = usbd_add_descriptor(&mp_usbd, &mp_sn);
+    if (err) {
+        LOG_ERR("Failed to initialize SN descriptor (%d)", err);
+        return NULL;
+    }
+
+    if (usbd_caps_speed(&mp_usbd) == USBD_SPEED_HS) {
+        err = usbd_add_configuration(&mp_usbd, USBD_SPEED_HS,
+            &mp_hs_config);
+        if (err) {
+            LOG_ERR("Failed to add High-Speed configuration");
+            return NULL;
+        }
+
+        err = usbd_register_all_classes(&mp_usbd, USBD_SPEED_HS, 1, blocklist);
+        if (err) {
+            LOG_ERR("Failed to add register classes");
+            return NULL;
+        }
+
+        mp_fix_code_triple(&mp_usbd, USBD_SPEED_HS);
+    }
+
+    err = usbd_add_configuration(&mp_usbd, USBD_SPEED_FS,
+        &mp_fs_config);
+    if (err) {
+        LOG_ERR("Failed to add Full-Speed configuration");
+        return NULL;
+    }
+
+    err = usbd_register_all_classes(&mp_usbd, USBD_SPEED_FS, 1, blocklist);
+    if (err) {
+        LOG_ERR("Failed to add register classes");
+        return NULL;
+    }
+
+    mp_fix_code_triple(&mp_usbd, USBD_SPEED_FS);
+
+    if (msg_cb != NULL) {
+        err = usbd_msg_register_cb(&mp_usbd, msg_cb);
+        if (err) {
+            LOG_ERR("Failed to register message callback");
+            return NULL;
+        }
+    }
+
+    err = usbd_init(&mp_usbd);
+    if (err) {
+        LOG_ERR("Failed to initialize device support");
+        return NULL;
+    }
+
+    return &mp_usbd;
+}
+
+static struct usbd_context *mp_usbd_context;
+
+int mp_usbd_init(void) {
+    int err;
+
+    mp_usbd_context = mp_usbd_init_device(NULL);
+    if (mp_usbd_context == NULL) {
+        return -ENODEV;
+    }
+
+    err = usbd_enable(mp_usbd_context);
+    if (err) {
+        return err;
+    }
+
+    return 0;
+}
+
+#endif // defined(CONFIG_USB_DEVICE_STACK_NEXT)
diff --git a/ports/zephyr/zephyr_storage.c b/ports/zephyr/zephyr_storage.c
index 484feb113017a..40bcef73384cf 100644
--- a/ports/zephyr/zephyr_storage.c
+++ b/ports/zephyr/zephyr_storage.c
@@ -139,6 +139,20 @@ MP_DEFINE_CONST_OBJ_TYPE(
 #endif // CONFIG_DISK_ACCESS
 
 #ifdef CONFIG_FLASH_MAP
+
+#define FLASH_AREA_DEFINE_LABEL(part) CONCAT(MP_QSTR_ID_, DT_STRING_TOKEN(part, label))
+#define FLASH_AREA_DEFINE_NB(part) CONCAT(MP_QSTR_ID_, DT_FIXED_PARTITION_ID(part))
+
+#define FLASH_AREA_DEFINE_GETNAME(part) COND_CODE_1(DT_NODE_HAS_PROP(part, label), \
+    (FLASH_AREA_DEFINE_LABEL(part)), (FLASH_AREA_DEFINE_NB(part)))
+
+#define FLASH_AREA_DEFINE_DEFINE(part) { MP_ROM_QSTR(FLASH_AREA_DEFINE_GETNAME(part)), MP_ROM_INT(DT_FIXED_PARTITION_ID(part)) },
+
+#define FLASH_AREA_DEFINE(part) COND_CODE_1(DT_NODE_HAS_STATUS_OKAY(DT_MTD_FROM_FIXED_PARTITION(part)), \
+    (FLASH_AREA_DEFINE_DEFINE(part)), ())
+
+#define FOREACH_PARTITION(n) DT_FOREACH_CHILD(n, FLASH_AREA_DEFINE)
+
 const mp_obj_type_t zephyr_flash_area_type;
 
 typedef struct _zephyr_flash_area_obj_t {
@@ -244,9 +258,8 @@ static const mp_rom_map_elem_t zephyr_flash_area_locals_dict_table[] = {
     { MP_ROM_QSTR(MP_QSTR_readblocks), MP_ROM_PTR(&zephyr_flash_area_readblocks_obj) },
     { MP_ROM_QSTR(MP_QSTR_writeblocks), MP_ROM_PTR(&zephyr_flash_area_writeblocks_obj) },
     { MP_ROM_QSTR(MP_QSTR_ioctl), MP_ROM_PTR(&zephyr_flash_area_ioctl_obj) },
-    #if FIXED_PARTITION_EXISTS(storage_partition)
-    { MP_ROM_QSTR(MP_QSTR_STORAGE), MP_ROM_INT(FIXED_PARTITION_ID(storage_partition)) },
-    #endif
+    /* Generate list of partition IDs from Zephyr Devicetree */
+    DT_FOREACH_STATUS_OKAY(fixed_partitions, FOREACH_PARTITION)
 };
 static MP_DEFINE_CONST_DICT(zephyr_flash_area_locals_dict, zephyr_flash_area_locals_dict_table);
 
diff --git a/py/argcheck.c b/py/argcheck.c
index 35b116ec0d414..298c19bcfdbc3 100644
--- a/py/argcheck.c
+++ b/py/argcheck.c
@@ -137,12 +137,12 @@ void mp_arg_parse_all_kw_array(size_t n_pos, size_t n_kw, const mp_obj_t *args,
     mp_arg_parse_all(n_pos, args, &kw_args, n_allowed, allowed, out_vals);
 }
 
-NORETURN void mp_arg_error_terse_mismatch(void) {
+MP_NORETURN void mp_arg_error_terse_mismatch(void) {
     mp_raise_TypeError(MP_ERROR_TEXT("argument num/types mismatch"));
 }
 
 #if MICROPY_CPYTHON_COMPAT
-NORETURN void mp_arg_error_unimpl_kw(void) {
+MP_NORETURN void mp_arg_error_unimpl_kw(void) {
     mp_raise_NotImplementedError(MP_ERROR_TEXT("keyword argument(s) not implemented - use normal args instead"));
 }
 #endif
diff --git a/py/asmarm.c b/py/asmarm.c
index 6fa751b32eb7c..d304567882cef 100644
--- a/py/asmarm.c
+++ b/py/asmarm.c
@@ -343,6 +343,12 @@ void asm_arm_ldrh_reg_reg(asm_arm_t *as, uint rd, uint rn) {
     emit_al(as, 0x1d000b0 | (rn << 16) | (rd << 12));
 }
 
+void asm_arm_ldrh_reg_reg_reg(asm_arm_t *as, uint rd, uint rm, uint rn) {
+    // ldrh doesn't support scaled register index
+    emit_al(as, 0x1a00080 | (ASM_ARM_REG_R8 << 12) | rn); // mov r8, rn, lsl #1
+    emit_al(as, 0x19000b0 | (rm << 16) | (rd << 12) | ASM_ARM_REG_R8); // ldrh rd, [rm, r8];
+}
+
 void asm_arm_ldrh_reg_reg_offset(asm_arm_t *as, uint rd, uint rn, uint byte_offset) {
     if (byte_offset < 0x100) {
         // ldrh rd, [rn, #off]
@@ -360,6 +366,16 @@ void asm_arm_ldrb_reg_reg(asm_arm_t *as, uint rd, uint rn) {
     emit_al(as, 0x5d00000 | (rn << 16) | (rd << 12));
 }
 
+void asm_arm_ldrb_reg_reg_reg(asm_arm_t *as, uint rd, uint rm, uint rn) {
+    // ldrb rd, [rm, rn]
+    emit_al(as, 0x7d00000 | (rm << 16) | (rd << 12) | rn);
+}
+
+void asm_arm_ldr_reg_reg_reg(asm_arm_t *as, uint rd, uint rm, uint rn) {
+    // ldr rd, [rm, rn, lsl #2]
+    emit_al(as, 0x7900100 | (rm << 16) | (rd << 12) | rn);
+}
+
 void asm_arm_str_reg_reg(asm_arm_t *as, uint rd, uint rm, uint byte_offset) {
     // str rd, [rm, #off]
     emit_al(as, 0x5800000 | (rm << 16) | (rd << 12) | byte_offset);
diff --git a/py/asmarm.h b/py/asmarm.h
index 4a4253aef6878..42fa1ea212a8a 100644
--- a/py/asmarm.h
+++ b/py/asmarm.h
@@ -116,6 +116,12 @@ void asm_arm_ldrb_reg_reg(asm_arm_t *as, uint rd, uint rn);
 void asm_arm_str_reg_reg(asm_arm_t *as, uint rd, uint rm, uint byte_offset);
 void asm_arm_strh_reg_reg(asm_arm_t *as, uint rd, uint rm);
 void asm_arm_strb_reg_reg(asm_arm_t *as, uint rd, uint rm);
+
+// load from array
+void asm_arm_ldr_reg_reg_reg(asm_arm_t *as, uint rd, uint rm, uint rn);
+void asm_arm_ldrh_reg_reg_reg(asm_arm_t *as, uint rd, uint rm, uint rn);
+void asm_arm_ldrb_reg_reg_reg(asm_arm_t *as, uint rd, uint rm, uint rn);
+
 // store to array
 void asm_arm_str_reg_reg_reg(asm_arm_t *as, uint rd, uint rm, uint rn);
 void asm_arm_strh_reg_reg_reg(asm_arm_t *as, uint rd, uint rm, uint rn);
@@ -202,19 +208,24 @@ void asm_arm_bx_reg(asm_arm_t *as, uint reg_src);
 #define ASM_SUB_REG_REG(as, reg_dest, reg_src) asm_arm_sub_reg_reg_reg((as), (reg_dest), (reg_dest), (reg_src))
 #define ASM_MUL_REG_REG(as, reg_dest, reg_src) asm_arm_mul_reg_reg_reg((as), (reg_dest), (reg_dest), (reg_src))
 
-#define ASM_LOAD_REG_REG(as, reg_dest, reg_base) asm_arm_ldr_reg_reg((as), (reg_dest), (reg_base), 0)
 #define ASM_LOAD_REG_REG_OFFSET(as, reg_dest, reg_base, word_offset) asm_arm_ldr_reg_reg((as), (reg_dest), (reg_base), 4 * (word_offset))
 #define ASM_LOAD8_REG_REG(as, reg_dest, reg_base) asm_arm_ldrb_reg_reg((as), (reg_dest), (reg_base))
 #define ASM_LOAD16_REG_REG(as, reg_dest, reg_base) asm_arm_ldrh_reg_reg((as), (reg_dest), (reg_base))
 #define ASM_LOAD16_REG_REG_OFFSET(as, reg_dest, reg_base, uint16_offset) asm_arm_ldrh_reg_reg_offset((as), (reg_dest), (reg_base), 2 * (uint16_offset))
 #define ASM_LOAD32_REG_REG(as, reg_dest, reg_base) asm_arm_ldr_reg_reg((as), (reg_dest), (reg_base), 0)
 
-#define ASM_STORE_REG_REG(as, reg_value, reg_base) asm_arm_str_reg_reg((as), (reg_value), (reg_base), 0)
 #define ASM_STORE_REG_REG_OFFSET(as, reg_dest, reg_base, word_offset) asm_arm_str_reg_reg((as), (reg_dest), (reg_base), 4 * (word_offset))
 #define ASM_STORE8_REG_REG(as, reg_value, reg_base) asm_arm_strb_reg_reg((as), (reg_value), (reg_base))
 #define ASM_STORE16_REG_REG(as, reg_value, reg_base) asm_arm_strh_reg_reg((as), (reg_value), (reg_base))
 #define ASM_STORE32_REG_REG(as, reg_value, reg_base) asm_arm_str_reg_reg((as), (reg_value), (reg_base), 0)
 
+#define ASM_LOAD8_REG_REG_REG(as, reg_dest, reg_base, reg_index) asm_arm_ldrb_reg_reg_reg((as), (reg_dest), (reg_base), (reg_index))
+#define ASM_LOAD16_REG_REG_REG(as, reg_dest, reg_base, reg_index) asm_arm_ldrh_reg_reg_reg((as), (reg_dest), (reg_base), (reg_index))
+#define ASM_LOAD32_REG_REG_REG(as, reg_dest, reg_base, reg_index) asm_arm_ldr_reg_reg_reg((as), (reg_dest), (reg_base), (reg_index))
+#define ASM_STORE8_REG_REG_REG(as, reg_val, reg_base, reg_index) asm_arm_strb_reg_reg_reg((as), (reg_val), (reg_base), (reg_index))
+#define ASM_STORE16_REG_REG_REG(as, reg_val, reg_base, reg_index) asm_arm_strh_reg_reg_reg((as), (reg_val), (reg_base), (reg_index))
+#define ASM_STORE32_REG_REG_REG(as, reg_val, reg_base, reg_index) asm_arm_str_reg_reg_reg((as), (reg_val), (reg_base), (reg_index))
+
 #endif // GENERIC_ASM_API
 
 #endif // MICROPY_INCLUDED_PY_ASMARM_H
diff --git a/py/asmrv32.h b/py/asmrv32.h
index b09f48eb12f66..6453b0a3d4367 100644
--- a/py/asmrv32.h
+++ b/py/asmrv32.h
@@ -737,7 +737,6 @@ void asm_rv32_emit_store_reg_reg_offset(asm_rv32_t *state, mp_uint_t source, mp_
 #define ASM_LOAD32_REG_REG(state, rd, rs) ASM_LOAD_REG_REG_OFFSET(state, rd, rs, 0)
 #define ASM_LOAD8_REG_REG(state, rd, rs) asm_rv32_opcode_lbu(state, rd, rs, 0)
 #define ASM_LOAD_REG_REG_OFFSET(state, rd, rs, offset) asm_rv32_emit_load_reg_reg_offset(state, rd, rs, offset)
-#define ASM_LOAD_REG_REG(state, rd, rs) ASM_LOAD32_REG_REG(state, rd, rs)
 #define ASM_LSL_REG_REG(state, rd, rs) asm_rv32_opcode_sll(state, rd, rd, rs)
 #define ASM_LSR_REG_REG(state, rd, rs) asm_rv32_opcode_srl(state, rd, rd, rs)
 #define ASM_MOV_LOCAL_REG(state, local, rs) asm_rv32_emit_mov_local_reg(state, local, rs)
@@ -754,10 +753,33 @@ void asm_rv32_emit_store_reg_reg_offset(asm_rv32_t *state, mp_uint_t source, mp_
 #define ASM_STORE32_REG_REG(state, rs1, rs2) ASM_STORE_REG_REG_OFFSET(state, rs1, rs2, 0)
 #define ASM_STORE8_REG_REG(state, rs1, rs2) asm_rv32_opcode_sb(state, rs1, rs2, 0)
 #define ASM_STORE_REG_REG_OFFSET(state, rd, rs, offset) asm_rv32_emit_store_reg_reg_offset(state, rd, rs, offset)
-#define ASM_STORE_REG_REG(state, rs1, rs2) ASM_STORE32_REG_REG(state, rs1, rs2)
 #define ASM_SUB_REG_REG(state, rd, rs) asm_rv32_opcode_sub(state, rd, rd, rs)
 #define ASM_XOR_REG_REG(state, rd, rs) asm_rv32_emit_optimised_xor(state, rd, rs)
 #define ASM_CLR_REG(state, rd)
+#define ASM_LOAD16_REG_REG_REG(state, rd, rs1, rs2) \
+    do { \
+        asm_rv32_opcode_slli(state, rs2, rs2, 1); \
+        asm_rv32_opcode_cadd(state, rs1, rs2); \
+        asm_rv32_opcode_lhu(state, rd, rs1, 0); \
+    } while (0)
+#define ASM_LOAD32_REG_REG_REG(state, rd, rs1, rs2) \
+    do { \
+        asm_rv32_opcode_slli(state, rs2, rs2, 2); \
+        asm_rv32_opcode_cadd(state, rs1, rs2); \
+        asm_rv32_opcode_lw(state, rd, rs1, 0); \
+    } while (0)
+#define ASM_STORE16_REG_REG_REG(state, rd, rs1, rs2) \
+    do { \
+        asm_rv32_opcode_slli(state, rs2, rs2, 1); \
+        asm_rv32_opcode_cadd(state, rs1, rs2); \
+        asm_rv32_opcode_sh(state, rd, rs1, 0); \
+    } while (0)
+#define ASM_STORE32_REG_REG_REG(state, rd, rs1, rs2) \
+    do { \
+        asm_rv32_opcode_slli(state, rs2, rs2, 2); \
+        asm_rv32_opcode_cadd(state, rs1, rs2); \
+        asm_rv32_opcode_sw(state, rd, rs1, 0); \
+    } while (0)
 
 #endif
 
diff --git a/py/asmthumb.c b/py/asmthumb.c
index 420815e80269a..06021f2bc93cb 100644
--- a/py/asmthumb.c
+++ b/py/asmthumb.c
@@ -450,12 +450,12 @@ static void asm_thumb_add_reg_reg_offset(asm_thumb_t *as, uint reg_dest, uint re
             asm_thumb_lsl_rlo_rlo_i5(as, reg_dest, reg_dest, offset_shift);
             asm_thumb_add_rlo_rlo_rlo(as, reg_dest, reg_dest, reg_base);
         } else if (reg_dest != reg_base) {
-            asm_thumb_mov_rlo_i16(as, reg_dest, offset << offset_shift);
-            asm_thumb_add_rlo_rlo_rlo(as, reg_dest, reg_dest, reg_dest);
+            asm_thumb_mov_reg_i32_optimised(as, reg_dest, offset << offset_shift);
+            asm_thumb_add_rlo_rlo_rlo(as, reg_dest, reg_dest, reg_base);
         } else {
             uint reg_other = reg_dest ^ 7;
             asm_thumb_op16(as, OP_PUSH_RLIST((1 << reg_other)));
-            asm_thumb_mov_rlo_i16(as, reg_other, offset << offset_shift);
+            asm_thumb_mov_reg_i32_optimised(as, reg_other, offset << offset_shift);
             asm_thumb_add_rlo_rlo_rlo(as, reg_dest, reg_dest, reg_other);
             asm_thumb_op16(as, OP_POP_RLIST((1 << reg_other)));
         }
diff --git a/py/asmthumb.h b/py/asmthumb.h
index a9e68d7adbbea..cc4213503bf31 100644
--- a/py/asmthumb.h
+++ b/py/asmthumb.h
@@ -251,6 +251,50 @@ static inline void asm_thumb_bx_reg(asm_thumb_t *as, uint r_src) {
     asm_thumb_format_5(as, ASM_THUMB_FORMAT_5_BX, 0, r_src);
 }
 
+// FORMAT 7: load/store with register offset
+// FORMAT 8: load/store sign-extended byte/halfword
+
+#define ASM_THUMB_FORMAT_7_LDR (0x5800)
+#define ASM_THUMB_FORMAT_7_STR (0x5000)
+#define ASM_THUMB_FORMAT_7_WORD_TRANSFER (0x0000)
+#define ASM_THUMB_FORMAT_7_BYTE_TRANSFER (0x0400)
+#define ASM_THUMB_FORMAT_8_LDRH (0x5A00)
+#define ASM_THUMB_FORMAT_8_STRH (0x5200)
+
+#define ASM_THUMB_FORMAT_7_8_ENCODE(op, rlo_dest, rlo_base, rlo_index) \
+    ((op) | ((rlo_index) << 6) | ((rlo_base) << 3) | ((rlo_dest)))
+
+static inline void asm_thumb_format_7_8(asm_thumb_t *as, uint op, uint rlo_dest, uint rlo_base, uint rlo_index) {
+    assert(rlo_dest < ASM_THUMB_REG_R8);
+    assert(rlo_base < ASM_THUMB_REG_R8);
+    assert(rlo_index < ASM_THUMB_REG_R8);
+    asm_thumb_op16(as, ASM_THUMB_FORMAT_7_8_ENCODE(op, rlo_dest, rlo_base, rlo_index));
+}
+
+static inline void asm_thumb_ldrb_rlo_rlo_rlo(asm_thumb_t *as, uint rlo_dest, uint rlo_base, uint rlo_index) {
+    asm_thumb_format_7_8(as, ASM_THUMB_FORMAT_7_LDR | ASM_THUMB_FORMAT_7_BYTE_TRANSFER, rlo_dest, rlo_base, rlo_index);
+}
+
+static inline void asm_thumb_ldrh_rlo_rlo_rlo(asm_thumb_t *as, uint rlo_dest, uint rlo_base, uint rlo_index) {
+    asm_thumb_format_7_8(as, ASM_THUMB_FORMAT_8_LDRH, rlo_dest, rlo_base, rlo_index);
+}
+
+static inline void asm_thumb_ldr_rlo_rlo_rlo(asm_thumb_t *as, uint rlo_dest, uint rlo_base, uint rlo_index) {
+    asm_thumb_format_7_8(as, ASM_THUMB_FORMAT_7_LDR | ASM_THUMB_FORMAT_7_WORD_TRANSFER, rlo_dest, rlo_base, rlo_index);
+}
+
+static inline void asm_thumb_strb_rlo_rlo_rlo(asm_thumb_t *as, uint rlo_src, uint rlo_base, uint rlo_index) {
+    asm_thumb_format_7_8(as, ASM_THUMB_FORMAT_7_STR | ASM_THUMB_FORMAT_7_BYTE_TRANSFER, rlo_src, rlo_base, rlo_index);
+}
+
+static inline void asm_thumb_strh_rlo_rlo_rlo(asm_thumb_t *as, uint rlo_dest, uint rlo_base, uint rlo_index) {
+    asm_thumb_format_7_8(as, ASM_THUMB_FORMAT_8_STRH, rlo_dest, rlo_base, rlo_index);
+}
+
+static inline void asm_thumb_str_rlo_rlo_rlo(asm_thumb_t *as, uint rlo_src, uint rlo_base, uint rlo_index) {
+    asm_thumb_format_7_8(as, ASM_THUMB_FORMAT_7_STR | ASM_THUMB_FORMAT_7_WORD_TRANSFER, rlo_src, rlo_base, rlo_index);
+}
+
 // FORMAT 9: load/store with immediate offset
 // For word transfers the offset must be aligned, and >>2
 
@@ -418,19 +462,40 @@ void asm_thumb_b_rel12(asm_thumb_t *as, int rel);
 #define ASM_SUB_REG_REG(as, reg_dest, reg_src) asm_thumb_sub_rlo_rlo_rlo((as), (reg_dest), (reg_dest), (reg_src))
 #define ASM_MUL_REG_REG(as, reg_dest, reg_src) asm_thumb_format_4((as), ASM_THUMB_FORMAT_4_MUL, (reg_dest), (reg_src))
 
-#define ASM_LOAD_REG_REG(as, reg_dest, reg_base) asm_thumb_ldr_rlo_rlo_i5((as), (reg_dest), (reg_base), 0)
 #define ASM_LOAD_REG_REG_OFFSET(as, reg_dest, reg_base, word_offset) asm_thumb_ldr_reg_reg_i12_optimised((as), (reg_dest), (reg_base), (word_offset))
 #define ASM_LOAD8_REG_REG(as, reg_dest, reg_base) asm_thumb_ldrb_rlo_rlo_i5((as), (reg_dest), (reg_base), 0)
 #define ASM_LOAD16_REG_REG(as, reg_dest, reg_base) asm_thumb_ldrh_rlo_rlo_i5((as), (reg_dest), (reg_base), 0)
 #define ASM_LOAD16_REG_REG_OFFSET(as, reg_dest, reg_base, uint16_offset) asm_thumb_ldrh_reg_reg_i12_optimised((as), (reg_dest), (reg_base), (uint16_offset))
 #define ASM_LOAD32_REG_REG(as, reg_dest, reg_base) asm_thumb_ldr_rlo_rlo_i5((as), (reg_dest), (reg_base), 0)
 
-#define ASM_STORE_REG_REG(as, reg_src, reg_base) asm_thumb_str_rlo_rlo_i5((as), (reg_src), (reg_base), 0)
 #define ASM_STORE_REG_REG_OFFSET(as, reg_src, reg_base, word_offset) asm_thumb_str_rlo_rlo_i5((as), (reg_src), (reg_base), (word_offset))
 #define ASM_STORE8_REG_REG(as, reg_src, reg_base) asm_thumb_strb_rlo_rlo_i5((as), (reg_src), (reg_base), 0)
 #define ASM_STORE16_REG_REG(as, reg_src, reg_base) asm_thumb_strh_rlo_rlo_i5((as), (reg_src), (reg_base), 0)
 #define ASM_STORE32_REG_REG(as, reg_src, reg_base) asm_thumb_str_rlo_rlo_i5((as), (reg_src), (reg_base), 0)
 
+#define ASM_LOAD8_REG_REG_REG(as, reg_dest, reg_base, reg_index) asm_thumb_ldrb_rlo_rlo_rlo((as), (reg_dest), (reg_base), (reg_index))
+#define ASM_LOAD16_REG_REG_REG(as, reg_dest, reg_base, reg_index) \
+    do { \
+        asm_thumb_lsl_rlo_rlo_i5((as), (reg_index), (reg_index), 1); \
+        asm_thumb_ldrh_rlo_rlo_rlo((as), (reg_dest), (reg_base), (reg_index)); \
+    } while (0)
+#define ASM_LOAD32_REG_REG_REG(as, reg_dest, reg_base, reg_index) \
+    do { \
+        asm_thumb_lsl_rlo_rlo_i5((as), (reg_index), (reg_index), 2); \
+        asm_thumb_ldr_rlo_rlo_rlo((as), (reg_dest), (reg_base), (reg_index)); \
+    } while (0)
+#define ASM_STORE8_REG_REG_REG(as, reg_val, reg_base, reg_index) asm_thumb_strb_rlo_rlo_rlo((as), (reg_val), (reg_base), (reg_index))
+#define ASM_STORE16_REG_REG_REG(as, reg_val, reg_base, reg_index) \
+    do { \
+        asm_thumb_lsl_rlo_rlo_i5((as), (reg_index), (reg_index), 1); \
+        asm_thumb_strh_rlo_rlo_rlo((as), (reg_val), (reg_base), (reg_index)); \
+    } while (0)
+#define ASM_STORE32_REG_REG_REG(as, reg_val, reg_base, reg_index) \
+    do { \
+        asm_thumb_lsl_rlo_rlo_i5((as), (reg_index), (reg_index), 2); \
+        asm_thumb_str_rlo_rlo_rlo((as), (reg_val), (reg_base), (reg_index)); \
+    } while (0)
+
 #endif // GENERIC_ASM_API
 
 #endif // MICROPY_INCLUDED_PY_ASMTHUMB_H
diff --git a/py/asmx64.h b/py/asmx64.h
index c63e31797ef54..30c6efd6d05b2 100644
--- a/py/asmx64.h
+++ b/py/asmx64.h
@@ -205,14 +205,12 @@ void asm_x64_call_ind(asm_x64_t *as, size_t fun_id, int temp_r32);
 #define ASM_SUB_REG_REG(as, reg_dest, reg_src) asm_x64_sub_r64_r64((as), (reg_dest), (reg_src))
 #define ASM_MUL_REG_REG(as, reg_dest, reg_src) asm_x64_mul_r64_r64((as), (reg_dest), (reg_src))
 
-#define ASM_LOAD_REG_REG(as, reg_dest, reg_base) asm_x64_mov_mem64_to_r64((as), (reg_base), 0, (reg_dest))
 #define ASM_LOAD_REG_REG_OFFSET(as, reg_dest, reg_base, word_offset) asm_x64_mov_mem64_to_r64((as), (reg_base), 8 * (word_offset), (reg_dest))
 #define ASM_LOAD8_REG_REG(as, reg_dest, reg_base) asm_x64_mov_mem8_to_r64zx((as), (reg_base), 0, (reg_dest))
 #define ASM_LOAD16_REG_REG(as, reg_dest, reg_base) asm_x64_mov_mem16_to_r64zx((as), (reg_base), 0, (reg_dest))
 #define ASM_LOAD16_REG_REG_OFFSET(as, reg_dest, reg_base, uint16_offset) asm_x64_mov_mem16_to_r64zx((as), (reg_base), 2 * (uint16_offset), (reg_dest))
 #define ASM_LOAD32_REG_REG(as, reg_dest, reg_base) asm_x64_mov_mem32_to_r64zx((as), (reg_base), 0, (reg_dest))
 
-#define ASM_STORE_REG_REG(as, reg_src, reg_base) asm_x64_mov_r64_to_mem64((as), (reg_src), (reg_base), 0)
 #define ASM_STORE_REG_REG_OFFSET(as, reg_src, reg_base, word_offset) asm_x64_mov_r64_to_mem64((as), (reg_src), (reg_base), 8 * (word_offset))
 #define ASM_STORE8_REG_REG(as, reg_src, reg_base) asm_x64_mov_r8_to_mem8((as), (reg_src), (reg_base), 0)
 #define ASM_STORE16_REG_REG(as, reg_src, reg_base) asm_x64_mov_r16_to_mem16((as), (reg_src), (reg_base), 0)
diff --git a/py/asmx86.h b/py/asmx86.h
index 027d44151e82e..af73c163b4f03 100644
--- a/py/asmx86.h
+++ b/py/asmx86.h
@@ -200,14 +200,12 @@ void asm_x86_call_ind(asm_x86_t *as, size_t fun_id, mp_uint_t n_args, int temp_r
 #define ASM_SUB_REG_REG(as, reg_dest, reg_src) asm_x86_sub_r32_r32((as), (reg_dest), (reg_src))
 #define ASM_MUL_REG_REG(as, reg_dest, reg_src) asm_x86_mul_r32_r32((as), (reg_dest), (reg_src))
 
-#define ASM_LOAD_REG_REG(as, reg_dest, reg_base) asm_x86_mov_mem32_to_r32((as), (reg_base), 0, (reg_dest))
 #define ASM_LOAD_REG_REG_OFFSET(as, reg_dest, reg_base, word_offset) asm_x86_mov_mem32_to_r32((as), (reg_base), 4 * (word_offset), (reg_dest))
 #define ASM_LOAD8_REG_REG(as, reg_dest, reg_base) asm_x86_mov_mem8_to_r32zx((as), (reg_base), 0, (reg_dest))
 #define ASM_LOAD16_REG_REG(as, reg_dest, reg_base) asm_x86_mov_mem16_to_r32zx((as), (reg_base), 0, (reg_dest))
 #define ASM_LOAD16_REG_REG_OFFSET(as, reg_dest, reg_base, uint16_offset) asm_x86_mov_mem16_to_r32zx((as), (reg_base), 2 * (uint16_offset), (reg_dest))
 #define ASM_LOAD32_REG_REG(as, reg_dest, reg_base) asm_x86_mov_mem32_to_r32((as), (reg_base), 0, (reg_dest))
 
-#define ASM_STORE_REG_REG(as, reg_src, reg_base) asm_x86_mov_r32_to_mem32((as), (reg_src), (reg_base), 0)
 #define ASM_STORE_REG_REG_OFFSET(as, reg_src, reg_base, word_offset) asm_x86_mov_r32_to_mem32((as), (reg_src), (reg_base), 4 * (word_offset))
 #define ASM_STORE8_REG_REG(as, reg_src, reg_base) asm_x86_mov_r8_to_mem8((as), (reg_src), (reg_base), 0)
 #define ASM_STORE16_REG_REG(as, reg_src, reg_base) asm_x86_mov_r16_to_mem16((as), (reg_src), (reg_base), 0)
diff --git a/py/asmxtensa.c b/py/asmxtensa.c
index 0fbe351dcf3c7..ab2e7aeaeb6bb 100644
--- a/py/asmxtensa.c
+++ b/py/asmxtensa.c
@@ -37,6 +37,10 @@
 #define WORD_SIZE (4)
 #define SIGNED_FIT8(x) ((((x) & 0xffffff80) == 0) || (((x) & 0xffffff80) == 0xffffff80))
 #define SIGNED_FIT12(x) ((((x) & 0xfffff800) == 0) || (((x) & 0xfffff800) == 0xfffff800))
+#define SIGNED_FIT18(x) ((((x) & 0xfffe0000) == 0) || (((x) & 0xfffe0000) == 0xfffe0000))
+
+#define ET_OUT_OF_RANGE MP_ERROR_TEXT("ERROR: xtensa %q out of range")
+#define ET_NOT_ALIGNED MP_ERROR_TEXT("ERROR: %q %q not word-aligned")
 
 void asm_xtensa_end_pass(asm_xtensa_t *as) {
     as->num_const = as->cur_const;
@@ -47,9 +51,9 @@ void asm_xtensa_end_pass(asm_xtensa_t *as) {
     if (as->base.pass == MP_ASM_PASS_EMIT) {
         uint8_t *d = as->base.code_base;
         printf("XTENSA ASM:");
-        for (int i = 0; i < ((as->base.code_size + 15) & ~15); ++i) {
+        for (size_t i = 0; i < ((as->base.code_size + 15) & ~15); ++i) {
             if (i % 16 == 0) {
-                printf("\n%08x:", (uint32_t)&d[i]);
+                printf("\n%p:", &d[i]);
             }
             if (i % 2 == 0) {
                 printf(" ");
@@ -62,10 +66,12 @@ void asm_xtensa_end_pass(asm_xtensa_t *as) {
 }
 
 void asm_xtensa_entry(asm_xtensa_t *as, int num_locals) {
-    // jump over the constants
-    asm_xtensa_op_j(as, as->num_const * WORD_SIZE + 4 - 4);
-    mp_asm_base_get_cur_to_write_bytes(&as->base, 1); // padding/alignment byte
-    as->const_table = (uint32_t *)mp_asm_base_get_cur_to_write_bytes(&as->base, as->num_const * 4);
+    if (as->num_const > 0) {
+        // jump over the constants
+        asm_xtensa_op_j(as, as->num_const * WORD_SIZE + 4 - 4);
+        mp_asm_base_get_cur_to_write_bytes(&as->base, 1); // padding/alignment byte
+        as->const_table = (uint32_t *)mp_asm_base_get_cur_to_write_bytes(&as->base, as->num_const * 4);
+    }
 
     // adjust the stack-pointer to store a0, a12, a13, a14, a15 and locals, 16-byte aligned
     as->stack_adjust = (((ASM_XTENSA_NUM_REGS_SAVED + num_locals) * WORD_SIZE) + 15) & ~15;
@@ -150,7 +156,7 @@ void asm_xtensa_bccz_reg_label(asm_xtensa_t *as, uint cond, uint reg, uint label
     uint32_t dest = get_label_dest(as, label);
     int32_t rel = dest - as->base.code_offset - 4;
     if (as->base.pass == MP_ASM_PASS_EMIT && !SIGNED_FIT12(rel)) {
-        printf("ERROR: xtensa bccz out of range\n");
+        mp_raise_msg_varg(&mp_type_RuntimeError, ET_OUT_OF_RANGE, MP_QSTR_bccz);
     }
     asm_xtensa_op_bccz(as, cond, reg, rel);
 }
@@ -159,7 +165,7 @@ void asm_xtensa_bcc_reg_reg_label(asm_xtensa_t *as, uint cond, uint reg1, uint r
     uint32_t dest = get_label_dest(as, label);
     int32_t rel = dest - as->base.code_offset - 4;
     if (as->base.pass == MP_ASM_PASS_EMIT && !SIGNED_FIT8(rel)) {
-        printf("ERROR: xtensa bcc out of range\n");
+        mp_raise_msg_varg(&mp_type_RuntimeError, ET_OUT_OF_RANGE, MP_QSTR_bcc);
     }
     asm_xtensa_op_bcc(as, cond, reg1, reg2, rel);
 }
@@ -179,6 +185,8 @@ size_t asm_xtensa_mov_reg_i32(asm_xtensa_t *as, uint reg_dest, uint32_t i32) {
     // store the constant in the table
     if (as->const_table != NULL) {
         as->const_table[as->cur_const] = i32;
+    } else {
+        assert((as->base.pass != MP_ASM_PASS_EMIT) && "Constants table was not built.");
     }
     ++as->cur_const;
     return loc;
@@ -264,4 +272,47 @@ void asm_xtensa_call_ind_win(asm_xtensa_t *as, uint idx) {
     asm_xtensa_op_callx8(as, ASM_XTENSA_REG_A8);
 }
 
+void asm_xtensa_bit_branch(asm_xtensa_t *as, mp_uint_t reg, mp_uint_t bit, mp_uint_t label, mp_uint_t condition) {
+    uint32_t dest = get_label_dest(as, label);
+    int32_t rel = dest - as->base.code_offset - 4;
+    if (as->base.pass == MP_ASM_PASS_EMIT && !SIGNED_FIT8(rel)) {
+        mp_raise_msg_varg(&mp_type_RuntimeError, ET_OUT_OF_RANGE, MP_QSTR_bit_branch);
+    }
+    asm_xtensa_op24(as, ASM_XTENSA_ENCODE_RRI8(7, condition | ((bit >> 4) & 0x01), reg, bit & 0x0F, rel & 0xFF));
+}
+
+void asm_xtensa_call0(asm_xtensa_t *as, mp_uint_t label) {
+    uint32_t dest = get_label_dest(as, label);
+    int32_t rel = dest - as->base.code_offset - 3;
+    if (as->base.pass == MP_ASM_PASS_EMIT) {
+        if ((dest & 0x03) != 0) {
+            mp_raise_msg_varg(&mp_type_RuntimeError, ET_NOT_ALIGNED, MP_QSTR_call0, MP_QSTR_target);
+        }
+        if ((rel & 0x03) != 0) {
+            mp_raise_msg_varg(&mp_type_RuntimeError, ET_NOT_ALIGNED, MP_QSTR_call0, MP_QSTR_location);
+        }
+        if (!SIGNED_FIT18(rel)) {
+            mp_raise_msg_varg(&mp_type_RuntimeError, ET_OUT_OF_RANGE, MP_QSTR_call0);
+        }
+    }
+    asm_xtensa_op_call0(as, rel);
+}
+
+void asm_xtensa_l32r(asm_xtensa_t *as, mp_uint_t reg, mp_uint_t label) {
+    uint32_t dest = get_label_dest(as, label);
+    int32_t rel = dest - as->base.code_offset;
+    if (as->base.pass == MP_ASM_PASS_EMIT) {
+        if ((dest & 0x03) != 0) {
+            mp_raise_msg_varg(&mp_type_RuntimeError, ET_NOT_ALIGNED, MP_QSTR_l32r, MP_QSTR_target);
+        }
+        if ((rel & 0x03) != 0) {
+            mp_raise_msg_varg(&mp_type_RuntimeError, ET_NOT_ALIGNED, MP_QSTR_l32r, MP_QSTR_location);
+        }
+        if (!SIGNED_FIT18(rel) || (rel >= 0)) {
+            mp_raise_msg_varg(&mp_type_RuntimeError, ET_OUT_OF_RANGE, MP_QSTR_l32r);
+        }
+    }
+    asm_xtensa_op_l32r(as, reg, as->base.code_offset, dest);
+}
+
 #endif // MICROPY_EMIT_XTENSA || MICROPY_EMIT_INLINE_XTENSA || MICROPY_EMIT_XTENSAWIN
diff --git a/py/asmxtensa.h b/py/asmxtensa.h
index d2f37bf828e86..d0fd2dcc18739 100644
--- a/py/asmxtensa.h
+++ b/py/asmxtensa.h
@@ -64,9 +64,11 @@
 #define ASM_XTENSA_REG_A14 (14)
 #define ASM_XTENSA_REG_A15 (15)
 
-// for bccz
+// for bccz and bcci
 #define ASM_XTENSA_CCZ_EQ (0)
 #define ASM_XTENSA_CCZ_NE (1)
+#define ASM_XTENSA_CCZ_LT (2)
+#define ASM_XTENSA_CCZ_GE (3)
 
 // for bcc and setcc
 #define ASM_XTENSA_CC_NONE  (0)
@@ -295,6 +297,10 @@ void asm_xtensa_l32i_optimised(asm_xtensa_t *as, uint reg_dest, uint reg_base, u
 void asm_xtensa_s32i_optimised(asm_xtensa_t *as, uint reg_src, uint reg_base, uint word_offset);
 void asm_xtensa_call_ind(asm_xtensa_t *as, uint idx);
 void asm_xtensa_call_ind_win(asm_xtensa_t *as, uint idx);
+void asm_xtensa_bit_branch(asm_xtensa_t *as, mp_uint_t reg, mp_uint_t bit, mp_uint_t label, mp_uint_t condition);
+void asm_xtensa_immediate_branch(asm_xtensa_t *as, mp_uint_t reg, mp_uint_t immediate, mp_uint_t label, mp_uint_t cond);
+void asm_xtensa_call0(asm_xtensa_t *as, mp_uint_t label);
+void asm_xtensa_l32r(asm_xtensa_t *as, mp_uint_t reg, mp_uint_t label);
 
 // Holds a pointer to mp_fun_table
 #define ASM_XTENSA_REG_FUN_TABLE ASM_XTENSA_REG_A15
@@ -411,12 +417,32 @@ void asm_xtensa_call_ind_win(asm_xtensa_t *as, uint idx);
 #define ASM_LOAD8_REG_REG(as, reg_dest, reg_base) asm_xtensa_op_l8ui((as), (reg_dest), (reg_base), 0)
 #define ASM_LOAD16_REG_REG(as, reg_dest, reg_base) asm_xtensa_op_l16ui((as), (reg_dest), (reg_base), 0)
 #define ASM_LOAD16_REG_REG_OFFSET(as, reg_dest, reg_base, uint16_offset) asm_xtensa_op_l16ui((as), (reg_dest), (reg_base), (uint16_offset))
+#define ASM_LOAD16_REG_REG_REG(as, reg_dest, reg_base, reg_index) \
+    do { \
+        asm_xtensa_op_addx2((as), (reg_base), (reg_index), (reg_base)); \
+        asm_xtensa_op_l16ui((as), (reg_dest), (reg_base), 0); \
+    } while (0)
 #define ASM_LOAD32_REG_REG(as, reg_dest, reg_base) asm_xtensa_op_l32i_n((as), (reg_dest), (reg_base), 0)
+#define ASM_LOAD32_REG_REG_REG(as, reg_dest, reg_base, reg_index) \
+    do { \
+        asm_xtensa_op_addx4((as), (reg_base), (reg_index), (reg_base)); \
+        asm_xtensa_op_l32i_n((as), (reg_dest), (reg_base), 0); \
+    } while (0)
 
 #define ASM_STORE_REG_REG_OFFSET(as, reg_dest, reg_base, word_offset) asm_xtensa_s32i_optimised((as), (reg_dest), (reg_base), (word_offset))
 #define ASM_STORE8_REG_REG(as, reg_src, reg_base) asm_xtensa_op_s8i((as), (reg_src), (reg_base), 0)
 #define ASM_STORE16_REG_REG(as, reg_src, reg_base) asm_xtensa_op_s16i((as), (reg_src), (reg_base), 0)
+#define ASM_STORE16_REG_REG_REG(as, reg_val, reg_base, reg_index) \
+    do { \
+        asm_xtensa_op_addx2((as), (reg_base), (reg_index), (reg_base)); \
+        asm_xtensa_op_s16i((as), (reg_val), (reg_base), 0); \
+    } while (0)
 #define ASM_STORE32_REG_REG(as, reg_src, reg_base) asm_xtensa_op_s32i_n((as), (reg_src), (reg_base), 0)
+#define ASM_STORE32_REG_REG_REG(as, reg_val, reg_base, reg_index) \
+    do { \
+        asm_xtensa_op_addx4((as), (reg_base), (reg_index), (reg_base)); \
+        asm_xtensa_op_s32i_n((as), (reg_val), (reg_base), 0); \
+    } while (0)
 
 #endif // GENERIC_ASM_API
 
diff --git a/py/bc.c b/py/bc.c
index 899dbd6a0727d..cea31c93bd8a0 100644
--- a/py/bc.c
+++ b/py/bc.c
@@ -88,7 +88,7 @@ const byte *mp_decode_uint_skip(const byte *ptr) {
     return ptr;
 }
 
-static NORETURN void fun_pos_args_mismatch(mp_obj_fun_bc_t *f, size_t expected, size_t given) {
+static MP_NORETURN void fun_pos_args_mismatch(mp_obj_fun_bc_t *f, size_t expected, size_t given) {
     #if MICROPY_ERROR_REPORTING <= MICROPY_ERROR_REPORTING_TERSE
     // generic message, used also for other argument issues
     (void)f;
diff --git a/py/dynruntime.h b/py/dynruntime.h
index d360d824ac39c..0e438da4b7032 100644
--- a/py/dynruntime.h
+++ b/py/dynruntime.h
@@ -28,6 +28,14 @@
 
 // This header file contains definitions to dynamically implement the static
 // MicroPython runtime API defined in py/obj.h and py/runtime.h.
+//
+// All of the symbols made available in this header are overriding those defined
+// in py/obj.h and py/runtime.h.  This is done with macros.  For macros that
+// would be too complicated (usually more than a single expression), they call a
+// static-inline function for the implementation.  This function has the same
+// name as the macro (hence the same name as a public API function) but with
+// "_dyn" appended. For example, the m_malloc() macro calls the m_malloc_dyn()
+// static-inline function.
 
 #include "py/binary.h"
 #include "py/nativeglue.h"
@@ -39,6 +47,10 @@
 #error "dynruntime.h included in non-dynamic-module build."
 #endif
 
+#if MICROPY_MALLOC_USES_ALLOCATED_SIZE
+#error "MICROPY_MALLOC_USES_ALLOCATED_SIZE must be disable in a dynamic-module build."
+#endif
+
 #undef MP_ROM_QSTR
 #undef MP_OBJ_QSTR_VALUE
 #undef MP_OBJ_NEW_QSTR
@@ -52,13 +64,32 @@
 /******************************************************************************/
 // Memory allocation
 
+#define m_malloc_fail(num_bytes)        (m_malloc_fail_dyn((num_bytes)))
 #define m_malloc(n)                     (m_malloc_dyn((n)))
 #define m_free(ptr)                     (m_free_dyn((ptr)))
 #define m_realloc(ptr, new_num_bytes)   (m_realloc_dyn((ptr), (new_num_bytes)))
+#define m_realloc_maybe(ptr, new_num_bytes, allow_move) (m_realloc_maybe_dyn((ptr), (new_num_bytes), (allow_move)))
+
+static MP_NORETURN inline void m_malloc_fail_dyn(size_t num_bytes) {
+    mp_fun_table.raise_msg(
+        mp_fun_table.load_global(MP_QSTR_MemoryError),
+        "memory allocation failed");
+}
+
+static inline void *m_realloc_maybe_dyn(void *ptr, size_t new_num_bytes, bool allow_move) {
+    return mp_fun_table.realloc_(ptr, new_num_bytes, allow_move);
+}
+
+static inline void *m_realloc_checked_dyn(void *ptr, size_t new_num_bytes, bool allow_move) {
+    ptr = m_realloc_maybe(ptr, new_num_bytes, allow_move);
+    if (ptr == NULL && new_num_bytes != 0) {
+        m_malloc_fail(new_num_bytes);
+    }
+    return ptr;
+}
 
 static inline void *m_malloc_dyn(size_t n) {
-    // TODO won't raise on OOM
-    return mp_fun_table.realloc_(NULL, n, false);
+    return m_realloc_checked_dyn(NULL, n, false);
 }
 
 static inline void m_free_dyn(void *ptr) {
@@ -66,8 +97,7 @@ static inline void m_free_dyn(void *ptr) {
 }
 
 static inline void *m_realloc_dyn(void *ptr, size_t new_num_bytes) {
-    // TODO won't raise on OOM
-    return mp_fun_table.realloc_(ptr, new_num_bytes, true);
+    return m_realloc_checked_dyn(ptr, new_num_bytes, true);
 }
 
 /******************************************************************************/
@@ -265,7 +295,7 @@ static inline mp_obj_t mp_obj_new_exception_arg1_dyn(const mp_obj_type_t *exc_ty
     return mp_call_function_n_kw(MP_OBJ_FROM_PTR(exc_type), 1, 0, &args[0]);
 }
 
-static NORETURN inline void mp_raise_dyn(mp_obj_t o) {
+static MP_NORETURN inline void mp_raise_dyn(mp_obj_t o) {
     mp_fun_table.raise(o);
     for (;;) {
     }
diff --git a/py/dynruntime.mk b/py/dynruntime.mk
index 68d5e2e268f5b..84c78d6225c5a 100644
--- a/py/dynruntime.mk
+++ b/py/dynruntime.mk
@@ -29,16 +29,17 @@ CFLAGS += -Wall -Werror -DNDEBUG
 CFLAGS += -DNO_QSTR
 CFLAGS += -DMICROPY_ENABLE_DYNRUNTIME
 CFLAGS += -DMP_CONFIGFILE='<$(CONFIG_H)>'
-CFLAGS += -fpic -fno-common
-CFLAGS += -U _FORTIFY_SOURCE # prevent use of __*_chk libc functions
-#CFLAGS += -fdata-sections -ffunction-sections
+
+CFLAGS_ARCH += -fpic -fno-common
+CFLAGS_ARCH += -U_FORTIFY_SOURCE # prevent use of __*_chk libc functions
+#CFLAGS_ARCH += -fdata-sections -ffunction-sections
 
 MPY_CROSS_FLAGS += -march=$(ARCH)
 
 SRC_O += $(addprefix $(BUILD)/, $(patsubst %.c,%.o,$(filter %.c,$(SRC))) $(patsubst %.S,%.o,$(filter %.S,$(SRC))))
 SRC_MPY += $(addprefix $(BUILD)/, $(patsubst %.py,%.mpy,$(filter %.py,$(SRC))))
 
-CLEAN_EXTRA += $(MOD).mpy
+CLEAN_EXTRA += $(MOD).mpy .mpy_ld_cache
 
 ################################################################################
 # Architecture configuration
@@ -47,72 +48,74 @@ ifeq ($(ARCH),x86)
 
 # x86
 CROSS =
-CFLAGS += -m32 -fno-stack-protector
+CFLAGS_ARCH += -m32 -fno-stack-protector
 MICROPY_FLOAT_IMPL ?= double
 
 else ifeq ($(ARCH),x64)
 
 # x64
 CROSS =
-CFLAGS += -fno-stack-protector
+CFLAGS_ARCH += -fno-stack-protector
 MICROPY_FLOAT_IMPL ?= double
 
 else ifeq ($(ARCH),armv6m)
 
 # thumb
 CROSS = arm-none-eabi-
-CFLAGS += -mthumb -mcpu=cortex-m0
+CFLAGS_ARCH += -mthumb -mcpu=cortex-m0
 MICROPY_FLOAT_IMPL ?= none
 
 else ifeq ($(ARCH),armv7m)
 
 # thumb
 CROSS = arm-none-eabi-
-CFLAGS += -mthumb -mcpu=cortex-m3
+CFLAGS_ARCH += -mthumb -mcpu=cortex-m3
 MICROPY_FLOAT_IMPL ?= none
 
 else ifeq ($(ARCH),armv7emsp)
 
 # thumb
 CROSS = arm-none-eabi-
-CFLAGS += -mthumb -mcpu=cortex-m4
-CFLAGS += -mfpu=fpv4-sp-d16 -mfloat-abi=hard
+CFLAGS_ARCH += -mthumb -mcpu=cortex-m4
+CFLAGS_ARCH += -mfpu=fpv4-sp-d16 -mfloat-abi=hard
 MICROPY_FLOAT_IMPL ?= float
 
 else ifeq ($(ARCH),armv7emdp)
 
 # thumb
 CROSS = arm-none-eabi-
-CFLAGS += -mthumb -mcpu=cortex-m7
-CFLAGS += -mfpu=fpv5-d16 -mfloat-abi=hard
+CFLAGS_ARCH += -mthumb -mcpu=cortex-m7
+CFLAGS_ARCH += -mfpu=fpv5-d16 -mfloat-abi=hard
 MICROPY_FLOAT_IMPL ?= double
 
 else ifeq ($(ARCH),xtensa)
 
 # xtensa
 CROSS = xtensa-lx106-elf-
-CFLAGS += -mforce-l32
+CFLAGS_ARCH += -mforce-l32
 MICROPY_FLOAT_IMPL ?= none
 
 else ifeq ($(ARCH),xtensawin)
 
 # xtensawin
 CROSS = xtensa-esp32-elf-
-CFLAGS +=
 MICROPY_FLOAT_IMPL ?= float
 
 else ifeq ($(ARCH),rv32imc)
 
 # rv32imc
 CROSS = riscv64-unknown-elf-
-CFLAGS += -march=rv32imac -mabi=ilp32 -mno-relax
+CFLAGS_ARCH += -march=rv32imac -mabi=ilp32 -mno-relax
 # If Picolibc is available then select it explicitly.  Ubuntu 22.04 ships its
 # bare metal RISC-V toolchain with Picolibc rather than Newlib, and the default
 # is "nosys" so a value must be provided.  To avoid having per-distro
 # workarounds, always select Picolibc if available.
-PICOLIBC_SPECS = $(shell $(CROSS)gcc --print-file-name=picolibc.specs)
+PICOLIBC_SPECS := $(shell $(CROSS)gcc --print-file-name=picolibc.specs)
 ifneq ($(PICOLIBC_SPECS),picolibc.specs)
-CFLAGS += --specs=$(PICOLIBC_SPECS)
+CFLAGS_ARCH += -specs=$(PICOLIBC_SPECS)
+USE_PICOLIBC := 1
+PICOLIBC_ARCH := rv32imac
+PICOLIBC_ABI := ilp32
 endif
 
 MICROPY_FLOAT_IMPL ?= none
@@ -121,8 +124,57 @@ else
 $(error architecture '$(ARCH)' not supported)
 endif
 
+ifneq ($(findstring -musl,$(shell $(CROSS)gcc -dumpmachine)),)
+USE_MUSL := 1
+endif
+
 MICROPY_FLOAT_IMPL_UPPER = $(shell echo $(MICROPY_FLOAT_IMPL) | tr '[:lower:]' '[:upper:]')
-CFLAGS += -DMICROPY_FLOAT_IMPL=MICROPY_FLOAT_IMPL_$(MICROPY_FLOAT_IMPL_UPPER)
+CFLAGS += $(CFLAGS_ARCH) -DMICROPY_FLOAT_IMPL=MICROPY_FLOAT_IMPL_$(MICROPY_FLOAT_IMPL_UPPER)
+
+ifeq ($(LINK_RUNTIME),1)
+# All of these picolibc-specific directives are here to work around a
+# limitation of Ubuntu 22.04's RISC-V bare metal toolchain.  In short, the
+# specific version of GCC in use (10.2.0) does not seem to take into account
+# extra paths provided by an explicitly passed specs file when performing name
+# resolution via `--print-file-name`.
+#
+# If Picolibc is used and libc.a fails to resolve, then said file's path will
+# be computed by searching the Picolibc libraries root for a libc.a file in a
+# subdirectory whose path is built using the current `-march` and `-mabi`
+# flags that are passed to GCC.  The `PICOLIBC_ROOT` environment variable is
+# checked to override the starting point for the library file search, and if
+# it is not set then the default value is used, assuming that this is running
+# on an Ubuntu 22.04 machine.
+#
+# This should be revised when the CI base image is updated to a newer Ubuntu
+# version (that hopefully contains a newer RISC-V compiler) or to another Linux
+# distribution.
+ifeq ($(USE_PICOLIBC),1)
+LIBM_NAME := libc.a
+else ifeq ($(USE_MUSL),1)
+LIBM_NAME := libc.a
+else
+LIBM_NAME := libm.a
+endif
+LIBGCC_PATH := $(realpath $(shell $(CROSS)gcc $(CFLAGS) --print-libgcc-file-name))
+LIBM_PATH := $(realpath $(shell $(CROSS)gcc $(CFLAGS) --print-file-name=$(LIBM_NAME)))
+ifeq ($(USE_PICOLIBC),1)
+ifeq ($(LIBM_PATH),)
+# The CROSS toolchain prefix usually ends with a dash, but that may not be
+# always the case.  If the prefix ends with a dash it has to be taken out as
+# Picolibc's architecture directory won't have it in its name.  GNU Make does
+# not have any facility to perform character-level text manipulation so we
+# shell out to sed.
+CROSS_PREFIX := $(shell echo $(CROSS) | sed -e 's/-$$//')
+PICOLIBC_ROOT ?= /usr/lib/picolibc/$(CROSS_PREFIX)/lib
+LIBM_PATH := $(PICOLIBC_ROOT)/$(PICOLIBC_ARCH)/$(PICOLIBC_ABI)/$(LIBM_NAME)
+endif
+endif
+MPY_LD_FLAGS += $(addprefix -l, $(LIBGCC_PATH) $(LIBM_PATH))
+endif
+ifneq ($(MPY_EXTERN_SYM_FILE),)
+MPY_LD_FLAGS += --externs "$(realpath $(MPY_EXTERN_SYM_FILE))"
+endif
 
 CFLAGS += $(CFLAGS_EXTRA)
 
@@ -165,7 +217,7 @@ $(BUILD)/%.mpy: %.py
 # Build native .mpy from object files
 $(BUILD)/$(MOD).native.mpy: $(SRC_O)
 	$(ECHO) "LINK $<"
-	$(Q)$(MPY_LD) --arch $(ARCH) --qstrs $(CONFIG_H) -o $@ $^
+	$(Q)$(MPY_LD) --arch $(ARCH) --qstrs $(CONFIG_H) $(MPY_LD_FLAGS) -o $@ $^
 
 # Build final .mpy from all intermediate .mpy files
 $(MOD).mpy: $(BUILD)/$(MOD).native.mpy $(SRC_MPY)
diff --git a/py/emitinlinerv32.c b/py/emitinlinerv32.c
index 179e289c67b05..a539242b84d95 100644
--- a/py/emitinlinerv32.c
+++ b/py/emitinlinerv32.c
@@ -30,12 +30,13 @@
 #include <stdio.h>
 #include <string.h>
 
-#include "py/asmrv32.h"
 #include "py/emit.h"
 #include "py/misc.h"
 
 #if MICROPY_EMIT_INLINE_RV32
 
+#include "py/asmrv32.h"
+
 typedef enum {
 // define rules with a compile function
 #define DEF_RULE(rule, comp, kind, ...) PN_##rule,
@@ -60,7 +61,7 @@ struct _emit_inline_asm_t {
     qstr *label_lookup;
 };
 
-static const qstr REGISTERS_QSTR_TABLE[] = {
+static const qstr_short_t REGISTERS_QSTR_TABLE[] = {
     MP_QSTR_zero, MP_QSTR_ra,  MP_QSTR_sp,  MP_QSTR_gp,  MP_QSTR_tp,  MP_QSTR_t0,  MP_QSTR_t1,  MP_QSTR_t2,
     MP_QSTR_s0,   MP_QSTR_s1,  MP_QSTR_a0,  MP_QSTR_a1,  MP_QSTR_a2,  MP_QSTR_a3,  MP_QSTR_a4,  MP_QSTR_a5,
     MP_QSTR_a6,   MP_QSTR_a7,  MP_QSTR_s2,  MP_QSTR_s3,  MP_QSTR_s4,  MP_QSTR_s5,  MP_QSTR_s6,  MP_QSTR_s7,
@@ -185,18 +186,21 @@ static bool emit_inline_rv32_label(emit_inline_asm_t *emit, mp_uint_t label_num,
     return true;
 }
 
-#define CALL_RRR 0 // Register, Register, Register
-#define CALL_RR  1 // Register, Register
-#define CALL_RRI 2 // Register, Register, Immediate
-#define CALL_RRL 3 // Register, Register, Label
-#define CALL_RI  4 // Register, Immediate
-#define CALL_L   5 // Label
-#define CALL_R   6 // Register
-#define CALL_RL  7 // Register, Label
-#define CALL_N   8 // No arguments
-#define CALL_I   9 // Immediate
-#define CALL_RII 10 // Register, Immediate, Immediate
-#define CALL_RIR 11 // Register, Immediate(Register)
+typedef enum {
+    CALL_RRR, // Opcode Register, Register, Register
+    CALL_RR,  // Opcode Register, Register
+    CALL_RRI, // Opcode Register, Register, Immediate
+    CALL_RRL, // Opcode Register, Register, Label
+    CALL_RI,  // Opcode Register, Immediate
+    CALL_L,   // Opcode Label
+    CALL_R,   // Opcode Register
+    CALL_RL,  // Opcode Register, Label
+    CALL_N,   // Opcode
+    CALL_I,   // Opcode Immediate
+    CALL_RII, // Opcode Register, Register, Immediate
+    CALL_RIR, // Opcode Register, Immediate(Register)
+    CALL_COUNT
+} call_convention_t;
 
 #define N 0 // No argument
 #define R 1 // Register
@@ -217,18 +221,21 @@ typedef void (*call_r_t)(asm_rv32_t *state, mp_uint_t rd);
 typedef void (*call_n_t)(asm_rv32_t *state);
 
 typedef struct _opcode_t {
-    qstr qstring;
-    void *emitter;
+    qstr_short_t qstring;
+    uint16_t argument1_mask : 4;
+    uint16_t argument2_mask : 4;
+    uint16_t argument3_mask : 4;
+    uint16_t arguments_count : 2;
+    // 2 bits available here
     uint32_t calling_convention : 4;
     uint32_t argument1_kind : 4;
-    uint32_t argument1_shift : 5;
+    uint32_t argument1_shift : 4;
     uint32_t argument2_kind : 4;
-    uint32_t argument2_shift : 5;
+    uint32_t argument2_shift : 4;
     uint32_t argument3_kind : 4;
-    uint32_t argument3_shift : 5;
-    uint32_t argument1_mask;
-    uint32_t argument2_mask;
-    uint32_t argument3_mask;
+    uint32_t argument3_shift : 4;
+    // 4 bits available here
+    void *emitter;
 } opcode_t;
 
 #define opcode_li asm_rv32_emit_optimised_load_immediate
@@ -249,89 +256,129 @@ static void opcode_la(asm_rv32_t *state, mp_uint_t rd, mp_int_t displacement) {
 #define IZ  (I | Z)
 #define IUZ (I | U | Z)
 
+#define MASK_NOT_USED 0
+
+enum {
+    MASK_FFFFFFFF,
+    MASK_00000FFF,
+    MASK_FFFFF000,
+    MASK_00001FFE,
+    MASK_0000001F,
+    MASK_FFFFFFFE,
+    MASK_0000003F,
+    MASK_0000FF00,
+    MASK_000003FC,
+    MASK_000001FE,
+    MASK_00000FFE,
+    MASK_FFFFFFFA,
+    MASK_0001F800,
+    MASK_0000007C,
+    MASK_000000FC,
+    MASK_001FFFFE,
+};
+
+static const uint32_t OPCODE_MASKS[] = {
+    [MASK_FFFFFFFF] = 0xFFFFFFFF,
+    [MASK_00000FFF] = 0x00000FFF,
+    [MASK_FFFFF000] = 0xFFFFF000,
+    [MASK_00001FFE] = 0x00001FFE,
+    [MASK_0000001F] = 0x0000001F,
+    [MASK_FFFFFFFE] = 0xFFFFFFFE,
+    [MASK_0000003F] = 0x0000003F,
+    [MASK_0000FF00] = 0x0000FF00,
+    [MASK_000003FC] = 0x000003FC,
+    [MASK_000001FE] = 0x000001FE,
+    [MASK_00000FFE] = 0x00000FFE,
+    [MASK_FFFFFFFA] = 0xFFFFFFFA,
+    [MASK_0001F800] = 0x0001F800,
+    [MASK_0000007C] = 0x0000007C,
+    [MASK_000000FC] = 0x000000FC,
+    [MASK_001FFFFE] = 0x001FFFFE,
+};
+
 static const opcode_t OPCODES[] = {
-    { MP_QSTR_add,        asm_rv32_opcode_add,       CALL_RRR, R,   0, R,   0,  R,  0, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF },
-    { MP_QSTR_addi,       asm_rv32_opcode_addi,      CALL_RRI, R,   0, R,   0,  I,  0, 0xFFFFFFFF, 0xFFFFFFFF, 0x00000FFF },
-    { MP_QSTR_and_,       asm_rv32_opcode_and,       CALL_RRR, R,   0, R,   0,  R,  0, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF },
-    { MP_QSTR_andi,       asm_rv32_opcode_andi,      CALL_RRI, R,   0, R,   0,  I,  0, 0xFFFFFFFF, 0xFFFFFFFF, 0x00000FFF },
-    { MP_QSTR_auipc,      asm_rv32_opcode_auipc,     CALL_RI,  R,   0, I,   12, N,  0, 0xFFFFFFFF, 0xFFFFF000, 0x00000000 },
-    { MP_QSTR_beq,        asm_rv32_opcode_beq,       CALL_RRL, R,   0, R,   0,  L,  0, 0xFFFFFFFF, 0xFFFFFFFF, 0x00001FFE },
-    { MP_QSTR_bge,        asm_rv32_opcode_bge,       CALL_RRL, R,   0, R,   0,  L,  0, 0xFFFFFFFF, 0xFFFFFFFF, 0x00001FFE },
-    { MP_QSTR_bgeu,       asm_rv32_opcode_bgeu,      CALL_RRL, R,   0, R,   0,  L,  0, 0xFFFFFFFF, 0xFFFFFFFF, 0x00001FFE },
-    { MP_QSTR_blt,        asm_rv32_opcode_blt,       CALL_RRL, R,   0, R,   0,  L,  0, 0xFFFFFFFF, 0xFFFFFFFF, 0x00001FFE },
-    { MP_QSTR_bltu,       asm_rv32_opcode_bltu,      CALL_RRL, R,   0, R,   0,  L,  0, 0xFFFFFFFF, 0xFFFFFFFF, 0x00001FFE },
-    { MP_QSTR_bne,        asm_rv32_opcode_bne,       CALL_RRL, R,   0, R,   0,  L,  0, 0xFFFFFFFF, 0xFFFFFFFF, 0x00001FFE },
-    { MP_QSTR_csrrc,      asm_rv32_opcode_csrrc,     CALL_RRI, R,   0, R,   0,  IU, 0, 0xFFFFFFFF, 0xFFFFFFFF, 0x00000FFF },
-    { MP_QSTR_csrrs,      asm_rv32_opcode_csrrs,     CALL_RRI, R,   0, R,   0,  IU, 0, 0xFFFFFFFF, 0xFFFFFFFF, 0x00000FFF },
-    { MP_QSTR_csrrw,      asm_rv32_opcode_csrrw,     CALL_RRI, R,   0, R,   0,  IU, 0, 0xFFFFFFFF, 0xFFFFFFFF, 0x00000FFF },
-    { MP_QSTR_csrrci,     asm_rv32_opcode_csrrci,    CALL_RII, R,   0, IU,  0,  IU, 0, 0xFFFFFFFF, 0x00000FFF, 0x0000001F },
-    { MP_QSTR_csrrsi,     asm_rv32_opcode_csrrsi,    CALL_RII, R,   0, IU,  0,  IU, 0, 0xFFFFFFFF, 0x00000FFF, 0x0000001F },
-    { MP_QSTR_csrrwi,     asm_rv32_opcode_csrrwi,    CALL_RII, R,   0, IU,  0,  IU, 0, 0xFFFFFFFF, 0x00000FFF, 0x0000001F },
-    { MP_QSTR_c_add,      asm_rv32_opcode_cadd,      CALL_RR,  R,   0, R,   0,  N,  0, 0xFFFFFFFE, 0xFFFFFFFE, 0x00000000 },
-    { MP_QSTR_c_addi,     asm_rv32_opcode_caddi,     CALL_RI,  R,   0, IZ,  0,  N,  0, 0xFFFFFFFE, 0x0000003F, 0x00000000 },
-    { MP_QSTR_c_addi4spn, asm_rv32_opcode_caddi4spn, CALL_RI,  R,   0, IUZ, 0,  N,  0, 0x0000FF00, 0x000003FC, 0x00000000 },
-    { MP_QSTR_c_and,      asm_rv32_opcode_cand,      CALL_RR,  RC,  0, RC,  0,  N,  0, 0x0000FF00, 0x0000FF00, 0x00000000 },
-    { MP_QSTR_c_andi,     asm_rv32_opcode_candi,     CALL_RI,  RC,  0, I,   0,  N,  0, 0x0000FF00, 0x0000003F, 0x00000000 },
-    { MP_QSTR_c_beqz,     asm_rv32_opcode_cbeqz,     CALL_RL,  RC,  0, L,   0,  N,  0, 0x0000FF00, 0x000001FE, 0x00000000 },
-    { MP_QSTR_c_bnez,     asm_rv32_opcode_cbnez,     CALL_RL,  RC,  0, L,   0,  N,  0, 0x0000FF00, 0x000001FE, 0x00000000 },
-    { MP_QSTR_c_ebreak,   asm_rv32_opcode_cebreak,   CALL_N,   N,   0, N,   0,  N,  0, 0x00000000, 0x00000000, 0x00000000 },
-    { MP_QSTR_c_j,        asm_rv32_opcode_cj,        CALL_L,   L,   0, N,   0,  N,  0, 0x00000FFE, 0x00000000, 0x00000000 },
-    { MP_QSTR_c_jal,      asm_rv32_opcode_cjal,      CALL_L,   L,   0, N,   0,  N,  0, 0x00000FFE, 0x00000000, 0x00000000 },
-    { MP_QSTR_c_jalr,     asm_rv32_opcode_cjalr,     CALL_R,   R,   0, N,   0,  N,  0, 0xFFFFFFFE, 0x00000000, 0x00000000 },
-    { MP_QSTR_c_jr,       asm_rv32_opcode_cjr,       CALL_R,   R,   0, N,   0,  N,  0, 0xFFFFFFFE, 0x00000000, 0x00000000 },
-    { MP_QSTR_c_li,       asm_rv32_opcode_cli,       CALL_RI,  R,   0, I,   0,  N,  0, 0xFFFFFFFE, 0x0000003F, 0x00000000 },
-    { MP_QSTR_c_lui,      asm_rv32_opcode_clui,      CALL_RI,  R,   0, IUZ, 12, N,  0, 0xFFFFFFFA, 0x0001F800, 0x00000000 },
-    { MP_QSTR_c_lw,       asm_rv32_opcode_clw,       CALL_RIR, RC,  0, I,   0,  RC, 0, 0x0000FF00, 0x0000007C, 0x0000FF00 },
-    { MP_QSTR_c_lwsp,     asm_rv32_opcode_clwsp,     CALL_RI,  R,   0, I,   0,  N,  0, 0xFFFFFFFE, 0x000000FC, 0x00000000 },
-    { MP_QSTR_c_mv,       asm_rv32_opcode_cmv,       CALL_RR,  R,   0, R,   0,  N,  0, 0xFFFFFFFE, 0xFFFFFFFE, 0x00000000 },
-    { MP_QSTR_c_nop,      asm_rv32_opcode_cnop,      CALL_N,   N,   0, N,   0,  N,  0, 0x00000000, 0x00000000, 0x00000000 },
-    { MP_QSTR_c_or,       asm_rv32_opcode_cor,       CALL_RR,  RC,  0, RC,  0,  N,  0, 0x0000FF00, 0x0000FF00, 0x00000000 },
-    { MP_QSTR_c_slli,     asm_rv32_opcode_cslli,     CALL_RI,  R,   0, IU,  0,  N,  0, 0xFFFFFFFE, 0x0000001F, 0x00000000 },
-    { MP_QSTR_c_srai,     asm_rv32_opcode_csrai,     CALL_RI,  RC,  0, IU,  0,  N,  0, 0x0000FF00, 0x0000001F, 0x00000000 },
-    { MP_QSTR_c_srli,     asm_rv32_opcode_csrli,     CALL_RI,  RC,  0, IU,  0,  N,  0, 0x0000FF00, 0x0000001F, 0x00000000 },
-    { MP_QSTR_c_sub,      asm_rv32_opcode_csub,      CALL_RR,  RC,  0, RC,  0,  N,  0, 0x0000FF00, 0x0000FF00, 0x00000000 },
-    { MP_QSTR_c_sw,       asm_rv32_opcode_csw,       CALL_RIR, RC,  0, I,   0,  RC, 0, 0x0000FF00, 0x0000007C, 0x0000FF00 },
-    { MP_QSTR_c_swsp,     asm_rv32_opcode_cswsp,     CALL_RI,  R,   0, I,   0,  N,  0, 0xFFFFFFFF, 0x000000FC, 0x00000000 },
-    { MP_QSTR_c_xor,      asm_rv32_opcode_cxor,      CALL_RR,  RC,  0, RC,  0,  N,  0, 0x0000FF00, 0x0000FF00, 0x00000000 },
-    { MP_QSTR_div,        asm_rv32_opcode_div,       CALL_RRR, R,   0, R,   0,  R,  0, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF },
-    { MP_QSTR_divu,       asm_rv32_opcode_divu,      CALL_RRR, R,   0, R,   0,  R,  0, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF },
-    { MP_QSTR_ebreak,     asm_rv32_opcode_ebreak,    CALL_N,   N,   0, N,   0,  N,  0, 0x00000000, 0x00000000, 0x00000000 },
-    { MP_QSTR_ecall,      asm_rv32_opcode_ecall,     CALL_N,   N,   0, N,   0,  N,  0, 0x00000000, 0x00000000, 0x00000000 },
-    { MP_QSTR_jal,        asm_rv32_opcode_jal,       CALL_RL,  R,   0, L,   0,  N,  0, 0xFFFFFFFF, 0x001FFFFE, 0x00000000 },
-    { MP_QSTR_jalr,       asm_rv32_opcode_jalr,      CALL_RRI, R,   0, R,   0,  I,  0, 0xFFFFFFFF, 0xFFFFFFFF, 0x00000FFF },
-    { MP_QSTR_la,         opcode_la,                 CALL_RL,  R,   0, L,   0,  N,  0, 0xFFFFFFFF, 0xFFFFFFFF, 0x00000000 },
-    { MP_QSTR_lb,         asm_rv32_opcode_lb,        CALL_RIR, R,   0, I,   0,  R,  0, 0xFFFFFFFF, 0x00000FFF, 0xFFFFFFFF },
-    { MP_QSTR_lbu,        asm_rv32_opcode_lbu,       CALL_RIR, R,   0, I,   0,  R,  0, 0xFFFFFFFF, 0x00000FFF, 0xFFFFFFFF },
-    { MP_QSTR_lh,         asm_rv32_opcode_lh,        CALL_RIR, R,   0, I,   0,  R,  0, 0xFFFFFFFF, 0x00000FFF, 0xFFFFFFFF },
-    { MP_QSTR_lhu,        asm_rv32_opcode_lhu,       CALL_RIR, R,   0, I,   0,  R,  0, 0xFFFFFFFF, 0x00000FFF, 0xFFFFFFFF },
-    { MP_QSTR_li,         opcode_li,                 CALL_RI,  R,   0, I,   0,  N,  0, 0xFFFFFFFF, 0xFFFFFFFF, 0x00000000 },
-    { MP_QSTR_lui,        asm_rv32_opcode_lui,       CALL_RI,  R,   0, I,   12, N,  0, 0xFFFFFFFF, 0xFFFFF000, 0x00000000 },
-    { MP_QSTR_lw,         asm_rv32_opcode_lw,        CALL_RIR, R,   0, I,   0,  R,  0, 0xFFFFFFFF, 0x00000FFF, 0xFFFFFFFF },
-    { MP_QSTR_mv,         asm_rv32_opcode_cmv,       CALL_RR,  R,   0, R,   0,  N,  0, 0xFFFFFFFF, 0xFFFFFFFF, 0x00000000 },
-    { MP_QSTR_mul,        asm_rv32_opcode_mul,       CALL_RRR, R,   0, R,   0,  R,  0, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF },
-    { MP_QSTR_mulh,       asm_rv32_opcode_mulh,      CALL_RRR, R,   0, R,   0,  R,  0, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF },
-    { MP_QSTR_mulhsu,     asm_rv32_opcode_mulhsu,    CALL_RRR, R,   0, R,   0,  R,  0, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF },
-    { MP_QSTR_mulhu,      asm_rv32_opcode_mulhu,     CALL_RRR, R,   0, R,   0,  R,  0, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF },
-    { MP_QSTR_or_,        asm_rv32_opcode_or,        CALL_RRR, R,   0, R,   0,  R,  0, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF },
-    { MP_QSTR_ori,        asm_rv32_opcode_ori,       CALL_RRI, R,   0, R,   0,  I,  0, 0xFFFFFFFF, 0xFFFFFFFF, 0x00000FFF },
-    { MP_QSTR_rem,        asm_rv32_opcode_rem,       CALL_RRR, R,   0, R,   0,  R,  0, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF },
-    { MP_QSTR_remu,       asm_rv32_opcode_remu,      CALL_RRR, R,   0, R,   0,  R,  0, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF },
-    { MP_QSTR_sb,         asm_rv32_opcode_sb,        CALL_RIR, R,   0, I,   0,  R,  0, 0xFFFFFFFF, 0x00000FFF, 0xFFFFFFFF },
-    { MP_QSTR_sh,         asm_rv32_opcode_sh,        CALL_RIR, R,   0, I,   0,  R,  0, 0xFFFFFFFF, 0x00000FFF, 0xFFFFFFFF },
-    { MP_QSTR_sll,        asm_rv32_opcode_sll,       CALL_RRR, R,   0, R,   0,  R,  0, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF },
-    { MP_QSTR_slli,       asm_rv32_opcode_slli,      CALL_RRI, R,   0, R,   0,  IU, 0, 0xFFFFFFFF, 0xFFFFFFFF, 0x0000001F },
-    { MP_QSTR_slt,        asm_rv32_opcode_slt,       CALL_RRR, R,   0, R,   0,  R,  0, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF },
-    { MP_QSTR_slti,       asm_rv32_opcode_slti,      CALL_RRI, R,   0, R,   0,  I,  0, 0xFFFFFFFF, 0xFFFFFFFF, 0x00000FFF },
-    { MP_QSTR_sltiu,      asm_rv32_opcode_sltiu,     CALL_RRI, R,   0, R,   0,  I,  0, 0xFFFFFFFF, 0xFFFFFFFF, 0x00000FFF },
-    { MP_QSTR_sltu,       asm_rv32_opcode_sltu,      CALL_RRR, R,   0, R,   0,  R,  0, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF },
-    { MP_QSTR_sra,        asm_rv32_opcode_sra,       CALL_RRR, R,   0, R,   0,  R,  0, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF },
-    { MP_QSTR_srai,       asm_rv32_opcode_srai,      CALL_RRI, R,   0, R,   0,  IU, 0, 0xFFFFFFFF, 0xFFFFFFFF, 0x0000001F },
-    { MP_QSTR_srl,        asm_rv32_opcode_srl,       CALL_RRR, R,   0, R,   0,  R,  0, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF },
-    { MP_QSTR_srli,       asm_rv32_opcode_srli,      CALL_RRI, R,   0, R,   0,  IU, 0, 0xFFFFFFFF, 0xFFFFFFFF, 0x0000001F },
-    { MP_QSTR_sub,        asm_rv32_opcode_sub,       CALL_RRR, R,   0, R,   0,  R,  0, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF },
-    { MP_QSTR_sw,         asm_rv32_opcode_sw,        CALL_RIR, R,   0, I,   0,  R,  0, 0xFFFFFFFF, 0x00000FFF, 0xFFFFFFFF },
-    { MP_QSTR_xor,        asm_rv32_opcode_xor,       CALL_RRR, R,   0, R,   0,  R,  0, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF },
-    { MP_QSTR_xori,       asm_rv32_opcode_xori,      CALL_RRI, R,   0, R,   0,  I,  0, 0xFFFFFFFF, 0xFFFFFFFF, 0x00000FFF },
+    { MP_QSTR_add,        MASK_FFFFFFFF, MASK_FFFFFFFF, MASK_FFFFFFFF, 3, CALL_RRR, R,  0, R,   0,  R,  0, asm_rv32_opcode_add       },
+    { MP_QSTR_addi,       MASK_FFFFFFFF, MASK_FFFFFFFF, MASK_00000FFF, 3, CALL_RRI, R,  0, R,   0,  I,  0, asm_rv32_opcode_addi      },
+    { MP_QSTR_and_,       MASK_FFFFFFFF, MASK_FFFFFFFF, MASK_FFFFFFFF, 3, CALL_RRR, R,  0, R,   0,  R,  0, asm_rv32_opcode_and       },
+    { MP_QSTR_andi,       MASK_FFFFFFFF, MASK_FFFFFFFF, MASK_00000FFF, 3, CALL_RRI, R,  0, R,   0,  I,  0, asm_rv32_opcode_andi      },
+    { MP_QSTR_auipc,      MASK_FFFFFFFF, MASK_FFFFF000, MASK_NOT_USED, 2, CALL_RI,  R,  0, I,   12, N,  0, asm_rv32_opcode_auipc     },
+    { MP_QSTR_beq,        MASK_FFFFFFFF, MASK_FFFFFFFF, MASK_00001FFE, 3, CALL_RRL, R,  0, R,   0,  L,  0, asm_rv32_opcode_beq       },
+    { MP_QSTR_bge,        MASK_FFFFFFFF, MASK_FFFFFFFF, MASK_00001FFE, 3, CALL_RRL, R,  0, R,   0,  L,  0, asm_rv32_opcode_bge       },
+    { MP_QSTR_bgeu,       MASK_FFFFFFFF, MASK_FFFFFFFF, MASK_00001FFE, 3, CALL_RRL, R,  0, R,   0,  L,  0, asm_rv32_opcode_bgeu      },
+    { MP_QSTR_blt,        MASK_FFFFFFFF, MASK_FFFFFFFF, MASK_00001FFE, 3, CALL_RRL, R,  0, R,   0,  L,  0, asm_rv32_opcode_blt       },
+    { MP_QSTR_bltu,       MASK_FFFFFFFF, MASK_FFFFFFFF, MASK_00001FFE, 3, CALL_RRL, R,  0, R,   0,  L,  0, asm_rv32_opcode_bltu      },
+    { MP_QSTR_bne,        MASK_FFFFFFFF, MASK_FFFFFFFF, MASK_00001FFE, 3, CALL_RRL, R,  0, R,   0,  L,  0, asm_rv32_opcode_bne       },
+    { MP_QSTR_csrrc,      MASK_FFFFFFFF, MASK_FFFFFFFF, MASK_00000FFF, 3, CALL_RRI, R,  0, R,   0,  IU, 0, asm_rv32_opcode_csrrc     },
+    { MP_QSTR_csrrs,      MASK_FFFFFFFF, MASK_FFFFFFFF, MASK_00000FFF, 3, CALL_RRI, R,  0, R,   0,  IU, 0, asm_rv32_opcode_csrrs     },
+    { MP_QSTR_csrrw,      MASK_FFFFFFFF, MASK_FFFFFFFF, MASK_00000FFF, 3, CALL_RRI, R,  0, R,   0,  IU, 0, asm_rv32_opcode_csrrw     },
+    { MP_QSTR_csrrci,     MASK_FFFFFFFF, MASK_00000FFF, MASK_0000001F, 3, CALL_RII, R,  0, IU,  0,  IU, 0, asm_rv32_opcode_csrrci    },
+    { MP_QSTR_csrrsi,     MASK_FFFFFFFF, MASK_00000FFF, MASK_0000001F, 3, CALL_RII, R,  0, IU,  0,  IU, 0, asm_rv32_opcode_csrrsi    },
+    { MP_QSTR_csrrwi,     MASK_FFFFFFFF, MASK_00000FFF, MASK_0000001F, 3, CALL_RII, R,  0, IU,  0,  IU, 0, asm_rv32_opcode_csrrwi    },
+    { MP_QSTR_c_add,      MASK_FFFFFFFE, MASK_FFFFFFFE, MASK_NOT_USED, 2, CALL_RR,  R,  0, R,   0,  N,  0, asm_rv32_opcode_cadd      },
+    { MP_QSTR_c_addi,     MASK_FFFFFFFE, MASK_0000003F, MASK_NOT_USED, 2, CALL_RI,  R,  0, IZ,  0,  N,  0, asm_rv32_opcode_caddi     },
+    { MP_QSTR_c_addi4spn, MASK_0000FF00, MASK_000003FC, MASK_NOT_USED, 2, CALL_RI,  R,  0, IUZ, 0,  N,  0, asm_rv32_opcode_caddi4spn },
+    { MP_QSTR_c_and,      MASK_0000FF00, MASK_0000FF00, MASK_NOT_USED, 2, CALL_RR,  RC, 0, RC,  0,  N,  0, asm_rv32_opcode_cand      },
+    { MP_QSTR_c_andi,     MASK_0000FF00, MASK_0000003F, MASK_NOT_USED, 2, CALL_RI,  RC, 0, I,   0,  N,  0, asm_rv32_opcode_candi     },
+    { MP_QSTR_c_beqz,     MASK_0000FF00, MASK_000001FE, MASK_NOT_USED, 2, CALL_RL,  RC, 0, L,   0,  N,  0, asm_rv32_opcode_cbeqz     },
+    { MP_QSTR_c_bnez,     MASK_0000FF00, MASK_000001FE, MASK_NOT_USED, 2, CALL_RL,  RC, 0, L,   0,  N,  0, asm_rv32_opcode_cbnez     },
+    { MP_QSTR_c_ebreak,   MASK_NOT_USED, MASK_NOT_USED, MASK_NOT_USED, 0, CALL_N,   N,  0, N,   0,  N,  0, asm_rv32_opcode_cebreak   },
+    { MP_QSTR_c_j,        MASK_00000FFE, MASK_NOT_USED, MASK_NOT_USED, 1, CALL_L,   L,  0, N,   0,  N,  0, asm_rv32_opcode_cj        },
+    { MP_QSTR_c_jal,      MASK_00000FFE, MASK_NOT_USED, MASK_NOT_USED, 1, CALL_L,   L,  0, N,   0,  N,  0, asm_rv32_opcode_cjal      },
+    { MP_QSTR_c_jalr,     MASK_FFFFFFFE, MASK_NOT_USED, MASK_NOT_USED, 1, CALL_R,   R,  0, N,   0,  N,  0, asm_rv32_opcode_cjalr     },
+    { MP_QSTR_c_jr,       MASK_FFFFFFFE, MASK_NOT_USED, MASK_NOT_USED, 1, CALL_R,   R,  0, N,   0,  N,  0, asm_rv32_opcode_cjr       },
+    { MP_QSTR_c_li,       MASK_FFFFFFFE, MASK_0000003F, MASK_NOT_USED, 2, CALL_RI,  R,  0, I,   0,  N,  0, asm_rv32_opcode_cli       },
+    { MP_QSTR_c_lui,      MASK_FFFFFFFA, MASK_0001F800, MASK_NOT_USED, 2, CALL_RI,  R,  0, IUZ, 12, N,  0, asm_rv32_opcode_clui      },
+    { MP_QSTR_c_lw,       MASK_0000FF00, MASK_0000007C, MASK_0000FF00, 3, CALL_RIR, RC, 0, I,   0,  RC, 0, asm_rv32_opcode_clw       },
+    { MP_QSTR_c_lwsp,     MASK_FFFFFFFE, MASK_000000FC, MASK_NOT_USED, 2, CALL_RI,  R,  0, I,   0,  N,  0, asm_rv32_opcode_clwsp     },
+    { MP_QSTR_c_mv,       MASK_FFFFFFFE, MASK_FFFFFFFE, MASK_NOT_USED, 2, CALL_RR,  R,  0, R,   0,  N,  0, asm_rv32_opcode_cmv       },
+    { MP_QSTR_c_nop,      MASK_NOT_USED, MASK_NOT_USED, MASK_NOT_USED, 0, CALL_N,   N,  0, N,   0,  N,  0, asm_rv32_opcode_cnop      },
+    { MP_QSTR_c_or,       MASK_0000FF00, MASK_0000FF00, MASK_NOT_USED, 2, CALL_RR,  RC, 0, RC,  0,  N,  0, asm_rv32_opcode_cor       },
+    { MP_QSTR_c_slli,     MASK_FFFFFFFE, MASK_0000001F, MASK_NOT_USED, 2, CALL_RI,  R,  0, IU,  0,  N,  0, asm_rv32_opcode_cslli     },
+    { MP_QSTR_c_srai,     MASK_0000FF00, MASK_0000001F, MASK_NOT_USED, 2, CALL_RI,  RC, 0, IU,  0,  N,  0, asm_rv32_opcode_csrai     },
+    { MP_QSTR_c_srli,     MASK_0000FF00, MASK_0000001F, MASK_NOT_USED, 2, CALL_RI,  RC, 0, IU,  0,  N,  0, asm_rv32_opcode_csrli     },
+    { MP_QSTR_c_sub,      MASK_0000FF00, MASK_0000FF00, MASK_NOT_USED, 2, CALL_RR,  RC, 0, RC,  0,  N,  0, asm_rv32_opcode_csub      },
+    { MP_QSTR_c_sw,       MASK_0000FF00, MASK_0000007C, MASK_0000FF00, 3, CALL_RIR, RC, 0, I,   0,  RC, 0, asm_rv32_opcode_csw       },
+    { MP_QSTR_c_swsp,     MASK_FFFFFFFF, MASK_000000FC, MASK_NOT_USED, 2, CALL_RI,  R,  0, I,   0,  N,  0, asm_rv32_opcode_cswsp     },
+    { MP_QSTR_c_xor,      MASK_0000FF00, MASK_0000FF00, MASK_NOT_USED, 2, CALL_RR,  RC, 0, RC,  0,  N,  0, asm_rv32_opcode_cxor      },
+    { MP_QSTR_div,        MASK_FFFFFFFF, MASK_FFFFFFFF, MASK_FFFFFFFF, 3, CALL_RRR, R,  0, R,   0,  R,  0, asm_rv32_opcode_div       },
+    { MP_QSTR_divu,       MASK_FFFFFFFF, MASK_FFFFFFFF, MASK_FFFFFFFF, 3, CALL_RRR, R,  0, R,   0,  R,  0, asm_rv32_opcode_divu      },
+    { MP_QSTR_ebreak,     MASK_NOT_USED, MASK_NOT_USED, MASK_NOT_USED, 0, CALL_N,   N,  0, N,   0,  N,  0, asm_rv32_opcode_ebreak    },
+    { MP_QSTR_ecall,      MASK_NOT_USED, MASK_NOT_USED, MASK_NOT_USED, 0, CALL_N,   N,  0, N,   0,  N,  0, asm_rv32_opcode_ecall     },
+    { MP_QSTR_jal,        MASK_FFFFFFFF, MASK_001FFFFE, MASK_NOT_USED, 2, CALL_RL,  R,  0, L,   0,  N,  0, asm_rv32_opcode_jal       },
+    { MP_QSTR_jalr,       MASK_FFFFFFFF, MASK_FFFFFFFF, MASK_00000FFF, 3, CALL_RRI, R,  0, R,   0,  I,  0, asm_rv32_opcode_jalr      },
+    { MP_QSTR_la,         MASK_FFFFFFFF, MASK_FFFFFFFF, MASK_NOT_USED, 2, CALL_RL,  R,  0, L,   0,  N,  0, opcode_la                 },
+    { MP_QSTR_lb,         MASK_FFFFFFFF, MASK_00000FFF, MASK_FFFFFFFF, 3, CALL_RIR, R,  0, I,   0,  R,  0, asm_rv32_opcode_lb        },
+    { MP_QSTR_lbu,        MASK_FFFFFFFF, MASK_00000FFF, MASK_FFFFFFFF, 3, CALL_RIR, R,  0, I,   0,  R,  0, asm_rv32_opcode_lbu       },
+    { MP_QSTR_lh,         MASK_FFFFFFFF, MASK_00000FFF, MASK_FFFFFFFF, 3, CALL_RIR, R,  0, I,   0,  R,  0, asm_rv32_opcode_lh        },
+    { MP_QSTR_lhu,        MASK_FFFFFFFF, MASK_00000FFF, MASK_FFFFFFFF, 3, CALL_RIR, R,  0, I,   0,  R,  0, asm_rv32_opcode_lhu       },
+    { MP_QSTR_li,         MASK_FFFFFFFF, MASK_FFFFFFFF, MASK_NOT_USED, 2, CALL_RI,  R,  0, I,   0,  N,  0, opcode_li                 },
+    { MP_QSTR_lui,        MASK_FFFFFFFF, MASK_FFFFF000, MASK_NOT_USED, 2, CALL_RI,  R,  0, I,   12, N,  0, asm_rv32_opcode_lui       },
+    { MP_QSTR_lw,         MASK_FFFFFFFF, MASK_00000FFF, MASK_FFFFFFFF, 3, CALL_RIR, R,  0, I,   0,  R,  0, asm_rv32_opcode_lw        },
+    { MP_QSTR_mv,         MASK_FFFFFFFF, MASK_FFFFFFFF, MASK_NOT_USED, 2, CALL_RR,  R,  0, R,   0,  N,  0, asm_rv32_opcode_cmv       },
+    { MP_QSTR_mul,        MASK_FFFFFFFF, MASK_FFFFFFFF, MASK_FFFFFFFF, 3, CALL_RRR, R,  0, R,   0,  R,  0, asm_rv32_opcode_mul       },
+    { MP_QSTR_mulh,       MASK_FFFFFFFF, MASK_FFFFFFFF, MASK_FFFFFFFF, 3, CALL_RRR, R,  0, R,   0,  R,  0, asm_rv32_opcode_mulh      },
+    { MP_QSTR_mulhsu,     MASK_FFFFFFFF, MASK_FFFFFFFF, MASK_FFFFFFFF, 3, CALL_RRR, R,  0, R,   0,  R,  0, asm_rv32_opcode_mulhsu    },
+    { MP_QSTR_mulhu,      MASK_FFFFFFFF, MASK_FFFFFFFF, MASK_FFFFFFFF, 3, CALL_RRR, R,  0, R,   0,  R,  0, asm_rv32_opcode_mulhu     },
+    { MP_QSTR_or_,        MASK_FFFFFFFF, MASK_FFFFFFFF, MASK_FFFFFFFF, 3, CALL_RRR, R,  0, R,   0,  R,  0, asm_rv32_opcode_or        },
+    { MP_QSTR_ori,        MASK_FFFFFFFF, MASK_FFFFFFFF, MASK_00000FFF, 3, CALL_RRI, R,  0, R,   0,  I,  0, asm_rv32_opcode_ori       },
+    { MP_QSTR_rem,        MASK_FFFFFFFF, MASK_FFFFFFFF, MASK_FFFFFFFF, 3, CALL_RRR, R,  0, R,   0,  R,  0, asm_rv32_opcode_rem       },
+    { MP_QSTR_remu,       MASK_FFFFFFFF, MASK_FFFFFFFF, MASK_FFFFFFFF, 3, CALL_RRR, R,  0, R,   0,  R,  0, asm_rv32_opcode_remu      },
+    { MP_QSTR_sb,         MASK_FFFFFFFF, MASK_00000FFF, MASK_FFFFFFFF, 3, CALL_RIR, R,  0, I,   0,  R,  0, asm_rv32_opcode_sb        },
+    { MP_QSTR_sh,         MASK_FFFFFFFF, MASK_00000FFF, MASK_FFFFFFFF, 3, CALL_RIR, R,  0, I,   0,  R,  0, asm_rv32_opcode_sh        },
+    { MP_QSTR_sll,        MASK_FFFFFFFF, MASK_FFFFFFFF, MASK_FFFFFFFF, 3, CALL_RRR, R,  0, R,   0,  R,  0, asm_rv32_opcode_sll       },
+    { MP_QSTR_slli,       MASK_FFFFFFFF, MASK_FFFFFFFF, MASK_0000001F, 3, CALL_RRI, R,  0, R,   0,  IU, 0, asm_rv32_opcode_slli      },
+    { MP_QSTR_slt,        MASK_FFFFFFFF, MASK_FFFFFFFF, MASK_FFFFFFFF, 3, CALL_RRR, R,  0, R,   0,  R,  0, asm_rv32_opcode_slt       },
+    { MP_QSTR_slti,       MASK_FFFFFFFF, MASK_FFFFFFFF, MASK_00000FFF, 3, CALL_RRI, R,  0, R,   0,  I,  0, asm_rv32_opcode_slti      },
+    { MP_QSTR_sltiu,      MASK_FFFFFFFF, MASK_FFFFFFFF, MASK_00000FFF, 3, CALL_RRI, R,  0, R,   0,  I,  0, asm_rv32_opcode_sltiu     },
+    { MP_QSTR_sltu,       MASK_FFFFFFFF, MASK_FFFFFFFF, MASK_FFFFFFFF, 3, CALL_RRR, R,  0, R,   0,  R,  0, asm_rv32_opcode_sltu      },
+    { MP_QSTR_sra,        MASK_FFFFFFFF, MASK_FFFFFFFF, MASK_FFFFFFFF, 3, CALL_RRR, R,  0, R,   0,  R,  0, asm_rv32_opcode_sra       },
+    { MP_QSTR_srai,       MASK_FFFFFFFF, MASK_FFFFFFFF, MASK_0000001F, 3, CALL_RRI, R,  0, R,   0,  IU, 0, asm_rv32_opcode_srai      },
+    { MP_QSTR_srl,        MASK_FFFFFFFF, MASK_FFFFFFFF, MASK_FFFFFFFF, 3, CALL_RRR, R,  0, R,   0,  R,  0, asm_rv32_opcode_srl       },
+    { MP_QSTR_srli,       MASK_FFFFFFFF, MASK_FFFFFFFF, MASK_0000001F, 3, CALL_RRI, R,  0, R,   0,  IU, 0, asm_rv32_opcode_srli      },
+    { MP_QSTR_sub,        MASK_FFFFFFFF, MASK_FFFFFFFF, MASK_FFFFFFFF, 3, CALL_RRR, R,  0, R,   0,  R,  0, asm_rv32_opcode_sub       },
+    { MP_QSTR_sw,         MASK_FFFFFFFF, MASK_00000FFF, MASK_FFFFFFFF, 3, CALL_RIR, R,  0, I,   0,  R,  0, asm_rv32_opcode_sw        },
+    { MP_QSTR_xor,        MASK_FFFFFFFF, MASK_FFFFFFFF, MASK_FFFFFFFF, 3, CALL_RRR, R,  0, R,   0,  R,  0, asm_rv32_opcode_xor       },
+    { MP_QSTR_xori,       MASK_FFFFFFFF, MASK_FFFFFFFF, MASK_00000FFF, 3, CALL_RRI, R,  0, R,   0,  I,  0, asm_rv32_opcode_xori      },
 };
 
 #undef RC
@@ -384,6 +431,10 @@ static bool validate_integer(mp_uint_t value, mp_uint_t mask, mp_uint_t flags) {
     return true;
 }
 
+#define ET_WRONG_ARGUMENT_KIND   MP_ERROR_TEXT("opcode '%q' argument %d: expecting %q")
+#define ET_WRONG_ARGUMENTS_COUNT MP_ERROR_TEXT("opcode '%q': expecting %d arguments")
+#define ET_OUT_OF_RANGE          MP_ERROR_TEXT("opcode '%q' argument %d: out of range")
+
 static bool validate_argument(emit_inline_asm_t *emit, qstr opcode_qstr,
     const opcode_t *opcode, mp_parse_node_t node, mp_uint_t node_index) {
     assert((node_index < 3) && "Invalid argument node number.");
@@ -396,19 +447,19 @@ static bool validate_argument(emit_inline_asm_t *emit, qstr opcode_qstr,
         case 0:
             kind = opcode->argument1_kind;
             shift = opcode->argument1_shift;
-            mask = opcode->argument1_mask;
+            mask = OPCODE_MASKS[opcode->argument1_mask];
             break;
 
         case 1:
             kind = opcode->argument2_kind;
             shift = opcode->argument2_shift;
-            mask = opcode->argument2_mask;
+            mask = OPCODE_MASKS[opcode->argument2_mask];
             break;
 
         case 2:
             kind = opcode->argument3_kind;
             shift = opcode->argument3_shift;
-            mask = opcode->argument3_mask;
+            mask = OPCODE_MASKS[opcode->argument3_mask];
             break;
 
         default:
@@ -417,6 +468,7 @@ static bool validate_argument(emit_inline_asm_t *emit, qstr opcode_qstr,
 
     switch (kind & 0x03) {
         case N:
+            assert(mask == OPCODE_MASKS[MASK_NOT_USED] && "Invalid mask index for missing operand.");
             return true;
 
         case R: {
@@ -424,15 +476,14 @@ static bool validate_argument(emit_inline_asm_t *emit, qstr opcode_qstr,
             if (!parse_register_node(node, &register_index, false)) {
                 emit_inline_rv32_error_exc(emit,
                     mp_obj_new_exception_msg_varg(&mp_type_SyntaxError,
-                        MP_ERROR_TEXT("opcode '%q' argument %d must be a register"),
-                        opcode_qstr, node_index + 1));
+                        ET_WRONG_ARGUMENT_KIND, opcode_qstr, node_index + 1, MP_QSTR_register));
                 return false;
             }
 
             if ((mask & (1U << register_index)) == 0) {
                 emit_inline_rv32_error_exc(emit,
                     mp_obj_new_exception_msg_varg(&mp_type_SyntaxError,
-                        MP_ERROR_TEXT("opcode '%q' argument %d is an invalid register"),
+                        MP_ERROR_TEXT("opcode '%q' argument %d: unknown register"),
                         opcode_qstr, node_index + 1));
                 return false;
             }
@@ -446,8 +497,7 @@ static bool validate_argument(emit_inline_asm_t *emit, qstr opcode_qstr,
             if (!mp_parse_node_get_int_maybe(node, &object)) {
                 emit_inline_rv32_error_exc(emit,
                     mp_obj_new_exception_msg_varg(&mp_type_SyntaxError,
-                        MP_ERROR_TEXT("opcode '%q' argument %d must be an integer"),
-                        opcode_qstr, node_index + 1));
+                        ET_WRONG_ARGUMENT_KIND, opcode_qstr, node_index + 1, MP_QSTR_integer));
                 return false;
             }
 
@@ -474,8 +524,7 @@ static bool validate_argument(emit_inline_asm_t *emit, qstr opcode_qstr,
             if (!MP_PARSE_NODE_IS_ID(node)) {
                 emit_inline_rv32_error_exc(emit,
                     mp_obj_new_exception_msg_varg(&mp_type_SyntaxError,
-                        MP_ERROR_TEXT("opcode '%q' argument %d must be a label"),
-                        opcode_qstr, node_index + 1));
+                        ET_WRONG_ARGUMENT_KIND, opcode_qstr, node_index + 1, MP_QSTR_label));
                 return false;
             }
 
@@ -484,7 +533,7 @@ static bool validate_argument(emit_inline_asm_t *emit, qstr opcode_qstr,
             if (label_index >= emit->max_num_labels && emit->pass == MP_PASS_EMIT) {
                 emit_inline_rv32_error_exc(emit,
                     mp_obj_new_exception_msg_varg(&mp_type_SyntaxError,
-                        MP_ERROR_TEXT("opcode '%q' argument %d label '%q' is undefined"),
+                        MP_ERROR_TEXT("opcode '%q' argument %d: undefined label '%q'"),
                         opcode_qstr, node_index + 1, qstring));
                 return false;
             }
@@ -512,15 +561,13 @@ static bool validate_argument(emit_inline_asm_t *emit, qstr opcode_qstr,
 
 out_of_range:
     emit_inline_rv32_error_exc(emit,
-        mp_obj_new_exception_msg_varg(&mp_type_SyntaxError,
-            MP_ERROR_TEXT("opcode '%q' argument %d is out of range"),
-            opcode_qstr, node_index + 1));
+        mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, ET_OUT_OF_RANGE, opcode_qstr, node_index + 1));
     return false;
 
 zero_immediate:
     emit_inline_rv32_error_exc(emit,
         mp_obj_new_exception_msg_varg(&mp_type_SyntaxError,
-            MP_ERROR_TEXT("opcode '%q' argument %d must not be zero"),
+            MP_ERROR_TEXT("opcode '%q' argument %d: must not be zero"),
             opcode_qstr, node_index + 1));
     return false;
 }
@@ -556,18 +603,14 @@ static bool parse_register_offset_node(emit_inline_asm_t *emit, qstr opcode_qstr
         mp_obj_t object;
         if (!mp_parse_node_get_int_maybe(node_struct->nodes[0], &object)) {
             emit_inline_rv32_error_exc(emit,
-                mp_obj_new_exception_msg_varg(&mp_type_SyntaxError,
-                    MP_ERROR_TEXT("opcode '%q' argument %d must be an integer"),
-                    opcode_qstr, 2));
+                mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, ET_WRONG_ARGUMENT_KIND, opcode_qstr, 2, MP_QSTR_integer));
             return false;
         }
         mp_uint_t value = mp_obj_get_int_truncated(object);
         value = (~value + 1) & (mp_uint_t)-1;
-        if (!validate_integer(value << opcode_data->argument2_shift, opcode_data->argument2_mask, opcode_data->argument2_kind)) {
+        if (!validate_integer(value << opcode_data->argument2_shift, OPCODE_MASKS[opcode_data->argument2_mask], opcode_data->argument2_kind)) {
             emit_inline_rv32_error_exc(emit,
-                mp_obj_new_exception_msg_varg(&mp_type_SyntaxError,
-                    MP_ERROR_TEXT("opcode '%q' argument %d is out of range"),
-                    opcode_qstr, 2));
+                mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, ET_OUT_OF_RANGE, opcode_qstr, 2));
             return false;
         }
     } else {
@@ -587,8 +630,7 @@ static bool parse_register_offset_node(emit_inline_asm_t *emit, qstr opcode_qstr
 invalid_structure:
     emit_inline_rv32_error_exc(emit,
         mp_obj_new_exception_msg_varg(&mp_type_SyntaxError,
-            MP_ERROR_TEXT("opcode '%q' argument %d must be an integer offset to a register"),
-            opcode_qstr, node_index + 1));
+            ET_WRONG_ARGUMENT_KIND, opcode_qstr, node_index + 1, MP_QSTR_offset));
     return false;
 }
 
@@ -709,9 +751,11 @@ static bool handle_load_store_opcode_with_offset(emit_inline_asm_t *emit, qstr o
         return false;
     }
 
-    mp_uint_t rd;
-    mp_uint_t rs1;
-    parse_register_node(nodes[0], &rd, opcode_data->argument1_kind & C);
+    mp_uint_t rd = 0;
+    mp_uint_t rs1 = 0;
+    if (!parse_register_node(nodes[0], &rd, opcode_data->argument1_kind & C)) {
+        return false;
+    }
     if (!parse_register_node(nodes[1], &rs1, opcode_data->argument3_kind & C)) {
         return false;
     }
@@ -722,11 +766,9 @@ static bool handle_load_store_opcode_with_offset(emit_inline_asm_t *emit, qstr o
     if (negative) {
         immediate = (~immediate + 1) & (mp_uint_t)-1;
     }
-    if (!is_in_signed_mask(opcode_data->argument2_mask, immediate)) {
+    if (!is_in_signed_mask(OPCODE_MASKS[opcode_data->argument2_mask], immediate)) {
         emit_inline_rv32_error_exc(emit,
-            mp_obj_new_exception_msg_varg(&mp_type_SyntaxError,
-                MP_ERROR_TEXT("opcode '%q' argument %d is out of range"),
-                opcode, 2));
+            mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, ET_OUT_OF_RANGE, opcode, 2));
         return false;
     }
 
@@ -746,49 +788,40 @@ static void emit_inline_rv32_opcode(emit_inline_asm_t *emit, qstr opcode, mp_uin
     if (!opcode_data) {
         emit_inline_rv32_error_exc(emit,
             mp_obj_new_exception_msg_varg(&mp_type_SyntaxError,
-                MP_ERROR_TEXT("unsupported or unknown RV32 instruction '%q'."), opcode));
+                MP_ERROR_TEXT("unknown RV32 instruction '%q'"), opcode));
         return;
     }
 
-    size_t required_arguments = 0;
-    if (opcode_data->argument1_kind != N) {
-        required_arguments++;
-    }
-    if (opcode_data->argument2_kind != N) {
-        required_arguments++;
-    }
-    if (opcode_data->argument3_kind != N) {
-        required_arguments++;
-    }
-
+    assert((opcode_data->argument1_mask < MP_ARRAY_SIZE(OPCODE_MASKS)) && "Argument #1 opcode mask index out of bounds.");
+    assert((opcode_data->argument2_mask < MP_ARRAY_SIZE(OPCODE_MASKS)) && "Argument #2 opcode mask index out of bounds.");
+    assert((opcode_data->argument3_mask < MP_ARRAY_SIZE(OPCODE_MASKS)) && "Argument #3 opcode mask index out of bounds.");
+    assert((opcode_data->calling_convention < CALL_COUNT) && "Calling convention index out of bounds.");
     if (opcode_data->calling_convention != CALL_RIR) {
-        if (required_arguments != arguments_count) {
+        if (opcode_data->arguments_count != arguments_count) {
             emit_inline_rv32_error_exc(emit,
                 mp_obj_new_exception_msg_varg(&mp_type_SyntaxError,
-                    MP_ERROR_TEXT("RV32 instruction '%q' requires %d arguments."), opcode, required_arguments));
+                    ET_WRONG_ARGUMENTS_COUNT, opcode, opcode_data->arguments_count));
             return;
         }
-        if (required_arguments >= 1 && !validate_argument(emit, opcode, opcode_data, argument_nodes[0], 0)) {
+        if (opcode_data->arguments_count >= 1 && !validate_argument(emit, opcode, opcode_data, argument_nodes[0], 0)) {
             return;
         }
-        if (required_arguments >= 2 && !validate_argument(emit, opcode, opcode_data, argument_nodes[1], 1)) {
+        if (opcode_data->arguments_count >= 2 && !validate_argument(emit, opcode, opcode_data, argument_nodes[1], 1)) {
             return;
         }
-        if (required_arguments >= 3 && !validate_argument(emit, opcode, opcode_data, argument_nodes[2], 2)) {
+        if (opcode_data->arguments_count >= 3 && !validate_argument(emit, opcode, opcode_data, argument_nodes[2], 2)) {
             return;
         }
         handle_opcode(emit, opcode, opcode_data, argument_nodes);
         return;
     }
 
-    assert(required_arguments == 3 && "Invalid arguments count for calling convention.");
     assert((opcode_data->argument2_kind & U) == 0 && "Offset must not be unsigned.");
     assert((opcode_data->argument2_kind & Z) == 0 && "Offset can be zero.");
 
     if (arguments_count != 2) {
         emit_inline_rv32_error_exc(emit,
-            mp_obj_new_exception_msg_varg(&mp_type_SyntaxError,
-                MP_ERROR_TEXT("RV32 instruction '%q' requires %d arguments."), opcode, 2));
+            mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, ET_WRONG_ARGUMENTS_COUNT, opcode, 2));
         return;
     }
 
diff --git a/py/emitinlinethumb.c b/py/emitinlinethumb.c
index 7818bb4f46da8..d6596337ae5a6 100644
--- a/py/emitinlinethumb.c
+++ b/py/emitinlinethumb.c
@@ -150,27 +150,27 @@ typedef struct _reg_name_t { byte reg;
                              byte name[3];
 } reg_name_t;
 static const reg_name_t reg_name_table[] = {
-    {0, "r0\0"},
-    {1, "r1\0"},
-    {2, "r2\0"},
-    {3, "r3\0"},
-    {4, "r4\0"},
-    {5, "r5\0"},
-    {6, "r6\0"},
-    {7, "r7\0"},
-    {8, "r8\0"},
-    {9, "r9\0"},
-    {10, "r10"},
-    {11, "r11"},
-    {12, "r12"},
-    {13, "r13"},
-    {14, "r14"},
-    {15, "r15"},
-    {10, "sl\0"},
-    {11, "fp\0"},
-    {13, "sp\0"},
-    {14, "lr\0"},
-    {15, "pc\0"},
+    {0, {'r', '0' }},
+    {1, {'r', '1' }},
+    {2, {'r', '2' }},
+    {3, {'r', '3' }},
+    {4, {'r', '4' }},
+    {5, {'r', '5' }},
+    {6, {'r', '6' }},
+    {7, {'r', '7' }},
+    {8, {'r', '8' }},
+    {9, {'r', '9' }},
+    {10, {'r', '1', '0' }},
+    {11, {'r', '1', '1' }},
+    {12, {'r', '1', '2' }},
+    {13, {'r', '1', '3' }},
+    {14, {'r', '1', '4' }},
+    {15, {'r', '1', '5' }},
+    {10, {'s', 'l' }},
+    {11, {'f', 'p' }},
+    {13, {'s', 'p' }},
+    {14, {'l', 'r' }},
+    {15, {'p', 'c' }},
 };
 
 #define MAX_SPECIAL_REGISTER_NAME_LENGTH 7
@@ -368,20 +368,20 @@ typedef struct _cc_name_t { byte cc;
                             byte name[2];
 } cc_name_t;
 static const cc_name_t cc_name_table[] = {
-    { ASM_THUMB_CC_EQ, "eq" },
-    { ASM_THUMB_CC_NE, "ne" },
-    { ASM_THUMB_CC_CS, "cs" },
-    { ASM_THUMB_CC_CC, "cc" },
-    { ASM_THUMB_CC_MI, "mi" },
-    { ASM_THUMB_CC_PL, "pl" },
-    { ASM_THUMB_CC_VS, "vs" },
-    { ASM_THUMB_CC_VC, "vc" },
-    { ASM_THUMB_CC_HI, "hi" },
-    { ASM_THUMB_CC_LS, "ls" },
-    { ASM_THUMB_CC_GE, "ge" },
-    { ASM_THUMB_CC_LT, "lt" },
-    { ASM_THUMB_CC_GT, "gt" },
-    { ASM_THUMB_CC_LE, "le" },
+    { ASM_THUMB_CC_EQ, { 'e', 'q' }},
+    { ASM_THUMB_CC_NE, { 'n', 'e' }},
+    { ASM_THUMB_CC_CS, { 'c', 's' }},
+    { ASM_THUMB_CC_CC, { 'c', 'c' }},
+    { ASM_THUMB_CC_MI, { 'm', 'i' }},
+    { ASM_THUMB_CC_PL, { 'p', 'l' }},
+    { ASM_THUMB_CC_VS, { 'v', 's' }},
+    { ASM_THUMB_CC_VC, { 'v', 'c' }},
+    { ASM_THUMB_CC_HI, { 'h', 'i' }},
+    { ASM_THUMB_CC_LS, { 'l', 's' }},
+    { ASM_THUMB_CC_GE, { 'g', 'e' }},
+    { ASM_THUMB_CC_LT, { 'l', 't' }},
+    { ASM_THUMB_CC_GT, { 'g', 't' }},
+    { ASM_THUMB_CC_LE, { 'l', 'e' }},
 };
 
 typedef struct _format_4_op_t { byte op;
@@ -389,21 +389,21 @@ typedef struct _format_4_op_t { byte op;
 } format_4_op_t;
 #define X(x) (((x) >> 4) & 0xff) // only need 1 byte to distinguish these ops
 static const format_4_op_t format_4_op_table[] = {
-    { X(ASM_THUMB_FORMAT_4_EOR), "eor" },
-    { X(ASM_THUMB_FORMAT_4_LSL), "lsl" },
-    { X(ASM_THUMB_FORMAT_4_LSR), "lsr" },
-    { X(ASM_THUMB_FORMAT_4_ASR), "asr" },
-    { X(ASM_THUMB_FORMAT_4_ADC), "adc" },
-    { X(ASM_THUMB_FORMAT_4_SBC), "sbc" },
-    { X(ASM_THUMB_FORMAT_4_ROR), "ror" },
-    { X(ASM_THUMB_FORMAT_4_TST), "tst" },
-    { X(ASM_THUMB_FORMAT_4_NEG), "neg" },
-    { X(ASM_THUMB_FORMAT_4_CMP), "cmp" },
-    { X(ASM_THUMB_FORMAT_4_CMN), "cmn" },
-    { X(ASM_THUMB_FORMAT_4_ORR), "orr" },
-    { X(ASM_THUMB_FORMAT_4_MUL), "mul" },
-    { X(ASM_THUMB_FORMAT_4_BIC), "bic" },
-    { X(ASM_THUMB_FORMAT_4_MVN), "mvn" },
+    { X(ASM_THUMB_FORMAT_4_EOR), {'e', 'o', 'r' }},
+    { X(ASM_THUMB_FORMAT_4_LSL), {'l', 's', 'l' }},
+    { X(ASM_THUMB_FORMAT_4_LSR), {'l', 's', 'r' }},
+    { X(ASM_THUMB_FORMAT_4_ASR), {'a', 's', 'r' }},
+    { X(ASM_THUMB_FORMAT_4_ADC), {'a', 'd', 'c' }},
+    { X(ASM_THUMB_FORMAT_4_SBC), {'s', 'b', 'c' }},
+    { X(ASM_THUMB_FORMAT_4_ROR), {'r', 'o', 'r' }},
+    { X(ASM_THUMB_FORMAT_4_TST), {'t', 's', 't' }},
+    { X(ASM_THUMB_FORMAT_4_NEG), {'n', 'e', 'g' }},
+    { X(ASM_THUMB_FORMAT_4_CMP), {'c', 'm', 'p' }},
+    { X(ASM_THUMB_FORMAT_4_CMN), {'c', 'm', 'n' }},
+    { X(ASM_THUMB_FORMAT_4_ORR), {'o', 'r', 'r' }},
+    { X(ASM_THUMB_FORMAT_4_MUL), {'m', 'u', 'l' }},
+    { X(ASM_THUMB_FORMAT_4_BIC), {'b', 'i', 'c' }},
+    { X(ASM_THUMB_FORMAT_4_MVN), {'m', 'v', 'n' }},
 };
 #undef X
 
@@ -428,10 +428,10 @@ typedef struct _format_vfp_op_t {
     char name[3];
 } format_vfp_op_t;
 static const format_vfp_op_t format_vfp_op_table[] = {
-    { 0x30, "add" },
-    { 0x34, "sub" },
-    { 0x20, "mul" },
-    { 0x80, "div" },
+    { 0x30, {'a', 'd', 'd' }},
+    { 0x34, {'s', 'u', 'b' }},
+    { 0x20, {'m', 'u', 'l' }},
+    { 0x80, {'d', 'i', 'v' }},
 };
 
 // shorthand alias for whether we allow ARMv7-M instructions
diff --git a/py/emitinlinextensa.c b/py/emitinlinextensa.c
index 57056d597aab7..d0eb3d566fce3 100644
--- a/py/emitinlinextensa.c
+++ b/py/emitinlinextensa.c
@@ -115,50 +115,21 @@ static bool emit_inline_xtensa_label(emit_inline_asm_t *emit, mp_uint_t label_nu
     return true;
 }
 
-typedef struct _reg_name_t { byte reg;
-                             byte name[3];
-} reg_name_t;
-static const reg_name_t reg_name_table[] = {
-    {0, "a0\0"},
-    {1, "a1\0"},
-    {2, "a2\0"},
-    {3, "a3\0"},
-    {4, "a4\0"},
-    {5, "a5\0"},
-    {6, "a6\0"},
-    {7, "a7\0"},
-    {8, "a8\0"},
-    {9, "a9\0"},
-    {10, "a10"},
-    {11, "a11"},
-    {12, "a12"},
-    {13, "a13"},
-    {14, "a14"},
-    {15, "a15"},
+static const qstr_short_t REGISTERS[16] = {
+    MP_QSTR_a0, MP_QSTR_a1, MP_QSTR_a2, MP_QSTR_a3, MP_QSTR_a4, MP_QSTR_a5, MP_QSTR_a6, MP_QSTR_a7,
+    MP_QSTR_a8, MP_QSTR_a9, MP_QSTR_a10, MP_QSTR_a11, MP_QSTR_a12, MP_QSTR_a13, MP_QSTR_a14, MP_QSTR_a15
 };
 
-// return empty string in case of error, so we can attempt to parse the string
-// without a special check if it was in fact a string
-static const char *get_arg_str(mp_parse_node_t pn) {
-    if (MP_PARSE_NODE_IS_ID(pn)) {
-        qstr qst = MP_PARSE_NODE_LEAF_ARG(pn);
-        return qstr_str(qst);
-    } else {
-        return "";
-    }
-}
-
 static mp_uint_t get_arg_reg(emit_inline_asm_t *emit, const char *op, mp_parse_node_t pn) {
-    const char *reg_str = get_arg_str(pn);
-    for (mp_uint_t i = 0; i < MP_ARRAY_SIZE(reg_name_table); i++) {
-        const reg_name_t *r = &reg_name_table[i];
-        if (reg_str[0] == r->name[0]
-            && reg_str[1] == r->name[1]
-            && reg_str[2] == r->name[2]
-            && (reg_str[2] == '\0' || reg_str[3] == '\0')) {
-            return r->reg;
+    if (MP_PARSE_NODE_IS_ID(pn)) {
+        qstr node_qstr = MP_PARSE_NODE_LEAF_ARG(pn);
+        for (size_t i = 0; i < MP_ARRAY_SIZE(REGISTERS); i++) {
+            if (node_qstr == REGISTERS[i]) {
+                return i;
+            }
         }
     }
+
     emit_inline_xtensa_error_exc(emit,
         mp_obj_new_exception_msg_varg(&mp_type_SyntaxError,
             MP_ERROR_TEXT("'%s' expects a register"), op));
@@ -202,7 +173,7 @@ static int get_arg_label(emit_inline_asm_t *emit, const char *op, mp_parse_node_
 #define RRI8_B (2)
 
 typedef struct _opcode_table_3arg_t {
-    uint16_t name; // actually a qstr, which should fit in 16 bits
+    qstr_short_t name;
     uint8_t type;
     uint8_t a0 : 4;
     uint8_t a1 : 4;
@@ -216,6 +187,13 @@ static const opcode_table_3arg_t opcode_table_3arg[] = {
     {MP_QSTR_add, RRR, 0, 8},
     {MP_QSTR_sub, RRR, 0, 12},
     {MP_QSTR_mull, RRR, 2, 8},
+    {MP_QSTR_addx2, RRR, 0, 9},
+    {MP_QSTR_addx4, RRR, 0, 10},
+    {MP_QSTR_addx8, RRR, 0, 11},
+    {MP_QSTR_subx2, RRR, 0, 13},
+    {MP_QSTR_subx4, RRR, 0, 14},
+    {MP_QSTR_subx8, RRR, 0, 15},
+    {MP_QSTR_src, RRR, 1, 8},
 
     // load/store/addi opcodes: reg, reg, imm
     // upper nibble of type encodes the range of the immediate arg
@@ -237,21 +215,62 @@ static const opcode_table_3arg_t opcode_table_3arg[] = {
     {MP_QSTR_bge, RRI8_B, ASM_XTENSA_CC_GE, 0},
     {MP_QSTR_bgeu, RRI8_B, ASM_XTENSA_CC_GEU, 0},
     {MP_QSTR_blt, RRI8_B, ASM_XTENSA_CC_LT, 0},
+    {MP_QSTR_bltu, RRI8_B, ASM_XTENSA_CC_LTU, 0},
     {MP_QSTR_bnall, RRI8_B, ASM_XTENSA_CC_NALL, 0},
     {MP_QSTR_bne, RRI8_B, ASM_XTENSA_CC_NE, 0},
     {MP_QSTR_bnone, RRI8_B, ASM_XTENSA_CC_NONE, 0},
 };
 
+// The index of the first four qstrs matches the CCZ condition value to be
+// embedded into the opcode.
+static const qstr_short_t BCCZ_OPCODES[] = {
+    MP_QSTR_beqz, MP_QSTR_bnez, MP_QSTR_bltz, MP_QSTR_bgez,
+    MP_QSTR_beqz_n, MP_QSTR_bnez_n
+};
+
+#if MICROPY_EMIT_INLINE_XTENSA_UNCOMMON_OPCODES
+typedef struct _single_opcode_t {
+    qstr_short_t name;
+    uint16_t value;
+} single_opcode_t;
+
+static const single_opcode_t NOARGS_OPCODES[] = {
+    {MP_QSTR_dsync, 0x2030},
+    {MP_QSTR_esync, 0x2020},
+    {MP_QSTR_extw,  0x20D0},
+    {MP_QSTR_ill,   0x0000},
+    {MP_QSTR_isync, 0x2000},
+    {MP_QSTR_memw,  0x20C0},
+    {MP_QSTR_rsync, 0x2010},
+};
+#endif
+
 static void emit_inline_xtensa_op(emit_inline_asm_t *emit, qstr op, mp_uint_t n_args, mp_parse_node_t *pn_args) {
     size_t op_len;
     const char *op_str = (const char *)qstr_data(op, &op_len);
 
     if (n_args == 0) {
-        if (op == MP_QSTR_ret_n) {
+        if (op == MP_QSTR_ret_n || op == MP_QSTR_ret) {
             asm_xtensa_op_ret_n(&emit->as);
-        } else {
-            goto unknown_op;
+            return;
+        } else if (op == MP_QSTR_nop) {
+            asm_xtensa_op24(&emit->as, 0x20F0);
+            return;
+        } else if (op == MP_QSTR_nop_n) {
+            asm_xtensa_op16(&emit->as, 0xF03D);
+            return;
         }
+        #if MICROPY_EMIT_INLINE_XTENSA_UNCOMMON_OPCODES
+        for (size_t index = 0; index < MP_ARRAY_SIZE(NOARGS_OPCODES); index++) {
+            const single_opcode_t *opcode = &NOARGS_OPCODES[index];
+            if (op == opcode->name) {
+                asm_xtensa_op24(&emit->as, opcode->value);
+                return;
+            }
+        }
+        #endif
+
+        goto unknown_op;
 
     } else if (n_args == 1) {
         if (op == MP_QSTR_callx0) {
@@ -263,19 +282,45 @@ static void emit_inline_xtensa_op(emit_inline_asm_t *emit, qstr op, mp_uint_t n_
         } else if (op == MP_QSTR_jx) {
             uint r0 = get_arg_reg(emit, op_str, pn_args[0]);
             asm_xtensa_op_jx(&emit->as, r0);
+        } else if (op == MP_QSTR_ssl) {
+            mp_uint_t r0 = get_arg_reg(emit, op_str, pn_args[0]);
+            asm_xtensa_op_ssl(&emit->as, r0);
+        } else if (op == MP_QSTR_ssr) {
+            mp_uint_t r0 = get_arg_reg(emit, op_str, pn_args[0]);
+            asm_xtensa_op_ssr(&emit->as, r0);
+        } else if (op == MP_QSTR_ssai) {
+            mp_uint_t sa = get_arg_i(emit, op_str, pn_args[0], 0, 31);
+            asm_xtensa_op24(&emit->as, ASM_XTENSA_ENCODE_RRR(0, 0, 4, 4, sa & 0x0F, (sa >> 4) & 0x01));
+        } else if (op == MP_QSTR_ssa8b) {
+            mp_uint_t r0 = get_arg_reg(emit, op_str, pn_args[0]);
+            asm_xtensa_op24(&emit->as, ASM_XTENSA_ENCODE_RRR(0, 0, 4, 3, r0, 0));
+        } else if (op == MP_QSTR_ssa8l) {
+            mp_uint_t r0 = get_arg_reg(emit, op_str, pn_args[0]);
+            asm_xtensa_op24(&emit->as, ASM_XTENSA_ENCODE_RRR(0, 0, 4, 2, r0, 0));
+        } else if (op == MP_QSTR_call0) {
+            mp_uint_t label = get_arg_label(emit, op_str, pn_args[0]);
+            asm_xtensa_call0(&emit->as, label);
+        #if MICROPY_EMIT_INLINE_XTENSA_UNCOMMON_OPCODES
+        } else if (op == MP_QSTR_fsync) {
+            mp_uint_t imm3 = get_arg_i(emit, op_str, pn_args[0], 0, 7);
+            asm_xtensa_op24(&emit->as, ASM_XTENSA_ENCODE_RRR(0, 0, 0, 2, 8 | imm3, 0));
+        } else if (op == MP_QSTR_ill_n) {
+            asm_xtensa_op16(&emit->as, 0xF06D);
+        #endif
         } else {
             goto unknown_op;
         }
 
     } else if (n_args == 2) {
         uint r0 = get_arg_reg(emit, op_str, pn_args[0]);
-        if (op == MP_QSTR_beqz) {
-            int label = get_arg_label(emit, op_str, pn_args[1]);
-            asm_xtensa_bccz_reg_label(&emit->as, ASM_XTENSA_CCZ_EQ, r0, label);
-        } else if (op == MP_QSTR_bnez) {
-            int label = get_arg_label(emit, op_str, pn_args[1]);
-            asm_xtensa_bccz_reg_label(&emit->as, ASM_XTENSA_CCZ_NE, r0, label);
-        } else if (op == MP_QSTR_mov || op == MP_QSTR_mov_n) {
+        for (size_t index = 0; index < MP_ARRAY_SIZE(BCCZ_OPCODES); index++) {
+            if (op == BCCZ_OPCODES[index]) {
+                mp_uint_t label = get_arg_label(emit, op_str, pn_args[1]);
+                asm_xtensa_bccz_reg_label(&emit->as, index & 0x03, r0, label);
+                return;
+            }
+        }
+        if (op == MP_QSTR_mov || op == MP_QSTR_mov_n) {
             // we emit mov.n for both "mov" and "mov_n" opcodes
             uint r1 = get_arg_reg(emit, op_str, pn_args[1]);
             asm_xtensa_op_mov_n(&emit->as, r0, r1);
@@ -283,7 +328,53 @@ static void emit_inline_xtensa_op(emit_inline_asm_t *emit, qstr op, mp_uint_t n_
             // for convenience we emit l32r if the integer doesn't fit in movi
             uint32_t imm = get_arg_i(emit, op_str, pn_args[1], 0, 0);
             asm_xtensa_mov_reg_i32(&emit->as, r0, imm);
-        } else {
+        } else if (op == MP_QSTR_abs_) {
+            mp_uint_t r1 = get_arg_reg(emit, op_str, pn_args[1]);
+            asm_xtensa_op24(&emit->as, ASM_XTENSA_ENCODE_RRR(0, 0, 6, r0, 1, r1));
+        } else if (op == MP_QSTR_neg) {
+            mp_uint_t r1 = get_arg_reg(emit, op_str, pn_args[1]);
+            asm_xtensa_op24(&emit->as, ASM_XTENSA_ENCODE_RRR(0, 0, 6, r0, 0, r1));
+        } else if (op == MP_QSTR_sll) {
+            mp_uint_t r1 = get_arg_reg(emit, op_str, pn_args[1]);
+            asm_xtensa_op24(&emit->as, ASM_XTENSA_ENCODE_RRR(0, 1, 10, r0, r1, 0));
+        } else if (op == MP_QSTR_sra) {
+            mp_uint_t r1 = get_arg_reg(emit, op_str, pn_args[1]);
+            asm_xtensa_op24(&emit->as, ASM_XTENSA_ENCODE_RRR(0, 1, 11, r0, 0, r1));
+        } else if (op == MP_QSTR_srl) {
+            mp_uint_t r1 = get_arg_reg(emit, op_str, pn_args[1]);
+            asm_xtensa_op24(&emit->as, ASM_XTENSA_ENCODE_RRR(0, 1, 9, r0, 0, r1));
+        } else if (op == MP_QSTR_nsa) {
+            mp_uint_t r1 = get_arg_reg(emit, op_str, pn_args[1]);
+            asm_xtensa_op24(&emit->as, ASM_XTENSA_ENCODE_RRR(0, 0, 4, 14, r1, r0));
+        } else if (op == MP_QSTR_nsau) {
+            mp_uint_t r1 = get_arg_reg(emit, op_str, pn_args[1]);
+            asm_xtensa_op24(&emit->as, ASM_XTENSA_ENCODE_RRR(0, 0, 4, 15, r1, r0));
+        } else if (op == MP_QSTR_l32r) {
+            mp_uint_t label = get_arg_label(emit, op_str, pn_args[1]);
+            asm_xtensa_l32r(&emit->as, r0, label);
+        } else if (op == MP_QSTR_movi_n) {
+            mp_int_t imm = get_arg_i(emit, op_str, pn_args[1], -32, 95);
+            asm_xtensa_op_movi_n(&emit->as, r0, imm);
+        } else
+        #if MICROPY_EMIT_INLINE_XTENSA_UNCOMMON_OPCODES
+        if (op == MP_QSTR_rsr) {
+            mp_uint_t sr = get_arg_i(emit, op_str, pn_args[1], 0, 255);
+            asm_xtensa_op24(&emit->as, ASM_XTENSA_ENCODE_RSR(0, 3, 0, sr, r0));
+        } else if (op == MP_QSTR_rur) {
+            mp_uint_t imm8 = get_arg_i(emit, op_str, pn_args[1], 0, 255);
+            asm_xtensa_op24(&emit->as, ASM_XTENSA_ENCODE_RRR(0, 3, 14, r0, (imm8 >> 4) & 0x0F, imm8 & 0x0F));
+        } else if (op == MP_QSTR_wsr) {
+            mp_uint_t sr = get_arg_i(emit, op_str, pn_args[1], 0, 255);
+            asm_xtensa_op24(&emit->as, ASM_XTENSA_ENCODE_RSR(0, 3, 1, sr, r0));
+        } else if (op == MP_QSTR_wur) {
+            mp_uint_t sr = get_arg_i(emit, op_str, pn_args[1], 0, 255);
+            asm_xtensa_op24(&emit->as, ASM_XTENSA_ENCODE_RSR(0, 3, 15, sr, r0));
+        } else if (op == MP_QSTR_xsr) {
+            mp_uint_t sr = get_arg_i(emit, op_str, pn_args[1], 0, 255);
+            asm_xtensa_op24(&emit->as, ASM_XTENSA_ENCODE_RSR(0, 1, 6, sr, r0));
+        } else
+        #endif
+        {
             goto unknown_op;
         }
 
@@ -317,7 +408,72 @@ static void emit_inline_xtensa_op(emit_inline_asm_t *emit, qstr op, mp_uint_t n_
                 return;
             }
         }
-        goto unknown_op;
+
+        if (op == MP_QSTR_add_n) {
+            mp_uint_t r0 = get_arg_reg(emit, op_str, pn_args[0]);
+            mp_uint_t r1 = get_arg_reg(emit, op_str, pn_args[1]);
+            mp_uint_t r2 = get_arg_reg(emit, op_str, pn_args[2]);
+            asm_xtensa_op16(&emit->as, ASM_XTENSA_ENCODE_RRRN(10, r0, r1, r2));
+        } else if (op == MP_QSTR_addi_n) {
+            mp_uint_t r0 = get_arg_reg(emit, op_str, pn_args[0]);
+            mp_uint_t r1 = get_arg_reg(emit, op_str, pn_args[1]);
+            mp_int_t imm4 = get_arg_i(emit, op_str, pn_args[2], -1, 15);
+            asm_xtensa_op16(&emit->as, ASM_XTENSA_ENCODE_RRRN(11, r0, r1, (imm4 != 0 ? imm4 : -1)));
+        } else if (op == MP_QSTR_addmi) {
+            mp_uint_t r0 = get_arg_reg(emit, op_str, pn_args[0]);
+            mp_uint_t r1 = get_arg_reg(emit, op_str, pn_args[1]);
+            mp_int_t imm8 = get_arg_i(emit, op_str, pn_args[2], -128 * 256, 127 * 256);
+            if ((imm8 & 0xFF) != 0) {
+                emit_inline_xtensa_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, MP_ERROR_TEXT("%d is not a multiple of %d"), imm8, 256));
+            } else {
+                asm_xtensa_op24(&emit->as, ASM_XTENSA_ENCODE_RRI8(2, 13, r1, r0, imm8 >> 8));
+            }
+        } else if (op == MP_QSTR_bbci) {
+            mp_uint_t r0 = get_arg_reg(emit, op_str, pn_args[0]);
+            mp_uint_t bit = get_arg_i(emit, op_str, pn_args[1], 0, 31);
+            mp_int_t label = get_arg_label(emit, op_str, pn_args[2]);
+            asm_xtensa_bit_branch(&emit->as, r0, bit, label, 6);
+        } else if (op == MP_QSTR_bbsi) {
+            mp_uint_t r0 = get_arg_reg(emit, op_str, pn_args[0]);
+            mp_uint_t bit = get_arg_i(emit, op_str, pn_args[1], 0, 31);
+            mp_uint_t label = get_arg_label(emit, op_str, pn_args[2]);
+            asm_xtensa_bit_branch(&emit->as, r0, bit, label, 14);
+        } else if (op == MP_QSTR_slli) {
+            mp_uint_t r0 = get_arg_reg(emit, op_str, pn_args[0]);
+            mp_uint_t r1 = get_arg_reg(emit, op_str, pn_args[1]);
+            mp_uint_t bits = 32 - get_arg_i(emit, op_str, pn_args[2], 1, 31);
+            asm_xtensa_op24(&emit->as, ASM_XTENSA_ENCODE_RRR(0, 1, 0 | ((bits >> 4) & 0x01), r0, r1, bits & 0x0F));
+        } else if (op == MP_QSTR_srai) {
+            mp_uint_t r0 = get_arg_reg(emit, op_str, pn_args[0]);
+            mp_uint_t r1 = get_arg_reg(emit, op_str, pn_args[1]);
+            mp_uint_t bits = get_arg_i(emit, op_str, pn_args[2], 0, 31);
+            asm_xtensa_op24(&emit->as, ASM_XTENSA_ENCODE_RRR(0, 1, 2 | ((bits >> 4) & 0x01), r0, bits & 0x0F, r1));
+        } else if (op == MP_QSTR_srli) {
+            mp_uint_t r0 = get_arg_reg(emit, op_str, pn_args[0]);
+            mp_uint_t r1 = get_arg_reg(emit, op_str, pn_args[1]);
+            mp_uint_t bits = get_arg_i(emit, op_str, pn_args[2], 0, 15);
+            asm_xtensa_op24(&emit->as, ASM_XTENSA_ENCODE_RRR(0, 1, 4, r0, bits, r1));
+        } else if (op == MP_QSTR_l32i_n) {
+            mp_uint_t r0 = get_arg_reg(emit, op_str, pn_args[0]);
+            mp_uint_t r1 = get_arg_reg(emit, op_str, pn_args[1]);
+            mp_uint_t imm = get_arg_i(emit, op_str, pn_args[2], 0, 60);
+            if ((imm & 0x03) != 0) {
+                emit_inline_xtensa_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, MP_ERROR_TEXT("%d is not a multiple of %d"), imm, 4));
+            } else {
+                asm_xtensa_op_l32i_n(&emit->as, r0, r1, imm >> 2);
+            }
+        } else if (op == MP_QSTR_s32i_n) {
+            mp_uint_t r0 = get_arg_reg(emit, op_str, pn_args[0]);
+            mp_uint_t r1 = get_arg_reg(emit, op_str, pn_args[1]);
+            mp_uint_t imm = get_arg_i(emit, op_str, pn_args[2], 0, 60);
+            if ((imm & 0x03) != 0) {
+                emit_inline_xtensa_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, MP_ERROR_TEXT("%d is not a multiple of %d"), imm, 4));
+            } else {
+                asm_xtensa_op_s32i_n(&emit->as, r0, r1, imm >> 2);
+            }
+        } else {
+            goto unknown_op;
+        }
 
     } else {
         goto unknown_op;
diff --git a/py/emitnative.c b/py/emitnative.c
index 1aab0a9eb7865..4b470f3c93522 100644
--- a/py/emitnative.c
+++ b/py/emitnative.c
@@ -1537,25 +1537,24 @@ static void emit_native_load_subscr(emit_t *emit) {
             switch (vtype_base) {
                 case VTYPE_PTR8: {
                     // pointer to 8-bit memory
-                    // TODO optimise to use thumb ldrb r1, [r2, r3]
+                    #if N_THUMB
+                    if (index_value >= 0 && index_value < 32) {
+                        asm_thumb_ldrb_rlo_rlo_i5(emit->as, REG_RET, reg_base, index_value);
+                        break;
+                    }
+                    #elif N_RV32
+                    if (FIT_SIGNED(index_value, 12)) {
+                        asm_rv32_opcode_lbu(emit->as, REG_RET, reg_base, index_value);
+                        break;
+                    }
+                    #elif N_XTENSA || N_XTENSAWIN
+                    if (index_value >= 0 && index_value < 256) {
+                        asm_xtensa_op_l8ui(emit->as, REG_RET, reg_base, index_value);
+                        break;
+                    }
+                    #endif
                     if (index_value != 0) {
                         // index is non-zero
-                        #if N_THUMB
-                        if (index_value > 0 && index_value < 32) {
-                            asm_thumb_ldrb_rlo_rlo_i5(emit->as, REG_RET, reg_base, index_value);
-                            break;
-                        }
-                        #elif N_RV32
-                        if (FIT_SIGNED(index_value, 12)) {
-                            asm_rv32_opcode_lbu(emit->as, REG_RET, reg_base, index_value);
-                            break;
-                        }
-                        #elif N_XTENSA || N_XTENSAWIN
-                        if (index_value > 0 && index_value < 256) {
-                            asm_xtensa_op_l8ui(emit->as, REG_RET, reg_base, index_value);
-                            break;
-                        }
-                        #endif
                         need_reg_single(emit, reg_index, 0);
                         ASM_MOV_REG_IMM(emit->as, reg_index, index_value);
                         ASM_ADD_REG_REG(emit->as, reg_index, reg_base); // add index to base
@@ -1566,24 +1565,24 @@ static void emit_native_load_subscr(emit_t *emit) {
                 }
                 case VTYPE_PTR16: {
                     // pointer to 16-bit memory
+                    #if N_THUMB
+                    if (index_value >= 0 && index_value < 32) {
+                        asm_thumb_ldrh_rlo_rlo_i5(emit->as, REG_RET, reg_base, index_value);
+                        break;
+                    }
+                    #elif N_RV32
+                    if (FIT_SIGNED(index_value, 11)) {
+                        asm_rv32_opcode_lhu(emit->as, REG_RET, reg_base, index_value << 1);
+                        break;
+                    }
+                    #elif N_XTENSA || N_XTENSAWIN
+                    if (index_value >= 0 && index_value < 256) {
+                        asm_xtensa_op_l16ui(emit->as, REG_RET, reg_base, index_value);
+                        break;
+                    }
+                    #endif
                     if (index_value != 0) {
                         // index is a non-zero immediate
-                        #if N_THUMB
-                        if (index_value > 0 && index_value < 32) {
-                            asm_thumb_ldrh_rlo_rlo_i5(emit->as, REG_RET, reg_base, index_value);
-                            break;
-                        }
-                        #elif N_RV32
-                        if (FIT_SIGNED(index_value, 11)) {
-                            asm_rv32_opcode_lhu(emit->as, REG_RET, reg_base, index_value << 1);
-                            break;
-                        }
-                        #elif N_XTENSA || N_XTENSAWIN
-                        if (index_value > 0 && index_value < 256) {
-                            asm_xtensa_op_l16ui(emit->as, REG_RET, reg_base, index_value);
-                            break;
-                        }
-                        #endif
                         need_reg_single(emit, reg_index, 0);
                         ASM_MOV_REG_IMM(emit->as, reg_index, index_value << 1);
                         ASM_ADD_REG_REG(emit->as, reg_index, reg_base); // add 2*index to base
@@ -1594,24 +1593,24 @@ static void emit_native_load_subscr(emit_t *emit) {
                 }
                 case VTYPE_PTR32: {
                     // pointer to 32-bit memory
+                    #if N_THUMB
+                    if (index_value >= 0 && index_value < 32) {
+                        asm_thumb_ldr_rlo_rlo_i5(emit->as, REG_RET, reg_base, index_value);
+                        break;
+                    }
+                    #elif N_RV32
+                    if (FIT_SIGNED(index_value, 10)) {
+                        asm_rv32_opcode_lw(emit->as, REG_RET, reg_base, index_value << 2);
+                        break;
+                    }
+                    #elif N_XTENSA || N_XTENSAWIN
+                    if (index_value >= 0 && index_value < 256) {
+                        asm_xtensa_l32i_optimised(emit->as, REG_RET, reg_base, index_value);
+                        break;
+                    }
+                    #endif
                     if (index_value != 0) {
                         // index is a non-zero immediate
-                        #if N_THUMB
-                        if (index_value > 0 && index_value < 32) {
-                            asm_thumb_ldr_rlo_rlo_i5(emit->as, REG_RET, reg_base, index_value);
-                            break;
-                        }
-                        #elif N_RV32
-                        if (FIT_SIGNED(index_value, 10)) {
-                            asm_rv32_opcode_lw(emit->as, REG_RET, reg_base, index_value << 2);
-                            break;
-                        }
-                        #elif N_XTENSA || N_XTENSAWIN
-                        if (index_value > 0 && index_value < 256) {
-                            asm_xtensa_l32i_optimised(emit->as, REG_RET, reg_base, index_value);
-                            break;
-                        }
-                        #endif
                         need_reg_single(emit, reg_index, 0);
                         ASM_MOV_REG_IMM(emit->as, reg_index, index_value << 2);
                         ASM_ADD_REG_REG(emit->as, reg_index, reg_base); // add 4*index to base
@@ -1638,40 +1637,36 @@ static void emit_native_load_subscr(emit_t *emit) {
             switch (vtype_base) {
                 case VTYPE_PTR8: {
                     // pointer to 8-bit memory
-                    // TODO optimise to use thumb ldrb r1, [r2, r3]
+                    #ifdef ASM_LOAD8_REG_REG_REG
+                    ASM_LOAD8_REG_REG_REG(emit->as, REG_RET, REG_ARG_1, reg_index);
+                    #else
                     ASM_ADD_REG_REG(emit->as, REG_ARG_1, reg_index); // add index to base
                     ASM_LOAD8_REG_REG(emit->as, REG_RET, REG_ARG_1); // store value to (base+index)
+                    #endif
                     break;
                 }
                 case VTYPE_PTR16: {
                     // pointer to 16-bit memory
-                    #if N_XTENSA || N_XTENSAWIN
-                    asm_xtensa_op_addx2(emit->as, REG_ARG_1, reg_index, REG_ARG_1);
-                    asm_xtensa_op_l16ui(emit->as, REG_RET, REG_ARG_1, 0);
-                    break;
-                    #endif
+                    #ifdef ASM_LOAD16_REG_REG_REG
+                    ASM_LOAD16_REG_REG_REG(emit->as, REG_RET, REG_ARG_1, reg_index);
+                    #else
                     ASM_ADD_REG_REG(emit->as, REG_ARG_1, reg_index); // add index to base
                     ASM_ADD_REG_REG(emit->as, REG_ARG_1, reg_index); // add index to base
                     ASM_LOAD16_REG_REG(emit->as, REG_RET, REG_ARG_1); // load from (base+2*index)
+                    #endif
                     break;
                 }
                 case VTYPE_PTR32: {
                     // pointer to word-size memory
-                    #if N_RV32
-                    asm_rv32_opcode_slli(emit->as, REG_TEMP2, reg_index, 2);
-                    asm_rv32_opcode_cadd(emit->as, REG_ARG_1, REG_TEMP2);
-                    asm_rv32_opcode_lw(emit->as, REG_RET, REG_ARG_1, 0);
-                    break;
-                    #elif N_XTENSA || N_XTENSAWIN
-                    asm_xtensa_op_addx4(emit->as, REG_ARG_1, reg_index, REG_ARG_1);
-                    asm_xtensa_op_l32i_n(emit->as, REG_RET, REG_ARG_1, 0);
-                    break;
-                    #endif
+                    #ifdef ASM_LOAD32_REG_REG_REG
+                    ASM_LOAD32_REG_REG_REG(emit->as, REG_RET, REG_ARG_1, reg_index);
+                    #else
                     ASM_ADD_REG_REG(emit->as, REG_ARG_1, reg_index); // add index to base
                     ASM_ADD_REG_REG(emit->as, REG_ARG_1, reg_index); // add index to base
                     ASM_ADD_REG_REG(emit->as, REG_ARG_1, reg_index); // add index to base
                     ASM_ADD_REG_REG(emit->as, REG_ARG_1, reg_index); // add index to base
                     ASM_LOAD32_REG_REG(emit->as, REG_RET, REG_ARG_1); // load from (base+4*index)
+                    #endif
                     break;
                 }
                 default:
@@ -1815,28 +1810,28 @@ static void emit_native_store_subscr(emit_t *emit) {
                 case VTYPE_PTR8: {
                     // pointer to 8-bit memory
                     // TODO optimise to use thumb strb r1, [r2, r3]
+                    #if N_THUMB
+                    if (index_value >= 0 && index_value < 32) {
+                        asm_thumb_strb_rlo_rlo_i5(emit->as, reg_value, reg_base, index_value);
+                        break;
+                    }
+                    #elif N_RV32
+                    if (FIT_SIGNED(index_value, 12)) {
+                        asm_rv32_opcode_sb(emit->as, reg_value, reg_base, index_value);
+                        break;
+                    }
+                    #elif N_XTENSA || N_XTENSAWIN
+                    if (index_value >= 0 && index_value < 256) {
+                        asm_xtensa_op_s8i(emit->as, reg_value, reg_base, index_value);
+                        break;
+                    }
+                    #endif
                     if (index_value != 0) {
                         // index is non-zero
-                        #if N_THUMB
-                        if (index_value > 0 && index_value < 32) {
-                            asm_thumb_strb_rlo_rlo_i5(emit->as, reg_value, reg_base, index_value);
-                            break;
-                        }
-                        #elif N_RV32
-                        if (FIT_SIGNED(index_value, 12)) {
-                            asm_rv32_opcode_sb(emit->as, reg_value, reg_base, index_value);
-                            break;
-                        }
-                        #elif N_XTENSA || N_XTENSAWIN
-                        if (index_value > 0 && index_value < 256) {
-                            asm_xtensa_op_s8i(emit->as, REG_RET, reg_base, index_value);
-                            break;
-                        }
-                        #endif
                         ASM_MOV_REG_IMM(emit->as, reg_index, index_value);
                         #if N_ARM
                         asm_arm_strb_reg_reg_reg(emit->as, reg_value, reg_base, reg_index);
-                        return;
+                        break;
                         #endif
                         ASM_ADD_REG_REG(emit->as, reg_index, reg_base); // add index to base
                         reg_base = reg_index;
@@ -1846,24 +1841,24 @@ static void emit_native_store_subscr(emit_t *emit) {
                 }
                 case VTYPE_PTR16: {
                     // pointer to 16-bit memory
+                    #if N_THUMB
+                    if (index_value >= 0 && index_value < 32) {
+                        asm_thumb_strh_rlo_rlo_i5(emit->as, reg_value, reg_base, index_value);
+                        break;
+                    }
+                    #elif N_RV32
+                    if (FIT_SIGNED(index_value, 11)) {
+                        asm_rv32_opcode_sh(emit->as, reg_value, reg_base, index_value << 1);
+                        break;
+                    }
+                    #elif N_XTENSA || N_XTENSAWIN
+                    if (index_value >= 0 && index_value < 256) {
+                        asm_xtensa_op_s16i(emit->as, reg_value, reg_base, index_value);
+                        break;
+                    }
+                    #endif
                     if (index_value != 0) {
                         // index is a non-zero immediate
-                        #if N_THUMB
-                        if (index_value > 0 && index_value < 32) {
-                            asm_thumb_strh_rlo_rlo_i5(emit->as, reg_value, reg_base, index_value);
-                            break;
-                        }
-                        #elif N_RV32
-                        if (FIT_SIGNED(index_value, 11)) {
-                            asm_rv32_opcode_sh(emit->as, reg_value, reg_base, index_value << 1);
-                            break;
-                        }
-                        #elif N_XTENSA || N_XTENSAWIN
-                        if (index_value > 0 && index_value < 256) {
-                            asm_xtensa_op_s16i(emit->as, REG_RET, reg_base, index_value);
-                            break;
-                        }
-                        #endif
                         ASM_MOV_REG_IMM(emit->as, reg_index, index_value << 1);
                         ASM_ADD_REG_REG(emit->as, reg_index, reg_base); // add 2*index to base
                         reg_base = reg_index;
@@ -1873,27 +1868,28 @@ static void emit_native_store_subscr(emit_t *emit) {
                 }
                 case VTYPE_PTR32: {
                     // pointer to 32-bit memory
+                    #if N_THUMB
+                    if (index_value >= 0 && index_value < 32) {
+                        asm_thumb_str_rlo_rlo_i5(emit->as, reg_value, reg_base, index_value);
+                        break;
+                    }
+                    #elif N_RV32
+                    if (FIT_SIGNED(index_value, 10)) {
+                        asm_rv32_opcode_sw(emit->as, reg_value, reg_base, index_value << 2);
+                        break;
+                    }
+                    #elif N_XTENSA || N_XTENSAWIN
+                    if (index_value >= 0 && index_value < 256) {
+                        asm_xtensa_s32i_optimised(emit->as, reg_value, reg_base, index_value);
+                        break;
+                    }
+                    #endif
                     if (index_value != 0) {
                         // index is a non-zero immediate
-                        #if N_THUMB
-                        if (index_value > 0 && index_value < 32) {
-                            asm_thumb_str_rlo_rlo_i5(emit->as, reg_value, reg_base, index_value);
-                            break;
-                        }
-                        #elif N_RV32
-                        if (FIT_SIGNED(index_value, 10)) {
-                            asm_rv32_opcode_sw(emit->as, reg_value, reg_base, index_value << 2);
-                            break;
-                        }
-                        #elif N_XTENSA || N_XTENSAWIN
-                        if (index_value > 0 && index_value < 256) {
-                            asm_xtensa_s32i_optimised(emit->as, REG_RET, reg_base, index_value);
-                            break;
-                        }
-                        #elif N_ARM
+                        #if N_ARM
                         ASM_MOV_REG_IMM(emit->as, reg_index, index_value);
                         asm_arm_str_reg_reg_reg(emit->as, reg_value, reg_base, reg_index);
-                        return;
+                        break;
                         #endif
                         ASM_MOV_REG_IMM(emit->as, reg_index, index_value << 2);
                         ASM_ADD_REG_REG(emit->as, reg_index, reg_base); // add 4*index to base
@@ -1930,50 +1926,36 @@ static void emit_native_store_subscr(emit_t *emit) {
             switch (vtype_base) {
                 case VTYPE_PTR8: {
                     // pointer to 8-bit memory
-                    // TODO optimise to use thumb strb r1, [r2, r3]
-                    #if N_ARM
-                    asm_arm_strb_reg_reg_reg(emit->as, reg_value, REG_ARG_1, reg_index);
-                    break;
-                    #endif
+                    #ifdef ASM_STORE8_REG_REG_REG
+                    ASM_STORE8_REG_REG_REG(emit->as, reg_value, REG_ARG_1, reg_index);
+                    #else
                     ASM_ADD_REG_REG(emit->as, REG_ARG_1, reg_index); // add index to base
                     ASM_STORE8_REG_REG(emit->as, reg_value, REG_ARG_1); // store value to (base+index)
+                    #endif
                     break;
                 }
                 case VTYPE_PTR16: {
                     // pointer to 16-bit memory
-                    #if N_ARM
-                    asm_arm_strh_reg_reg_reg(emit->as, reg_value, REG_ARG_1, reg_index);
-                    break;
-                    #elif N_XTENSA || N_XTENSAWIN
-                    asm_xtensa_op_addx2(emit->as, REG_ARG_1, reg_index, REG_ARG_1);
-                    asm_xtensa_op_s16i(emit->as, reg_value, REG_ARG_1, 0);
-                    break;
-                    #endif
+                    #ifdef ASM_STORE16_REG_REG_REG
+                    ASM_STORE16_REG_REG_REG(emit->as, reg_value, REG_ARG_1, reg_index);
+                    #else
                     ASM_ADD_REG_REG(emit->as, REG_ARG_1, reg_index); // add index to base
                     ASM_ADD_REG_REG(emit->as, REG_ARG_1, reg_index); // add index to base
                     ASM_STORE16_REG_REG(emit->as, reg_value, REG_ARG_1); // store value to (base+2*index)
+                    #endif
                     break;
                 }
                 case VTYPE_PTR32: {
                     // pointer to 32-bit memory
-                    #if N_ARM
-                    asm_arm_str_reg_reg_reg(emit->as, reg_value, REG_ARG_1, reg_index);
-                    break;
-                    #elif N_RV32
-                    asm_rv32_opcode_slli(emit->as, REG_TEMP2, reg_index, 2);
-                    asm_rv32_opcode_cadd(emit->as, REG_ARG_1, REG_TEMP2);
-                    asm_rv32_opcode_sw(emit->as, reg_value, REG_ARG_1, 0);
-                    break;
-                    #elif N_XTENSA || N_XTENSAWIN
-                    asm_xtensa_op_addx4(emit->as, REG_ARG_1, reg_index, REG_ARG_1);
-                    asm_xtensa_op_s32i_n(emit->as, reg_value, REG_ARG_1, 0);
-                    break;
-                    #endif
+                    #ifdef ASM_STORE32_REG_REG_REG
+                    ASM_STORE32_REG_REG_REG(emit->as, reg_value, REG_ARG_1, reg_index);
+                    #else
                     ASM_ADD_REG_REG(emit->as, REG_ARG_1, reg_index); // add index to base
                     ASM_ADD_REG_REG(emit->as, REG_ARG_1, reg_index); // add index to base
                     ASM_ADD_REG_REG(emit->as, REG_ARG_1, reg_index); // add index to base
                     ASM_ADD_REG_REG(emit->as, REG_ARG_1, reg_index); // add index to base
                     ASM_STORE32_REG_REG(emit->as, reg_value, REG_ARG_1); // store value to (base+4*index)
+                    #endif
                     break;
                 }
                 default:
diff --git a/py/emitndebug.c b/py/emitndebug.c
index bd896a75c8ddf..c068a9a9a126e 100644
--- a/py/emitndebug.c
+++ b/py/emitndebug.c
@@ -251,8 +251,6 @@ static void asm_debug_setcc_reg_reg_reg(asm_debug_t *as, int op, int reg1, int r
 #define ASM_MUL_REG_REG(as, reg_dest, reg_src) \
     asm_debug_reg_reg(as, "mul", reg_dest, reg_src)
 
-#define ASM_LOAD_REG_REG(as, reg_dest, reg_base) \
-    asm_debug_reg_reg(as, "load", reg_dest, reg_base)
 #define ASM_LOAD_REG_REG_OFFSET(as, reg_dest, reg_base, word_offset) \
     asm_debug_reg_reg_offset(as, "load", reg_dest, reg_base, word_offset)
 #define ASM_LOAD8_REG_REG(as, reg_dest, reg_base) \
@@ -264,8 +262,6 @@ static void asm_debug_setcc_reg_reg_reg(asm_debug_t *as, int op, int reg1, int r
 #define ASM_LOAD32_REG_REG(as, reg_dest, reg_base) \
     asm_debug_reg_reg(as, "load32", reg_dest, reg_base)
 
-#define ASM_STORE_REG_REG(as, reg_src, reg_base) \
-    asm_debug_reg_reg(as, "store", reg_src, reg_base)
 #define ASM_STORE_REG_REG_OFFSET(as, reg_src, reg_base, word_offset) \
     asm_debug_reg_reg_offset(as, "store", reg_src, reg_base, word_offset)
 #define ASM_STORE8_REG_REG(as, reg_src, reg_base) \
diff --git a/py/makeqstrdata.py b/py/makeqstrdata.py
index 480344180a88a..3a9c7aff52536 100644
--- a/py/makeqstrdata.py
+++ b/py/makeqstrdata.py
@@ -9,17 +9,54 @@
 import re
 import sys
 
-# Python 2/3 compatibility:
+# Python 2/3/MicroPython compatibility:
 #   - iterating through bytes is different
-#   - codepoint2name lives in a different module
-import platform
-
-if platform.python_version_tuple()[0] == "2":
+#   - codepoint2name from html.entities is hard-coded
+if sys.version_info[0] == 2:
     bytes_cons = lambda val, enc=None: bytearray(val)
-    from htmlentitydefs import codepoint2name
-elif platform.python_version_tuple()[0] == "3":
+elif sys.version_info[0] == 3:  # Also handles MicroPython
     bytes_cons = bytes
-    from html.entities import codepoint2name
+
+# fmt: off
+codepoint2name = {
+    198: "AElig", 193: "Aacute", 194: "Acirc", 192: "Agrave", 913: "Alpha", 197: "Aring", 195: "Atilde",
+    196: "Auml", 914: "Beta", 199: "Ccedil", 935: "Chi", 8225: "Dagger", 916: "Delta", 208: "ETH",
+    201: "Eacute", 202: "Ecirc", 200: "Egrave", 917: "Epsilon", 919: "Eta", 203: "Euml", 915: "Gamma",
+    205: "Iacute", 206: "Icirc", 204: "Igrave", 921: "Iota", 207: "Iuml", 922: "Kappa", 923: "Lambda",
+    924: "Mu", 209: "Ntilde", 925: "Nu", 338: "OElig", 211: "Oacute", 212: "Ocirc", 210: "Ograve",
+    937: "Omega", 927: "Omicron", 216: "Oslash", 213: "Otilde", 214: "Ouml", 934: "Phi", 928: "Pi",
+    8243: "Prime", 936: "Psi", 929: "Rho", 352: "Scaron", 931: "Sigma", 222: "THORN", 932: "Tau",
+    920: "Theta", 218: "Uacute", 219: "Ucirc", 217: "Ugrave", 933: "Upsilon", 220: "Uuml", 926: "Xi",
+    221: "Yacute", 376: "Yuml", 918: "Zeta", 225: "aacute", 226: "acirc", 180: "acute", 230: "aelig",
+    224: "agrave", 8501: "alefsym", 945: "alpha", 38: "amp", 8743: "and", 8736: "ang", 229: "aring",
+    8776: "asymp", 227: "atilde", 228: "auml", 8222: "bdquo", 946: "beta", 166: "brvbar", 8226: "bull",
+    8745: "cap", 231: "ccedil", 184: "cedil", 162: "cent", 967: "chi", 710: "circ", 9827: "clubs",
+    8773: "cong", 169: "copy", 8629: "crarr", 8746: "cup", 164: "curren", 8659: "dArr", 8224: "dagger",
+    8595: "darr", 176: "deg", 948: "delta", 9830: "diams", 247: "divide", 233: "eacute", 234: "ecirc",
+    232: "egrave", 8709: "empty", 8195: "emsp", 8194: "ensp", 949: "epsilon", 8801: "equiv", 951: "eta",
+    240: "eth", 235: "euml", 8364: "euro", 8707: "exist", 402: "fnof", 8704: "forall", 189: "frac12",
+    188: "frac14", 190: "frac34", 8260: "frasl", 947: "gamma", 8805: "ge", 62: "gt", 8660: "hArr",
+    8596: "harr", 9829: "hearts", 8230: "hellip", 237: "iacute", 238: "icirc", 161: "iexcl", 236: "igrave",
+    8465: "image", 8734: "infin", 8747: "int", 953: "iota", 191: "iquest", 8712: "isin", 239: "iuml",
+    954: "kappa", 8656: "lArr", 955: "lambda", 9001: "lang", 171: "laquo", 8592: "larr", 8968: "lceil",
+    8220: "ldquo", 8804: "le", 8970: "lfloor", 8727: "lowast", 9674: "loz", 8206: "lrm", 8249: "lsaquo",
+    8216: "lsquo", 60: "lt", 175: "macr", 8212: "mdash", 181: "micro", 183: "middot", 8722: "minus",
+    956: "mu", 8711: "nabla", 160: "nbsp", 8211: "ndash", 8800: "ne", 8715: "ni", 172: "not", 8713: "notin",
+    8836: "nsub", 241: "ntilde", 957: "nu", 243: "oacute", 244: "ocirc", 339: "oelig", 242: "ograve",
+    8254: "oline", 969: "omega", 959: "omicron", 8853: "oplus", 8744: "or", 170: "ordf", 186: "ordm",
+    248: "oslash", 245: "otilde", 8855: "otimes", 246: "ouml", 182: "para", 8706: "part", 8240: "permil",
+    8869: "perp", 966: "phi", 960: "pi", 982: "piv", 177: "plusmn", 163: "pound", 8242: "prime",
+    8719: "prod", 8733: "prop", 968: "psi", 34: "quot", 8658: "rArr", 8730: "radic", 9002: "rang",
+    187: "raquo", 8594: "rarr", 8969: "rceil", 8221: "rdquo", 8476: "real", 174: "reg", 8971: "rfloor",
+    961: "rho", 8207: "rlm", 8250: "rsaquo", 8217: "rsquo", 8218: "sbquo", 353: "scaron", 8901: "sdot",
+    167: "sect", 173: "shy", 963: "sigma", 962: "sigmaf", 8764: "sim", 9824: "spades", 8834: "sub",
+    8838: "sube", 8721: "sum", 8835: "sup", 185: "sup1", 178: "sup2", 179: "sup3", 8839: "supe",
+    223: "szlig", 964: "tau", 8756: "there4", 952: "theta", 977: "thetasym", 8201: "thinsp", 254: "thorn",
+    732: "tilde", 215: "times", 8482: "trade", 8657: "uArr", 250: "uacute", 8593: "uarr", 251: "ucirc",
+    249: "ugrave", 168: "uml", 978: "upsih", 965: "upsilon", 252: "uuml", 8472: "weierp", 958: "xi",
+    253: "yacute", 165: "yen", 255: "yuml", 950: "zeta", 8205: "zwj", 8204: "zwnj"
+}
+# fmt: on
 # end compatibility code
 
 codepoint2name[ord("-")] = "hyphen"
@@ -295,6 +332,9 @@
     "<genexpr>",
 }
 
+# Matches any string that needs no escaping (alphanum + _ only)
+RE_NO_ESCAPE = re.compile(r"^[a-zA-Z0-9_]$")
+
 
 # this must match the equivalent function in qstr.c
 def compute_hash(qstr, bytes_hash):
@@ -307,15 +347,17 @@ def compute_hash(qstr, bytes_hash):
 
 
 def qstr_escape(qst):
-    def esc_char(m):
-        c = ord(m.group(0))
+    def esc_char(c):
+        if RE_NO_ESCAPE.match(c):
+            return c
+        c = ord(c)
         try:
             name = codepoint2name[c]
         except KeyError:
             name = "0x%02x" % c
         return "_" + name + "_"
 
-    return re.sub(r"[^A-Za-z0-9_]", esc_char, qst)
+    return "".join(map(esc_char, qst))
 
 
 static_qstr_list_ident = list(map(qstr_escape, static_qstr_list))
diff --git a/py/makeversionhdr.py b/py/makeversionhdr.py
index cb7325e416cb4..406a061a0948a 100644
--- a/py/makeversionhdr.py
+++ b/py/makeversionhdr.py
@@ -117,8 +117,8 @@ def make_version_header(repo_path, filename):
 
     build_date = datetime.date.today()
     if "SOURCE_DATE_EPOCH" in os.environ:
-        build_date = datetime.datetime.utcfromtimestamp(
-            int(os.environ["SOURCE_DATE_EPOCH"])
+        build_date = datetime.datetime.fromtimestamp(
+            int(os.environ["SOURCE_DATE_EPOCH"]), datetime.timezone.utc
         ).date()
 
     # Generate the file with the git and version info
diff --git a/py/malloc.c b/py/malloc.c
index f557ade44f500..05daeb35d098a 100644
--- a/py/malloc.c
+++ b/py/malloc.c
@@ -209,6 +209,31 @@ void m_free(void *ptr)
 
 #if MICROPY_TRACKED_ALLOC
 
+#if MICROPY_PY_THREAD && !MICROPY_PY_THREAD_GIL
+// If there's no GIL, use the GC recursive mutex to protect the tracked node linked list
+// under m_tracked_head.
+//
+// (For ports with GIL, the expectation is to only call tracked alloc functions
+// while holding the GIL.)
+
+static inline void m_tracked_node_lock(void) {
+    mp_thread_recursive_mutex_lock(&MP_STATE_MEM(gc_mutex), 1);
+}
+
+static inline void m_tracked_node_unlock(void) {
+    mp_thread_recursive_mutex_unlock(&MP_STATE_MEM(gc_mutex));
+}
+
+#else
+
+static inline void m_tracked_node_lock(void) {
+}
+
+static inline void m_tracked_node_unlock(void) {
+}
+
+#endif
+
 #define MICROPY_TRACKED_ALLOC_STORE_SIZE (!MICROPY_ENABLE_GC)
 
 typedef struct _m_tracked_node_t {
@@ -222,6 +247,7 @@ typedef struct _m_tracked_node_t {
 
 #if MICROPY_DEBUG_VERBOSE
 static size_t m_tracked_count_links(size_t *nb) {
+    m_tracked_node_lock();
     m_tracked_node_t *node = MP_STATE_VM(m_tracked_head);
     size_t n = 0;
     *nb = 0;
@@ -234,6 +260,7 @@ static size_t m_tracked_count_links(size_t *nb) {
         #endif
         node = node->next;
     }
+    m_tracked_node_unlock();
     return n;
 }
 #endif
@@ -248,12 +275,14 @@ void *m_tracked_calloc(size_t nmemb, size_t size) {
     size_t n = m_tracked_count_links(&nb);
     DEBUG_printf("m_tracked_calloc(%u, %u) -> (%u;%u) %p\n", (int)nmemb, (int)size, (int)n, (int)nb, node);
     #endif
+    m_tracked_node_lock();
     if (MP_STATE_VM(m_tracked_head) != NULL) {
         MP_STATE_VM(m_tracked_head)->prev = node;
     }
     node->prev = NULL;
     node->next = MP_STATE_VM(m_tracked_head);
     MP_STATE_VM(m_tracked_head) = node;
+    m_tracked_node_unlock();
     #if MICROPY_TRACKED_ALLOC_STORE_SIZE
     node->size = nmemb * size;
     #endif
@@ -278,7 +307,8 @@ void m_tracked_free(void *ptr_in) {
     size_t nb;
     size_t n = m_tracked_count_links(&nb);
     DEBUG_printf("m_tracked_free(%p, [%p, %p], nbytes=%u, links=%u;%u)\n", node, node->prev, node->next, (int)data_bytes, (int)n, (int)nb);
-    #endif
+    #endif // MICROPY_DEBUG_VERBOSE
+    m_tracked_node_lock();
     if (node->next != NULL) {
         node->next->prev = node->prev;
     }
@@ -287,6 +317,7 @@ void m_tracked_free(void *ptr_in) {
     } else {
         MP_STATE_VM(m_tracked_head) = node->next;
     }
+    m_tracked_node_unlock();
     m_free(node
         #if MICROPY_MALLOC_USES_ALLOCATED_SIZE
         #if MICROPY_TRACKED_ALLOC_STORE_SIZE
diff --git a/py/misc.h b/py/misc.h
index e05fbe61a9d6d..49f2f87111157 100644
--- a/py/misc.h
+++ b/py/misc.h
@@ -105,7 +105,7 @@ void *m_realloc(void *ptr, size_t new_num_bytes);
 void *m_realloc_maybe(void *ptr, size_t new_num_bytes, bool allow_move);
 void m_free(void *ptr);
 #endif
-NORETURN void m_malloc_fail(size_t num_bytes);
+MP_NORETURN void m_malloc_fail(size_t num_bytes);
 
 #if MICROPY_TRACKED_ALLOC
 // These alloc/free functions track the pointers in a linked list so the GC does not reclaim
diff --git a/py/mkrules.cmake b/py/mkrules.cmake
index 3ee4c4c31aa57..27d8b24f67ac8 100644
--- a/py/mkrules.cmake
+++ b/py/mkrules.cmake
@@ -14,11 +14,34 @@ set(MICROPY_MODULEDEFS "${MICROPY_GENHDR_DIR}/moduledefs.h")
 set(MICROPY_ROOT_POINTERS_SPLIT "${MICROPY_GENHDR_DIR}/root_pointers.split")
 set(MICROPY_ROOT_POINTERS_COLLECTED "${MICROPY_GENHDR_DIR}/root_pointers.collected")
 set(MICROPY_ROOT_POINTERS "${MICROPY_GENHDR_DIR}/root_pointers.h")
+set(MICROPY_COMPRESSED_SPLIT "${MICROPY_GENHDR_DIR}/compressed.split")
+set(MICROPY_COMPRESSED_COLLECTED "${MICROPY_GENHDR_DIR}/compressed.collected")
+set(MICROPY_COMPRESSED_DATA "${MICROPY_GENHDR_DIR}/compressed.data.h")
 
 if(NOT MICROPY_PREVIEW_VERSION_2)
     set(MICROPY_PREVIEW_VERSION_2 0)
 endif()
 
+# Set the board name.
+if(MICROPY_BOARD)
+    if(MICROPY_BOARD_VARIANT)
+        set(MICROPY_BOARD_BUILD_NAME ${MICROPY_BOARD}-${MICROPY_BOARD_VARIANT})
+    else()
+        set(MICROPY_BOARD_BUILD_NAME ${MICROPY_BOARD})
+    endif()
+
+    target_compile_definitions(${MICROPY_TARGET} PRIVATE
+        MICROPY_BOARD_BUILD_NAME="${MICROPY_BOARD_BUILD_NAME}"
+    )
+endif()
+
+# Need to do this before extracting MICROPY_CPP_DEF below.
+if(MICROPY_ROM_TEXT_COMPRESSION)
+    target_compile_definitions(${MICROPY_TARGET} PUBLIC
+        MICROPY_ROM_TEXT_COMPRESSION=\(1\)
+    )
+endif()
+
 # Need to do this before extracting MICROPY_CPP_DEF below. Rest of frozen
 # manifest handling is at the end of this file.
 if(MICROPY_FROZEN_MANIFEST)
@@ -53,6 +76,15 @@ foreach(_arg ${MICROPY_CPP_DEF})
 endforeach()
 list(APPEND MICROPY_CPP_FLAGS ${MICROPY_CPP_FLAGS_EXTRA})
 
+# Include anything passed in via CFLAGS_EXTRA
+# in both MICROPY_CPP_FLAGS and CMAKE_C_FLAGS
+if(DEFINED ENV{CFLAGS_EXTRA})
+  set(CFLAGS_EXTRA $ENV{CFLAGS_EXTRA})
+  string(APPEND CMAKE_C_FLAGS " ${CFLAGS_EXTRA}")  # ... not a list
+  separate_arguments(CFLAGS_EXTRA)
+  list(APPEND MICROPY_CPP_FLAGS ${CFLAGS_EXTRA})  # ... a list
+endif()
+
 find_package(Python3 REQUIRED COMPONENTS Interpreter)
 
 target_sources(${MICROPY_TARGET} PRIVATE
@@ -62,6 +94,12 @@ target_sources(${MICROPY_TARGET} PRIVATE
     ${MICROPY_ROOT_POINTERS}
 )
 
+if(MICROPY_ROM_TEXT_COMPRESSION)
+    target_sources(${MICROPY_TARGET} PRIVATE
+        ${MICROPY_COMPRESSED_DATA}
+    )
+endif()
+
 # Command to force the build of another command
 
 # Generate mpversion.h
@@ -175,6 +213,32 @@ add_custom_command(
     DEPENDS ${MICROPY_ROOT_POINTERS_COLLECTED} ${MICROPY_PY_DIR}/make_root_pointers.py
 )
 
+# Generate compressed.data.h
+
+add_custom_command(
+    OUTPUT ${MICROPY_COMPRESSED_SPLIT}
+    COMMAND ${Python3_EXECUTABLE} ${MICROPY_PY_DIR}/makeqstrdefs.py split compress ${MICROPY_QSTRDEFS_LAST} ${MICROPY_GENHDR_DIR}/compress _
+    COMMAND touch ${MICROPY_COMPRESSED_SPLIT}
+    DEPENDS ${MICROPY_QSTRDEFS_LAST}
+    VERBATIM
+    COMMAND_EXPAND_LISTS
+)
+
+add_custom_command(
+    OUTPUT ${MICROPY_COMPRESSED_COLLECTED}
+    COMMAND ${Python3_EXECUTABLE} ${MICROPY_PY_DIR}/makeqstrdefs.py cat compress _ ${MICROPY_GENHDR_DIR}/compress ${MICROPY_COMPRESSED_COLLECTED}
+    BYPRODUCTS "${MICROPY_COMPRESSED_COLLECTED}.hash"
+    DEPENDS ${MICROPY_COMPRESSED_SPLIT}
+    VERBATIM
+    COMMAND_EXPAND_LISTS
+)
+
+add_custom_command(
+    OUTPUT ${MICROPY_COMPRESSED_DATA}
+    COMMAND ${Python3_EXECUTABLE} ${MICROPY_PY_DIR}/makecompresseddata.py ${MICROPY_COMPRESSED_COLLECTED} > ${MICROPY_COMPRESSED_DATA}
+    DEPENDS ${MICROPY_COMPRESSED_COLLECTED} ${MICROPY_PY_DIR}/makecompresseddata.py
+)
+
 # Build frozen code if enabled
 
 if(MICROPY_FROZEN_MANIFEST)
@@ -187,16 +251,11 @@ if(MICROPY_FROZEN_MANIFEST)
     # Note: target_compile_definitions already added earlier.
 
     if(NOT MICROPY_LIB_DIR)
-        string(CONCAT GIT_SUBMODULES "${GIT_SUBMODULES} " lib/micropython-lib)
+        list(APPEND GIT_SUBMODULES lib/micropython-lib)
         set(MICROPY_LIB_DIR ${MICROPY_DIR}/lib/micropython-lib)
     endif()
 
-    if(ECHO_SUBMODULES)
-        # No-op, we're just doing submodule/variant discovery.
-        # Note: All the following rules are safe to run in discovery mode even
-        # though the submodule might not be available as they do not directly depend
-        # on anything from the submodule.
-    elseif(NOT EXISTS ${MICROPY_LIB_DIR}/README.md)
+    if(NOT UPDATE_SUBMODULES AND NOT EXISTS ${MICROPY_LIB_DIR}/README.md)
         message(FATAL_ERROR " micropython-lib not initialized.\n Run 'make BOARD=${MICROPY_BOARD} submodules'")
     endif()
 
@@ -250,12 +309,29 @@ if(MICROPY_FROZEN_MANIFEST)
     )
 endif()
 
-# Update submodules
-if(ECHO_SUBMODULES)
-    # If cmake is run with GIT_SUBMODULES defined on command line, process the port / board
-    # settings then print the final GIT_SUBMODULES variable and exit.
-    # Note: the GIT_SUBMODULES is done via echo rather than message, as message splits
-    # the output onto multiple lines
-    execute_process(COMMAND ${CMAKE_COMMAND} -E echo "GIT_SUBMODULES=${GIT_SUBMODULES}")
-    message(FATAL_ERROR "Done")
+# Update submodules, this is invoked on some ports via 'make submodules'.
+#
+# Note: This logic has a Makefile equivalent in py/mkrules.mk
+if(UPDATE_SUBMODULES AND GIT_SUBMODULES)
+    macro(run_git)
+      execute_process(COMMAND git ${ARGV} WORKING_DIRECTORY ${MICROPY_DIR}
+          RESULT_VARIABLE RES)
+    endmacro()
+
+    list(JOIN GIT_SUBMODULES " " GIT_SUBMODULES_MSG)
+    message("Updating submodules: ${GIT_SUBMODULES_MSG}")
+    run_git(submodule sync ${GIT_SUBMODULES})
+    if(RES EQUAL 0)
+        # If available, do blobless partial clones of submodules to save time and space.
+        # A blobless partial clone lazily fetches data as needed, but has all the metadata available (tags, etc.).
+        run_git(submodule update --init --filter=blob:none ${GIT_SUBMODULES})
+        # Fallback to standard submodule update if blobless isn't available (earlier than git 2.36.0)
+        if (NOT RES EQUAL 0)
+            run_git(submodule update --init ${GIT_SUBMODULES})
+        endif()
+    endif()
+
+    if (NOT RES EQUAL 0)
+        message(FATAL_ERROR "Submodule update failed")
+    endif()
 endif()
diff --git a/py/mkrules.mk b/py/mkrules.mk
index e9504ce39f839..495d8d48bd2fc 100644
--- a/py/mkrules.mk
+++ b/py/mkrules.mk
@@ -27,6 +27,17 @@ OBJ_EXTRA_ORDER_DEPS += $(HEADER_BUILD)/compressed.data.h
 CFLAGS += -DMICROPY_ROM_TEXT_COMPRESSION=1
 endif
 
+# Set the variant or board name.
+ifneq ($(VARIANT),)
+CFLAGS += -DMICROPY_BOARD_BUILD_NAME=\"$(VARIANT)\"
+else ifneq ($(BOARD),)
+ifeq ($(BOARD_VARIANT),)
+CFLAGS += -DMICROPY_BOARD_BUILD_NAME=\"$(BOARD)\"
+else
+CFLAGS += -DMICROPY_BOARD_BUILD_NAME=\"$(BOARD)-$(BOARD_VARIANT)\"
+endif
+endif
+
 # QSTR generation uses the same CFLAGS, with these modifications.
 QSTR_GEN_FLAGS = -DNO_QSTR
 # Note: := to force evaluation immediately.
@@ -251,19 +262,14 @@ endif
 # If available, do blobless partial clones of submodules to save time and space.
 # A blobless partial clone lazily fetches data as needed, but has all the metadata available (tags, etc.).
 # Fallback to standard submodule update if blobless isn't available (earlier than 2.36.0)
+#
+# Note: This target has a CMake equivalent in py/mkrules.cmake
 submodules:
 	$(ECHO) "Updating submodules: $(GIT_SUBMODULES)"
 ifneq ($(GIT_SUBMODULES),)
 	$(Q)cd $(TOP) && git submodule sync $(GIT_SUBMODULES)
 	$(Q)cd $(TOP) && git submodule update --init --filter=blob:none $(GIT_SUBMODULES) || \
 	  git submodule update --init $(GIT_SUBMODULES)
-else
-ifeq ($(GIT_SUBMODULES_FAIL_IF_EMPTY),1)
-	# If you see this error, it may mean the internal step run by the port's build
-	# system to find git submodules has failed. Double-check dependencies are set correctly.
-	$(ECHO) "Internal build error: The submodule list should not be empty."
-	exit 1
-endif
 endif
 .PHONY: submodules
 
diff --git a/py/modmath.c b/py/modmath.c
index 4d51a28d0bbb0..b792d8581d062 100644
--- a/py/modmath.c
+++ b/py/modmath.c
@@ -37,7 +37,7 @@
 #define MP_PI_4 MICROPY_FLOAT_CONST(0.78539816339744830962)
 #define MP_3_PI_4 MICROPY_FLOAT_CONST(2.35619449019234492885)
 
-static NORETURN void math_error(void) {
+static MP_NORETURN void math_error(void) {
     mp_raise_ValueError(MP_ERROR_TEXT("math domain error"));
 }
 
diff --git a/py/modsys.c b/py/modsys.c
index e90ea2233a732..9ab02293b9063 100644
--- a/py/modsys.c
+++ b/py/modsys.c
@@ -92,6 +92,17 @@ static const MP_DEFINE_STR_OBJ(mp_sys_implementation_machine_obj, MICROPY_BANNER
 #endif
 
 #if MICROPY_PY_ATTRTUPLE
+
+#if defined(MICROPY_BOARD_BUILD_NAME)
+static const MP_DEFINE_STR_OBJ(mp_sys_implementation__build_obj, MICROPY_BOARD_BUILD_NAME);
+#define MICROPY_BOARD_BUILD (1)
+#define SYS_IMPLEMENTATION_ELEMS__BUILD \
+    , MP_ROM_PTR(&mp_sys_implementation__build_obj)
+#else
+#define MICROPY_BOARD_BUILD (0)
+#define SYS_IMPLEMENTATION_ELEMS__BUILD
+#endif
+
 #if MICROPY_PREVIEW_VERSION_2
 #define SYS_IMPLEMENTATION_ELEMS__V2 \
     , MP_ROM_TRUE
@@ -106,6 +117,9 @@ static const qstr impl_fields[] = {
     #if MICROPY_PERSISTENT_CODE_LOAD
     MP_QSTR__mpy,
     #endif
+    #if defined(MICROPY_BOARD_BUILD_NAME)
+    MP_QSTR__build,
+    #endif
     #if MICROPY_PREVIEW_VERSION_2
     MP_QSTR__v2,
     #endif
@@ -113,19 +127,20 @@ static const qstr impl_fields[] = {
 static MP_DEFINE_ATTRTUPLE(
     mp_sys_implementation_obj,
     impl_fields,
-    3 + MICROPY_PERSISTENT_CODE_LOAD + MICROPY_PREVIEW_VERSION_2,
+    3 + MICROPY_PERSISTENT_CODE_LOAD + MICROPY_BOARD_BUILD + MICROPY_PREVIEW_VERSION_2,
     SYS_IMPLEMENTATION_ELEMS_BASE
     SYS_IMPLEMENTATION_ELEMS__MPY
+    SYS_IMPLEMENTATION_ELEMS__BUILD
     SYS_IMPLEMENTATION_ELEMS__V2
     );
 #else
 static const mp_rom_obj_tuple_t mp_sys_implementation_obj = {
     {&mp_type_tuple},
     3 + MICROPY_PERSISTENT_CODE_LOAD,
-    // Do not include SYS_IMPLEMENTATION_ELEMS__V2 because
-    // SYS_IMPLEMENTATION_ELEMS__MPY may be empty if
+    // Do not include SYS_IMPLEMENTATION_ELEMS__BUILD or SYS_IMPLEMENTATION_ELEMS__V2
+    // because SYS_IMPLEMENTATION_ELEMS__MPY may be empty if
     // MICROPY_PERSISTENT_CODE_LOAD is disabled, which means they'll share
-    // the same index. Cannot query _v2 if MICROPY_PY_ATTRTUPLE is
+    // the same index. Cannot query _build or _v2 if MICROPY_PY_ATTRTUPLE is
     // disabled.
     {
         SYS_IMPLEMENTATION_ELEMS_BASE
diff --git a/py/mpconfig.h b/py/mpconfig.h
index 66b3d125e78de..01712bd5b4d90 100644
--- a/py/mpconfig.h
+++ b/py/mpconfig.h
@@ -30,7 +30,7 @@
 // as well as a fallback to generate MICROPY_GIT_TAG if the git repo or tags
 // are unavailable.
 #define MICROPY_VERSION_MAJOR 1
-#define MICROPY_VERSION_MINOR 25
+#define MICROPY_VERSION_MINOR 26
 #define MICROPY_VERSION_MICRO 0
 #define MICROPY_VERSION_PRERELEASE 1
 
@@ -406,6 +406,11 @@
 #define MICROPY_EMIT_INLINE_XTENSA (0)
 #endif
 
+// Whether to support uncommon Xtensa inline assembler opcodes
+#ifndef MICROPY_EMIT_INLINE_XTENSA_UNCOMMON_OPCODES
+#define MICROPY_EMIT_INLINE_XTENSA_UNCOMMON_OPCODES (0)
+#endif
+
 // Whether to emit Xtensa-Windowed native code
 #ifndef MICROPY_EMIT_XTENSAWIN
 #define MICROPY_EMIT_XTENSAWIN (0)
@@ -1006,6 +1011,11 @@ typedef double mp_float_t;
 #define MICROPY_VFS_WRITABLE (1)
 #endif
 
+// Whether to enable the mp_vfs_rom_ioctl C function, and vfs.rom_ioctl Python function
+#ifndef MICROPY_VFS_ROM_IOCTL
+#define MICROPY_VFS_ROM_IOCTL (MICROPY_VFS_ROM)
+#endif
+
 // Support for VFS POSIX component, to mount a POSIX filesystem within VFS
 #ifndef MICROPY_VFS_POSIX
 #define MICROPY_VFS_POSIX (0)
@@ -1210,7 +1220,7 @@ typedef double mp_float_t;
 
 // Support for calling next() with second argument
 #ifndef MICROPY_PY_BUILTINS_NEXT2
-#define MICROPY_PY_BUILTINS_NEXT2 (MICROPY_CONFIG_ROM_LEVEL_AT_LEAST_EVERYTHING)
+#define MICROPY_PY_BUILTINS_NEXT2 (MICROPY_CONFIG_ROM_LEVEL_AT_LEAST_BASIC_FEATURES)
 #endif
 
 // Whether to support rounding of integers (incl bignum); eg round(123,-1)=120
@@ -1464,7 +1474,7 @@ typedef double mp_float_t;
 
 // Whether to provide "io.IOBase" class to support user streams
 #ifndef MICROPY_PY_IO_IOBASE
-#define MICROPY_PY_IO_IOBASE (MICROPY_CONFIG_ROM_LEVEL_AT_LEAST_EXTRA_FEATURES)
+#define MICROPY_PY_IO_IOBASE (MICROPY_CONFIG_ROM_LEVEL_AT_LEAST_CORE_FEATURES)
 #endif
 
 // Whether to provide "io.BytesIO" class
@@ -2110,8 +2120,12 @@ typedef double mp_float_t;
 #endif // INT_FMT
 
 // Modifier for function which doesn't return
-#ifndef NORETURN
-#define NORETURN __attribute__((noreturn))
+#ifndef MP_NORETURN
+#define MP_NORETURN __attribute__((noreturn))
+#endif
+
+#if !MICROPY_PREVIEW_VERSION_2
+#define NORETURN MP_NORETURN
 #endif
 
 // Modifier for weak functions
diff --git a/py/mpprint.c b/py/mpprint.c
index 291e4145ff0cd..00a5f944c69ef 100644
--- a/py/mpprint.c
+++ b/py/mpprint.c
@@ -58,7 +58,7 @@ int mp_print_str(const mp_print_t *print, const char *str) {
     return len;
 }
 
-int mp_print_strn(const mp_print_t *print, const char *str, size_t len, int flags, char fill, int width) {
+int mp_print_strn(const mp_print_t *print, const char *str, size_t len, unsigned int flags, char fill, int width) {
     int left_pad = 0;
     int right_pad = 0;
     int pad = width - len;
@@ -201,7 +201,7 @@ static int mp_print_int(const mp_print_t *print, mp_uint_t x, int sgn, int base,
     return len;
 }
 
-int mp_print_mp_int(const mp_print_t *print, mp_obj_t x, int base, int base_char, int flags, char fill, int width, int prec) {
+int mp_print_mp_int(const mp_print_t *print, mp_obj_t x, unsigned int base, int base_char, int flags, char fill, int width, int prec) {
     // These are the only values for "base" that are required to be supported by this
     // function, since Python only allows the user to format integers in these bases.
     // If needed this function could be generalised to handle other values.
@@ -248,10 +248,7 @@ int mp_print_mp_int(const mp_print_t *print, mp_obj_t x, int base, int base_char
     int prefix_len = prefix - prefix_buf;
     prefix = prefix_buf;
 
-    char comma = '\0';
-    if (flags & PF_FLAG_SHOW_COMMA) {
-        comma = ',';
-    }
+    char comma = flags >> PF_FLAG_SEP_POS;
 
     // The size of this buffer is rather arbitrary. If it's not large
     // enough, a dynamic one will be allocated.
@@ -340,7 +337,7 @@ int mp_print_mp_int(const mp_print_t *print, mp_obj_t x, int base, int base_char
 }
 
 #if MICROPY_PY_BUILTINS_FLOAT
-int mp_print_float(const mp_print_t *print, mp_float_t f, char fmt, int flags, char fill, int width, int prec) {
+int mp_print_float(const mp_print_t *print, mp_float_t f, char fmt, unsigned int flags, char fill, int width, int prec) {
     char buf[32];
     char sign = '\0';
     int chrs = 0;
diff --git a/py/mpprint.h b/py/mpprint.h
index 8383ea85794c2..511af329baf8d 100644
--- a/py/mpprint.h
+++ b/py/mpprint.h
@@ -33,11 +33,11 @@
 #define PF_FLAG_SPACE_SIGN        (0x004)
 #define PF_FLAG_NO_TRAILZ         (0x008)
 #define PF_FLAG_SHOW_PREFIX       (0x010)
-#define PF_FLAG_SHOW_COMMA        (0x020)
-#define PF_FLAG_PAD_AFTER_SIGN    (0x040)
-#define PF_FLAG_CENTER_ADJUST     (0x080)
-#define PF_FLAG_ADD_PERCENT       (0x100)
-#define PF_FLAG_SHOW_OCTAL_LETTER (0x200)
+#define PF_FLAG_PAD_AFTER_SIGN    (0x020)
+#define PF_FLAG_CENTER_ADJUST     (0x040)
+#define PF_FLAG_ADD_PERCENT       (0x080)
+#define PF_FLAG_SHOW_OCTAL_LETTER (0x100)
+#define PF_FLAG_SEP_POS           (9) // must be above all the above PF_FLAGs
 
 #if MICROPY_PY_IO && MICROPY_PY_SYS_STDFILES
 #define MP_PYTHON_PRINTER &mp_sys_stdout_print
@@ -69,9 +69,9 @@ extern const mp_print_t mp_sys_stdout_print;
 #endif
 
 int mp_print_str(const mp_print_t *print, const char *str);
-int mp_print_strn(const mp_print_t *print, const char *str, size_t len, int flags, char fill, int width);
+int mp_print_strn(const mp_print_t *print, const char *str, size_t len, unsigned int flags, char fill, int width);
 #if MICROPY_PY_BUILTINS_FLOAT
-int mp_print_float(const mp_print_t *print, mp_float_t f, char fmt, int flags, char fill, int width, int prec);
+int mp_print_float(const mp_print_t *print, mp_float_t f, char fmt, unsigned int flags, char fill, int width, int prec);
 #endif
 
 int mp_printf(const mp_print_t *print, const char *fmt, ...);
diff --git a/py/mpz.c b/py/mpz.c
index 084aebda9ecaa..471bd1598188e 100644
--- a/py/mpz.c
+++ b/py/mpz.c
@@ -1672,6 +1672,8 @@ size_t mpz_as_str_inpl(const mpz_t *i, unsigned int base, const char *prefix, ch
 
     size_t ilen = i->len;
 
+    int n_comma = (base == 10) ? 3 : 4;
+
     char *s = str;
     if (ilen == 0) {
         if (prefix) {
@@ -1717,7 +1719,7 @@ size_t mpz_as_str_inpl(const mpz_t *i, unsigned int base, const char *prefix, ch
                 break;
             }
         }
-        if (!done && comma && (s - last_comma) == 3) {
+        if (!done && comma && (s - last_comma) == n_comma) {
             *s++ = comma;
             last_comma = s;
         }
diff --git a/py/nativeglue.h b/py/nativeglue.h
index e96fd7b66a03f..2c7923c56df85 100644
--- a/py/nativeglue.h
+++ b/py/nativeglue.h
@@ -143,7 +143,7 @@ typedef struct _mp_fun_table_t {
     int (*printf_)(const mp_print_t *print, const char *fmt, ...);
     int (*vprintf_)(const mp_print_t *print, const char *fmt, va_list args);
     #if defined(__GNUC__)
-    NORETURN // Only certain compilers support no-return attributes in function pointer declarations
+    MP_NORETURN // Only certain compilers support no-return attributes in function pointer declarations
     #endif
     void (*raise_msg)(const mp_obj_type_t *exc_type, mp_rom_error_text_t msg);
     const mp_obj_type_t *(*obj_get_type)(mp_const_obj_t o_in);
diff --git a/py/nlr.c b/py/nlr.c
index 7ab0c0955a294..de2a38ceff3e9 100644
--- a/py/nlr.c
+++ b/py/nlr.c
@@ -81,7 +81,7 @@ void nlr_call_jump_callbacks(nlr_buf_t *nlr) {
 }
 
 #if MICROPY_ENABLE_VM_ABORT
-NORETURN void nlr_jump_abort(void) {
+MP_NORETURN void nlr_jump_abort(void) {
     MP_STATE_THREAD(nlr_top) = MP_STATE_VM(nlr_abort);
     nlr_jump(NULL);
 }
diff --git a/py/nlr.h b/py/nlr.h
index ce30bc91d67ae..47447c5d174ff 100644
--- a/py/nlr.h
+++ b/py/nlr.h
@@ -177,18 +177,18 @@ unsigned int nlr_push(nlr_buf_t *);
 
 unsigned int nlr_push_tail(nlr_buf_t *top);
 void nlr_pop(void);
-NORETURN void nlr_jump(void *val);
+MP_NORETURN void nlr_jump(void *val);
 
 #if MICROPY_ENABLE_VM_ABORT
 #define nlr_set_abort(buf) MP_STATE_VM(nlr_abort) = buf
 #define nlr_get_abort() MP_STATE_VM(nlr_abort)
-NORETURN void nlr_jump_abort(void);
+MP_NORETURN void nlr_jump_abort(void);
 #endif
 
 // This must be implemented by a port.  It's called by nlr_jump
 // if no nlr buf has been pushed.  It must not return, but rather
 // should bail out with a fatal error.
-NORETURN void nlr_jump_fail(void *val);
+MP_NORETURN void nlr_jump_fail(void *val);
 
 // use nlr_raise instead of nlr_jump so that debugging is easier
 #ifndef MICROPY_DEBUG_NLR
diff --git a/py/nlraarch64.c b/py/nlraarch64.c
index d6d87ebc50db8..3318004b5e037 100644
--- a/py/nlraarch64.c
+++ b/py/nlraarch64.c
@@ -56,7 +56,7 @@ __asm(
     #endif
     );
 
-NORETURN void nlr_jump(void *val) {
+MP_NORETURN void nlr_jump(void *val) {
     MP_NLR_JUMP_HEAD(val, top)
 
     MP_STATIC_ASSERT(offsetof(nlr_buf_t, regs) == 16); // asm assumes it
diff --git a/py/nlrmips.c b/py/nlrmips.c
index cba52b16a266a..5c55db7e268ec 100644
--- a/py/nlrmips.c
+++ b/py/nlrmips.c
@@ -57,7 +57,7 @@ __asm(
     ".end nlr_push            \n"
     );
 
-NORETURN void nlr_jump(void *val) {
+MP_NORETURN void nlr_jump(void *val) {
     MP_NLR_JUMP_HEAD(val, top)
     __asm(
         "move $4, %0    \n"
diff --git a/py/nlrpowerpc.c b/py/nlrpowerpc.c
index 8a69fe1eeca6b..cf140400e68f5 100644
--- a/py/nlrpowerpc.c
+++ b/py/nlrpowerpc.c
@@ -78,7 +78,7 @@ unsigned int nlr_push(nlr_buf_t *nlr) {
     return 0;
 }
 
-NORETURN void nlr_jump(void *val) {
+MP_NORETURN void nlr_jump(void *val) {
     MP_NLR_JUMP_HEAD(val, top)
 
     __asm__ volatile (
@@ -167,7 +167,7 @@ unsigned int nlr_push(nlr_buf_t *nlr) {
     return 0;
 }
 
-NORETURN void nlr_jump(void *val) {
+MP_NORETURN void nlr_jump(void *val) {
     MP_NLR_JUMP_HEAD(val, top)
 
     __asm__ volatile (
diff --git a/py/nlrrv32.c b/py/nlrrv32.c
index 9a12ede400daa..565a8629db5f0 100644
--- a/py/nlrrv32.c
+++ b/py/nlrrv32.c
@@ -50,7 +50,7 @@ __attribute__((naked)) unsigned int nlr_push(nlr_buf_t *nlr) {
         );
 }
 
-NORETURN void nlr_jump(void *val) {
+MP_NORETURN void nlr_jump(void *val) {
     MP_NLR_JUMP_HEAD(val, top)
     __asm volatile (
         "add  x10, x0, %0  \n" // Load nlr_buf address.
diff --git a/py/nlrrv64.c b/py/nlrrv64.c
index e7ba79797b857..b7d1467b8f6f6 100644
--- a/py/nlrrv64.c
+++ b/py/nlrrv64.c
@@ -50,7 +50,7 @@ __attribute__((naked)) unsigned int nlr_push(nlr_buf_t *nlr) {
         );
 }
 
-NORETURN void nlr_jump(void *val) {
+MP_NORETURN void nlr_jump(void *val) {
     MP_NLR_JUMP_HEAD(val, top)
     __asm volatile (
         "add  x10, x0, %0  \n" // Load nlr_buf address.
diff --git a/py/nlrthumb.c b/py/nlrthumb.c
index e7b24f242bc52..8546308a3dedf 100644
--- a/py/nlrthumb.c
+++ b/py/nlrthumb.c
@@ -100,7 +100,7 @@ __attribute__((naked)) unsigned int nlr_push(nlr_buf_t *nlr) {
     #endif
 }
 
-NORETURN void nlr_jump(void *val) {
+MP_NORETURN void nlr_jump(void *val) {
     MP_NLR_JUMP_HEAD(val, top)
 
     __asm volatile (
diff --git a/py/nlrx64.c b/py/nlrx64.c
index d1ad91ff7d718..51224729fc90d 100644
--- a/py/nlrx64.c
+++ b/py/nlrx64.c
@@ -100,7 +100,7 @@ unsigned int nlr_push(nlr_buf_t *nlr) {
     #endif
 }
 
-NORETURN void nlr_jump(void *val) {
+MP_NORETURN void nlr_jump(void *val) {
     MP_NLR_JUMP_HEAD(val, top)
 
     __asm volatile (
diff --git a/py/nlrx86.c b/py/nlrx86.c
index 085e30d2034a1..26bf0dc6ccb85 100644
--- a/py/nlrx86.c
+++ b/py/nlrx86.c
@@ -78,7 +78,7 @@ unsigned int nlr_push(nlr_buf_t *nlr) {
     #endif
 }
 
-NORETURN void nlr_jump(void *val) {
+MP_NORETURN void nlr_jump(void *val) {
     MP_NLR_JUMP_HEAD(val, top)
 
     __asm volatile (
diff --git a/py/nlrxtensa.c b/py/nlrxtensa.c
index ff7af6edeef98..2d1bf35e381a3 100644
--- a/py/nlrxtensa.c
+++ b/py/nlrxtensa.c
@@ -55,7 +55,7 @@ unsigned int nlr_push(nlr_buf_t *nlr) {
     return 0; // needed to silence compiler warning
 }
 
-NORETURN void nlr_jump(void *val) {
+MP_NORETURN void nlr_jump(void *val) {
     MP_NLR_JUMP_HEAD(val, top)
 
     __asm volatile (
diff --git a/py/obj.h b/py/obj.h
index 93d1e0ee34349..07362522474d6 100644
--- a/py/obj.h
+++ b/py/obj.h
@@ -371,25 +371,25 @@ typedef struct _mp_rom_obj_t { mp_const_obj_t o; } mp_rom_obj_t;
 
 #define MP_DEFINE_CONST_FUN_OBJ_0(obj_name, fun_name) \
     const mp_obj_fun_builtin_fixed_t obj_name = \
-    {{&mp_type_fun_builtin_0}, .fun._0 = fun_name}
+    {.base = {.type = &mp_type_fun_builtin_0}, .fun = {._0 = fun_name}}
 #define MP_DEFINE_CONST_FUN_OBJ_1(obj_name, fun_name) \
     const mp_obj_fun_builtin_fixed_t obj_name = \
-    {{&mp_type_fun_builtin_1}, .fun._1 = fun_name}
+    {.base = {.type = &mp_type_fun_builtin_1}, .fun = {._1 = fun_name}}
 #define MP_DEFINE_CONST_FUN_OBJ_2(obj_name, fun_name) \
     const mp_obj_fun_builtin_fixed_t obj_name = \
-    {{&mp_type_fun_builtin_2}, .fun._2 = fun_name}
+    {.base = {.type = &mp_type_fun_builtin_2}, .fun = {._2 = fun_name}}
 #define MP_DEFINE_CONST_FUN_OBJ_3(obj_name, fun_name) \
     const mp_obj_fun_builtin_fixed_t obj_name = \
-    {{&mp_type_fun_builtin_3}, .fun._3 = fun_name}
+    {.base = {.type = &mp_type_fun_builtin_3}, .fun = {._3 = fun_name}}
 #define MP_DEFINE_CONST_FUN_OBJ_VAR(obj_name, n_args_min, fun_name) \
     const mp_obj_fun_builtin_var_t obj_name = \
-    {{&mp_type_fun_builtin_var}, MP_OBJ_FUN_MAKE_SIG(n_args_min, MP_OBJ_FUN_ARGS_MAX, false), .fun.var = fun_name}
+    {.base = {.type = &mp_type_fun_builtin_var}, .sig = MP_OBJ_FUN_MAKE_SIG(n_args_min, MP_OBJ_FUN_ARGS_MAX, false), .fun = {.var = fun_name}}
 #define MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(obj_name, n_args_min, n_args_max, fun_name) \
     const mp_obj_fun_builtin_var_t obj_name = \
-    {{&mp_type_fun_builtin_var}, MP_OBJ_FUN_MAKE_SIG(n_args_min, n_args_max, false), .fun.var = fun_name}
+    {.base = {.type = &mp_type_fun_builtin_var}, .sig = MP_OBJ_FUN_MAKE_SIG(n_args_min, n_args_max, false), .fun = {.var = fun_name}}
 #define MP_DEFINE_CONST_FUN_OBJ_KW(obj_name, n_args_min, fun_name) \
     const mp_obj_fun_builtin_var_t obj_name = \
-    {{&mp_type_fun_builtin_var}, MP_OBJ_FUN_MAKE_SIG(n_args_min, MP_OBJ_FUN_ARGS_MAX, true), .fun.kw = fun_name}
+    {.base = {.type = &mp_type_fun_builtin_var}, .sig = MP_OBJ_FUN_MAKE_SIG(n_args_min, MP_OBJ_FUN_ARGS_MAX, true), .fun = {.kw = fun_name}}
 
 // These macros are used to define constant map/dict objects
 // You can put "static" in front of the definition to make it local
diff --git a/py/objarray.h b/py/objarray.h
index 4a0e8a983fe77..bb7a514b97913 100644
--- a/py/objarray.h
+++ b/py/objarray.h
@@ -53,6 +53,10 @@ typedef struct _mp_obj_array_t {
 } mp_obj_array_t;
 
 #if MICROPY_PY_BUILTINS_MEMORYVIEW
+
+#define MP_DEFINE_MEMORYVIEW_OBJ(obj_name, typecode, offset, len, ptr) \
+    mp_obj_array_t obj_name = {{&mp_type_memoryview}, (typecode), (offset), (len), (ptr)}
+
 static inline void mp_obj_memoryview_init(mp_obj_array_t *self, size_t typecode, size_t offset, size_t len, void *items) {
     self->base.type = &mp_type_memoryview;
     self->typecode = typecode;
@@ -60,6 +64,7 @@ static inline void mp_obj_memoryview_init(mp_obj_array_t *self, size_t typecode,
     self->len = len;
     self->items = items;
 }
+
 #endif
 
 #if MICROPY_PY_ARRAY || MICROPY_PY_BUILTINS_BYTEARRAY
diff --git a/py/objint.c b/py/objint.c
index 4be6009a440e4..87d8a27852d34 100644
--- a/py/objint.c
+++ b/py/objint.c
@@ -209,7 +209,7 @@ static const uint8_t log_base2_floor[] = {
 size_t mp_int_format_size(size_t num_bits, int base, const char *prefix, char comma) {
     assert(2 <= base && base <= 16);
     size_t num_digits = num_bits / log_base2_floor[base - 1] + 1;
-    size_t num_commas = comma ? num_digits / 3 : 0;
+    size_t num_commas = comma ? (base == 10 ? num_digits / 3 : num_digits / 4): 0;
     size_t prefix_len = prefix ? strlen(prefix) : 0;
     return num_digits + num_commas + prefix_len + 2; // +1 for sign, +1 for null byte
 }
@@ -251,6 +251,7 @@ char *mp_obj_int_formatted(char **buf, size_t *buf_size, size_t *fmt_size, mp_co
         sign = '-';
     }
 
+    int n_comma = (base == 10) ? 3 : 4;
     size_t needed_size = mp_int_format_size(sizeof(fmt_int_t) * 8, base, prefix, comma);
     if (needed_size > *buf_size) {
         *buf = m_new(char, needed_size);
@@ -275,7 +276,7 @@ char *mp_obj_int_formatted(char **buf, size_t *buf_size, size_t *fmt_size, mp_co
                 c += '0';
             }
             *(--b) = c;
-            if (comma && num != 0 && b > str && (last_comma - b) == 3) {
+            if (comma && num != 0 && b > str && (last_comma - b) == n_comma) {
                 *(--b) = comma;
                 last_comma = b;
             }
diff --git a/py/objrange.c b/py/objrange.c
index 5ccb04fba60c8..1cc575f33e763 100644
--- a/py/objrange.c
+++ b/py/objrange.c
@@ -164,15 +164,11 @@ static mp_obj_t range_subscr(mp_obj_t self_in, mp_obj_t index, mp_obj_t value) {
         #if MICROPY_PY_BUILTINS_SLICE
         if (mp_obj_is_type(index, &mp_type_slice)) {
             mp_bound_slice_t slice;
-            mp_seq_get_fast_slice_indexes(len, index, &slice);
+            mp_obj_slice_indices(index, len, &slice);
             mp_obj_range_t *o = mp_obj_malloc(mp_obj_range_t, &mp_type_range);
             o->start = self->start + slice.start * self->step;
             o->stop = self->start + slice.stop * self->step;
             o->step = slice.step * self->step;
-            if (slice.step < 0) {
-                // Negative slice steps have inclusive stop, so adjust for exclusive
-                o->stop -= self->step;
-            }
             return MP_OBJ_FROM_PTR(o);
         }
         #endif
diff --git a/py/objstr.c b/py/objstr.c
index fc0623eb7af2c..c81fc682fd4e8 100644
--- a/py/objstr.c
+++ b/py/objstr.c
@@ -33,13 +33,14 @@
 #include "py/objlist.h"
 #include "py/runtime.h"
 #include "py/cstack.h"
+#include "py/objtuple.h"
 
 #if MICROPY_PY_BUILTINS_STR_OP_MODULO
 static mp_obj_t str_modulo_format(mp_obj_t pattern, size_t n_args, const mp_obj_t *args, mp_obj_t dict);
 #endif
 
 static mp_obj_t mp_obj_new_bytes_iterator(mp_obj_t str, mp_obj_iter_buf_t *iter_buf);
-static NORETURN void bad_implicit_conversion(mp_obj_t self_in);
+static MP_NORETURN void bad_implicit_conversion(mp_obj_t self_in);
 
 static mp_obj_t mp_obj_new_str_type_from_vstr(const mp_obj_type_t *type, vstr_t *vstr);
 
@@ -67,6 +68,26 @@ static void check_is_str_or_bytes(mp_obj_t self_in) {
     mp_check_self(mp_obj_is_str_or_bytes(self_in));
 }
 
+static const byte *get_substring_data(const mp_obj_t obj, size_t n_args, const mp_obj_t *args, size_t *len) {
+    // Get substring data from obj, using args[0,1] to specify start and end indices.
+    GET_STR_DATA_LEN(obj, str, str_len);
+    if (n_args > 0) {
+        const mp_obj_type_t *self_type = mp_obj_get_type(obj);
+        const byte *end = str + str_len;
+        if (n_args > 1 && args[1] != mp_const_none) {
+            end = str_index_to_ptr(self_type, str, str_len, args[1], true);
+        }
+        if (args[0] != mp_const_none) {
+            str = str_index_to_ptr(self_type, str, str_len, args[0], true);
+        }
+        str_len = MAX(end - str, 0);
+    }
+    if (len) {
+        *len = str_len;
+    }
+    return str;
+}
+
 /******************************************************************************/
 /* str                                                                        */
 
@@ -337,8 +358,7 @@ mp_obj_t mp_obj_str_binary_op(mp_binary_op_t op, mp_obj_t lhs_in, mp_obj_t rhs_i
         mp_obj_t *args = &rhs_in;
         size_t n_args = 1;
         mp_obj_t dict = MP_OBJ_NULL;
-        if (mp_obj_is_type(rhs_in, &mp_type_tuple)) {
-            // TODO: Support tuple subclasses?
+        if (mp_obj_is_tuple_compatible(rhs_in)) {
             mp_obj_tuple_get(rhs_in, &n_args, &args);
         } else if (mp_obj_is_type(rhs_in, &mp_type_dict)) {
             dict = rhs_in;
@@ -802,37 +822,34 @@ static mp_obj_t str_rindex(size_t n_args, const mp_obj_t *args) {
 }
 MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(str_rindex_obj, 2, 4, str_rindex);
 
-// TODO: (Much) more variety in args
-static mp_obj_t str_startswith(size_t n_args, const mp_obj_t *args) {
-    const mp_obj_type_t *self_type = mp_obj_get_type(args[0]);
-    GET_STR_DATA_LEN(args[0], str, str_len);
-    size_t prefix_len;
-    const char *prefix = mp_obj_str_get_data(args[1], &prefix_len);
-    const byte *start = str;
-    if (n_args > 2) {
-        start = str_index_to_ptr(self_type, str, str_len, args[2], true);
+static mp_obj_t str_startendswith(size_t n_args, const mp_obj_t *args, bool ends_with) {
+    size_t str_len;
+    const byte *str = get_substring_data(args[0], n_args - 2, args + 2, &str_len);
+    mp_obj_t *prefixes = (mp_obj_t *)&args[1];
+    size_t n_prefixes = 1;
+    if (mp_obj_is_type(args[1], &mp_type_tuple)) {
+        mp_obj_tuple_get(args[1], &n_prefixes, &prefixes);
     }
-    if (prefix_len + (start - str) > str_len) {
-        return mp_const_false;
+    size_t prefix_len;
+    for (size_t i = 0; i < n_prefixes; i++) {
+        const char *prefix = mp_obj_str_get_data(prefixes[i], &prefix_len);
+        const byte *s = str + (ends_with ? str_len - prefix_len : 0);
+        if (prefix_len <= str_len && memcmp(s, prefix, prefix_len) == 0) {
+            return mp_const_true;
+        }
     }
-    return mp_obj_new_bool(memcmp(start, prefix, prefix_len) == 0);
+    return mp_const_false;
 }
-MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(str_startswith_obj, 2, 3, str_startswith);
 
-static mp_obj_t str_endswith(size_t n_args, const mp_obj_t *args) {
-    GET_STR_DATA_LEN(args[0], str, str_len);
-    size_t suffix_len;
-    const char *suffix = mp_obj_str_get_data(args[1], &suffix_len);
-    if (n_args > 2) {
-        mp_raise_NotImplementedError(MP_ERROR_TEXT("start/end indices"));
-    }
+static mp_obj_t str_startswith(size_t n_args, const mp_obj_t *args) {
+    return str_startendswith(n_args, args, false);
+}
+MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(str_startswith_obj, 2, 4, str_startswith);
 
-    if (suffix_len > str_len) {
-        return mp_const_false;
-    }
-    return mp_obj_new_bool(memcmp(str + (str_len - suffix_len), suffix, suffix_len) == 0);
+static mp_obj_t str_endswith(size_t n_args, const mp_obj_t *args) {
+    return str_startendswith(n_args, args, true);
 }
-MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(str_endswith_obj, 2, 3, str_endswith);
+MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(str_endswith_obj, 2, 4, str_endswith);
 
 enum { LSTRIP, RSTRIP, STRIP };
 
@@ -984,7 +1001,7 @@ static mp_obj_t arg_as_int(mp_obj_t arg) {
 #endif
 
 #if MICROPY_ERROR_REPORTING <= MICROPY_ERROR_REPORTING_TERSE
-static NORETURN void terse_str_format_value_error(void) {
+static MP_NORETURN void terse_str_format_value_error(void) {
     mp_raise_ValueError(MP_ERROR_TEXT("bad format string"));
 }
 #else
@@ -1167,7 +1184,7 @@ static vstr_t mp_obj_str_format_helper(const char *str, const char *top, int *ar
         int width = -1;
         int precision = -1;
         char type = '\0';
-        int flags = 0;
+        unsigned int flags = 0;
 
         if (format_spec) {
             // The format specifier (from http://docs.python.org/2/library/string.html#formatspec)
@@ -1212,8 +1229,9 @@ static vstr_t mp_obj_str_format_helper(const char *str, const char *top, int *ar
                 }
             }
             s = str_to_int(s, stop, &width);
-            if (*s == ',') {
-                flags |= PF_FLAG_SHOW_COMMA;
+            if (*s == ',' || *s == '_') {
+                MP_STATIC_ASSERT((unsigned)'_' << PF_FLAG_SEP_POS >> PF_FLAG_SEP_POS == '_');
+                flags |= (unsigned)*s << PF_FLAG_SEP_POS;
                 s++;
             }
             if (*s == '.') {
@@ -2340,7 +2358,7 @@ bool mp_obj_str_equal(mp_obj_t s1, mp_obj_t s2) {
     }
 }
 
-static NORETURN void bad_implicit_conversion(mp_obj_t self_in) {
+static MP_NORETURN void bad_implicit_conversion(mp_obj_t self_in) {
     #if MICROPY_ERROR_REPORTING <= MICROPY_ERROR_REPORTING_TERSE
     mp_raise_TypeError(MP_ERROR_TEXT("can't convert to str implicitly"));
     #else
diff --git a/py/objtuple.c b/py/objtuple.c
index 2cbcc0e502f9a..a8bd11c7e2735 100644
--- a/py/objtuple.c
+++ b/py/objtuple.c
@@ -31,9 +31,6 @@
 #include "py/objtuple.h"
 #include "py/runtime.h"
 
-// type check is done on getiter method to allow tuple, namedtuple, attrtuple
-#define mp_obj_is_tuple_compatible(o) (MP_OBJ_TYPE_GET_SLOT_OR_NULL(mp_obj_get_type(o), iter) == mp_obj_tuple_getiter)
-
 /******************************************************************************/
 /* tuple                                                                      */
 
diff --git a/py/objtuple.h b/py/objtuple.h
index cc42aa6df3980..3c82a9edcf345 100644
--- a/py/objtuple.h
+++ b/py/objtuple.h
@@ -50,7 +50,7 @@ extern const mp_obj_type_t mp_type_attrtuple;
 
 #define MP_DEFINE_ATTRTUPLE(tuple_obj_name, fields, nitems, ...) \
     const mp_rom_obj_tuple_t tuple_obj_name = { \
-        .base = {&mp_type_attrtuple}, \
+        .base = {.type = &mp_type_attrtuple}, \
         .len = nitems, \
         .items = { __VA_ARGS__, MP_ROM_PTR((void *)fields) } \
     }
@@ -61,4 +61,7 @@ void mp_obj_attrtuple_print_helper(const mp_print_t *print, const qstr *fields,
 
 mp_obj_t mp_obj_new_attrtuple(const qstr *fields, size_t n, const mp_obj_t *items);
 
+// type check is done on getiter method to allow tuple, namedtuple, attrtuple
+#define mp_obj_is_tuple_compatible(o) (MP_OBJ_TYPE_GET_SLOT_OR_NULL(mp_obj_get_type(o), iter) == mp_obj_tuple_getiter)
+
 #endif // MICROPY_INCLUDED_PY_OBJTUPLE_H
diff --git a/py/parsenum.c b/py/parsenum.c
index 27d6641198730..a38ce563f9530 100644
--- a/py/parsenum.c
+++ b/py/parsenum.c
@@ -36,7 +36,7 @@
 #include <math.h>
 #endif
 
-static NORETURN void raise_exc(mp_obj_t exc, mp_lexer_t *lex) {
+static MP_NORETURN void raise_exc(mp_obj_t exc, mp_lexer_t *lex) {
     // if lex!=NULL then the parser called us and we need to convert the
     // exception's type from ValueError to SyntaxError and add traceback info
     if (lex != NULL) {
@@ -179,39 +179,40 @@ typedef enum {
 } parse_dec_in_t;
 
 #if MICROPY_PY_BUILTINS_FLOAT
-// DEC_VAL_MAX only needs to be rough and is used to retain precision while not overflowing
+// MANTISSA_MAX is used to retain precision while not overflowing mantissa
 // SMALL_NORMAL_VAL is the smallest power of 10 that is still a normal float
 // EXACT_POWER_OF_10 is the largest value of x so that 10^x can be stored exactly in a float
 //   Note: EXACT_POWER_OF_10 is at least floor(log_5(2^mantissa_length)). Indeed, 10^n = 2^n * 5^n
 //   so we only have to store the 5^n part in the mantissa (the 2^n part will go into the float's
 //   exponent).
 #if MICROPY_FLOAT_IMPL == MICROPY_FLOAT_IMPL_FLOAT
-#define DEC_VAL_MAX 1e20F
+#define MANTISSA_MAX 0x19999998U
 #define SMALL_NORMAL_VAL (1e-37F)
 #define SMALL_NORMAL_EXP (-37)
 #define EXACT_POWER_OF_10 (9)
 #elif MICROPY_FLOAT_IMPL == MICROPY_FLOAT_IMPL_DOUBLE
-#define DEC_VAL_MAX 1e200
+#define MANTISSA_MAX 0x1999999999999998ULL
 #define SMALL_NORMAL_VAL (1e-307)
 #define SMALL_NORMAL_EXP (-307)
 #define EXACT_POWER_OF_10 (22)
 #endif
 
 // Break out inner digit accumulation routine to ease trailing zero deferral.
-static void accept_digit(mp_float_t *p_dec_val, int dig, int *p_exp_extra, int in) {
+static mp_float_uint_t accept_digit(mp_float_uint_t p_mantissa, unsigned int dig, int *p_exp_extra, int in) {
     // Core routine to ingest an additional digit.
-    if (*p_dec_val < DEC_VAL_MAX) {
+    if (p_mantissa < MANTISSA_MAX) {
         // dec_val won't overflow so keep accumulating
-        *p_dec_val = 10 * *p_dec_val + dig;
         if (in == PARSE_DEC_IN_FRAC) {
             --(*p_exp_extra);
         }
+        return 10u * p_mantissa + dig;
     } else {
         // dec_val might overflow and we anyway can't represent more digits
         // of precision, so ignore the digit and just adjust the exponent
         if (in == PARSE_DEC_IN_INTG) {
             ++(*p_exp_extra);
         }
+        return p_mantissa;
     }
 }
 #endif // MICROPY_PY_BUILTINS_FLOAT
@@ -273,6 +274,7 @@ mp_obj_t mp_parse_num_float(const char *str, size_t len, bool allow_imag, mp_lex
         // string should be a decimal number
         parse_dec_in_t in = PARSE_DEC_IN_INTG;
         bool exp_neg = false;
+        mp_float_uint_t mantissa = 0;
         int exp_val = 0;
         int exp_extra = 0;
         int trailing_zeros_intg = 0, trailing_zeros_frac = 0;
@@ -288,9 +290,9 @@ mp_obj_t mp_parse_num_float(const char *str, size_t len, bool allow_imag, mp_lex
                         exp_val = 10 * exp_val + dig;
                     }
                 } else {
-                    if (dig == 0 || dec_val >= DEC_VAL_MAX) {
+                    if (dig == 0 || mantissa >= MANTISSA_MAX) {
                         // Defer treatment of zeros in fractional part.  If nothing comes afterwards, ignore them.
-                        // Also, once we reach DEC_VAL_MAX, treat every additional digit as a trailing zero.
+                        // Also, once we reach MANTISSA_MAX, treat every additional digit as a trailing zero.
                         if (in == PARSE_DEC_IN_INTG) {
                             ++trailing_zeros_intg;
                         } else {
@@ -299,14 +301,14 @@ mp_obj_t mp_parse_num_float(const char *str, size_t len, bool allow_imag, mp_lex
                     } else {
                         // Time to un-defer any trailing zeros.  Intg zeros first.
                         while (trailing_zeros_intg) {
-                            accept_digit(&dec_val, 0, &exp_extra, PARSE_DEC_IN_INTG);
+                            mantissa = accept_digit(mantissa, 0, &exp_extra, PARSE_DEC_IN_INTG);
                             --trailing_zeros_intg;
                         }
                         while (trailing_zeros_frac) {
-                            accept_digit(&dec_val, 0, &exp_extra, PARSE_DEC_IN_FRAC);
+                            mantissa = accept_digit(mantissa, 0, &exp_extra, PARSE_DEC_IN_FRAC);
                             --trailing_zeros_frac;
                         }
-                        accept_digit(&dec_val, dig, &exp_extra, in);
+                        mantissa = accept_digit(mantissa, dig, &exp_extra, in);
                     }
                 }
             } else if (in == PARSE_DEC_IN_INTG && dig == '.') {
@@ -340,6 +342,7 @@ mp_obj_t mp_parse_num_float(const char *str, size_t len, bool allow_imag, mp_lex
 
         // apply the exponent, making sure it's not a subnormal value
         exp_val += exp_extra + trailing_zeros_intg;
+        dec_val = (mp_float_t)mantissa;
         if (exp_val < SMALL_NORMAL_EXP) {
             exp_val -= SMALL_NORMAL_EXP;
             dec_val *= SMALL_NORMAL_VAL;
diff --git a/py/persistentcode.c b/py/persistentcode.c
index 2a42b904bc138..43207a0cc8f66 100644
--- a/py/persistentcode.c
+++ b/py/persistentcode.c
@@ -72,6 +72,8 @@ typedef struct _bytecode_prelude_t {
 static int read_byte(mp_reader_t *reader);
 static size_t read_uint(mp_reader_t *reader);
 
+#if MICROPY_EMIT_MACHINE_CODE
+
 #if MICROPY_PERSISTENT_CODE_TRACK_FUN_DATA || MICROPY_PERSISTENT_CODE_TRACK_BSS_RODATA
 
 // An mp_obj_list_t that tracks native text/BSS/rodata to prevent the GC from reclaiming them.
@@ -86,8 +88,6 @@ static void track_root_pointer(void *ptr) {
 
 #endif
 
-#if MICROPY_EMIT_MACHINE_CODE
-
 typedef struct _reloc_info_t {
     mp_reader_t *reader;
     mp_module_context_t *context;
@@ -415,15 +415,17 @@ static mp_raw_code_t *load_raw_code(mp_reader_t *reader, mp_module_context_t *co
 
         // Relocate and commit code to executable address space
         reloc_info_t ri = {reader, context, rodata, bss};
+        #if MICROPY_PERSISTENT_CODE_TRACK_FUN_DATA
+        if (native_scope_flags & MP_SCOPE_FLAG_VIPERRELOC) {
+            // Track the function data memory so it's not reclaimed by the GC.
+            track_root_pointer(fun_data);
+        }
+        #endif
         #if defined(MP_PLAT_COMMIT_EXEC)
         void *opt_ri = (native_scope_flags & MP_SCOPE_FLAG_VIPERRELOC) ? &ri : NULL;
         fun_data = MP_PLAT_COMMIT_EXEC(fun_data, fun_data_len, opt_ri);
         #else
         if (native_scope_flags & MP_SCOPE_FLAG_VIPERRELOC) {
-            #if MICROPY_PERSISTENT_CODE_TRACK_FUN_DATA
-            // Track the function data memory so it's not reclaimed by the GC.
-            track_root_pointer(fun_data);
-            #endif
             // Do the relocations.
             mp_native_relocate(&ri, fun_data, (uintptr_t)fun_data);
         }
diff --git a/py/qstrdefs.h b/py/qstrdefs.h
index 5003636df3d4b..0b50d279f9dbf 100644
--- a/py/qstrdefs.h
+++ b/py/qstrdefs.h
@@ -68,6 +68,11 @@ Q(utf-8)
 Q(.frozen)
 #endif
 
+#if MICROPY_VFS_ROM && MICROPY_VFS_ROM_IOCTL
+Q(/rom)
+Q(/rom/lib)
+#endif
+
 #if MICROPY_ENABLE_PYSTACK
 Q(pystack exhausted)
 #endif
diff --git a/py/reader.h b/py/reader.h
index 301c70ab3f0d4..6378457007cb3 100644
--- a/py/reader.h
+++ b/py/reader.h
@@ -48,7 +48,7 @@ void mp_reader_new_file(mp_reader_t *reader, qstr filename);
 void mp_reader_new_file_from_fd(mp_reader_t *reader, int fd, bool close_fd);
 
 // Try to efficiently read the given number of bytes from a ROM-based reader.
-// Returns a valid, non-NULL pointer to the requseted data if the reader points to ROM.
+// Returns a valid, non-NULL pointer to the requested data if the reader points to ROM.
 // Returns NULL if the reader does not point to ROM.
 const uint8_t *mp_reader_try_read_rom(mp_reader_t *reader, size_t len);
 
diff --git a/py/runtime.c b/py/runtime.c
index bf26921f9ab9f..7979e520da481 100644
--- a/py/runtime.c
+++ b/py/runtime.c
@@ -46,6 +46,10 @@
 #include "py/cstack.h"
 #include "py/gc.h"
 
+#if MICROPY_VFS_ROM && MICROPY_VFS_ROM_IOCTL
+#include "extmod/vfs.h"
+#endif
+
 #if MICROPY_DEBUG_VERBOSE // print debugging info
 #define DEBUG_PRINT (1)
 #define DEBUG_printf DEBUG_printf
@@ -119,7 +123,7 @@ void mp_init(void) {
     MP_STATE_VM(mp_module_builtins_override_dict) = NULL;
     #endif
 
-    #if MICROPY_PERSISTENT_CODE_TRACK_FUN_DATA || MICROPY_PERSISTENT_CODE_TRACK_BSS_RODATA
+    #if MICROPY_EMIT_MACHINE_CODE && (MICROPY_PERSISTENT_CODE_TRACK_FUN_DATA || MICROPY_PERSISTENT_CODE_TRACK_BSS_RODATA)
     MP_STATE_VM(persistent_code_root_pointers) = MP_OBJ_NULL;
     #endif
 
@@ -185,6 +189,11 @@ void mp_init(void) {
     #endif
 
     MP_THREAD_GIL_ENTER();
+
+    #if MICROPY_VFS_ROM && MICROPY_VFS_ROM_IOCTL
+    // Mount ROMFS if it exists.
+    mp_vfs_mount_romfs_protected();
+    #endif
 }
 
 void mp_deinit(void) {
@@ -1640,7 +1649,7 @@ mp_obj_t mp_parse_compile_execute(mp_lexer_t *lex, mp_parse_input_kind_t parse_i
 
 #endif // MICROPY_ENABLE_COMPILER
 
-NORETURN void m_malloc_fail(size_t num_bytes) {
+MP_NORETURN void m_malloc_fail(size_t num_bytes) {
     DEBUG_printf("memory allocation failed, allocating %u bytes\n", (uint)num_bytes);
     #if MICROPY_ENABLE_GC
     if (gc_is_locked()) {
@@ -1653,25 +1662,25 @@ NORETURN void m_malloc_fail(size_t num_bytes) {
 
 #if MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_NONE
 
-NORETURN void mp_raise_type(const mp_obj_type_t *exc_type) {
+MP_NORETURN void mp_raise_type(const mp_obj_type_t *exc_type) {
     nlr_raise(mp_obj_new_exception(exc_type));
 }
 
-NORETURN void mp_raise_ValueError_no_msg(void) {
+MP_NORETURN void mp_raise_ValueError_no_msg(void) {
     mp_raise_type(&mp_type_ValueError);
 }
 
-NORETURN void mp_raise_TypeError_no_msg(void) {
+MP_NORETURN void mp_raise_TypeError_no_msg(void) {
     mp_raise_type(&mp_type_TypeError);
 }
 
-NORETURN void mp_raise_NotImplementedError_no_msg(void) {
+MP_NORETURN void mp_raise_NotImplementedError_no_msg(void) {
     mp_raise_type(&mp_type_NotImplementedError);
 }
 
 #else
 
-NORETURN void mp_raise_msg(const mp_obj_type_t *exc_type, mp_rom_error_text_t msg) {
+MP_NORETURN void mp_raise_msg(const mp_obj_type_t *exc_type, mp_rom_error_text_t msg) {
     if (msg == NULL) {
         nlr_raise(mp_obj_new_exception(exc_type));
     } else {
@@ -1679,7 +1688,7 @@ NORETURN void mp_raise_msg(const mp_obj_type_t *exc_type, mp_rom_error_text_t ms
     }
 }
 
-NORETURN void mp_raise_msg_varg(const mp_obj_type_t *exc_type, mp_rom_error_text_t fmt, ...) {
+MP_NORETURN void mp_raise_msg_varg(const mp_obj_type_t *exc_type, mp_rom_error_text_t fmt, ...) {
     va_list args;
     va_start(args, fmt);
     mp_obj_t exc = mp_obj_new_exception_msg_vlist(exc_type, fmt, args);
@@ -1687,25 +1696,25 @@ NORETURN void mp_raise_msg_varg(const mp_obj_type_t *exc_type, mp_rom_error_text
     nlr_raise(exc);
 }
 
-NORETURN void mp_raise_ValueError(mp_rom_error_text_t msg) {
+MP_NORETURN void mp_raise_ValueError(mp_rom_error_text_t msg) {
     mp_raise_msg(&mp_type_ValueError, msg);
 }
 
-NORETURN void mp_raise_TypeError(mp_rom_error_text_t msg) {
+MP_NORETURN void mp_raise_TypeError(mp_rom_error_text_t msg) {
     mp_raise_msg(&mp_type_TypeError, msg);
 }
 
-NORETURN void mp_raise_NotImplementedError(mp_rom_error_text_t msg) {
+MP_NORETURN void mp_raise_NotImplementedError(mp_rom_error_text_t msg) {
     mp_raise_msg(&mp_type_NotImplementedError, msg);
 }
 
 #endif
 
-NORETURN void mp_raise_type_arg(const mp_obj_type_t *exc_type, mp_obj_t arg) {
+MP_NORETURN void mp_raise_type_arg(const mp_obj_type_t *exc_type, mp_obj_t arg) {
     nlr_raise(mp_obj_new_exception_arg1(exc_type, arg));
 }
 
-NORETURN void mp_raise_StopIteration(mp_obj_t arg) {
+MP_NORETURN void mp_raise_StopIteration(mp_obj_t arg) {
     if (arg == MP_OBJ_NULL) {
         mp_raise_type(&mp_type_StopIteration);
     } else {
@@ -1713,7 +1722,7 @@ NORETURN void mp_raise_StopIteration(mp_obj_t arg) {
     }
 }
 
-NORETURN void mp_raise_TypeError_int_conversion(mp_const_obj_t arg) {
+MP_NORETURN void mp_raise_TypeError_int_conversion(mp_const_obj_t arg) {
     #if MICROPY_ERROR_REPORTING <= MICROPY_ERROR_REPORTING_TERSE
     (void)arg;
     mp_raise_TypeError(MP_ERROR_TEXT("can't convert to int"));
@@ -1723,11 +1732,11 @@ NORETURN void mp_raise_TypeError_int_conversion(mp_const_obj_t arg) {
     #endif
 }
 
-NORETURN void mp_raise_OSError(int errno_) {
+MP_NORETURN void mp_raise_OSError(int errno_) {
     mp_raise_type_arg(&mp_type_OSError, MP_OBJ_NEW_SMALL_INT(errno_));
 }
 
-NORETURN void mp_raise_OSError_with_filename(int errno_, const char *filename) {
+MP_NORETURN void mp_raise_OSError_with_filename(int errno_, const char *filename) {
     vstr_t vstr;
     vstr_init(&vstr, 32);
     vstr_printf(&vstr, "can't open %s", filename);
@@ -1737,7 +1746,7 @@ NORETURN void mp_raise_OSError_with_filename(int errno_, const char *filename) {
 }
 
 #if MICROPY_STACK_CHECK || MICROPY_ENABLE_PYSTACK
-NORETURN void mp_raise_recursion_depth(void) {
+MP_NORETURN void mp_raise_recursion_depth(void) {
     mp_raise_type_arg(&mp_type_RuntimeError, MP_OBJ_NEW_QSTR(MP_QSTR_maximum_space_recursion_space_depth_space_exceeded));
 }
 #endif
diff --git a/py/runtime.h b/py/runtime.h
index e8e5a758f8beb..a93488e2cdc04 100644
--- a/py/runtime.h
+++ b/py/runtime.h
@@ -30,12 +30,12 @@
 #include "py/pystack.h"
 #include "py/cstack.h"
 
-// For use with mp_call_function_1_from_nlr_jump_callback.
+// Initialize an nlr_jump_callback_node_call_function_1_t struct for use with
+// nlr_push_jump_callback(&ctx.callback, mp_call_function_1_from_nlr_jump_callback);
 #define MP_DEFINE_NLR_JUMP_CALLBACK_FUNCTION_1(ctx, f, a) \
-    nlr_jump_callback_node_call_function_1_t ctx = { \
-        .func = (void (*)(void *))(f), \
-        .arg = (a), \
-    }
+    nlr_jump_callback_node_call_function_1_t ctx; \
+    ctx.func = (void (*)(void *))(f); \
+    ctx.arg = (a)
 
 typedef enum {
     MP_VM_RETURN_NORMAL,
@@ -128,7 +128,7 @@ void mp_event_wait_indefinite(void);
 void mp_event_wait_ms(mp_uint_t timeout_ms);
 
 // extra printing method specifically for mp_obj_t's which are integral type
-int mp_print_mp_int(const mp_print_t *print, mp_obj_t x, int base, int base_char, int flags, char fill, int width, int prec);
+int mp_print_mp_int(const mp_print_t *print, mp_obj_t x, unsigned base, int base_char, int flags, char fill, int width, int prec);
 
 void mp_arg_check_num_sig(size_t n_args, size_t n_kw, uint32_t sig);
 static inline void mp_arg_check_num(size_t n_args, size_t n_kw, size_t n_args_min, size_t n_args_max, bool takes_kw) {
@@ -136,8 +136,8 @@ static inline void mp_arg_check_num(size_t n_args, size_t n_kw, size_t n_args_mi
 }
 void mp_arg_parse_all(size_t n_pos, const mp_obj_t *pos, mp_map_t *kws, size_t n_allowed, const mp_arg_t *allowed, mp_arg_val_t *out_vals);
 void mp_arg_parse_all_kw_array(size_t n_pos, size_t n_kw, const mp_obj_t *args, size_t n_allowed, const mp_arg_t *allowed, mp_arg_val_t *out_vals);
-NORETURN void mp_arg_error_terse_mismatch(void);
-NORETURN void mp_arg_error_unimpl_kw(void);
+MP_NORETURN void mp_arg_error_terse_mismatch(void);
+MP_NORETURN void mp_arg_error_unimpl_kw(void);
 
 static inline mp_obj_dict_t *mp_locals_get(void) {
     return MP_STATE_THREAD(dict_locals);
@@ -165,6 +165,7 @@ static inline void mp_thread_init_state(mp_state_thread_t *ts, size_t stack_size
     ts->gc_lock_depth = 0;
 
     // There are no pending jump callbacks or exceptions yet
+    ts->nlr_top = NULL;
     ts->nlr_jump_callback_top = NULL;
     ts->mp_pending_exception = MP_OBJ_NULL;
 
@@ -245,10 +246,10 @@ mp_obj_t mp_import_from(mp_obj_t module, qstr name);
 void mp_import_all(mp_obj_t module);
 
 #if MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_NONE
-NORETURN void mp_raise_type(const mp_obj_type_t *exc_type);
-NORETURN void mp_raise_ValueError_no_msg(void);
-NORETURN void mp_raise_TypeError_no_msg(void);
-NORETURN void mp_raise_NotImplementedError_no_msg(void);
+MP_NORETURN void mp_raise_type(const mp_obj_type_t *exc_type);
+MP_NORETURN void mp_raise_ValueError_no_msg(void);
+MP_NORETURN void mp_raise_TypeError_no_msg(void);
+MP_NORETURN void mp_raise_NotImplementedError_no_msg(void);
 #define mp_raise_msg(exc_type, msg) mp_raise_type(exc_type)
 #define mp_raise_msg_varg(exc_type, ...) mp_raise_type(exc_type)
 #define mp_raise_ValueError(msg) mp_raise_ValueError_no_msg()
@@ -256,19 +257,19 @@ NORETURN void mp_raise_NotImplementedError_no_msg(void);
 #define mp_raise_NotImplementedError(msg) mp_raise_NotImplementedError_no_msg()
 #else
 #define mp_raise_type(exc_type) mp_raise_msg(exc_type, NULL)
-NORETURN void mp_raise_msg(const mp_obj_type_t *exc_type, mp_rom_error_text_t msg);
-NORETURN void mp_raise_msg_varg(const mp_obj_type_t *exc_type, mp_rom_error_text_t fmt, ...);
-NORETURN void mp_raise_ValueError(mp_rom_error_text_t msg);
-NORETURN void mp_raise_TypeError(mp_rom_error_text_t msg);
-NORETURN void mp_raise_NotImplementedError(mp_rom_error_text_t msg);
+MP_NORETURN void mp_raise_msg(const mp_obj_type_t *exc_type, mp_rom_error_text_t msg);
+MP_NORETURN void mp_raise_msg_varg(const mp_obj_type_t *exc_type, mp_rom_error_text_t fmt, ...);
+MP_NORETURN void mp_raise_ValueError(mp_rom_error_text_t msg);
+MP_NORETURN void mp_raise_TypeError(mp_rom_error_text_t msg);
+MP_NORETURN void mp_raise_NotImplementedError(mp_rom_error_text_t msg);
 #endif
 
-NORETURN void mp_raise_type_arg(const mp_obj_type_t *exc_type, mp_obj_t arg);
-NORETURN void mp_raise_StopIteration(mp_obj_t arg);
-NORETURN void mp_raise_TypeError_int_conversion(mp_const_obj_t arg);
-NORETURN void mp_raise_OSError(int errno_);
-NORETURN void mp_raise_OSError_with_filename(int errno_, const char *filename);
-NORETURN void mp_raise_recursion_depth(void);
+MP_NORETURN void mp_raise_type_arg(const mp_obj_type_t *exc_type, mp_obj_t arg);
+MP_NORETURN void mp_raise_StopIteration(mp_obj_t arg);
+MP_NORETURN void mp_raise_TypeError_int_conversion(mp_const_obj_t arg);
+MP_NORETURN void mp_raise_OSError(int errno_);
+MP_NORETURN void mp_raise_OSError_with_filename(int errno_, const char *filename);
+MP_NORETURN void mp_raise_recursion_depth(void);
 
 #if MICROPY_BUILTIN_METHOD_CHECK_SELF_ARG
 #undef mp_check_self
diff --git a/py/scheduler.c b/py/scheduler.c
index 2170b9577e124..d4cdb59efb6b5 100644
--- a/py/scheduler.c
+++ b/py/scheduler.c
@@ -88,17 +88,21 @@ static inline void mp_sched_run_pending(void) {
 
     #if MICROPY_SCHEDULER_STATIC_NODES
     // Run all pending C callbacks.
-    while (MP_STATE_VM(sched_head) != NULL) {
-        mp_sched_node_t *node = MP_STATE_VM(sched_head);
-        MP_STATE_VM(sched_head) = node->next;
-        if (MP_STATE_VM(sched_head) == NULL) {
-            MP_STATE_VM(sched_tail) = NULL;
-        }
-        mp_sched_callback_t callback = node->callback;
-        node->callback = NULL;
-        MICROPY_END_ATOMIC_SECTION(atomic_state);
-        callback(node);
-        atomic_state = MICROPY_BEGIN_ATOMIC_SECTION();
+    mp_sched_node_t *original_tail = MP_STATE_VM(sched_tail);
+    if (original_tail != NULL) {
+        mp_sched_node_t *node;
+        do {
+            node = MP_STATE_VM(sched_head);
+            MP_STATE_VM(sched_head) = node->next;
+            if (MP_STATE_VM(sched_head) == NULL) {
+                MP_STATE_VM(sched_tail) = NULL;
+            }
+            mp_sched_callback_t callback = node->callback;
+            node->callback = NULL;
+            MICROPY_END_ATOMIC_SECTION(atomic_state);
+            callback(node);
+            atomic_state = MICROPY_BEGIN_ATOMIC_SECTION();
+        } while (node != original_tail); // Don't execute any callbacks scheduled during this run
     }
     #endif
 
diff --git a/pyproject.toml b/pyproject.toml
index 1650bd088ea22..263b120d3fea4 100644
--- a/pyproject.toml
+++ b/pyproject.toml
@@ -1,7 +1,7 @@
 [tool.codespell]
 count = ""
 ignore-regex = '\b[A-Z]{3}\b'
-ignore-words-list = "ans,asend,deques,dout,extint,hsi,iput,mis,numer,shft,synopsys,technic,ure"
+ignore-words-list = "ans,asend,deques,dout,emac,extint,hsi,iput,mis,notin,numer,ser,shft,synopsys,technic,ure,curren"
 quiet-level = 3
 skip = """
 */build*,\
@@ -27,6 +27,17 @@ line-length = 99
 target-version = "py37"
 
 [tool.ruff.lint]
+exclude = [  # Ruff finds Python SyntaxError in these files
+  "tests/cmdline/repl_autocomplete.py",
+  "tests/cmdline/repl_autoindent.py",
+  "tests/cmdline/repl_basic.py",
+  "tests/cmdline/repl_cont.py",
+  "tests/cmdline/repl_emacs_keys.py",
+  "tests/cmdline/repl_words_move.py",
+  "tests/feature_check/repl_emacs_check.py",
+  "tests/feature_check/repl_words_move_check.py",
+  "tests/micropython/viper_args.py",
+]
 extend-select = ["C9", "PLC"]
 ignore = [
   "E401",
@@ -37,14 +48,12 @@ ignore = [
   "F401",
   "F403",
   "F405",
-  "PLC1901",
+  "PLC0206",
 ]
+mccabe.max-complexity = 40
 
-[tool.ruff.mccabe]
-max-complexity = 40
-
-[tool.ruff.per-file-ignores]
-# Exclude all tests from linting (does not apply to formatting).
+[tool.ruff.lint.per-file-ignores]
+# Exclude all tests from linting.
 "tests/**/*.py" = ["ALL"]
 "ports/cc3200/tools/uniflash.py" = ["E711"]
 # manifest.py files are evaluated with some global names pre-defined
@@ -57,3 +66,4 @@ max-complexity = 40
 #   repl_: not real python files
 #   viper_args: uses f(*)
 exclude = ["tests/basics/*.py", "tests/*/repl_*.py", "tests/micropython/viper_args.py"]
+quote-style = "preserve"
diff --git a/shared/libc/abort_.c b/shared/libc/abort_.c
index 3051eae81e0ce..54eab67d3fb49 100644
--- a/shared/libc/abort_.c
+++ b/shared/libc/abort_.c
@@ -1,7 +1,7 @@
 #include <py/runtime.h>
 
-NORETURN void abort_(void);
+MP_NORETURN void abort_(void);
 
-NORETURN void abort_(void) {
+MP_NORETURN void abort_(void) {
     mp_raise_msg(&mp_type_RuntimeError, MP_ERROR_TEXT("abort() called"));
 }
diff --git a/shared/runtime/pyexec.c b/shared/runtime/pyexec.c
index 9dc4446ed4d66..c828c75817940 100644
--- a/shared/runtime/pyexec.c
+++ b/shared/runtime/pyexec.c
@@ -720,6 +720,11 @@ int pyexec_frozen_module(const char *name, bool allow_keyboard_interrupt) {
 }
 #endif
 
+int pyexec_vstr(vstr_t *str, bool allow_keyboard_interrupt) {
+    mp_uint_t exec_flags = allow_keyboard_interrupt ? 0 : EXEC_FLAG_NO_INTERRUPT;
+    return parse_compile_execute(str, MP_PARSE_FILE_INPUT, exec_flags | EXEC_FLAG_SOURCE_IS_VSTR);
+}
+
 #if MICROPY_REPL_INFO
 mp_obj_t pyb_set_repl_info(mp_obj_t o_value) {
     repl_display_debugging_info = mp_obj_get_int(o_value);
diff --git a/shared/runtime/pyexec.h b/shared/runtime/pyexec.h
index 5779d3e09a8c4..95f4481626611 100644
--- a/shared/runtime/pyexec.h
+++ b/shared/runtime/pyexec.h
@@ -42,6 +42,7 @@ int pyexec_friendly_repl(void);
 int pyexec_file(const char *filename);
 int pyexec_file_if_exists(const char *filename);
 int pyexec_frozen_module(const char *name, bool allow_keyboard_interrupt);
+int pyexec_vstr(vstr_t *str, bool allow_keyboard_interrupt);
 void pyexec_event_repl_init(void);
 int pyexec_event_repl_process_char(int c);
 extern uint8_t pyexec_repl_active;
diff --git a/shared/tinyusb/mp_usbd.c b/shared/tinyusb/mp_usbd.c
index 7ccfa7018d4bc..f03f7f7db419a 100644
--- a/shared/tinyusb/mp_usbd.c
+++ b/shared/tinyusb/mp_usbd.c
@@ -30,10 +30,6 @@
 
 #include "mp_usbd.h"
 
-#ifndef NO_QSTR
-#include "device/dcd.h"
-#endif
-
 #if !MICROPY_HW_ENABLE_USB_RUNTIME_DEVICE
 
 void mp_usbd_task(void) {
@@ -47,13 +43,8 @@ void mp_usbd_task_callback(mp_sched_node_t *node) {
 
 #endif // !MICROPY_HW_ENABLE_USB_RUNTIME_DEVICE
 
-extern void __real_dcd_event_handler(dcd_event_t const *event, bool in_isr);
-
-// If -Wl,--wrap=dcd_event_handler is passed to the linker, then this wrapper
-// will be called and allows MicroPython to schedule the TinyUSB task when
-// dcd_event_handler() is called from an ISR.
-TU_ATTR_FAST_FUNC void __wrap_dcd_event_handler(dcd_event_t const *event, bool in_isr) {
-    __real_dcd_event_handler(event, in_isr);
+// Schedule the TinyUSB task on demand, when there is a new USB device event
+TU_ATTR_FAST_FUNC void tud_event_hook_cb(uint8_t rhport, uint32_t eventid, bool in_isr) {
     mp_usbd_schedule_task();
     mp_hal_wake_main_task_from_isr();
 }
diff --git a/tests/README.md b/tests/README.md
index 891668c8b8737..21e14eee5e128 100644
--- a/tests/README.md
+++ b/tests/README.md
@@ -13,7 +13,7 @@ target platform and run the appropriate set of tests for that platform.  For exa
 
 That will run tests on the `/dev/ttyACM0` serial port.  You can also use shortcut
 device names like `a<n>` for `/dev/ttyACM<n>` and `c<n>` for `COM<n>`.  Use
-`./run-tests.py --help` to see all of the device possibilites, and other options.
+`./run-tests.py --help` to see all of the device possibilities, and other options.
 
 There are three kinds of tests:
 
diff --git a/tests/basics/attrtuple2.py b/tests/basics/attrtuple2.py
new file mode 100644
index 0000000000000..081d24b6ae92c
--- /dev/null
+++ b/tests/basics/attrtuple2.py
@@ -0,0 +1,25 @@
+# test os.uname() attrtuple, if available
+try:
+    import os
+except ImportError:
+    print("SKIP")
+    raise SystemExit
+
+try:
+    u = os.uname()
+except AttributeError:
+    print("SKIP")
+    raise SystemExit
+
+# test printing of attrtuple
+print(str(u).find("machine=") > 0)
+
+# test read attr
+print(isinstance(u.machine, str))
+
+# test str modulo operator for attrtuple
+impl_str = ("%s " * len(u)) % u
+test_str = ""
+for val in u:
+    test_str += val + " "
+print(impl_str == test_str)
diff --git a/tests/basics/builtin_range.py b/tests/basics/builtin_range.py
index 66226bad16a6d..728679bc9a1fc 100644
--- a/tests/basics/builtin_range.py
+++ b/tests/basics/builtin_range.py
@@ -32,11 +32,27 @@
 print(range(1, 4)[0:])
 print(range(1, 4)[1:])
 print(range(1, 4)[:-1])
+print(range(4, 1)[:])
+print(range(4, 1)[0:])
+print(range(4, 1)[1:])
+print(range(4, 1)[:-1])
 print(range(7, -2, -4)[:])
 print(range(1, 100, 5)[5:15:3])
 print(range(1, 100, 5)[15:5:-3])
 print(range(100, 1, -5)[5:15:3])
 print(range(100, 1, -5)[15:5:-3])
+print(range(1, 100, 5)[5:15:-3])
+print(range(1, 100, 5)[15:5:3])
+print(range(100, 1, -5)[5:15:-3])
+print(range(100, 1, -5)[15:5:3])
+print(range(1, 100, 5)[5:15:3])
+print(range(1, 100, 5)[15:5:-3])
+print(range(1, 100, -5)[5:15:3])
+print(range(1, 100, -5)[15:5:-3])
+print(range(1, 100, 5)[5:15:-3])
+print(range(1, 100, 5)[15:5:3])
+print(range(1, 100, -5)[5:15:-3])
+print(range(1, 100, -5)[15:5:3])
 
 # for this case uPy gives a different stop value but the listed elements are still correct
 print(list(range(7, -2, -4)[2:-2:]))
diff --git a/tests/basics/namedtuple1.py b/tests/basics/namedtuple1.py
index 362c60583ec32..b9689b58423b8 100644
--- a/tests/basics/namedtuple1.py
+++ b/tests/basics/namedtuple1.py
@@ -21,6 +21,9 @@
 
     print(isinstance(t, tuple))
 
+    # a NamedTuple can be used as a tuple
+    print("(%d, %d)" % t)
+
     # Check tuple can compare equal to namedtuple with same elements
     print(t == (t[0], t[1]), (t[0], t[1]) == t)
 
diff --git a/tests/basics/string_endswith.py b/tests/basics/string_endswith.py
index 683562d10c32e..2b0a063988b45 100644
--- a/tests/basics/string_endswith.py
+++ b/tests/basics/string_endswith.py
@@ -5,11 +5,28 @@
 print("foobar".endswith(""))
 print("foobar".endswith("foobarbaz"))
 
-#print("1foobar".startswith("foo", 1))
-#print("1foo".startswith("foo", 1))
-#print("1foo".startswith("1foo", 1))
-#print("1fo".startswith("foo", 1))
-#print("1fo".startswith("foo", 10))
+print("foobar".endswith("bar", 3))
+print("foobar".endswith("bar", 4))
+print("foobar".endswith("foo", 0, 3))
+print("foobar".endswith("foo", 0, 4))
+print("foobar".endswith("foo", 1, 3))
+print("foobar".endswith("foo", 1, 3))
+print("foobar".endswith("oo", 1, 3))
+print("foobar".endswith("o", 2, 3))
+print("foobar".endswith("o", 3, 3))
+print("foobar".endswith("o", 4, 3))
+
+print("foobar".endswith("bar", None, None))
+print("foobar".endswith("bar", None, 3))
+print("foobar".endswith("bar", 3, None))
+print("foobar".endswith("bar", 2, None))
+print("foobar".endswith("foo", None, 3))
+
+print("foobar".endswith(("bar", "foo")))
+print("foobar".endswith(("foo", "bar")))
+print("foobar".endswith(("foo", "bar1")))
+print("foobar".endswith(("bar", )))
+print("foobar".endswith(("foo", )))
 
 try:
     "foobar".endswith(1)
diff --git a/tests/basics/string_endswith_upy.py b/tests/basics/string_endswith_upy.py
deleted file mode 100644
index 06a4e71d2c927..0000000000000
--- a/tests/basics/string_endswith_upy.py
+++ /dev/null
@@ -1,6 +0,0 @@
-# MicroPython doesn't support tuple argument
-
-try:
-    "foobar".endswith(("bar", "sth"))
-except TypeError:
-    print("TypeError")
diff --git a/tests/basics/string_endswith_upy.py.exp b/tests/basics/string_endswith_upy.py.exp
deleted file mode 100644
index 6002b71c56ea0..0000000000000
--- a/tests/basics/string_endswith_upy.py.exp
+++ /dev/null
@@ -1 +0,0 @@
-TypeError
diff --git a/tests/basics/string_format.py b/tests/basics/string_format.py
index e8600f5836139..11e7836a73ece 100644
--- a/tests/basics/string_format.py
+++ b/tests/basics/string_format.py
@@ -22,7 +22,17 @@ def test(fmt, *args):
 test("{:4x}", 123)
 test("{:4X}", 123)
 
+test("{:4,d}", 1)
+test("{:4_d}", 1)
+test("{:4_o}", 1)
+test("{:4_b}", 1)
+test("{:4_x}", 1)
+
 test("{:4,d}", 12345678)
+test("{:4_d}", 12345678)
+test("{:4_o}", 12345678)
+test("{:4_b}", 12345678)
+test("{:4_x}", 12345678)
 
 test("{:#4b}", 10)
 test("{:#4o}", 123)
diff --git a/tests/basics/string_startswith.py b/tests/basics/string_startswith.py
index e63ae3c1866df..eefdea82198f1 100644
--- a/tests/basics/string_startswith.py
+++ b/tests/basics/string_startswith.py
@@ -10,6 +10,25 @@
 print("1fo".startswith("foo", 1))
 print("1fo".startswith("foo", 10))
 
+print("1foobar".startswith("foo", 1, 5))
+print("1foobar".startswith("foo", 1, 4))
+print("1foobar".startswith("foo", 1, 3))
+print("1foobar".startswith("oo", 2, 4))
+print("1foobar".startswith("o", 3, 4))
+print("1foobar".startswith("o", 4, 4))
+print("1foobar".startswith("o", 5, 4))
+
+print("foobar".startswith("foo", None, None))
+print("foobar".startswith("foo", None, 3))
+print("foobar".startswith("foo", None, 2))
+print("foobar".startswith("bar", 3, None))
+
+
+print("foobar".startswith(("foo", "sth")))
+print("foobar".startswith(("sth", "foo")))
+print("foobar".startswith(("sth", "foo2")))
+print("foobar".startswith(("foo", )))
+
 try:
     "foobar".startswith(1)
 except TypeError:
diff --git a/tests/basics/string_startswith_upy.py b/tests/basics/string_startswith_upy.py
deleted file mode 100644
index 9ea1796c218fd..0000000000000
--- a/tests/basics/string_startswith_upy.py
+++ /dev/null
@@ -1,6 +0,0 @@
-# MicroPython doesn't support tuple argument
-
-try:
-    "foobar".startswith(("foo", "sth"))
-except TypeError:
-    print("TypeError")
diff --git a/tests/basics/string_startswith_upy.py.exp b/tests/basics/string_startswith_upy.py.exp
deleted file mode 100644
index 6002b71c56ea0..0000000000000
--- a/tests/basics/string_startswith_upy.py.exp
+++ /dev/null
@@ -1 +0,0 @@
-TypeError
diff --git a/tests/basics/sys1.py b/tests/basics/sys1.py
index 95d8905d135c7..94220fe4a60c6 100644
--- a/tests/basics/sys1.py
+++ b/tests/basics/sys1.py
@@ -24,6 +24,12 @@
     # Effectively skip subtests
     print(int)
 
+if hasattr(sys.implementation, '_build'):
+    print(type(sys.implementation._build))
+else:
+    # Effectively skip subtests
+    print(str)
+
 try:
     print(sys.intern('micropython') == 'micropython')
     has_intern = True
diff --git a/tests/cpydiff/builtin_next_arg2.py b/tests/cpydiff/builtin_next_arg2.py
deleted file mode 100644
index 5df2d6e70f837..0000000000000
--- a/tests/cpydiff/builtin_next_arg2.py
+++ /dev/null
@@ -1,12 +0,0 @@
-"""
-categories: Modules,builtins
-description: Second argument to next() is not implemented
-cause: MicroPython is optimised for code space.
-workaround: Instead of ``val = next(it, deflt)`` use::
-
-    try:
-        val = next(it)
-    except StopIteration:
-        val = deflt
-"""
-print(next(iter(range(0)), 42))
diff --git a/tests/cpydiff/core_class_delnotimpl.py b/tests/cpydiff/core_class_delnotimpl.py
index 18c176e9bb1f7..6fac764ac9828 100644
--- a/tests/cpydiff/core_class_delnotimpl.py
+++ b/tests/cpydiff/core_class_delnotimpl.py
@@ -4,6 +4,7 @@
 cause: Unknown
 workaround: Unknown
 """
+
 import gc
 
 
diff --git a/tests/cpydiff/core_fstring_concat.py b/tests/cpydiff/core_fstring_concat.py
index 83bf18820ece1..2fbe1b961a1e6 100644
--- a/tests/cpydiff/core_fstring_concat.py
+++ b/tests/cpydiff/core_fstring_concat.py
@@ -1,12 +1,14 @@
 """
-categories: Core
+categories: Core,f-strings
 description: f-strings don't support concatenation with adjacent literals if the adjacent literals contain braces
 cause: MicroPython is optimised for code space.
 workaround: Use the + operator between literal strings when they are not both f-strings
 """
 
 x, y = 1, 2
+# fmt: off
 print("aa" f"{x}")  # works
 print(f"{x}" "ab")  # works
 print("a{}a" f"{x}")  # fails
 print(f"{x}" "a{}b")  # fails
+# fmt: on
diff --git a/tests/cpydiff/core_fstring_parser.py b/tests/cpydiff/core_fstring_parser.py
index 22bbc5866ec3a..570b92434a9a0 100644
--- a/tests/cpydiff/core_fstring_parser.py
+++ b/tests/cpydiff/core_fstring_parser.py
@@ -1,5 +1,5 @@
 """
-categories: Core
+categories: Core,f-strings
 description: f-strings cannot support expressions that require parsing to resolve unbalanced nested braces and brackets
 cause: MicroPython is optimised for code space.
 workaround: Always use balanced braces and brackets in expressions inside f-strings
diff --git a/tests/cpydiff/core_fstring_repr.py b/tests/cpydiff/core_fstring_repr.py
index d37fb48db758c..2589a34b7e3b9 100644
--- a/tests/cpydiff/core_fstring_repr.py
+++ b/tests/cpydiff/core_fstring_repr.py
@@ -1,5 +1,5 @@
 """
-categories: Core
+categories: Core,f-strings
 description: f-strings don't support !a conversions
 cause: MicropPython does not implement ascii()
 workaround: None
diff --git a/tests/cpydiff/core_function_argcount.py b/tests/cpydiff/core_function_argcount.py
index 5f3dca4dcdbe4..c257def726aca 100644
--- a/tests/cpydiff/core_function_argcount.py
+++ b/tests/cpydiff/core_function_argcount.py
@@ -4,6 +4,7 @@
 cause: MicroPython counts "self" as an argument.
 workaround: Interpret error messages with the information above in mind.
 """
+
 try:
     [].append()
 except Exception as e:
diff --git a/tests/cpydiff/core_import_all.py b/tests/cpydiff/core_import_all.py
index 5adf9ae3eb1e6..0fbe9d4d4ecd6 100644
--- a/tests/cpydiff/core_import_all.py
+++ b/tests/cpydiff/core_import_all.py
@@ -4,6 +4,7 @@
 cause: Not implemented.
 workaround: Manually import the sub-modules directly in __init__.py using ``from . import foo, bar``.
 """
+
 from modules3 import *
 
 foo.hello()
diff --git a/tests/cpydiff/core_import_path.py b/tests/cpydiff/core_import_path.py
index 959fd571f57ab..2028386be84b0 100644
--- a/tests/cpydiff/core_import_path.py
+++ b/tests/cpydiff/core_import_path.py
@@ -4,6 +4,7 @@
 cause: MicroPython doesn't support namespace packages split across filesystem. Beyond that, MicroPython's import system is highly optimized for minimal memory usage.
 workaround: Details of import handling is inherently implementation dependent. Don't rely on such details in portable applications.
 """
+
 import modules
 
 print(modules.__path__)
diff --git a/tests/cpydiff/core_import_split_ns_pkgs.py b/tests/cpydiff/core_import_split_ns_pkgs.py
index 5c92b63124a50..a1cfd84893d4e 100644
--- a/tests/cpydiff/core_import_split_ns_pkgs.py
+++ b/tests/cpydiff/core_import_split_ns_pkgs.py
@@ -4,6 +4,7 @@
 cause: MicroPython's import system is highly optimized for simplicity, minimal memory usage, and minimal filesystem search overhead.
 workaround: Don't install modules belonging to the same namespace package in different directories. For MicroPython, it's recommended to have at most 3-component module search paths: for your current application, per-user (writable), system-wide (non-writable).
 """
+
 import sys
 
 sys.path.append(sys.path[1] + "/modules")
diff --git a/tests/cpydiff/core_locals_eval.py b/tests/cpydiff/core_locals_eval.py
index 025d226372986..3f6ad2a1dbbc6 100644
--- a/tests/cpydiff/core_locals_eval.py
+++ b/tests/cpydiff/core_locals_eval.py
@@ -4,6 +4,7 @@
 cause: MicroPython doesn't maintain symbolic local environment, it is optimized to an array of slots. Thus, local variables can't be accessed by a name. Effectively, ``eval(expr)`` in MicroPython is equivalent to ``eval(expr, globals(), globals())``.
 workaround: Unknown
 """
+
 val = 1
 
 
diff --git a/tests/cpydiff/module_array_comparison.py b/tests/cpydiff/module_array_comparison.py
index a442af3f5bc96..4929b1e590dac 100644
--- a/tests/cpydiff/module_array_comparison.py
+++ b/tests/cpydiff/module_array_comparison.py
@@ -4,6 +4,7 @@
 cause: Code size
 workaround: Compare individual elements
 """
+
 import array
 
 array.array("b", [1, 2]) == array.array("i", [1, 2])
diff --git a/tests/cpydiff/module_array_constructor.py b/tests/cpydiff/module_array_constructor.py
index 08cf2ef2d1c3c..a53589d22ae76 100644
--- a/tests/cpydiff/module_array_constructor.py
+++ b/tests/cpydiff/module_array_constructor.py
@@ -4,6 +4,7 @@
 cause: MicroPython implements implicit truncation in order to reduce code size and execution time
 workaround: If CPython compatibility is needed then mask the value explicitly
 """
+
 import array
 
 a = array.array("b", [257])
diff --git a/tests/cpydiff/modules_array_containment.py b/tests/cpydiff/modules_array_containment.py
index 8f25b0d49149d..b29895aa75892 100644
--- a/tests/cpydiff/modules_array_containment.py
+++ b/tests/cpydiff/modules_array_containment.py
@@ -4,6 +4,7 @@
 cause: Unknown
 workaround: Unknown
 """
+
 import array
 
 print(1 in array.array("B", b"12"))
diff --git a/tests/cpydiff/modules_array_deletion.py b/tests/cpydiff/modules_array_deletion.py
index 3376527373edf..2e7c31124b2da 100644
--- a/tests/cpydiff/modules_array_deletion.py
+++ b/tests/cpydiff/modules_array_deletion.py
@@ -4,6 +4,7 @@
 cause: Unknown
 workaround: Unknown
 """
+
 import array
 
 a = array.array("b", (1, 2, 3))
diff --git a/tests/cpydiff/modules_array_subscrstep.py b/tests/cpydiff/modules_array_subscrstep.py
index 24308bd9042d1..65b12332f54cd 100644
--- a/tests/cpydiff/modules_array_subscrstep.py
+++ b/tests/cpydiff/modules_array_subscrstep.py
@@ -4,6 +4,7 @@
 cause: Unknown
 workaround: Unknown
 """
+
 import array
 
 a = array.array("b", (1, 2, 3))
diff --git a/tests/cpydiff/modules_json_nonserializable.py b/tests/cpydiff/modules_json_nonserializable.py
index d6a5660cadfdb..d83e7beca2d5a 100644
--- a/tests/cpydiff/modules_json_nonserializable.py
+++ b/tests/cpydiff/modules_json_nonserializable.py
@@ -4,6 +4,7 @@
 cause: Unknown
 workaround: Unknown
 """
+
 import json
 
 try:
diff --git a/tests/cpydiff/modules_os_environ.py b/tests/cpydiff/modules_os_environ.py
index 491d8a3101636..4edde16656781 100644
--- a/tests/cpydiff/modules_os_environ.py
+++ b/tests/cpydiff/modules_os_environ.py
@@ -4,6 +4,7 @@
 cause: Unknown
 workaround: Use ``getenv``, ``putenv`` and ``unsetenv``
 """
+
 import os
 
 try:
diff --git a/tests/cpydiff/modules_os_getenv.py b/tests/cpydiff/modules_os_getenv.py
index d1e828438e456..d5acd414eb3da 100644
--- a/tests/cpydiff/modules_os_getenv.py
+++ b/tests/cpydiff/modules_os_getenv.py
@@ -4,6 +4,7 @@
 cause: The ``environ`` attribute is not implemented
 workaround: Unknown
 """
+
 import os
 
 print(os.getenv("NEW_VARIABLE"))
diff --git a/tests/cpydiff/modules_struct_fewargs.py b/tests/cpydiff/modules_struct_fewargs.py
index cb6b0fd874ec4..49b2a3213c898 100644
--- a/tests/cpydiff/modules_struct_fewargs.py
+++ b/tests/cpydiff/modules_struct_fewargs.py
@@ -4,6 +4,7 @@
 cause: Unknown
 workaround: Unknown
 """
+
 import struct
 
 try:
diff --git a/tests/cpydiff/modules_struct_manyargs.py b/tests/cpydiff/modules_struct_manyargs.py
index 03395baad3b59..e3b78930f219f 100644
--- a/tests/cpydiff/modules_struct_manyargs.py
+++ b/tests/cpydiff/modules_struct_manyargs.py
@@ -4,6 +4,7 @@
 cause: Unknown
 workaround: Unknown
 """
+
 import struct
 
 try:
diff --git a/tests/cpydiff/modules_struct_whitespace_in_format.py b/tests/cpydiff/modules_struct_whitespace_in_format.py
index a882b38569a95..a7a1d2facdfff 100644
--- a/tests/cpydiff/modules_struct_whitespace_in_format.py
+++ b/tests/cpydiff/modules_struct_whitespace_in_format.py
@@ -4,6 +4,7 @@
 cause: MicroPython is optimised for code size.
 workaround: Don't use spaces in format strings.
 """
+
 import struct
 
 try:
diff --git a/tests/cpydiff/modules_sys_stdassign.py b/tests/cpydiff/modules_sys_stdassign.py
index 7d086078a93d6..29afe1b1203c9 100644
--- a/tests/cpydiff/modules_sys_stdassign.py
+++ b/tests/cpydiff/modules_sys_stdassign.py
@@ -4,6 +4,7 @@
 cause: They are stored in read-only memory.
 workaround: Unknown
 """
+
 import sys
 
 sys.stdin = None
diff --git a/tests/cpydiff/syntax_arg_unpacking.py b/tests/cpydiff/syntax_arg_unpacking.py
index e54832ddb9165..7133a8a28272c 100644
--- a/tests/cpydiff/syntax_arg_unpacking.py
+++ b/tests/cpydiff/syntax_arg_unpacking.py
@@ -1,5 +1,5 @@
 """
-categories: Syntax
+categories: Syntax,Unpacking
 description: Argument unpacking does not work if the argument being unpacked is the nth or greater argument where n is the number of bits in an MP_SMALL_INT.
 cause: The implementation uses an MP_SMALL_INT to flag args that need to be unpacked.
 workaround: Use fewer arguments.
diff --git a/tests/cpydiff/syntax_assign_expr.py b/tests/cpydiff/syntax_assign_expr.py
index d4ed063b39ae7..704c5c3ecab37 100644
--- a/tests/cpydiff/syntax_assign_expr.py
+++ b/tests/cpydiff/syntax_assign_expr.py
@@ -1,7 +1,8 @@
 """
 categories: Syntax,Operators
-description: MicroPython allows using := to assign to the variable of a comprehension, CPython raises a SyntaxError.
-cause: MicroPython is optimised for code size and doesn't check this case.
-workaround: Do not rely on this behaviour if writing CPython compatible code.
+description: MicroPython allows := to assign to the iteration variable in nested comprehensions, CPython does not.
+cause: MicroPython is optimised for code size. Although it is a syntax error to assign to the iteration variable in a standard comprehension (same as CPython), it doesn't check if an inner nested comprehension assigns to the iteration variable of the outer comprehension.
+workaround: Do not use := to assign to the iteration variable of a comprehension.
 """
-print([i := -1 for i in range(4)])
+
+print([[(j := i) for i in range(2)] for j in range(2)])
diff --git a/tests/cpydiff/syntax_literal_underscore.py b/tests/cpydiff/syntax_literal_underscore.py
new file mode 100644
index 0000000000000..4b1406e9f3f71
--- /dev/null
+++ b/tests/cpydiff/syntax_literal_underscore.py
@@ -0,0 +1,19 @@
+"""
+categories: Syntax,Literals
+description: MicroPython accepts underscores in numeric literals where CPython doesn't
+cause: Different parser implementation
+
+MicroPython's tokenizer ignores underscores in numeric literals, while CPython
+rejects multiple consecutive underscores and underscores after the last digit.
+
+workaround: Remove the underscores not accepted by CPython.
+"""
+
+try:
+    print(eval("1__1"))
+except SyntaxError:
+    print("Should not work")
+try:
+    print(eval("1_"))
+except SyntaxError:
+    print("Should not work")
diff --git a/tests/cpydiff/syntax_spaces.py b/tests/cpydiff/syntax_spaces.py
index c308240a78da5..670cefdeac23e 100644
--- a/tests/cpydiff/syntax_spaces.py
+++ b/tests/cpydiff/syntax_spaces.py
@@ -1,9 +1,17 @@
 """
-categories: Syntax,Spaces
-description: uPy requires spaces between literal numbers and keywords, CPy doesn't
-cause: Unknown
-workaround: Unknown
+categories: Syntax,Literals
+description: MicroPython requires spaces between literal numbers and keywords or ".", CPython doesn't
+cause: Different parser implementation
+
+MicroPython's tokenizer treats a sequence like ``1and`` as a single token, while CPython treats it as two tokens.
+
+Since CPython 3.11, when the literal number is followed by a token, this syntax causes a ``SyntaxWarning`` for an "invalid literal". When a literal number is followed by a "." denoting attribute access, CPython does not warn.
+
+workaround: Add a space between the integer literal and the intended next token.
+
+This also fixes the ``SyntaxWarning`` in CPython.
 """
+
 try:
     print(eval("1and 0"))
 except SyntaxError:
@@ -16,3 +24,7 @@
     print(eval("1if 1else 0"))
 except SyntaxError:
     print("Should have worked")
+try:
+    print(eval("0x1.to_bytes(1)"))
+except SyntaxError:
+    print("Should have worked")
diff --git a/tests/cpydiff/syntax_unicode_nameesc.py b/tests/cpydiff/syntax_unicode_nameesc.py
index 21628c974d80f..838394b6ebd09 100644
--- a/tests/cpydiff/syntax_unicode_nameesc.py
+++ b/tests/cpydiff/syntax_unicode_nameesc.py
@@ -4,4 +4,5 @@
 cause: Unknown
 workaround: Unknown
 """
+
 print("\N{LATIN SMALL LETTER A}")
diff --git a/tests/cpydiff/types_bytearray_sliceassign.py b/tests/cpydiff/types_bytearray_sliceassign.py
index e4068b04b988b..353f61988fa04 100644
--- a/tests/cpydiff/types_bytearray_sliceassign.py
+++ b/tests/cpydiff/types_bytearray_sliceassign.py
@@ -4,6 +4,7 @@
 cause: Unknown
 workaround: Unknown
 """
+
 b = bytearray(4)
 b[0:1] = [1, 2]
 print(b)
diff --git a/tests/cpydiff/types_bytes_format.py b/tests/cpydiff/types_bytes_format.py
index ad0498771165c..1a15e572c8ade 100644
--- a/tests/cpydiff/types_bytes_format.py
+++ b/tests/cpydiff/types_bytes_format.py
@@ -4,4 +4,5 @@
 cause: MicroPython strives to be a more regular implementation, so if both `str` and `bytes` support ``__mod__()`` (the % operator), it makes sense to support ``format()`` for both too. Support for ``__mod__`` can also be compiled out, which leaves only ``format()`` for bytes formatting.
 workaround: If you are interested in CPython compatibility, don't use ``.format()`` on bytes objects.
 """
+
 print(b"{}".format(1))
diff --git a/tests/cpydiff/types_bytes_keywords.py b/tests/cpydiff/types_bytes_keywords.py
index ade83d0a709eb..a459c94b41ed9 100644
--- a/tests/cpydiff/types_bytes_keywords.py
+++ b/tests/cpydiff/types_bytes_keywords.py
@@ -4,4 +4,5 @@
 cause: Unknown
 workaround: Pass the encoding as a positional parameter, e.g. ``print(bytes('abc', 'utf-8'))``
 """
+
 print(bytes("abc", encoding="utf8"))
diff --git a/tests/cpydiff/types_bytes_subscrstep.py b/tests/cpydiff/types_bytes_subscrstep.py
index 51b94cb710f1c..c566cbdb630aa 100644
--- a/tests/cpydiff/types_bytes_subscrstep.py
+++ b/tests/cpydiff/types_bytes_subscrstep.py
@@ -4,4 +4,5 @@
 cause: MicroPython is highly optimized for memory usage.
 workaround: Use explicit loop for this very rare operation.
 """
+
 print(b"123"[0:3:2])
diff --git a/tests/cpydiff/types_dict_keys_set.py b/tests/cpydiff/types_dict_keys_set.py
index 3a0849a35564c..a5f127962e6c2 100644
--- a/tests/cpydiff/types_dict_keys_set.py
+++ b/tests/cpydiff/types_dict_keys_set.py
@@ -4,4 +4,5 @@
 cause: Not implemented.
 workaround: Explicitly convert keys to a set before using set operations.
 """
+
 print({1: 2, 3: 4}.keys() & {1})
diff --git a/tests/cpydiff/types_exception_attrs.py b/tests/cpydiff/types_exception_attrs.py
index ad72b62a61a5d..5fed45451d2d9 100644
--- a/tests/cpydiff/types_exception_attrs.py
+++ b/tests/cpydiff/types_exception_attrs.py
@@ -4,6 +4,7 @@
 cause: MicroPython is optimised to reduce code size.
 workaround: Only use ``value`` on ``StopIteration`` exceptions, and ``errno`` on ``OSError`` exceptions.  Do not use or rely on these attributes on other exceptions.
 """
+
 e = Exception(1)
 print(e.value)
 print(e.errno)
diff --git a/tests/cpydiff/types_exception_chaining.py b/tests/cpydiff/types_exception_chaining.py
index 836c4eb3e73f5..cff68d4124aec 100644
--- a/tests/cpydiff/types_exception_chaining.py
+++ b/tests/cpydiff/types_exception_chaining.py
@@ -4,6 +4,7 @@
 cause: Unknown
 workaround: Unknown
 """
+
 try:
     raise TypeError
 except TypeError:
diff --git a/tests/cpydiff/types_exception_instancevar.py b/tests/cpydiff/types_exception_instancevar.py
index adc353361f015..fb67771baf33e 100644
--- a/tests/cpydiff/types_exception_instancevar.py
+++ b/tests/cpydiff/types_exception_instancevar.py
@@ -4,6 +4,7 @@
 cause: MicroPython is highly optimized for memory usage.
 workaround: Use user-defined exception subclasses.
 """
+
 e = Exception()
 e.x = 0
 print(e.x)
diff --git a/tests/cpydiff/types_exception_loops.py b/tests/cpydiff/types_exception_loops.py
index 8d326cbbbb000..549f1dd0a5bf0 100644
--- a/tests/cpydiff/types_exception_loops.py
+++ b/tests/cpydiff/types_exception_loops.py
@@ -4,6 +4,7 @@
 cause: Condition checks are optimized to happen at the end of loop body, and that line number is reported.
 workaround: Unknown
 """
+
 l = ["-foo", "-bar"]
 
 i = 0
diff --git a/tests/cpydiff/types_float_rounding.py b/tests/cpydiff/types_float_rounding.py
index a5b591966b0de..206e359ed9be7 100644
--- a/tests/cpydiff/types_float_rounding.py
+++ b/tests/cpydiff/types_float_rounding.py
@@ -4,4 +4,5 @@
 cause: Unknown
 workaround: Unknown
 """
+
 print("%.1g" % -9.9)
diff --git a/tests/cpydiff/types_list_delete_subscrstep.py b/tests/cpydiff/types_list_delete_subscrstep.py
index 36e6f526b3d23..3c801d84949e0 100644
--- a/tests/cpydiff/types_list_delete_subscrstep.py
+++ b/tests/cpydiff/types_list_delete_subscrstep.py
@@ -4,6 +4,7 @@
 cause: Unknown
 workaround: Use explicit loop for this rare operation.
 """
+
 l = [1, 2, 3, 4]
 del l[0:4:2]
 print(l)
diff --git a/tests/cpydiff/types_list_store_noniter.py b/tests/cpydiff/types_list_store_noniter.py
index 1d69b4a823188..581b1369801ac 100644
--- a/tests/cpydiff/types_list_store_noniter.py
+++ b/tests/cpydiff/types_list_store_noniter.py
@@ -4,6 +4,7 @@
 cause: RHS is restricted to be a tuple or list
 workaround: Use ``list(<iter>)`` on RHS to convert the iterable to a list
 """
+
 l = [10, 20]
 l[0:1] = range(4)
 print(l)
diff --git a/tests/cpydiff/types_list_store_subscrstep.py b/tests/cpydiff/types_list_store_subscrstep.py
index 1460372bb1754..97590267f4a64 100644
--- a/tests/cpydiff/types_list_store_subscrstep.py
+++ b/tests/cpydiff/types_list_store_subscrstep.py
@@ -4,6 +4,7 @@
 cause: Unknown
 workaround: Use explicit loop for this rare operation.
 """
+
 l = [1, 2, 3, 4]
 l[0:4:2] = [5, 6]
 print(l)
diff --git a/tests/cpydiff/types_memoryview_invalid.py b/tests/cpydiff/types_memoryview_invalid.py
index c995a2e8991c6..f288c50ab57b7 100644
--- a/tests/cpydiff/types_memoryview_invalid.py
+++ b/tests/cpydiff/types_memoryview_invalid.py
@@ -6,6 +6,7 @@
 In the worst case scenario, resizing an object which is the target of a memoryview can cause the memoryview(s) to reference invalid freed memory (a use-after-free bug) and corrupt the MicroPython runtime.
 workaround: Do not change the size of any ``bytearray`` or ``io.bytesIO`` object that has a ``memoryview`` assigned to it.
 """
+
 b = bytearray(b"abcdefg")
 m = memoryview(b)
 b.extend(b"hijklmnop")
diff --git a/tests/cpydiff/types_str_endswith.py b/tests/cpydiff/types_str_endswith.py
deleted file mode 100644
index f222ac1cd3ad3..0000000000000
--- a/tests/cpydiff/types_str_endswith.py
+++ /dev/null
@@ -1,7 +0,0 @@
-"""
-categories: Types,str
-description: Start/end indices such as str.endswith(s, start) not implemented
-cause: Unknown
-workaround: Unknown
-"""
-print("abc".endswith("c", 1))
diff --git a/tests/cpydiff/types_str_formatsep.py b/tests/cpydiff/types_str_formatsep.py
new file mode 100644
index 0000000000000..05d0b8d3d2cf4
--- /dev/null
+++ b/tests/cpydiff/types_str_formatsep.py
@@ -0,0 +1,19 @@
+"""
+categories: Types,str
+description: MicroPython accepts the "," grouping option with any radix, unlike CPython
+cause: To reduce code size, MicroPython does not issue an error for this combination
+workaround: Do not use a format string like ``{:,b}`` if CPython compatibility is required.
+"""
+
+try:
+    print("{:,b}".format(99))
+except ValueError:
+    print("ValueError")
+try:
+    print("{:,x}".format(99))
+except ValueError:
+    print("ValueError")
+try:
+    print("{:,o}".format(99))
+except ValueError:
+    print("ValueError")
diff --git a/tests/cpydiff/types_str_formatsubscr.py b/tests/cpydiff/types_str_formatsubscr.py
index 1b83cfff6cd34..5c59a1d200a9b 100644
--- a/tests/cpydiff/types_str_formatsubscr.py
+++ b/tests/cpydiff/types_str_formatsubscr.py
@@ -4,4 +4,5 @@
 cause: Unknown
 workaround: Unknown
 """
+
 print("{a[0]}".format(a=[1, 2]))
diff --git a/tests/cpydiff/types_str_keywords.py b/tests/cpydiff/types_str_keywords.py
index 77a4eac1c1db2..640dfa6c39132 100644
--- a/tests/cpydiff/types_str_keywords.py
+++ b/tests/cpydiff/types_str_keywords.py
@@ -4,4 +4,5 @@
 cause: Unknown
 workaround: Input the encoding format directly. eg ``print(bytes('abc', 'utf-8'))``
 """
+
 print(str(b"abc", encoding="utf8"))
diff --git a/tests/cpydiff/types_str_ljust_rjust.py b/tests/cpydiff/types_str_ljust_rjust.py
index 72e5105e025b2..7f91c137e905f 100644
--- a/tests/cpydiff/types_str_ljust_rjust.py
+++ b/tests/cpydiff/types_str_ljust_rjust.py
@@ -4,4 +4,5 @@
 cause: MicroPython is highly optimized for memory usage. Easy workarounds available.
 workaround: Instead of ``s.ljust(10)`` use ``"%-10s" % s``, instead of ``s.rjust(10)`` use ``"% 10s" % s``. Alternatively, ``"{:<10}".format(s)`` or ``"{:>10}".format(s)``.
 """
+
 print("abc".ljust(10))
diff --git a/tests/cpydiff/types_str_rsplitnone.py b/tests/cpydiff/types_str_rsplitnone.py
index 5d334fea2f846..ae524620a08a8 100644
--- a/tests/cpydiff/types_str_rsplitnone.py
+++ b/tests/cpydiff/types_str_rsplitnone.py
@@ -4,4 +4,5 @@
 cause: Unknown
 workaround: Unknown
 """
+
 print("a a a".rsplit(None, 1))
diff --git a/tests/cpydiff/types_str_subscrstep.py b/tests/cpydiff/types_str_subscrstep.py
index 2d3245e5582f5..cd57f18ccb345 100644
--- a/tests/cpydiff/types_str_subscrstep.py
+++ b/tests/cpydiff/types_str_subscrstep.py
@@ -4,4 +4,5 @@
 cause: Unknown
 workaround: Unknown
 """
+
 print("abcdefghi"[0:9:2])
diff --git a/tests/cpydiff/types_tuple_subscrstep.py b/tests/cpydiff/types_tuple_subscrstep.py
index f90f3c5bf4d16..60ba31af4cf74 100644
--- a/tests/cpydiff/types_tuple_subscrstep.py
+++ b/tests/cpydiff/types_tuple_subscrstep.py
@@ -4,4 +4,5 @@
 cause: Unknown
 workaround: Unknown
 """
+
 print((1, 2, 3, 4)[0:4:2])
diff --git a/tests/extmod/asyncio_event_queue.py b/tests/extmod/asyncio_event_queue.py
new file mode 100644
index 0000000000000..e0125b1aefe13
--- /dev/null
+++ b/tests/extmod/asyncio_event_queue.py
@@ -0,0 +1,64 @@
+# Ensure that an asyncio task can wait on an Event when the
+# _task_queue is empty
+# https://github.com/micropython/micropython/issues/16569
+
+try:
+    import asyncio
+except ImportError:
+    print("SKIP")
+    raise SystemExit
+
+# This test requires checking that the asyncio scheduler
+# remains active "indefinitely" when the task queue is empty.
+#
+# To check this, we need another independent scheduler that
+# can wait for a certain amount of time. So we have to
+# create one using micropython.schedule() and time.ticks_ms()
+#
+# Technically, this code breaks the rules, as it is clearly
+# documented that Event.set() should _NOT_ be called from a
+# schedule (soft IRQ) because in some cases, a race condition
+# can occur, resulting in a crash. However:
+# - since the risk of a race condition in that specific
+#   case has been analysed and excluded
+# - given that there is no other simple alternative to
+#   write this test case,
+# an exception to the rule was deemed acceptable. See
+# https://github.com/micropython/micropython/pull/16772
+
+import micropython, time
+
+try:
+    micropython.schedule
+except AttributeError:
+    print("SKIP")
+    raise SystemExit
+
+
+evt = asyncio.Event()
+
+
+def schedule_watchdog(end_ticks):
+    if time.ticks_diff(end_ticks, time.ticks_ms()) <= 0:
+        print("asyncio still pending, unlocking event")
+        # Caution: about to call Event.set() from a schedule
+        #          (see the note in the comment above)
+        evt.set()
+        return
+    micropython.schedule(schedule_watchdog, end_ticks)
+
+
+async def foo():
+    print("foo waiting")
+    schedule_watchdog(time.ticks_add(time.ticks_ms(), 100))
+    await evt.wait()
+    print("foo done")
+
+
+async def main():
+    print("main started")
+    await foo()
+    print("main done")
+
+
+asyncio.run(main())
diff --git a/tests/extmod/asyncio_event_queue.py.exp b/tests/extmod/asyncio_event_queue.py.exp
new file mode 100644
index 0000000000000..ee42c96d83ed8
--- /dev/null
+++ b/tests/extmod/asyncio_event_queue.py.exp
@@ -0,0 +1,5 @@
+main started
+foo waiting
+asyncio still pending, unlocking event
+foo done
+main done
diff --git a/tests/extmod/asyncio_iterator_event.py b/tests/extmod/asyncio_iterator_event.py
new file mode 100644
index 0000000000000..6efa6b864567a
--- /dev/null
+++ b/tests/extmod/asyncio_iterator_event.py
@@ -0,0 +1,86 @@
+# Ensure that an asyncio task can wait on an Event when the
+# _task_queue is empty, in the context of an async iterator
+# https://github.com/micropython/micropython/issues/16318
+
+try:
+    import asyncio
+except ImportError:
+    print("SKIP")
+    raise SystemExit
+
+# This test requires checking that the asyncio scheduler
+# remains active "indefinitely" when the task queue is empty.
+#
+# To check this, we need another independent scheduler that
+# can wait for a certain amount of time. So we have to
+# create one using micropython.schedule() and time.ticks_ms()
+#
+# Technically, this code breaks the rules, as it is clearly
+# documented that Event.set() should _NOT_ be called from a
+# schedule (soft IRQ) because in some cases, a race condition
+# can occur, resulting in a crash. However:
+# - since the risk of a race condition in that specific
+#   case has been analysed and excluded
+# - given that there is no other simple alternative to
+#   write this test case,
+# an exception to the rule was deemed acceptable. See
+# https://github.com/micropython/micropython/pull/16772
+
+import micropython, time
+
+try:
+    micropython.schedule
+except AttributeError:
+    print("SKIP")
+    raise SystemExit
+
+ai = None
+
+
+def schedule_watchdog(end_ticks):
+    if time.ticks_diff(end_ticks, time.ticks_ms()) <= 0:
+        print("good: asyncio iterator is still pending, exiting")
+        # Caution: ai.fetch_data() will invoke Event.set()
+        #          (see the note in the comment above)
+        ai.fetch_data(None)
+        return
+    micropython.schedule(schedule_watchdog, end_ticks)
+
+
+async def test(ai):
+    for x in range(3):
+        await asyncio.sleep(0.1)
+        ai.fetch_data(f"bar {x}")
+
+
+class AsyncIterable:
+    def __init__(self):
+        self.message = None
+        self.evt = asyncio.Event()
+
+    def __aiter__(self):
+        return self
+
+    async def __anext__(self):
+        await self.evt.wait()
+        self.evt.clear()
+        if self.message is None:
+            raise StopAsyncIteration
+        return self.message
+
+    def fetch_data(self, message):
+        self.message = message
+        self.evt.set()
+
+
+async def main():
+    global ai
+    ai = AsyncIterable()
+    asyncio.create_task(test(ai))
+    schedule_watchdog(time.ticks_add(time.ticks_ms(), 500))
+    async for message in ai:
+        print(message)
+    print("end main")
+
+
+asyncio.run(main())
diff --git a/tests/extmod/asyncio_iterator_event.py.exp b/tests/extmod/asyncio_iterator_event.py.exp
new file mode 100644
index 0000000000000..a1893197d02ef
--- /dev/null
+++ b/tests/extmod/asyncio_iterator_event.py.exp
@@ -0,0 +1,5 @@
+bar 0
+bar 1
+bar 2
+good: asyncio iterator is still pending, exiting
+end main
diff --git a/tests/extmod/asyncio_wait_for_linked_task.py b/tests/extmod/asyncio_wait_for_linked_task.py
new file mode 100644
index 0000000000000..4dda62d5476c7
--- /dev/null
+++ b/tests/extmod/asyncio_wait_for_linked_task.py
@@ -0,0 +1,66 @@
+# Test asyncio.wait_for, with dependent tasks
+# https://github.com/micropython/micropython/issues/16759
+
+try:
+    import asyncio
+except ImportError:
+    print("SKIP")
+    raise SystemExit
+
+
+# CPython 3.12 deprecated calling get_event_loop() when there is no current event
+# loop, so to make this test run on CPython requires setting the event loop.
+if hasattr(asyncio, "set_event_loop"):
+    asyncio.set_event_loop(asyncio.new_event_loop())
+
+
+class Worker:
+    def __init__(self):
+        self._eventLoop = None
+        self._tasks = []
+
+    def launchTask(self, asyncJob):
+        if self._eventLoop is None:
+            self._eventLoop = asyncio.get_event_loop()
+        return self._eventLoop.create_task(asyncJob)
+
+    async def job(self, prerequisite, taskName):
+        if prerequisite:
+            await prerequisite
+        await asyncio.sleep(0.1)
+        print(taskName, "work completed")
+
+    def planTasks(self):
+        self._tasks.append(self.launchTask(self.job(None, "task0")))
+        self._tasks.append(self.launchTask(self.job(self._tasks[0], "task1")))
+        self._tasks.append(self.launchTask(self.job(self._tasks[1], "task2")))
+
+    async def waitForTask(self, taskIdx):
+        return await self._tasks[taskIdx]
+
+    def syncWaitForTask(self, taskIdx):
+        return self._eventLoop.run_until_complete(self._tasks[taskIdx])
+
+
+async def async_test():
+    print("--- async test")
+    worker = Worker()
+    worker.planTasks()
+    await worker.waitForTask(0)
+    print("-> task0 done")
+    await worker.waitForTask(2)
+    print("-> task2 done")
+
+
+def sync_test():
+    print("--- sync test")
+    worker = Worker()
+    worker.planTasks()
+    worker.syncWaitForTask(0)
+    print("-> task0 done")
+    worker.syncWaitForTask(2)
+    print("-> task2 done")
+
+
+asyncio.get_event_loop().run_until_complete(async_test())
+sync_test()
diff --git a/tests/extmod/binascii_hexlify.py b/tests/extmod/binascii_hexlify.py
index d06029aabaffb..ae90b67336586 100644
--- a/tests/extmod/binascii_hexlify.py
+++ b/tests/extmod/binascii_hexlify.py
@@ -1,5 +1,5 @@
 try:
-    import binascii
+    from binascii import hexlify
 except ImportError:
     print("SKIP")
     raise SystemExit
@@ -10,10 +10,10 @@
     b"\x7f\x80\xff",
     b"1234ABCDabcd",
 ):
-    print(binascii.hexlify(x))
+    print(hexlify(x))
 
 # Two-argument version (now supported in CPython)
-print(binascii.hexlify(b"123", ":"))
+print(hexlify(b"123", ":"))
 
 # zero length buffer
-print(binascii.hexlify(b"", b":"))
+print(hexlify(b"", b":"))
diff --git a/tests/extmod/binascii_unhexlify.py b/tests/extmod/binascii_unhexlify.py
index bb663bc5b0c0d..ec31fb2325aa3 100644
--- a/tests/extmod/binascii_unhexlify.py
+++ b/tests/extmod/binascii_unhexlify.py
@@ -1,5 +1,5 @@
 try:
-    import binascii
+    from binascii import unhexlify
 except ImportError:
     print("SKIP")
     raise SystemExit
@@ -10,14 +10,14 @@
     b"7f80ff",
     b"313233344142434461626364",
 ):
-    print(binascii.unhexlify(x))
+    print(unhexlify(x))
 
 try:
-    a = binascii.unhexlify(b"0")  # odd buffer length
+    a = unhexlify(b"0")  # odd buffer length
 except ValueError:
     print("ValueError")
 
 try:
-    a = binascii.unhexlify(b"gg")  # digit not hex
+    a = unhexlify(b"gg")  # digit not hex
 except ValueError:
     print("ValueError")
diff --git a/tests/extmod/deflate_compress_memory_error.py b/tests/extmod/deflate_compress_memory_error.py
new file mode 100644
index 0000000000000..56ce0603081d4
--- /dev/null
+++ b/tests/extmod/deflate_compress_memory_error.py
@@ -0,0 +1,39 @@
+# Test deflate.DeflateIO compression, with out-of-memory errors.
+
+try:
+    # Check if deflate is available.
+    import deflate
+    import io
+except ImportError:
+    print("SKIP")
+    raise SystemExit
+
+# Check if compression is enabled.
+if not hasattr(deflate.DeflateIO, "write"):
+    print("SKIP")
+    raise SystemExit
+
+# Create a compressor object.
+b = io.BytesIO()
+g = deflate.DeflateIO(b, deflate.RAW, 15)
+
+# Then, use up most of the heap.
+l = []
+while True:
+    try:
+        l.append(bytearray(1000))
+    except:
+        break
+l.pop()
+
+# Try to compress.  This will try to allocate a large window and fail.
+try:
+    g.write('test')
+except MemoryError:
+    print("MemoryError")
+
+# Should still be able to close the stream.
+g.close()
+
+# The underlying output stream should be unchanged.
+print(b.getvalue())
diff --git a/tests/extmod/deflate_compress_memory_error.py.exp b/tests/extmod/deflate_compress_memory_error.py.exp
new file mode 100644
index 0000000000000..606315c14604c
--- /dev/null
+++ b/tests/extmod/deflate_compress_memory_error.py.exp
@@ -0,0 +1,2 @@
+MemoryError
+b''
diff --git a/tests/extmod/framebuf_blit.py b/tests/extmod/framebuf_blit.py
new file mode 100644
index 0000000000000..b1d98b330a838
--- /dev/null
+++ b/tests/extmod/framebuf_blit.py
@@ -0,0 +1,68 @@
+# Test FrameBuffer.blit method.
+
+try:
+    import framebuf
+except ImportError:
+    print("SKIP")
+    raise SystemExit
+
+
+def printbuf():
+    print("--8<--")
+    for y in range(h):
+        for x in range(w):
+            print("%02x" % buf[(x + y * w)], end="")
+        print()
+    print("-->8--")
+
+
+w = 5
+h = 4
+buf = bytearray(w * h)
+fbuf = framebuf.FrameBuffer(buf, w, h, framebuf.GS8)
+
+fbuf2 = framebuf.FrameBuffer(bytearray(4), 2, 2, framebuf.GS8)
+fbuf2.fill(0xFF)
+
+# Blit another FrameBuffer, at various locations.
+for x, y in ((-1, -1), (0, 0), (1, 1), (4, 3)):
+    fbuf.fill(0)
+    fbuf.blit(fbuf2, x, y)
+    printbuf()
+
+# Blit a bytes object.
+fbuf.fill(0)
+image = (b"\x10\x11\x12\x13", 2, 2, framebuf.GS8)
+fbuf.blit(image, 1, 1)
+printbuf()
+
+# Blit a bytes object that has a stride.
+fbuf.fill(0)
+image = (b"\x20\x21\xff\x22\x23\xff", 2, 2, framebuf.GS8, 3)
+fbuf.blit(image, 1, 1)
+printbuf()
+
+# Blit a bytes object with a bytes palette.
+fbuf.fill(0)
+image = (b"\x00\x01\x01\x00", 2, 2, framebuf.GS8)
+palette = (b"\xa1\xa2", 2, 1, framebuf.GS8)
+fbuf.blit(image, 1, 1, -1, palette)
+printbuf()
+
+# Not enough elements in the tuple.
+try:
+    fbuf.blit((0, 0, 0), 0, 0)
+except ValueError:
+    print("ValueError")
+
+# Too many elements in the tuple.
+try:
+    fbuf.blit((0, 0, 0, 0, 0, 0), 0, 0)
+except ValueError:
+    print("ValueError")
+
+# Bytes too small.
+try:
+    fbuf.blit((b"", 1, 1, framebuf.GS8), 0, 0)
+except ValueError:
+    print("ValueError")
diff --git a/tests/extmod/framebuf_blit.py.exp b/tests/extmod/framebuf_blit.py.exp
new file mode 100644
index 0000000000000..e340f1990c783
--- /dev/null
+++ b/tests/extmod/framebuf_blit.py.exp
@@ -0,0 +1,45 @@
+--8<--
+ff00000000
+0000000000
+0000000000
+0000000000
+-->8--
+--8<--
+ffff000000
+ffff000000
+0000000000
+0000000000
+-->8--
+--8<--
+0000000000
+00ffff0000
+00ffff0000
+0000000000
+-->8--
+--8<--
+0000000000
+0000000000
+0000000000
+00000000ff
+-->8--
+--8<--
+0000000000
+0010110000
+0012130000
+0000000000
+-->8--
+--8<--
+0000000000
+0020210000
+0022230000
+0000000000
+-->8--
+--8<--
+0000000000
+00a1a20000
+00a2a10000
+0000000000
+-->8--
+ValueError
+ValueError
+ValueError
diff --git a/tests/extmod/json_loads.py b/tests/extmod/json_loads.py
index f9073c121e2ef..095e67d740b9d 100644
--- a/tests/extmod/json_loads.py
+++ b/tests/extmod/json_loads.py
@@ -71,3 +71,27 @@ def my_print(o):
     my_print(json.loads("[null]   a"))
 except ValueError:
     print("ValueError")
+
+# incomplete object declaration
+try:
+    my_print(json.loads('{"a":0,'))
+except ValueError:
+    print("ValueError")
+
+# incomplete nested array declaration
+try:
+    my_print(json.loads('{"a":0, ['))
+except ValueError:
+    print("ValueError")
+
+# incomplete array declaration
+try:
+    my_print(json.loads('[0,'))
+except ValueError:
+    print("ValueError")
+
+# incomplete nested object declaration
+try:
+    my_print(json.loads('[0, {"a":0, '))
+except ValueError:
+    print("ValueError")
diff --git a/tests/extmod/machine_spi_rate.py b/tests/extmod/machine_spi_rate.py
index 7022955a3da75..c65095f22a1a5 100644
--- a/tests/extmod/machine_spi_rate.py
+++ b/tests/extmod/machine_spi_rate.py
@@ -13,7 +13,10 @@
 
 # Configure pins based on the port/board details.
 # Values are tuples of (spi_id, sck, mosi, miso)
-if "pyboard" in sys.platform:
+if "alif" in sys.platform:
+    MAX_DELTA_MS = 20
+    spi_instances = ((0, None, None, None),)
+elif "pyboard" in sys.platform:
     spi_instances = (
         (1, None, None, None),  # "explicit choice of sck/mosi/miso is not implemented"
         (2, None, None, None),
diff --git a/tests/extmod/machine_uart_irq_txidle.py b/tests/extmod/machine_uart_irq_txidle.py
index feb95fabaa44f..084e9825768a8 100644
--- a/tests/extmod/machine_uart_irq_txidle.py
+++ b/tests/extmod/machine_uart_irq_txidle.py
@@ -12,7 +12,10 @@
 import time, sys
 
 # Configure pins based on the target.
-if "rp2" in sys.platform:
+if "alif" in sys.platform:
+    uart_id = 1
+    tx_pin = None
+elif "rp2" in sys.platform:
     uart_id = 0
     tx_pin = "GPIO0"
     rx_pin = "GPIO1"
diff --git a/tests/extmod/machine_uart_tx.py b/tests/extmod/machine_uart_tx.py
index e9652f3c7ac21..f0cc912da66e0 100644
--- a/tests/extmod/machine_uart_tx.py
+++ b/tests/extmod/machine_uart_tx.py
@@ -14,7 +14,11 @@
 timing_margin_us = 100
 
 # Configure pins based on the target.
-if "esp32" in sys.platform:
+if "alif" in sys.platform:
+    uart_id = 1
+    pins = {}
+    bit_margin = 1
+elif "esp32" in sys.platform:
     uart_id = 1
     pins = {}
     timing_margin_us = 400
diff --git a/tests/extmod/ssl_noleak.py b/tests/extmod/tls_noleak.py
similarity index 100%
rename from tests/extmod/ssl_noleak.py
rename to tests/extmod/tls_noleak.py
diff --git a/tests/extmod/tls_threads.py b/tests/extmod/tls_threads.py
new file mode 100644
index 0000000000000..4564abd3d80de
--- /dev/null
+++ b/tests/extmod/tls_threads.py
@@ -0,0 +1,57 @@
+# Ensure that SSL sockets can be allocated from multiple
+# threads without thread safety issues
+import unittest
+
+try:
+    import _thread
+    import io
+    import tls
+    import time
+except ImportError:
+    print("SKIP")
+    raise SystemExit
+
+
+class TestSocket(io.IOBase):
+    def write(self, buf):
+        return len(buf)
+
+    def readinto(self, buf):
+        return 0
+
+    def ioctl(self, cmd, arg):
+        return 0
+
+    def setblocking(self, value):
+        pass
+
+
+ITERS = 256
+
+
+class TLSThreads(unittest.TestCase):
+    def test_sslsocket_threaded(self):
+        self.done = False
+        # only run in two threads: too much RAM demand otherwise, and rp2 only
+        # supports two anyhow
+        _thread.start_new_thread(self._alloc_many_sockets, (True,))
+        self._alloc_many_sockets(False)
+        while not self.done:
+            time.sleep(0.1)
+        print("done")
+
+    def _alloc_many_sockets(self, set_done_flag):
+        print("start", _thread.get_ident())
+        ctx = tls.SSLContext(tls.PROTOCOL_TLS_CLIENT)
+        ctx.verify_mode = tls.CERT_NONE
+        for n in range(ITERS):
+            s = TestSocket()
+            s = ctx.wrap_socket(s, do_handshake_on_connect=False)
+            s.close()  # Free associated resources now from thread, not in a GC pass
+        print("done", _thread.get_ident())
+        if set_done_flag:
+            self.done = True
+
+
+if __name__ == "__main__":
+    unittest.main()
diff --git a/tests/extmod/vfs_lfs.py b/tests/extmod/vfs_lfs.py
index 3ad57fd9c38f1..40d58e9c9f743 100644
--- a/tests/extmod/vfs_lfs.py
+++ b/tests/extmod/vfs_lfs.py
@@ -136,7 +136,7 @@ def test(bdev, vfs_class):
     print(fs.getcwd())
     fs.chdir("../testdir")
     print(fs.getcwd())
-    fs.chdir("../..")
+    fs.chdir("..")
     print(fs.getcwd())
     fs.chdir(".//testdir")
     print(fs.getcwd())
diff --git a/tests/extmod/vfs_lfs_error.py b/tests/extmod/vfs_lfs_error.py
index 2ac7629bfa8fc..73cdf3437330b 100644
--- a/tests/extmod/vfs_lfs_error.py
+++ b/tests/extmod/vfs_lfs_error.py
@@ -1,7 +1,7 @@
 # Test for VfsLittle using a RAM device, testing error handling
 
 try:
-    import vfs
+    import errno, vfs
 
     vfs.VfsLfs1
     vfs.VfsLfs2
@@ -41,14 +41,14 @@ def test(bdev, vfs_class):
     # mkfs with too-small block device
     try:
         vfs_class.mkfs(RAMBlockDevice(1))
-    except OSError:
-        print("mkfs OSError")
+    except OSError as er:
+        print("mkfs OSError", er.errno > 0)
 
     # mount with invalid filesystem
     try:
         vfs_class(bdev)
-    except OSError:
-        print("mount OSError")
+    except OSError as er:
+        print("mount OSError", er.errno > 0)
 
     # set up for following tests
     vfs_class.mkfs(bdev)
@@ -60,60 +60,60 @@ def test(bdev, vfs_class):
     # ilistdir
     try:
         fs.ilistdir("noexist")
-    except OSError:
-        print("ilistdir OSError")
+    except OSError as er:
+        print("ilistdir OSError", er)
 
     # remove
     try:
         fs.remove("noexist")
-    except OSError:
-        print("remove OSError")
+    except OSError as er:
+        print("remove OSError", er)
 
     # rmdir
     try:
         fs.rmdir("noexist")
-    except OSError:
-        print("rmdir OSError")
+    except OSError as er:
+        print("rmdir OSError", er)
 
     # rename
     try:
         fs.rename("noexist", "somethingelse")
-    except OSError:
-        print("rename OSError")
+    except OSError as er:
+        print("rename OSError", er)
 
     # mkdir
     try:
         fs.mkdir("testdir")
-    except OSError:
-        print("mkdir OSError")
+    except OSError as er:
+        print("mkdir OSError", er)
 
     # chdir to nonexistent
     try:
         fs.chdir("noexist")
-    except OSError:
-        print("chdir OSError")
+    except OSError as er:
+        print("chdir OSError", er)
     print(fs.getcwd())  # check still at root
 
     # chdir to file
     try:
         fs.chdir("testfile")
-    except OSError:
-        print("chdir OSError")
+    except OSError as er:
+        print("chdir OSError", er)
     print(fs.getcwd())  # check still at root
 
     # stat
     try:
         fs.stat("noexist")
-    except OSError:
-        print("stat OSError")
+    except OSError as er:
+        print("stat OSError", er)
 
     # error during seek
     with fs.open("testfile", "r") as f:
         f.seek(1 << 30)  # SEEK_SET
         try:
             f.seek(1 << 30, 1)  # SEEK_CUR
-        except OSError:
-            print("seek OSError")
+        except OSError as er:
+            print("seek OSError", er)
 
 
 bdev = RAMBlockDevice(30)
diff --git a/tests/extmod/vfs_lfs_error.py.exp b/tests/extmod/vfs_lfs_error.py.exp
index f4327f6962ec3..440607ed84b22 100644
--- a/tests/extmod/vfs_lfs_error.py.exp
+++ b/tests/extmod/vfs_lfs_error.py.exp
@@ -1,28 +1,28 @@
 test <class 'VfsLfs1'>
-mkfs OSError
-mount OSError
-ilistdir OSError
-remove OSError
-rmdir OSError
-rename OSError
-mkdir OSError
-chdir OSError
+mkfs OSError True
+mount OSError True
+ilistdir OSError [Errno 2] ENOENT
+remove OSError [Errno 2] ENOENT
+rmdir OSError [Errno 2] ENOENT
+rename OSError [Errno 2] ENOENT
+mkdir OSError [Errno 17] EEXIST
+chdir OSError [Errno 2] ENOENT
 /
-chdir OSError
+chdir OSError [Errno 2] ENOENT
 /
-stat OSError
-seek OSError
+stat OSError [Errno 2] ENOENT
+seek OSError [Errno 22] EINVAL
 test <class 'VfsLfs2'>
-mkfs OSError
-mount OSError
-ilistdir OSError
-remove OSError
-rmdir OSError
-rename OSError
-mkdir OSError
-chdir OSError
+mkfs OSError True
+mount OSError True
+ilistdir OSError [Errno 2] ENOENT
+remove OSError [Errno 2] ENOENT
+rmdir OSError [Errno 2] ENOENT
+rename OSError [Errno 2] ENOENT
+mkdir OSError [Errno 17] EEXIST
+chdir OSError [Errno 2] ENOENT
 /
-chdir OSError
+chdir OSError [Errno 2] ENOENT
 /
-stat OSError
-seek OSError
+stat OSError [Errno 2] ENOENT
+seek OSError [Errno 22] EINVAL
diff --git a/tests/extmod/vfs_lfs_ilistdir_del.py b/tests/extmod/vfs_lfs_ilistdir_del.py
index 7b59bc412d983..f463b84b22492 100644
--- a/tests/extmod/vfs_lfs_ilistdir_del.py
+++ b/tests/extmod/vfs_lfs_ilistdir_del.py
@@ -71,5 +71,10 @@ def test(bdev, vfs_class):
         fs.open("/test", "w").close()
 
 
-bdev = RAMBlockDevice(30)
+try:
+    bdev = RAMBlockDevice(30)
+except MemoryError:
+    print("SKIP")
+    raise SystemExit
+
 test(bdev, vfs.VfsLfs2)
diff --git a/tests/extmod/vfs_mountinfo.py b/tests/extmod/vfs_mountinfo.py
new file mode 100644
index 0000000000000..b31dc60ce76d7
--- /dev/null
+++ b/tests/extmod/vfs_mountinfo.py
@@ -0,0 +1,65 @@
+# test VFS functionality without any particular filesystem type
+
+try:
+    import os, vfs
+except ImportError:
+    print("SKIP")
+    raise SystemExit
+
+
+class Filesystem:
+    def __init__(self, id, paths=[]):
+        self.id = id
+        self.paths = paths
+
+    def mount(self, readonly, mksfs):
+        print("mount", self)
+
+    def umount(self):
+        print("umount", self)
+
+    def stat(self, path):
+        if path in self.paths:
+            return (0, 0, 0, 0, 0, 0, 0, 0, 0, 0)
+        else:
+            raise OSError
+
+    statvfs = stat
+
+    def open(self, path, mode):
+        pass
+
+    def __repr__(self):
+        return "Filesystem(%d)" % self.id
+
+
+# first we umount any existing mount points the target may have
+try:
+    vfs.umount("/")
+except OSError:
+    pass
+for path in os.listdir("/"):
+    vfs.umount("/" + path)
+
+
+print(vfs.mount())
+
+vfs.mount(Filesystem(1), "/foo")
+
+print(vfs.mount())
+
+vfs.mount(Filesystem(2), "/bar/baz")
+
+print(vfs.mount())
+
+vfs.mount(Filesystem(3), "/bar")
+
+print(vfs.mount())
+
+vfs.umount("/bar/baz")
+
+print(vfs.mount())
+
+vfs.mount(Filesystem(4), "/")
+
+print(vfs.mount())
diff --git a/tests/extmod/vfs_mountinfo.py.exp b/tests/extmod/vfs_mountinfo.py.exp
new file mode 100644
index 0000000000000..4ddf06c8c976f
--- /dev/null
+++ b/tests/extmod/vfs_mountinfo.py.exp
@@ -0,0 +1,11 @@
+[]
+mount Filesystem(1)
+[(Filesystem(1), '/foo')]
+mount Filesystem(2)
+[(Filesystem(1), '/foo'), (Filesystem(2), '/bar/baz')]
+mount Filesystem(3)
+[(Filesystem(1), '/foo'), (Filesystem(2), '/bar/baz'), (Filesystem(3), '/bar')]
+umount Filesystem(2)
+[(Filesystem(1), '/foo'), (Filesystem(3), '/bar')]
+mount Filesystem(4)
+[(Filesystem(1), '/foo'), (Filesystem(3), '/bar'), (Filesystem(4), '/')]
diff --git a/tests/extmod/vfs_posix.py b/tests/extmod/vfs_posix.py
index d060c0b9c84f3..b3ca2753ba9cf 100644
--- a/tests/extmod/vfs_posix.py
+++ b/tests/extmod/vfs_posix.py
@@ -29,7 +29,21 @@
 print(type(os.stat("/")))
 
 # listdir and ilistdir
-print(type(os.listdir("/")))
+target = "/"
+try:
+    import platform
+
+    # On Android non-root users are permitted full filesystem access only to
+    # selected directories.  To let this test pass on bionic, the internal
+    # user-accessible storage area root is enumerated instead of the
+    # filesystem root.  "/storage/emulated/0" should be there on pretty much
+    # any recent-ish device; querying the proper location requires a JNI
+    # round-trip, not really worth it.
+    if platform.platform().startswith("Android-"):
+        target = "/storage/emulated/0"
+except ImportError:
+    pass
+print(type(os.listdir(target)))
 
 # mkdir
 os.mkdir(temp_dir)
diff --git a/tests/extmod/vfs_rom.py b/tests/extmod/vfs_rom.py
index f7958a93962d0..cd14542ea6b09 100644
--- a/tests/extmod/vfs_rom.py
+++ b/tests/extmod/vfs_rom.py
@@ -223,6 +223,79 @@ def test_unknown_record(self):
             self.assertEqual(f.read(), b"contents")
 
 
+class TestCorrupt(unittest.TestCase):
+    def test_corrupt_filesystem(self):
+        # Make the filesystem length bigger than the buffer.
+        romfs = bytearray(make_romfs(()))
+        romfs[3] = 0x01
+        with self.assertRaises(OSError):
+            vfs.VfsRom(romfs)
+
+        # Corrupt the filesystem length.
+        romfs = bytearray(make_romfs(()))
+        romfs[3] = 0xFF
+        with self.assertRaises(OSError):
+            vfs.VfsRom(romfs)
+
+        # Corrupt the contents of the filesystem.
+        romfs = bytearray(make_romfs(()))
+        romfs[3] = 0x01
+        romfs.extend(b"\xff\xff")
+        fs = vfs.VfsRom(romfs)
+        with self.assertRaises(OSError):
+            fs.stat("a")
+        self.assertEqual(list(fs.ilistdir("")), [])
+
+    def test_corrupt_file_entry(self):
+        romfs = make_romfs((("file", b"data"),))
+
+        # Corrupt the length of filename.
+        romfs_corrupt = bytearray(romfs)
+        romfs_corrupt[7:] = b"\xff" * (len(romfs) - 7)
+        fs = vfs.VfsRom(romfs_corrupt)
+        with self.assertRaises(OSError):
+            fs.stat("file")
+        self.assertEqual(list(fs.ilistdir("")), [])
+
+        # Erase the data record (change it to a padding record).
+        romfs_corrupt = bytearray(romfs)
+        romfs_corrupt[12] = VfsRomWriter.ROMFS_RECORD_KIND_PADDING
+        fs = vfs.VfsRom(romfs_corrupt)
+        with self.assertRaises(OSError):
+            fs.stat("file")
+        self.assertEqual(list(fs.ilistdir("")), [])
+
+        # Corrupt the header of the data record.
+        romfs_corrupt = bytearray(romfs)
+        romfs_corrupt[12:] = b"\xff" * (len(romfs) - 12)
+        fs = vfs.VfsRom(romfs_corrupt)
+        with self.assertRaises(OSError):
+            fs.stat("file")
+
+        # Corrupt the interior of the data record.
+        romfs_corrupt = bytearray(romfs)
+        romfs_corrupt[13:] = b"\xff" * (len(romfs) - 13)
+        fs = vfs.VfsRom(romfs_corrupt)
+        with self.assertRaises(OSError):
+            fs.stat("file")
+
+        # Change the data record to an indirect pointer and corrupt the length.
+        romfs_corrupt = bytearray(romfs)
+        romfs_corrupt[12] = VfsRomWriter.ROMFS_RECORD_KIND_DATA_POINTER
+        romfs_corrupt[14:18] = b"\xff\xff\xff\xff"
+        fs = vfs.VfsRom(romfs_corrupt)
+        with self.assertRaises(OSError):
+            fs.stat("file")
+
+        # Change the data record to an indirect pointer and corrupt the offset.
+        romfs_corrupt = bytearray(romfs)
+        romfs_corrupt[12] = VfsRomWriter.ROMFS_RECORD_KIND_DATA_POINTER
+        romfs_corrupt[14:18] = b"\x00\xff\xff\xff"
+        fs = vfs.VfsRom(romfs_corrupt)
+        with self.assertRaises(OSError):
+            fs.stat("file")
+
+
 class TestStandalone(TestBase):
     def test_constructor(self):
         self.assertIsInstance(vfs.VfsRom(self.romfs), vfs.VfsRom)
@@ -321,6 +394,7 @@ class TestMounted(TestBase):
     def setUp(self):
         self.orig_sys_path = list(sys.path)
         self.orig_cwd = os.getcwd()
+        sys.path = []
         vfs.mount(vfs.VfsRom(self.romfs), "/test_rom")
 
     def tearDown(self):
@@ -335,9 +409,11 @@ def test_listdir(self):
 
     def test_chdir(self):
         os.chdir("/test_rom")
+        self.assertEqual(os.getcwd(), "/test_rom")
         self.assertEqual(os.listdir(), self.romfs_listdir)
 
         os.chdir("/test_rom/")
+        self.assertEqual(os.getcwd(), "/test_rom")
         self.assertEqual(os.listdir(), self.romfs_listdir)
 
         # chdir within the romfs is not implemented.
diff --git a/tests/extmod_hardware/machine_pwm.py b/tests/extmod_hardware/machine_pwm.py
index 014030be5c601..e27da32548659 100644
--- a/tests/extmod_hardware/machine_pwm.py
+++ b/tests/extmod_hardware/machine_pwm.py
@@ -1,4 +1,4 @@
-# Test machine.PWM, frequncy and duty cycle (using machine.time_pulse_us).
+# Test machine.PWM, frequency and duty cycle (using machine.time_pulse_us).
 #
 # IMPORTANT: This test requires hardware connections: the PWM-output and pulse-input
 # pins must be wired together (see the variable `pwm_pulse_pins`).
diff --git a/tests/extmod_hardware/machine_uart_irq_rx.py b/tests/extmod_hardware/machine_uart_irq_rx.py
index bf34900bd0826..ecc95e62ae570 100644
--- a/tests/extmod_hardware/machine_uart_irq_rx.py
+++ b/tests/extmod_hardware/machine_uart_irq_rx.py
@@ -15,7 +15,11 @@
 
 byte_by_byte = False
 # Configure pins based on the target.
-if "esp32" in sys.platform:
+if "alif" in sys.platform:
+    uart_id = 1
+    tx_pin = None
+    rx_pin = None
+elif "esp32" in sys.platform:
     uart_id = 1
     tx_pin = 4
     rx_pin = 5
diff --git a/tests/extmod_hardware/machine_uart_irq_rxidle.py b/tests/extmod_hardware/machine_uart_irq_rxidle.py
index 182ab24ebe0c4..af2412c75eedc 100644
--- a/tests/extmod_hardware/machine_uart_irq_rxidle.py
+++ b/tests/extmod_hardware/machine_uart_irq_rxidle.py
@@ -14,7 +14,11 @@
 import time, sys
 
 # Configure pins based on the target.
-if "esp32" in sys.platform:
+if "alif" in sys.platform:
+    uart_id = 1
+    tx_pin = None
+    rx_pin = None
+elif "esp32" in sys.platform:
     uart_id = 1
     tx_pin = 4
     rx_pin = 5
diff --git a/tests/float/float_parse.py b/tests/float/float_parse.py
index de27c33e7be57..6131da0a63ab9 100644
--- a/tests/float/float_parse.py
+++ b/tests/float/float_parse.py
@@ -31,6 +31,9 @@
 print(float("1e18446744073709551621"))
 print(float("1e-18446744073709551621"))
 
+# mantissa overflow while processing deferred trailing zeros
+print(float("10000000000000000000001"))
+
 # check small decimals are as close to their true value as possible
 for n in range(1, 10):
     print(float("0.%u" % n) == n / 10)
diff --git a/tests/float/math_constants.py b/tests/float/math_constants.py
index 2e4c321052625..21d822a01e3e8 100644
--- a/tests/float/math_constants.py
+++ b/tests/float/math_constants.py
@@ -1,11 +1,30 @@
 # Tests various constants of the math module.
+
+import sys
+
 try:
-    import math
-    from math import exp, cos
+    from array import array
+    from math import e, pi
 except ImportError:
     print("SKIP")
     raise SystemExit
 
-print(math.e == exp(1.0))
+# Hexadecimal representations of e and pi constants.
+e_truth_single = 0x402DF854
+pi_truth_single = 0x40490FDB
+e_truth_double = 0x4005BF0A8B145769
+pi_truth_double = 0x400921FB54442D18
+
+# Detect the floating-point precision of the system, to determine the exact values of
+# the constants (parsing the float from a decimal string can lead to inaccuracies).
+if float("1e300") == float("inf"):
+    # Single precision floats.
+    e_truth = array("f", e_truth_single.to_bytes(4, sys.byteorder))[0]
+    pi_truth = array("f", pi_truth_single.to_bytes(4, sys.byteorder))[0]
+else:
+    # Double precision floats.
+    e_truth = array("d", e_truth_double.to_bytes(8, sys.byteorder))[0]
+    pi_truth = array("d", pi_truth_double.to_bytes(8, sys.byteorder))[0]
 
-print(cos(math.pi))
+print("e:", e == e_truth or (e, e_truth, e - e_truth))
+print("pi:", pi == pi_truth or (pi, pi_truth, pi - pi_truth))
diff --git a/tests/inlineasm/xtensa/asmargs.py b/tests/inlineasm/xtensa/asmargs.py
new file mode 100644
index 0000000000000..2bfccfcc69bb2
--- /dev/null
+++ b/tests/inlineasm/xtensa/asmargs.py
@@ -0,0 +1,44 @@
+# test passing arguments
+
+
+@micropython.asm_xtensa
+def arg0():
+    movi(a2, 1)
+
+
+print(arg0())
+
+
+@micropython.asm_xtensa
+def arg1(a2):
+    addi(a2, a2, 1)
+
+
+print(arg1(1))
+
+
+@micropython.asm_xtensa
+def arg2(a2, a3):
+    add(a2, a2, a3)
+
+
+print(arg2(1, 2))
+
+
+@micropython.asm_xtensa
+def arg3(a2, a3, a4):
+    add(a2, a2, a3)
+    add(a2, a2, a4)
+
+
+print(arg3(1, 2, 3))
+
+
+@micropython.asm_xtensa
+def arg4(a2, a3, a4, a5):
+    add(a2, a2, a3)
+    add(a2, a2, a4)
+    add(a2, a2, a5)
+
+
+print(arg4(1, 2, 3, 4))
diff --git a/tests/inlineasm/xtensa/asmargs.py.exp b/tests/inlineasm/xtensa/asmargs.py.exp
new file mode 100644
index 0000000000000..e33a6964f46e8
--- /dev/null
+++ b/tests/inlineasm/xtensa/asmargs.py.exp
@@ -0,0 +1,5 @@
+1
+2
+3
+6
+10
diff --git a/tests/inlineasm/xtensa/asmarith.py b/tests/inlineasm/xtensa/asmarith.py
new file mode 100644
index 0000000000000..1c0934eb7a631
--- /dev/null
+++ b/tests/inlineasm/xtensa/asmarith.py
@@ -0,0 +1,119 @@
+@micropython.asm_xtensa
+def f1(a2):
+    abs_(a2, a2)
+
+
+for value in (10, -10, 0):
+    print(f1(value))
+
+
+ADDMI_TEMPLATE = """
+@micropython.asm_xtensa
+def f1(a2) -> int:
+    addmi(a2, a2, {})
+print(f1(0))
+"""
+
+for value in (-32768, -32767, 32512, 32513, 0):
+    try:
+        exec(ADDMI_TEMPLATE.format(value))
+    except SyntaxError as error:
+        print(error)
+
+
+@micropython.asm_xtensa
+def a2(a2, a3) -> int:
+    addx2(a2, a2, a3)
+
+
+@micropython.asm_xtensa
+def a4(a2, a3) -> int:
+    addx4(a2, a2, a3)
+
+
+@micropython.asm_xtensa
+def a8(a2, a3) -> int:
+    addx8(a2, a2, a3)
+
+
+@micropython.asm_xtensa
+def s2(a2, a3) -> int:
+    subx2(a2, a2, a3)
+
+
+@micropython.asm_xtensa
+def s4(a2, a3) -> int:
+    subx4(a2, a2, a3)
+
+
+@micropython.asm_xtensa
+def s8(a2, a3) -> int:
+    subx8(a2, a2, a3)
+
+
+for first, second in ((100, 100), (-100, 100), (-100, -100), (100, -100)):
+    print("a2", a2(first, second))
+    print("a4", a4(first, second))
+    print("a8", a8(first, second))
+    print("s2", s2(first, second))
+    print("s4", s4(first, second))
+    print("s8", s8(first, second))
+
+
+@micropython.asm_xtensa
+def f5(a2) -> int:
+    neg(a2, a2)
+
+
+for value in (0, -100, 100):
+    print(f5(value))
+
+
+@micropython.asm_xtensa
+def f6():
+    movi(a2, 0x100)
+    movi(a3, 1)
+    add(a2, a2, a3)
+    addi(a2, a2, 1)
+    addi(a2, a2, -2)
+    sub(a2, a2, a3)
+
+
+print(hex(f6()))
+
+
+@micropython.asm_xtensa
+def f7():
+    movi(a2, 0x10FF)
+    movi(a3, 1)
+    and_(a4, a2, a3)
+    or_(a4, a4, a3)
+    movi(a3, 0x200)
+    xor(a2, a4, a3)
+
+
+print(hex(f7()))
+
+
+@micropython.asm_xtensa
+def f8(a2, a3):
+    add_n(a2, a2, a3)
+
+
+print(f8(100, 200))
+
+
+@micropython.asm_xtensa
+def f9(a2):
+    addi_n(a2, a2, 1)
+
+
+print(f9(100))
+
+
+@micropython.asm_xtensa
+def f10(a2, a3) -> uint:
+    mull(a2, a2, a3)
+
+
+print(hex(f10(0xC0000000, 2)))
diff --git a/tests/inlineasm/xtensa/asmarith.py.exp b/tests/inlineasm/xtensa/asmarith.py.exp
new file mode 100644
index 0000000000000..7aba46a27d9b5
--- /dev/null
+++ b/tests/inlineasm/xtensa/asmarith.py.exp
@@ -0,0 +1,40 @@
+10
+10
+0
+-32768
+-32767 is not a multiple of 256
+32512
+'addmi' integer 32513 isn't within range -32768..32512
+0
+a2 300
+a4 500
+a8 900
+s2 100
+s4 300
+s8 700
+a2 -100
+a4 -300
+a8 -700
+s2 -300
+s4 -500
+s8 -900
+a2 -300
+a4 -500
+a8 -900
+s2 -100
+s4 -300
+s8 -700
+a2 100
+a4 300
+a8 700
+s2 300
+s4 500
+s8 900
+0
+100
+-100
+0xff
+0x201
+300
+101
+0x80000000
diff --git a/tests/inlineasm/xtensa/asmbranch.py b/tests/inlineasm/xtensa/asmbranch.py
new file mode 100644
index 0000000000000..22bcd5a7c71a3
--- /dev/null
+++ b/tests/inlineasm/xtensa/asmbranch.py
@@ -0,0 +1,299 @@
+# test branch instructions
+
+
+@micropython.asm_xtensa
+def tball(a2, a3) -> int:
+    mov(a4, a2)
+    movi(a2, 0)
+    ball(a4, a3, end)
+    movi(a2, -1)
+    label(end)
+
+
+print(tball(0xFFFFFFFF, 0xFFFFFFFF))
+print(tball(0xFFFEFFFF, 0xFFFFFFFF))
+print(tball(0x00000000, 0xFFFFFFFF))
+print(tball(0xFFFFFFFF, 0x01010101))
+
+
+@micropython.asm_xtensa
+def tbany(a2, a3) -> int:
+    mov(a4, a2)
+    movi(a2, 0)
+    bany(a4, a3, end)
+    movi(a2, -1)
+    label(end)
+
+
+print(tbany(0xFFFFFFFF, 0xFFFFFFFF))
+print(tbany(0xFFFEFFFF, 0xFFFFFFFF))
+print(tbany(0x00000000, 0xFFFFFFFF))
+print(tbany(0xFFFFFFFF, 0x01010101))
+
+
+@micropython.asm_xtensa
+def tbbc(a2, a3) -> int:
+    mov(a4, a2)
+    movi(a2, 0)
+    bbc(a4, a3, end)
+    movi(a2, -1)
+    label(end)
+
+
+print(tbbc(0xFFFFFFFF, 4))
+print(tbbc(0xFFFEFFFF, 16))
+print(tbbc(0x00000000, 1))
+
+
+BBCI_TEMPLATE = """
+@micropython.asm_xtensa
+def tbbci(a2) -> int:
+    mov(a3, a2)
+    movi(a2, 0)
+    bbci(a3, {}, end)
+    movi(a2, -1)
+    label(end)
+
+print(tbbci({}))
+"""
+
+
+for value, bit in ((0xFFFFFFFF, 4), (0xFFFEFFFF, 16), (0x00000000, 1)):
+    try:
+        exec(BBCI_TEMPLATE.format(bit, value))
+    except SyntaxError as error:
+        print(error)
+
+
+@micropython.asm_xtensa
+def tbbs(a2, a3) -> int:
+    mov(a4, a2)
+    movi(a2, 0)
+    bbs(a4, a3, end)
+    movi(a2, -1)
+    label(end)
+
+
+print(tbbs(0x00000000, 4))
+print(tbbs(0x00010000, 16))
+print(tbbs(0xFFFFFFFF, 1))
+
+
+BBSI_TEMPLATE = """
+@micropython.asm_xtensa
+def tbbsi(a2) -> int:
+    mov(a3, a2)
+    movi(a2, 0)
+    bbsi(a3, {}, end)
+    movi(a2, -1)
+    label(end)
+
+print(tbbsi({}))
+"""
+
+
+for value, bit in ((0x00000000, 4), (0x00010000, 16), (0xFFFFFFFF, 1)):
+    try:
+        exec(BBSI_TEMPLATE.format(bit, value))
+    except SyntaxError as error:
+        print(error)
+
+
+@micropython.asm_xtensa
+def tbeq(a2, a3) -> int:
+    mov(a4, a2)
+    movi(a2, 0)
+    beq(a4, a3, end)
+    movi(a2, -1)
+    label(end)
+
+
+print(tbeq(0x00000000, 0x00000000))
+print(tbeq(0x00010000, 0x00000000))
+print(tbeq(0xFFFFFFFF, 0xFFFFFFFF))
+
+
+@micropython.asm_xtensa
+def tbeqz(a2) -> int:
+    mov(a3, a2)
+    movi(a2, 0)
+    beqz(a3, end)
+    movi(a2, -1)
+    label(end)
+
+
+print(tbeqz(0))
+print(tbeqz(0x12345678))
+print(tbeqz(-1))
+
+
+@micropython.asm_xtensa
+def tbge(a2, a3) -> int:
+    mov(a4, a2)
+    movi(a2, 0)
+    bge(a4, a3, end)
+    movi(a2, -1)
+    label(end)
+
+
+print(tbge(0x00000000, 0x00000000))
+print(tbge(0x00010000, 0x00000000))
+print(tbge(0xF0000000, 0xFFFFFFFF))
+
+
+@micropython.asm_xtensa
+def tbgeu(a2, a3) -> int:
+    mov(a4, a2)
+    movi(a2, 0)
+    bgeu(a4, a3, end)
+    movi(a2, -1)
+    label(end)
+
+
+print(tbgeu(0x00000000, 0x00000000))
+print(tbgeu(0x00010000, 0x00000000))
+print(tbgeu(0xF0000000, 0xFFFFFFFF))
+print(tbgeu(0xFFFFFFFF, 0xF0000000))
+
+
+@micropython.asm_xtensa
+def tbgez(a2) -> int:
+    mov(a3, a2)
+    movi(a2, 0)
+    bgez(a3, end)
+    movi(a2, -1)
+    label(end)
+
+
+print(tbgez(0))
+print(tbgez(0x12345678))
+print(tbgez(-1))
+
+
+@micropython.asm_xtensa
+def tblt(a2, a3) -> int:
+    mov(a4, a2)
+    movi(a2, 0)
+    blt(a4, a3, end)
+    movi(a2, -1)
+    label(end)
+
+
+print(tblt(0x00000000, 0x00000000))
+print(tblt(0x00010000, 0x00000000))
+print(tblt(0xF0000000, 0xFFFFFFFF))
+
+
+@micropython.asm_xtensa
+def tbltu(a2, a3) -> int:
+    mov(a4, a2)
+    movi(a2, 0)
+    bltu(a4, a3, end)
+    movi(a2, -1)
+    label(end)
+
+
+print(tbltu(0x00000000, 0x00000000))
+print(tbltu(0x00010000, 0x00000000))
+print(tbltu(0xF0000000, 0xFFFFFFFF))
+print(tbltu(0xFFFFFFFF, 0xF0000000))
+
+
+@micropython.asm_xtensa
+def tbltz(a2) -> int:
+    mov(a3, a2)
+    movi(a2, 0)
+    bltz(a3, end)
+    movi(a2, -1)
+    label(end)
+
+
+print(tbltz(0))
+print(tbltz(0x12345678))
+print(tbltz(-1))
+
+
+@micropython.asm_xtensa
+def tbnall(a2, a3) -> int:
+    mov(a4, a2)
+    movi(a2, 0)
+    bnall(a4, a3, end)
+    movi(a2, -1)
+    label(end)
+
+
+print(tbnall(0xFFFFFFFF, 0xFFFFFFFF))
+print(tbnall(0xFFFEFFFF, 0xFFFFFFFF))
+print(tbnall(0x00000000, 0xFFFFFFFF))
+print(tbnall(0xFFFFFFFF, 0x01010101))
+
+
+@micropython.asm_xtensa
+def tbne(a2, a3) -> int:
+    mov(a4, a2)
+    movi(a2, 0)
+    bne(a4, a3, end)
+    movi(a2, -1)
+    label(end)
+
+
+print(tbne(0x00000000, 0x00000000))
+print(tbne(0x00010000, 0x00000000))
+print(tbne(0xFFFFFFFF, 0xFFFFFFFF))
+
+
+@micropython.asm_xtensa
+def tbnez(a2) -> int:
+    mov(a3, a2)
+    movi(a2, 0)
+    bnez(a3, end)
+    movi(a2, -1)
+    label(end)
+
+
+print(tbnez(0))
+print(tbnez(0x12345678))
+print(tbnez(-1))
+
+
+@micropython.asm_xtensa
+def tbnone(a2, a3) -> int:
+    mov(a4, a2)
+    movi(a2, 0)
+    bnone(a4, a3, end)
+    movi(a2, -1)
+    label(end)
+
+
+print(tbnone(0xFFFFFFFF, 0xFFFFFFFF))
+print(tbnone(0xFFFEFFFF, 0xFFFFFFFF))
+print(tbnone(0x00000000, 0xFFFFFFFF))
+print(tbnone(0x10101010, 0x01010101))
+
+
+@micropython.asm_xtensa
+def tbeqz_n(a2) -> int:
+    mov(a3, a2)
+    movi(a2, 0)
+    beqz_n(a3, end)
+    movi(a2, -1)
+    label(end)
+
+
+print(tbeqz_n(0))
+print(tbeqz_n(0x12345678))
+print(tbeqz_n(-1))
+
+
+@micropython.asm_xtensa
+def tbnez_n(a2) -> int:
+    mov(a3, a2)
+    movi(a2, 0)
+    bnez(a3, end)
+    movi(a2, -1)
+    label(end)
+
+
+print(tbnez_n(0))
+print(tbnez_n(0x12345678))
+print(tbnez_n(-1))
diff --git a/tests/inlineasm/xtensa/asmbranch.py.exp b/tests/inlineasm/xtensa/asmbranch.py.exp
new file mode 100644
index 0000000000000..319a4b435ef2f
--- /dev/null
+++ b/tests/inlineasm/xtensa/asmbranch.py.exp
@@ -0,0 +1,66 @@
+0
+-1
+-1
+0
+0
+0
+-1
+0
+-1
+0
+0
+-1
+0
+0
+-1
+0
+0
+-1
+0
+0
+0
+-1
+0
+0
+-1
+-1
+0
+0
+-1
+0
+0
+-1
+0
+0
+0
+-1
+-1
+-1
+0
+-1
+-1
+0
+-1
+-1
+-1
+0
+-1
+0
+0
+-1
+-1
+0
+-1
+-1
+0
+0
+-1
+-1
+0
+0
+0
+-1
+-1
+-1
+0
+0
diff --git a/tests/inlineasm/xtensa/asmjump.py b/tests/inlineasm/xtensa/asmjump.py
new file mode 100644
index 0000000000000..f41c9482319da
--- /dev/null
+++ b/tests/inlineasm/xtensa/asmjump.py
@@ -0,0 +1,26 @@
+@micropython.asm_xtensa
+def jump() -> int:
+    movi(a2, 0)
+    j(NEXT)
+    addi(a2, a2, 1)
+    j(DONE)
+    label(NEXT)
+    addi(a2, a2, 2)
+    label(DONE)
+
+
+print(jump())
+
+
+@micropython.asm_xtensa
+def jumpx() -> int:
+    call0(ENTRY)
+    label(ENTRY)
+    movi(a2, 0)
+    addi(a3, a0, 12)
+    jx(a3)
+    movi(a2, 1)
+    movi(a2, 2)
+
+
+print(jumpx())
diff --git a/tests/inlineasm/xtensa/asmjump.py.exp b/tests/inlineasm/xtensa/asmjump.py.exp
new file mode 100644
index 0000000000000..51993f072d583
--- /dev/null
+++ b/tests/inlineasm/xtensa/asmjump.py.exp
@@ -0,0 +1,2 @@
+2
+2
diff --git a/tests/inlineasm/xtensa/asmloadstore.py b/tests/inlineasm/xtensa/asmloadstore.py
new file mode 100644
index 0000000000000..b185e30520cc9
--- /dev/null
+++ b/tests/inlineasm/xtensa/asmloadstore.py
@@ -0,0 +1,98 @@
+import array
+
+# On the 8266 the generated code gets put into the IRAM segment, which is only
+# word-addressable.  Therefore, to test byte and halfword load/store opcodes
+# some memory must be reserved in the DRAM segment.
+
+BYTE_DATA = array.array("B", (0x11, 0x22, 0x33, 0x44))
+WORD_DATA = array.array("h", (100, 200, -100, -200))
+DWORD_DATA = array.array("i", (100_000, -200_000, 300_000, -400_000))
+
+
+@micropython.asm_xtensa
+def tl32r() -> int:
+    nop()
+    j(CODE)
+    align(4)
+    label(DATA)
+    data(1, 1, 2, 3, 4, 5, 6, 7)
+    align(4)
+    label(CODE)
+    nop_n()
+    nop_n()
+    l32r(a2, DATA)
+
+
+print(hex(tl32r()))
+
+
+@micropython.asm_xtensa
+def tl32i() -> uint:
+    call0(ENTRY)
+    label(ENTRY)
+    l32i(a2, a0, 0)
+
+
+print(hex(tl32i()))
+
+
+@micropython.asm_xtensa
+def tl8ui(a2) -> uint:
+    mov(a3, a2)
+    l8ui(a2, a3, 1)
+
+
+print(hex(tl8ui(BYTE_DATA)))
+
+
+@micropython.asm_xtensa
+def tl16ui(a2) -> uint:
+    mov(a3, a2)
+    l16ui(a2, a3, 2)
+
+
+print(tl16ui(WORD_DATA))
+
+
+@micropython.asm_xtensa
+def tl16si(a2) -> int:
+    mov(a3, a2)
+    l16si(a2, a3, 6)
+
+
+print(tl16si(WORD_DATA))
+
+
+@micropython.asm_xtensa
+def ts8i(a2, a3):
+    s8i(a3, a2, 1)
+
+
+ts8i(BYTE_DATA, 0xFF)
+print(BYTE_DATA)
+
+
+@micropython.asm_xtensa
+def ts16i(a2, a3):
+    s16i(a3, a2, 2)
+
+
+ts16i(WORD_DATA, -123)
+print(WORD_DATA)
+
+
+@micropython.asm_xtensa
+def ts32i(a2, a3) -> uint:
+    s32i(a3, a2, 4)
+
+
+ts32i(DWORD_DATA, -123456)
+print(DWORD_DATA)
+
+
+@micropython.asm_xtensa
+def tl32i_n(a2) -> uint:
+    l32i_n(a2, a2, 8)
+
+
+print(tl32i_n(DWORD_DATA))
diff --git a/tests/inlineasm/xtensa/asmloadstore.py.exp b/tests/inlineasm/xtensa/asmloadstore.py.exp
new file mode 100644
index 0000000000000..e6672df6f8132
--- /dev/null
+++ b/tests/inlineasm/xtensa/asmloadstore.py.exp
@@ -0,0 +1,9 @@
+0x4030201
+0xf8002022
+0x22
+200
+-200
+array('B', [17, 255, 51, 68])
+array('h', [100, -123, -100, -200])
+array('i', [100000, -123456, 300000, -400000])
+300000
diff --git a/tests/inlineasm/xtensa/asmmisc.py b/tests/inlineasm/xtensa/asmmisc.py
new file mode 100644
index 0000000000000..271ab836625dc
--- /dev/null
+++ b/tests/inlineasm/xtensa/asmmisc.py
@@ -0,0 +1,25 @@
+@micropython.asm_xtensa
+def tnop(a2, a3, a4, a5):
+    nop()
+
+
+out2 = tnop(0x100, 0x200, 0x300, 0x400)
+print(out2 == 0x100)
+
+
+@micropython.asm_xtensa
+def tnop_n(a2, a3, a4, a5):
+    nop_n()
+
+
+out2 = tnop_n(0x100, 0x200, 0x300, 0x400)
+print(out2 == 0x100)
+
+
+@micropython.asm_xtensa
+def tmov_n(a2, a3):
+    mov_n(a4, a3)
+    add(a2, a4, a3)
+
+
+print(tmov_n(0, 1))
diff --git a/tests/inlineasm/xtensa/asmmisc.py.exp b/tests/inlineasm/xtensa/asmmisc.py.exp
new file mode 100644
index 0000000000000..eefaa35daf0f1
--- /dev/null
+++ b/tests/inlineasm/xtensa/asmmisc.py.exp
@@ -0,0 +1,3 @@
+True
+True
+2
diff --git a/tests/inlineasm/xtensa/asmshift.py b/tests/inlineasm/xtensa/asmshift.py
new file mode 100644
index 0000000000000..271ca1ccd494c
--- /dev/null
+++ b/tests/inlineasm/xtensa/asmshift.py
@@ -0,0 +1,137 @@
+@micropython.asm_xtensa
+def lsl1(a2):
+    slli(a2, a2, 1)
+
+
+print(hex(lsl1(0x123)))
+
+
+@micropython.asm_xtensa
+def lsl23(a2):
+    slli(a2, a2, 23)
+
+
+print(hex(lsl23(1)))
+
+
+@micropython.asm_xtensa
+def lsr1(a2):
+    srli(a2, a2, 1)
+
+
+print(hex(lsr1(0x123)))
+
+
+@micropython.asm_xtensa
+def lsr15(a2):
+    srli(a2, a2, 15)
+
+
+print(hex(lsr15(0x80000000)))
+
+
+@micropython.asm_xtensa
+def asr1(a2):
+    srai(a2, a2, 1)
+
+
+print(hex(asr1(0x123)))
+
+
+@micropython.asm_xtensa
+def asr31(a2):
+    srai(a2, a2, 31)
+
+
+print(hex(asr31(0x80000000)))
+
+
+@micropython.asm_xtensa
+def lsl1r(a2):
+    movi(a3, 1)
+    ssl(a3)
+    sll(a2, a2)
+
+
+print(hex(lsl1r(0x123)))
+
+
+@micropython.asm_xtensa
+def lsr1r(a2):
+    movi(a3, 1)
+    ssr(a3)
+    srl(a2, a2)
+
+
+print(hex(lsr1r(0x123)))
+
+
+@micropython.asm_xtensa
+def asr1r(a2):
+    movi(a3, 1)
+    ssr(a3)
+    sra(a2, a2)
+
+
+print(hex(asr1r(0x123)))
+
+
+@micropython.asm_xtensa
+def sll9(a2):
+    ssai(9)
+    sll(a2, a2)
+
+
+print(hex(sll9(1)))
+
+
+@micropython.asm_xtensa
+def srlr(a2, a3):
+    ssa8l(a3)
+    srl(a2, a2)
+
+
+print(hex(srlr(0x12340000, 2)))
+
+
+@micropython.asm_xtensa
+def sllr(a2, a3):
+    ssa8b(a3)
+    sll(a2, a2)
+
+
+print(hex(sllr(0x1234, 2)))
+
+
+@micropython.asm_xtensa
+def srcr(a2, a3, a4):
+    ssr(a4)
+    src(a2, a2, a3)
+
+
+print(hex(srcr(0x00000001, 0x80000000, 2)))
+
+
+@micropython.asm_xtensa
+def srai24(a2):
+    srai(a2, a2, 24)
+
+
+print(hex(srai24(0x12345678)))
+
+
+@micropython.asm_xtensa
+def nsar(a2, a3):
+    nsa(a2, a3)
+
+
+print(nsar(0x12345678, 0))
+print(nsar(0x12345678, -1))
+
+
+@micropython.asm_xtensa
+def nsaur(a2, a3):
+    nsau(a2, a3)
+
+
+print(nsaur(0x12345678, 0))
diff --git a/tests/inlineasm/xtensa/asmshift.py.exp b/tests/inlineasm/xtensa/asmshift.py.exp
new file mode 100644
index 0000000000000..3e2bb3b4aefa9
--- /dev/null
+++ b/tests/inlineasm/xtensa/asmshift.py.exp
@@ -0,0 +1,17 @@
+0x246
+0x800000
+0x91
+0x10000
+0x91
+-0x1
+0x246
+0x91
+0x91
+0x800000
+0x1234
+0x12340000
+0x60000000
+0x12
+31
+31
+32
diff --git a/tests/micropython/viper_ptr16_load_boundary.py b/tests/micropython/viper_ptr16_load_boundary.py
new file mode 100644
index 0000000000000..ccaaa0909af9d
--- /dev/null
+++ b/tests/micropython/viper_ptr16_load_boundary.py
@@ -0,0 +1,25 @@
+# Test boundary conditions for various architectures
+
+GET_TEMPLATE = """
+@micropython.viper
+def get{off}(src: ptr16) -> int:
+    return src[{off}]
+print(b[{off} * 2:({off} + 1) * 2])
+"""
+
+
+@micropython.viper
+def get_index(src: ptr16, i: int) -> int:
+    return src[i]
+
+
+b = bytearray(5000)
+b[28:38] = b"0123456789"
+b[252:262] = b"ABCDEFGHIJ"
+b[4092:4102] = b"KLMNOPQRST"
+
+for pre, idx, post in (15, 16, 17), (127, 128, 129), (2047, 2048, 2049):
+    print(get_index(b, pre), get_index(b, idx), get_index(b, post))
+    exec(GET_TEMPLATE.format(off=pre))
+    exec(GET_TEMPLATE.format(off=idx))
+    exec(GET_TEMPLATE.format(off=post))
diff --git a/tests/micropython/viper_ptr16_load_boundary.py.exp b/tests/micropython/viper_ptr16_load_boundary.py.exp
new file mode 100644
index 0000000000000..4b8c184c134cb
--- /dev/null
+++ b/tests/micropython/viper_ptr16_load_boundary.py.exp
@@ -0,0 +1,12 @@
+13106 13620 14134
+bytearray(b'23')
+bytearray(b'45')
+bytearray(b'67')
+17475 17989 18503
+bytearray(b'CD')
+bytearray(b'EF')
+bytearray(b'GH')
+20045 20559 21073
+bytearray(b'MN')
+bytearray(b'OP')
+bytearray(b'QR')
diff --git a/tests/micropython/viper_ptr16_store_boundary.py b/tests/micropython/viper_ptr16_store_boundary.py
new file mode 100644
index 0000000000000..e0a4f84557366
--- /dev/null
+++ b/tests/micropython/viper_ptr16_store_boundary.py
@@ -0,0 +1,41 @@
+# Test boundary conditions for various architectures
+
+SET_TEMPLATE = """
+@micropython.viper
+def set{off}(dest: ptr16):
+    dest[{off}] = {val}
+set{off}(b)
+print(b[{off} * 2:({off} + 1) * 2])
+"""
+
+TEST_DATA = (
+    (15, (0x4241, 0x4443, 0x4645)),
+    (127, (0x4847, 0x4A49, 0x4C4B)),
+    (2047, (0x4E4D, 0x504F, 0x5251)),
+)
+
+
+@micropython.viper
+def set_index(dest: ptr16, i: int, val: int):
+    dest[i] = val
+
+
+@micropython.viper
+def set_index(dest: ptr16, i: int, val: int):
+    dest[i] = val
+
+
+b = bytearray(5000)
+for start, vals in TEST_DATA:
+    for i, v in enumerate(vals):
+        set_index(b, start + i, v)
+        print(b[(start + i) * 2 : (start + i + 1) * 2])
+
+
+for i in range(len(b)):
+    b[i] = 0
+
+
+for start, vals in TEST_DATA:
+    for i, v in enumerate(vals):
+        exec(SET_TEMPLATE.format(off=start + i, val=v + 0x0101))
diff --git a/tests/micropython/viper_ptr16_store_boundary.py.exp b/tests/micropython/viper_ptr16_store_boundary.py.exp
new file mode 100644
index 0000000000000..b56fe6695f298
--- /dev/null
+++ b/tests/micropython/viper_ptr16_store_boundary.py.exp
@@ -0,0 +1,18 @@
+bytearray(b'AB')
+bytearray(b'CD')
+bytearray(b'EF')
+bytearray(b'GH')
+bytearray(b'IJ')
+bytearray(b'KL')
+bytearray(b'MN')
+bytearray(b'OP')
+bytearray(b'QR')
+bytearray(b'BC')
+bytearray(b'DE')
+bytearray(b'FG')
+bytearray(b'HI')
+bytearray(b'JK')
+bytearray(b'LM')
+bytearray(b'NO')
+bytearray(b'PQ')
+bytearray(b'RS')
diff --git a/tests/micropython/viper_ptr32_load_boundary.py b/tests/micropython/viper_ptr32_load_boundary.py
new file mode 100644
index 0000000000000..6954bd46b239f
--- /dev/null
+++ b/tests/micropython/viper_ptr32_load_boundary.py
@@ -0,0 +1,25 @@
+# Test boundary conditions for various architectures
+
+GET_TEMPLATE = """
+@micropython.viper
+def get{off}(src: ptr32) -> int:
+    return src[{off}]
+print(b[{off} * 4:({off} + 1) * 4])
+"""
+
+
+@micropython.viper
+def get_index(src: ptr32, i: int) -> int:
+    return src[i]
+
+
+b = bytearray(5000)
+b[24:43] = b"0123456789ABCDEFGHIJ"
+b[248:268] = b"KLMNOPQRSTUVWXYZabcd"
+b[4088:4108] = b"efghijklmnopqrstuvwx"
+
+for pre, idx, post in (7, 8, 9), (63, 64, 65), (1023, 1024, 1025):
+    print(get_index(b, pre), get_index(b, idx), get_index(b, post))
+    exec(GET_TEMPLATE.format(off=pre))
+    exec(GET_TEMPLATE.format(off=idx))
+    exec(GET_TEMPLATE.format(off=post))
diff --git a/tests/micropython/viper_ptr32_load_boundary.py.exp b/tests/micropython/viper_ptr32_load_boundary.py.exp
new file mode 100644
index 0000000000000..a58e703f91286
--- /dev/null
+++ b/tests/micropython/viper_ptr32_load_boundary.py.exp
@@ -0,0 +1,12 @@
+926299444 1111570744 1178944579
+bytearray(b'4567')
+bytearray(b'89AB')
+bytearray(b'CDEF')
+1381060687 1448432723 1515804759
+bytearray(b'OPQR')
+bytearray(b'STUV')
+bytearray(b'WXYZ')
+1818978921 1886350957 1953722993
+bytearray(b'ijkl')
+bytearray(b'mnop')
+bytearray(b'qrst')
diff --git a/tests/micropython/viper_ptr32_store_boundary.py b/tests/micropython/viper_ptr32_store_boundary.py
new file mode 100644
index 0000000000000..243ff5cd9c2af
--- /dev/null
+++ b/tests/micropython/viper_ptr32_store_boundary.py
@@ -0,0 +1,35 @@
+# Test boundary conditions for various architectures
+
+TEST_DATA = (
+    (3, (0x04030201, 0x08070605, 0x0C0B0A09)),
+    (63, (0x100F0E0D, 0x14131211, 0x18171615)),
+    (1023, (0x1C1B1A19, 0x201F1E1D, 0x24232221)),
+)
+
+SET_TEMPLATE = """
+@micropython.viper
+def set{off}(dest: ptr32):
+    dest[{off}] = {val} & 0x3FFFFFFF
+set{off}(b)
+print(b[{off} * 4:({off} + 1) * 4])
+"""
+
+
+@micropython.viper
+def set_index(dest: ptr32, i: int, val: int):
+    dest[i] = val
+
+
+b = bytearray(5000)
+for start, vals in TEST_DATA:
+    for i, v in enumerate(vals):
+        set_index(b, start + i, v)
+        print(b[(start + i) * 4 : (start + i + 1) * 4])
+
+for i in range(len(b)):
+    b[i] = 0
+
+
+for start, vals in TEST_DATA:
+    for i, v in enumerate(vals):
+        exec(SET_TEMPLATE.format(off=start + i, val=v + 0x01010101))
diff --git a/tests/micropython/viper_ptr32_store_boundary.py.exp b/tests/micropython/viper_ptr32_store_boundary.py.exp
new file mode 100644
index 0000000000000..89f09fbc7af5f
--- /dev/null
+++ b/tests/micropython/viper_ptr32_store_boundary.py.exp
@@ -0,0 +1,18 @@
+bytearray(b'\x01\x02\x03\x04')
+bytearray(b'\x05\x06\x07\x08')
+bytearray(b'\t\n\x0b\x0c')
+bytearray(b'\r\x0e\x0f\x10')
+bytearray(b'\x11\x12\x13\x14')
+bytearray(b'\x15\x16\x17\x18')
+bytearray(b'\x19\x1a\x1b\x1c')
+bytearray(b'\x1d\x1e\x1f ')
+bytearray(b'!"#$')
+bytearray(b'\x02\x03\x04\x05')
+bytearray(b'\x06\x07\x08\t')
+bytearray(b'\n\x0b\x0c\r')
+bytearray(b'\x0e\x0f\x10\x11')
+bytearray(b'\x12\x13\x14\x15')
+bytearray(b'\x16\x17\x18\x19')
+bytearray(b'\x1a\x1b\x1c\x1d')
+bytearray(b'\x1e\x1f !')
+bytearray(b'"#$%')
diff --git a/tests/micropython/viper_ptr8_load_boundary.py b/tests/micropython/viper_ptr8_load_boundary.py
new file mode 100644
index 0000000000000..bcb17a1e1f2bc
--- /dev/null
+++ b/tests/micropython/viper_ptr8_load_boundary.py
@@ -0,0 +1,25 @@
+# Test boundary conditions for various architectures
+
+GET_TEMPLATE = """
+@micropython.viper
+def get{off}(src: ptr8) -> int:
+    return src[{off}]
+print(get{off}(b))
+"""
+
+
+@micropython.viper
+def get_index(src: ptr8, i: int) -> int:
+    return src[i]
+
+
+b = bytearray(5000)
+b[30:32] = b"123"
+b[254:256] = b"456"
+b[4094:4096] = b"789"
+
+for pre, idx, post in (30, 31, 32), (254, 255, 256), (4094, 4095, 4096):
+    print(get_index(b, pre), get_index(b, idx), get_index(b, post))
+    exec(GET_TEMPLATE.format(off=pre))
+    exec(GET_TEMPLATE.format(off=idx))
+    exec(GET_TEMPLATE.format(off=post))
diff --git a/tests/micropython/viper_ptr8_load_boundary.py.exp b/tests/micropython/viper_ptr8_load_boundary.py.exp
new file mode 100644
index 0000000000000..7cbd1ac78cff1
--- /dev/null
+++ b/tests/micropython/viper_ptr8_load_boundary.py.exp
@@ -0,0 +1,12 @@
+49 50 51
+49
+50
+51
+52 53 54
+52
+53
+54
+55 56 57
+55
+56
+57
diff --git a/tests/micropython/viper_ptr8_store_boundary.py b/tests/micropython/viper_ptr8_store_boundary.py
new file mode 100644
index 0000000000000..ad512684549a7
--- /dev/null
+++ b/tests/micropython/viper_ptr8_store_boundary.py
@@ -0,0 +1,30 @@
+# Test boundary conditions for various architectures
+
+TEST_DATA = ((49, 30, 3), (52, 254, 3), (55, 4094, 3))
+
+SET_TEMPLATE = """
+@micropython.viper
+def set{off}(dest: ptr8):
+    dest[{off}] = {val}
+set{off}(b)
+print(b[{off}])
+"""
+
+
+@micropython.viper
+def set_index(dest: ptr8, i: int, val: int):
+    dest[i] = val
+
+
+b = bytearray(5000)
+for val, start, count in TEST_DATA:
+    for i in range(count):
+        set_index(b, start + i, val + i)
+    print(b[start : start + count])
+
+for i in range(len(b)):
+    b[i] = 0
+
+for val, start, count in TEST_DATA:
+    for i in range(count):
+        exec(SET_TEMPLATE.format(off=start + i, val=val + i + 16))
diff --git a/tests/micropython/viper_ptr8_store_boundary.py.exp b/tests/micropython/viper_ptr8_store_boundary.py.exp
new file mode 100644
index 0000000000000..a35cb3ac9e0dd
--- /dev/null
+++ b/tests/micropython/viper_ptr8_store_boundary.py.exp
@@ -0,0 +1,12 @@
+bytearray(b'123')
+bytearray(b'456')
+bytearray(b'789')
+65
+66
+67
+68
+69
+70
+71
+72
+73
diff --git a/tests/misc/non_compliant.py b/tests/misc/non_compliant.py
index da90f90ac3ed7..dd62f63255c72 100644
--- a/tests/misc/non_compliant.py
+++ b/tests/misc/non_compliant.py
@@ -63,12 +63,6 @@
 except NotImplementedError:
     print("NotImplementedError")
 
-# str.endswith(s, start) not implemented
-try:
-    "abc".endswith("c", 1)
-except NotImplementedError:
-    print("NotImplementedError")
-
 # str subscr with step!=1 not implemented
 try:
     print("abc"[1:2:3])
diff --git a/tests/misc/non_compliant.py.exp b/tests/misc/non_compliant.py.exp
index 3f15a14406092..deefe78a712d0 100644
--- a/tests/misc/non_compliant.py.exp
+++ b/tests/misc/non_compliant.py.exp
@@ -13,7 +13,6 @@ NotImplementedError
 NotImplementedError
 NotImplementedError
 NotImplementedError
-NotImplementedError
 b'\x01\x02'
 b'\x01\x00'
 NotImplementedError
diff --git a/tests/misc/print_exception.py b/tests/misc/print_exception.py
index 1d196d6ab167f..92754733b58b1 100644
--- a/tests/misc/print_exception.py
+++ b/tests/misc/print_exception.py
@@ -1,3 +1,5 @@
+# Test sys.print_exception (MicroPython) / traceback.print_exception (CPython).
+
 try:
     import io
     import sys
diff --git a/tests/multi_net/tcp_recv_peek.py b/tests/multi_net/tcp_recv_peek.py
new file mode 100644
index 0000000000000..ff540dd3c3c41
--- /dev/null
+++ b/tests/multi_net/tcp_recv_peek.py
@@ -0,0 +1,46 @@
+# Test TCP recv with MSG_PEEK
+#
+# Note that bare metal LWIP only returns at most one packet's worth of TCP data
+# in any recv() call - including when peeking - so can't be too clever with
+# different recv() combinations
+import socket
+import random
+
+
+# Server
+def instance0():
+    PORT = random.randrange(10000, 50000)
+    multitest.globals(IP=multitest.get_network_ip(), PORT=PORT)
+    s = socket.socket()
+    s.setsockopt(socket.SOL_SOCKET, socket.SO_REUSEADDR, 1)
+    s.bind(socket.getaddrinfo("0.0.0.0", PORT)[0][-1])
+    s.listen()
+    multitest.next()
+    s2, _ = s.accept()
+    print(s2.recv(8, socket.MSG_PEEK))
+    print(s2.recv(8))
+    s2.send(b"1234567890")
+    multitest.broadcast("0-sent")
+    multitest.wait("1-sent")
+    print(s2.recv(5, socket.MSG_PEEK))
+    print(s2.recv(5, socket.MSG_PEEK))
+    multitest.broadcast("0-recved")
+    multitest.wait("1-recved")  # sync here necessary as MP sends RST if closing TCP early
+    s2.close()
+    s.close()
+
+
+# Client
+def instance1():
+    multitest.next()
+    s = socket.socket()
+    s.connect(socket.getaddrinfo(IP, PORT)[0][-1])
+    s.send(b"abcdefgh")
+    multitest.broadcast("1-sent")
+    multitest.wait("0-sent")
+    s.send(b"klmnopqr")
+    print(s.recv(5, socket.MSG_PEEK))
+    print(s.recv(10))
+    multitest.broadcast("1-recved")
+    multitest.wait("0-recved")
+    s.close()
diff --git a/tests/multi_net/udp_data_multi.py b/tests/multi_net/udp_data_multi.py
new file mode 100644
index 0000000000000..5d7b13e5188dd
--- /dev/null
+++ b/tests/multi_net/udp_data_multi.py
@@ -0,0 +1,69 @@
+# Test UDP reception when there are multiple incoming UDP packets that need to be
+# queued internally in the TCP/IP stack.
+
+import socket
+
+NUM_NEW_SOCKETS = 4
+NUM_PACKET_BURSTS = 6
+NUM_PACKET_GROUPS = 5
+TOTAL_PACKET_BURSTS = NUM_NEW_SOCKETS * NUM_PACKET_BURSTS
+# The tast passes if more than 75% of packets are received in each group.
+PACKET_RECV_THRESH = 0.75 * TOTAL_PACKET_BURSTS
+PORT = 8000
+
+
+# Server
+def instance0():
+    recv_count = {i: 0 for i in range(NUM_PACKET_GROUPS)}
+    multitest.globals(IP=multitest.get_network_ip())
+    multitest.next()
+    for i in range(NUM_NEW_SOCKETS):
+        print("test socket", i)
+        s = socket.socket(socket.AF_INET, socket.SOCK_DGRAM)
+        s.setsockopt(socket.SOL_SOCKET, socket.SO_REUSEADDR, 1)
+        s.bind(socket.getaddrinfo("0.0.0.0", PORT + i)[0][-1])
+        s.settimeout(0.250)
+        multitest.broadcast("server ready")
+        for burst in range(NUM_PACKET_BURSTS):
+            # Wait for all packets to be sent, without receiving any yet.
+            multitest.wait("data sent burst={}".format(burst))
+            # Try to receive all packets (they should be waiting in the queue).
+            for group in range(NUM_PACKET_GROUPS):
+                try:
+                    data, addr = s.recvfrom(1000)
+                except:
+                    continue
+                recv_burst, recv_group = data.split(b":")
+                recv_burst = int(recv_burst)
+                recv_group = int(recv_group)
+                if recv_burst == burst:
+                    recv_count[recv_group] += 1
+            # Inform the client that all data was received.
+            multitest.broadcast("data received burst={}".format(burst))
+        s.close()
+
+    # Check how many packets were received.
+    for group, count in recv_count.items():
+        if count >= PACKET_RECV_THRESH:
+            print("pass group={}".format(group))
+        else:
+            print("fail group={} received={}%".format(group, 100 * count // TOTAL_PACKET_BURSTS))
+
+
+# Client
+def instance1():
+    multitest.next()
+    for i in range(NUM_NEW_SOCKETS):
+        print("test socket", i)
+        ai = socket.getaddrinfo(IP, PORT + i)[0][-1]
+        s = socket.socket(socket.AF_INET, socket.SOCK_DGRAM)
+        multitest.wait("server ready")
+        for burst in range(NUM_PACKET_BURSTS):
+            # Send a bunch of packets all in a row.
+            for group in range(NUM_PACKET_GROUPS):
+                s.sendto(b"%d:%d" % (burst, group), ai)
+            # Inform the server that the data has been sent.
+            multitest.broadcast("data sent burst={}".format(burst))
+            # Wait for the server to finish receiving.
+            multitest.wait("data received burst={}".format(burst))
+        s.close()
diff --git a/tests/multi_net/udp_data_multi.py.exp b/tests/multi_net/udp_data_multi.py.exp
new file mode 100644
index 0000000000000..bc67c6ab0cf01
--- /dev/null
+++ b/tests/multi_net/udp_data_multi.py.exp
@@ -0,0 +1,15 @@
+--- instance0 ---
+test socket 0
+test socket 1
+test socket 2
+test socket 3
+pass group=0
+pass group=1
+pass group=2
+pass group=3
+pass group=4
+--- instance1 ---
+test socket 0
+test socket 1
+test socket 2
+test socket 3
diff --git a/tests/multi_net/udp_recv_dontwait.py b/tests/multi_net/udp_recv_dontwait.py
new file mode 100644
index 0000000000000..640f3f060ea74
--- /dev/null
+++ b/tests/multi_net/udp_recv_dontwait.py
@@ -0,0 +1,59 @@
+# Test UDP recv and recvfrom with MSG_DONTWAIT
+import random
+import socket
+
+try:
+    import errno, time
+except ImportError:
+    print("SKIP")
+    raise SystemExit
+
+
+# Server
+def instance0():
+    PORT = random.randrange(10000, 50000)
+    multitest.globals(IP=multitest.get_network_ip(), PORT=PORT)
+    s = socket.socket(socket.AF_INET, socket.SOCK_DGRAM)
+    s.setsockopt(socket.SOL_SOCKET, socket.SO_REUSEADDR, 1)
+    s.bind(socket.getaddrinfo("0.0.0.0", PORT)[0][-1])
+    multitest.next()
+    begin = time.ticks_ms()
+
+    # do some recvs before instance1 starts, when we know no packet is waiting
+    try:
+        print(s.recvfrom(8, socket.MSG_DONTWAIT))
+    except OSError as e:
+        print(e.errno == errno.EAGAIN)
+    try:
+        print(s.recv(8, socket.MSG_DONTWAIT))
+    except OSError as e:
+        print(e.errno == errno.EAGAIN)
+
+    # the above steps should not have taken any substantial time
+    elapsed = time.ticks_diff(time.ticks_ms(), begin)
+    print(True if elapsed < 50 else elapsed)
+
+    # Now instance1 will send us a UDP packet
+    multitest.broadcast("0-ready")
+    multitest.wait("1-sent")
+
+    for _ in range(10):  # retry if necessary, to allow for network delay
+        time.sleep_ms(100)
+        try:
+            print(s.recv(8, socket.MSG_DONTWAIT))
+            break
+        except OSError as er:
+            if er.errno != errno.EAGAIN:
+                raise er
+    s.close()
+
+
+# Client
+def instance1():
+    multitest.next()
+    s = socket.socket(socket.AF_INET, socket.SOCK_DGRAM)
+    s.connect(socket.getaddrinfo(IP, PORT)[0][-1])
+    multitest.wait("0-ready")
+    print(s.send(b"abcdefgh"))
+    multitest.broadcast("1-sent")
+    s.close()
diff --git a/tests/multi_net/udp_recv_dontwait.py.exp b/tests/multi_net/udp_recv_dontwait.py.exp
new file mode 100644
index 0000000000000..f61fd4bbe2ee5
--- /dev/null
+++ b/tests/multi_net/udp_recv_dontwait.py.exp
@@ -0,0 +1,7 @@
+--- instance0 ---
+True
+True
+True
+b'abcdefgh'
+--- instance1 ---
+8
diff --git a/tests/multi_net/udp_recv_peek.py b/tests/multi_net/udp_recv_peek.py
new file mode 100644
index 0000000000000..47897ce553954
--- /dev/null
+++ b/tests/multi_net/udp_recv_peek.py
@@ -0,0 +1,36 @@
+# Test UDP recv and recvfrom with MSG_PEEK
+import random
+import socket
+import time
+
+
+# Server
+def instance0():
+    PORT = random.randrange(10000, 50000)
+    multitest.globals(IP=multitest.get_network_ip(), PORT=PORT)
+    s = socket.socket(socket.AF_INET, socket.SOCK_DGRAM)
+    s.setsockopt(socket.SOL_SOCKET, socket.SO_REUSEADDR, 1)
+    s.bind(socket.getaddrinfo("0.0.0.0", PORT)[0][-1])
+    multitest.next()
+    peek_bytes, peek_addr = s.recvfrom(8, socket.MSG_PEEK)
+    print(peek_bytes)
+    real_bytes, real_addr = s.recvfrom(8)
+    print(real_bytes)
+    print(peek_addr == real_addr)  # source addr should be the same for each
+    res = s.sendto(b"1234567890", peek_addr)
+    print(res)
+    print(s.recv(5, socket.MSG_PEEK))
+    print(s.recv(5, socket.MSG_PEEK))
+    s.close()
+
+
+# Client
+def instance1():
+    multitest.next()
+    s = socket.socket(socket.AF_INET, socket.SOCK_DGRAM)
+    s.connect(socket.getaddrinfo(IP, PORT)[0][-1])
+    s.send(b"abcdefgh")
+    s.send(b"klmnopqr")
+    print(s.recv(5, socket.MSG_PEEK))
+    print(s.recv(10))
+    s.close()
diff --git a/tests/multi_pyb_can/rx_callback.py b/tests/multi_pyb_can/rx_callback.py
new file mode 100644
index 0000000000000..960a225c93f28
--- /dev/null
+++ b/tests/multi_pyb_can/rx_callback.py
@@ -0,0 +1,98 @@
+from pyb import CAN
+import time
+import errno
+
+# Test the various receive IRQs, including overflow
+
+rx_overflow = False
+
+REASONS = ["received", "full", "overflow"]
+
+# CAN IDs
+ID_SPAM = 0x345  # messages spammed into the receive FIFO
+ID_ACK_OFLOW = 0x055  # message the receiver sends after it's seen an overflow
+ID_AFTER = 0x100  # message the sender sends after the ACK
+
+
+def cb0(bus, reason):
+    global rx_overflow
+    if reason != 0 and not rx_overflow:
+        # exact timing of 'received' callbacks depends on controller type,
+        # so only log the other two
+        print("rx0 reason", REASONS[reason])
+    if reason == 2:
+        rx_overflow = True
+
+
+# Accept all standard IDs on FIFO 0
+def _enable_accept_all():
+    if hasattr(CAN, "MASK"):  # FD-CAN controller
+        can.setfilter(0, CAN.RANGE, 0, (0x0, 0x7FF), extframe=False)
+    else:
+        can.setfilter(0, CAN.MASK16, 0, (0, 0, 0, 0), extframe=False)
+
+
+# Receiver
+def instance0():
+    _enable_accept_all()
+    can.rxcallback(0, cb0)
+
+    multitest.next()
+    multitest.wait("sender ready")
+    multitest.broadcast("receiver ready")
+
+    while not rx_overflow:
+        pass  # Resume ASAP after FIFO0 overflows
+
+    can.send(b"overflow", ID_ACK_OFLOW)
+
+    # drain the receive FIFO, making sure we read at least on ID_SPAM message
+    rxed_spam = False
+    while can.any(0):
+        msg = can.recv(0, timeout=0)
+        assert msg[0] == ID_SPAM
+        rxed_spam = True
+    print("rxed_spam", rxed_spam)
+
+    # This should be the one message with ID_AFTER, there may be one or two spam messages as well
+    for _ in range(10):
+        msg = can.recv(0, timeout=500)
+        if msg[0] == ID_AFTER:
+            print(msg)
+            break
+
+    # RX FIFO should be empty now
+    print("any", can.any(0))
+
+
+# Sender
+def instance1():
+    _enable_accept_all()
+    multitest.next()
+    multitest.broadcast("sender ready")
+    multitest.wait("receiver ready")
+
+    # Spam out messages until the receiver tells us its RX FIFO is full.
+    #
+    # The RX FIFO on the receiver can vary from 3 deep (BXCAN) to 25 deep (STM32H7),
+    # so we keep sending to it until we see a CAN message on ID_ACK_OFLOW indicating
+    # the receiver's FIFO has overflowed
+    for i in range(255):
+        can.send(bytes([i] * 8), ID_SPAM, timeout=25)
+        if can.any(0):
+            print(can.recv(0))  # should be ID_ACK_OFLOW
+            break
+        # on boards like STM32H7 the TX FIFO is really deep, so don't fill it too quickly...
+        time.sleep_ms(1)
+
+    # give the receiver some time to make space in the FIFO
+    time.sleep_ms(200)
+
+    # send the final message, the receiver should get this one
+    can.send(b"aaaaa", ID_AFTER)
+
+    # Sender's RX FIFO should also be empty at this point
+    print("any", can.any(0))
+
+
+can = CAN(1, CAN.NORMAL, baudrate=500_000, sample_point=75)
diff --git a/tests/multi_pyb_can/rx_callback.py.exp b/tests/multi_pyb_can/rx_callback.py.exp
new file mode 100644
index 0000000000000..3ab197cc10319
--- /dev/null
+++ b/tests/multi_pyb_can/rx_callback.py.exp
@@ -0,0 +1,9 @@
+--- instance0 ---
+rx0 reason full
+rx0 reason overflow
+rxed_spam True
+(256, False, False, 0, b'aaaaa')
+any False
+--- instance1 ---
+(85, False, False, 0, b'overflow')
+any False
diff --git a/tests/multi_pyb_can/rx_filters.py b/tests/multi_pyb_can/rx_filters.py
new file mode 100644
index 0000000000000..22e5eb0364748
--- /dev/null
+++ b/tests/multi_pyb_can/rx_filters.py
@@ -0,0 +1,50 @@
+from pyb import CAN
+import time
+import errno
+
+# Test for the filtering capabilities for RX FIFO 0 and 1.
+
+
+# Receiver
+def instance0():
+    # Configure to receive standard frames (in a range) on FIFO 0
+    # and extended frames (in a range) on FIFO 1.
+    if hasattr(CAN, "MASK"):
+        # FD-CAN has independent filter banks for standard and extended IDs
+        can.setfilter(0, CAN.MASK, 0, (0x300, 0x700), extframe=False)
+        can.setfilter(0, CAN.MASK, 1, (0x3000, 0x7000), extframe=True)
+    else:
+        # pyb.CAN only supports MASK32 for extended ids
+        can.setfilter(0, CAN.MASK16, 0, (0x300, 0x700, 0x300, 0x700), extframe=False)
+        can.setfilter(1, CAN.MASK32, 1, (0x3000, 0x7000), extframe=True)
+
+    multitest.next()
+    multitest.wait("sender ready")
+    multitest.broadcast("receiver ready")
+    for i in range(3):
+        print(i)
+        print("fifo0", can.recv(0, timeout=200))
+        print("fifo1", can.recv(1, timeout=200))
+
+    try:
+        can.recv(0, timeout=100)  # should time out
+    except OSError as e:
+        assert e.errno == errno.ETIMEDOUT
+        print("Timed out as expected")
+
+
+# Sender
+def instance1():
+    multitest.next()
+    multitest.broadcast("sender ready")
+    multitest.wait("receiver ready")
+
+    for i in range(3):
+        print(i)
+        can.send(bytes([i, 3] * i), 0x345)
+        can.send(bytes([0xEE] * i), 0x3700 + i, extframe=True)
+        can.send(b"abcdef", 0x123)  # matches no filter, expect ACKed but not received
+        time.sleep_ms(5)  # avoid flooding either our or the receiver's FIFO
+
+
+can = CAN(1, CAN.NORMAL, baudrate=500_000, sample_point=75)
diff --git a/tests/multi_pyb_can/rx_filters.py.exp b/tests/multi_pyb_can/rx_filters.py.exp
new file mode 100644
index 0000000000000..65fbdf4b1b22b
--- /dev/null
+++ b/tests/multi_pyb_can/rx_filters.py.exp
@@ -0,0 +1,15 @@
+--- instance0 ---
+0
+fifo0 (837, False, False, 0, b'')
+fifo1 (14080, True, False, 0, b'')
+1
+fifo0 (837, False, False, 0, b'\x01\x03')
+fifo1 (14081, True, False, 0, b'\xee')
+2
+fifo0 (837, False, False, 0, b'\x02\x03\x02\x03')
+fifo1 (14082, True, False, 0, b'\xee\xee')
+Timed out as expected
+--- instance1 ---
+0
+1
+2
diff --git a/tests/net_hosted/asyncio_loopback.py b/tests/net_hosted/asyncio_loopback.py
index fd4674544ce71..03513ae6244d1 100644
--- a/tests/net_hosted/asyncio_loopback.py
+++ b/tests/net_hosted/asyncio_loopback.py
@@ -1,5 +1,12 @@
 # Test network loopback behaviour
 
+import sys
+
+# Only certain platforms can do TCP/IP loopback.
+if sys.platform not in ("darwin", "esp32", "linux"):
+    print("SKIP")
+    raise SystemExit
+
 try:
     import asyncio
 except ImportError:
diff --git a/tests/net_inet/mpycert.der b/tests/net_inet/mpycert.der
index 0b0eabc9bc813..ac22dcf9e8b88 100644
Binary files a/tests/net_inet/mpycert.der and b/tests/net_inet/mpycert.der differ
diff --git a/tests/net_inet/ssl_cert.py b/tests/net_inet/ssl_cert.py
index 3597b7855db4f..83d83e3f8e572 100644
--- a/tests/net_inet/ssl_cert.py
+++ b/tests/net_inet/ssl_cert.py
@@ -1,4 +1,3 @@
-import binascii
 import socket
 import ssl
 
@@ -6,48 +5,48 @@
 # This certificate was obtained from micropython.org using openssl:
 # $ openssl s_client -showcerts -connect micropython.org:443 </dev/null 2>/dev/null
 # The certificate is from Let's Encrypt:
-# 1 s:C=US, O=Let's Encrypt, CN=R11
+# 1 s:C=US, O=Let's Encrypt, CN=R10
 #   i:C=US, O=Internet Security Research Group, CN=ISRG Root X1
-#   a:PKEY: rsaEncryption, 2048 (bit); sigalg: RSA-SHA256
+#   a:PKEY: RSA, 2048 (bit); sigalg: sha256WithRSAEncryption
 #   v:NotBefore: Mar 13 00:00:00 2024 GMT; NotAfter: Mar 12 23:59:59 2027 GMT
-# Copy PEM content to a file (certmpy.pem) and convert to DER e.g.
-# $ openssl x509 -in certmpy.pem -out certmpy.der -outform DER
-# Then convert to hex format, eg using binascii.hexlify(data).
+# Copy PEM content to a file (mpycert.pem) and convert to DER e.g.
+# $ openssl x509 -in mpycert.pem -out mpycert.der -outform DER
+# Then convert to hex format using: for i in range(0,len(data),40):print(data[i:i+40].hex())
 
-ca_cert_chain = binascii.unhexlify(
-    b"30820506308202eea0030201020211008a7d3e13d62f30ef2386bd29076b34f8300d06092a864886"
-    b"f70d01010b0500304f310b300906035504061302555331293027060355040a1320496e7465726e65"
-    b"742053656375726974792052657365617263682047726f7570311530130603550403130c49535247"
-    b"20526f6f74205831301e170d3234303331333030303030305a170d3237303331323233353935395a"
-    b"3033310b300906035504061302555331163014060355040a130d4c6574277320456e637279707431"
-    b"0c300a0603550403130352313130820122300d06092a864886f70d01010105000382010f00308201"
-    b"0a0282010100ba87bc5c1b0039cbca0acdd46710f9013ca54ea561cb26ca52fb1501b7b928f5281e"
-    b"ed27b324183967090c08ece03ab03b770ebdf3e53954410c4eae41d69974de51dbef7bff58bda8b7"
-    b"13f6de31d5f272c9726a0b8374959c4600641499f3b1d922d9cda892aa1c267a3ffeef58057b0895"
-    b"81db710f8efbe33109bb09be504d5f8f91763d5a9d9e83f2e9c466b3e106664348188065a037189a"
-    b"9b843297b1b2bdc4f815009d2788fbe26317966c9b27674bc4db285e69c279f0495ce02450e1c4bc"
-    b"a105ac7b406d00b4c2413fa758b82fc55c9ba5bb099ef1feebb08539fda80aef45c478eb652ac2cf"
-    b"5f3cdee35c4d1bf70b272baa0b4277534f796a1d87d90203010001a381f83081f5300e0603551d0f"
-    b"0101ff040403020186301d0603551d250416301406082b0601050507030206082b06010505070301"
-    b"30120603551d130101ff040830060101ff020100301d0603551d0e04160414c5cf46a4eaf4c3c07a"
-    b"6c95c42db05e922f26e3b9301f0603551d2304183016801479b459e67bb6e5e40173800888c81a58"
-    b"f6e99b6e303206082b0601050507010104263024302206082b060105050730028616687474703a2f"
-    b"2f78312e692e6c656e63722e6f72672f30130603551d20040c300a3008060667810c010201302706"
-    b"03551d1f0420301e301ca01aa0188616687474703a2f2f78312e632e6c656e63722e6f72672f300d"
-    b"06092a864886f70d01010b050003820201004ee2895d0a031c9038d0f51ff9715cf8c38fb237887a"
-    b"6fb0251fedbeb7d886068ee90984cd72bf81f3fccacf5348edbdf66942d4a5113e35c813b2921d05"
-    b"5fea2ed4d8f849c3adf599969cef26d8e1b4240b48204dfcd354b4a9c621c8e1361bff77642917b9"
-    b"f04bef5deacd79d0bf90bfbe23b290da4aa9483174a9440be1e2f62d8371a4757bd294c10519461c"
-    b"b98ff3c47448252a0de5f5db43e2db939bb919b41f2fdf6a0e8f31d3630fbb29dcdd662c3fb01b67"
-    b"51f8413ce44db9acb8a49c6663f5ab85231dcc53b6ab71aedcc50171da36ee0a182a32fd09317c8f"
-    b"f673e79c9cb54a156a77825acfda8d45fe1f2a6405303e73c2c60cb9d63b634aab4603fe99c04640"
-    b"276063df503a0747d8154a9fea471f995a08620cb66c33084dd738ed482d2e0568ae805def4cdcd8"
-    b"20415f68f1bb5acde30eb00c31879b43de4943e1c8043fd13c1b87453069a8a9720e79121c31d83e"
-    b"2357dda74fa0f01c81d1771f6fd6d2b9a8b3031681394b9f55aed26ae4b3bfeaa5d59f4ba3c9d63b"
-    b"72f34af654ab0cfc38f76080df6e35ca75a154e42fbc6e17c91aa537b5a29abaecf4c075464f77a8"
-    b"e8595691662d6ede2981d6a697055e6445be2cceea644244b0c34fadf0b4dc03ca999b098295820d"
-    b"638a66f91972f8d5b98910e289980935f9a21cbe92732374e99d1fd73b4a9a845810c2f3a7e235ec"
-    b"7e3b45ce3046526bc0c0"
+ca_cert_chain = bytes.fromhex(
+    "30820505308202eda00302010202104ba85293f79a2fa273064ba8048d75d0300d06092a864886f7"
+    "0d01010b0500304f310b300906035504061302555331293027060355040a1320496e7465726e6574"
+    "2053656375726974792052657365617263682047726f7570311530130603550403130c4953524720"
+    "526f6f74205831301e170d3234303331333030303030305a170d3237303331323233353935395a30"
+    "33310b300906035504061302555331163014060355040a130d4c6574277320456e6372797074310c"
+    "300a0603550403130352313030820122300d06092a864886f70d01010105000382010f003082010a"
+    "0282010100cf57e5e6c45412edb447fec92758764650288c1d3e88df059dd5b51829bdddb55abffa"
+    "f6cea3beaf00214b625a5a3c012fc55803f689ff8e1143ebc1b5e01407968f6f1fd7e7ba81390975"
+    "65b7c2af185b372628e7a3f4072b6d1affab58bc95ae40ffe9cb57c4b55b7f780d1861bc17e754c6"
+    "bb4991cd6e18d18085eea66536bc74eabc504ceafc21f338169394bab0d36b3806cd16127aca5275"
+    "c8ad76b2c29c5d98455c6f617bc62dee3c13528601d957e6381cdf8db51f92919ae74a1ccc45a872"
+    "55f0b0e6a307ecfda71b669e3f488b71847158c93afaef5ef25b442b3c74e78fb247c1076acd9ab7"
+    "0d96f712812651540aec61f6f7f5e2f28ac8950d8d0203010001a381f83081f5300e0603551d0f01"
+    "01ff040403020186301d0603551d250416301406082b0601050507030206082b0601050507030130"
+    "120603551d130101ff040830060101ff020100301d0603551d0e04160414bbbcc347a5e4bca9c6c3"
+    "a4720c108da235e1c8e8301f0603551d2304183016801479b459e67bb6e5e40173800888c81a58f6"
+    "e99b6e303206082b0601050507010104263024302206082b060105050730028616687474703a2f2f"
+    "78312e692e6c656e63722e6f72672f30130603551d20040c300a3008060667810c01020130270603"
+    "551d1f0420301e301ca01aa0188616687474703a2f2f78312e632e6c656e63722e6f72672f300d06"
+    "092a864886f70d01010b0500038202010092b1e74137eb799d81e6cde225e13a20e9904495a3815c"
+    "cfc35dfdbda070d5b19628220bd2f228cf0ce7d4e6438c24221dc14292d109af9f4bf4c8704f2016"
+    "b15add01f61ff81f616b1427b0728d63aeeee2ce4bcf37ddbba3d4cde7ad50adbdbfe3ec3e623670"
+    "9931a7e88dddea62e212aef59cd43d2c0caad09c79beea3d5c446e9631635a7dd67e4f24a04b057f"
+    "5e6fd2d4ea5f334b13d657b6cade51b85da3098274fdc7789eb3b9ac16da4a2b96c3b68b628ff974"
+    "19a29e03dee96f9bb00fd2a05af6855cc204b7c8d54e32c4bf045dbc29f6f7818f0c5d3c53c94090"
+    "8bfbb60865b9a421d509e51384843782ce1028fc76c206257a46524dda5372a4273f6270acbe6948"
+    "00fb670fdb5ba1e8d703212dd7c9f69942398343df770a1208f125d6ba9419541888a5c58ee11a99"
+    "93796bec1cf93140b0cc3200df9f5ee7b492ab9082918d0de01e95ba593b2e4b5fc2b74635523906"
+    "c0bdaaac52c122a0449799f70ca021a7a16c714716170168c0caa62665047cb3aec9e79455c26f9b"
+    "3c1ca9f92ec5201af076e0beec18d64fd825fb7611e8bfe6210fe8e8ccb5b6a7d5b8f79f41cf6122"
+    "466a83b668972e7cea4e95db23eb2ec82b2884a460e949f4442e3bf9ca625701e25d9016f9c9fc7a"
+    "23488ea6d58172f128fa5dcefbed4e738f942ed241949899dba7af705ff5befb0220bf66276cb4ad"
+    "fa75120b2b3ece039e"
 )
 
 
diff --git a/tests/net_inet/test_sslcontext_client.py b/tests/net_inet/test_sslcontext_client.py
index 30ec0ac7c83fc..119a42721fa3f 100644
--- a/tests/net_inet/test_sslcontext_client.py
+++ b/tests/net_inet/test_sslcontext_client.py
@@ -5,14 +5,12 @@
 # This certificate was obtained from micropython.org using openssl:
 # $ openssl s_client -showcerts -connect micropython.org:443 </dev/null 2>/dev/null
 # The certificate is from Let's Encrypt:
-# 1 s:C=US, O=Let's Encrypt, CN=R11
+# 1 s:C=US, O=Let's Encrypt, CN=R10
 #   i:C=US, O=Internet Security Research Group, CN=ISRG Root X1
-#   a:PKEY: rsaEncryption, 2048 (bit); sigalg: RSA-SHA256
+#   a:PKEY: RSA, 2048 (bit); sigalg: sha256WithRSAEncryption
 #   v:NotBefore: Mar 13 00:00:00 2024 GMT; NotAfter: Mar 12 23:59:59 2027 GMT
-# Copy PEM content to a file (certmpy.pem) and convert to DER e.g.
-# $ openssl x509 -in certmpy.pem -out certmpy.der -outform DER
-# Then convert to hex format, eg using binascii.hexlify(data).
-
+# Copy PEM content to a file (mpycert.pem) and convert to DER e.g.
+# $ openssl x509 -in mpycert.pem -out mpycert.der -outform DER
 
 ca_cert_chain = "mpycert.der"
 try:
diff --git a/tests/ports/alif_hardware/flash_test.py b/tests/ports/alif_hardware/flash_test.py
new file mode 100644
index 0000000000000..5be3fc2d02f3e
--- /dev/null
+++ b/tests/ports/alif_hardware/flash_test.py
@@ -0,0 +1,149 @@
+# MIT license; Copyright (c) 2024 OpenMV LLC.
+#
+# Note: this test completely erases the filesystem!
+# It is intended to be run manually.
+
+import alif
+import hashlib
+import os
+import sys
+import time
+import vfs
+
+hash_algo = "sha256"
+
+
+def flash_make_filesystem():
+    try:
+        vfs.umount("/flash")
+    except:
+        pass
+    bdev = alif.Flash()
+    vfs.VfsFat.mkfs(bdev)
+    vfs.mount(vfs.VfsFat(bdev), "/flash")
+    sys.path.append("/flash")
+    sys.path.append("/flash/lib")
+    os.chdir("/flash")
+
+
+def flash_block_test():
+    try:
+        vfs.umount("/flash")
+    except:
+        pass
+    dev = alif.Flash()
+
+    data512 = os.urandom(512)
+    buf512 = bytearray(512)
+    block_numbers = tuple(range(32)) + tuple(range(250, 266))
+
+    print("Block read/write integrity: ", end="")
+    ok = True
+    for block_n in block_numbers:
+        dev.writeblocks(block_n, data512)
+        dev.readblocks(block_n, buf512)
+        if buf512 != data512:
+            ok = False
+    print(ok)
+
+    print("Block read back integrity: ", end="")
+    ok = True
+    for block_n in block_numbers:
+        dev.readblocks(block_n, buf512)
+        if buf512 != data512:
+            ok = False
+    print(ok)
+
+    N = 16 * 1024
+    data_big = os.urandom(N)
+    t0 = time.ticks_us()
+    dev.writeblocks(0, data_big)
+    dt = time.ticks_diff(time.ticks_us(), t0)
+    print(f"Block write speed: {len(data_big) / 1024 / dt * 1_000_000} KiB/sec")
+
+    buf_big = bytearray(N)
+    t0 = time.ticks_us()
+    dev.readblocks(0, buf_big)
+    dt = time.ticks_diff(time.ticks_us(), t0)
+    print(f"Block read speed:  {len(buf_big) / 1024 / dt * 1_000_000} KiB/sec")
+
+    if buf_big != data_big:
+        raise RuntimeError("big block read-back failed")
+
+    try:
+        import uctypes
+
+        xip = memoryview(dev)
+    except:
+        xip = None
+    if xip is not None:
+        t0 = time.ticks_us()
+        buf_big[:] = xip[: len(buf_big)]
+        dt = time.ticks_diff(time.ticks_us(), t0)
+        print(f"XIP read speed:    {len(buf_big) / 1024 / dt * 1_000_000} KiB/sec")
+
+        if buf_big != data_big:
+            raise RuntimeError("XIP read-back failed")
+        for i in range(len(buf_big)):
+            if xip[i] != data_big[i]:
+                raise RuntimeError("XIP byte-wise read-back failed")
+
+
+def flash_write_verify(path, size=1024 * 1024, block_size=1024):
+    hash_sum = getattr(hashlib, hash_algo)()
+    block_count = size // block_size
+
+    print("-" * 16)
+    print(f"Writing file {size=} {block_size=}")
+    t0 = time.ticks_ms()
+    total_size = 0
+    with open(path, "wb") as file:
+        for i in range(block_count):
+            buf = os.urandom(block_size)
+            # Update digest
+            hash_sum.update(buf)
+            total_size += file.write(buf)
+            if i % (block_count // 16) == 0:
+                print(f"{i}/{block_count}", end="\r")
+    dt = time.ticks_diff(time.ticks_ms(), t0)
+    print(f"Flash write finished:       {total_size / 1024 / dt * 1000} KiB/sec")
+    digest = hash_sum.digest()
+
+    print("Reading file... ", end="")
+    hash_sum = getattr(hashlib, hash_algo)()
+    buf = bytearray(block_size)
+    t0 = time.ticks_ms()
+    total_size = 0
+    with open(path, "rb") as file:
+        for i in range(block_count):
+            total_size += file.readinto(buf)
+    dt = time.ticks_diff(time.ticks_ms(), t0)
+    print(f"finished:   {total_size / 1024 / dt * 1000} KiB/sec")
+
+    print("Verifying file... ", end="")
+    hash_sum = getattr(hashlib, hash_algo)()
+    t0 = time.ticks_ms()
+    total_size = 0
+    with open(path, "rb") as file:
+        for i in range(block_count):
+            buf = file.read(block_size)
+            total_size += len(buf)
+            # Update digest
+            hash_sum.update(buf)
+    dt = time.ticks_diff(time.ticks_ms(), t0)
+    print(f"finished: {total_size / 1024 / dt * 1000} KiB/sec; ", end="")
+
+    if digest != hash_sum.digest():
+        raise RuntimeError(f"{hash_algo} checksum verify failed")
+
+    print(f"{hash_algo} checksum verified")
+
+
+if __name__ == "__main__":
+    flash_block_test()
+    flash_make_filesystem()
+    flash_write_verify("test0.bin", size=64 * 1024, block_size=1024)
+    flash_write_verify("test1.bin", size=128 * 1024, block_size=1024)
+    flash_write_verify("test2.bin", size=64 * 1024, block_size=2048)
+    flash_write_verify("test4.bin", size=256 * 1024, block_size=4096)
+    flash_write_verify("test4.bin", size=512 * 1024, block_size=16384)
diff --git a/tests/ports/cc3200/pin.py b/tests/ports/cc3200/pin.py
index 43537bba5ce07..d7b0fa976cd2a 100644
--- a/tests/ports/cc3200/pin.py
+++ b/tests/ports/cc3200/pin.py
@@ -3,6 +3,7 @@
 pull up or pull down connected.
 GP12 and GP17 must be connected together
 """
+
 from machine import Pin
 import os
 
diff --git a/tests/ports/esp32/esp32_nvs.py b/tests/ports/esp32/esp32_nvs.py
index fd8b152ca71d8..e6c308cde2f30 100644
--- a/tests/ports/esp32/esp32_nvs.py
+++ b/tests/ports/esp32/esp32_nvs.py
@@ -4,7 +4,7 @@
 
 nvs = NVS("mp-test")
 
-# test setting and gettin an integer kv
+# test setting and getting an integer kv
 nvs.set_i32("key1", 1234)
 print(nvs.get_i32("key1"))
 nvs.set_i32("key2", -503)
diff --git a/tests/ports/rp2/rp2_dma.py b/tests/ports/rp2/rp2_dma.py
index 62ec1dcf24d14..436e5ee48ec5b 100644
--- a/tests/ports/rp2/rp2_dma.py
+++ b/tests/ports/rp2/rp2_dma.py
@@ -4,103 +4,149 @@
 import time
 import machine
 import rp2
+import unittest
 
 is_rp2350 = "RP2350" in sys.implementation._machine
 
-src = bytes(i & 0xFF for i in range(16 * 1024))
-
-print("# test basic usage")
-
-dma = rp2.DMA()
-
-# Test printing.
-print(dma)
-
-# Test pack_ctrl/unpack_ctrl.
-ctrl_dict = rp2.DMA.unpack_ctrl(dma.pack_ctrl())
-if is_rp2350:
-    for entry in ("inc_read_rev", "inc_write_rev"):
-        assert entry in ctrl_dict
-        del ctrl_dict[entry]
-for key, value in sorted(ctrl_dict.items()):
-    print(key, value)
-
-# Test register access.
-dma.read = 0
-dma.write = 0
-dma.count = 0
-dma.ctrl = dma.pack_ctrl()
-print(dma.read, dma.write, dma.count, dma.ctrl & 0x01F, dma.channel, dma.registers)
-dma.close()
-
-# Test closing when already closed.
-dma.close()
-
-# Test using when closed.
-try:
-    dma.active()
-    assert False
-except ValueError:
-    print("ValueError")
-
-# Test simple memory copy.
-print("# test memory copy")
-dest = bytearray(1024)
-dma = rp2.DMA()
-dma.config(read=src, write=dest, count=len(dest) // 4, ctrl=dma.pack_ctrl(), trigger=False)
-print(not any(dest))
-dma.active(True)
-while dma.active():
-    pass
-print(dest[:8], dest[-8:])
-dma.close()
-
-
-# Test time taken for a large memory copy.
-def run_and_time_dma(dma):
-    ticks_us = time.ticks_us
-    irq_state = machine.disable_irq()
-    t0 = ticks_us()
-    dma.active(True)
-    while dma.active():
-        pass
-    t1 = ticks_us()
-    machine.enable_irq(irq_state)
-    return time.ticks_diff(t1, t0)
-
-
-print("# test timing")
-dest = bytearray(16 * 1024)
-dma = rp2.DMA()
-dma.read = src
-dma.write = dest
-dma.count = len(dest) // 4
-dma.ctrl = dma.pack_ctrl()
-dt = run_and_time_dma(dma)
-expected_dt_range = range(40, 70) if is_rp2350 else range(70, 125)
-print(dt in expected_dt_range)
-print(dest[:8], dest[-8:])
-dma.close()
-
-# Test using .config(trigger=True).
-print("# test immediate trigger")
-dest = bytearray(1024)
-dma = rp2.DMA()
-dma.config(read=src, write=dest, count=len(dest) // 4, ctrl=dma.pack_ctrl(), trigger=True)
-while dma.active():
-    pass
-print(dest[:8], dest[-8:])
-dma.close()
-
-# Test the DMA.irq() method.
-print("# test irq")
-dest = bytearray(1024)
-dma = rp2.DMA()
-dma.irq(lambda dma: print("irq fired", dma.irq().flags()))
-dma.config(
-    read=src, write=dest, count=len(dest) // 4, ctrl=dma.pack_ctrl(irq_quiet=0), trigger=True
-)
-while dma.active():
-    pass
-print(dest[:8], dest[-8:])
-dma.close()
+SRC = bytes(i & 0xFF for i in range(16 * 1024))
+
+
+class Test(unittest.TestCase):
+    def setUp(self):
+        self.dma = rp2.DMA()
+
+    def tearDown(self):
+        self.dma.close()
+
+    def test_printing(self):
+        dma = self.dma
+        self.assertEqual(str(dma), "DMA({})".format(dma.channel))
+
+    def test_pack_unpack_ctrl(self):
+        dma = self.dma
+        ctrl_dict = rp2.DMA.unpack_ctrl(dma.pack_ctrl())
+        if is_rp2350:
+            self.assertEqual(len(ctrl_dict), 18)
+            self.assertTrue("inc_read_rev" in ctrl_dict)
+            self.assertTrue("inc_write_rev" in ctrl_dict)
+        else:
+            self.assertEqual(len(ctrl_dict), 16)
+        self.assertEqual(ctrl_dict["ahb_err"], 0)
+        self.assertEqual(ctrl_dict["bswap"], 0)
+        self.assertEqual(ctrl_dict["busy"], 0)
+        self.assertEqual(ctrl_dict["chain_to"], dma.channel)
+        self.assertEqual(ctrl_dict["enable"], 1)
+        self.assertEqual(ctrl_dict["high_pri"], 0)
+        self.assertEqual(ctrl_dict["inc_read"], 1)
+        self.assertEqual(ctrl_dict["inc_write"], 1)
+        self.assertEqual(ctrl_dict["irq_quiet"], 1)
+        self.assertEqual(ctrl_dict["read_err"], 0)
+        self.assertEqual(ctrl_dict["ring_sel"], 0)
+        self.assertEqual(ctrl_dict["ring_size"], 0)
+        self.assertEqual(ctrl_dict["size"], 2)
+        self.assertEqual(ctrl_dict["sniff_en"], 0)
+        self.assertEqual(ctrl_dict["treq_sel"], 63)
+        self.assertEqual(ctrl_dict["write_err"], 0)
+
+    def test_register_access(self):
+        dma = self.dma
+        dma.read = 0
+        dma.write = 0
+        dma.count = 0
+        dma.ctrl = dma.pack_ctrl()
+        self.assertEqual(dma.read, 0)
+        self.assertEqual(dma.write, 0)
+        self.assertEqual(dma.count, 0)
+        self.assertEqual(dma.ctrl & 0x01F, 25)
+        self.assertIn(dma.channel, range(16))
+        self.assertIsInstance(dma.registers, memoryview)
+
+    def test_close(self):
+        dma = self.dma
+        dma.close()
+
+        # Test closing when already closed.
+        dma.close()
+
+        # Test using when closed.
+        with self.assertRaises(ValueError):
+            dma.active()
+
+    def test_simple_memory_copy(self):
+        dma = self.dma
+        dest = bytearray(1024)
+        dma.config(read=SRC, write=dest, count=len(dest) // 4, ctrl=dma.pack_ctrl(), trigger=False)
+        self.assertFalse(any(dest))
+        dma.active(True)
+        while dma.active():
+            pass
+        self.assertEqual(dest[:8], SRC[:8])
+        self.assertEqual(dest[-8:], SRC[-8:])
+
+    def test_time_taken_for_large_memory_copy(self):
+        def run_and_time_dma(dma):
+            ticks_us = time.ticks_us
+            active = dma.active
+            irq_state = machine.disable_irq()
+            t0 = ticks_us()
+            active(True)
+            while active():
+                pass
+            t1 = ticks_us()
+            machine.enable_irq(irq_state)
+            return time.ticks_diff(t1, t0)
+
+        num_average = 10
+        dt_sum = 0
+        for _ in range(num_average):
+            dma = self.dma
+            dest = bytearray(16 * 1024)
+            dma.read = SRC
+            dma.write = dest
+            dma.count = len(dest) // 4
+            dma.ctrl = dma.pack_ctrl()
+            dt_sum += run_and_time_dma(dma)
+            self.assertEqual(dest[:8], SRC[:8])
+            self.assertEqual(dest[-8:], SRC[-8:])
+            self.tearDown()
+            self.setUp()
+        dt = dt_sum // num_average
+        self.assertIn(dt, range(30, 80))
+
+    def test_config_trigger(self):
+        # Test using .config(trigger=True) to start DMA immediately.
+        dma = self.dma
+        dest = bytearray(1024)
+        dma.config(read=SRC, write=dest, count=len(dest) // 4, ctrl=dma.pack_ctrl(), trigger=True)
+        while dma.active():
+            pass
+        self.assertEqual(dest[:8], SRC[:8])
+        self.assertEqual(dest[-8:], SRC[-8:])
+
+    def test_irq(self):
+        def callback(dma):
+            nonlocal irq_flags
+            print("irq fired")
+            irq_flags = dma.irq().flags()
+
+        dma = self.dma
+        irq_flags = None
+        dest = bytearray(1024)
+        dma.irq(callback)
+        dma.config(
+            read=SRC,
+            write=dest,
+            count=len(dest) // 4,
+            ctrl=dma.pack_ctrl(irq_quiet=0),
+            trigger=True,
+        )
+        while dma.active():
+            pass
+        time.sleep_ms(1)  # when running as native code, give the scheduler a chance to run
+        self.assertEqual(irq_flags, 1)
+        self.assertEqual(dest[:8], SRC[:8])
+        self.assertEqual(dest[-8:], SRC[-8:])
+
+
+if __name__ == "__main__":
+    unittest.main()
diff --git a/tests/ports/rp2/rp2_dma.py.exp b/tests/ports/rp2/rp2_dma.py.exp
deleted file mode 100644
index 6fad5429b291d..0000000000000
--- a/tests/ports/rp2/rp2_dma.py.exp
+++ /dev/null
@@ -1,31 +0,0 @@
-# test basic usage
-DMA(0)
-ahb_err 0
-bswap 0
-busy 0
-chain_to 0
-enable 1
-high_pri 0
-inc_read 1
-inc_write 1
-irq_quiet 1
-read_err 0
-ring_sel 0
-ring_size 0
-size 2
-sniff_en 0
-treq_sel 63
-write_err 0
-0 0 0 25 0 <memoryview>
-ValueError
-# test memory copy
-True
-bytearray(b'\x00\x01\x02\x03\x04\x05\x06\x07') bytearray(b'\xf8\xf9\xfa\xfb\xfc\xfd\xfe\xff')
-# test timing
-True
-bytearray(b'\x00\x01\x02\x03\x04\x05\x06\x07') bytearray(b'\xf8\xf9\xfa\xfb\xfc\xfd\xfe\xff')
-# test immediate trigger
-bytearray(b'\x00\x01\x02\x03\x04\x05\x06\x07') bytearray(b'\xf8\xf9\xfa\xfb\xfc\xfd\xfe\xff')
-# test irq
-irq fired 1
-bytearray(b'\x00\x01\x02\x03\x04\x05\x06\x07') bytearray(b'\xf8\xf9\xfa\xfb\xfc\xfd\xfe\xff')
diff --git a/tests/ports/rp2/rp2_lightsleep_thread.py b/tests/ports/rp2/rp2_lightsleep_thread.py
new file mode 100644
index 0000000000000..494ead422315b
--- /dev/null
+++ b/tests/ports/rp2/rp2_lightsleep_thread.py
@@ -0,0 +1,67 @@
+# Verify that a thread running on CPU1 can go to lightsleep
+# and wake up in the expected timeframe
+import _thread
+import time
+import unittest
+from machine import lightsleep
+
+N_SLEEPS = 5
+SLEEP_MS = 250
+
+IDEAL_RUNTIME = N_SLEEPS * SLEEP_MS
+MAX_RUNTIME = (N_SLEEPS + 1) * SLEEP_MS
+MAX_DELTA = 20
+
+
+class LightSleepInThread(unittest.TestCase):
+    def thread_entry(self, is_thread=True):
+        for _ in range(N_SLEEPS):
+            lightsleep(SLEEP_MS)
+        if is_thread:
+            self.thread_done = True
+
+    def elapsed_ms(self):
+        return time.ticks_diff(time.ticks_ms(), self.t0)
+
+    def setUp(self):
+        self.thread_done = False
+        self.t0 = time.ticks_ms()
+
+    def test_cpu0_busy(self):
+        _thread.start_new_thread(self.thread_entry, ())
+        # CPU0 is busy-waiting not asleep itself
+        while not self.thread_done:
+            self.assertLessEqual(self.elapsed_ms(), MAX_RUNTIME)
+        self.assertAlmostEqual(self.elapsed_ms(), IDEAL_RUNTIME, delta=MAX_DELTA)
+
+    def test_cpu0_sleeping(self):
+        _thread.start_new_thread(self.thread_entry, ())
+        time.sleep_ms(MAX_RUNTIME)
+        self.assertTrue(self.thread_done)
+        self.assertAlmostEqual(self.elapsed_ms(), MAX_RUNTIME, delta=MAX_DELTA)
+
+    def test_cpu0_also_lightsleep(self):
+        _thread.start_new_thread(self.thread_entry, ())
+        time.sleep_ms(50)  # account for any delay in starting the thread
+        self.thread_entry(False)  # does the same lightsleep loop, doesn't set the done flag
+        while not self.thread_done:
+            time.sleep_ms(10)
+        #
+        # Only one thread can actually be in lightsleep at a time to avoid
+        # races, but otherwise the behaviour when both threads call lightsleep()
+        # is unspecified.
+        #
+        # Currently, the other thread will return immediately if one is already
+        # in lightsleep. Therefore, runtime can be between IDEAL_RUNTIME and
+        # IDEAL_RUNTIME * 2 depending on how many times the calls to lightsleep() race
+        # each other.
+        #
+        # Note this test case is really only here to ensure that the rp2 hasn't
+        # hung or failed to sleep at all - not to verify any correct behaviour
+        # when there's a race to call lightsleep().
+        self.assertGreaterEqual(self.elapsed_ms(), IDEAL_RUNTIME - MAX_DELTA)
+        self.assertLessEqual(self.elapsed_ms(), IDEAL_RUNTIME * 2 + MAX_DELTA)
+
+
+if __name__ == "__main__":
+    unittest.main()
diff --git a/tests/ports/rp2/rp2_machine_idle.py b/tests/ports/rp2/rp2_machine_idle.py
index 3135110b82000..f9c28284782f8 100644
--- a/tests/ports/rp2/rp2_machine_idle.py
+++ b/tests/ports/rp2/rp2_machine_idle.py
@@ -1,4 +1,3 @@
-import sys
 import machine
 import time
 
@@ -18,11 +17,6 @@
 # Verification uses the average idle time, as individual iterations will always
 # have outliers due to interrupts, scheduler, etc.
 
-# RP2350 currently fails this test because machine.idle() resumes immediately.
-if "RP2350" in sys.implementation._machine:
-    print("SKIP")
-    raise SystemExit
-
 ITERATIONS = 500
 total = 0
 
diff --git a/tests/ports/unix/extra_coverage.py.exp b/tests/ports/unix/extra_coverage.py.exp
index 5ff947e883d37..19b32f1c9d945 100644
--- a/tests/ports/unix/extra_coverage.py.exp
+++ b/tests/ports/unix/extra_coverage.py.exp
@@ -122,6 +122,13 @@ unlocked
 KeyboardInterrupt: 
 KeyboardInterrupt: 
 10
+loop
+scheduled function
+loop
+scheduled function
+loop
+scheduled function
+scheduled function
 # ringbuf
 99 0
 98 1
diff --git a/tests/run-natmodtests.py b/tests/run-natmodtests.py
index b858989daa434..073e0b053e699 100755
--- a/tests/run-natmodtests.py
+++ b/tests/run-natmodtests.py
@@ -73,6 +73,7 @@ def open(self, path, mode):
     return __File()
 vfs.mount(__FS(), '/__remote')
 sys.path.insert(0, '/__remote')
+{import_prelude}
 sys.modules['{}'] = __import__('__injected')
 """
 
@@ -133,6 +134,13 @@ def detect_architecture(target):
 
 
 def run_tests(target_truth, target, args, stats, resolved_arch):
+    global injected_import_hook_code
+
+    prelude = ""
+    if args.begin:
+        prelude = args.begin.read()
+    injected_import_hook_code = injected_import_hook_code.replace("{import_prelude}", prelude)
+
     for test_file in args.files:
         # Find supported test
         test_file_basename = os.path.basename(test_file)
@@ -212,6 +220,13 @@ def main():
     cmd_parser.add_argument(
         "-a", "--arch", choices=AVAILABLE_ARCHS, help="override native architecture of the target"
     )
+    cmd_parser.add_argument(
+        "-b",
+        "--begin",
+        type=argparse.FileType("rt"),
+        default=None,
+        help="prologue python file to execute before module import",
+    )
     cmd_parser.add_argument("files", nargs="*", help="input test files")
     args = cmd_parser.parse_args()
 
diff --git a/tests/run-tests.py b/tests/run-tests.py
index b108b16395074..cb7a8b7705647 100755
--- a/tests/run-tests.py
+++ b/tests/run-tests.py
@@ -105,14 +105,11 @@ def open(self, path, mode):
 # These are tests that are difficult to detect that they should not be run on the given target.
 platform_tests_to_skip = {
     "esp8266": (
-        "micropython/viper_args.py",  # too large
-        "micropython/viper_binop_arith.py",  # too large
-        "misc/rge_sm.py",  # too large
+        "misc/rge_sm.py",  # incorrect values due to object representation C
     ),
     "minimal": (
         "basics/class_inplace_op.py",  # all special methods not supported
         "basics/subclass_native_init.py",  # native subclassing corner cases not support
-        "misc/rge_sm.py",  # too large
         "micropython/opt_level.py",  # don't assume line numbers are stored
     ),
     "nrf": (
@@ -162,7 +159,11 @@ def open(self, path, mode):
         "extmod/asyncio_new_event_loop.py",
         "extmod/asyncio_threadsafeflag.py",
         "extmod/asyncio_wait_for_fwd.py",
+        "extmod/asyncio_event_queue.py",
+        "extmod/asyncio_iterator_event.py",
+        "extmod/asyncio_wait_for_linked_task.py",
         "extmod/binascii_a2b_base64.py",
+        "extmod/deflate_compress_memory_error.py",  # tries to allocate unlimited memory
         "extmod/re_stack_overflow.py",
         "extmod/time_res.py",
         "extmod/vfs_posix.py",
@@ -268,22 +269,17 @@ def detect_test_platform(pyb, args):
     print()
 
 
-def prepare_script_for_target(args, *, script_filename=None, script_text=None, force_plain=False):
+def prepare_script_for_target(args, *, script_text=None, force_plain=False):
     if force_plain or (not args.via_mpy and args.emit == "bytecode"):
-        if script_filename is not None:
-            with open(script_filename, "rb") as f:
-                script_text = f.read()
+        # A plain test to run as-is, no processing needed.
+        pass
     elif args.via_mpy:
         tempname = tempfile.mktemp(dir="")
         mpy_filename = tempname + ".mpy"
 
-        if script_filename is None:
-            script_filename = tempname + ".py"
-            cleanup_script_filename = True
-            with open(script_filename, "wb") as f:
-                f.write(script_text)
-        else:
-            cleanup_script_filename = False
+        script_filename = tempname + ".py"
+        with open(script_filename, "wb") as f:
+            f.write(script_text)
 
         try:
             subprocess.check_output(
@@ -299,8 +295,7 @@ def prepare_script_for_target(args, *, script_filename=None, script_text=None, f
             script_text = b"__buf=" + bytes(repr(f.read()), "ascii") + b"\n"
 
         rm_f(mpy_filename)
-        if cleanup_script_filename:
-            rm_f(script_filename)
+        rm_f(script_filename)
 
         script_text += bytes(injected_import_hook_code, "ascii")
     else:
@@ -311,9 +306,21 @@ def prepare_script_for_target(args, *, script_filename=None, script_text=None, f
 
 
 def run_script_on_remote_target(pyb, args, test_file, is_special):
-    had_crash, script = prepare_script_for_target(
-        args, script_filename=test_file, force_plain=is_special
-    )
+    with open(test_file, "rb") as f:
+        script = f.read()
+
+    # If the test is not a special test, prepend it with a print to indicate that it started.
+    # If the print does not execute this means that the test did not even start, eg it was
+    # too large for the target.
+    prepend_start_test = not is_special
+    if prepend_start_test:
+        if script.startswith(b"#"):
+            script = b"print('START TEST')" + script
+        else:
+            script = b"print('START TEST')\n" + script
+
+    had_crash, script = prepare_script_for_target(args, script_text=script, force_plain=is_special)
+
     if had_crash:
         return True, script
 
@@ -324,9 +331,19 @@ def run_script_on_remote_target(pyb, args, test_file, is_special):
     except pyboard.PyboardError as e:
         had_crash = True
         if not is_special and e.args[0] == "exception":
-            output_mupy = e.args[1] + e.args[2] + b"CRASH"
+            if prepend_start_test and e.args[1] == b"" and b"MemoryError" in e.args[2]:
+                output_mupy = b"SKIP-TOO-LARGE\n"
+            else:
+                output_mupy = e.args[1] + e.args[2] + b"CRASH"
         else:
             output_mupy = bytes(e.args[0], "ascii") + b"\nCRASH"
+
+    if prepend_start_test:
+        if output_mupy.startswith(b"START TEST\r\n"):
+            output_mupy = output_mupy.removeprefix(b"START TEST\r\n")
+        else:
+            had_crash = True
+
     return had_crash, output_mupy
 
 
@@ -470,7 +487,7 @@ def send_get(what):
     output_mupy = output_mupy.replace(b"\r\n", b"\n")
 
     # don't try to convert the output if we should skip this test
-    if had_crash or output_mupy in (b"SKIP\n", b"CRASH"):
+    if had_crash or output_mupy in (b"SKIP\n", b"SKIP-TOO-LARGE\n", b"CRASH"):
         return output_mupy
 
     # skipped special tests will output "SKIP" surrounded by other interpreter debug output
@@ -601,9 +618,7 @@ def run_script_on_remote_target(self, args, test_file, is_special):
 def run_tests(pyb, tests, args, result_dir, num_threads=1):
     test_count = ThreadSafeCounter()
     testcase_count = ThreadSafeCounter()
-    passed_count = ThreadSafeCounter()
-    failed_tests = ThreadSafeCounter([])
-    skipped_tests = ThreadSafeCounter([])
+    test_results = ThreadSafeCounter([])
 
     skip_tests = set()
     skip_native = False
@@ -842,13 +857,15 @@ def run_tests(pyb, tests, args, result_dir, num_threads=1):
         )  # native doesn't have proper traceback info
         skip_tests.add("micropython/schedule.py")  # native code doesn't check pending events
         skip_tests.add("stress/bytecode_limit.py")  # bytecode specific test
+        skip_tests.add("extmod/asyncio_event_queue.py")  # native can't run schedule
+        skip_tests.add("extmod/asyncio_iterator_event.py")  # native can't run schedule
 
     def run_one_test(test_file):
         test_file = test_file.replace("\\", "/")
         test_file_abspath = os.path.abspath(test_file).replace("\\", "/")
 
         if args.filters:
-            # Default verdict is the opposit of the first action
+            # Default verdict is the opposite of the first action
             verdict = "include" if args.filters[0][0] == "exclude" else "exclude"
             for action, pat in args.filters:
                 if pat.search(test_file):
@@ -890,7 +907,7 @@ def run_one_test(test_file):
 
         if skip_it:
             print("skip ", test_file)
-            skipped_tests.append(test_name)
+            test_results.append((test_name, test_file, "skip", ""))
             return
 
         # Run the test on the MicroPython target.
@@ -905,7 +922,11 @@ def run_one_test(test_file):
                 # start-up code (eg boot.py) when preparing to run the next test.
                 pyb.read_until(1, b"raw REPL; CTRL-B to exit\r\n")
             print("skip ", test_file)
-            skipped_tests.append(test_name)
+            test_results.append((test_name, test_file, "skip", ""))
+            return
+        elif output_mupy == b"SKIP-TOO-LARGE\n":
+            print("lrge ", test_file)
+            test_results.append((test_name, test_file, "skip", "too large"))
             return
 
         # Look at the output of the test to see if unittest was used.
@@ -988,7 +1009,7 @@ def run_one_test(test_file):
         # Print test summary, update counters, and save .exp/.out files if needed.
         if test_passed:
             print("pass ", test_file, extra_info)
-            passed_count.increment()
+            test_results.append((test_name, test_file, "pass", ""))
             rm_f(filename_expected)
             rm_f(filename_mupy)
         else:
@@ -996,12 +1017,24 @@ def run_one_test(test_file):
             if output_expected is not None:
                 with open(filename_expected, "wb") as f:
                     f.write(output_expected)
+            else:
+                rm_f(filename_expected)  # in case left over from previous failed run
             with open(filename_mupy, "wb") as f:
                 f.write(output_mupy)
-            failed_tests.append((test_name, test_file))
+            test_results.append((test_name, test_file, "fail", ""))
 
         test_count.increment()
 
+        # Print a note if this looks like it might have been a misfired unittest
+        if not uses_unittest and not test_passed:
+            with open(test_file, "r") as f:
+                if any(re.match("^import.+unittest", l) for l in f.readlines()):
+                    print(
+                        "NOTE: {} may be a unittest that doesn't run unittest.main()".format(
+                            test_file
+                        )
+                    )
+
     if pyb:
         num_threads = 1
 
@@ -1017,17 +1050,41 @@ def run_one_test(test_file):
             print(line)
         sys.exit(1)
 
+    test_results = test_results.value
+    passed_tests = list(r for r in test_results if r[2] == "pass")
+    skipped_tests = list(r for r in test_results if r[2] == "skip" and r[3] != "too large")
+    skipped_tests_too_large = list(
+        r for r in test_results if r[2] == "skip" and r[3] == "too large"
+    )
+    failed_tests = list(r for r in test_results if r[2] == "fail")
+
     print(
         "{} tests performed ({} individual testcases)".format(
             test_count.value, testcase_count.value
         )
     )
-    print("{} tests passed".format(passed_count.value))
+    print("{} tests passed".format(len(passed_tests)))
 
-    skipped_tests = sorted(skipped_tests.value)
     if len(skipped_tests) > 0:
-        print("{} tests skipped: {}".format(len(skipped_tests), " ".join(skipped_tests)))
-    failed_tests = sorted(failed_tests.value)
+        print(
+            "{} tests skipped: {}".format(
+                len(skipped_tests), " ".join(test[0] for test in skipped_tests)
+            )
+        )
+
+    if len(skipped_tests_too_large) > 0:
+        print(
+            "{} tests skipped because they are too large: {}".format(
+                len(skipped_tests_too_large), " ".join(test[0] for test in skipped_tests_too_large)
+            )
+        )
+
+    if len(failed_tests) > 0:
+        print(
+            "{} tests failed: {}".format(
+                len(failed_tests), " ".join(test[0] for test in failed_tests)
+            )
+        )
 
     # Serialize regex added by append_filter.
     def to_json(obj):
@@ -1037,21 +1094,20 @@ def to_json(obj):
 
     with open(os.path.join(result_dir, RESULTS_FILE), "w") as f:
         json.dump(
-            {"args": vars(args), "failed_tests": [test[1] for test in failed_tests]},
+            {
+                # The arguments passed on the command-line.
+                "args": vars(args),
+                # A list of all results of the form [(test, result, reason), ...].
+                "results": list(test[1:] for test in test_results),
+                # A list of failed tests.  This is deprecated, use the "results" above instead.
+                "failed_tests": [test[1] for test in failed_tests],
+            },
             f,
             default=to_json,
         )
 
-    if len(failed_tests) > 0:
-        print(
-            "{} tests failed: {}".format(
-                len(failed_tests), " ".join(test[0] for test in failed_tests)
-            )
-        )
-        return False
-
-    # all tests succeeded
-    return True
+    # Return True only if all tests succeeded.
+    return len(failed_tests) == 0
 
 
 class append_filter(argparse.Action):
@@ -1220,7 +1276,7 @@ def main():
         results_file = os.path.join(args.result_dir, RESULTS_FILE)
         if os.path.exists(results_file):
             with open(results_file, "r") as f:
-                tests = json.load(f)["failed_tests"]
+                tests = list(test[0] for test in json.load(f)["results"] if test[1] == "fail")
         else:
             tests = []
     elif len(args.files) == 0:
diff --git a/tests/unicode/unicode.py b/tests/unicode/unicode.py
index 072e049fde416..58d406e63eb2a 100644
--- a/tests/unicode/unicode.py
+++ b/tests/unicode/unicode.py
@@ -5,7 +5,7 @@
 
 # Test all three forms of Unicode escape, and
 # all blocks of UTF-8 byte patterns
-s = "a\xA9\xFF\u0123\u0800\uFFEE\U0001F44C"
+s = "a\xa9\xff\u0123\u0800\uffee\U0001f44c"
 for i in range(-len(s), len(s)):
     print("s[%d]: %s   %X" % (i, s[i], ord(s[i])))
     print("s[:%d]: %d chars, '%s'" % (i, len(s[:i]), s[:i]))
diff --git a/tools/ar_util.py b/tools/ar_util.py
new file mode 100644
index 0000000000000..b90d379031467
--- /dev/null
+++ b/tools/ar_util.py
@@ -0,0 +1,236 @@
+#!/usr/bin/env python3
+#
+# This file is part of the MicroPython project, http://micropython.org/
+#
+# The MIT License (MIT)
+#
+# Copyright (c) 2024 Volodymyr Shymanskyy
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+# THE SOFTWARE.
+
+import os
+import re
+import hashlib
+import functools
+import pickle
+
+from elftools.elf import elffile
+from collections import defaultdict
+
+try:
+    from ar import Archive
+except:
+    Archive = None
+
+
+class PickleCache:
+    def __init__(self, path, prefix=""):
+        self.path = path
+        self._get_fn = lambda key: os.path.join(path, prefix + key[:24])
+
+    def store(self, key, data):
+        os.makedirs(self.path, exist_ok=True)
+        # See also https://bford.info/cachedir/
+        cachedir_tag_path = os.path.join(self.path, "CACHEDIR.TAG")
+        if not os.path.exists(cachedir_tag_path):
+            with open(cachedir_tag_path, "w") as f:
+                f.write(
+                    "Signature: 8a477f597d28d172789f06886806bc55\n"
+                    "# This file is a cache directory tag created by MicroPython.\n"
+                    "# For information about cache directory tags see https://bford.info/cachedir/\n"
+                )
+        with open(self._get_fn(key), "wb") as f:
+            pickle.dump(data, f)
+
+    def load(self, key):
+        with open(self._get_fn(key), "rb") as f:
+            return pickle.load(f)
+
+
+def cached(key, cache):
+    def decorator(func):
+        @functools.wraps(func)
+        def wrapper(*args, **kwargs):
+            cache_key = key(*args, **kwargs)
+            try:
+                d = cache.load(cache_key)
+                if d["key"] != cache_key:
+                    raise Exception("Cache key mismatch")
+                return d["data"]
+            except Exception:
+                res = func(*args, **kwargs)
+                try:
+                    cache.store(
+                        cache_key,
+                        {
+                            "key": cache_key,
+                            "data": res,
+                        },
+                    )
+                except Exception:
+                    pass
+                return res
+
+        return wrapper
+
+    return decorator
+
+
+class CachedArFile:
+    def __init__(self, fn):
+        if not Archive:
+            raise RuntimeError("Please run 'pip install ar' to link .a files")
+        self.fn = fn
+        self._archive = Archive(open(fn, "rb"))
+        info = self.load_symbols()
+        self.objs = info["objs"]
+        self.symbols = info["symbols"]
+
+    def open(self, obj):
+        return self._archive.open(obj, "rb")
+
+    def _cache_key(self):
+        sha = hashlib.sha256()
+        with open(self.fn, "rb") as f:
+            for chunk in iter(lambda: f.read(4096), b""):
+                sha.update(chunk)
+        # Change this salt if the cache data format changes
+        sha.update(bytes.fromhex("00000000000000000000000000000001"))
+        return sha.hexdigest()
+
+    @cached(key=_cache_key, cache=PickleCache(path=".mpy_ld_cache", prefix="ar_"))
+    def load_symbols(self):
+        print("Loading", self.fn)
+        objs = defaultdict(lambda: {"def": set(), "undef": set(), "weak": set()})
+        symbols = {}
+        for entry in self._archive:
+            obj_name = entry.name
+            elf = elffile.ELFFile(self.open(obj_name))
+            symtab = elf.get_section_by_name(".symtab")
+            if not symtab:
+                continue
+
+            obj = objs[obj_name]
+
+            for symbol in symtab.iter_symbols():
+                sym_name = symbol.name
+                sym_bind = symbol["st_info"]["bind"]
+
+                if sym_bind in ("STB_GLOBAL", "STB_WEAK"):
+                    if symbol.entry["st_shndx"] != "SHN_UNDEF":
+                        obj["def"].add(sym_name)
+                        symbols[sym_name] = obj_name
+                    else:
+                        obj["undef"].add(sym_name)
+
+                    if sym_bind == "STB_WEAK":
+                        obj["weak"].add(sym_name)
+
+        return {"objs": dict(objs), "symbols": symbols}
+
+
+def resolve(archives, symbols):
+    resolved_objs = []  # Object files needed to resolve symbols
+    unresolved_symbols = set()
+    provided_symbols = {}  # Which symbol is provided by which object
+    symbol_stack = list(symbols)
+
+    # A helper function to handle symbol resolution from a particular object
+    def add_obj(archive, symbol):
+        obj_name = archive.symbols[symbol]
+        obj_info = archive.objs[obj_name]
+
+        obj_tuple = (archive, obj_name)
+        if obj_tuple in resolved_objs:
+            return  # Already processed this object
+
+        resolved_objs.append(obj_tuple)
+
+        # Add the symbols this object defines
+        for defined_symbol in obj_info["def"]:
+            if defined_symbol in provided_symbols and not defined_symbol.startswith(
+                "__x86.get_pc_thunk."
+            ):
+                if defined_symbol in obj_info["weak"]:
+                    continue
+                else:
+                    raise RuntimeError(f"Multiple definitions for {defined_symbol}")
+            provided_symbols[defined_symbol] = obj_name  # TODO: mark weak if needed
+
+        # Recursively add undefined symbols from this object
+        for undef_symbol in obj_info["undef"]:
+            if undef_symbol in obj_info["weak"]:
+                print(f"Skippping weak dependency: {undef_symbol}")
+                continue
+            if undef_symbol not in provided_symbols:
+                symbol_stack.append(undef_symbol)  # Add undefined symbol to resolve
+
+    while symbol_stack:
+        symbol = symbol_stack.pop(0)
+
+        if symbol in provided_symbols:
+            continue  # Symbol is already resolved
+
+        found = False
+        for archive in archives:
+            if symbol in archive.symbols:
+                add_obj(archive, symbol)
+                found = True
+                break
+
+        if not found:
+            unresolved_symbols.add(symbol)
+
+    return resolved_objs, list(unresolved_symbols)
+
+
+def expand_ld_script(fn):
+    # This function parses a subset of ld scripts
+    # Typically these are just groups of static lib references
+    group_pattern = re.compile(r"GROUP\s*\(\s*([^\)]+)\s*\)", re.MULTILINE)
+    output_format_pattern = re.compile(r"OUTPUT_FORMAT\s*\(\s*([^\)]+)\s*\)", re.MULTILINE)
+    comment_pattern = re.compile(r"/\*.*?\*/", re.MULTILINE | re.DOTALL)
+
+    with open(fn, "r") as f:
+        content = f.read()
+        content = comment_pattern.sub("", content).strip()
+
+    # Ensure no unrecognized instructions
+    leftovers = content
+    for pattern in (group_pattern, output_format_pattern):
+        leftovers = pattern.sub("", leftovers)
+    if leftovers.strip():
+        raise ValueError("Invalid instruction found in the ld script:" + leftovers)
+
+    # Extract files from GROUP instructions
+    files = []
+    for match in group_pattern.findall(content):
+        files.extend([file.strip() for file in re.split(r"[,\s]+", match) if file.strip()])
+
+    return files
+
+
+def load_archive(fn):
+    ar_header = b"!<arch>\012"
+    with open(fn, "rb") as f:
+        is_ar_file = f.read(len(ar_header)) == ar_header
+    if is_ar_file:
+        return [CachedArFile(fn)]
+    else:
+        return [CachedArFile(item) for item in expand_ld_script(fn)]
diff --git a/tools/ci.sh b/tools/ci.sh
index ff362efd29e2d..ea67e2c104813 100755
--- a/tools/ci.sh
+++ b/tools/ci.sh
@@ -22,6 +22,15 @@ function ci_gcc_riscv_setup {
     riscv64-unknown-elf-gcc --version
 }
 
+function ci_picotool_setup {
+    # Manually installing picotool ensures we use a release version, and speeds up the build.
+    git clone https://github.com/raspberrypi/pico-sdk.git
+    (cd pico-sdk && git submodule update --init lib/mbedtls)
+    git clone https://github.com/raspberrypi/picotool.git
+    (cd picotool && mkdir build && cd build && cmake -DPICO_SDK_PATH=../../pico-sdk .. && make && sudo make install)
+    picotool version
+}
+
 ########################################################################################
 # c code formatting
 
@@ -62,6 +71,7 @@ function ci_code_size_setup {
     gcc --version
     ci_gcc_arm_setup
     ci_gcc_riscv_setup
+    ci_picotool_setup
 }
 
 function ci_code_size_build {
@@ -83,40 +93,61 @@ function ci_code_size_build {
     function code_size_build_step {
         COMMIT=$1
         OUTFILE=$2
-        IGNORE_ERRORS=$3
 
         echo "Building ${COMMIT}..."
         git checkout --detach $COMMIT
         git submodule update --init $SUBMODULES
         git show -s
         tools/metrics.py clean $PORTS_TO_CHECK
-        tools/metrics.py build $PORTS_TO_CHECK | tee $OUTFILE || $IGNORE_ERRORS
+        tools/metrics.py build $PORTS_TO_CHECK | tee $OUTFILE
+        return $?
     }
 
+    # Allow errors from tools/metrics.py to propagate out of the pipe above.
+    set -o pipefail
+
     # build reference, save to size0
     # ignore any errors with this build, in case master is failing
-    code_size_build_step $REFERENCE ~/size0 true
+    code_size_build_step $REFERENCE ~/size0
     # build PR/branch, save to size1
-    code_size_build_step $COMPARISON ~/size1 false
+    code_size_build_step $COMPARISON ~/size1
+    STATUS=$?
 
+    set +o pipefail
     unset -f code_size_build_step
+
+    return $STATUS
 }
 
 ########################################################################################
 # .mpy file format
 
 function ci_mpy_format_setup {
+    sudo apt-get update
+    sudo apt-get install python2.7
     sudo pip3 install pyelftools
+    python2.7 --version
+    python3 --version
 }
 
 function ci_mpy_format_test {
     # Test mpy-tool.py dump feature on bytecode
-    python2 ./tools/mpy-tool.py -xd tests/frozen/frozentest.mpy
+    python2.7 ./tools/mpy-tool.py -xd tests/frozen/frozentest.mpy
     python3 ./tools/mpy-tool.py -xd tests/frozen/frozentest.mpy
 
+    # Build MicroPython
+    ci_unix_standard_build
+    micropython=./ports/unix/build-standard/micropython
+    $micropython -m mip install --target . argparse __future__
+    export MICROPYPATH=.
+
+    # Test mpy-tool.py running under MicroPython
+    $micropython ./tools/mpy-tool.py -x -d tests/frozen/frozentest.mpy
+
     # Test mpy-tool.py dump feature on native code
     make -C examples/natmod/features1
     ./tools/mpy-tool.py -xd examples/natmod/features1/features1.mpy
+    $micropython ./tools/mpy-tool.py -x -d examples/natmod/features1/features1.mpy
 }
 
 ########################################################################################
@@ -135,17 +166,22 @@ function ci_cc3200_build {
 # ports/esp32
 
 # GitHub tag of ESP-IDF to use for CI (note: must be a tag or a branch)
-IDF_VER=v5.2.2
+IDF_VER=v5.4.1
+PYTHON=$(command -v python3 2> /dev/null)
+PYTHON_VER=$(${PYTHON:-python} --version | cut -d' ' -f2)
 
 export IDF_CCACHE_ENABLE=1
 
 function ci_esp32_idf_setup {
-    pip3 install pyelftools
     git clone --depth 1 --branch $IDF_VER https://github.com/espressif/esp-idf.git
     # doing a treeless clone isn't quite as good as --shallow-submodules, but it
     # is smaller than full clones and works when the submodule commit isn't a head.
     git -C esp-idf submodule update --init --recursive --filter=tree:0
     ./esp-idf/install.sh
+    # Install additional packages for mpy_ld into the IDF env
+    source esp-idf/export.sh
+    pip3 install pyelftools
+    pip3 install ar
 }
 
 function ci_esp32_build_common {
@@ -179,8 +215,8 @@ function ci_esp32_build_s3_c3 {
 # ports/esp8266
 
 function ci_esp8266_setup {
-    sudo pip install pyserial esptool==3.3.1
-    wget https://github.com/jepler/esp-open-sdk/releases/download/2018-06-10/xtensa-lx106-elf-standalone.tar.gz
+    sudo pip3 install pyserial esptool==3.3.1 pyelftools ar
+    wget https://micropython.org/resources/xtensa-lx106-elf-standalone.tar.gz
     zcat xtensa-lx106-elf-standalone.tar.gz | tar x
     # Remove this esptool.py so pip version is used instead
     rm xtensa-lx106-elf/bin/esptool.py
@@ -196,6 +232,9 @@ function ci_esp8266_build {
     make ${MAKEOPTS} -C ports/esp8266 BOARD=ESP8266_GENERIC
     make ${MAKEOPTS} -C ports/esp8266 BOARD=ESP8266_GENERIC BOARD_VARIANT=FLASH_512K
     make ${MAKEOPTS} -C ports/esp8266 BOARD=ESP8266_GENERIC BOARD_VARIANT=FLASH_1M
+
+    # Test building native .mpy with xtensa architecture.
+    ci_native_mpy_modules_build xtensa
 }
 
 ########################################################################################
@@ -268,18 +307,20 @@ function ci_powerpc_build {
 # ports/qemu
 
 function ci_qemu_setup_arm {
-    ci_mpy_format_setup
     ci_gcc_arm_setup
     sudo apt-get update
     sudo apt-get install qemu-system
+    sudo pip3 install pyelftools
+    sudo pip3 install ar
     qemu-system-arm --version
 }
 
 function ci_qemu_setup_rv32 {
-    ci_mpy_format_setup
     ci_gcc_riscv_setup
     sudo apt-get update
     sudo apt-get install qemu-system
+    sudo pip3 install pyelftools
+    sudo pip3 install ar
     qemu-system-riscv32 --version
 }
 
@@ -331,6 +372,7 @@ function ci_renesas_ra_board_build {
 
 function ci_rp2_setup {
     ci_gcc_arm_setup
+    ci_picotool_setup
 }
 
 function ci_rp2_build {
@@ -342,7 +384,8 @@ function ci_rp2_build {
     make ${MAKEOPTS} -C ports/rp2 BOARD=RPI_PICO2 submodules
     make ${MAKEOPTS} -C ports/rp2 BOARD=RPI_PICO2
     make ${MAKEOPTS} -C ports/rp2 BOARD=W5100S_EVB_PICO submodules
-    make ${MAKEOPTS} -C ports/rp2 BOARD=W5100S_EVB_PICO
+    # This build doubles as a build test for disabling threads in the config
+    make ${MAKEOPTS} -C ports/rp2 BOARD=W5100S_EVB_PICO CFLAGS_EXTRA=-DMICROPY_PY_THREAD=0
 
     # Test building ninaw10 driver and NIC interface.
     make ${MAKEOPTS} -C ports/rp2 BOARD=ARDUINO_NANO_RP2040_CONNECT submodules
@@ -369,6 +412,7 @@ function ci_samd_build {
 function ci_stm32_setup {
     ci_gcc_arm_setup
     pip3 install pyelftools
+    pip3 install ar
     pip3 install pyhy
 }
 
@@ -487,18 +531,27 @@ function ci_native_mpy_modules_build {
     else
         arch=$1
     fi
-    for natmod in features1 features3 features4 deflate framebuf heapq random re
+    for natmod in deflate features1 features3 features4 framebuf heapq random re
     do
+        make -C examples/natmod/$natmod ARCH=$arch clean
         make -C examples/natmod/$natmod ARCH=$arch
     done
+
+    # features2 requires soft-float on armv7m, rv32imc, and xtensa.  On armv6m
+    # the compiler generates absolute relocations in the object file
+    # referencing soft-float functions, which is not supported at the moment.
+    make -C examples/natmod/features2 ARCH=$arch clean
+    if [ $arch = "rv32imc" ] || [ $arch = "armv7m" ] || [ $arch = "xtensa" ]; then
+        make -C examples/natmod/features2 ARCH=$arch MICROPY_FLOAT_IMPL=float
+    elif [ $arch != "armv6m" ]; then
+        make -C examples/natmod/features2 ARCH=$arch
+    fi
+
     # btree requires thread local storage support on rv32imc.
-    if [ $arch != rv32imc ]; then
+    if [ $arch != "rv32imc" ]; then
+        make -C examples/natmod/btree ARCH=$arch clean
         make -C examples/natmod/btree ARCH=$arch
     fi
-    # features2 requires soft-float on armv7m and rv32imc.
-    if [ $arch != rv32imc ] && [ $arch != armv7m ]; then
-        make -C examples/natmod/features2 ARCH=$arch
-    fi
 }
 
 function ci_native_mpy_modules_32bit_build {
@@ -534,6 +587,7 @@ function ci_unix_standard_v2_run_tests {
 function ci_unix_coverage_setup {
     sudo pip3 install setuptools
     sudo pip3 install pyelftools
+    sudo pip3 install ar
     gcc --version
     python3 --version
 }
@@ -579,10 +633,12 @@ function ci_unix_coverage_run_native_mpy_tests {
 function ci_unix_32bit_setup {
     sudo dpkg --add-architecture i386
     sudo apt-get update
-    sudo apt-get install gcc-multilib g++-multilib libffi-dev:i386
+    sudo apt-get install gcc-multilib g++-multilib libffi-dev:i386 python2.7
     sudo pip3 install setuptools
     sudo pip3 install pyelftools
+    sudo pip3 install ar
     gcc --version
+    python2.7 --version
     python3 --version
 }
 
@@ -601,12 +657,12 @@ function ci_unix_coverage_32bit_run_native_mpy_tests {
 
 function ci_unix_nanbox_build {
     # Use Python 2 to check that it can run the build scripts
-    ci_unix_build_helper PYTHON=python2 VARIANT=nanbox CFLAGS_EXTRA="-DMICROPY_PY_MATH_CONSTANTS=1"
+    ci_unix_build_helper PYTHON=python2.7 VARIANT=nanbox CFLAGS_EXTRA="-DMICROPY_PY_MATH_CONSTANTS=1"
     ci_unix_build_ffi_lib_helper gcc -m32
 }
 
 function ci_unix_nanbox_run_tests {
-    ci_unix_run_tests_full_helper nanbox PYTHON=python2
+    ci_unix_run_tests_full_helper nanbox PYTHON=python2.7
 }
 
 function ci_unix_float_build {
@@ -756,9 +812,9 @@ function ci_windows_build {
 ########################################################################################
 # ports/zephyr
 
-ZEPHYR_DOCKER_VERSION=v0.26.13
-ZEPHYR_SDK_VERSION=0.16.8
-ZEPHYR_VERSION=v3.7.0
+ZEPHYR_DOCKER_VERSION=v0.27.4
+ZEPHYR_SDK_VERSION=0.17.0
+ZEPHYR_VERSION=v4.0.0
 
 function ci_zephyr_setup {
     IMAGE=ghcr.io/zephyrproject-rtos/ci:${ZEPHYR_DOCKER_VERSION}
@@ -809,3 +865,18 @@ function ci_zephyr_run_tests {
     # - inf_nan_arith fails pow(-1, nan) test
     (cd tests && ./run-tests.py -t execpty:"qemu-system-arm -cpu cortex-m3 -machine lm3s6965evb -nographic -monitor null -serial pty -kernel ../ports/zephyr/build/zephyr/zephyr.elf" -d basics float --exclude inf_nan_arith)
 }
+
+########################################################################################
+# ports/alif
+
+function ci_alif_setup {
+    ci_gcc_arm_setup
+}
+
+function ci_alif_ae3_build {
+    make ${MAKEOPTS} -C mpy-cross
+    make ${MAKEOPTS} -C ports/alif BOARD=OPENMV_AE3 MCU_CORE=M55_HP submodules
+    make ${MAKEOPTS} -C ports/alif BOARD=OPENMV_AE3 MCU_CORE=M55_HE submodules
+    make ${MAKEOPTS} -C ports/alif BOARD=OPENMV_AE3 MCU_CORE=M55_DUAL
+    make ${MAKEOPTS} -C ports/alif BOARD=ALIF_ENSEMBLE MCU_CORE=M55_DUAL
+}
diff --git a/tools/gen-cpydiff.py b/tools/gen-cpydiff.py
index 578b6c136f568..3bb928090bb6e 100644
--- a/tools/gen-cpydiff.py
+++ b/tools/gen-cpydiff.py
@@ -22,9 +22,9 @@
 # OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
 # THE SOFTWARE.
 
-""" gen-cpydiff generates documentation which outlines operations that differ between MicroPython
-    and CPython. This script is called by the docs Makefile for html and Latex and may be run
-    manually using the command make gen-cpydiff. """
+"""gen-cpydiff generates documentation which outlines operations that differ between MicroPython
+and CPython. This script is called by the docs Makefile for html and Latex and may be run
+manually using the command make gen-cpydiff."""
 
 import os
 import subprocess
@@ -45,6 +45,12 @@
     CPYTHON3 = os.getenv("MICROPY_CPYTHON3", "python3")
     MICROPYTHON = os.getenv("MICROPY_MICROPYTHON", "../ports/unix/build-standard/micropython")
 
+# Set PYTHONIOENCODING so that CPython will use utf-8 on systems which set another encoding in the locale
+os.environ["PYTHONIOENCODING"] = "utf-8"
+
+# Set PYTHONUNBUFFERED so that CPython will interleave stdout & stderr without buffering
+os.environ["PYTHONUNBUFFERED"] = "a non-empty string"
+
 TESTPATH = "../tests/cpydiff"
 DOCPATH = "../docs/genrst"
 SRCDIR = "../docs/differences"
@@ -69,7 +75,6 @@
         "code",
         "output_cpy",
         "output_upy",
-        "status",
     ],
 )
 
@@ -98,7 +103,7 @@ def readfiles():
                 if not re.match(r"\s*# fmt: (on|off)\s*", x)
             )
 
-            output = Output(test, class_, desc, cause, workaround, code, "", "", "")
+            output = Output(test, class_, desc, cause, workaround, code, "", "")
             files.append(output)
         except IndexError:
             print("Incorrect format in file " + test_fullpath)
@@ -108,10 +113,11 @@ def readfiles():
 
 def run_tests(tests):
     """executes all tests"""
+    same_results = False
     results = []
     for test in tests:
         test_fullpath = os.path.join(TESTPATH, test.name)
-        with open(test_fullpath, "rb") as f:
+        with open(test_fullpath, "r") as f:
             input_py = f.read()
 
         process = subprocess.Popen(
@@ -119,37 +125,42 @@ def run_tests(tests):
             shell=True,
             stdout=subprocess.PIPE,
             stdin=subprocess.PIPE,
-            stderr=subprocess.PIPE,
+            stderr=subprocess.STDOUT,
+            encoding="utf-8",
         )
-        output_cpy = [com.decode("utf8") for com in process.communicate(input_py)]
+        output_cpy = process.communicate(input_py)[0]
 
         process = subprocess.Popen(
             MICROPYTHON,
             shell=True,
             stdout=subprocess.PIPE,
             stdin=subprocess.PIPE,
-            stderr=subprocess.PIPE,
+            stderr=subprocess.STDOUT,
+            encoding="utf-8",
         )
-        output_upy = [com.decode("utf8") for com in process.communicate(input_py)]
+        output_upy = process.communicate(input_py)[0]
 
-        if output_cpy[0] == output_upy[0] and output_cpy[1] == output_upy[1]:
-            status = "Supported"
-            print("Supported operation!\nFile: " + test_fullpath)
+        if output_cpy == output_upy:
+            print("Error: Test has same output in CPython vs MicroPython: " + test_fullpath)
+            same_results = True
         else:
-            status = "Unsupported"
-
-        output = Output(
-            test.name,
-            test.class_,
-            test.desc,
-            test.cause,
-            test.workaround,
-            test.code,
-            output_cpy,
-            output_upy,
-            status,
+            output = Output(
+                test.name,
+                test.class_,
+                test.desc,
+                test.cause,
+                test.workaround,
+                test.code,
+                output_cpy,
+                output_upy,
+            )
+            results.append(output)
+
+    if same_results:
+        raise SystemExit(
+            "Failing due to non-differences in results. If MicroPython behaviour has changed "
+            "to match CPython, please remove the file(s) mentioned above."
         )
-        results.append(output)
 
     results.sort(key=lambda x: x.class_)
     return results
@@ -208,6 +219,8 @@ def gen_rst(results):
     class_ = []
     for output in results:
         section = output.class_.split(",")
+        if len(section) < 2:
+            raise SystemExit("Each item must have at least 2 categories")
         for i in range(len(section)):
             section[i] = section[i].rstrip()
             if section[i] in CLASSMAP:
@@ -217,8 +230,8 @@ def gen_rst(results):
                     filename = section[i].replace(" ", "_").lower()
                     rst = open(os.path.join(DOCPATH, filename + ".rst"), "w")
                     rst.write(HEADER)
-                    rst.write(section[i] + "\n")
-                    rst.write(RSTCHARS[0] * len(section[i]))
+                    rst.write(section[0] + "\n")
+                    rst.write(RSTCHARS[0] * len(section[0]) + "\n\n")
                     rst.write(time.strftime("\nGenerated %a %d %b %Y %X UTC\n\n", time.gmtime()))
                     # If a file docs/differences/<filename>_preamble.txt exists
                     # then its output is inserted after the top-level heading,
@@ -236,16 +249,16 @@ def gen_rst(results):
         class_ = section
         rst.write(".. _cpydiff_%s:\n\n" % os.path.splitext(output.name)[0])
         rst.write(output.desc + "\n")
-        rst.write("~" * len(output.desc) + "\n\n")
+        rst.write(RSTCHARS[min(i + 1, len(RSTCHARS) - 1)] * len(output.desc) + "\n\n")
         if output.cause != "Unknown":
             rst.write("**Cause:** " + output.cause + "\n\n")
         if output.workaround != "Unknown":
             rst.write("**Workaround:** " + output.workaround + "\n\n")
 
         rst.write("Sample code::\n\n" + indent(output.code, TAB) + "\n")
-        output_cpy = indent("".join(output.output_cpy[0:2]), TAB).rstrip()
+        output_cpy = indent(output.output_cpy, TAB).rstrip()
         output_cpy = ("::\n\n" if output_cpy != "" else "") + output_cpy
-        output_upy = indent("".join(output.output_upy[0:2]), TAB).rstrip()
+        output_upy = indent(output.output_upy, TAB).rstrip()
         output_upy = ("::\n\n" if output_upy != "" else "") + output_upy
         table = gen_table([["CPy output:", output_cpy], ["uPy output:", output_upy]])
         rst.write(table)
diff --git a/tools/mpremote/mpremote/commands.py b/tools/mpremote/mpremote/commands.py
index f86befd080349..428600baf4375 100644
--- a/tools/mpremote/mpremote/commands.py
+++ b/tools/mpremote/mpremote/commands.py
@@ -1,12 +1,16 @@
+import binascii
+import errno
 import hashlib
 import os
 import sys
 import tempfile
+import zlib
 
 import serial.tools.list_ports
 
-from .transport import TransportError, stdout_write_bytes
+from .transport import TransportError, TransportExecError, stdout_write_bytes
 from .transport_serial import SerialTransport
+from .romfs import make_romfs, VfsRomWriter
 
 
 class CommandError(Exception):
@@ -297,6 +301,82 @@ def _mkdir(a, *b):
         do_filesystem_cp(state, src_path_joined, dest_path_joined, False, check_hash)
 
 
+def do_filesystem_recursive_rm(state, path, args):
+    if state.transport.fs_isdir(path):
+        if state.transport.mounted:
+            r_cwd = state.transport.eval("os.getcwd()")
+            abs_path = os.path.normpath(
+                os.path.join(r_cwd, path) if not os.path.isabs(path) else path
+            )
+            if isinstance(state.transport, SerialTransport) and abs_path.startswith(
+                f'{SerialTransport.fs_hook_mount}/'
+            ):
+                raise CommandError(
+                    f"rm -r not permitted on {SerialTransport.fs_hook_mount} directory"
+                )
+        for entry in state.transport.fs_listdir(path):
+            do_filesystem_recursive_rm(state, _remote_path_join(path, entry.name), args)
+        if path:
+            try:
+                state.transport.fs_rmdir(path)
+                if args.verbose:
+                    print(f"removed directory: '{path}'")
+            except OSError as e:
+                if e.errno != errno.EINVAL:  # not vfs mountpoint
+                    raise CommandError(
+                        f"rm -r: cannot remove :{path} {os.strerror(e.errno) if e.errno else ''}"
+                    ) from e
+                if args.verbose:
+                    print(f"skipped: '{path}' (vfs mountpoint)")
+    else:
+        state.transport.fs_rmfile(path)
+        if args.verbose:
+            print(f"removed: '{path}'")
+
+
+def human_size(size, decimals=1):
+    for unit in ['B', 'K', 'M', 'G', 'T']:
+        if size < 1024.0 or unit == 'T':
+            break
+        size /= 1024.0
+    return f"{size:.{decimals}f}{unit}" if unit != 'B' else f"{int(size)}"
+
+
+def do_filesystem_tree(state, path, args):
+    """Print a tree of the device's filesystem starting at path."""
+    connectors = ("├── ", "└── ")
+
+    def _tree_recursive(path, prefix=""):
+        entries = state.transport.fs_listdir(path)
+        entries.sort(key=lambda e: e.name)
+        for i, entry in enumerate(entries):
+            connector = connectors[1] if i == len(entries) - 1 else connectors[0]
+            is_dir = entry.st_mode & 0x4000  # Directory
+            size_str = ""
+            # most MicroPython filesystems don't support st_size on directories, reduce clutter
+            if entry.st_size > 0 or not is_dir:
+                if args.size:
+                    size_str = f"[{entry.st_size:>9}]  "
+                elif args.human:
+                    size_str = f"[{human_size(entry.st_size):>6}]  "
+            print(f"{prefix}{connector}{size_str}{entry.name}")
+            if is_dir:
+                _tree_recursive(
+                    _remote_path_join(path, entry.name),
+                    prefix + ("    " if i == len(entries) - 1 else "│   "),
+                )
+
+    if not path or path == ".":
+        path = state.transport.exec("import os;print(os.getcwd())").strip().decode("utf-8")
+    if not (path == "." or state.transport.fs_isdir(path)):
+        raise CommandError(f"tree: '{path}' is not a directory")
+    if args.verbose:
+        print(f":{path} on {state.transport.device_name}")
+    else:
+        print(f":{path}")
+    _tree_recursive(path)
+
+
 def do_filesystem(state, args):
     state.ensure_raw_repl()
     state.did_action()
@@ -324,8 +404,8 @@ def do_filesystem(state, args):
         # leading ':' if the user included them.
         paths = [path[1:] if path.startswith(":") else path for path in paths]
 
-    # ls implicitly lists the cwd.
-    if command == "ls" and not paths:
+    # ls and tree implicitly lists the cwd.
+    if command in ("ls", "tree") and not paths:
         paths = [""]
 
     try:
@@ -349,7 +429,10 @@ def do_filesystem(state, args):
             elif command == "mkdir":
                 state.transport.fs_mkdir(path)
             elif command == "rm":
-                state.transport.fs_rmfile(path)
+                if args.recursive:
+                    do_filesystem_recursive_rm(state, path, args)
+                else:
+                    state.transport.fs_rmfile(path)
             elif command == "rmdir":
                 state.transport.fs_rmdir(path)
             elif command == "touch":
@@ -364,12 +447,10 @@ def do_filesystem(state, args):
                     )
                 else:
                     do_filesystem_cp(state, path, cp_dest, len(paths) > 1, not args.force)
-    except FileNotFoundError as er:
-        raise CommandError("{}: {}: No such file or directory.".format(command, er.args[0]))
-    except IsADirectoryError as er:
-        raise CommandError("{}: {}: Is a directory.".format(command, er.args[0]))
-    except FileExistsError as er:
-        raise CommandError("{}: {}: File exists.".format(command, er.args[0]))
+            elif command == "tree":
+                do_filesystem_tree(state, path, args)
+    except OSError as er:
+        raise CommandError("{}: {}: {}.".format(command, er.strerror, os.strerror(er.errno)))
     except TransportError as er:
         raise CommandError("Error with transport:\n{}".format(er.args[0]))
 
@@ -478,3 +559,188 @@ def do_rtc(state, args):
         state.transport.exec("machine.RTC().datetime({})".format(timetuple))
     else:
         print(state.transport.eval("machine.RTC().datetime()"))
+
+
+def _do_romfs_query(state, args):
+    state.ensure_raw_repl()
+    state.did_action()
+
+    # Detect the romfs and get its associated device.
+    state.transport.exec("import vfs")
+    if not state.transport.eval("hasattr(vfs,'rom_ioctl')"):
+        print("ROMFS is not enabled on this device")
+        return
+    num_rom_partitions = state.transport.eval("vfs.rom_ioctl(1)")
+    if num_rom_partitions <= 0:
+        print("No ROMFS partitions available")
+        return
+
+    for rom_id in range(num_rom_partitions):
+        state.transport.exec(f"dev=vfs.rom_ioctl(2,{rom_id})")
+        has_object = state.transport.eval("hasattr(dev,'ioctl')")
+        if has_object:
+            rom_block_count = state.transport.eval("dev.ioctl(4,0)")
+            rom_block_size = state.transport.eval("dev.ioctl(5,0)")
+            rom_size = rom_block_count * rom_block_size
+            print(
+                f"ROMFS{rom_id} partition has size {rom_size} bytes ({rom_block_count} blocks of {rom_block_size} bytes each)"
+            )
+        else:
+            rom_size = state.transport.eval("len(dev)")
+            print(f"ROMFS{rom_id} partition has size {rom_size} bytes")
+        romfs = state.transport.eval("bytes(memoryview(dev)[:12])")
+        print(f"  Raw contents: {romfs.hex(':')} ...")
+        if not romfs.startswith(b"\xd2\xcd\x31"):
+            print("  Not a valid ROMFS")
+        else:
+            size = 0
+            for value in romfs[3:]:
+                size = (size << 7) | (value & 0x7F)
+                if not value & 0x80:
+                    break
+            print(f"  ROMFS image size: {size}")
+
+
+def _do_romfs_build(state, args):
+    state.did_action()
+
+    if args.path is None:
+        raise CommandError("romfs build: source path not given")
+
+    input_directory = args.path
+
+    if args.output is None:
+        output_file = input_directory + ".romfs"
+    else:
+        output_file = args.output
+
+    romfs = make_romfs(input_directory, mpy_cross=args.mpy)
+
+    print(f"Writing {len(romfs)} bytes to output file {output_file}")
+    with open(output_file, "wb") as f:
+        f.write(romfs)
+
+
+def _do_romfs_deploy(state, args):
+    state.ensure_raw_repl()
+    state.did_action()
+    transport = state.transport
+
+    if args.path is None:
+        raise CommandError("romfs deploy: source path not given")
+
+    rom_id = args.partition
+    romfs_filename = args.path
+
+    # Read in or create the ROMFS filesystem image.
+    if os.path.isfile(romfs_filename) and romfs_filename.endswith((".img", ".romfs")):
+        with open(romfs_filename, "rb") as f:
+            romfs = f.read()
+    else:
+        romfs = make_romfs(romfs_filename, mpy_cross=args.mpy)
+    print(f"Image size is {len(romfs)} bytes")
+
+    # Detect the ROMFS partition and get its associated device.
+    state.transport.exec("import vfs")
+    if not state.transport.eval("hasattr(vfs,'rom_ioctl')"):
+        raise CommandError("ROMFS is not enabled on this device")
+    transport.exec(f"dev=vfs.rom_ioctl(2,{rom_id})")
+    if transport.eval("isinstance(dev,int) and dev<0"):
+        raise CommandError(f"ROMFS{rom_id} partition not found on device")
+    has_object = transport.eval("hasattr(dev,'ioctl')")
+    if has_object:
+        rom_block_count = transport.eval("dev.ioctl(4,0)")
+        rom_block_size = transport.eval("dev.ioctl(5,0)")
+        rom_size = rom_block_count * rom_block_size
+        print(
+            f"ROMFS{rom_id} partition has size {rom_size} bytes ({rom_block_count} blocks of {rom_block_size} bytes each)"
+        )
+    else:
+        rom_size = transport.eval("len(dev)")
+        print(f"ROMFS{rom_id} partition has size {rom_size} bytes")
+
+    # Check if ROMFS image is valid
+    if not romfs.startswith(VfsRomWriter.ROMFS_HEADER):
+        print("Invalid ROMFS image")
+        sys.exit(1)
+
+    # Check if ROMFS filesystem image will fit in the target partition.
+    if len(romfs) > rom_size:
+        print("ROMFS image is too big for the target partition")
+        sys.exit(1)
+
+    # Prepare ROMFS partition for writing.
+    print(f"Preparing ROMFS{rom_id} partition for writing")
+    transport.exec("import vfs\ntry:\n vfs.umount('/rom')\nexcept:\n pass")
+    chunk_size = 4096
+    if has_object:
+        for offset in range(0, len(romfs), rom_block_size):
+            transport.exec(f"dev.ioctl(6,{offset // rom_block_size})")
+        chunk_size = min(chunk_size, rom_block_size)
+    else:
+        rom_min_write = transport.eval(f"vfs.rom_ioctl(3,{rom_id},{len(romfs)})")
+        chunk_size = max(chunk_size, rom_min_write)
+
+    # Detect capabilities of the device to use the fastest method of transfer.
+    has_bytes_fromhex = transport.eval("hasattr(bytes,'fromhex')")
+    try:
+        transport.exec("from binascii import a2b_base64")
+        has_a2b_base64 = True
+    except TransportExecError:
+        has_a2b_base64 = False
+    try:
+        transport.exec("from io import BytesIO")
+        transport.exec("from deflate import DeflateIO,RAW")
+        has_deflate_io = True
+    except TransportExecError:
+        has_deflate_io = False
+
+    # Deploy the ROMFS filesystem image to the device.
+    for offset in range(0, len(romfs), chunk_size):
+        romfs_chunk = romfs[offset : offset + chunk_size]
+        romfs_chunk += bytes(chunk_size - len(romfs_chunk))
+        if has_deflate_io:
+            # Needs: binascii.a2b_base64, io.BytesIO, deflate.DeflateIO.
+            compressor = zlib.compressobj(wbits=-9)
+            romfs_chunk_compressed = compressor.compress(romfs_chunk)
+            romfs_chunk_compressed += compressor.flush()
+            buf = binascii.b2a_base64(romfs_chunk_compressed).strip()
+            transport.exec(f"buf=DeflateIO(BytesIO(a2b_base64({buf})),RAW,9).read()")
+        elif has_a2b_base64:
+            # Needs: binascii.a2b_base64.
+            buf = binascii.b2a_base64(romfs_chunk)
+            transport.exec(f"buf=a2b_base64({buf})")
+        elif has_bytes_fromhex:
+            # Needs: bytes.fromhex.
+            buf = romfs_chunk.hex()
+            transport.exec(f"buf=bytes.fromhex('{buf}')")
+        else:
+            # Needs nothing special.
+            transport.exec("buf=" + repr(romfs_chunk))
+        print(f"\rWriting at offset {offset}", end="")
+        if has_object:
+            transport.exec(
+                f"dev.writeblocks({offset // rom_block_size},buf,{offset % rom_block_size})"
+            )
+        else:
+            transport.exec(f"vfs.rom_ioctl(4,{rom_id},{offset},buf)")
+
+    # Complete writing.
+    if not has_object:
+        transport.eval(f"vfs.rom_ioctl(5,{rom_id})")
+
+    print()
+    print("ROMFS image deployed")
+
+
+def do_romfs(state, args):
+    if args.command[0] == "query":
+        _do_romfs_query(state, args)
+    elif args.command[0] == "build":
+        _do_romfs_build(state, args)
+    elif args.command[0] == "deploy":
+        _do_romfs_deploy(state, args)
+    else:
+        raise CommandError(
+            f"romfs: '{args.command[0]}' is not a command; pass romfs --help for a list"
+        )
diff --git a/tools/mpremote/mpremote/main.py b/tools/mpremote/mpremote/main.py
index e6e397020fe85..f8c913d26d194 100644
--- a/tools/mpremote/mpremote/main.py
+++ b/tools/mpremote/mpremote/main.py
@@ -36,6 +36,7 @@
     do_resume,
     do_rtc,
     do_soft_reset,
+    do_romfs,
 )
 from .mip import do_mip
 from .repl import do_repl
@@ -180,8 +181,12 @@ def argparse_rtc():
 
 
 def argparse_filesystem():
-    cmd_parser = argparse.ArgumentParser(description="execute filesystem commands on the device")
-    _bool_flag(cmd_parser, "recursive", "r", False, "recursive copy (for cp command only)")
+    cmd_parser = argparse.ArgumentParser(
+        description="execute filesystem commands on the device",
+        add_help=False,
+    )
+    cmd_parser.add_argument("--help", action="help", help="show this help message and exit")
+    _bool_flag(cmd_parser, "recursive", "r", False, "recursive (for cp and rm commands)")
     _bool_flag(
         cmd_parser,
         "force",
@@ -196,10 +201,26 @@ def argparse_filesystem():
         None,
         "enable verbose output (defaults to True for all commands except cat)",
     )
+    size_group = cmd_parser.add_mutually_exclusive_group()
+    size_group.add_argument(
+        "--size",
+        "-s",
+        default=False,
+        action="store_true",
+        help="show file size in bytes(tree command only)",
+    )
+    size_group.add_argument(
+        "--human",
+        "-h",
+        default=False,
+        action="store_true",
+        help="show file size in a more human readable way (tree command only)",
+    )
+
     cmd_parser.add_argument(
         "command",
         nargs=1,
-        help="filesystem command (e.g. cat, cp, sha256sum, ls, rm, rmdir, touch)",
+        help="filesystem command (e.g. cat, cp, sha256sum, ls, rm, rmdir, touch, tree)",
     )
     cmd_parser.add_argument("path", nargs="+", help="local and remote paths")
     return cmd_parser
@@ -228,6 +249,32 @@ def argparse_mip():
     return cmd_parser
 
 
+def argparse_romfs():
+    cmd_parser = argparse.ArgumentParser(description="manage ROM partitions")
+    _bool_flag(
+        cmd_parser,
+        "mpy",
+        "m",
+        True,
+        "automatically compile .py files to .mpy when building the ROMFS image (default)",
+    )
+    cmd_parser.add_argument(
+        "--partition",
+        "-p",
+        type=int,
+        default=0,
+        help="ROMFS partition to use",
+    )
+    cmd_parser.add_argument(
+        "--output",
+        "-o",
+        help="output file",
+    )
+    cmd_parser.add_argument("command", nargs=1, help="romfs command, one of: query, build, deploy")
+    cmd_parser.add_argument("path", nargs="?", help="path to directory to deploy")
+    return cmd_parser
+
+
 def argparse_none(description):
     return lambda: argparse.ArgumentParser(description=description)
 
@@ -302,6 +349,10 @@ def argparse_none(description):
         do_version,
         argparse_none("print version and exit"),
     ),
+    "romfs": (
+        do_romfs,
+        argparse_romfs,
+    ),
 }
 
 # Additional commands aliases.
@@ -324,6 +375,7 @@ def argparse_none(description):
     "rmdir": "fs rmdir",
     "sha256sum": "fs sha256sum",
     "touch": "fs touch",
+    "tree": "fs tree",
     # Disk used/free.
     "df": [
         "exec",
@@ -521,8 +573,13 @@ def main():
                 command_args = remaining_args
                 extra_args = []
 
-            # Special case: "fs ls" allowed have no path specified.
-            if cmd == "fs" and len(command_args) == 1 and command_args[0] == "ls":
+            # Special case: "fs ls" and "fs tree" can have only options and no path specified.
+            if (
+                cmd == "fs"
+                and len(command_args) >= 1
+                and command_args[0] in ("ls", "tree")
+                and sum(1 for a in command_args if not a.startswith('-')) == 1
+            ):
                 command_args.append("")
 
             # Use the command-specific argument parser.
diff --git a/tools/mpremote/mpremote/mip.py b/tools/mpremote/mpremote/mip.py
index 4ce62b7f77bbb..fa7974053f44d 100644
--- a/tools/mpremote/mpremote/mip.py
+++ b/tools/mpremote/mpremote/mip.py
@@ -7,6 +7,7 @@
 import json
 import tempfile
 import os
+import os.path
 
 from .commands import CommandError, show_progress_bar
 
@@ -33,6 +34,15 @@ def _ensure_path_exists(transport, path):
         prefix += "/"
 
 
+# Check if the specified path exists and matches the hash.
+def _check_exists(transport, path, short_hash):
+    try:
+        remote_hash = transport.fs_hashfile(path, "sha256")
+    except FileNotFoundError:
+        return False
+    return remote_hash.hex()[: len(short_hash)] == short_hash
+
+
 def _rewrite_url(url, branch=None):
     if not branch:
         branch = "HEAD"
@@ -64,22 +74,33 @@ def _rewrite_url(url, branch=None):
 
 
 def _download_file(transport, url, dest):
-    try:
-        with urllib.request.urlopen(url) as src:
-            data = src.read()
-            print("Installing:", dest)
-            _ensure_path_exists(transport, dest)
-            transport.fs_writefile(dest, data, progress_callback=show_progress_bar)
-    except urllib.error.HTTPError as e:
-        if e.status == 404:
-            raise CommandError(f"File not found: {url}")
-        else:
-            raise CommandError(f"Error {e.status} requesting {url}")
-    except urllib.error.URLError as e:
-        raise CommandError(f"{e.reason} requesting {url}")
+    if url.startswith(allowed_mip_url_prefixes):
+        try:
+            with urllib.request.urlopen(url) as src:
+                data = src.read()
+        except urllib.error.HTTPError as e:
+            if e.status == 404:
+                raise CommandError(f"File not found: {url}")
+            else:
+                raise CommandError(f"Error {e.status} requesting {url}")
+        except urllib.error.URLError as e:
+            raise CommandError(f"{e.reason} requesting {url}")
+    else:
+        if "\\" in url:
+            raise CommandError(f'Use "/" instead of "\\" in file URLs: {url!r}\n')
+        try:
+            with open(url, "rb") as f:
+                data = f.read()
+        except OSError as e:
+            raise CommandError(f"{e.strerror} opening {url}")
+
+    print("Installing:", dest)
+    _ensure_path_exists(transport, dest)
+    transport.fs_writefile(dest, data, progress_callback=show_progress_bar)
 
 
 def _install_json(transport, package_json_url, index, target, version, mpy):
+    base_url = ""
     if package_json_url.startswith(allowed_mip_url_prefixes):
         try:
             with urllib.request.urlopen(_rewrite_url(package_json_url, version)) as response:
@@ -91,20 +112,27 @@ def _install_json(transport, package_json_url, index, target, version, mpy):
                 raise CommandError(f"Error {e.status} requesting {package_json_url}")
         except urllib.error.URLError as e:
             raise CommandError(f"{e.reason} requesting {package_json_url}")
+        base_url = package_json_url.rpartition("/")[0]
     elif package_json_url.endswith(".json"):
         try:
             with open(package_json_url, "r") as f:
                 package_json = json.load(f)
         except OSError:
             raise CommandError(f"Error opening {package_json_url}")
+        base_url = os.path.dirname(package_json_url)
     else:
         raise CommandError(f"Invalid url for package: {package_json_url}")
     for target_path, short_hash in package_json.get("hashes", ()):
         fs_target_path = target + "/" + target_path
-        file_url = f"{index}/file/{short_hash[:2]}/{short_hash}"
-        _download_file(transport, file_url, fs_target_path)
+        if _check_exists(transport, fs_target_path, short_hash):
+            print("Exists:", fs_target_path)
+        else:
+            file_url = f"{index}/file/{short_hash[:2]}/{short_hash}"
+            _download_file(transport, file_url, fs_target_path)
     for target_path, url in package_json.get("urls", ()):
         fs_target_path = target + "/" + target_path
+        if base_url and not url.startswith(allowed_mip_url_prefixes):
+            url = f"{base_url}/{url}"  # Relative URLs
         _download_file(transport, _rewrite_url(url, version), fs_target_path)
     for dep, dep_version in package_json.get("deps", ()):
         _install_package(transport, dep, index, target, dep_version, mpy)
@@ -159,7 +187,11 @@ def do_mip(state, args):
 
             if args.target is None:
                 state.transport.exec("import sys")
-                lib_paths = [p for p in state.transport.eval("sys.path") if p.endswith("/lib")]
+                lib_paths = [
+                    p
+                    for p in state.transport.eval("sys.path")
+                    if not p.startswith("/rom") and p.endswith("/lib")
+                ]
                 if lib_paths and lib_paths[0]:
                     args.target = lib_paths[0]
                 else:
diff --git a/tools/mpremote/mpremote/romfs.py b/tools/mpremote/mpremote/romfs.py
new file mode 100644
index 0000000000000..ae781a36dfe62
--- /dev/null
+++ b/tools/mpremote/mpremote/romfs.py
@@ -0,0 +1,148 @@
+# MIT license; Copyright (c) 2022 Damien P. George
+
+import struct, sys, os
+
+try:
+    from mpy_cross import run as mpy_cross_run
+except ImportError:
+    mpy_cross_run = None
+
+
+class VfsRomWriter:
+    ROMFS_HEADER = b"\xd2\xcd\x31"
+
+    ROMFS_RECORD_KIND_UNUSED = 0
+    ROMFS_RECORD_KIND_PADDING = 1
+    ROMFS_RECORD_KIND_DATA_VERBATIM = 2
+    ROMFS_RECORD_KIND_DATA_POINTER = 3
+    ROMFS_RECORD_KIND_DIRECTORY = 4
+    ROMFS_RECORD_KIND_FILE = 5
+
+    def __init__(self):
+        self._dir_stack = [(None, bytearray())]
+
+    def _encode_uint(self, value):
+        encoded = [value & 0x7F]
+        value >>= 7
+        while value != 0:
+            encoded.insert(0, 0x80 | (value & 0x7F))
+            value >>= 7
+        return bytes(encoded)
+
+    def _pack(self, kind, payload):
+        return self._encode_uint(kind) + self._encode_uint(len(payload)) + payload
+
+    def _extend(self, data):
+        buf = self._dir_stack[-1][1]
+        buf.extend(data)
+        return len(buf)
+
+    def finalise(self):
+        _, data = self._dir_stack.pop()
+        encoded_kind = VfsRomWriter.ROMFS_HEADER
+        encoded_len = self._encode_uint(len(data))
+        if (len(encoded_kind) + len(encoded_len) + len(data)) % 2 == 1:
+            encoded_len = b"\x80" + encoded_len
+        data = encoded_kind + encoded_len + data
+        return data
+
+    def opendir(self, dirname):
+        self._dir_stack.append((dirname, bytearray()))
+
+    def closedir(self):
+        dirname, dirdata = self._dir_stack.pop()
+        dirdata = self._encode_uint(len(dirname)) + bytes(dirname, "ascii") + dirdata
+        self._extend(self._pack(VfsRomWriter.ROMFS_RECORD_KIND_DIRECTORY, dirdata))
+
+    def mkdata(self, data):
+        assert len(self._dir_stack) == 1
+        return self._extend(self._pack(VfsRomWriter.ROMFS_RECORD_KIND_DATA_VERBATIM, data)) - len(
+            data
+        )
+
+    def mkfile(self, filename, filedata):
+        filename = bytes(filename, "ascii")
+        payload = self._encode_uint(len(filename))
+        payload += filename
+        if isinstance(filedata, tuple):
+            sub_payload = self._encode_uint(filedata[0])
+            sub_payload += self._encode_uint(filedata[1])
+            payload += self._pack(VfsRomWriter.ROMFS_RECORD_KIND_DATA_POINTER, sub_payload)
+        else:
+            payload += self._pack(VfsRomWriter.ROMFS_RECORD_KIND_DATA_VERBATIM, filedata)
+        self._dir_stack[-1][1].extend(self._pack(VfsRomWriter.ROMFS_RECORD_KIND_FILE, payload))
+
+
+def copy_recursively(vfs, src_dir, print_prefix, mpy_cross):
+    assert src_dir.endswith("/")
+    DIR = 1 << 14
+    mpy_cross_missed = 0
+    dir_contents = sorted(os.listdir(src_dir))
+    for name in dir_contents:
+        src_name = src_dir + name
+        st = os.stat(src_name)
+
+        if name == dir_contents[-1]:
+            # Last entry in the directory listing.
+            print_entry = "\\--"
+            print_recurse = "    "
+        else:
+            # Not the last entry in the directory listing.
+            print_entry = "|--"
+            print_recurse = "|   "
+
+        if st[0] & DIR:
+            # A directory, enter it and copy its contents recursively.
+            print(print_prefix + print_entry, name + "/")
+            vfs.opendir(name)
+            mpy_cross_missed += copy_recursively(
+                vfs, src_name + "/", print_prefix + print_recurse, mpy_cross
+            )
+            vfs.closedir()
+        else:
+            # A file.
+            did_mpy = False
+            name_extra = ""
+            if mpy_cross and name.endswith(".py"):
+                name_mpy = name[:-3] + ".mpy"
+                src_name_mpy = src_dir + name_mpy
+                if not os.path.isfile(src_name_mpy):
+                    if mpy_cross_run is not None:
+                        did_mpy = True
+                        proc = mpy_cross_run(src_name)
+                        proc.wait()
+                    else:
+                        mpy_cross_missed += 1
+            if did_mpy:
+                name_extra = " -> .mpy"
+            print(print_prefix + print_entry, name + name_extra)
+            if did_mpy:
+                name = name_mpy
+                src_name = src_name_mpy
+            with open(src_name, "rb") as src:
+                vfs.mkfile(name, src.read())
+            if did_mpy:
+                os.remove(src_name_mpy)
+    return mpy_cross_missed
+
+
+def make_romfs(src_dir, *, mpy_cross):
+    if not src_dir.endswith("/"):
+        src_dir += "/"
+
+    vfs = VfsRomWriter()
+
+    # Build the filesystem recursively.
+    print("Building romfs filesystem, source directory: {}".format(src_dir))
+    print("/")
+    try:
+        mpy_cross_missed = copy_recursively(vfs, src_dir, "", mpy_cross)
+    except OSError as er:
+        print("Error: OSError {}".format(er), file=sys.stderr)
+        sys.exit(1)
+
+    if mpy_cross_missed:
+        print("Warning: `mpy_cross` module not found, .py files were not precompiled")
+        mpy_cross = False
+
+    return vfs.finalise()
diff --git a/tools/mpremote/mpremote/transport.py b/tools/mpremote/mpremote/transport.py
index d845796953a29..1b70f9b2edc40 100644
--- a/tools/mpremote/mpremote/transport.py
+++ b/tools/mpremote/mpremote/transport.py
@@ -24,7 +24,7 @@
 # OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
 # THE SOFTWARE.
 
-import ast, hashlib, os, sys
+import ast, errno, hashlib, os, sys
 from collections import namedtuple
 
 
@@ -55,14 +55,13 @@ def __init__(self, status_code, error_output):
 # Takes a Transport error (containing the text of an OSError traceback) and
 # raises it as the corresponding OSError-derived exception.
 def _convert_filesystem_error(e, info):
-    if "OSError" in e.error_output and "ENOENT" in e.error_output:
-        return FileNotFoundError(info)
-    if "OSError" in e.error_output and "EISDIR" in e.error_output:
-        return IsADirectoryError(info)
-    if "OSError" in e.error_output and "EEXIST" in e.error_output:
-        return FileExistsError(info)
-    if "OSError" in e.error_output and "ENODEV" in e.error_output:
-        return FileNotFoundError(info)
+    if "OSError" in e.error_output:
+        for code, estr in [
+            *errno.errorcode.items(),
+            (errno.EOPNOTSUPP, "EOPNOTSUPP"),
+        ]:
+            if estr in e.error_output:
+                return OSError(code, info)
     return e
 
 
@@ -73,7 +72,7 @@ def fs_listdir(self, src=""):
         def repr_consumer(b):
             buf.extend(b.replace(b"\x04", b""))
 
-        cmd = "import os\nfor f in os.ilistdir(%s):\n" " print(repr(f), end=',')" % (
+        cmd = "import os\nfor f in os.ilistdir(%s):\n print(repr(f), end=',')" % (
             ("'%s'" % src) if src else ""
         )
         try:
diff --git a/tools/mpremote/mpremote/transport_serial.py b/tools/mpremote/mpremote/transport_serial.py
index d3148f9ace318..53fc48553b167 100644
--- a/tools/mpremote/mpremote/transport_serial.py
+++ b/tools/mpremote/mpremote/transport_serial.py
@@ -42,6 +42,8 @@
 
 
 class SerialTransport(Transport):
+    fs_hook_mount = "/remote"  # MUST match the mount point in fs_hook_code
+
     def __init__(self, device, baudrate=115200, wait=0, exclusive=True, timeout=None):
         self.in_raw_repl = False
         self.use_raw_paste = True
@@ -375,7 +377,11 @@ def write_ctrl_d(self, out_callback):
         self.serial = self.serial.orig_serial
 
         # Provide a message about the remount.
-        out_callback(bytes(f"\r\nRemount local directory {self.cmd.root} at /remote\r\n", "utf8"))
+        out_callback(
+            bytes(
+                f"\r\nRemount local directory {self.cmd.root} at {self.fs_hook_mount}\r\n", "utf8"
+            )
+        )
 
         # Enter raw REPL and re-mount the remote filesystem.
         self.serial.write(b"\x01")
@@ -392,7 +398,7 @@ def write_ctrl_d(self, out_callback):
 
     def umount_local(self):
         if self.mounted:
-            self.exec('os.umount("/remote")')
+            self.exec(f'os.umount("{self.fs_hook_mount}")')
             self.mounted = False
             self.serial = self.serial.orig_serial
 
@@ -404,15 +410,16 @@ def umount_local(self):
     "CMD_OPEN": 4,
     "CMD_CLOSE": 5,
     "CMD_READ": 6,
-    "CMD_WRITE": 7,
-    "CMD_SEEK": 8,
-    "CMD_REMOVE": 9,
-    "CMD_RENAME": 10,
-    "CMD_MKDIR": 11,
-    "CMD_RMDIR": 12,
+    "CMD_READLINE": 7,
+    "CMD_WRITE": 8,
+    "CMD_SEEK": 9,
+    "CMD_REMOVE": 10,
+    "CMD_RENAME": 11,
+    "CMD_MKDIR": 12,
+    "CMD_RMDIR": 13,
 }
 
-fs_hook_code = """\
+fs_hook_code = f"""\
 import os, io, struct, micropython
 
 SEEK_SET = 0
@@ -592,12 +599,16 @@ def readinto(self, buf):
         return n
 
     def readline(self):
-        l = ''
-        while 1:
-            c = self.read(1)
-            l += c
-            if c == '\\n' or c == '':
-                return l
+        c = self.cmd
+        c.begin(CMD_READLINE)
+        c.wr_s8(self.fd)
+        data = c.rd_bytes(None)
+        c.end()
+        if self.is_text:
+            data = str(data, 'utf8')
+        else:
+            data = bytes(data)
+        return data
 
     def readlines(self):
         ls = []
@@ -741,13 +752,12 @@ def open(self, path, mode):
 
 
 def __mount():
-    os.mount(RemoteFS(RemoteCommand()), '/remote')
-    os.chdir('/remote')
+    os.mount(RemoteFS(RemoteCommand()), '{SerialTransport.fs_hook_mount}')
+    os.chdir('{SerialTransport.fs_hook_mount}')
 """
 
 # Apply basic compression on hook code.
-for key, value in fs_hook_cmds.items():
-    fs_hook_code = re.sub(key, str(value), fs_hook_code)
+fs_hook_code = re.sub(r"CMD_[A-Z_]+", lambda m: str(fs_hook_cmds[m.group(0)]), fs_hook_code)
 fs_hook_code = re.sub(" *#.*$", "", fs_hook_code, flags=re.MULTILINE)
 fs_hook_code = re.sub("\n\n+", "\n", fs_hook_code)
 fs_hook_code = re.sub("    ", " ", fs_hook_code)
@@ -887,6 +897,14 @@ def do_read(self):
         self.wr_bytes(buf)
         # self.log_cmd(f"read {fd} {n} -> {len(buf)}")
 
+    def do_readline(self):
+        fd = self.rd_s8()
+        buf = self.data_files[fd][0].readline()
+        if self.data_files[fd][1]:
+            buf = bytes(buf, "utf8")
+        self.wr_bytes(buf)
+        # self.log_cmd(f"readline {fd} -> {len(buf)}")
+
     def do_seek(self):
         fd = self.rd_s8()
         n = self.rd_s32()
@@ -960,6 +978,7 @@ def do_rmdir(self):
         fs_hook_cmds["CMD_OPEN"]: do_open,
         fs_hook_cmds["CMD_CLOSE"]: do_close,
         fs_hook_cmds["CMD_READ"]: do_read,
+        fs_hook_cmds["CMD_READLINE"]: do_readline,
         fs_hook_cmds["CMD_WRITE"]: do_write,
         fs_hook_cmds["CMD_SEEK"]: do_seek,
         fs_hook_cmds["CMD_REMOVE"]: do_remove,
diff --git a/tools/mpremote/tests/README.md b/tools/mpremote/tests/README.md
index 5b924d2fb8701..d1d77f1fb52df 100644
--- a/tools/mpremote/tests/README.md
+++ b/tools/mpremote/tests/README.md
@@ -4,11 +4,26 @@ This directory contains a set of tests for `mpremote`.
 
 Requirements:
 - A device running MicroPython connected to a serial port on the host.
+- The device you are testing against must be flashed with a firmware of the same build
+  as `mpremote`.
+- If the device has an SDcard or other vfs mounted, the vfs's filesystem must be empty
+  to pass the filesystem test.
 - Python 3.x, `bash` and various Unix tools such as `find`, `mktemp`, `sed`, `sort`, `tr`.
+- To test on Windows, you can either:
+    - Run the (Linux) tests in WSL2 against a USB device that is passed though to WSL2.
+    - Use the `Git Bash` terminal to run the tests against a device connected to a COM
+      port. _Note:_ While the tests will run in `Git Bash`, several will throw false
+      positive errors due to differences in the way that TMP files are logged and and
+      several other details.
 
 To run the tests do:
 
+    $ cd tools/mpremote/tests
     $ ./run-mpremote-tests.sh
 
+To run a single test do:
+
+    $ ./run-mpremote-tests.sh test_filesystem.sh
+
 Each test should print "OK" if it passed.  Otherwise it will print "CRASH", or "FAIL"
 and a diff of the expected and actual test output.
diff --git a/tools/mpremote/tests/test_errno.sh b/tools/mpremote/tests/test_errno.sh
new file mode 100755
index 0000000000000..0899706552d14
--- /dev/null
+++ b/tools/mpremote/tests/test_errno.sh
@@ -0,0 +1,38 @@
+#!/bin/bash
+set -e
+
+# Special ErrorFS so the test can induce arbitrary filesystem errors.
+cat << EOF > "${TMP}/fs.py"
+import os, vfs, errno
+
+class ErrorFS:
+    def mount(self, *a, **k):
+        pass
+    def umount(self, *a, **k):
+        pass
+    def chdir(self, *a, **k):
+        pass
+    def open(self, *a, **k):
+        raise self.error
+
+fs = ErrorFS()
+vfs.mount(fs, '/fs')
+os.chdir('/fs')
+EOF
+
+$MPREMOTE run "${TMP}/fs.py"
+
+echo -----
+$MPREMOTE resume exec "fs.error = Exception()"
+(
+  $MPREMOTE resume cat :Exception.py || echo "expect error"
+) 2> >(head -n1 >&2) # discard traceback specifics but keep main error message
+
+for errno in ENOENT EISDIR EEXIST ENODEV EINVAL EPERM EOPNOTSUPP ; do
+echo -----
+$MPREMOTE resume exec "fs.error = OSError(errno.$errno, '')"
+$MPREMOTE resume cat :$errno.py || echo "expect error"
+done
+
+echo -----
+$MPREMOTE resume exec "vfs.umount('/fs')"
diff --git a/tools/mpremote/tests/test_errno.sh.exp b/tools/mpremote/tests/test_errno.sh.exp
new file mode 100644
index 0000000000000..deda52f5fb0e8
--- /dev/null
+++ b/tools/mpremote/tests/test_errno.sh.exp
@@ -0,0 +1,25 @@
+-----
+mpremote: Error with transport:
+expect error
+-----
+mpremote: cat: ENOENT.py: No such file or directory.
+expect error
+-----
+mpremote: cat: EISDIR.py: Is a directory.
+expect error
+-----
+mpremote: cat: EEXIST.py: File exists.
+expect error
+-----
+mpremote: cat: ENODEV.py: No such device.
+expect error
+-----
+mpremote: cat: EINVAL.py: Invalid argument.
+expect error
+-----
+mpremote: cat: EPERM.py: Operation not permitted.
+expect error
+-----
+mpremote: cat: EOPNOTSUPP.py: Operation not supported.
+expect error
+-----
diff --git a/tools/mpremote/tests/test_filesystem.sh b/tools/mpremote/tests/test_filesystem.sh
index afeb7c91da8d6..13c5394f71c88 100755
--- a/tools/mpremote/tests/test_filesystem.sh
+++ b/tools/mpremote/tests/test_filesystem.sh
@@ -170,3 +170,73 @@ EOF
 $MPREMOTE resume cp -r "${TMP}/package" :
 $MPREMOTE resume ls : :package :package/subpackage
 $MPREMOTE resume exec "import package; package.x(); package.y()"
+
+echo -----
+# Test rm -r functionality
+# start with a fresh ramdisk before each test
+# rm -r MCU current working directory
+$MPREMOTE run "${TMP}/ramdisk.py"
+$MPREMOTE resume touch :a.py
+$MPREMOTE resume touch :b.py
+$MPREMOTE resume cp -r "${TMP}/package" :
+$MPREMOTE resume rm -r -v :
+$MPREMOTE resume ls :
+$MPREMOTE resume ls :/ramdisk
+
+echo -----
+# rm -r relative subfolder
+$MPREMOTE run "${TMP}/ramdisk.py"
+$MPREMOTE resume touch :a.py
+$MPREMOTE resume mkdir :testdir
+$MPREMOTE resume cp -r "${TMP}/package" :testdir/package
+$MPREMOTE resume ls :testdir
+$MPREMOTE resume ls :testdir/package
+$MPREMOTE resume rm -r :testdir/package
+$MPREMOTE resume ls :/ramdisk
+$MPREMOTE resume ls :testdir
+
+echo -----
+# rm -r non-existent path
+$MPREMOTE run "${TMP}/ramdisk.py"
+$MPREMOTE resume ls :
+$MPREMOTE resume rm -r :nonexistent || echo "expect error"
+
+echo -----
+# rm -r absolute root
+# no -v to generate same output on stm32 and other ports
+$MPREMOTE run "${TMP}/ramdisk.py"
+$MPREMOTE resume touch :a.py
+$MPREMOTE resume touch :b.py
+$MPREMOTE resume cp -r "${TMP}/package" :
+$MPREMOTE resume cp -r "${TMP}/package" :package2
+$MPREMOTE resume rm -r :/ || echo "expect error"
+$MPREMOTE resume ls :
+$MPREMOTE resume ls :/ramdisk
+
+echo -----
+# rm -r relative mountpoint
+$MPREMOTE run "${TMP}/ramdisk.py"
+$MPREMOTE resume touch :a.py
+$MPREMOTE resume touch :b.py
+$MPREMOTE resume cp -r "${TMP}/package" :
+$MPREMOTE resume exec "import os;os.chdir('/')"
+$MPREMOTE resume rm -r -v :ramdisk
+$MPREMOTE resume ls :/ramdisk
+
+echo -----
+# rm -r absolute mountpoint
+$MPREMOTE run "${TMP}/ramdisk.py"
+$MPREMOTE resume touch :a.py
+$MPREMOTE resume touch :b.py
+$MPREMOTE resume cp -r "${TMP}/package" :
+$MPREMOTE resume exec "import os;os.chdir('/')"
+$MPREMOTE resume rm -r -v :/ramdisk
+$MPREMOTE resume ls :/ramdisk
+
+echo -----
+# try to delete existing folder in mounted filesystem
+$MPREMOTE mount "${TMP}" + rm -rv :package || echo "expect error"
+echo -----
+# fs without command should raise error
+$MPREMOTE fs 2>/dev/null || echo "expect error: $?"
+echo -----
diff --git a/tools/mpremote/tests/test_filesystem.sh.exp b/tools/mpremote/tests/test_filesystem.sh.exp
index 82fe7d6bf78c5..63411580b756e 100644
--- a/tools/mpremote/tests/test_filesystem.sh.exp
+++ b/tools/mpremote/tests/test_filesystem.sh.exp
@@ -191,3 +191,86 @@ ls :package/subpackage
           23 y.py
 x
 y2
+-----
+touch :a.py
+touch :b.py
+cp ${TMP}/package :
+rm :
+removed: './a.py'
+removed: './b.py'
+removed: './package/subpackage/__init__.py'
+removed: './package/subpackage/y.py'
+removed directory: './package/subpackage'
+removed: './package/__init__.py'
+removed: './package/x.py'
+removed directory: './package'
+ls :
+ls :/ramdisk
+-----
+touch :a.py
+mkdir :testdir
+cp ${TMP}/package :testdir/package
+ls :testdir
+           0 package/
+ls :testdir/package
+           0 subpackage/
+          43 __init__.py
+          22 x.py
+rm :testdir/package
+ls :/ramdisk
+           0 a.py
+           0 testdir/
+ls :testdir
+-----
+ls :
+rm :nonexistent
+mpremote: rm: nonexistent: No such file or directory.
+expect error
+-----
+touch :a.py
+touch :b.py
+cp ${TMP}/package :
+cp ${TMP}/package :package2
+rm :/
+mpremote: rm -r: cannot remove :/ Operation not permitted
+expect error
+ls :
+ls :/ramdisk
+-----
+touch :a.py
+touch :b.py
+cp ${TMP}/package :
+rm :ramdisk
+removed: 'ramdisk/a.py'
+removed: 'ramdisk/b.py'
+removed: 'ramdisk/package/subpackage/__init__.py'
+removed: 'ramdisk/package/subpackage/y.py'
+removed directory: 'ramdisk/package/subpackage'
+removed: 'ramdisk/package/__init__.py'
+removed: 'ramdisk/package/x.py'
+removed directory: 'ramdisk/package'
+skipped: 'ramdisk' (vfs mountpoint)
+ls :/ramdisk
+-----
+touch :a.py
+touch :b.py
+cp ${TMP}/package :
+rm :/ramdisk
+removed: '/ramdisk/a.py'
+removed: '/ramdisk/b.py'
+removed: '/ramdisk/package/subpackage/__init__.py'
+removed: '/ramdisk/package/subpackage/y.py'
+removed directory: '/ramdisk/package/subpackage'
+removed: '/ramdisk/package/__init__.py'
+removed: '/ramdisk/package/x.py'
+removed directory: '/ramdisk/package'
+skipped: '/ramdisk' (vfs mountpoint)
+ls :/ramdisk
+-----
+Local directory ${TMP} is mounted at /remote
+rm :package
+mpremote: rm -r not permitted on /remote directory
+expect error
+-----
+expect error: 2
+-----
diff --git a/tools/mpremote/tests/test_fs_tree.sh b/tools/mpremote/tests/test_fs_tree.sh
new file mode 100755
index 0000000000000..d7fc433ae6a15
--- /dev/null
+++ b/tools/mpremote/tests/test_fs_tree.sh
@@ -0,0 +1,114 @@
+#!/bin/bash
+set -e
+
+# Creates a RAM disk big enough to hold two copies of the test directory
+# structure.
+cat << EOF > "${TMP}/ramdisk.py"
+class RAMBlockDev:
+    def __init__(self, block_size, num_blocks):
+        self.block_size = block_size
+        self.data = bytearray(block_size * num_blocks)
+
+    def readblocks(self, block_num, buf):
+        for i in range(len(buf)):
+            buf[i] = self.data[block_num * self.block_size + i]
+
+    def writeblocks(self, block_num, buf):
+        for i in range(len(buf)):
+            self.data[block_num * self.block_size + i] = buf[i]
+
+    def ioctl(self, op, arg):
+        if op == 4: # get number of blocks
+            return len(self.data) // self.block_size
+        if op == 5: # get block size
+            return self.block_size
+
+import os
+
+bdev = RAMBlockDev(512, 50)
+os.VfsFat.mkfs(bdev)
+os.mount(bdev, '/ramdisk')
+os.chdir('/ramdisk')
+EOF
+
+# setup 
+echo -----
+$MPREMOTE run "${TMP}/ramdisk.py"
+$MPREMOTE resume ls
+
+echo -----
+echo "empty tree"
+$MPREMOTE resume tree :
+
+echo -----
+$MPREMOTE resume touch :a.py + touch :b.py  
+$MPREMOTE resume mkdir :foo + touch :foo/aa.py + touch :foo/ba.py
+
+echo "small tree - :" 
+$MPREMOTE resume tree :
+
+echo -----
+echo "no path" 
+$MPREMOTE resume tree 
+
+echo -----
+echo "path = '.'" 
+$MPREMOTE resume tree .
+
+echo -----
+echo "path = ':.'" 
+$MPREMOTE resume tree :.
+
+
+echo -----
+echo "multiple trees" 
+$MPREMOTE resume mkdir :bar + touch :bar/aaa.py + touch :bar/bbbb.py
+$MPREMOTE resume mkdir :bar/baz + touch :bar/baz/aaa.py + touch :bar/baz/bbbb.py
+$MPREMOTE resume mkdir :bar/baz/quux + touch :bar/baz/quux/aaa.py + touch :bar/baz/quux/bbbb.py
+$MPREMOTE resume mkdir :bar/baz/quux/xen + touch :bar/baz/quux/xen/aaa.py
+
+$MPREMOTE resume tree
+
+echo -----
+echo single path
+$MPREMOTE resume tree :foo
+
+echo -----
+echo "multiple paths" 
+$MPREMOTE resume tree :foo :bar
+
+echo -----
+echo "subtree" 
+$MPREMOTE resume tree bar/baz
+
+echo -----
+echo mountpoint
+$MPREMOTE resume tree :/ramdisk
+
+echo -----
+echo non-existent folder : error
+$MPREMOTE resume tree :not_there || echo "expect error: $?"
+
+echo -----
+echo file : error 
+$MPREMOTE resume tree :a.py || echo "expect error: $?"
+
+echo -----
+echo "tree -s :"
+mkdir -p "${TMP}/data"
+dd if=/dev/zero of="${TMP}/data/file1.txt" bs=1 count=20 > /dev/null 2>&1
+dd if=/dev/zero of="${TMP}/data/file2.txt" bs=1 count=204 > /dev/null 2>&1
+dd if=/dev/zero of="${TMP}/data/file3.txt" bs=1 count=1096 > /dev/null 2>&1
+dd if=/dev/zero of="${TMP}/data/file4.txt" bs=1 count=2192 > /dev/null 2>&1
+
+$MPREMOTE resume cp -r "${TMP}/data" :
+$MPREMOTE resume tree -s :
+echo -----
+echo "tree -s"
+$MPREMOTE resume tree -s
+echo -----
+$MPREMOTE resume tree --human :
+echo -----
+$MPREMOTE resume tree -s --human : || echo "expect error: $?"
+echo -----
+
diff --git a/tools/mpremote/tests/test_fs_tree.sh.exp b/tools/mpremote/tests/test_fs_tree.sh.exp
new file mode 100644
index 0000000000000..9a67883b1c87f
--- /dev/null
+++ b/tools/mpremote/tests/test_fs_tree.sh.exp
@@ -0,0 +1,225 @@
+-----
+ls :
+-----
+empty tree
+tree :
+:/ramdisk
+-----
+touch :a.py
+touch :b.py
+mkdir :foo
+touch :foo/aa.py
+touch :foo/ba.py
+small tree - :
+tree :
+:/ramdisk
+├── a.py
+├── b.py
+└── foo
+    ├── aa.py
+    └── ba.py
+-----
+no path
+tree :
+:/ramdisk
+├── a.py
+├── b.py
+└── foo
+    ├── aa.py
+    └── ba.py
+-----
+path = '.'
+tree :.
+:/ramdisk
+├── a.py
+├── b.py
+└── foo
+    ├── aa.py
+    └── ba.py
+-----
+path = ':.'
+tree :.
+:/ramdisk
+├── a.py
+├── b.py
+└── foo
+    ├── aa.py
+    └── ba.py
+-----
+multiple trees
+mkdir :bar
+touch :bar/aaa.py
+touch :bar/bbbb.py
+mkdir :bar/baz
+touch :bar/baz/aaa.py
+touch :bar/baz/bbbb.py
+mkdir :bar/baz/quux
+touch :bar/baz/quux/aaa.py
+touch :bar/baz/quux/bbbb.py
+mkdir :bar/baz/quux/xen
+touch :bar/baz/quux/xen/aaa.py
+tree :
+:/ramdisk
+├── a.py
+├── b.py
+├── bar
+│   ├── aaa.py
+│   ├── baz
+│   │   ├── aaa.py
+│   │   ├── bbbb.py
+│   │   └── quux
+│   │       ├── aaa.py
+│   │       ├── bbbb.py
+│   │       └── xen
+│   │           └── aaa.py
+│   └── bbbb.py
+└── foo
+    ├── aa.py
+    └── ba.py
+-----
+single path
+tree :foo
+:foo
+├── aa.py
+└── ba.py
+-----
+multiple paths
+tree :foo
+:foo
+├── aa.py
+└── ba.py
+tree :bar
+:bar
+├── aaa.py
+├── baz
+│   ├── aaa.py
+│   ├── bbbb.py
+│   └── quux
+│       ├── aaa.py
+│       ├── bbbb.py
+│       └── xen
+│           └── aaa.py
+└── bbbb.py
+-----
+subtree
+tree :bar/baz
+:bar/baz
+├── aaa.py
+├── bbbb.py
+└── quux
+    ├── aaa.py
+    ├── bbbb.py
+    └── xen
+        └── aaa.py
+-----
+mountpoint
+tree :/ramdisk
+:/ramdisk
+├── a.py
+├── b.py
+├── bar
+│   ├── aaa.py
+│   ├── baz
+│   │   ├── aaa.py
+│   │   ├── bbbb.py
+│   │   └── quux
+│   │       ├── aaa.py
+│   │       ├── bbbb.py
+│   │       └── xen
+│   │           └── aaa.py
+│   └── bbbb.py
+└── foo
+    ├── aa.py
+    └── ba.py
+-----
+non-existent folder : error
+tree :not_there
+mpremote: tree: 'not_there' is not a directory
+expect error: 1
+-----
+file : error
+tree :a.py
+mpremote: tree: 'a.py' is not a directory
+expect error: 1
+-----
+tree -s :
+cp ${TMP}/data :
+tree :
+:/ramdisk
+├── [        0]  a.py
+├── [        0]  b.py
+├── bar
+│   ├── [        0]  aaa.py
+│   ├── baz
+│   │   ├── [        0]  aaa.py
+│   │   ├── [        0]  bbbb.py
+│   │   └── quux
+│   │       ├── [        0]  aaa.py
+│   │       ├── [        0]  bbbb.py
+│   │       └── xen
+│   │           └── [        0]  aaa.py
+│   └── [        0]  bbbb.py
+├── data
+│   ├── [       20]  file1.txt
+│   ├── [      204]  file2.txt
+│   ├── [     1096]  file3.txt
+│   └── [     2192]  file4.txt
+└── foo
+    ├── [        0]  aa.py
+    └── [        0]  ba.py
+-----
+tree -s
+tree :
+:/ramdisk
+├── [        0]  a.py
+├── [        0]  b.py
+├── bar
+│   ├── [        0]  aaa.py
+│   ├── baz
+│   │   ├── [        0]  aaa.py
+│   │   ├── [        0]  bbbb.py
+│   │   └── quux
+│   │       ├── [        0]  aaa.py
+│   │       ├── [        0]  bbbb.py
+│   │       └── xen
+│   │           └── [        0]  aaa.py
+│   └── [        0]  bbbb.py
+├── data
+│   ├── [       20]  file1.txt
+│   ├── [      204]  file2.txt
+│   ├── [     1096]  file3.txt
+│   └── [     2192]  file4.txt
+└── foo
+    ├── [        0]  aa.py
+    └── [        0]  ba.py
+-----
+tree :
+:/ramdisk
+├── [     0]  a.py
+├── [     0]  b.py
+├── bar
+│   ├── [     0]  aaa.py
+│   ├── baz
+│   │   ├── [     0]  aaa.py
+│   │   ├── [     0]  bbbb.py
+│   │   └── quux
+│   │       ├── [     0]  aaa.py
+│   │       ├── [     0]  bbbb.py
+│   │       └── xen
+│   │           └── [     0]  aaa.py
+│   └── [     0]  bbbb.py
+├── data
+│   ├── [    20]  file1.txt
+│   ├── [   204]  file2.txt
+│   ├── [  1.1K]  file3.txt
+│   └── [  2.1K]  file4.txt
+└── foo
+    ├── [     0]  aa.py
+    └── [     0]  ba.py
+-----
+usage: fs [--help] [--recursive | --no-recursive] [--force | --no-force]
+          [--verbose | --no-verbose] [--size | --human]
+          command path [path ...] ...
+fs: error: argument --human/-h: not allowed with argument --size/-s
+expect error: 2
+-----
diff --git a/tools/mpremote/tests/test_mip_local_install.sh b/tools/mpremote/tests/test_mip_local_install.sh
new file mode 100755
index 0000000000000..fb8c597bd1484
--- /dev/null
+++ b/tools/mpremote/tests/test_mip_local_install.sh
@@ -0,0 +1,67 @@
+#!/bin/bash
+
+# This test the "mpremote mip install" from local files. It creates a package
+# and "mip installs" it into a ramdisk. The package is then imported and
+# executed. The package is a simple "Hello, world!" example.
+
+set -e
+
+PACKAGE=mip_example
+PACKAGE_DIR=${TMP}/example
+MODULE_DIR=${PACKAGE_DIR}/${PACKAGE}
+
+target=/__ramdisk
+block_size=512
+num_blocks=50
+
+# Create the smallest permissible ramdisk.
+cat << EOF > "${TMP}/ramdisk.py"
+class RAMBlockDev:
+    def __init__(self, block_size, num_blocks):
+        self.block_size = block_size
+        self.data = bytearray(block_size * num_blocks)
+
+    def readblocks(self, block_num, buf):
+        for i in range(len(buf)):
+            buf[i] = self.data[block_num * self.block_size + i]
+
+    def writeblocks(self, block_num, buf):
+        for i in range(len(buf)):
+            self.data[block_num * self.block_size + i] = buf[i]
+
+    def ioctl(self, op, arg):
+        if op == 4: # get number of blocks
+            return len(self.data) // self.block_size
+        if op == 5: # get block size
+            return self.block_size
+
+import os
+
+bdev = RAMBlockDev(${block_size}, ${num_blocks})
+os.VfsFat.mkfs(bdev)
+os.mount(bdev, '${target}')
+EOF
+
+echo ----- Setup
+mkdir -p ${MODULE_DIR}
+echo "def hello(): print('Hello, world!')" > ${MODULE_DIR}/hello.py
+echo "from .hello import hello" > ${MODULE_DIR}/__init__.py
+cat > ${PACKAGE_DIR}/package.json <<EOF
+{
+    "urls": [
+        ["${PACKAGE}/__init__.py", "${PACKAGE}/__init__.py"],
+        ["${PACKAGE}/hello.py", "${PACKAGE}/hello.py"]
+    ],
+    "version": "0.2"
+}
+EOF
+
+$MPREMOTE run "${TMP}/ramdisk.py"
+$MPREMOTE resume mkdir ${target}/lib
+echo
+echo ---- Install package
+$MPREMOTE resume mip install --target=${target}/lib ${PACKAGE_DIR}/package.json
+echo
+echo ---- Test package
+$MPREMOTE resume exec "import sys; sys.path.append(\"${target}/lib\")"
+$MPREMOTE resume exec "import ${PACKAGE}; ${PACKAGE}.hello()"
diff --git a/tools/mpremote/tests/test_mip_local_install.sh.exp b/tools/mpremote/tests/test_mip_local_install.sh.exp
new file mode 100644
index 0000000000000..81cd06c6055fd
--- /dev/null
+++ b/tools/mpremote/tests/test_mip_local_install.sh.exp
@@ -0,0 +1,11 @@
+----- Setup
+mkdir :/__ramdisk/lib
+
+---- Install package
+Install ${TMP}/example/package.json
+Installing: /__ramdisk/lib/mip_example/__init__.py
+Installing: /__ramdisk/lib/mip_example/hello.py
+Done
+
+---- Test package
+Hello, world!
diff --git a/tools/mpremote/tests/test_mount.sh b/tools/mpremote/tests/test_mount.sh
index 9eab0b0d6e8c5..724ae1417fccc 100755
--- a/tools/mpremote/tests/test_mount.sh
+++ b/tools/mpremote/tests/test_mount.sh
@@ -26,3 +26,7 @@ $MPREMOTE mount ${TMP} exec "import mount_package; mount_package.x(); mount_pack
 echo -----
 $MPREMOTE mount ${TMP} exec "open('test.txt', 'w').write('hello world\n')"
 cat "${TMP}/test.txt"
+
+# Test RemoteFile.readline and RemoteFile.readlines methods.
+echo -----
+$MPREMOTE mount ${TMP} exec "print(open('test.txt').readlines())"
diff --git a/tools/mpremote/tests/test_mount.sh.exp b/tools/mpremote/tests/test_mount.sh.exp
index 560f5e4f10a9b..616cb75bcf5f1 100644
--- a/tools/mpremote/tests/test_mount.sh.exp
+++ b/tools/mpremote/tests/test_mount.sh.exp
@@ -5,3 +5,6 @@ Local directory ${TMP} is mounted at /remote
 -----
 Local directory ${TMP} is mounted at /remote
 hello world
+-----
+['hello world\n']
+Local directory ${TMP} is mounted at /remote
diff --git a/tools/mpy-tool.py b/tools/mpy-tool.py
index cdceae3746638..69d3a6c06f6b3 100755
--- a/tools/mpy-tool.py
+++ b/tools/mpy-tool.py
@@ -24,11 +24,11 @@
 # OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
 # THE SOFTWARE.
 
-# Python 2/3 compatibility code
+# Python 2/3/MicroPython compatibility code
 from __future__ import print_function
-import platform
+import sys
 
-if platform.python_version_tuple()[0] == "2":
+if sys.version_info[0] == 2:
     from binascii import hexlify as hexlify_py2
 
     str_cons = lambda val, enc=None: str(val)
@@ -41,7 +41,7 @@ def hexlify_to_str(b):
         x = hexlify_py2(b)
         return ":".join(x[i : i + 2] for i in range(0, len(x), 2))
 
-else:
+elif sys.version_info[0] == 3:  # Also handles MicroPython
     from binascii import hexlify
 
     str_cons = str
@@ -1765,7 +1765,7 @@ def copy_section(file, offset, offset2):
             f.write(merged_mpy)
 
 
-def main():
+def main(args=None):
     global global_qstrs
 
     import argparse
@@ -1797,7 +1797,7 @@ def main():
     )
     cmd_parser.add_argument("-o", "--output", default=None, help="output file")
     cmd_parser.add_argument("files", nargs="+", help="input .mpy files")
-    args = cmd_parser.parse_args()
+    args = cmd_parser.parse_args(args)
 
     # set config values relevant to target machine
     config.MICROPY_LONGINT_IMPL = {
diff --git a/tools/mpy_ld.py b/tools/mpy_ld.py
index 54295208f1a29..6518037f2ef33 100755
--- a/tools/mpy_ld.py
+++ b/tools/mpy_ld.py
@@ -30,6 +30,7 @@
 
 import sys, os, struct, re
 from elftools.elf import elffile
+import ar_util
 
 sys.path.append(os.path.dirname(__file__) + "/../py")
 import makeqstrdata as qstrutil
@@ -401,6 +402,7 @@ def __init__(self, arch):
         self.known_syms = {}  # dict of symbols that are defined
         self.unresolved_syms = []  # list of unresolved symbols
         self.mpy_relocs = []  # list of relocations needed in the output .mpy file
+        self.externs = {}  # dict of externally-defined symbols
 
     def check_arch(self, arch_name):
         if arch_name != self.arch.name:
@@ -490,10 +492,14 @@ def populate_got(env):
         sym = got_entry.sym
         if hasattr(sym, "resolved"):
             sym = sym.resolved
-        sec = sym.section
-        addr = sym["st_value"]
-        got_entry.sec_name = sec.name
-        got_entry.link_addr += sec.addr + addr
+        if sym.name in env.externs:
+            got_entry.sec_name = ".external.fixed_addr"
+            got_entry.link_addr = env.externs[sym.name]
+        else:
+            sec = sym.section
+            addr = sym["st_value"]
+            got_entry.sec_name = sec.name
+            got_entry.link_addr += sec.addr + addr
 
     # Get sorted GOT, sorted by external, text, rodata, bss so relocations can be combined
     got_list = sorted(
@@ -519,6 +525,9 @@ def populate_got(env):
             dest = int(got_entry.name.split("+")[1], 16) // env.arch.word_size
         elif got_entry.sec_name == ".external.mp_fun_table":
             dest = got_entry.sym.mp_fun_table_offset
+        elif got_entry.sec_name == ".external.fixed_addr":
+            # Fixed-address symbols should not be relocated.
+            continue
         elif got_entry.sec_name.startswith(".text"):
             dest = ".text"
         elif got_entry.sec_name.startswith(".rodata"):
@@ -664,7 +673,7 @@ def do_relocation_text(env, text_addr, r):
         R_XTENSA_PDIFF32,
         R_XTENSA_ASM_EXPAND,
     ):
-        if s.section.name.startswith(".text"):
+        if not hasattr(s, "section") or s.section.name.startswith(".text"):
             # it looks like R_XTENSA_[P]DIFF32 into .text is already correctly relocated,
             # and expand relaxations cannot occur in non-executable sections.
             return
@@ -701,9 +710,13 @@ def do_relocation_text(env, text_addr, r):
     elif env.arch.name == "EM_RISCV":
         (addr, value) = process_riscv32_relocation(env, text_addr, r)
 
+    elif env.arch.name == "EM_ARM" and r_info_type == R_ARM_ABS32:
+        # happens for soft-float on armv6m
+        raise ValueError("Absolute relocations not supported on ARM")
+
     else:
         # Unknown/unsupported relocation
-        assert 0, r_info_type
+        assert 0, (r_info_type, s.name, s.entry, env.arch.name)
 
     # Write relocation
     if env.arch.name == "EM_RISCV":
@@ -1075,59 +1088,59 @@ def process_riscv32_relocation(env, text_addr, r):
     return addr, value
 
 
-def load_object_file(env, felf):
-    with open(felf, "rb") as f:
-        elf = elffile.ELFFile(f)
-        env.check_arch(elf["e_machine"])
-
-        # Get symbol table
-        symtab = list(elf.get_section_by_name(".symtab").iter_symbols())
-
-        # Load needed sections from ELF file
-        sections_shndx = {}  # maps elf shndx to Section object
-        for idx, s in enumerate(elf.iter_sections()):
-            if s.header.sh_type in ("SHT_PROGBITS", "SHT_NOBITS"):
-                if s.data_size == 0:
-                    # Ignore empty sections
-                    pass
-                elif s.name.startswith((".literal", ".text", ".rodata", ".data.rel.ro", ".bss")):
-                    sec = Section.from_elfsec(s, felf)
-                    sections_shndx[idx] = sec
-                    if s.name.startswith(".literal"):
-                        env.literal_sections.append(sec)
-                    else:
-                        env.sections.append(sec)
-                elif s.name.startswith(".data"):
-                    raise LinkError("{}: {} non-empty".format(felf, s.name))
+def load_object_file(env, f, felf):
+    elf = elffile.ELFFile(f)
+    env.check_arch(elf["e_machine"])
+
+    # Get symbol table
+    symtab = list(elf.get_section_by_name(".symtab").iter_symbols())
+
+    # Load needed sections from ELF file
+    sections_shndx = {}  # maps elf shndx to Section object
+    for idx, s in enumerate(elf.iter_sections()):
+        if s.header.sh_type in ("SHT_PROGBITS", "SHT_NOBITS"):
+            if s.data_size == 0:
+                # Ignore empty sections
+                pass
+            elif s.name.startswith((".literal", ".text", ".rodata", ".data.rel.ro", ".bss")):
+                sec = Section.from_elfsec(s, felf)
+                sections_shndx[idx] = sec
+                if s.name.startswith(".literal"):
+                    env.literal_sections.append(sec)
                 else:
-                    # Ignore section
-                    pass
-            elif s.header.sh_type in ("SHT_REL", "SHT_RELA"):
-                shndx = s.header.sh_info
-                if shndx in sections_shndx:
-                    sec = sections_shndx[shndx]
-                    sec.reloc_name = s.name
-                    sec.reloc = list(s.iter_relocations())
-                    for r in sec.reloc:
-                        r.sym = symtab[r["r_info_sym"]]
-
-        # Link symbols to their sections, and update known and unresolved symbols
-        for sym in symtab:
-            sym.filename = felf
-            shndx = sym.entry["st_shndx"]
+                    env.sections.append(sec)
+            elif s.name.startswith(".data"):
+                raise LinkError("{}: {} non-empty".format(felf, s.name))
+            else:
+                # Ignore section
+                pass
+        elif s.header.sh_type in ("SHT_REL", "SHT_RELA"):
+            shndx = s.header.sh_info
             if shndx in sections_shndx:
-                # Symbol with associated section
-                sym.section = sections_shndx[shndx]
-                if sym["st_info"]["bind"] in ("STB_GLOBAL", "STB_WEAK"):
-                    # Defined global symbol
-                    if sym.name in env.known_syms and not sym.name.startswith(
-                        "__x86.get_pc_thunk."
-                    ):
-                        raise LinkError("duplicate symbol: {}".format(sym.name))
-                    env.known_syms[sym.name] = sym
-            elif sym.entry["st_shndx"] == "SHN_UNDEF" and sym["st_info"]["bind"] == "STB_GLOBAL":
-                # Undefined global symbol, needs resolving
-                env.unresolved_syms.append(sym)
+                sec = sections_shndx[shndx]
+                sec.reloc_name = s.name
+                sec.reloc = list(s.iter_relocations())
+                for r in sec.reloc:
+                    r.sym = symtab[r["r_info_sym"]]
+
+    # Link symbols to their sections, and update known and unresolved symbols
+    dup_errors = []
+    for sym in symtab:
+        sym.filename = felf
+        shndx = sym.entry["st_shndx"]
+        if shndx in sections_shndx:
+            # Symbol with associated section
+            sym.section = sections_shndx[shndx]
+            if sym["st_info"]["bind"] in ("STB_GLOBAL", "STB_WEAK"):
+                # Defined global symbol
+                if sym.name in env.known_syms and not sym.name.startswith("__x86.get_pc_thunk."):
+                    dup_errors.append("duplicate symbol: {}".format(sym.name))
+                env.known_syms[sym.name] = sym
+        elif sym.entry["st_shndx"] == "SHN_UNDEF" and sym["st_info"]["bind"] == "STB_GLOBAL":
+            # Undefined global symbol, needs resolving
+            env.unresolved_syms.append(sym)
+    if dup_errors:
+        raise LinkError("\n".join(dup_errors))
 
 
 def link_objects(env, native_qstr_vals_len):
@@ -1188,6 +1201,8 @@ def link_objects(env, native_qstr_vals_len):
             ]
         )
     }
+
+    undef_errors = []
     for sym in env.unresolved_syms:
         assert sym["st_value"] == 0
         if sym.name == "_GLOBAL_OFFSET_TABLE_":
@@ -1200,12 +1215,27 @@ def link_objects(env, native_qstr_vals_len):
             sym.section = env.obj_table_section
         elif sym.name in env.known_syms:
             sym.resolved = env.known_syms[sym.name]
+        elif sym.name in env.externs:
+            # Fixed-address symbols do not need pre-processing.
+            continue
         else:
             if sym.name in fun_table:
                 sym.section = mp_fun_table_sec
                 sym.mp_fun_table_offset = fun_table[sym.name]
             else:
-                raise LinkError("{}: undefined symbol: {}".format(sym.filename, sym.name))
+                undef_errors.append("{}: undefined symbol: {}".format(sym.filename, sym.name))
+
+    for sym in env.externs:
+        if sym in env.known_syms:
+            log(
+                LOG_LEVEL_1,
+                "Symbol {} is a fixed-address symbol at {:08x} and is also provided from an object file".format(
+                    sym, env.externs[sym]
+                ),
+            )
+
+    if undef_errors:
+        raise LinkError("\n".join(undef_errors))
 
     # Align sections, assign their addresses, and create full_text
     env.full_text = bytearray(env.arch.asm_jump(8))  # dummy, to be filled in later
@@ -1446,8 +1476,30 @@ def do_link(args):
     log(LOG_LEVEL_2, "qstr vals: " + ", ".join(native_qstr_vals))
     env = LinkEnv(args.arch)
     try:
-        for file in args.files:
-            load_object_file(env, file)
+        if args.externs:
+            env.externs = parse_linkerscript(args.externs)
+
+        # Load object files
+        for fn in args.files:
+            with open(fn, "rb") as f:
+                load_object_file(env, f, fn)
+
+        if args.libs:
+            # Load archive info
+            archives = []
+            for item in args.libs:
+                archives.extend(ar_util.load_archive(item))
+            # List symbols to look for
+            syms = set(sym.name for sym in env.unresolved_syms)
+            # Resolve symbols from libs
+            lib_objs, _ = ar_util.resolve(archives, syms)
+            # Load extra object files from libs
+            for ar, obj in lib_objs:
+                obj_name = ar.fn + ":" + obj
+                log(LOG_LEVEL_2, "using " + obj_name)
+                with ar.open(obj) as f:
+                    load_object_file(env, f, obj_name)
+
         link_objects(env, len(native_qstr_vals))
         build_mpy(env, env.find_addr("mpy_init"), args.output, native_qstr_vals)
     except LinkError as er:
@@ -1455,19 +1507,73 @@ def do_link(args):
         sys.exit(1)
 
 
+def parse_linkerscript(source):
+    # This extracts fixed-address symbol lists from linkerscripts, only parsing
+    # a small subset of all possible directives.  Right now the only
+    # linkerscript file this is really tested against is the ESP8266's builtin
+    # ROM functions list ($SDK/ld/eagle.rom.addr.v6.ld).
+    #
+    # The parser should be able to handle symbol entries inside ESP-IDF's ROM
+    # symbol lists for the ESP32 range of MCUs as well (see *.ld files in
+    # $SDK/components/esp_rom/<name>/).
+
+    symbols = {}
+
+    LINE_REGEX = re.compile(
+        r'^(?P<weak>PROVIDE\()?'  # optional weak marker start
+        r'(?P<symbol>[a-zA-Z_]\w*)'  # symbol name
+        r'=0x(?P<address>[\da-fA-F]{1,8})*'  # symbol address
+        r'(?(weak)\));$',  # optional weak marker end and line terminator
+        re.ASCII,
+    )
+
+    inside_comment = False
+    for line in (line.strip() for line in source.readlines()):
+        if line.startswith('/*') and not inside_comment:
+            if not line.endswith('*/'):
+                inside_comment = True
+            continue
+        if inside_comment:
+            if line.endswith('*/'):
+                inside_comment = False
+            continue
+        if line.startswith('//'):
+            continue
+        match = LINE_REGEX.match(''.join(line.split()))
+        if not match:
+            continue
+        tokens = match.groupdict()
+        symbol = tokens['symbol']
+        address = int(tokens['address'], 16)
+        if symbol in symbols:
+            raise ValueError(f"Symbol {symbol} already defined")
+        symbols[symbol] = address
+    return symbols
+
+
 def main():
     import argparse
 
-    cmd_parser = argparse.ArgumentParser(description="Run scripts on the pyboard.")
+    cmd_parser = argparse.ArgumentParser(description="Link native object files into a MPY bundle.")
     cmd_parser.add_argument(
         "--verbose", "-v", action="count", default=1, help="increase verbosity"
     )
     cmd_parser.add_argument("--arch", default="x64", help="architecture")
     cmd_parser.add_argument("--preprocess", action="store_true", help="preprocess source files")
     cmd_parser.add_argument("--qstrs", default=None, help="file defining additional qstrs")
+    cmd_parser.add_argument(
+        "--libs", "-l", dest="libs", action="append", help="static .a libraries to link"
+    )
     cmd_parser.add_argument(
         "--output", "-o", default=None, help="output .mpy file (default to input with .o->.mpy)"
     )
+    cmd_parser.add_argument(
+        "--externs",
+        "-e",
+        type=argparse.FileType("rt"),
+        default=None,
+        help="linkerscript providing fixed-address symbols to augment symbol resolution",
+    )
     cmd_parser.add_argument("files", nargs="+", help="input files")
     args = cmd_parser.parse_args()
 
diff --git a/tools/pyboard.py b/tools/pyboard.py
index 0cf5b3d46596a..40928e8bbbe93 100755
--- a/tools/pyboard.py
+++ b/tools/pyboard.py
@@ -267,7 +267,15 @@ def inWaiting(self):
 
 class Pyboard:
     def __init__(
-        self, device, baudrate=115200, user="micro", password="python", wait=0, exclusive=True
+        self,
+        device,
+        baudrate=115200,
+        user="micro",
+        password="python",
+        wait=0,
+        exclusive=True,
+        timeout=None,
+        write_timeout=5,
     ):
         self.in_raw_repl = False
         self.use_raw_paste = True
@@ -283,7 +291,12 @@ def __init__(
             import serial.tools.list_ports
 
             # Set options, and exclusive if pyserial supports it
-            serial_kwargs = {"baudrate": baudrate, "interCharTimeout": 1}
+            serial_kwargs = {
+                "baudrate": baudrate,
+                "timeout": timeout,
+                "write_timeout": write_timeout,
+                "interCharTimeout": 1,
+            }
             if serial.__version__ >= "3.3":
                 serial_kwargs["exclusive"] = exclusive
 
@@ -323,14 +336,25 @@ def __init__(
     def close(self):
         self.serial.close()
 
-    def read_until(self, min_num_bytes, ending, timeout=10, data_consumer=None):
-        # if data_consumer is used then data is not accumulated and the ending must be 1 byte long
+    def read_until(
+        self, min_num_bytes, ending, timeout=10, data_consumer=None, timeout_overall=None
+    ):
+        """
+        min_num_bytes: Obsolete.
+        ending: Return if 'ending' matches.
+        timeout [s]: Return if timeout between characters. None: Infinite timeout.
+        timeout_overall [s]: Return not later than timeout_overall. None: Infinite timeout.
+        data_consumer: Use callback for incoming characters.
+            If data_consumer is used then data is not accumulated and the ending must be 1 byte long
+
+        It is not visible to the caller why the function returned. It could be ending or timeout.
+        """
         assert data_consumer is None or len(ending) == 1
+        assert isinstance(timeout, (type(None), int, float))
+        assert isinstance(timeout_overall, (type(None), int, float))
 
-        data = self.serial.read(min_num_bytes)
-        if data_consumer:
-            data_consumer(data)
-        timeout_count = 0
+        data = b""
+        begin_overall_s = begin_char_s = time.monotonic()
         while True:
             if data.endswith(ending):
                 break
@@ -341,15 +365,25 @@ def read_until(self, min_num_bytes, ending, timeout=10, data_consumer=None):
                     data = new_data
                 else:
                     data = data + new_data
-                timeout_count = 0
+                begin_char_s = time.monotonic()
             else:
-                timeout_count += 1
-                if timeout is not None and timeout_count >= 100 * timeout:
+                if timeout is not None and time.monotonic() >= begin_char_s + timeout:
+                    break
+                if (
+                    timeout_overall is not None
+                    and time.monotonic() >= begin_overall_s + timeout_overall
+                ):
                     break
                 time.sleep(0.01)
         return data
 
-    def enter_raw_repl(self, soft_reset=True):
+    def enter_raw_repl(self, soft_reset=True, timeout_overall=10):
+        try:
+            self._enter_raw_repl_unprotected(soft_reset, timeout_overall)
+        except OSError as er:
+            raise PyboardError("could not enter raw repl: {}".format(er))
+
+    def _enter_raw_repl_unprotected(self, soft_reset, timeout_overall):
         self.serial.write(b"\r\x03")  # ctrl-C: interrupt any running program
 
         # flush input (without relying on serial.flushInput())
@@ -361,7 +395,9 @@ def enter_raw_repl(self, soft_reset=True):
         self.serial.write(b"\r\x01")  # ctrl-A: enter raw REPL
 
         if soft_reset:
-            data = self.read_until(1, b"raw REPL; CTRL-B to exit\r\n>")
+            data = self.read_until(
+                1, b"raw REPL; CTRL-B to exit\r\n>", timeout_overall=timeout_overall
+            )
             if not data.endswith(b"raw REPL; CTRL-B to exit\r\n>"):
                 print(data)
                 raise PyboardError("could not enter raw repl")
@@ -371,12 +407,12 @@ def enter_raw_repl(self, soft_reset=True):
             # Waiting for "soft reboot" independently to "raw REPL" (done below)
             # allows boot.py to print, which will show up after "soft reboot"
             # and before "raw REPL".
-            data = self.read_until(1, b"soft reboot\r\n")
+            data = self.read_until(1, b"soft reboot\r\n", timeout_overall=timeout_overall)
             if not data.endswith(b"soft reboot\r\n"):
                 print(data)
                 raise PyboardError("could not enter raw repl")
 
-        data = self.read_until(1, b"raw REPL; CTRL-B to exit\r\n")
+        data = self.read_until(1, b"raw REPL; CTRL-B to exit\r\n", timeout_overall=timeout_overall)
         if not data.endswith(b"raw REPL; CTRL-B to exit\r\n"):
             print(data)
             raise PyboardError("could not enter raw repl")
@@ -530,7 +566,7 @@ def fs_listdir(self, src=""):
         def repr_consumer(b):
             buf.extend(b.replace(b"\x04", b""))
 
-        cmd = "import os\nfor f in os.ilistdir(%s):\n" " print(repr(f), end=',')" % (
+        cmd = "import os\nfor f in os.ilistdir(%s):\n print(repr(f), end=',')" % (
             ("'%s'" % src) if src else ""
         )
         try:
diff --git a/tools/pydfu.py b/tools/pydfu.py
index e1e4074a6baff..cd7354818cdea 100755
--- a/tools/pydfu.py
+++ b/tools/pydfu.py
@@ -344,8 +344,7 @@ def read_dfu_file(filename):
     #   B   uint8_t     targets     Number of targets
     dfu_prefix, data = consume("<5sBIB", data, "signature version size targets")
     print(
-        "    %(signature)s v%(version)d, image size: %(size)d, "
-        "targets: %(targets)d" % dfu_prefix
+        "    %(signature)s v%(version)d, image size: %(size)d, targets: %(targets)d" % dfu_prefix
     )
     for target_idx in range(dfu_prefix["targets"]):
         # Decode the Image Prefix
@@ -359,7 +358,7 @@ def read_dfu_file(filename):
         #   I       uint32_t    size        Size of image (without prefix)
         #   I       uint32_t    elements    Number of elements in the image
         img_prefix, data = consume(
-            "<6sBI255s2I", data, "signature altsetting named name " "size elements"
+            "<6sBI255s2I", data, "signature altsetting named name size elements"
         )
         img_prefix["num"] = target_idx
         if img_prefix["named"]:
diff --git a/tools/verifygitlog.py b/tools/verifygitlog.py
index 67215d5c5d066..dba6ebd6de59a 100755
--- a/tools/verifygitlog.py
+++ b/tools/verifygitlog.py
@@ -96,20 +96,47 @@ def verify_message_body(raw_body, err):
     if len(subject_line) >= 73:
         err.error("Subject line must be 72 or fewer characters: " + subject_line)
 
+    # Do additional checks on the prefix of the subject line.
+    verify_subject_line_prefix(subject_line.split(": ")[0], err)
+
     # Second one divides subject and body.
     if len(raw_body) > 1 and raw_body[1]:
         err.error("Second message line must be empty: " + raw_body[1])
 
     # Message body lines.
     for line in raw_body[2:]:
-        # Long lines with URLs are exempt from the line length rule.
-        if len(line) >= 76 and "://" not in line:
+        # Long lines with URLs or human names are exempt from the line length rule.
+        if len(line) >= 76 and not (
+            "://" in line
+            or line.startswith("Co-authored-by: ")
+            or line.startswith("Signed-off-by: ")
+        ):
             err.error("Message lines should be 75 or less characters: " + line)
 
     if not raw_body[-1].startswith("Signed-off-by: ") or "@" not in raw_body[-1]:
         err.error('Message must be signed-off. Use "git commit -s".')
 
 
+def verify_subject_line_prefix(prefix, err):
+    ext = (".c", ".h", ".cpp", ".js", ".rst", ".md")
+
+    if prefix.startswith((".", "/")):
+        err.error('Subject prefix cannot begin with "." or "/".')
+
+    if prefix.endswith("/"):
+        err.error('Subject prefix cannot end with "/".')
+
+    if prefix.startswith("ports/"):
+        err.error(
+            'Subject prefix cannot begin with "ports/", start with the name of the port instead.'
+        )
+
+    if prefix.endswith(ext):
+        err.error(
+            "Subject prefix cannot end with a file extension, use the main part of the filename without the extension."
+        )
+
+
 def run(args):
     verbose("run", *args)