From 8089d77e7a454a3c49bc8419eec14c356708f75d Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Fri, 14 Mar 2025 09:49:50 +0100 Subject: [PATCH 01/44] chore: update core version to 2.11.0-dev (0x021100F0) Signed-off-by: Frederic Pillon --- libraries/SrcWrapper/inc/stm32_def.h | 6 +++--- platform.txt | 4 ++-- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/libraries/SrcWrapper/inc/stm32_def.h b/libraries/SrcWrapper/inc/stm32_def.h index 920babfadd..82c8591178 100644 --- a/libraries/SrcWrapper/inc/stm32_def.h +++ b/libraries/SrcWrapper/inc/stm32_def.h @@ -6,15 +6,15 @@ * @brief STM32 core version number */ #define STM32_CORE_VERSION_MAJOR (0x02U) /*!< [31:24] major version */ -#define STM32_CORE_VERSION_MINOR (0x10U) /*!< [23:16] minor version */ -#define STM32_CORE_VERSION_PATCH (0x01U) /*!< [15:8] patch version */ +#define STM32_CORE_VERSION_MINOR (0x11U) /*!< [23:16] minor version */ +#define STM32_CORE_VERSION_PATCH (0x00U) /*!< [15:8] patch version */ /* * Extra label for development: * 0: official release * [1-9]: release candidate * F[0-9]: development */ -#define STM32_CORE_VERSION_EXTRA (0x00U) /*!< [7:0] extra version */ +#define STM32_CORE_VERSION_EXTRA (0xF0U) /*!< [7:0] extra version */ #define STM32_CORE_VERSION ((STM32_CORE_VERSION_MAJOR << 24U)\ |(STM32_CORE_VERSION_MINOR << 16U)\ |(STM32_CORE_VERSION_PATCH << 8U )\ diff --git a/platform.txt b/platform.txt index ac80a8ab7a..651928558f 100644 --- a/platform.txt +++ b/platform.txt @@ -5,7 +5,7 @@ # https://arduino.github.io/arduino-cli/latest/platform-specification/ name=STM32 boards groups (Board to be selected from Tools submenu 'Board part number') -version=2.10.1 +version=2.11.0-dev # Define variables used multiple times in platform file @@ -17,7 +17,7 @@ busybox= busybox.windows={runtime.tools.STM32Tools.path}/win/busybox.exe toolchain_dir={runtime.tools.xpack-arm-none-eabi-gcc-14.2.1-1.1.path} -openocd_dir={runtime.tools.xpack-openocd-0.12.0-6.path} +openocd_dir={runtime.tools.xpack-openocd-0.12.0-5.path} tools_bin_path.windows={runtime.tools.STM32Tools.path}/win tools_bin_path.macosx={runtime.tools.STM32Tools.path}/macosx From e4b9bc87edf4c674a33e7d053ad8b1c210cac4b9 Mon Sep 17 00:00:00 2001 From: patricklaf Date: Fri, 14 Mar 2025 15:17:47 +0100 Subject: [PATCH 02/44] Update stm32_def.h Fix wrong STM32_CORE_VERSION_MINOR. Signed-off-by: patricklaf --- libraries/SrcWrapper/inc/stm32_def.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/libraries/SrcWrapper/inc/stm32_def.h b/libraries/SrcWrapper/inc/stm32_def.h index 82c8591178..aaf37ad69a 100644 --- a/libraries/SrcWrapper/inc/stm32_def.h +++ b/libraries/SrcWrapper/inc/stm32_def.h @@ -6,7 +6,7 @@ * @brief STM32 core version number */ #define STM32_CORE_VERSION_MAJOR (0x02U) /*!< [31:24] major version */ -#define STM32_CORE_VERSION_MINOR (0x11U) /*!< [23:16] minor version */ +#define STM32_CORE_VERSION_MINOR (0x0BU) /*!< [23:16] minor version */ #define STM32_CORE_VERSION_PATCH (0x00U) /*!< [15:8] patch version */ /* * Extra label for development: From e3c33304dc8c618d802355537509ce6a34a1346c Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Wed, 19 Mar 2025 08:41:06 +0100 Subject: [PATCH 03/44] fix(f7): PLLR value Fixes #2692. Signed-off-by: Frederic Pillon --- .../F765V(G-I)(H-T)_F767V(G-I)(H-T)_F777VI(H-T)/generic_clock.c | 1 + .../variant_REMRAM_V1.cpp | 1 + .../STM32F7xx/F765Z(G-I)T_F767Z(G-I)T_F777ZIT/generic_clock.c | 1 + .../F765Z(G-I)T_F767Z(G-I)T_F777ZIT/variant_NUCLEO_F767ZI.cpp | 1 + 4 files changed, 4 insertions(+) diff --git a/variants/STM32F7xx/F765V(G-I)(H-T)_F767V(G-I)(H-T)_F777VI(H-T)/generic_clock.c b/variants/STM32F7xx/F765V(G-I)(H-T)_F767V(G-I)(H-T)_F777VI(H-T)/generic_clock.c index a675f0dd34..13caca1302 100644 --- a/variants/STM32F7xx/F765V(G-I)(H-T)_F767V(G-I)(H-T)_F777VI(H-T)/generic_clock.c +++ b/variants/STM32F7xx/F765V(G-I)(H-T)_F767V(G-I)(H-T)_F777VI(H-T)/generic_clock.c @@ -44,6 +44,7 @@ WEAK void SystemClock_Config(void) RCC_OscInitStruct.PLL.PLLN = 216; RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; RCC_OscInitStruct.PLL.PLLQ = 9; + RCC_OscInitStruct.PLL.PLLR = 2; if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { Error_Handler(); } diff --git a/variants/STM32F7xx/F765V(G-I)(H-T)_F767V(G-I)(H-T)_F777VI(H-T)/variant_REMRAM_V1.cpp b/variants/STM32F7xx/F765V(G-I)(H-T)_F767V(G-I)(H-T)_F777VI(H-T)/variant_REMRAM_V1.cpp index f5cc7298c8..73e1425990 100644 --- a/variants/STM32F7xx/F765V(G-I)(H-T)_F767V(G-I)(H-T)_F777VI(H-T)/variant_REMRAM_V1.cpp +++ b/variants/STM32F7xx/F765V(G-I)(H-T)_F767V(G-I)(H-T)_F777VI(H-T)/variant_REMRAM_V1.cpp @@ -172,6 +172,7 @@ WEAK void SystemClock_Config(void) RCC_OscInitStruct.PLL.PLLN = 216; RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; RCC_OscInitStruct.PLL.PLLQ = 9; + RCC_OscInitStruct.PLL.PLLR = 2; if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { Error_Handler(); } diff --git a/variants/STM32F7xx/F765Z(G-I)T_F767Z(G-I)T_F777ZIT/generic_clock.c b/variants/STM32F7xx/F765Z(G-I)T_F767Z(G-I)T_F777ZIT/generic_clock.c index 6a6389377e..738c40f096 100644 --- a/variants/STM32F7xx/F765Z(G-I)T_F767Z(G-I)T_F777ZIT/generic_clock.c +++ b/variants/STM32F7xx/F765Z(G-I)T_F767Z(G-I)T_F777ZIT/generic_clock.c @@ -42,6 +42,7 @@ WEAK void SystemClock_Config(void) RCC_OscInitStruct.PLL.PLLN = 216; RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; RCC_OscInitStruct.PLL.PLLQ = 9; + RCC_OscInitStruct.PLL.PLLR = 2; if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { Error_Handler(); } diff --git a/variants/STM32F7xx/F765Z(G-I)T_F767Z(G-I)T_F777ZIT/variant_NUCLEO_F767ZI.cpp b/variants/STM32F7xx/F765Z(G-I)T_F767Z(G-I)T_F777ZIT/variant_NUCLEO_F767ZI.cpp index 4ccba6b65d..c0f7688f94 100644 --- a/variants/STM32F7xx/F765Z(G-I)T_F767Z(G-I)T_F777ZIT/variant_NUCLEO_F767ZI.cpp +++ b/variants/STM32F7xx/F765Z(G-I)T_F767Z(G-I)T_F777ZIT/variant_NUCLEO_F767ZI.cpp @@ -212,6 +212,7 @@ WEAK void SystemClock_Config(void) RCC_OscInitStruct.PLL.PLLN = 216; RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; RCC_OscInitStruct.PLL.PLLQ = 9; + RCC_OscInitStruct.PLL.PLLR = 2; if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { Error_Handler(); } From 1ef1f862c81257c73d046a957194e3c541653988 Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Wed, 19 Mar 2025 08:42:06 +0100 Subject: [PATCH 04/44] chore(f7): use HSE bypass for Nucleo-F767ZI instead of HSI. Signed-off-by: Frederic Pillon --- .../variant_NUCLEO_F767ZI.cpp | 23 +++---------------- 1 file changed, 3 insertions(+), 20 deletions(-) diff --git a/variants/STM32F7xx/F765Z(G-I)T_F767Z(G-I)T_F777ZIT/variant_NUCLEO_F767ZI.cpp b/variants/STM32F7xx/F765Z(G-I)T_F767Z(G-I)T_F777ZIT/variant_NUCLEO_F767ZI.cpp index c0f7688f94..b7edea0f36 100644 --- a/variants/STM32F7xx/F765Z(G-I)T_F767Z(G-I)T_F777ZIT/variant_NUCLEO_F767ZI.cpp +++ b/variants/STM32F7xx/F765Z(G-I)T_F767Z(G-I)T_F777ZIT/variant_NUCLEO_F767ZI.cpp @@ -171,23 +171,6 @@ extern "C" { /** * @brief System Clock Configuration - * The system Clock is configured as follow : - * System Clock source = PLL (HSI) - * SYSCLK(Hz) = 216000000 - * HCLK(Hz) = 216000000 - * AHB Prescaler = 1 - * APB1 Prescaler = 4 - * APB2 Prescaler = 2 - * HSE Frequency(Hz) = 16000000 - * PLL_M = 8 - * PLL_N = 216 - * PLL_P = 2 - * PLL_Q = 9 - * PLLSAI_N = 192 - * PLLSAI_P = 2 - * VDD(V) = 3.3 - * Main regulator output voltage = Scale1 mode - * Flash Latency(WS) = 7 * @param None * @retval None */ @@ -203,12 +186,12 @@ WEAK void SystemClock_Config(void) __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); /* Initializes the CPU, AHB and APB busses clocks */ - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; - RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; RCC_OscInitStruct.HSICalibrationValue = 16; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; - RCC_OscInitStruct.PLL.PLLM = 8; + RCC_OscInitStruct.PLL.PLLM = 4; RCC_OscInitStruct.PLL.PLLN = 216; RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; RCC_OscInitStruct.PLL.PLLQ = 9; From 875fe4c29e20c37385d7e00fc3adee8e39f5712e Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Tue, 25 Mar 2025 10:33:39 +0100 Subject: [PATCH 05/44] system(l0) update STM32L0xx HAL Drivers to v1.10.7 Included in STM32CubeL0 FW v1.12.3 Signed-off-by: Frederic Pillon --- .../Inc/Legacy/stm32_hal_legacy.h | 152 ++++-- .../Inc/stm32l0xx_hal_cortex.h | 3 +- .../Inc/stm32l0xx_hal_crc.h | 2 +- .../Inc/stm32l0xx_hal_i2c.h | 2 - .../Inc/stm32l0xx_hal_i2s.h | 4 +- .../Inc/stm32l0xx_hal_lptim.h | 4 +- .../Inc/stm32l0xx_hal_pcd.h | 21 +- .../Inc/stm32l0xx_hal_pcd_ex.h | 1 - .../Inc/stm32l0xx_hal_rcc.h | 4 +- .../Inc/stm32l0xx_hal_rng.h | 6 +- .../Inc/stm32l0xx_hal_rtc.h | 2 +- .../Inc/stm32l0xx_hal_rtc_ex.h | 62 +-- .../Inc/stm32l0xx_hal_smbus.h | 2 - .../Inc/stm32l0xx_hal_spi.h | 46 +- .../Inc/stm32l0xx_hal_tim.h | 43 +- .../Inc/stm32l0xx_hal_uart.h | 8 +- .../Inc/stm32l0xx_hal_uart_ex.h | 2 +- .../Inc/stm32l0xx_hal_usart.h | 1 - .../Inc/stm32l0xx_hal_usart_ex.h | 2 +- .../Inc/stm32l0xx_ll_adc.h | 3 +- .../Inc/stm32l0xx_ll_cortex.h | 2 +- .../Inc/stm32l0xx_ll_crc.h | 20 +- .../Inc/stm32l0xx_ll_i2c.h | 9 +- .../Inc/stm32l0xx_ll_rng.h | 18 +- .../Inc/stm32l0xx_ll_rtc.h | 24 +- .../Inc/stm32l0xx_ll_spi.h | 153 +++--- .../Inc/stm32l0xx_ll_tim.h | 14 +- .../Inc/stm32l0xx_ll_usb.h | 31 +- .../Inc/stm32l0xx_ll_utils.h | 2 +- .../{License.md => LICENSE.md} | 0 .../STM32L0xx_HAL_Driver/Release_Notes.html | 199 +++++-- .../STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c | 2 +- .../Src/stm32l0xx_hal_adc.c | 13 +- .../Src/stm32l0xx_hal_adc_ex.c | 29 +- .../Src/stm32l0xx_hal_cortex.c | 90 ++-- .../Src/stm32l0xx_hal_crc.c | 2 +- .../Src/stm32l0xx_hal_crc_ex.c | 2 - .../Src/stm32l0xx_hal_cryp.c | 56 +- .../Src/stm32l0xx_hal_dac_ex.c | 53 +- .../Src/stm32l0xx_hal_exti.c | 4 +- .../Src/stm32l0xx_hal_flash.c | 8 +- .../Src/stm32l0xx_hal_flash_ex.c | 8 +- .../Src/stm32l0xx_hal_gpio.c | 2 +- .../Src/stm32l0xx_hal_i2c.c | 504 ++++++++++++++---- .../Src/stm32l0xx_hal_i2s.c | 82 ++- .../Src/stm32l0xx_hal_irda.c | 10 +- .../Src/stm32l0xx_hal_pcd.c | 103 ++-- .../Src/stm32l0xx_hal_pcd_ex.c | 2 - .../Src/stm32l0xx_hal_rcc.c | 10 +- .../Src/stm32l0xx_hal_rng.c | 21 +- .../Src/stm32l0xx_hal_rtc.c | 128 ++--- .../Src/stm32l0xx_hal_rtc_ex.c | 40 +- .../Src/stm32l0xx_hal_smartcard.c | 12 +- .../Src/stm32l0xx_hal_smbus.c | 51 +- .../Src/stm32l0xx_hal_smbus_ex.c | 2 + .../Src/stm32l0xx_hal_spi.c | 473 ++++++++-------- .../Src/stm32l0xx_hal_tim.c | 80 +-- .../Src/stm32l0xx_hal_uart.c | 264 +++++---- .../Src/stm32l0xx_hal_uart_ex.c | 91 ++-- .../Src/stm32l0xx_hal_usart.c | 26 +- .../Src/stm32l0xx_ll_crc.c | 2 +- .../Src/stm32l0xx_ll_rng.c | 2 +- .../Src/stm32l0xx_ll_spi.c | 9 +- .../Src/stm32l0xx_ll_tim.c | 3 +- .../Src/stm32l0xx_ll_usb.c | 120 +++-- .../Drivers/STM32YYxx_HAL_Driver_version.md | 2 +- 66 files changed, 1942 insertions(+), 1206 deletions(-) rename system/Drivers/STM32L0xx_HAL_Driver/{License.md => LICENSE.md} (100%) diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h b/system/Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h index e910b93084..77f0ab3c8f 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h +++ b/system/Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h @@ -7,7 +7,7 @@ ****************************************************************************** * @attention * - * Copyright (c) 2023 STMicroelectronics. + * Copyright (c) 2021 STMicroelectronics. * All rights reserved. * * This software is licensed under terms that can be found in the LICENSE file @@ -37,16 +37,12 @@ extern "C" { #define AES_CLEARFLAG_CCF CRYP_CLEARFLAG_CCF #define AES_CLEARFLAG_RDERR CRYP_CLEARFLAG_RDERR #define AES_CLEARFLAG_WRERR CRYP_CLEARFLAG_WRERR -#if defined(STM32U5) || defined(STM32H7) || defined(STM32MP1) +#if defined(STM32H7) || defined(STM32MP1) #define CRYP_DATATYPE_32B CRYP_NO_SWAP #define CRYP_DATATYPE_16B CRYP_HALFWORD_SWAP #define CRYP_DATATYPE_8B CRYP_BYTE_SWAP #define CRYP_DATATYPE_1B CRYP_BIT_SWAP -#if defined(STM32U5) -#define CRYP_CCF_CLEAR CRYP_CLEAR_CCF -#define CRYP_ERR_CLEAR CRYP_CLEAR_RWEIF -#endif /* STM32U5 */ -#endif /* STM32U5 || STM32H7 || STM32MP1 */ +#endif /* STM32H7 || STM32MP1 */ /** * @} */ @@ -279,7 +275,7 @@ extern "C" { #define DAC_WAVEGENERATION_NOISE DAC_WAVE_NOISE #define DAC_WAVEGENERATION_TRIANGLE DAC_WAVE_TRIANGLE -#if defined(STM32G4) || defined(STM32L5) || defined(STM32H7) || defined (STM32U5) +#if defined(STM32G4) || defined(STM32H7) || defined (STM32U5) #define DAC_CHIPCONNECT_DISABLE DAC_CHIPCONNECT_EXTERNAL #define DAC_CHIPCONNECT_ENABLE DAC_CHIPCONNECT_INTERNAL #endif @@ -476,7 +472,9 @@ extern "C" { #define TYPEPROGRAMDATA_FASTBYTE FLASH_TYPEPROGRAMDATA_FASTBYTE #define TYPEPROGRAMDATA_FASTHALFWORD FLASH_TYPEPROGRAMDATA_FASTHALFWORD #define TYPEPROGRAMDATA_FASTWORD FLASH_TYPEPROGRAMDATA_FASTWORD +#if !defined(STM32F2) && !defined(STM32F4) && !defined(STM32F7) && !defined(STM32H7) && !defined(STM32H5) #define PAGESIZE FLASH_PAGE_SIZE +#endif /* STM32F2 && STM32F4 && STM32F7 && STM32H7 && STM32H5 */ #define TYPEPROGRAM_FASTBYTE FLASH_TYPEPROGRAM_BYTE #define TYPEPROGRAM_FASTHALFWORD FLASH_TYPEPROGRAM_HALFWORD #define TYPEPROGRAM_FASTWORD FLASH_TYPEPROGRAM_WORD @@ -540,6 +538,10 @@ extern "C" { #define FLASH_FLAG_WDW FLASH_FLAG_WBNE #define OB_WRP_SECTOR_All OB_WRP_SECTOR_ALL #endif /* STM32H7 */ +#if defined(STM32H7RS) +#define FLASH_OPTKEY1 FLASH_OPT_KEY1 +#define FLASH_OPTKEY2 FLASH_OPT_KEY2 +#endif /* STM32H7RS */ #if defined(STM32U5) #define OB_USER_nRST_STOP OB_USER_NRST_STOP #define OB_USER_nRST_STDBY OB_USER_NRST_STDBY @@ -552,6 +554,16 @@ extern "C" { #define OB_SRAM134_RST_ERASE OB_SRAM_RST_ERASE #define OB_SRAM134_RST_NOT_ERASE OB_SRAM_RST_NOT_ERASE #endif /* STM32U5 */ +#if defined(STM32U0) +#define OB_USER_nRST_STOP OB_USER_NRST_STOP +#define OB_USER_nRST_STDBY OB_USER_NRST_STDBY +#define OB_USER_nRST_SHDW OB_USER_NRST_SHDW +#define OB_USER_nBOOT_SEL OB_USER_NBOOT_SEL +#define OB_USER_nBOOT0 OB_USER_NBOOT0 +#define OB_USER_nBOOT1 OB_USER_NBOOT1 +#define OB_nBOOT0_RESET OB_NBOOT0_RESET +#define OB_nBOOT0_SET OB_NBOOT0_SET +#endif /* STM32U0 */ /** * @} @@ -595,6 +607,15 @@ extern "C" { #define HAL_SYSCFG_DisableIOAnalogSwitchVDD HAL_SYSCFG_DisableIOSwitchVDD #endif /* STM32G4 */ +#if defined(STM32U5) + +#define HAL_SYSCFG_EnableIOAnalogSwitchBooster HAL_SYSCFG_EnableIOAnalogBooster +#define HAL_SYSCFG_DisableIOAnalogSwitchBooster HAL_SYSCFG_DisableIOAnalogBooster +#define HAL_SYSCFG_EnableIOAnalogSwitchVoltageSelection HAL_SYSCFG_EnableIOAnalogVoltageSelection +#define HAL_SYSCFG_DisableIOAnalogSwitchVoltageSelection HAL_SYSCFG_DisableIOAnalogVoltageSelection + +#endif /* STM32U5 */ + #if defined(STM32H5) #define SYSCFG_IT_FPU_IOC SBS_IT_FPU_IOC #define SYSCFG_IT_FPU_DZC SBS_IT_FPU_DZC @@ -800,6 +821,21 @@ extern "C" { #define GPIO_AF0_S2DSTOP GPIO_AF0_SRDSTOP #define GPIO_AF11_LPGPIO GPIO_AF11_LPGPIO1 #endif /* STM32U5 */ + +#if defined(STM32WBA) +#define GPIO_AF11_RF_ANTSW0 GPIO_AF11_RF +#define GPIO_AF11_RF_ANTSW1 GPIO_AF11_RF +#define GPIO_AF11_RF_ANTSW2 GPIO_AF11_RF +#define GPIO_AF11_RF_IO1 GPIO_AF11_RF +#define GPIO_AF11_RF_IO2 GPIO_AF11_RF +#define GPIO_AF11_RF_IO3 GPIO_AF11_RF +#define GPIO_AF11_RF_IO4 GPIO_AF11_RF +#define GPIO_AF11_RF_IO5 GPIO_AF11_RF +#define GPIO_AF11_RF_IO6 GPIO_AF11_RF +#define GPIO_AF11_RF_IO7 GPIO_AF11_RF +#define GPIO_AF11_RF_IO8 GPIO_AF11_RF +#define GPIO_AF11_RF_IO9 GPIO_AF11_RF +#endif /* STM32WBA */ /** * @} */ @@ -854,6 +890,10 @@ extern "C" { #define __HAL_HRTIM_SetCompare __HAL_HRTIM_SETCOMPARE #define __HAL_HRTIM_GetCompare __HAL_HRTIM_GETCOMPARE +#if defined(STM32F3) || defined(STM32G4) || defined(STM32H7) +#define HRTIMInterruptResquests HRTIMInterruptRequests +#endif /* STM32F3 || STM32G4 || STM32H7 */ + #if defined(STM32G4) #define HAL_HRTIM_ExternalEventCounterConfig HAL_HRTIM_ExtEventCounterConfig #define HAL_HRTIM_ExternalEventCounterEnable HAL_HRTIM_ExtEventCounterEnable @@ -991,8 +1031,8 @@ extern "C" { #define HRTIM_CALIBRATIONRATE_910 (HRTIM_DLLCR_CALRTE_0) #define HRTIM_CALIBRATIONRATE_114 (HRTIM_DLLCR_CALRTE_1) #define HRTIM_CALIBRATIONRATE_14 (HRTIM_DLLCR_CALRTE_1 | HRTIM_DLLCR_CALRTE_0) - #endif /* STM32F3 */ + /** * @} */ @@ -1243,10 +1283,10 @@ extern "C" { #define RTC_TAMPERPIN_PA0 RTC_TAMPERPIN_POS1 #define RTC_TAMPERPIN_PI8 RTC_TAMPERPIN_POS1 -#if defined(STM32H5) +#if defined(STM32H5) || defined(STM32H7RS) || defined(STM32N6) #define TAMP_SECRETDEVICE_ERASE_NONE TAMP_DEVICESECRETS_ERASE_NONE #define TAMP_SECRETDEVICE_ERASE_BKP_SRAM TAMP_DEVICESECRETS_ERASE_BKPSRAM -#endif /* STM32H5 */ +#endif /* STM32H5 || STM32H7RS || STM32N6 */ #if defined(STM32WBA) #define TAMP_SECRETDEVICE_ERASE_NONE TAMP_DEVICESECRETS_ERASE_NONE @@ -1258,27 +1298,27 @@ extern "C" { #define TAMP_SECRETDEVICE_ERASE_ALL TAMP_DEVICESECRETS_ERASE_ALL #endif /* STM32WBA */ -#if defined(STM32H5) || defined(STM32WBA) +#if defined(STM32H5) || defined(STM32WBA) || defined(STM32H7RS) || defined(STM32N6) #define TAMP_SECRETDEVICE_ERASE_DISABLE TAMP_DEVICESECRETS_ERASE_NONE #define TAMP_SECRETDEVICE_ERASE_ENABLE TAMP_SECRETDEVICE_ERASE_ALL -#endif /* STM32H5 || STM32WBA */ +#endif /* STM32H5 || STM32WBA || STM32H7RS || STM32N6 */ -#if defined(STM32F7) +#if defined(STM32F7) || defined(STM32WB) #define RTC_TAMPCR_TAMPXE RTC_TAMPER_ENABLE_BITS_MASK #define RTC_TAMPCR_TAMPXIE RTC_TAMPER_IT_ENABLE_BITS_MASK -#endif /* STM32F7 */ +#endif /* STM32F7 || STM32WB */ #if defined(STM32H7) #define RTC_TAMPCR_TAMPXE RTC_TAMPER_X #define RTC_TAMPCR_TAMPXIE RTC_TAMPER_X_INTERRUPT #endif /* STM32H7 */ -#if defined(STM32F7) || defined(STM32H7) || defined(STM32L0) +#if defined(STM32F7) || defined(STM32H7) || defined(STM32L0) || defined(STM32WB) #define RTC_TAMPER1_INTERRUPT RTC_IT_TAMP1 #define RTC_TAMPER2_INTERRUPT RTC_IT_TAMP2 #define RTC_TAMPER3_INTERRUPT RTC_IT_TAMP3 #define RTC_ALL_TAMPER_INTERRUPT RTC_IT_TAMP -#endif /* STM32F7 || STM32H7 || STM32L0 */ +#endif /* STM32F7 || STM32H7 || STM32L0 || STM32WB */ /** * @} @@ -1445,7 +1485,7 @@ extern "C" { #define TIM_TIM3_TI1_COMP1COMP2_OUT TIM_TIM3_TI1_COMP1_COMP2 #endif -#if defined(STM32U5) +#if defined(STM32U5) || defined(STM32MP2) #define OCREF_CLEAR_SELECT_Pos OCREF_CLEAR_SELECT_POS #define OCREF_CLEAR_SELECT_Msk OCREF_CLEAR_SELECT_MSK #endif @@ -1599,6 +1639,8 @@ extern "C" { #define ETH_MAC_SMALL_FIFO_RW_ACTIVE 0x00000006U /* MAC small FIFO read / write controllers active */ #define ETH_MAC_MII_RECEIVE_PROTOCOL_ACTIVE 0x00000001U /* MAC MII receive protocol engine active */ +#define ETH_TxPacketConfig ETH_TxPacketConfigTypeDef /* Transmit Packet Configuration structure definition */ + /** * @} */ @@ -1809,7 +1851,7 @@ extern "C" { #define HAL_FMPI2CEx_AnalogFilter_Config HAL_FMPI2CEx_ConfigAnalogFilter #define HAL_FMPI2CEx_DigitalFilter_Config HAL_FMPI2CEx_ConfigDigitalFilter -#define HAL_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus, cmd) ((cmd == ENABLE)? \ +#define HAL_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus, cmd) (((cmd) == ENABLE)? \ HAL_I2CEx_EnableFastModePlus(SYSCFG_I2CFastModePlus): \ HAL_I2CEx_DisableFastModePlus(SYSCFG_I2CFastModePlus)) @@ -1991,12 +2033,12 @@ extern "C" { /** @defgroup HAL_RTC_Aliased_Functions HAL RTC Aliased Functions maintained for legacy purpose * @{ */ -#if defined(STM32H5) || defined(STM32WBA) +#if defined(STM32H5) || defined(STM32WBA) || defined(STM32H7RS) || defined(STM32N6) #define HAL_RTCEx_SetBoothardwareKey HAL_RTCEx_LockBootHardwareKey #define HAL_RTCEx_BKUPBlock_Enable HAL_RTCEx_BKUPBlock #define HAL_RTCEx_BKUPBlock_Disable HAL_RTCEx_BKUPUnblock #define HAL_RTCEx_Erase_SecretDev_Conf HAL_RTCEx_ConfigEraseDeviceSecrets -#endif /* STM32H5 || STM32WBA */ +#endif /* STM32H5 || STM32WBA || STM32H7RS || STM32N6 */ /** * @} @@ -2311,8 +2353,8 @@ extern "C" { #define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \ ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \ __HAL_COMP_COMP6_EXTI_CLEAR_FLAG()) -# endif -# if defined(STM32F302xE) || defined(STM32F302xC) +#endif +#if defined(STM32F302xE) || defined(STM32F302xC) #define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \ ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \ ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : \ @@ -2345,8 +2387,8 @@ extern "C" { ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \ ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \ __HAL_COMP_COMP6_EXTI_CLEAR_FLAG()) -# endif -# if defined(STM32F303xE) || defined(STM32F398xx) || defined(STM32F303xC) || defined(STM32F358xx) +#endif +#if defined(STM32F303xE) || defined(STM32F398xx) || defined(STM32F303xC) || defined(STM32F358xx) #define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \ ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \ ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_RISING_EDGE() : \ @@ -2403,8 +2445,8 @@ extern "C" { ((__FLAG__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_CLEAR_FLAG() : \ ((__FLAG__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_CLEAR_FLAG() : \ __HAL_COMP_COMP7_EXTI_CLEAR_FLAG()) -# endif -# if defined(STM32F373xC) ||defined(STM32F378xx) +#endif +#if defined(STM32F373xC) ||defined(STM32F378xx) #define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \ __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE()) #define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \ @@ -2421,7 +2463,7 @@ extern "C" { __HAL_COMP_COMP2_EXTI_GET_FLAG()) #define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \ __HAL_COMP_COMP2_EXTI_CLEAR_FLAG()) -# endif +#endif #else #define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \ __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE()) @@ -2723,6 +2765,12 @@ extern "C" { #define __APB1_RELEASE_RESET __HAL_RCC_APB1_RELEASE_RESET #define __APB2_FORCE_RESET __HAL_RCC_APB2_FORCE_RESET #define __APB2_RELEASE_RESET __HAL_RCC_APB2_RELEASE_RESET +#if defined(STM32C0) +#define __HAL_RCC_APB1_FORCE_RESET __HAL_RCC_APB1_GRP1_FORCE_RESET +#define __HAL_RCC_APB1_RELEASE_RESET __HAL_RCC_APB1_GRP1_RELEASE_RESET +#define __HAL_RCC_APB2_FORCE_RESET __HAL_RCC_APB1_GRP2_FORCE_RESET +#define __HAL_RCC_APB2_RELEASE_RESET __HAL_RCC_APB1_GRP2_RELEASE_RESET +#endif /* STM32C0 */ #define __BKP_CLK_DISABLE __HAL_RCC_BKP_CLK_DISABLE #define __BKP_CLK_ENABLE __HAL_RCC_BKP_CLK_ENABLE #define __BKP_FORCE_RESET __HAL_RCC_BKP_FORCE_RESET @@ -3646,8 +3694,12 @@ extern "C" { #define RCC_MCOSOURCE_PLLCLK_NODIV RCC_MCO1SOURCE_PLLCLK #define RCC_MCOSOURCE_PLLCLK_DIV2 RCC_MCO1SOURCE_PLLCLK_DIV2 +#if defined(STM32U0) +#define RCC_SYSCLKSOURCE_STATUS_PLLR RCC_SYSCLKSOURCE_STATUS_PLLCLK +#endif + #if defined(STM32L4) || defined(STM32WB) || defined(STM32G0) || defined(STM32G4) || defined(STM32L5) || \ - defined(STM32WL) || defined(STM32C0) + defined(STM32WL) || defined(STM32C0) || defined(STM32N6) || defined(STM32H7RS) || defined(STM32U0) #define RCC_RTCCLKSOURCE_NO_CLK RCC_RTCCLKSOURCE_NONE #else #define RCC_RTCCLKSOURCE_NONE RCC_RTCCLKSOURCE_NO_CLK @@ -3749,8 +3801,10 @@ extern "C" { #define __HAL_RCC_GET_DFSDM_SOURCE __HAL_RCC_GET_DFSDM1_SOURCE #define RCC_DFSDM1CLKSOURCE_PCLK RCC_DFSDM1CLKSOURCE_PCLK2 #define RCC_SWPMI1CLKSOURCE_PCLK RCC_SWPMI1CLKSOURCE_PCLK1 +#if !defined(STM32U0) #define RCC_LPTIM1CLKSOURCE_PCLK RCC_LPTIM1CLKSOURCE_PCLK1 #define RCC_LPTIM2CLKSOURCE_PCLK RCC_LPTIM2CLKSOURCE_PCLK1 +#endif #define RCC_DFSDM1AUDIOCLKSOURCE_I2SAPB1 RCC_DFSDM1AUDIOCLKSOURCE_I2S1 #define RCC_DFSDM1AUDIOCLKSOURCE_I2SAPB2 RCC_DFSDM1AUDIOCLKSOURCE_I2S2 @@ -3896,7 +3950,8 @@ extern "C" { */ #if defined (STM32G0) || defined (STM32L5) || defined (STM32L412xx) || defined (STM32L422xx) || \ defined (STM32L4P5xx)|| defined (STM32L4Q5xx) || defined (STM32G4) || defined (STM32WL) || defined (STM32U5) || \ - defined (STM32WBA) || defined (STM32H5) || defined (STM32C0) + defined (STM32WBA) || defined (STM32H5) || defined (STM32C0) || defined (STM32N6) || defined (STM32H7RS) || \ + defined (STM32U0) || defined (STM32U3) #else #define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG #endif @@ -3931,6 +3986,13 @@ extern "C" { __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GENERATE_SWIT())) #endif /* STM32F1 */ +#if defined (STM32F0) || defined (STM32F2) || defined (STM32F3) || defined (STM32F4) || defined (STM32F7) || \ + defined (STM32H7) || \ + defined (STM32L0) || defined (STM32L1) || \ + defined (STM32WB) +#define __HAL_RTC_TAMPER_GET_IT __HAL_RTC_TAMPER_GET_FLAG +#endif + #define IS_ALARM IS_RTC_ALARM #define IS_ALARM_MASK IS_RTC_ALARM_MASK #define IS_TAMPER IS_RTC_TAMPER @@ -4183,6 +4245,33 @@ extern "C" { #define HAL_PCD_SetTxFiFo HAL_PCDEx_SetTxFiFo #define HAL_PCD_SetRxFiFo HAL_PCDEx_SetRxFiFo +#if defined(STM32U5) +#define USB_OTG_GOTGCTL_BSESVLD USB_OTG_GOTGCTL_BSVLD +#define USB_OTG_GAHBCFG_GINT USB_OTG_GAHBCFG_GINTMSK +#define USB_OTG_GUSBCFG_PHYLPCS USB_OTG_GUSBCFG_PHYLPC +#define USB_OTG_GRSTCTL_HSRST USB_OTG_GRSTCTL_PSRST +#define USB_OTG_GINTSTS_BOUTNAKEFF USB_OTG_GINTSTS_GONAKEFF +#define USB_OTG_GINTSTS_WKUINT USB_OTG_GINTSTS_WKUPINT +#define USB_OTG_GINTMSK_PXFRM_IISOOXFRM USB_OTG_GINTMSK_IPXFRM_IISOOXFRM +#define USB_OTG_GRXSTSP_EPNUM USB_OTG_GRXSTSP_EPNUM_CHNUM +#define USB_OTG_GLPMCFG_L1ResumeOK USB_OTG_GLPMCFG_L1RSMOK +#define USB_OTG_HPTXFSIZ_PTXFD USB_OTG_HPTXFSIZ_PTXFSIZ +#define USB_OTG_HCCHAR_MC USB_OTG_HCCHAR_MCNT +#define USB_OTG_HCCHAR_MC_0 USB_OTG_HCCHAR_MCNT_0 +#define USB_OTG_HCCHAR_MC_1 USB_OTG_HCCHAR_MCNT_1 +#define USB_OTG_HCINTMSK_AHBERR USB_OTG_HCINTMSK_AHBERRM +#define USB_OTG_HCTSIZ_DOPING USB_OTG_HCTSIZ_DOPNG +#define USB_OTG_DOEPMSK_OPEM USB_OTG_DOEPMSK_OUTPKTERRM +#define USB_OTG_DIEPCTL_SODDFRM USB_OTG_DIEPCTL_SD1PID_SODDFRM +#define USB_OTG_DIEPTSIZ_MULCNT USB_OTG_DIEPTSIZ_MCNT +#define USB_OTG_DOEPCTL_SODDFRM USB_OTG_DOEPCTL_SD1PID_SODDFRM +#define USB_OTG_DOEPCTL_DPID USB_OTG_DOEPCTL_DPID_EONUM +#define USB_OTG_DOEPTSIZ_STUPCNT USB_OTG_DOEPTSIZ_RXDPID +#define USB_OTG_DOEPTSIZ_STUPCNT_0 USB_OTG_DOEPTSIZ_RXDPID_0 +#define USB_OTG_DOEPTSIZ_STUPCNT_1 USB_OTG_DOEPTSIZ_RXDPID_1 +#define USB_OTG_PCGCCTL_STOPCLK USB_OTG_PCGCCTL_STPPCLK +#define USB_OTG_PCGCCTL_GATECLK USB_OTG_PCGCCTL_GATEHCLK +#endif /** * @} */ @@ -4212,6 +4301,9 @@ extern "C" { #define __HAL_TIM_GetCompare __HAL_TIM_GET_COMPARE #define TIM_BREAKINPUTSOURCE_DFSDM TIM_BREAKINPUTSOURCE_DFSDM1 + +#define TIM_OCMODE_ASSYMETRIC_PWM1 TIM_OCMODE_ASYMMETRIC_PWM1 +#define TIM_OCMODE_ASSYMETRIC_PWM2 TIM_OCMODE_ASYMMETRIC_PWM2 /** * @} */ diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h index ec7ca51517..8494671dc0 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h +++ b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h @@ -261,6 +261,8 @@ void HAL_SYSTICK_Callback(void); #if (__MPU_PRESENT == 1U) void HAL_MPU_Enable(uint32_t MPU_Control); void HAL_MPU_Disable(void); +void HAL_MPU_EnableRegion(uint32_t RegionNumber); +void HAL_MPU_DisableRegion(uint32_t RegionNumber); void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init); #endif /* __MPU_PRESENT */ /** @@ -361,4 +363,3 @@ void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init); - diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_crc.h b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_crc.h index 284740558e..d9544b4e23 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_crc.h +++ b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_crc.h @@ -318,7 +318,7 @@ uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t /** @defgroup CRC_Exported_Functions_Group3 Peripheral State functions * @{ */ -HAL_CRC_StateTypeDef HAL_CRC_GetState(CRC_HandleTypeDef *hcrc); +HAL_CRC_StateTypeDef HAL_CRC_GetState(const CRC_HandleTypeDef *hcrc); /** * @} */ diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h index 0376a42b32..4f55b941bf 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h +++ b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h @@ -118,8 +118,6 @@ typedef enum HAL_I2C_STATE_BUSY_RX_LISTEN = 0x2AU, /*!< Address Listen Mode and Data Reception process is ongoing */ HAL_I2C_STATE_ABORT = 0x60U, /*!< Abort user request ongoing */ - HAL_I2C_STATE_TIMEOUT = 0xA0U, /*!< Timeout state */ - HAL_I2C_STATE_ERROR = 0xE0U /*!< Error */ } HAL_I2C_StateTypeDef; diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2s.h b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2s.h index 4e9cd3208b..16082d7153 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2s.h +++ b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2s.h @@ -452,8 +452,8 @@ void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s); * @{ */ /* Peripheral Control and State functions ************************************/ -HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s); -uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s); +HAL_I2S_StateTypeDef HAL_I2S_GetState(const I2S_HandleTypeDef *hi2s); +uint32_t HAL_I2S_GetError(const I2S_HandleTypeDef *hi2s); /** * @} */ diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_lptim.h b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_lptim.h index decdde9af5..38d8058f1e 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_lptim.h +++ b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_lptim.h @@ -390,6 +390,7 @@ typedef void (*pLPTIM_CallbackTypeDef)(LPTIM_HandleTypeDef *hlptim); /*!< poin * @brief Write the passed parameter in the Autoreload register. * @param __HANDLE__ LPTIM handle * @param __VALUE__ Autoreload value + * This parameter must be a value between Min_Data = 0x0001 and Max_Data = 0xFFFF. * @retval None * @note The ARR register can only be modified when the LPTIM instance is enabled. */ @@ -732,9 +733,6 @@ HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(const LPTIM_HandleTypeDef *hlptim); #define IS_LPTIM_COUNTER_SOURCE(__SOURCE__) (((__SOURCE__) == LPTIM_COUNTERSOURCE_INTERNAL) || \ ((__SOURCE__) == LPTIM_COUNTERSOURCE_EXTERNAL)) -#define IS_LPTIM_AUTORELOAD(__AUTORELOAD__) ((0x00000001UL <= (__AUTORELOAD__)) &&\ - ((__AUTORELOAD__) <= 0x0000FFFFUL)) - #define IS_LPTIM_COMPARE(__COMPARE__) ((__COMPARE__) <= 0x0000FFFFUL) #define IS_LPTIM_PERIOD(__PERIOD__) ((0x00000001UL <= (__PERIOD__)) &&\ diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pcd.h b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pcd.h index f3bf6290fd..9a297f7188 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pcd.h +++ b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pcd.h @@ -339,7 +339,7 @@ HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); -uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); +uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef const *hpcd, uint8_t ep_addr); /** * @} */ @@ -348,7 +348,7 @@ uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions * @{ */ -PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd); +PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef const *hpcd); /** * @} */ @@ -806,20 +806,17 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd); \ *(pdwReg) &= 0x3FFU; \ \ - if ((wCount) > 62U) \ + if ((wCount) == 0U) \ { \ - PCD_CALC_BLK32((pdwReg), (wCount), wNBlocks); \ + *(pdwReg) |= USB_CNTRX_BLSIZE; \ + } \ + else if ((wCount) <= 62U) \ + { \ + PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \ } \ else \ { \ - if ((wCount) == 0U) \ - { \ - *(pdwReg) |= USB_CNTRX_BLSIZE; \ - } \ - else \ - { \ - PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \ - } \ + PCD_CALC_BLK32((pdwReg), (wCount), wNBlocks); \ } \ } while(0) /* PCD_SET_EP_CNT_RX_REG */ diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pcd_ex.h b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pcd_ex.h index 1bb4f2830f..0061e2a068 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pcd_ex.h +++ b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pcd_ex.h @@ -47,7 +47,6 @@ extern "C" { */ - HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr, uint16_t ep_kind, uint32_t pmaadress); diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h index ce181c1dd7..d0223c3126 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h +++ b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h @@ -1686,8 +1686,8 @@ typedef struct /* Initialization and de-initialization functions ******************************/ HAL_StatusTypeDef HAL_RCC_DeInit(void); -HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct); -HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency); +HAL_StatusTypeDef HAL_RCC_OscConfig(const RCC_OscInitTypeDef *RCC_OscInitStruct); +HAL_StatusTypeDef HAL_RCC_ClockConfig(const RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency); /** * @} diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rng.h b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rng.h index f18f89b1d1..759c5451b7 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rng.h +++ b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rng.h @@ -304,7 +304,7 @@ uint32_t HAL_RNG_GetRandomNumber_IT(RNG_HandleTypeDef *hrng); /* Obsolete, use HAL_RNG_GenerateRandomNumber_IT() instead */ HAL_StatusTypeDef HAL_RNG_GenerateRandomNumber(RNG_HandleTypeDef *hrng, uint32_t *random32bit); HAL_StatusTypeDef HAL_RNG_GenerateRandomNumber_IT(RNG_HandleTypeDef *hrng); -uint32_t HAL_RNG_ReadLastRandomNumber(RNG_HandleTypeDef *hrng); +uint32_t HAL_RNG_ReadLastRandomNumber(const RNG_HandleTypeDef *hrng); void HAL_RNG_IRQHandler(RNG_HandleTypeDef *hrng); void HAL_RNG_ErrorCallback(RNG_HandleTypeDef *hrng); @@ -317,8 +317,8 @@ void HAL_RNG_ReadyDataCallback(RNG_HandleTypeDef *hrng, uint32_t random32bit); /** @defgroup RNG_Exported_Functions_Group3 Peripheral State functions * @{ */ -HAL_RNG_StateTypeDef HAL_RNG_GetState(RNG_HandleTypeDef *hrng); -uint32_t HAL_RNG_GetError(RNG_HandleTypeDef *hrng); +HAL_RNG_StateTypeDef HAL_RNG_GetState(const RNG_HandleTypeDef *hrng); +uint32_t HAL_RNG_GetError(const RNG_HandleTypeDef *hrng); /** * @} */ diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h index 91f7654bb0..0a6ccb9355 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h +++ b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h @@ -813,7 +813,7 @@ HAL_RTCStateTypeDef HAL_RTC_GetState(RTC_HandleTypeDef *hrtc); #define RTC_TIMEOUT_VALUE 1000U -#define RTC_EXTI_LINE_ALARM_EVENT EXTI_IMR_IM17 /*!< External interrupt line 17 Connected to the RTC Alarm event */ +#define RTC_EXTI_LINE_ALARM_EVENT EXTI_IMR_IM17 /*!< External interrupt line 17 connected to the RTC Alarm event */ /** * @} */ diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h index d1b03ef85b..7f5d2cfd85 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h +++ b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h @@ -60,7 +60,7 @@ typedef struct This parameter can be a value of @ref RTCEx_Tamper_EraseBackUp_Definitions */ uint32_t MaskFlag; /*!< Specifies the Tamper Flag masking. - This parameter can be a value of @ref RTCEx_Tamper_MaskFlag_Definitions */ + This parameter can be a value of @ref RTCEx_Tamper_MaskFlag_Definitions */ uint32_t Filter; /*!< Specifies the RTC Filter Tamper. This parameter can be a value of @ref RTCEx_Tamper_Filter_Definitions */ @@ -641,11 +641,11 @@ typedef struct * @param __INTERRUPT__ specifies the RTC Tamper interrupt sources to be enabled. * This parameter can be any combination of the following values: * @arg RTC_IT_TAMP: Tamper global interrupt - * @arg RTC_IT_TAMP1: Tamper 1 interrupt + * @arg RTC_IT_TAMP1: Tamper 1 interrupt (*) * @arg RTC_IT_TAMP2: Tamper 2 interrupt - * @arg RTC_IT_TAMP3: Tamper 3 interrupt - * @note RTC_IT_TAMP1 is not applicable to all devices. - * @note RTC_IT_TAMP3 is not applicable to all devices. + * @arg RTC_IT_TAMP3: Tamper 3 interrupt (*) + * + * (*) value not applicable to all devices. * @retval None */ #define __HAL_RTC_TAMPER_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->TAMPCR |= (__INTERRUPT__)) @@ -656,40 +656,26 @@ typedef struct * @param __INTERRUPT__ specifies the RTC Tamper interrupt sources to be disabled. * This parameter can be any combination of the following values: * @arg RTC_IT_TAMP: Tamper global interrupt - * @arg RTC_IT_TAMP1: Tamper 1 interrupt + * @arg RTC_IT_TAMP1: Tamper 1 interrupt (*) * @arg RTC_IT_TAMP2: Tamper 2 interrupt - * @arg RTC_IT_TAMP3: Tamper 3 interrupt - * @note RTC_IT_TAMP1 is not applicable to all devices. - * @note RTC_IT_TAMP3 is not applicable to all devices. + * @arg RTC_IT_TAMP3: Tamper 3 interrupt (*) + * + * (*) value not applicable to all devices. * @retval None */ #define __HAL_RTC_TAMPER_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->TAMPCR &= ~(__INTERRUPT__)) -/** - * @brief Check whether the specified RTC Tamper interrupt has occurred or not. - * @param __HANDLE__ specifies the RTC handle. - * @param __INTERRUPT__ specifies the RTC Tamper interrupt to check. - * This parameter can be: - * @arg RTC_IT_TAMP1: Tamper 1 interrupt - * @arg RTC_IT_TAMP2: Tamper 2 interrupt - * @arg RTC_IT_TAMP3: Tamper 3 interrupt - * @note RTC_IT_TAMP1 is not applicable to all devices. - * @note RTC_IT_TAMP3 is not applicable to all devices. - * @retval None - */ -#define __HAL_RTC_TAMPER_GET_IT(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->ISR) & ((__INTERRUPT__) >> 4U)) != 0U) ? 1U : 0U) - /** * @brief Check whether the specified RTC Tamper interrupt has been enabled or not. * @param __HANDLE__ specifies the RTC handle. * @param __INTERRUPT__ specifies the RTC Tamper interrupt source to check. * This parameter can be: * @arg RTC_IT_TAMP: Tamper global interrupt - * @arg RTC_IT_TAMP1: Tamper 1 interrupt + * @arg RTC_IT_TAMP1: Tamper 1 interrupt (*) * @arg RTC_IT_TAMP2: Tamper 2 interrupt - * @arg RTC_IT_TAMP3: Tamper 3 interrupt - * @note RTC_IT_TAMP1 is not applicable to all devices. - * @note RTC_IT_TAMP3 is not applicable to all devices. + * @arg RTC_IT_TAMP3: Tamper 3 interrupt (*) + * + * (*) value not applicable to all devices. * @retval None */ #define __HAL_RTC_TAMPER_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->TAMPCR) & (__INTERRUPT__)) != 0U) ? 1U : 0U) @@ -699,11 +685,11 @@ typedef struct * @param __HANDLE__ specifies the RTC handle. * @param __FLAG__ specifies the RTC Tamper flag to be checked. * This parameter can be: - * @arg RTC_FLAG_TAMP1F: Tamper 1 interrupt flag + * @arg RTC_FLAG_TAMP1F: Tamper 1 interrupt flag (*) * @arg RTC_FLAG_TAMP2F: Tamper 2 interrupt flag - * @arg RTC_FLAG_TAMP3F: Tamper 3 interrupt flag - * @note RTC_FLAG_TAMP1F is not applicable to all devices. - * @note RTC_FLAG_TAMP3F is not applicable to all devices. + * @arg RTC_FLAG_TAMP3F: Tamper 3 interrupt flag (*) + * + * (*) value not applicable to all devices. * @retval None */ #define __HAL_RTC_TAMPER_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != 0U)? 1U : 0U) @@ -713,11 +699,11 @@ typedef struct * @param __HANDLE__ specifies the RTC handle. * @param __FLAG__ specifies the RTC Tamper Flag to clear. * This parameter can be: - * @arg RTC_FLAG_TAMP1F: Tamper 1 interrupt flag + * @arg RTC_FLAG_TAMP1F: Tamper 1 interrupt flag (*) * @arg RTC_FLAG_TAMP2F: Tamper 2 interrupt flag - * @arg RTC_FLAG_TAMP3F: Tamper 3 interrupt flag - * @note RTC_FLAG_TAMP1F is not applicable to all devices. - * @note RTC_FLAG_TAMP3F is not applicable to all devices. + * @arg RTC_FLAG_TAMP3F: Tamper 3 interrupt flag (*) + * + * (*) value not applicable to all devices. * @retval None */ #define __HAL_RTC_TAMPER_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR) = (~((__FLAG__) | RTC_ISR_INIT)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT)) @@ -746,13 +732,13 @@ typedef struct * @brief Enable event on the RTC Tamper and Timestamp associated EXTI line. * @retval None. */ -#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_EVENT() (EXTI->EMR |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT) +#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_EVENT() (EXTI->EMR |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT) /** * @brief Disable event on the RTC Tamper and Timestamp associated EXTI line. * @retval None. */ -#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT) +#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT) /** * @brief Enable falling edge trigger on the RTC Tamper and Timestamp associated EXTI line. @@ -947,7 +933,7 @@ HAL_StatusTypeDef HAL_RTCEx_DisableBypassShadow(RTC_HandleTypeDef *hrtc); * @{ */ /* Extended RTC features functions *******************************************/ -void HAL_RTCEx_AlarmBEventCallback(RTC_HandleTypeDef *hrtc); +void HAL_RTCEx_AlarmBEventCallback(RTC_HandleTypeDef *hrtc); HAL_StatusTypeDef HAL_RTCEx_PollForAlarmBEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout); /** * @} diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_smbus.h b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_smbus.h index aea09a4bbe..cb37a09b3d 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_smbus.h +++ b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_smbus.h @@ -100,8 +100,6 @@ typedef struct #define HAL_SMBUS_STATE_MASTER_BUSY_RX (0x00000022U) /*!< Master Data Reception process is ongoing */ #define HAL_SMBUS_STATE_SLAVE_BUSY_TX (0x00000032U) /*!< Slave Data Transmission process is ongoing */ #define HAL_SMBUS_STATE_SLAVE_BUSY_RX (0x00000042U) /*!< Slave Data Reception process is ongoing */ -#define HAL_SMBUS_STATE_TIMEOUT (0x00000003U) /*!< Timeout state */ -#define HAL_SMBUS_STATE_ERROR (0x00000004U) /*!< Reception process is ongoing */ #define HAL_SMBUS_STATE_LISTEN (0x00000008U) /*!< Address Listen Mode is ongoing */ /** * @} diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h index 6f870f537a..ce8e4708be 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h +++ b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h @@ -107,7 +107,7 @@ typedef struct __SPI_HandleTypeDef SPI_InitTypeDef Init; /*!< SPI communication parameters */ - uint8_t *pTxBuffPtr; /*!< Pointer to SPI Tx transfer Buffer */ + const uint8_t *pTxBuffPtr; /*!< Pointer to SPI Tx transfer Buffer */ uint16_t TxXferSize; /*!< SPI Tx Transfer size */ @@ -339,11 +339,12 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to * @retval None */ #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) -#define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) do{ \ - (__HANDLE__)->State = HAL_SPI_STATE_RESET; \ - (__HANDLE__)->MspInitCallback = NULL; \ - (__HANDLE__)->MspDeInitCallback = NULL; \ - } while(0) +#define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) \ + do{ \ + (__HANDLE__)->State = HAL_SPI_STATE_RESET; \ + (__HANDLE__)->MspInitCallback = NULL; \ + (__HANDLE__)->MspDeInitCallback = NULL; \ + } while(0) #else #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET) #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ @@ -444,7 +445,7 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to __IO uint32_t tmpreg_fre = 0x00U; \ tmpreg_fre = (__HANDLE__)->Instance->SR; \ UNUSED(tmpreg_fre); \ - }while(0U) + } while(0U) /** @brief Enable the SPI peripheral. * @param __HANDLE__ specifies the SPI Handle. @@ -488,8 +489,11 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. * @retval None */ -#define SPI_RESET_CRC(__HANDLE__) do{CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);\ - SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);}while(0U) +#define SPI_RESET_CRC(__HANDLE__) \ + do{ \ + CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN); \ + SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN); \ + } while(0U) /** @brief Check whether the specified SPI flag is set or not. * @param __SR__ copy of SPI SR register. @@ -505,7 +509,7 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to * @retval SET or RESET. */ #define SPI_CHECK_FLAG(__SR__, __FLAG__) ((((__SR__) & ((__FLAG__) & SPI_FLAG_MASK)) == \ - ((__FLAG__) & SPI_FLAG_MASK)) ? SET : RESET) + ((__FLAG__) & SPI_FLAG_MASK)) ? SET : RESET) /** @brief Check whether the specified SPI Interrupt is set or not. * @param __CR2__ copy of SPI CR2 register. @@ -517,7 +521,7 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to * @retval SET or RESET. */ #define SPI_CHECK_IT_SOURCE(__CR2__, __INTERRUPT__) ((((__CR2__) & (__INTERRUPT__)) == \ - (__INTERRUPT__)) ? SET : RESET) + (__INTERRUPT__)) ? SET : RESET) /** @brief Checks if SPI Mode parameter is in allowed range. * @param __MODE__ specifies the SPI Mode. @@ -627,7 +631,7 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to */ #define IS_SPI_CRC_POLYNOMIAL(__POLYNOMIAL__) (((__POLYNOMIAL__) >= 0x1U) && \ ((__POLYNOMIAL__) <= 0xFFFFU) && \ - (((__POLYNOMIAL__)&0x1U) != 0U)) + (((__POLYNOMIAL__)&0x1U) != 0U)) /** @brief Checks if DMA handle is valid. * @param __HANDLE__ specifies a DMA Handle. @@ -673,17 +677,17 @@ HAL_StatusTypeDef HAL_SPI_UnRegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_Ca * @{ */ /* I/O operation functions ***************************************************/ -HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout); +HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, const uint8_t *pData, uint16_t Size, uint32_t Timeout); HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout); -HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, - uint32_t Timeout); -HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); +HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, const uint8_t *pTxData, uint8_t *pRxData, + uint16_t Size, uint32_t Timeout); +HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, const uint8_t *pData, uint16_t Size); HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, +HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, const uint8_t *pTxData, uint8_t *pRxData, uint16_t Size); -HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); +HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, const uint8_t *pData, uint16_t Size); HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, +HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, const uint8_t *pTxData, uint8_t *pRxData, uint16_t Size); HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi); HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi); @@ -709,8 +713,8 @@ void HAL_SPI_AbortCpltCallback(SPI_HandleTypeDef *hspi); * @{ */ /* Peripheral State and Error functions ***************************************/ -HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi); -uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi); +HAL_SPI_StateTypeDef HAL_SPI_GetState(const SPI_HandleTypeDef *hspi); +uint32_t HAL_SPI_GetError(const SPI_HandleTypeDef *hspi); /** * @} */ diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h index 1f0a370e6d..f908f8e6fc 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h +++ b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h @@ -318,27 +318,26 @@ typedef struct */ typedef enum { - HAL_TIM_BASE_MSPINIT_CB_ID = 0x00U /*!< TIM Base MspInit Callback ID */ - , HAL_TIM_BASE_MSPDEINIT_CB_ID = 0x01U /*!< TIM Base MspDeInit Callback ID */ - , HAL_TIM_IC_MSPINIT_CB_ID = 0x02U /*!< TIM IC MspInit Callback ID */ - , HAL_TIM_IC_MSPDEINIT_CB_ID = 0x03U /*!< TIM IC MspDeInit Callback ID */ - , HAL_TIM_OC_MSPINIT_CB_ID = 0x04U /*!< TIM OC MspInit Callback ID */ - , HAL_TIM_OC_MSPDEINIT_CB_ID = 0x05U /*!< TIM OC MspDeInit Callback ID */ - , HAL_TIM_PWM_MSPINIT_CB_ID = 0x06U /*!< TIM PWM MspInit Callback ID */ - , HAL_TIM_PWM_MSPDEINIT_CB_ID = 0x07U /*!< TIM PWM MspDeInit Callback ID */ - , HAL_TIM_ONE_PULSE_MSPINIT_CB_ID = 0x08U /*!< TIM One Pulse MspInit Callback ID */ - , HAL_TIM_ONE_PULSE_MSPDEINIT_CB_ID = 0x09U /*!< TIM One Pulse MspDeInit Callback ID */ - , HAL_TIM_ENCODER_MSPINIT_CB_ID = 0x0AU /*!< TIM Encoder MspInit Callback ID */ - , HAL_TIM_ENCODER_MSPDEINIT_CB_ID = 0x0BU /*!< TIM Encoder MspDeInit Callback ID */ + HAL_TIM_BASE_MSPINIT_CB_ID = 0x00U /*!< TIM Base MspInit Callback ID */ + , HAL_TIM_BASE_MSPDEINIT_CB_ID = 0x01U /*!< TIM Base MspDeInit Callback ID */ + , HAL_TIM_IC_MSPINIT_CB_ID = 0x02U /*!< TIM IC MspInit Callback ID */ + , HAL_TIM_IC_MSPDEINIT_CB_ID = 0x03U /*!< TIM IC MspDeInit Callback ID */ + , HAL_TIM_OC_MSPINIT_CB_ID = 0x04U /*!< TIM OC MspInit Callback ID */ + , HAL_TIM_OC_MSPDEINIT_CB_ID = 0x05U /*!< TIM OC MspDeInit Callback ID */ + , HAL_TIM_PWM_MSPINIT_CB_ID = 0x06U /*!< TIM PWM MspInit Callback ID */ + , HAL_TIM_PWM_MSPDEINIT_CB_ID = 0x07U /*!< TIM PWM MspDeInit Callback ID */ + , HAL_TIM_ONE_PULSE_MSPINIT_CB_ID = 0x08U /*!< TIM One Pulse MspInit Callback ID */ + , HAL_TIM_ONE_PULSE_MSPDEINIT_CB_ID = 0x09U /*!< TIM One Pulse MspDeInit Callback ID */ + , HAL_TIM_ENCODER_MSPINIT_CB_ID = 0x0AU /*!< TIM Encoder MspInit Callback ID */ + , HAL_TIM_ENCODER_MSPDEINIT_CB_ID = 0x0BU /*!< TIM Encoder MspDeInit Callback ID */ , HAL_TIM_PERIOD_ELAPSED_CB_ID = 0x0EU /*!< TIM Period Elapsed Callback ID */ , HAL_TIM_PERIOD_ELAPSED_HALF_CB_ID = 0x0FU /*!< TIM Period Elapsed half complete Callback ID */ , HAL_TIM_TRIGGER_CB_ID = 0x10U /*!< TIM Trigger Callback ID */ , HAL_TIM_TRIGGER_HALF_CB_ID = 0x11U /*!< TIM Trigger half complete Callback ID */ - , HAL_TIM_IC_CAPTURE_CB_ID = 0x12U /*!< TIM Input Capture Callback ID */ , HAL_TIM_IC_CAPTURE_HALF_CB_ID = 0x13U /*!< TIM Input Capture half complete Callback ID */ , HAL_TIM_OC_DELAY_ELAPSED_CB_ID = 0x14U /*!< TIM Output Compare Delay Elapsed Callback ID */ - , HAL_TIM_PWM_PULSE_FINISHED_CB_ID = 0x15U /*!< TIM PWM Pulse Finished Callback ID */ + , HAL_TIM_PWM_PULSE_FINISHED_CB_ID = 0x15U /*!< TIM PWM Pulse Finished Callback ID */ , HAL_TIM_PWM_PULSE_FINISHED_HALF_CB_ID = 0x16U /*!< TIM PWM Pulse Finished half complete Callback ID */ , HAL_TIM_ERROR_CB_ID = 0x17U /*!< TIM Error Callback ID */ } HAL_TIM_CallbackIDTypeDef; @@ -1567,12 +1566,13 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->ChannelState[2] = (__CHANNEL_STATE__)) :\ ((__HANDLE__)->ChannelState[3] = (__CHANNEL_STATE__))) -#define TIM_CHANNEL_STATE_SET_ALL(__HANDLE__, __CHANNEL_STATE__) do { \ - (__HANDLE__)->ChannelState[0] = (__CHANNEL_STATE__); \ - (__HANDLE__)->ChannelState[1] = (__CHANNEL_STATE__); \ - (__HANDLE__)->ChannelState[2] = (__CHANNEL_STATE__); \ - (__HANDLE__)->ChannelState[3] = (__CHANNEL_STATE__); \ - } while(0) +#define TIM_CHANNEL_STATE_SET_ALL(__HANDLE__, __CHANNEL_STATE__)\ + do {\ + (__HANDLE__)->ChannelState[0] = (__CHANNEL_STATE__);\ + (__HANDLE__)->ChannelState[1] = (__CHANNEL_STATE__);\ + (__HANDLE__)->ChannelState[2] = (__CHANNEL_STATE__);\ + (__HANDLE__)->ChannelState[3] = (__CHANNEL_STATE__);\ + } while(0) /** * @} @@ -1750,7 +1750,8 @@ HAL_StatusTypeDef HAL_TIM_ConfigTI1Input(TIM_HandleTypeDef *htim, uint32_t TI1_S HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro(TIM_HandleTypeDef *htim, const TIM_SlaveConfigTypeDef *sSlaveConfig); HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro_IT(TIM_HandleTypeDef *htim, const TIM_SlaveConfigTypeDef *sSlaveConfig); HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, - uint32_t BurstRequestSrc, const uint32_t *BurstBuffer, uint32_t BurstLength); + uint32_t BurstRequestSrc, const uint32_t *BurstBuffer, + uint32_t BurstLength); HAL_StatusTypeDef HAL_TIM_DMABurst_MultiWriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, const uint32_t *BurstBuffer, uint32_t BurstLength, uint32_t DataLength); diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h index baf4bf75d9..252c9bd730 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h +++ b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h @@ -47,12 +47,10 @@ typedef struct { uint32_t BaudRate; /*!< This member configures the UART communication baud rate. The baud rate register is computed using the following formula: - LPUART: - ======= + @note For LPUART : Baud Rate Register = ((256 * lpuart_ker_ck) / ((huart->Init.BaudRate))) - where lpuart_ker_ck is the UART input clock - UART: - ===== + where lpuart_ker_ck is the UART input clock. + @note For UART : - If oversampling is 16 or in LIN mode, Baud Rate Register = ((uart_ker_ck) / ((huart->Init.BaudRate))) - If oversampling is 8, diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h index 955e87011c..7998e5c576 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h +++ b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h @@ -136,7 +136,7 @@ HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *p HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); -HAL_UART_RxEventTypeTypeDef HAL_UARTEx_GetRxEventType(UART_HandleTypeDef *huart); +HAL_UART_RxEventTypeTypeDef HAL_UARTEx_GetRxEventType(const UART_HandleTypeDef *huart); /** diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_usart.h b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_usart.h index f0a82e92e6..8173da4e1a 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_usart.h +++ b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_usart.h @@ -463,7 +463,6 @@ typedef void (*pUSART_CallbackTypeDef)(USART_HandleTypeDef *husart); /*!< poin #define __HAL_USART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_IDLEF) - /** @brief Enable the specified USART interrupt. * @param __HANDLE__ specifies the USART Handle. * @param __INTERRUPT__ specifies the USART interrupt source to enable. diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_usart_ex.h b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_usart_ex.h index f199f1a175..c4475d6d48 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_usart_ex.h +++ b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_usart_ex.h @@ -45,7 +45,7 @@ extern "C" { * @{ */ #define USART_WORDLENGTH_7B (USART_CR1_M1) /*!< 7-bit long USART frame */ -#define USART_WORDLENGTH_8B (0x00000000U) /*!< 8-bit long USART frame */ +#define USART_WORDLENGTH_8B (0x00000000U) /*!< 8-bit long USART frame */ #define USART_WORDLENGTH_9B (USART_CR1_M0) /*!< 9-bit long USART frame */ /** * @} diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h index 7e62d17679..5a598e09b2 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h +++ b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h @@ -3535,8 +3535,7 @@ __STATIC_INLINE uint32_t LL_ADC_REG_IsStopConversionOngoing(ADC_TypeDef *ADCx) /** * @brief Get ADC group regular conversion data, range fit for * all ADC configurations: all ADC resolutions and - * all oversampling increased data width (for devices - * with feature oversampling). + * features extending data width (oversampling, data shift,...). * @rmtoll DR DATA LL_ADC_REG_ReadConversionData32 * @param ADCx ADC instance * @retval Value between Min_Data=0x00000000 and Max_Data=0xFFFFFFFF diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_cortex.h b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_cortex.h index c27df301a3..b355065ecf 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_cortex.h +++ b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_cortex.h @@ -537,7 +537,7 @@ __STATIC_INLINE void LL_MPU_ConfigRegion(uint32_t Region, uint32_t SubRegionDisa /* Set base address */ WRITE_REG(MPU->RBAR, (Address & 0xFFFFFFE0U)); /* Configure MPU */ - WRITE_REG(MPU->RASR, (MPU_RASR_ENABLE_Msk | Attributes | SubRegionDisable << MPU_RASR_SRD_Pos)); + WRITE_REG(MPU->RASR, (MPU_RASR_ENABLE_Msk | Attributes | (SubRegionDisable << MPU_RASR_SRD_Pos))); } /** diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_crc.h b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_crc.h index b258254ccc..f2d1b02928 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_crc.h +++ b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_crc.h @@ -184,7 +184,7 @@ __STATIC_INLINE void LL_CRC_SetPolynomialSize(CRC_TypeDef *CRCx, uint32_t PolySi * @arg @ref LL_CRC_POLYLENGTH_8B * @arg @ref LL_CRC_POLYLENGTH_7B */ -__STATIC_INLINE uint32_t LL_CRC_GetPolynomialSize(CRC_TypeDef *CRCx) +__STATIC_INLINE uint32_t LL_CRC_GetPolynomialSize(const CRC_TypeDef *CRCx) { return (uint32_t)(READ_BIT(CRCx->CR, CRC_CR_POLYSIZE)); } @@ -215,7 +215,7 @@ __STATIC_INLINE void LL_CRC_SetInputDataReverseMode(CRC_TypeDef *CRCx, uint32_t * @arg @ref LL_CRC_INDATA_REVERSE_HALFWORD * @arg @ref LL_CRC_INDATA_REVERSE_WORD */ -__STATIC_INLINE uint32_t LL_CRC_GetInputDataReverseMode(CRC_TypeDef *CRCx) +__STATIC_INLINE uint32_t LL_CRC_GetInputDataReverseMode(const CRC_TypeDef *CRCx) { return (uint32_t)(READ_BIT(CRCx->CR, CRC_CR_REV_IN)); } @@ -242,7 +242,7 @@ __STATIC_INLINE void LL_CRC_SetOutputDataReverseMode(CRC_TypeDef *CRCx, uint32_t * @arg @ref LL_CRC_OUTDATA_REVERSE_NONE * @arg @ref LL_CRC_OUTDATA_REVERSE_BIT */ -__STATIC_INLINE uint32_t LL_CRC_GetOutputDataReverseMode(CRC_TypeDef *CRCx) +__STATIC_INLINE uint32_t LL_CRC_GetOutputDataReverseMode(const CRC_TypeDef *CRCx) { return (uint32_t)(READ_BIT(CRCx->CR, CRC_CR_REV_OUT)); } @@ -270,7 +270,7 @@ __STATIC_INLINE void LL_CRC_SetInitialData(CRC_TypeDef *CRCx, uint32_t InitCrc) * @param CRCx CRC Instance * @retval Value programmed in Programmable initial CRC value register */ -__STATIC_INLINE uint32_t LL_CRC_GetInitialData(CRC_TypeDef *CRCx) +__STATIC_INLINE uint32_t LL_CRC_GetInitialData(const CRC_TypeDef *CRCx) { return (uint32_t)(READ_REG(CRCx->INIT)); } @@ -301,7 +301,7 @@ __STATIC_INLINE void LL_CRC_SetPolynomialCoef(CRC_TypeDef *CRCx, uint32_t Polyno * @param CRCx CRC Instance * @retval Value programmed in Programmable Polynomial value register */ -__STATIC_INLINE uint32_t LL_CRC_GetPolynomialCoef(CRC_TypeDef *CRCx) +__STATIC_INLINE uint32_t LL_CRC_GetPolynomialCoef(const CRC_TypeDef *CRCx) { return (uint32_t)(READ_REG(CRCx->POL)); } @@ -359,7 +359,7 @@ __STATIC_INLINE void LL_CRC_FeedData8(CRC_TypeDef *CRCx, uint8_t InData) * @param CRCx CRC Instance * @retval Current CRC calculation result as stored in CRC_DR register (32 bits). */ -__STATIC_INLINE uint32_t LL_CRC_ReadData32(CRC_TypeDef *CRCx) +__STATIC_INLINE uint32_t LL_CRC_ReadData32(const CRC_TypeDef *CRCx) { return (uint32_t)(READ_REG(CRCx->DR)); } @@ -371,7 +371,7 @@ __STATIC_INLINE uint32_t LL_CRC_ReadData32(CRC_TypeDef *CRCx) * @param CRCx CRC Instance * @retval Current CRC calculation result as stored in CRC_DR register (16 bits). */ -__STATIC_INLINE uint16_t LL_CRC_ReadData16(CRC_TypeDef *CRCx) +__STATIC_INLINE uint16_t LL_CRC_ReadData16(const CRC_TypeDef *CRCx) { return (uint16_t)READ_REG(CRCx->DR); } @@ -383,7 +383,7 @@ __STATIC_INLINE uint16_t LL_CRC_ReadData16(CRC_TypeDef *CRCx) * @param CRCx CRC Instance * @retval Current CRC calculation result as stored in CRC_DR register (8 bits). */ -__STATIC_INLINE uint8_t LL_CRC_ReadData8(CRC_TypeDef *CRCx) +__STATIC_INLINE uint8_t LL_CRC_ReadData8(const CRC_TypeDef *CRCx) { return (uint8_t)READ_REG(CRCx->DR); } @@ -395,7 +395,7 @@ __STATIC_INLINE uint8_t LL_CRC_ReadData8(CRC_TypeDef *CRCx) * @param CRCx CRC Instance * @retval Current CRC calculation result as stored in CRC_DR register (7 bits). */ -__STATIC_INLINE uint8_t LL_CRC_ReadData7(CRC_TypeDef *CRCx) +__STATIC_INLINE uint8_t LL_CRC_ReadData7(const CRC_TypeDef *CRCx) { return (uint8_t)(READ_REG(CRCx->DR) & 0x7FU); } @@ -433,7 +433,7 @@ __STATIC_INLINE void LL_CRC_Write_IDR(CRC_TypeDef *CRCx, uint32_t InData) * @{ */ -ErrorStatus LL_CRC_DeInit(CRC_TypeDef *CRCx); +ErrorStatus LL_CRC_DeInit(const CRC_TypeDef *CRCx); /** * @} diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_i2c.h b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_i2c.h index d9d9e210d3..fe27c5cf73 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_i2c.h +++ b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_i2c.h @@ -2133,11 +2133,18 @@ __STATIC_INLINE uint32_t LL_I2C_GetSlaveAddr(const I2C_TypeDef *I2Cx) __STATIC_INLINE void LL_I2C_HandleTransfer(I2C_TypeDef *I2Cx, uint32_t SlaveAddr, uint32_t SlaveAddrSize, uint32_t TransferSize, uint32_t EndMode, uint32_t Request) { + /* Declaration of tmp to prevent undefined behavior of volatile usage */ + uint32_t tmp = ((uint32_t)(((uint32_t)SlaveAddr & I2C_CR2_SADD) | \ + ((uint32_t)SlaveAddrSize & I2C_CR2_ADD10) | \ + (((uint32_t)TransferSize << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | \ + (uint32_t)EndMode | (uint32_t)Request) & (~0x80000000U)); + + /* update CR2 register */ MODIFY_REG(I2Cx->CR2, I2C_CR2_SADD | I2C_CR2_ADD10 | (I2C_CR2_RD_WRN & (uint32_t)(Request >> (31U - I2C_CR2_RD_WRN_Pos))) | I2C_CR2_START | I2C_CR2_STOP | I2C_CR2_RELOAD | I2C_CR2_NBYTES | I2C_CR2_AUTOEND | I2C_CR2_HEAD10R, - SlaveAddr | SlaveAddrSize | (TransferSize << I2C_CR2_NBYTES_Pos) | EndMode | Request); + tmp); } /** diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_rng.h b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_rng.h index 94bfd8da3d..ad5a0e4aa7 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_rng.h +++ b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_rng.h @@ -146,7 +146,7 @@ __STATIC_INLINE void LL_RNG_Disable(RNG_TypeDef *RNGx) * @param RNGx RNG Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_RNG_IsEnabled(RNG_TypeDef *RNGx) +__STATIC_INLINE uint32_t LL_RNG_IsEnabled(const RNG_TypeDef *RNGx) { return ((READ_BIT(RNGx->CR, RNG_CR_RNGEN) == (RNG_CR_RNGEN)) ? 1UL : 0UL); } @@ -165,7 +165,7 @@ __STATIC_INLINE uint32_t LL_RNG_IsEnabled(RNG_TypeDef *RNGx) * @param RNGx RNG Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_DRDY(RNG_TypeDef *RNGx) +__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_DRDY(const RNG_TypeDef *RNGx) { return ((READ_BIT(RNGx->SR, RNG_SR_DRDY) == (RNG_SR_DRDY)) ? 1UL : 0UL); } @@ -176,7 +176,7 @@ __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_DRDY(RNG_TypeDef *RNGx) * @param RNGx RNG Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_CECS(RNG_TypeDef *RNGx) +__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_CECS(const RNG_TypeDef *RNGx) { return ((READ_BIT(RNGx->SR, RNG_SR_CECS) == (RNG_SR_CECS)) ? 1UL : 0UL); } @@ -187,7 +187,7 @@ __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_CECS(RNG_TypeDef *RNGx) * @param RNGx RNG Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_SECS(RNG_TypeDef *RNGx) +__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_SECS(const RNG_TypeDef *RNGx) { return ((READ_BIT(RNGx->SR, RNG_SR_SECS) == (RNG_SR_SECS)) ? 1UL : 0UL); } @@ -198,7 +198,7 @@ __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_SECS(RNG_TypeDef *RNGx) * @param RNGx RNG Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_CEIS(RNG_TypeDef *RNGx) +__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_CEIS(const RNG_TypeDef *RNGx) { return ((READ_BIT(RNGx->SR, RNG_SR_CEIS) == (RNG_SR_CEIS)) ? 1UL : 0UL); } @@ -209,7 +209,7 @@ __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_CEIS(RNG_TypeDef *RNGx) * @param RNGx RNG Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_SEIS(RNG_TypeDef *RNGx) +__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_SEIS(const RNG_TypeDef *RNGx) { return ((READ_BIT(RNGx->SR, RNG_SR_SEIS) == (RNG_SR_SEIS)) ? 1UL : 0UL); } @@ -275,7 +275,7 @@ __STATIC_INLINE void LL_RNG_DisableIT(RNG_TypeDef *RNGx) * @param RNGx RNG Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_RNG_IsEnabledIT(RNG_TypeDef *RNGx) +__STATIC_INLINE uint32_t LL_RNG_IsEnabledIT(const RNG_TypeDef *RNGx) { return ((READ_BIT(RNGx->CR, RNG_CR_IE) == (RNG_CR_IE)) ? 1UL : 0UL); } @@ -294,7 +294,7 @@ __STATIC_INLINE uint32_t LL_RNG_IsEnabledIT(RNG_TypeDef *RNGx) * @param RNGx RNG Instance * @retval Generated 32-bit random value */ -__STATIC_INLINE uint32_t LL_RNG_ReadRandData32(RNG_TypeDef *RNGx) +__STATIC_INLINE uint32_t LL_RNG_ReadRandData32(const RNG_TypeDef *RNGx) { return (uint32_t)(READ_REG(RNGx->DR)); } @@ -307,7 +307,7 @@ __STATIC_INLINE uint32_t LL_RNG_ReadRandData32(RNG_TypeDef *RNGx) /** @defgroup RNG_LL_EF_Init Initialization and de-initialization functions * @{ */ -ErrorStatus LL_RNG_DeInit(RNG_TypeDef *RNGx); +ErrorStatus LL_RNG_DeInit(const RNG_TypeDef *RNGx); /** * @} diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_rtc.h b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_rtc.h index 5f9f734f01..b44cd0eacc 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_rtc.h +++ b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_rtc.h @@ -414,8 +414,8 @@ typedef struct /** @defgroup RTC_LL_EC_TIMESTAMP_EDGE TIMESTAMP EDGE * @{ */ -#define LL_RTC_TIMESTAMP_EDGE_RISING 0x00000000U /*!< RTC_TS input rising edge generates a time-stamp event */ -#define LL_RTC_TIMESTAMP_EDGE_FALLING RTC_CR_TSEDGE /*!< RTC_TS input falling edge generates a time-stamp even */ +#define LL_RTC_TIMESTAMP_EDGE_RISING 0x00000000U /*!< RTC_TS input rising edge generates a time-stamp event */ +#define LL_RTC_TIMESTAMP_EDGE_FALLING RTC_CR_TSEDGE /*!< RTC_TS input falling edge generates a time-stamp event */ /** * @} */ @@ -1050,7 +1050,7 @@ __STATIC_INLINE void LL_RTC_TIME_SetFormat(RTC_TypeDef *RTCx, uint32_t TimeForma /** * @brief Get time format (AM or PM notation) - * @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set + * @note if RTC shadow registers are not bypassed (BYPSHAD=0), need to check if RSF flag is set * before reading this bit * @note Read either RTC_SSR or RTC_TR locks the values in the higher-order calendar * shadow registers until RTC_DR is read (LL_RTC_ReadReg(RTC, DR)). @@ -1084,7 +1084,7 @@ __STATIC_INLINE void LL_RTC_TIME_SetHour(RTC_TypeDef *RTCx, uint32_t Hours) /** * @brief Get Hours in BCD format - * @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set + * @note if RTC shadow registers are not bypassed (BYPSHAD=0), need to check if RSF flag is set * before reading this bit * @note Read either RTC_SSR or RTC_TR locks the values in the higher-order calendar * shadow registers until RTC_DR is read (LL_RTC_ReadReg(RTC, DR)). @@ -1119,7 +1119,7 @@ __STATIC_INLINE void LL_RTC_TIME_SetMinute(RTC_TypeDef *RTCx, uint32_t Minutes) /** * @brief Get Minutes in BCD format - * @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set + * @note if RTC shadow registers are not bypassed (BYPSHAD=0), need to check if RSF flag is set * before reading this bit * @note Read either RTC_SSR or RTC_TR locks the values in the higher-order calendar * shadow registers until RTC_DR is read (LL_RTC_ReadReg(RTC, DR)). @@ -1154,7 +1154,7 @@ __STATIC_INLINE void LL_RTC_TIME_SetSecond(RTC_TypeDef *RTCx, uint32_t Seconds) /** * @brief Get Seconds in BCD format - * @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set + * @note if RTC shadow registers are not bypassed (BYPSHAD=0), need to check if RSF flag is set * before reading this bit * @note Read either RTC_SSR or RTC_TR locks the values in the higher-order calendar * shadow registers until RTC_DR is read (LL_RTC_ReadReg(RTC, DR)). @@ -1204,7 +1204,7 @@ __STATIC_INLINE void LL_RTC_TIME_Config(RTC_TypeDef *RTCx, uint32_t Format12_24, /** * @brief Get time (hour, minute and second) in BCD format - * @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set + * @note if RTC shadow registers are not bypassed (BYPSHAD=0), need to check if RSF flag is set * before reading this bit * @note Read either RTC_SSR or RTC_TR locks the values in the higher-order calendar * shadow registers until RTC_DR is read (LL_RTC_ReadReg(RTC, DR)). @@ -1346,7 +1346,7 @@ __STATIC_INLINE void LL_RTC_DATE_SetYear(RTC_TypeDef *RTCx, uint32_t Year) /** * @brief Get Year in BCD format - * @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set + * @note if RTC shadow registers are not bypassed (BYPSHAD=0), need to check if RSF flag is set * before reading this bit * @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert Year from BCD to Binary format * @rmtoll DR YT LL_RTC_DATE_GetYear\n @@ -1380,7 +1380,7 @@ __STATIC_INLINE void LL_RTC_DATE_SetWeekDay(RTC_TypeDef *RTCx, uint32_t WeekDay) /** * @brief Get Week day - * @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set + * @note if RTC shadow registers are not bypassed (BYPSHAD=0), need to check if RSF flag is set * before reading this bit * @rmtoll DR WDU LL_RTC_DATE_GetWeekDay * @param RTCx RTC Instance @@ -1427,7 +1427,7 @@ __STATIC_INLINE void LL_RTC_DATE_SetMonth(RTC_TypeDef *RTCx, uint32_t Month) /** * @brief Get Month in BCD format - * @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set + * @note if RTC shadow registers are not bypassed (BYPSHAD=0), need to check if RSF flag is set * before reading this bit * @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert Month from BCD to Binary format * @rmtoll DR MT LL_RTC_DATE_GetMonth\n @@ -1469,7 +1469,7 @@ __STATIC_INLINE void LL_RTC_DATE_SetDay(RTC_TypeDef *RTCx, uint32_t Day) /** * @brief Get Day in BCD format - * @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set + * @note if RTC shadow registers are not bypassed (BYPSHAD=0), need to check if RSF flag is set * before reading this bit * @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert Day from BCD to Binary format * @rmtoll DR DT LL_RTC_DATE_GetDay\n @@ -1531,7 +1531,7 @@ __STATIC_INLINE void LL_RTC_DATE_Config(RTC_TypeDef *RTCx, uint32_t WeekDay, uin /** * @brief Get date (WeekDay, Day, Month and Year) in BCD format - * @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set + * @note if RTC shadow registers are not bypassed (BYPSHAD=0), need to check if RSF flag is set * before reading this bit * @note helper macros __LL_RTC_GET_WEEKDAY, __LL_RTC_GET_YEAR, __LL_RTC_GET_MONTH, * and __LL_RTC_GET_DAY are available to get independently each parameter. diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_spi.h b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_spi.h index a3da1e18de..c44f3f5cc7 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_spi.h +++ b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_spi.h @@ -55,53 +55,66 @@ typedef struct uint32_t TransferDirection; /*!< Specifies the SPI unidirectional or bidirectional data mode. This parameter can be a value of @ref SPI_LL_EC_TRANSFER_MODE. - This feature can be modified afterwards using unitary function @ref LL_SPI_SetTransferDirection().*/ + This feature can be modified afterwards using unitary + function @ref LL_SPI_SetTransferDirection().*/ uint32_t Mode; /*!< Specifies the SPI mode (Master/Slave). This parameter can be a value of @ref SPI_LL_EC_MODE. - This feature can be modified afterwards using unitary function @ref LL_SPI_SetMode().*/ + This feature can be modified afterwards using unitary + function @ref LL_SPI_SetMode().*/ uint32_t DataWidth; /*!< Specifies the SPI data width. This parameter can be a value of @ref SPI_LL_EC_DATAWIDTH. - This feature can be modified afterwards using unitary function @ref LL_SPI_SetDataWidth().*/ + This feature can be modified afterwards using unitary + function @ref LL_SPI_SetDataWidth().*/ uint32_t ClockPolarity; /*!< Specifies the serial clock steady state. This parameter can be a value of @ref SPI_LL_EC_POLARITY. - This feature can be modified afterwards using unitary function @ref LL_SPI_SetClockPolarity().*/ + This feature can be modified afterwards using unitary + function @ref LL_SPI_SetClockPolarity().*/ uint32_t ClockPhase; /*!< Specifies the clock active edge for the bit capture. This parameter can be a value of @ref SPI_LL_EC_PHASE. - This feature can be modified afterwards using unitary function @ref LL_SPI_SetClockPhase().*/ + This feature can be modified afterwards using unitary + function @ref LL_SPI_SetClockPhase().*/ - uint32_t NSS; /*!< Specifies whether the NSS signal is managed by hardware (NSS pin) or by software using the SSI bit. + uint32_t NSS; /*!< Specifies whether the NSS signal is managed by hardware (NSS pin) + or by software using the SSI bit. This parameter can be a value of @ref SPI_LL_EC_NSS_MODE. - This feature can be modified afterwards using unitary function @ref LL_SPI_SetNSSMode().*/ + This feature can be modified afterwards using unitary + function @ref LL_SPI_SetNSSMode().*/ - uint32_t BaudRate; /*!< Specifies the BaudRate prescaler value which will be used to configure the transmit and receive SCK clock. + uint32_t BaudRate; /*!< Specifies the BaudRate prescaler value which will be used + to configure the transmit and receive SCK clock. This parameter can be a value of @ref SPI_LL_EC_BAUDRATEPRESCALER. - @note The communication clock is derived from the master clock. The slave clock does not need to be set. + @note The communication clock is derived from the master clock. + The slave clock does not need to be set. - This feature can be modified afterwards using unitary function @ref LL_SPI_SetBaudRatePrescaler().*/ + This feature can be modified afterwards using unitary + function @ref LL_SPI_SetBaudRatePrescaler().*/ uint32_t BitOrder; /*!< Specifies whether data transfers start from MSB or LSB bit. This parameter can be a value of @ref SPI_LL_EC_BIT_ORDER. - This feature can be modified afterwards using unitary function @ref LL_SPI_SetTransferBitOrder().*/ + This feature can be modified afterwards using unitary + function @ref LL_SPI_SetTransferBitOrder().*/ uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not. This parameter can be a value of @ref SPI_LL_EC_CRC_CALCULATION. - This feature can be modified afterwards using unitary functions @ref LL_SPI_EnableCRC() and @ref LL_SPI_DisableCRC().*/ + This feature can be modified afterwards using unitary + functions @ref LL_SPI_EnableCRC() and @ref LL_SPI_DisableCRC().*/ uint32_t CRCPoly; /*!< Specifies the polynomial used for the CRC calculation. This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFFFF. - This feature can be modified afterwards using unitary function @ref LL_SPI_SetCRCPolynomial().*/ + This feature can be modified afterwards using unitary + function @ref LL_SPI_SetCRCPolynomial().*/ } LL_SPI_InitTypeDef; @@ -317,7 +330,7 @@ __STATIC_INLINE void LL_SPI_Disable(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_SPI_IsEnabled(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_IsEnabled(const SPI_TypeDef *SPIx) { return ((READ_BIT(SPIx->CR1, SPI_CR1_SPE) == (SPI_CR1_SPE)) ? 1UL : 0UL); } @@ -347,7 +360,7 @@ __STATIC_INLINE void LL_SPI_SetMode(SPI_TypeDef *SPIx, uint32_t Mode) * @arg @ref LL_SPI_MODE_MASTER * @arg @ref LL_SPI_MODE_SLAVE */ -__STATIC_INLINE uint32_t LL_SPI_GetMode(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_GetMode(const SPI_TypeDef *SPIx) { return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_MSTR | SPI_CR1_SSI)); } @@ -375,7 +388,7 @@ __STATIC_INLINE void LL_SPI_SetStandard(SPI_TypeDef *SPIx, uint32_t Standard) * @arg @ref LL_SPI_PROTOCOL_MOTOROLA * @arg @ref LL_SPI_PROTOCOL_TI */ -__STATIC_INLINE uint32_t LL_SPI_GetStandard(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_GetStandard(const SPI_TypeDef *SPIx) { return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_FRF)); } @@ -404,7 +417,7 @@ __STATIC_INLINE void LL_SPI_SetClockPhase(SPI_TypeDef *SPIx, uint32_t ClockPhase * @arg @ref LL_SPI_PHASE_1EDGE * @arg @ref LL_SPI_PHASE_2EDGE */ -__STATIC_INLINE uint32_t LL_SPI_GetClockPhase(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_GetClockPhase(const SPI_TypeDef *SPIx) { return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_CPHA)); } @@ -433,7 +446,7 @@ __STATIC_INLINE void LL_SPI_SetClockPolarity(SPI_TypeDef *SPIx, uint32_t ClockPo * @arg @ref LL_SPI_POLARITY_LOW * @arg @ref LL_SPI_POLARITY_HIGH */ -__STATIC_INLINE uint32_t LL_SPI_GetClockPolarity(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_GetClockPolarity(const SPI_TypeDef *SPIx) { return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_CPOL)); } @@ -473,7 +486,7 @@ __STATIC_INLINE void LL_SPI_SetBaudRatePrescaler(SPI_TypeDef *SPIx, uint32_t Bau * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV128 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV256 */ -__STATIC_INLINE uint32_t LL_SPI_GetBaudRatePrescaler(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_GetBaudRatePrescaler(const SPI_TypeDef *SPIx) { return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_BR)); } @@ -501,7 +514,7 @@ __STATIC_INLINE void LL_SPI_SetTransferBitOrder(SPI_TypeDef *SPIx, uint32_t BitO * @arg @ref LL_SPI_LSB_FIRST * @arg @ref LL_SPI_MSB_FIRST */ -__STATIC_INLINE uint32_t LL_SPI_GetTransferBitOrder(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_GetTransferBitOrder(const SPI_TypeDef *SPIx) { return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_LSBFIRST)); } @@ -538,7 +551,7 @@ __STATIC_INLINE void LL_SPI_SetTransferDirection(SPI_TypeDef *SPIx, uint32_t Tra * @arg @ref LL_SPI_HALF_DUPLEX_RX * @arg @ref LL_SPI_HALF_DUPLEX_TX */ -__STATIC_INLINE uint32_t LL_SPI_GetTransferDirection(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_GetTransferDirection(const SPI_TypeDef *SPIx) { return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_RXONLY | SPI_CR1_BIDIMODE | SPI_CR1_BIDIOE)); } @@ -565,7 +578,7 @@ __STATIC_INLINE void LL_SPI_SetDataWidth(SPI_TypeDef *SPIx, uint32_t DataWidth) * @arg @ref LL_SPI_DATAWIDTH_8BIT * @arg @ref LL_SPI_DATAWIDTH_16BIT */ -__STATIC_INLINE uint32_t LL_SPI_GetDataWidth(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_GetDataWidth(const SPI_TypeDef *SPIx) { return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_DFF)); } @@ -609,7 +622,7 @@ __STATIC_INLINE void LL_SPI_DisableCRC(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_SPI_IsEnabledCRC(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_IsEnabledCRC(const SPI_TypeDef *SPIx) { return ((READ_BIT(SPIx->CR1, SPI_CR1_CRCEN) == (SPI_CR1_CRCEN)) ? 1UL : 0UL); } @@ -644,7 +657,7 @@ __STATIC_INLINE void LL_SPI_SetCRCPolynomial(SPI_TypeDef *SPIx, uint32_t CRCPoly * @param SPIx SPI Instance * @retval Returned value is a number between Min_Data = 0x00 and Max_Data = 0xFFFF */ -__STATIC_INLINE uint32_t LL_SPI_GetCRCPolynomial(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_GetCRCPolynomial(const SPI_TypeDef *SPIx) { return (uint32_t)(READ_REG(SPIx->CRCPR)); } @@ -655,7 +668,7 @@ __STATIC_INLINE uint32_t LL_SPI_GetCRCPolynomial(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval Returned value is a number between Min_Data = 0x00 and Max_Data = 0xFFFF */ -__STATIC_INLINE uint32_t LL_SPI_GetRxCRC(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_GetRxCRC(const SPI_TypeDef *SPIx) { return (uint32_t)(READ_REG(SPIx->RXCRCR)); } @@ -666,7 +679,7 @@ __STATIC_INLINE uint32_t LL_SPI_GetRxCRC(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval Returned value is a number between Min_Data = 0x00 and Max_Data = 0xFFFF */ -__STATIC_INLINE uint32_t LL_SPI_GetTxCRC(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_GetTxCRC(const SPI_TypeDef *SPIx) { return (uint32_t)(READ_REG(SPIx->TXCRCR)); } @@ -707,7 +720,7 @@ __STATIC_INLINE void LL_SPI_SetNSSMode(SPI_TypeDef *SPIx, uint32_t NSS) * @arg @ref LL_SPI_NSS_HARD_INPUT * @arg @ref LL_SPI_NSS_HARD_OUTPUT */ -__STATIC_INLINE uint32_t LL_SPI_GetNSSMode(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_GetNSSMode(const SPI_TypeDef *SPIx) { uint32_t Ssm = (READ_BIT(SPIx->CR1, SPI_CR1_SSM)); uint32_t Ssoe = (READ_BIT(SPIx->CR2, SPI_CR2_SSOE) << 16U); @@ -728,7 +741,7 @@ __STATIC_INLINE uint32_t LL_SPI_GetNSSMode(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_RXNE(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_RXNE(const SPI_TypeDef *SPIx) { return ((READ_BIT(SPIx->SR, SPI_SR_RXNE) == (SPI_SR_RXNE)) ? 1UL : 0UL); } @@ -739,7 +752,7 @@ __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_RXNE(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_TXE(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_TXE(const SPI_TypeDef *SPIx) { return ((READ_BIT(SPIx->SR, SPI_SR_TXE) == (SPI_SR_TXE)) ? 1UL : 0UL); } @@ -750,7 +763,7 @@ __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_TXE(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_CRCERR(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_CRCERR(const SPI_TypeDef *SPIx) { return ((READ_BIT(SPIx->SR, SPI_SR_CRCERR) == (SPI_SR_CRCERR)) ? 1UL : 0UL); } @@ -761,7 +774,7 @@ __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_CRCERR(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_MODF(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_MODF(const SPI_TypeDef *SPIx) { return ((READ_BIT(SPIx->SR, SPI_SR_MODF) == (SPI_SR_MODF)) ? 1UL : 0UL); } @@ -772,7 +785,7 @@ __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_MODF(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_OVR(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_OVR(const SPI_TypeDef *SPIx) { return ((READ_BIT(SPIx->SR, SPI_SR_OVR) == (SPI_SR_OVR)) ? 1UL : 0UL); } @@ -790,7 +803,7 @@ __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_OVR(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_BSY(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_BSY(const SPI_TypeDef *SPIx) { return ((READ_BIT(SPIx->SR, SPI_SR_BSY) == (SPI_SR_BSY)) ? 1UL : 0UL); } @@ -801,7 +814,7 @@ __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_BSY(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_FRE(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_FRE(const SPI_TypeDef *SPIx) { return ((READ_BIT(SPIx->SR, SPI_SR_FRE) == (SPI_SR_FRE)) ? 1UL : 0UL); } @@ -841,7 +854,7 @@ __STATIC_INLINE void LL_SPI_ClearFlag_MODF(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval None */ -__STATIC_INLINE void LL_SPI_ClearFlag_OVR(SPI_TypeDef *SPIx) +__STATIC_INLINE void LL_SPI_ClearFlag_OVR(const SPI_TypeDef *SPIx) { __IO uint32_t tmpreg; tmpreg = SPIx->DR; @@ -857,7 +870,7 @@ __STATIC_INLINE void LL_SPI_ClearFlag_OVR(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval None */ -__STATIC_INLINE void LL_SPI_ClearFlag_FRE(SPI_TypeDef *SPIx) +__STATIC_INLINE void LL_SPI_ClearFlag_FRE(const SPI_TypeDef *SPIx) { __IO uint32_t tmpreg; tmpreg = SPIx->SR; @@ -874,7 +887,8 @@ __STATIC_INLINE void LL_SPI_ClearFlag_FRE(SPI_TypeDef *SPIx) /** * @brief Enable error interrupt - * @note This bit controls the generation of an interrupt when an error condition occurs (CRCERR, OVR, MODF in SPI mode, FRE at TI mode). + * @note This bit controls the generation of an interrupt when an error condition + * occurs (CRCERR, OVR, MODF in SPI mode, FRE at TI mode). * @rmtoll CR2 ERRIE LL_SPI_EnableIT_ERR * @param SPIx SPI Instance * @retval None @@ -908,7 +922,8 @@ __STATIC_INLINE void LL_SPI_EnableIT_TXE(SPI_TypeDef *SPIx) /** * @brief Disable error interrupt - * @note This bit controls the generation of an interrupt when an error condition occurs (CRCERR, OVR, MODF in SPI mode, FRE at TI mode). + * @note This bit controls the generation of an interrupt when an error condition + * occurs (CRCERR, OVR, MODF in SPI mode, FRE at TI mode). * @rmtoll CR2 ERRIE LL_SPI_DisableIT_ERR * @param SPIx SPI Instance * @retval None @@ -946,7 +961,7 @@ __STATIC_INLINE void LL_SPI_DisableIT_TXE(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_ERR(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_ERR(const SPI_TypeDef *SPIx) { return ((READ_BIT(SPIx->CR2, SPI_CR2_ERRIE) == (SPI_CR2_ERRIE)) ? 1UL : 0UL); } @@ -957,7 +972,7 @@ __STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_ERR(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_RXNE(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_RXNE(const SPI_TypeDef *SPIx) { return ((READ_BIT(SPIx->CR2, SPI_CR2_RXNEIE) == (SPI_CR2_RXNEIE)) ? 1UL : 0UL); } @@ -968,7 +983,7 @@ __STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_RXNE(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_TXE(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_TXE(const SPI_TypeDef *SPIx) { return ((READ_BIT(SPIx->CR2, SPI_CR2_TXEIE) == (SPI_CR2_TXEIE)) ? 1UL : 0UL); } @@ -1009,7 +1024,7 @@ __STATIC_INLINE void LL_SPI_DisableDMAReq_RX(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_SPI_IsEnabledDMAReq_RX(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_IsEnabledDMAReq_RX(const SPI_TypeDef *SPIx) { return ((READ_BIT(SPIx->CR2, SPI_CR2_RXDMAEN) == (SPI_CR2_RXDMAEN)) ? 1UL : 0UL); } @@ -1042,7 +1057,7 @@ __STATIC_INLINE void LL_SPI_DisableDMAReq_TX(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_SPI_IsEnabledDMAReq_TX(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_IsEnabledDMAReq_TX(const SPI_TypeDef *SPIx) { return ((READ_BIT(SPIx->CR2, SPI_CR2_TXDMAEN) == (SPI_CR2_TXDMAEN)) ? 1UL : 0UL); } @@ -1053,7 +1068,7 @@ __STATIC_INLINE uint32_t LL_SPI_IsEnabledDMAReq_TX(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval Address of data register */ -__STATIC_INLINE uint32_t LL_SPI_DMA_GetRegAddr(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_DMA_GetRegAddr(const SPI_TypeDef *SPIx) { return (uint32_t) &(SPIx->DR); } @@ -1130,7 +1145,7 @@ __STATIC_INLINE void LL_SPI_TransmitData16(SPI_TypeDef *SPIx, uint16_t TxData) * @{ */ -ErrorStatus LL_SPI_DeInit(SPI_TypeDef *SPIx); +ErrorStatus LL_SPI_DeInit(const SPI_TypeDef *SPIx); ErrorStatus LL_SPI_Init(SPI_TypeDef *SPIx, LL_SPI_InitTypeDef *SPI_InitStruct); void LL_SPI_StructInit(LL_SPI_InitTypeDef *SPI_InitStruct); @@ -1398,7 +1413,7 @@ __STATIC_INLINE void LL_I2S_Disable(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_I2S_IsEnabled(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_I2S_IsEnabled(const SPI_TypeDef *SPIx) { return ((READ_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_I2SE) == (SPI_I2SCFGR_I2SE)) ? 1UL : 0UL); } @@ -1431,7 +1446,7 @@ __STATIC_INLINE void LL_I2S_SetDataFormat(SPI_TypeDef *SPIx, uint32_t DataFormat * @arg @ref LL_I2S_DATAFORMAT_24B * @arg @ref LL_I2S_DATAFORMAT_32B */ -__STATIC_INLINE uint32_t LL_I2S_GetDataFormat(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_I2S_GetDataFormat(const SPI_TypeDef *SPIx) { return (uint32_t)(READ_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)); } @@ -1458,7 +1473,7 @@ __STATIC_INLINE void LL_I2S_SetClockPolarity(SPI_TypeDef *SPIx, uint32_t ClockPo * @arg @ref LL_I2S_POLARITY_LOW * @arg @ref LL_I2S_POLARITY_HIGH */ -__STATIC_INLINE uint32_t LL_I2S_GetClockPolarity(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_I2S_GetClockPolarity(const SPI_TypeDef *SPIx) { return (uint32_t)(READ_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_CKPOL)); } @@ -1493,7 +1508,7 @@ __STATIC_INLINE void LL_I2S_SetStandard(SPI_TypeDef *SPIx, uint32_t Standard) * @arg @ref LL_I2S_STANDARD_PCM_SHORT * @arg @ref LL_I2S_STANDARD_PCM_LONG */ -__STATIC_INLINE uint32_t LL_I2S_GetStandard(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_I2S_GetStandard(const SPI_TypeDef *SPIx) { return (uint32_t)(READ_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_I2SSTD | SPI_I2SCFGR_PCMSYNC)); } @@ -1524,7 +1539,7 @@ __STATIC_INLINE void LL_I2S_SetTransferMode(SPI_TypeDef *SPIx, uint32_t Mode) * @arg @ref LL_I2S_MODE_MASTER_TX * @arg @ref LL_I2S_MODE_MASTER_RX */ -__STATIC_INLINE uint32_t LL_I2S_GetTransferMode(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_I2S_GetTransferMode(const SPI_TypeDef *SPIx) { return (uint32_t)(READ_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_I2SCFG)); } @@ -1547,7 +1562,7 @@ __STATIC_INLINE void LL_I2S_SetPrescalerLinear(SPI_TypeDef *SPIx, uint8_t Presca * @param SPIx SPI Instance * @retval PrescalerLinear Value between Min_Data=0x02 and Max_Data=0xFF */ -__STATIC_INLINE uint32_t LL_I2S_GetPrescalerLinear(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_I2S_GetPrescalerLinear(const SPI_TypeDef *SPIx) { return (uint32_t)(READ_BIT(SPIx->I2SPR, SPI_I2SPR_I2SDIV)); } @@ -1574,7 +1589,7 @@ __STATIC_INLINE void LL_I2S_SetPrescalerParity(SPI_TypeDef *SPIx, uint32_t Presc * @arg @ref LL_I2S_PRESCALER_PARITY_EVEN * @arg @ref LL_I2S_PRESCALER_PARITY_ODD */ -__STATIC_INLINE uint32_t LL_I2S_GetPrescalerParity(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_I2S_GetPrescalerParity(const SPI_TypeDef *SPIx) { return (uint32_t)(READ_BIT(SPIx->I2SPR, SPI_I2SPR_ODD) >> 8U); } @@ -1607,7 +1622,7 @@ __STATIC_INLINE void LL_I2S_DisableMasterClock(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_I2S_IsEnabledMasterClock(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_I2S_IsEnabledMasterClock(const SPI_TypeDef *SPIx) { return ((READ_BIT(SPIx->I2SPR, SPI_I2SPR_MCKOE) == (SPI_I2SPR_MCKOE)) ? 1UL : 0UL); } @@ -1641,7 +1656,7 @@ __STATIC_INLINE void LL_I2S_DisableAsyncStart(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_I2S_IsEnabledAsyncStart(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_I2S_IsEnabledAsyncStart(const SPI_TypeDef *SPIx) { return ((READ_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_ASTRTEN) == (SPI_I2SCFGR_ASTRTEN)) ? 1UL : 0UL); } @@ -1661,7 +1676,7 @@ __STATIC_INLINE uint32_t LL_I2S_IsEnabledAsyncStart(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_RXNE(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_RXNE(const SPI_TypeDef *SPIx) { return LL_SPI_IsActiveFlag_RXNE(SPIx); } @@ -1672,7 +1687,7 @@ __STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_RXNE(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_TXE(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_TXE(const SPI_TypeDef *SPIx) { return LL_SPI_IsActiveFlag_TXE(SPIx); } @@ -1683,7 +1698,7 @@ __STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_TXE(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_BSY(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_BSY(const SPI_TypeDef *SPIx) { return LL_SPI_IsActiveFlag_BSY(SPIx); } @@ -1694,7 +1709,7 @@ __STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_BSY(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_OVR(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_OVR(const SPI_TypeDef *SPIx) { return LL_SPI_IsActiveFlag_OVR(SPIx); } @@ -1705,7 +1720,7 @@ __STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_OVR(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_UDR(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_UDR(const SPI_TypeDef *SPIx) { return ((READ_BIT(SPIx->SR, SPI_SR_UDR) == (SPI_SR_UDR)) ? 1UL : 0UL); } @@ -1716,7 +1731,7 @@ __STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_UDR(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_FRE(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_FRE(const SPI_TypeDef *SPIx) { return LL_SPI_IsActiveFlag_FRE(SPIx); } @@ -1730,7 +1745,7 @@ __STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_FRE(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_CHSIDE(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_CHSIDE(const SPI_TypeDef *SPIx) { return ((READ_BIT(SPIx->SR, SPI_SR_CHSIDE) == (SPI_SR_CHSIDE)) ? 1UL : 0UL); } @@ -1752,7 +1767,7 @@ __STATIC_INLINE void LL_I2S_ClearFlag_OVR(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval None */ -__STATIC_INLINE void LL_I2S_ClearFlag_UDR(SPI_TypeDef *SPIx) +__STATIC_INLINE void LL_I2S_ClearFlag_UDR(const SPI_TypeDef *SPIx) { __IO uint32_t tmpreg; tmpreg = SPIx->SR; @@ -1765,7 +1780,7 @@ __STATIC_INLINE void LL_I2S_ClearFlag_UDR(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval None */ -__STATIC_INLINE void LL_I2S_ClearFlag_FRE(SPI_TypeDef *SPIx) +__STATIC_INLINE void LL_I2S_ClearFlag_FRE(const SPI_TypeDef *SPIx) { LL_SPI_ClearFlag_FRE(SPIx); } @@ -1852,7 +1867,7 @@ __STATIC_INLINE void LL_I2S_DisableIT_TXE(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_I2S_IsEnabledIT_ERR(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_I2S_IsEnabledIT_ERR(const SPI_TypeDef *SPIx) { return LL_SPI_IsEnabledIT_ERR(SPIx); } @@ -1863,7 +1878,7 @@ __STATIC_INLINE uint32_t LL_I2S_IsEnabledIT_ERR(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_I2S_IsEnabledIT_RXNE(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_I2S_IsEnabledIT_RXNE(const SPI_TypeDef *SPIx) { return LL_SPI_IsEnabledIT_RXNE(SPIx); } @@ -1874,7 +1889,7 @@ __STATIC_INLINE uint32_t LL_I2S_IsEnabledIT_RXNE(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_I2S_IsEnabledIT_TXE(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_I2S_IsEnabledIT_TXE(const SPI_TypeDef *SPIx) { return LL_SPI_IsEnabledIT_TXE(SPIx); } @@ -1915,7 +1930,7 @@ __STATIC_INLINE void LL_I2S_DisableDMAReq_RX(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_I2S_IsEnabledDMAReq_RX(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_I2S_IsEnabledDMAReq_RX(const SPI_TypeDef *SPIx) { return LL_SPI_IsEnabledDMAReq_RX(SPIx); } @@ -1948,7 +1963,7 @@ __STATIC_INLINE void LL_I2S_DisableDMAReq_TX(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_I2S_IsEnabledDMAReq_TX(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_I2S_IsEnabledDMAReq_TX(const SPI_TypeDef *SPIx) { return LL_SPI_IsEnabledDMAReq_TX(SPIx); } @@ -1993,7 +2008,7 @@ __STATIC_INLINE void LL_I2S_TransmitData16(SPI_TypeDef *SPIx, uint16_t TxData) * @{ */ -ErrorStatus LL_I2S_DeInit(SPI_TypeDef *SPIx); +ErrorStatus LL_I2S_DeInit(const SPI_TypeDef *SPIx); ErrorStatus LL_I2S_Init(SPI_TypeDef *SPIx, LL_I2S_InitTypeDef *I2S_InitStruct); void LL_I2S_StructInit(LL_I2S_InitTypeDef *I2S_InitStruct); void LL_I2S_ConfigPrescaler(SPI_TypeDef *SPIx, uint32_t PrescalerLinear, uint32_t PrescalerParity); diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h index 7bb11b4b25..8913e61db2 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h +++ b/system/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h @@ -364,10 +364,10 @@ typedef struct /** @defgroup TIM_LL_EC_COUNTERMODE Counter Mode * @{ */ -#define LL_TIM_COUNTERMODE_UP 0x00000000U /*!Purpose

Update History

- +

Main Changes

    @@ -49,6 +49,135 @@

    Main Changes

Contents

    +
  • HAL GPIO update +
      +
    • Replace GPIO_Pin_x with GPIO_PIN_x to be compliant with macros definition.
      • +
    • +
  • HAL RCC update +
      +
    • Remove unnecessary uint64_t in HAL_RCC_GetSysClockFreq() API.
      • +
    • +
  • HAL FLASH update +
      +
    • Add UNUSED() macro to avoid the generation of a warning related to the unused argument ‘TypeProgram’.
      • +
    • Fix UNUSED_VALUE Coverity warnings.
      • +
    • +
  • HAL/LL CORTEX update +
      +
    • Update HAL_MPU_ConfigRegion() API to allow the configuration of the MPU registers independently of the value of Enable/Disable field.
      • +
    • Add new HAL_MPU_EnableRegion()/ HAL_MPU_DisableRegion() APIs.
      • +
    • Add UNUSED() macro to avoid the generation of a warning related to the unused argument ‘SubPriority’.
      • +
    • Add missing parenthesis() in LL_MPU_ConfigRegion() API.
      • +
    • +
  • LL UTILS update +
      +
    • Fix a note about Ticks parameter.
      • +
    • +
  • HAL CRYP update +
      +
    • Update Crypt/Decrypt IT processes to avoid Computation Completed IRQ fires before the DINR pointer increment.
      • +
    • +
  • HAL/LL ADC update +
      +
    • Update LL_ADC_DeInit() API to remove useless action of conversion trigger change.
      • +
    • Add UNUSED() macro to avoid the generation of a warning related to the unused argument ‘SingleDiff’.
      • +
    • Update description field in HAL_ADCEx_EnableVREFINT() and HAL_ADCEx_EnableVREFINTTempSensor() APIs.
      • +
    • Update description of LL_ADC_REG_ReadConversionData32() API.
      • +
    • Fix “Unchecked return value” Coverity warnings.
      • +
    • +
  • HAL DAC update +
      +
    • Fix “Unchecked return value” Coverity warnings.
      • +
    • +
  • HAL/LL TIM update +
      +
    • Remove multiple volatile reads or writes in interrupt handler for better performance.
      • +
    • HAL TIM driver’s operational behavior improvement.
      • +
    • Update interrupt flag (UIF) is cleared when the update event is generated by software.
      • +
    • +
  • HAL/LL LPTIM update +
      +
    • Remove redundant IS_LPTIM_AUTORELOAD() macro.
      • +
    • +
  • HAL/LL RTC BKP update +
      +
    • Remove macro __HAL_RTC_TAMPER_GET_IT() as it is redundant with macro __HAL_RTC_TAMPER_GET_FLAG() and create an alias into the hal_legacy.h file.
      • +
    • Expand the cast of ‘RTC_CR_BYPSHAD’ to 32 bits when writing to the CR register in HAL_RTCEx_DisableBypassShadow() API to avoid overwriting its upper bits.
      • +
    • Correct misleading note about shadow registers.
      • +
    • +
  • HAL UART update +
      +
    • Update initialization sequence for TXINV, RXINV and TXRXSWAP settings.
      • +
    • Fix incorrect gState check in HAL_UART_RegisterRxEventCallback()/HAL_UART_UnRegisterRxEventCallback() to allow user Rx Event Callback registration when a transmit is ongoing.
      • +
    • Avoid RTOF flag to be cleared by a transmit process in polling mode.
      • +
    • Correct DMA Rx abort procedure impact on ongoing Tx transfer in polling mode.
      • +
    • Add HAL_UART_RXEVENT_IDLE event notification to user in case of HAL_UARTEx_ReceiveToIdle_DMA() API use with Circular DMA, even if occurring just after TC event.
      • +
    • Correct references to HAL_UARTEx_WakeupCallback() API and to HAL_UART_WAKEUP_CB_ID define, according to series capabilities.
      • +
    • Provide accurate position in RxEventCallback() when ReceptionToIdle mode is used with DMA, when UART and DMA interrupts process is delayed.
      • +
    • +
  • HAL USART update +
      +
    • Improve the visibility of the SPI mode capability in HAL USART description.
      • +
    • +
  • HAL/LL I2C update +
      +
    • Update HAL I2C driver to prefetch data before starting the transmission: +
        +
      • Implementation of errata sheet workaround I2C2-190208 : Transmission stalled after first byte.
        • +
      • +
    • Update HAL I2C driver to disable all interrupts after end of transaction.
      • +
    • Update HAL_I2C_Init() API to clear ADD10 bit in 7 bit addressing mode.
      • +
    • Update HAL_I2C_Mem_Write_IT() API to initialize XferSize at 0.
      • +
    • Update I2C_Slave_ISR_IT(), I2C_Slave_ISR_DMA() and I2C_ITSlaveCplt() to prevent the call of HAL_I2C_ListenCpltCallback() twice.
      • +
    • Update I2C_WaitOnRXNEFlagUntilTimeout() to check I2C_FLAG_AF independently from I2C_FLAG_RXNE.
      • +
    • Remove the unusable code in HAL_I2C_IsDeviceReady() API.
      • +
    • Update I2C_WaitOnFlagUntilTimeout() to handle error case.
      • +
    • Update the HAL I2C driver to implement the errata workaround “Last-received byte loss in reload mode”.
      • +
    • Update HAL_I2C_Slave_Transmit() API to check if the received NACK is the good one.
      • +
    • Update LL_I2C_HandleTranfer() API to prevent undefined behavior of volatile usage before updating the CR2 register.
      • +
    • Move the prefetch process in HAL_I2C_Slave_Transmit() API.
      • +
    • Add abort memory management to HAL_I2C_Master_Abort_IT() API.
      • +
    • Add a temporary variable to get the value to check before comparison.
      • +
    • +
  • HAL SMBUS update +
      +
    • Update HAL SMBUS driver to prefetch data before starting the transmission: +
        +
      • Implementation of errata sheet workaround I2C2-190208: Transmission stalled after first byte.
        • +
      • +
    • Update SMBUS_ITErrorHandler() to flush TXDR just in case of error.
      • +
    • +
  • HAL SPI update +
      +
    • Update HAL_SPI_TransmitReceive() API to set the bit CRCNEXT in case of one byte transaction.
      • +
    • Update IT API to enable interrupts after process unlock.
      • +
    • Add note to clarify HAL_SPI_Receive() API behavior in master mode.
      • +
    • Add units to physical measurements.
      • +
    • Add wait on flag TXE to be set at the end of transaction to be aligned with reference manual.
      • +
    • Check data size before changing state in reception API.
      • +
    • Fix “INTEGER_OVERFLOW” Coverity warning.
      • +
    • +
  • HAL I2S update +
      +
    • Remove ‘go to’ instruction to fix the Misra-C:2012 Advisory Rule15.1.
      • +
    • +
  • HAL USB_FS update +
      +
    • hal_pcd.c/ll_usb.c: fix added to support bulk transfer in double buffer mode.
      • +
    • +
+
+
+
+ +
+

Main Changes

+
    +
  • General updates to fix known defects and enhancements implementation.
    • +
  • HAL code quality enhancement for MISRA-C Rule-8.13 by adding const qualifiers.
    • +
+

Contents

+
  • HAL/LL Generic update
    • Allow redefinition of macro UNUSED(x).
      • @@ -205,11 +334,11 @@

      Contents

      -

      Main Changes

      +

      Main Changes

      • General updates to fix known defects and enhancements implementation
      -

      Contents

      +

      Contents

      • HAL updates
          @@ -293,7 +422,7 @@

          Contents

          -

          Main Changes

          +

          Main Changes

          • General updates to fix known defects and enhancements implementation
          • Add new HAL EXTI driver
            • @@ -302,7 +431,7 @@

            Main Changes

          • Correct MISRA-C 2012: Rule-10.5, Rule-10.4_a, Rule-2.7 and Rule-21.1
          • Remove useless casts
          -

          Contents

          +

          Contents

          • HAL driver
              @@ -556,11 +685,11 @@

              Contents

              -

              Main Changes

              +

              Main Changes

              • General updates to fix known defects and enhancements implementation
              -

              Contents

              +

              Contents

              • HAL Generic update
                  @@ -604,13 +733,13 @@

                  Contents

                  -

                  Main Changes

                  +

                  Main Changes

                  Patch release

                  • Update of HAL driver to include latest corrections and ensure compatibility with legacy code.
                  • The V1.10.2 version contains all the updates implemented in V1.10.1 version. For more details, please refer to the History.
                  -

                  Contents

                  +

                  Contents

                  • HAL
                      @@ -626,12 +755,12 @@

                      Contents

                      -

                      Main Changes

                      +

                      Main Changes

                      Patch release

                      • Update of HAL FLASH, RCC and SPI drivers to include latest corrections
                      -

                      Contents

                      +

                      Contents

                      • HAL RCC
                          @@ -652,7 +781,7 @@

                          Contents

                          -

                          Main Changes

                          +

                          Main Changes

                          Major maintenance release

                          • Add support of new L0 Value Line devices
                            • @@ -660,7 +789,7 @@

                            Major maintenance release

                          • Add several enhancements implementation
                          • Fix known defects to be aligned with others STM32 series
                          -

                          Contents

                          +

                          Contents

                          • HAL/LL generic
                              @@ -944,16 +1073,16 @@

                              Contents

                              -

                              Main Changes

                              +

                              Main Changes

                              Internal release

                              -

                              Main Changes

                              +

                              Main Changes

                              Maintenance release

                              -

                              Contents

                              +

                              Contents

                              • HAL/LL generic
                                  @@ -985,9 +1114,9 @@

                                  Contents

                                  -

                                  Main Changes

                                  +

                                  Main Changes

                                  Patch release

                                  -

                                  Contents

                                  +

                                  Contents

                                  • HAL LCD
                                      @@ -999,9 +1128,9 @@

                                      Contents

                                      -

                                      Main Changes

                                      +

                                      Main Changes

                                      Maintenance release

                                      -

                                      Contents

                                      +

                                      Contents

                                      • HAL generic
                                          @@ -1142,9 +1271,9 @@

                                          Contents

                                          -

                                          Main Changes

                                          +

                                          Main Changes

                                          Maintenance release

                                          -

                                          Contents

                                          +

                                          Contents

                                          • HAL/LL COMP update
                                              @@ -1177,7 +1306,7 @@

                                              Contents

                                              -

                                              Main Changes

                                              +

                                              Main Changes

                                              Maintenance release

                                              • First official release supporting the Low Level drivers for the STM32L0xx family: @@ -1187,7 +1316,7 @@

                                                Maintenance release

                                              • Low Layer drivers APIs are implemented as static inline function in new Inc/stm32l0xx_ll_ppp.h files for PPP peripherals, there is no configuration file and each stm32l0xx_ll_ppp.h file must be included in user code.
                                            -

                                            Contents

                                            +

                                            Contents

                                            • Updates of the HAL
                                                @@ -1249,9 +1378,9 @@

                                                Contents

                                                -

                                                Main Changes

                                                +

                                                Main Changes

                                                Maintenance release

                                                -

                                                Contents

                                                +

                                                Contents

                                                • Main HAL updates
                                                    @@ -1320,7 +1449,7 @@

                                                    Contents

                                                    -

                                                    Main Changes

                                                    +

                                                    Main Changes

                                                    Maintenance release

                                                    • This release includes the support of the support of STM32L011xx and STM32L021xx devices
                                                      • @@ -1332,7 +1461,7 @@

                                                      Maintenance release

                                                    • Timers available : TIM2,TIM21,LPTIM1 (instead of TIM2,TIM3,TIM6,TIM7,TIM21,TIM22,LPTIM1)
                                                  -

                                                  Contents

                                                  +

                                                  Contents

                                                  • HAL COMP update
                                                      @@ -1362,7 +1491,7 @@

                                                      Contents

                                                      -

                                                      Main Changes

                                                      +

                                                      Main Changes

                                                      Major maintenance release

                                                      • Major update of the HAL API : @@ -1379,7 +1508,7 @@

                                                        Major maintenance release

                                                      • Timers available : TIM2,TIM21,TIM22,LPTIM1 (instead of TIM2,TIM3,TIM6,TIM7,TIM21,TIM22,LPTIM1)
                                                    -

                                                    Contents

                                                    +

                                                    Contents

                                                    • HAL ADC update
                                                        @@ -1599,13 +1728,13 @@

                                                        Contents

                                                        -

                                                        Main Changes

                                                        +

                                                        Main Changes

                                                        Official release

                                                        • This release includes the support of the STM32L071xx, STM32L072xx, STM32L073xx, STM32L082xx, STM32L083xx devices
                                                        • Fix known defects and add several enhancements implementation
                                                        -

                                                        Contents

                                                        +

                                                        Contents

                                                        • HAL Flash** update
                                                            @@ -1644,9 +1773,9 @@

                                                            Known Limitations

                                                            -

                                                            Main Changes

                                                            +

                                                            Main Changes

                                                            Official release

                                                            -

                                                            Contents

                                                            +

                                                            Contents

                                                            • HAL generic** update
                                                                @@ -1858,7 +1987,7 @@

                                                                Contents

                                                                -

                                                                Main Changes

                                                                +

                                                                Main Changes

                                                                First official release

                                                                diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c index f1733d6528..2fe2915598 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c +++ b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c @@ -59,7 +59,7 @@ */ #define __STM32L0xx_HAL_VERSION_MAIN (0x01U) /*!< [31:24] main version */ #define __STM32L0xx_HAL_VERSION_SUB1 (0x0AU) /*!< [23:16] sub1 version */ -#define __STM32L0xx_HAL_VERSION_SUB2 (0x06U) /*!< [15:8] sub2 version */ +#define __STM32L0xx_HAL_VERSION_SUB2 (0x07U) /*!< [15:8] sub2 version */ #define __STM32L0xx_HAL_VERSION_RC (0x00U) /*!< [7:0] release candidate */ #define __STM32L0xx_HAL_VERSION ((__STM32L0xx_HAL_VERSION_MAIN << 24U)\ |(__STM32L0xx_HAL_VERSION_SUB1 << 16U)\ diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c index a02b8bd903..24fc1d275c 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c +++ b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c @@ -134,12 +134,6 @@ monitored, thresholds, ...) using function HAL_ADC_AnalogWDGConfig(). - - (#) When device is in mode low-power (low-power run, low-power sleep or stop mode), - function "HAL_ADCEx_EnableVREFINT()" must be called before function HAL_ADC_Init(). - In case of internal temperature sensor to be measured: - function "HAL_ADCEx_EnableVREFINTTempSensor()" must be called similarilly - *** Execution of ADC conversions *** ==================================== [..] @@ -382,11 +376,6 @@ static void ADC_DelayMicroSecond(uint32_t microSecond); * @note This function configures the ADC within 2 scopes: scope of entire * ADC and scope of regular group. For parameters details, see comments * of structure "ADC_InitTypeDef". - * @note When device is in mode low-power (low-power run, low-power sleep or stop mode), - * function "HAL_ADCEx_EnableVREFINT()" must be called before function HAL_ADC_Init() - * (in case of previous ADC operations: function HAL_ADC_DeInit() must be called first). - * In case of internal temperature sensor to be measured: - * function "HAL_ADCEx_EnableVREFINTTempSensor()" must be called similarilly. * @param hadc ADC handle * @retval HAL status */ @@ -1552,7 +1541,7 @@ HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef *hadc, uint32_t *pData, ui __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR); /* Start the DMA channel */ - HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length); + tmp_hal_status = HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length); /* Enable conversion of regular group. */ /* If software start has been selected, conversion starts immediately. */ diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c index 56a3fb7236..a9d225655d 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c +++ b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c @@ -110,6 +110,9 @@ HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef *hadc, uint32_t /* Check the parameters */ assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); + /* Prevent unused argument(s) compilation warning */ + UNUSED(SingleDiff); + /* Process locked */ __HAL_LOCK(hadc); @@ -192,6 +195,9 @@ uint32_t HAL_ADCEx_Calibration_GetValue(ADC_HandleTypeDef *hadc, uint32_t Single assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff)); + /* Prevent unused argument(s) compilation warning */ + UNUSED(SingleDiff); + /* Return the ADC calibration value */ return ((hadc->Instance->CALFACT) & 0x0000007FU); } @@ -214,6 +220,9 @@ HAL_StatusTypeDef HAL_ADCEx_Calibration_SetValue(ADC_HandleTypeDef *hadc, uint32 assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff)); assert_param(IS_ADC_CALFACT(CalibrationFactor)); + /* Prevent unused argument(s) compilation warning */ + UNUSED(SingleDiff); + /* Process locked */ __HAL_LOCK(hadc); @@ -246,11 +255,11 @@ HAL_StatusTypeDef HAL_ADCEx_Calibration_SetValue(ADC_HandleTypeDef *hadc, uint32 /** * @brief Enables the buffer of Vrefint for the ADC, required when device is in mode low-power (low-power run, low-power sleep or stop mode) - * This function must be called before function HAL_ADC_Init() - * (in case of previous ADC operations: function HAL_ADC_DeInit() must be called first) + * However ADC is not functional in low-power mode, therefore these functions is not targeted for ADC (obsolete) * For more details on procedure and buffer current consumption, refer to device reference manual. * @note This is functional only if the LOCK is not set. - * @note This API is obsolete. This configuration is done in HAL_ADC_ConfigChannel(). + * @note This API is obsolete. This equivalent configuration is done in HAL_ADC_ConfigChannel(). + bit fields in ADC_CCR and SYSCFG_CFGR3 control the same signals to VREFINT and TempSensor buffers * @retval None */ HAL_StatusTypeDef HAL_ADCEx_EnableVREFINT(void) @@ -282,7 +291,8 @@ HAL_StatusTypeDef HAL_ADCEx_EnableVREFINT(void) /** * @brief Disables the Buffer Vrefint for the ADC. * @note This is functional only if the LOCK is not set. - * @note This API is obsolete. This configuration is done in HAL_ADC_ConfigChannel(). + * @note This API is obsolete. This equivalent configuration is done in HAL_ADC_ConfigChannel(). + bit fields in ADC_CCR and SYSCFG_CFGR3 control the same signals to VREFINT and TempSensor buffers. * @retval None */ void HAL_ADCEx_DisableVREFINT(void) @@ -292,12 +302,12 @@ void HAL_ADCEx_DisableVREFINT(void) } /** - * @brief Enables the buffer of temperature sensor for the ADC, required when device is in mode low-power (low-power run, low-power sleep or stop mode) - * This function must be called before function HAL_ADC_Init() - * (in case of previous ADC operations: function HAL_ADC_DeInit() must be called first) + * @brief Enables the buffer of temperature sensor, when device is in mode low-power (low-power run, low-power sleep or stop mode) + * However ADC is not functional in low-power mode, therefore these functions is not targeted for ADC (obsolete) * For more details on procedure and buffer current consumption, refer to device reference manual. * @note This is functional only if the LOCK is not set. - * @note This API is obsolete. This configuration is done in HAL_ADC_ConfigChannel(). + * @note This API is obsolete. This equivalent configuration is done in HAL_ADC_ConfigChannel(). + bit fields in ADC_CCR and SYSCFG_CFGR3 control the same signals to VREFINT and TempSensor buffers * @retval None */ HAL_StatusTypeDef HAL_ADCEx_EnableVREFINTTempSensor(void) @@ -329,7 +339,8 @@ HAL_StatusTypeDef HAL_ADCEx_EnableVREFINTTempSensor(void) /** * @brief Disables the VREFINT and Sensor for the ADC. * @note This is functional only if the LOCK is not set. - * @note This API is obsolete. This configuration is done in HAL_ADC_ConfigChannel(). + * @note This API is obsolete. This equivalent configuration is done in HAL_ADC_ConfigChannel(). + bit fields in ADC_CCR and SYSCFG_CFGR3 control the same signals to VREFINT and TempSensor buffers. * @retval None */ void HAL_ADCEx_DisableVREFINTTempSensor(void) diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c index ca92c22195..c36ae2b0bf 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c +++ b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c @@ -133,6 +133,10 @@ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t Sub /* Check the parameters */ assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); NVIC_SetPriority(IRQn,PreemptPriority); + + /* Prevent unused argument(s) compilation warning */ + UNUSED(SubPriority); + } /** @@ -345,9 +349,41 @@ void HAL_MPU_Enable(uint32_t MPU_Control) } +/** + * @brief Enable the MPU Region. + * @retval None + */ +void HAL_MPU_EnableRegion(uint32_t RegionNumber) +{ + /* Check the parameters */ + assert_param(IS_MPU_REGION_NUMBER(RegionNumber)); + + /* Set the Region number */ + MPU->RNR = RegionNumber; + + /* Enable the Region */ + SET_BIT(MPU->RASR, MPU_RASR_ENABLE_Msk); +} + +/** + * @brief Disable the MPU Region. + * @retval None + */ +void HAL_MPU_DisableRegion(uint32_t RegionNumber) +{ + /* Check the parameters */ + assert_param(IS_MPU_REGION_NUMBER(RegionNumber)); + + /* Set the Region number */ + MPU->RNR = RegionNumber; + + /* Disable the Region */ + CLEAR_BIT(MPU->RASR, MPU_RASR_ENABLE_Msk); +} + /** * @brief Initialize and configure the Region and the memory to be protected. - * @param MPU_Init Pointer to a MPU_Region_InitTypeDef structure that contains + * @param MPU_Init Pointer to a MPU_Region_InitTypeDef structure that contains * the initialization and configuration information. * @retval None */ @@ -356,42 +392,30 @@ void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init) /* Check the parameters */ assert_param(IS_MPU_REGION_NUMBER(MPU_Init->Number)); assert_param(IS_MPU_REGION_ENABLE(MPU_Init->Enable)); - - /* Follow ARM recommendation with Data Memory Barrier prior to MPU configuration */ - __DMB(); + assert_param(IS_MPU_INSTRUCTION_ACCESS(MPU_Init->DisableExec)); + assert_param(IS_MPU_REGION_PERMISSION_ATTRIBUTE(MPU_Init->AccessPermission)); + assert_param(IS_MPU_ACCESS_SHAREABLE(MPU_Init->IsShareable)); + assert_param(IS_MPU_ACCESS_CACHEABLE(MPU_Init->IsCacheable)); + assert_param(IS_MPU_ACCESS_BUFFERABLE(MPU_Init->IsBufferable)); + assert_param(IS_MPU_SUB_REGION_DISABLE(MPU_Init->SubRegionDisable)); + assert_param(IS_MPU_REGION_SIZE(MPU_Init->Size)); /* Set the Region number */ MPU->RNR = MPU_Init->Number; - if ((MPU_Init->Enable) == MPU_REGION_ENABLE) - { - /* Check the parameters */ - assert_param(IS_MPU_INSTRUCTION_ACCESS(MPU_Init->DisableExec)); - assert_param(IS_MPU_REGION_PERMISSION_ATTRIBUTE(MPU_Init->AccessPermission)); - assert_param(IS_MPU_ACCESS_SHAREABLE(MPU_Init->IsShareable)); - assert_param(IS_MPU_ACCESS_CACHEABLE(MPU_Init->IsCacheable)); - assert_param(IS_MPU_ACCESS_BUFFERABLE(MPU_Init->IsBufferable)); - assert_param(IS_MPU_SUB_REGION_DISABLE(MPU_Init->SubRegionDisable)); - assert_param(IS_MPU_REGION_SIZE(MPU_Init->Size)); - - /* Set the base adsress and set the 4 LSB to 0 */ - MPU->RBAR = (MPU_Init->BaseAddress) & 0xfffffff0U; - - /* Fill the field RASR */ - MPU->RASR = ((uint32_t)MPU_Init->DisableExec << MPU_RASR_XN_Pos) | - ((uint32_t)MPU_Init->AccessPermission << MPU_RASR_AP_Pos) | - ((uint32_t)MPU_Init->IsShareable << MPU_RASR_S_Pos) | - ((uint32_t)MPU_Init->IsCacheable << MPU_RASR_C_Pos) | - ((uint32_t)MPU_Init->IsBufferable << MPU_RASR_B_Pos) | - ((uint32_t)MPU_Init->SubRegionDisable << MPU_RASR_SRD_Pos) | - ((uint32_t)MPU_Init->Size << MPU_RASR_SIZE_Pos) | - ((uint32_t)MPU_Init->Enable << MPU_RASR_ENABLE_Pos); - } - else - { - MPU->RBAR = 0x00U; - MPU->RASR = 0x00U; - } + /* Disable the Region */ + CLEAR_BIT(MPU->RASR, MPU_RASR_ENABLE_Msk); + + /* Apply configuration */ + MPU->RBAR = MPU_Init->BaseAddress; + MPU->RASR = ((uint32_t)MPU_Init->DisableExec << MPU_RASR_XN_Pos) | + ((uint32_t)MPU_Init->AccessPermission << MPU_RASR_AP_Pos) | + ((uint32_t)MPU_Init->IsShareable << MPU_RASR_S_Pos) | + ((uint32_t)MPU_Init->IsCacheable << MPU_RASR_C_Pos) | + ((uint32_t)MPU_Init->IsBufferable << MPU_RASR_B_Pos) | + ((uint32_t)MPU_Init->SubRegionDisable << MPU_RASR_SRD_Pos) | + ((uint32_t)MPU_Init->Size << MPU_RASR_SIZE_Pos) | + ((uint32_t)MPU_Init->Enable << MPU_RASR_ENABLE_Pos); } #endif /* __MPU_PRESENT */ diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_crc.c b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_crc.c index 763cfc03ac..cb2cdcc4c0 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_crc.c +++ b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_crc.c @@ -403,7 +403,7 @@ uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t * @param hcrc CRC handle * @retval HAL state */ -HAL_CRC_StateTypeDef HAL_CRC_GetState(CRC_HandleTypeDef *hcrc) +HAL_CRC_StateTypeDef HAL_CRC_GetState(const CRC_HandleTypeDef *hcrc) { /* Return CRC handle state */ return hcrc->State; diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_crc_ex.c b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_crc_ex.c index 70f2890e3f..f5e130c6d5 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_crc_ex.c +++ b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_crc_ex.c @@ -210,8 +210,6 @@ HAL_StatusTypeDef HAL_CRCEx_Output_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_ } - - /** * @} */ diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cryp.c b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cryp.c index 16e104a1a9..24d64a72b8 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cryp.c +++ b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cryp.c @@ -823,6 +823,12 @@ HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t /* Get the last input data address */ inputaddr = (uint32_t)hcryp->pCrypInBuffPtr; + /* Increment the pointer before writing the input block in the IN FIFO to make sure that + when Computation Completed IRQ fires, the hcryp->CrypInCount has always a consistent value + and it is ready for the next operation. */ + hcryp->pCrypInBuffPtr += 16U; + hcryp->CrypInCount -= 16U; + /* Write the Input block in the Data Input register */ hcryp->Instance->DINR = *(uint32_t*)(inputaddr); inputaddr+=4U; @@ -831,8 +837,6 @@ HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t hcryp->Instance->DINR = *(uint32_t*)(inputaddr); inputaddr+=4U; hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - hcryp->pCrypInBuffPtr += 16U; - hcryp->CrypInCount -= 16U; /* Return function status */ return HAL_OK; @@ -912,6 +916,12 @@ HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t /* Get the last input data address */ inputaddr = (uint32_t)hcryp->pCrypInBuffPtr; + /* Increment the pointer before writing the input block in the IN FIFO to make sure that + when Computation Completed IRQ fires, the hcryp->CrypInCount has always a consistent value + and it is ready for the next operation. */ + hcryp->pCrypInBuffPtr += 16U; + hcryp->CrypInCount -= 16U; + /* Write the Input block in the Data Input register */ hcryp->Instance->DINR = *(uint32_t*)(inputaddr); inputaddr+=4U; @@ -920,8 +930,6 @@ HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t hcryp->Instance->DINR = *(uint32_t*)(inputaddr); inputaddr+=4U; hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - hcryp->pCrypInBuffPtr += 16U; - hcryp->CrypInCount -= 16U; /* Return function status */ return HAL_OK; @@ -1001,6 +1009,12 @@ HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t /* Get the last input data address */ inputaddr = (uint32_t)hcryp->pCrypInBuffPtr; + /* Increment the pointer before writing the input block in the IN FIFO to make sure that + when Computation Completed IRQ fires, the hcryp->CrypInCount has always a consistent value + and it is ready for the next operation. */ + hcryp->pCrypInBuffPtr += 16U; + hcryp->CrypInCount -= 16U; + /* Write the Input block in the Data Input register */ hcryp->Instance->DINR = *(uint32_t*)(inputaddr); inputaddr+=4U; @@ -1009,8 +1023,6 @@ HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t hcryp->Instance->DINR = *(uint32_t*)(inputaddr); inputaddr+=4U; hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - hcryp->pCrypInBuffPtr += 16U; - hcryp->CrypInCount -= 16U; /* Return function status */ return HAL_OK; @@ -1087,6 +1099,12 @@ HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t /* Get the last input data address */ inputaddr = (uint32_t)hcryp->pCrypInBuffPtr; + /* Increment the pointer before writing the input block in the IN FIFO to make sure that + when Computation Completed IRQ fires, the hcryp->CrypInCount has always a consistent value + and it is ready for the next operation. */ + hcryp->pCrypInBuffPtr += 16U; + hcryp->CrypInCount -= 16U; + /* Write the Input block in the Data Input register */ hcryp->Instance->DINR = *(uint32_t*)(inputaddr); inputaddr+=4U; @@ -1095,8 +1113,6 @@ HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t hcryp->Instance->DINR = *(uint32_t*)(inputaddr); inputaddr+=4U; hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - hcryp->pCrypInBuffPtr += 16U; - hcryp->CrypInCount -= 16U; /* Return function status */ return HAL_OK; @@ -1176,6 +1192,12 @@ HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t /* Get the last input data address */ inputaddr = (uint32_t)hcryp->pCrypInBuffPtr; + /* Increment the pointer before writing the input block in the IN FIFO to make sure that + when Computation Completed IRQ fires, the hcryp->CrypInCount has always a consistent value + and it is ready for the next operation. */ + hcryp->pCrypInBuffPtr += 16U; + hcryp->CrypInCount -= 16U; + /* Write the Input block in the Data Input register */ hcryp->Instance->DINR = *(uint32_t*)(inputaddr); inputaddr+=4U; @@ -1184,8 +1206,6 @@ HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t hcryp->Instance->DINR = *(uint32_t*)(inputaddr); inputaddr+=4U; hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - hcryp->pCrypInBuffPtr += 16U; - hcryp->CrypInCount -= 16U; /* Return function status */ return HAL_OK; @@ -1265,6 +1285,12 @@ HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t /* Get the last input data address */ inputaddr = (uint32_t)hcryp->pCrypInBuffPtr; + /* Increment the pointer before writing the input block in the IN FIFO to make sure that + when Computation Completed IRQ fires, the hcryp->CrypInCount has always a consistent value + and it is ready for the next operation. */ + hcryp->pCrypInBuffPtr += 16U; + hcryp->CrypInCount -= 16U; + /* Write the Input block in the Data Input register */ hcryp->Instance->DINR = *(uint32_t*)(inputaddr); inputaddr+=4U; @@ -1273,8 +1299,6 @@ HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t hcryp->Instance->DINR = *(uint32_t*)(inputaddr); inputaddr+=4U; hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - hcryp->pCrypInBuffPtr += 16U; - hcryp->CrypInCount -= 16U; /* Return function status */ return HAL_OK; @@ -1922,6 +1946,12 @@ static HAL_StatusTypeDef CRYP_EncryptDecrypt_IT(CRYP_HandleTypeDef *hcryp) /* Get the last Input data address */ inputaddr = (uint32_t)hcryp->pCrypInBuffPtr; + /* Increment the pointer before writing the input block in the IN FIFO to make sure that + when Computation Completed IRQ fires, the hcryp->CrypInCount has always a consistent value + and it is ready for the next operation. */ + hcryp->pCrypInBuffPtr += 16U; + hcryp->CrypInCount -= 16U; + /* Write the Input block in the Data Input register */ hcryp->Instance->DINR = *(uint32_t*)(inputaddr); inputaddr+=4U; @@ -1930,8 +1960,6 @@ static HAL_StatusTypeDef CRYP_EncryptDecrypt_IT(CRYP_HandleTypeDef *hcryp) hcryp->Instance->DINR = *(uint32_t*)(inputaddr); inputaddr+=4U; hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - hcryp->pCrypInBuffPtr += 16U; - hcryp->CrypInCount -= 16U; } return HAL_OK; } diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dac_ex.c b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dac_ex.c index 4107d6b3cd..c87236ff39 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dac_ex.c +++ b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dac_ex.c @@ -389,6 +389,7 @@ HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel) */ HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment) { + HAL_StatusTypeDef status; uint32_t tmpreg = 0U; /* Check the parameters */ @@ -426,14 +427,12 @@ HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, u /* Get DHR12L1 address */ tmpreg = (uint32_t)&hdac->Instance->DHR12L1; break; - case DAC_ALIGN_8B_R: + default: /* case DAC_ALIGN_8B_R */ /* Get DHR8R1 address */ tmpreg = (uint32_t)&hdac->Instance->DHR8R1; break; - default: - break; } - UNUSED(tmpreg); /* avoid warning on tmpreg affectation with stupid compiler */ + UNUSED(tmpreg); /* avoid warning on tmpreg affectation */ } else { @@ -460,12 +459,10 @@ HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, u /* Get DHR12L2 address */ tmpreg = (uint32_t)&hdac->Instance->DHR12L2; break; - case DAC_ALIGN_8B_R: + default: /* case DAC_ALIGN_8B_R */ /* Get DHR8R2 address */ tmpreg = (uint32_t)&hdac->Instance->DHR8R2; break; - default: - break; } } @@ -476,7 +473,7 @@ HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, u __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1); /* Enable the DMA Stream */ - HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length); + status = HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length); } else { @@ -484,17 +481,23 @@ HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, u __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2); /* Enable the DMA Stream */ - HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length); + status = HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length); } - /* Enable the Peripharal */ - __HAL_DAC_ENABLE(hdac, Channel); - /* Process Unlocked */ __HAL_UNLOCK(hdac); + if (status == HAL_OK) + { + /* Enable the Peripheral */ + __HAL_DAC_ENABLE(hdac, Channel); + } + else + { + hdac->ErrorCode |= HAL_DAC_ERROR_DMA; + } /* Return function status */ - return HAL_OK; + return status; } /** @@ -734,6 +737,7 @@ HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel) */ HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment) { + HAL_StatusTypeDef status; uint32_t tmpreg = 0U; /* Check the parameters */ @@ -769,30 +773,35 @@ HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, u /* Get DHR12L1 address */ tmpreg = (uint32_t)&hdac->Instance->DHR12L1; break; - case DAC_ALIGN_8B_R: + default: /* Get DHR8R1 address */ tmpreg = (uint32_t)&hdac->Instance->DHR8R1; break; - default: - break; } - UNUSED(tmpreg); /* avoid warning on tmpreg affectation with stupid compiler */ + UNUSED(tmpreg); /* avoid warning on tmpreg affectation */ - /* Enable the DMA Stream */ /* Enable the DAC DMA underrun interrupt */ __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1); /* Enable the DMA Stream */ - HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length); + status = HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length); /* Enable the Peripharal */ - __HAL_DAC_ENABLE(hdac, Channel); - /* Process Unlocked */ __HAL_UNLOCK(hdac); + if (status == HAL_OK) + { + /* Enable the Peripharal */ + __HAL_DAC_ENABLE(hdac, Channel); + } + else + { + hdac->ErrorCode |= HAL_DAC_ERROR_DMA; + } + /* Return function status */ - return HAL_OK; + return status; } /** diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_exti.c b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_exti.c index 958d97953b..4319b6253a 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_exti.c +++ b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_exti.c @@ -64,7 +64,7 @@ (++) Provide exiting handle as parameter. (++) Provide pointer on EXTI_ConfigTypeDef structure as second parameter. - (#) Clear Exti configuration of a dedicated line using HAL_EXTI_GetConfigLine(). + (#) Clear Exti configuration of a dedicated line using HAL_EXTI_ClearConfigLine(). (++) Provide exiting handle as parameter. (#) Register callback to treat Exti interrupts using HAL_EXTI_RegisterCallback(). @@ -75,7 +75,7 @@ (#) Get interrupt pending bit using HAL_EXTI_GetPending(). - (#) Clear interrupt pending bit using HAL_EXTI_GetPending(). + (#) Clear interrupt pending bit using HAL_EXTI_ClearPending(). (#) Generate software interrupt using HAL_EXTI_GenerateSWI(). diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c index 4ccd33c04a..163a160584 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c +++ b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c @@ -227,7 +227,7 @@ static void FLASH_SetErrorCode(void); */ HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint32_t Data) { - HAL_StatusTypeDef status = HAL_ERROR; + HAL_StatusTypeDef status; /* Process Locked */ __HAL_LOCK(&pFlash); @@ -236,6 +236,9 @@ HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint assert_param(IS_FLASH_TYPEPROGRAM(TypeProgram)); assert_param(IS_FLASH_PROGRAM_ADDRESS(Address)); + /* Prevent unused argument(s) compilation warning */ + UNUSED(TypeProgram); + /* Wait for last operation to be completed */ status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); @@ -278,6 +281,9 @@ HAL_StatusTypeDef HAL_FLASH_Program_IT(uint32_t TypeProgram, uint32_t Address, u assert_param(IS_FLASH_TYPEPROGRAM(TypeProgram)); assert_param(IS_FLASH_PROGRAM_ADDRESS(Address)); + /* Prevent unused argument(s) compilation warning */ + UNUSED(TypeProgram); + /* Enable End of FLASH Operation and Error source interrupts */ __HAL_FLASH_ENABLE_IT(FLASH_IT_EOP | FLASH_IT_ERR); diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c index ad33fd132f..eb6c4f2744 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c +++ b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c @@ -165,7 +165,7 @@ static uint32_t FLASH_OB_GetWRP2(void); */ HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError) { - HAL_StatusTypeDef status = HAL_ERROR; + HAL_StatusTypeDef status; uint32_t address = 0U; /* Process Locked */ @@ -229,7 +229,7 @@ HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t */ HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit) { - HAL_StatusTypeDef status = HAL_ERROR; + HAL_StatusTypeDef status; /* If procedure already ongoing, reject the next one */ if (pFlash.ProcedureOnGoing != FLASH_PROC_NONE) @@ -716,9 +716,9 @@ HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Erase(uint32_t Address) * @retval HAL_StatusTypeDef HAL Status */ -HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Program(uint32_t TypeProgram, uint32_t Address, uint32_t Data) +HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Program(uint32_t TypeProgram, uint32_t Address, uint32_t Data) { - HAL_StatusTypeDef status = HAL_ERROR; + HAL_StatusTypeDef status; /* Process Locked */ __HAL_LOCK(&pFlash); diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c index 1aeae7465f..0bba1c13df 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c +++ b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c @@ -447,7 +447,7 @@ void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) * @param GPIOx where x can be (A..E and H) to select the GPIO peripheral for STM32L0xx family. * Note that GPIOE is not available on all devices. * @param GPIO_Pin specifies the port bit to be locked. -* This parameter can be any combination of GPIO_Pin_x where x can be (0..15). +* This parameter can be any combination of GPIO_PIN_x where x can be (0..15). * All port bits are not necessarily available on all GPIOs. * @retval None */ diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c index 1bff29d50a..99b7b63467 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c +++ b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c @@ -90,7 +90,7 @@ add their own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback() (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and users can add their own code by customization of function pointer HAL_I2C_ErrorCallback() - (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT() + (+) Abort a master or memory I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT() (+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and users can add their own code by customization of function pointer HAL_I2C_AbortCpltCallback() (+) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro. @@ -156,7 +156,7 @@ HAL_I2C_Master_Seq_Receive_IT() or using HAL_I2C_Master_Seq_Receive_DMA() (+++) At reception end of current frame transfer, HAL_I2C_MasterRxCpltCallback() is executed and users can add their own code by customization of function pointer HAL_I2C_MasterRxCpltCallback() - (++) Abort a master IT or DMA I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT() + (++) Abort a master or memory IT or DMA I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT() (+++) End of abort process, HAL_I2C_AbortCpltCallback() is executed and users can add their own code by customization of function pointer HAL_I2C_AbortCpltCallback() (++) Enable/disable the Address listen mode in slave I2C mode using HAL_I2C_EnableListen_IT() @@ -214,7 +214,7 @@ add their own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback() (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and users can add their own code by customization of function pointer HAL_I2C_ErrorCallback() - (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT() + (+) Abort a master or memory I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT() (+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and users can add their own code by customization of function pointer HAL_I2C_AbortCpltCallback() (+) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro. @@ -608,7 +608,12 @@ HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) /* Configure I2Cx: Addressing Master mode */ if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT) { - hi2c->Instance->CR2 = (I2C_CR2_ADD10); + SET_BIT(hi2c->Instance->CR2, I2C_CR2_ADD10); + } + else + { + /* Clear the I2C ADD10 bit */ + CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_ADD10); } /* Enable the AUTOEND by default, and enable NACK (should be disable only during Slave process */ hi2c->Instance->CR2 |= (I2C_CR2_AUTOEND | I2C_CR2_NACK); @@ -1115,6 +1120,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevA uint16_t Size, uint32_t Timeout) { uint32_t tickstart; + uint32_t xfermode; if (hi2c->State == HAL_I2C_STATE_READY) { @@ -1138,18 +1144,39 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevA hi2c->XferCount = Size; hi2c->XferISR = NULL; - /* Send Slave Address */ - /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ if (hi2c->XferCount > MAX_NBYTE_SIZE) { hi2c->XferSize = MAX_NBYTE_SIZE; - I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, - I2C_GENERATE_START_WRITE); + xfermode = I2C_RELOAD_MODE; } else { hi2c->XferSize = hi2c->XferCount; - I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + xfermode = I2C_AUTOEND_MODE; + } + + if (hi2c->XferSize > 0U) + { + /* Preload TX register */ + /* Write data to TXDR */ + hi2c->Instance->TXDR = *hi2c->pBuffPtr; + + /* Increment Buffer pointer */ + hi2c->pBuffPtr++; + + hi2c->XferCount--; + hi2c->XferSize--; + + /* Send Slave Address */ + /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)(hi2c->XferSize + 1U), xfermode, + I2C_GENERATE_START_WRITE); + } + else + { + /* Send Slave Address */ + /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, I2C_GENERATE_START_WRITE); } @@ -1261,7 +1288,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAd /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ if (hi2c->XferCount > MAX_NBYTE_SIZE) { - hi2c->XferSize = MAX_NBYTE_SIZE; + hi2c->XferSize = 1U; I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ); } @@ -1352,6 +1379,8 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData uint32_t Timeout) { uint32_t tickstart; + uint16_t tmpXferCount; + HAL_StatusTypeDef error; if (hi2c->State == HAL_I2C_STATE_READY) { @@ -1378,14 +1407,6 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData /* Enable Address Acknowledge */ hi2c->Instance->CR2 &= ~I2C_CR2_NACK; - /* Wait until ADDR flag is set */ - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK) - { - /* Disable Address Acknowledge */ - hi2c->Instance->CR2 |= I2C_CR2_NACK; - return HAL_ERROR; - } - /* Preload TX data if no stretch enable */ if (hi2c->Init.NoStretchMode == I2C_NOSTRETCH_ENABLE) { @@ -1399,6 +1420,18 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData hi2c->XferCount--; } + /* Wait until ADDR flag is set */ + if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK) + { + /* Disable Address Acknowledge */ + hi2c->Instance->CR2 |= I2C_CR2_NACK; + + /* Flush TX register */ + I2C_Flush_TXDR(hi2c); + + return HAL_ERROR; + } + /* Clear ADDR flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); @@ -1410,6 +1443,10 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData { /* Disable Address Acknowledge */ hi2c->Instance->CR2 |= I2C_CR2_NACK; + + /* Flush TX register */ + I2C_Flush_TXDR(hi2c); + return HAL_ERROR; } @@ -1422,6 +1459,10 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData { /* Disable Address Acknowledge */ hi2c->Instance->CR2 |= I2C_CR2_NACK; + + /* Flush TX register */ + I2C_Flush_TXDR(hi2c); + return HAL_ERROR; } @@ -1445,31 +1486,48 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData } /* Wait until AF flag is set */ - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, Timeout, tickstart) != HAL_OK) + error = I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, Timeout, tickstart); + + if (error != HAL_OK) { - /* Disable Address Acknowledge */ - hi2c->Instance->CR2 |= I2C_CR2_NACK; - return HAL_ERROR; + /* Check that I2C transfer finished */ + /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */ + /* Mean XferCount == 0 */ + + tmpXferCount = hi2c->XferCount; + if ((hi2c->ErrorCode == HAL_I2C_ERROR_AF) && (tmpXferCount == 0U)) + { + /* Reset ErrorCode to NONE */ + hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + } + else + { + /* Disable Address Acknowledge */ + hi2c->Instance->CR2 |= I2C_CR2_NACK; + return HAL_ERROR; + } } + else + { + /* Flush TX register */ + I2C_Flush_TXDR(hi2c); - /* Flush TX register */ - I2C_Flush_TXDR(hi2c); + /* Clear AF flag */ + __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - /* Clear AF flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); + /* Wait until STOP flag is set */ + if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) + { + /* Disable Address Acknowledge */ + hi2c->Instance->CR2 |= I2C_CR2_NACK; - /* Wait until STOP flag is set */ - if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) - { - /* Disable Address Acknowledge */ - hi2c->Instance->CR2 |= I2C_CR2_NACK; + return HAL_ERROR; + } - return HAL_ERROR; + /* Clear STOP flag */ + __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); } - /* Clear STOP flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); - /* Wait until BUSY flag is reset */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout, tickstart) != HAL_OK) { @@ -1672,7 +1730,26 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t D /* Send Slave Address */ /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE */ - I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, I2C_GENERATE_START_WRITE); + if (hi2c->XferSize > 0U) + { + /* Preload TX register */ + /* Write data to TXDR */ + hi2c->Instance->TXDR = *hi2c->pBuffPtr; + + /* Increment Buffer pointer */ + hi2c->pBuffPtr++; + + hi2c->XferCount--; + hi2c->XferSize--; + + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)(hi2c->XferSize + 1U), xfermode, + I2C_GENERATE_START_WRITE); + } + else + { + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, + I2C_GENERATE_START_WRITE); + } /* Process Unlocked */ __HAL_UNLOCK(hi2c); @@ -1732,7 +1809,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t De if (hi2c->XferCount > MAX_NBYTE_SIZE) { - hi2c->XferSize = MAX_NBYTE_SIZE; + hi2c->XferSize = 1U; xfermode = I2C_RELOAD_MODE; } else @@ -1895,6 +1972,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t { uint32_t xfermode; HAL_StatusTypeDef dmaxferstatus; + uint32_t sizetoxfer = 0U; if (hi2c->State == HAL_I2C_STATE_READY) { @@ -1927,6 +2005,20 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t xfermode = I2C_AUTOEND_MODE; } + if (hi2c->XferSize > 0U) + { + /* Preload TX register */ + /* Write data to TXDR */ + hi2c->Instance->TXDR = *hi2c->pBuffPtr; + + /* Increment Buffer pointer */ + hi2c->pBuffPtr++; + + sizetoxfer = hi2c->XferSize; + hi2c->XferCount--; + hi2c->XferSize--; + } + if (hi2c->XferSize > 0U) { if (hi2c->hdmatx != NULL) @@ -1942,8 +2034,8 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t hi2c->hdmatx->XferAbortCallback = NULL; /* Enable the DMA channel */ - dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, - hi2c->XferSize); + dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, + (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize); } else { @@ -1964,7 +2056,8 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t { /* Send Slave Address */ /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ - I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, I2C_GENERATE_START_WRITE); + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)(hi2c->XferSize + 1U), + xfermode, I2C_GENERATE_START_WRITE); /* Update XferCount value */ hi2c->XferCount -= hi2c->XferSize; @@ -2003,7 +2096,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t /* Send Slave Address */ /* Set NBYTES to write and generate START condition */ - I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)sizetoxfer, I2C_AUTOEND_MODE, I2C_GENERATE_START_WRITE); /* Process Unlocked */ @@ -2065,7 +2158,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t D if (hi2c->XferCount > MAX_NBYTE_SIZE) { - hi2c->XferSize = MAX_NBYTE_SIZE; + hi2c->XferSize = 1U; xfermode = I2C_RELOAD_MODE; } else @@ -2159,11 +2252,11 @@ HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t D /* Note : The I2C interrupts must be enabled after unlocking current process to avoid the risk of I2C interrupt handle execution before current process unlock */ - /* Enable ERR, TC, STOP, NACK, TXI interrupt */ + /* Enable ERR, TC, STOP, NACK, RXI interrupt */ /* possible to enable all of these */ /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ - I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); + I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT); } return HAL_OK; @@ -2612,7 +2705,7 @@ HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ if (hi2c->XferCount > MAX_NBYTE_SIZE) { - hi2c->XferSize = MAX_NBYTE_SIZE; + hi2c->XferSize = 1U; I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ); } @@ -2650,7 +2743,7 @@ HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, if (hi2c->XferCount > MAX_NBYTE_SIZE) { - hi2c->XferSize = MAX_NBYTE_SIZE; + hi2c->XferSize = 1U; I2C_TransferConfig(hi2c, DevAddress, (uint8_t) hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); } @@ -2728,6 +2821,7 @@ HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddr hi2c->ErrorCode = HAL_I2C_ERROR_NONE; /* Prepare transfer parameters */ + hi2c->XferSize = 0U; hi2c->pBuffPtr = pData; hi2c->XferCount = Size; hi2c->XferOptions = I2C_NO_OPTION_FRAME; @@ -2849,11 +2943,11 @@ HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddre to avoid the risk of I2C interrupt handle execution before current process unlock */ - /* Enable ERR, TC, STOP, NACK, RXI interrupt */ + /* Enable ERR, TC, STOP, NACK, TXI interrupt */ /* possible to enable all of these */ /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ - I2C_Enable_IRQ(hi2c, (I2C_XFER_TX_IT | I2C_XFER_RX_IT)); + I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); return HAL_OK; } @@ -3259,22 +3353,6 @@ HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAdd __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); } - /* Check if the maximum allowed number of trials has been reached */ - if (I2C_Trials == Trials) - { - /* Generate Stop */ - hi2c->Instance->CR2 |= I2C_CR2_STOP; - - /* Wait until STOPF flag is reset */ - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK) - { - return HAL_ERROR; - } - - /* Clear STOP Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); - } - /* Increment Trials */ I2C_Trials++; } while (I2C_Trials < Trials); @@ -3313,6 +3391,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16 { uint32_t xfermode; uint32_t xferrequest = I2C_GENERATE_START_WRITE; + uint32_t sizetoxfer = 0U; /* Check the parameters */ assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); @@ -3344,6 +3423,21 @@ HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16 xfermode = hi2c->XferOptions; } + if ((hi2c->XferSize > 0U) && ((XferOptions == I2C_FIRST_FRAME) || \ + (XferOptions == I2C_FIRST_AND_LAST_FRAME))) + { + /* Preload TX register */ + /* Write data to TXDR */ + hi2c->Instance->TXDR = *hi2c->pBuffPtr; + + /* Increment Buffer pointer */ + hi2c->pBuffPtr++; + + sizetoxfer = hi2c->XferSize; + hi2c->XferCount--; + hi2c->XferSize--; + } + /* If transfer direction not change and there is no request to start another frame, do not generate Restart Condition */ /* Mean Previous state is same as current state */ @@ -3365,7 +3459,14 @@ HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16 } /* Send Slave Address and set NBYTES to write */ - I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, xferrequest); + if ((XferOptions == I2C_FIRST_FRAME) || (XferOptions == I2C_FIRST_AND_LAST_FRAME)) + { + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)sizetoxfer, xfermode, xferrequest); + } + else + { + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, xferrequest); + } /* Process Unlocked */ __HAL_UNLOCK(hi2c); @@ -3405,6 +3506,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint1 uint32_t xfermode; uint32_t xferrequest = I2C_GENERATE_START_WRITE; HAL_StatusTypeDef dmaxferstatus; + uint32_t sizetoxfer = 0U; /* Check the parameters */ assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); @@ -3436,6 +3538,21 @@ HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint1 xfermode = hi2c->XferOptions; } + if ((hi2c->XferSize > 0U) && ((XferOptions == I2C_FIRST_FRAME) || \ + (XferOptions == I2C_FIRST_AND_LAST_FRAME))) + { + /* Preload TX register */ + /* Write data to TXDR */ + hi2c->Instance->TXDR = *hi2c->pBuffPtr; + + /* Increment Buffer pointer */ + hi2c->pBuffPtr++; + + sizetoxfer = hi2c->XferSize; + hi2c->XferCount--; + hi2c->XferSize--; + } + /* If transfer direction not change and there is no request to start another frame, do not generate Restart Condition */ /* Mean Previous state is same as current state */ @@ -3471,8 +3588,8 @@ HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint1 hi2c->hdmatx->XferAbortCallback = NULL; /* Enable the DMA channel */ - dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, - hi2c->XferSize); + dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, + (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize); } else { @@ -3492,7 +3609,14 @@ HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint1 if (dmaxferstatus == HAL_OK) { /* Send Slave Address and set NBYTES to write */ - I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, xferrequest); + if ((XferOptions == I2C_FIRST_FRAME) || (XferOptions == I2C_FIRST_AND_LAST_FRAME)) + { + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)sizetoxfer, xfermode, xferrequest); + } + else + { + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, xferrequest); + } /* Update XferCount value */ hi2c->XferCount -= hi2c->XferSize; @@ -3531,8 +3655,14 @@ HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint1 /* Send Slave Address */ /* Set NBYTES to write and generate START condition */ - I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, - I2C_GENERATE_START_WRITE); + if ((XferOptions == I2C_FIRST_FRAME) || (XferOptions == I2C_FIRST_AND_LAST_FRAME)) + { + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)sizetoxfer, xfermode, xferrequest); + } + else + { + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, xferrequest); + } /* Process Unlocked */ __HAL_UNLOCK(hi2c); @@ -3795,11 +3925,11 @@ HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16 /* Note : The I2C interrupts must be enabled after unlocking current process to avoid the risk of I2C interrupt handle execution before current process unlock */ - /* Enable ERR, TC, STOP, NACK, TXI interrupt */ + /* Enable ERR, TC, STOP, NACK, RXI interrupt */ /* possible to enable all of these */ /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ - I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); + I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT); } return HAL_OK; @@ -4434,7 +4564,7 @@ HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c) } /** - * @brief Abort a master I2C IT or DMA process communication with Interrupt. + * @brief Abort a master or memory I2C IT or DMA process communication with Interrupt. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @param DevAddress Target device address: The device 7 bits address value @@ -4443,7 +4573,9 @@ HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c) */ HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress) { - if (hi2c->Mode == HAL_I2C_MODE_MASTER) + HAL_I2C_ModeTypeDef tmp_mode = hi2c->Mode; + + if ((tmp_mode == HAL_I2C_MODE_MASTER) || (tmp_mode == HAL_I2C_MODE_MEM)) { /* Process Locked */ __HAL_LOCK(hi2c); @@ -4842,17 +4974,22 @@ static HAL_StatusTypeDef I2C_Master_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uin hi2c->XferSize--; hi2c->XferCount--; } - else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TXIS) != RESET) && \ - (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) + else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TC) == RESET) && \ + ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TXIS) != RESET) && \ + (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET))) { /* Write data to TXDR */ - hi2c->Instance->TXDR = *hi2c->pBuffPtr; + if (hi2c->XferCount != 0U) + { + /* Write data to TXDR */ + hi2c->Instance->TXDR = *hi2c->pBuffPtr; - /* Increment Buffer pointer */ - hi2c->pBuffPtr++; + /* Increment Buffer pointer */ + hi2c->pBuffPtr++; - hi2c->XferSize--; - hi2c->XferCount--; + hi2c->XferSize--; + hi2c->XferCount--; + } } else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TCR) != RESET) && \ (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) @@ -4863,7 +5000,15 @@ static HAL_StatusTypeDef I2C_Master_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uin if (hi2c->XferCount > MAX_NBYTE_SIZE) { - hi2c->XferSize = MAX_NBYTE_SIZE; + /* Errata workaround 170323 */ + if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) + { + hi2c->XferSize = 1U; + } + else + { + hi2c->XferSize = MAX_NBYTE_SIZE; + } I2C_TransferConfig(hi2c, devaddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); } else @@ -5018,7 +5163,15 @@ static HAL_StatusTypeDef I2C_Mem_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32 { if (hi2c->XferCount > MAX_NBYTE_SIZE) { - hi2c->XferSize = MAX_NBYTE_SIZE; + /* Errata workaround 170323 */ + if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) + { + hi2c->XferSize = 1U; + } + else + { + hi2c->XferSize = MAX_NBYTE_SIZE; + } I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); } @@ -5039,6 +5192,12 @@ static HAL_StatusTypeDef I2C_Mem_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32 else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TC) != RESET) && \ (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) { + /* Disable Interrupt related to address step */ + I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); + + /* Enable ERR, TC, STOP, NACK and RXI interrupts */ + I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT); + if (hi2c->State == HAL_I2C_STATE_BUSY_RX) { direction = I2C_GENERATE_START_READ; @@ -5046,7 +5205,15 @@ static HAL_StatusTypeDef I2C_Mem_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32 if (hi2c->XferCount > MAX_NBYTE_SIZE) { - hi2c->XferSize = MAX_NBYTE_SIZE; + /* Errata workaround 170323 */ + if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) + { + hi2c->XferSize = 1U; + } + else + { + hi2c->XferSize = MAX_NBYTE_SIZE; + } /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, @@ -5103,9 +5270,8 @@ static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint /* Call I2C Slave complete process */ I2C_ITSlaveCplt(hi2c, tmpITFlags); } - - if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && \ - (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && \ + (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) { /* Check that I2C transfer finished */ /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */ @@ -5268,7 +5434,15 @@ static HAL_StatusTypeDef I2C_Master_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, ui /* Prepare the new XferSize to transfer */ if (hi2c->XferCount > MAX_NBYTE_SIZE) { - hi2c->XferSize = MAX_NBYTE_SIZE; + /* Errata workaround 170323 */ + if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) + { + hi2c->XferSize = 1U; + } + else + { + hi2c->XferSize = MAX_NBYTE_SIZE; + } xfermode = I2C_RELOAD_MODE; } else @@ -5405,6 +5579,9 @@ static HAL_StatusTypeDef I2C_Mem_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint3 else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_TCR) != RESET) && \ (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) { + /* Disable Interrupt related to address step */ + I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); + /* Enable only Error interrupt */ I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT); @@ -5413,7 +5590,15 @@ static HAL_StatusTypeDef I2C_Mem_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint3 /* Prepare the new XferSize to transfer */ if (hi2c->XferCount > MAX_NBYTE_SIZE) { - hi2c->XferSize = MAX_NBYTE_SIZE; + /* Errata workaround 170323 */ + if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) + { + hi2c->XferSize = 1U; + } + else + { + hi2c->XferSize = MAX_NBYTE_SIZE; + } I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); } @@ -5447,6 +5632,12 @@ static HAL_StatusTypeDef I2C_Mem_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint3 else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_TC) != RESET) && \ (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) { + /* Disable Interrupt related to address step */ + I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); + + /* Enable only Error and NACK interrupt for data transfer */ + I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT); + if (hi2c->State == HAL_I2C_STATE_BUSY_RX) { direction = I2C_GENERATE_START_READ; @@ -5454,7 +5645,15 @@ static HAL_StatusTypeDef I2C_Mem_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint3 if (hi2c->XferCount > MAX_NBYTE_SIZE) { - hi2c->XferSize = MAX_NBYTE_SIZE; + /* Errata workaround 170323 */ + if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) + { + hi2c->XferSize = 1U; + } + else + { + hi2c->XferSize = MAX_NBYTE_SIZE; + } /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, @@ -5524,9 +5723,8 @@ static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uin /* Call I2C Slave complete process */ I2C_ITSlaveCplt(hi2c, ITFlags); } - - if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_AF) != RESET) && \ - (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_AF) != RESET) && \ + (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) { /* Check that I2C transfer finished */ /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */ @@ -6125,6 +6323,7 @@ static void I2C_ITSlaveCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) { uint32_t tmpcr1value = READ_REG(hi2c->Instance->CR1); uint32_t tmpITFlags = ITFlags; + uint32_t tmpoptions = hi2c->XferOptions; HAL_I2C_StateTypeDef tmpstate = hi2c->State; /* Clear STOP Flag */ @@ -6141,6 +6340,11 @@ static void I2C_ITSlaveCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT); hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX; } + else if (tmpstate == HAL_I2C_STATE_LISTEN) + { + I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_TX_IT | I2C_XFER_RX_IT); + hi2c->PreviousState = I2C_STATE_NONE; + } else { /* Do nothing */ @@ -6207,6 +6411,57 @@ static void I2C_ITSlaveCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) hi2c->ErrorCode |= HAL_I2C_ERROR_AF; } + if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && \ + (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_IT_NACKI) != RESET)) + { + /* Check that I2C transfer finished */ + /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */ + /* Mean XferCount == 0*/ + /* So clear Flag NACKF only */ + if (hi2c->XferCount == 0U) + { + if ((hi2c->State == HAL_I2C_STATE_LISTEN) && (tmpoptions == I2C_FIRST_AND_LAST_FRAME)) + /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for + Warning[Pa134]: left and right operands are identical */ + { + /* Call I2C Listen complete process */ + I2C_ITListenCplt(hi2c, tmpITFlags); + } + else if ((hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) && (tmpoptions != I2C_NO_OPTION_FRAME)) + { + /* Clear NACK Flag */ + __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); + + /* Flush TX register */ + I2C_Flush_TXDR(hi2c); + + /* Last Byte is Transmitted */ + /* Call I2C Slave Sequential complete process */ + I2C_ITSlaveSeqCplt(hi2c); + } + else + { + /* Clear NACK Flag */ + __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); + } + } + else + { + /* if no, error use case, a Non-Acknowledge of last Data is generated by the MASTER*/ + /* Clear NACK Flag */ + __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); + + /* Set ErrorCode corresponding to a Non-Acknowledge */ + hi2c->ErrorCode |= HAL_I2C_ERROR_AF; + + if ((tmpoptions == I2C_FIRST_FRAME) || (tmpoptions == I2C_NEXT_FRAME)) + { + /* Call the corresponding callback to inform upper layer of End of Transfer */ + I2C_ITError(hi2c, hi2c->ErrorCode); + } + } + } + hi2c->Mode = HAL_I2C_MODE_NONE; hi2c->XferISR = NULL; @@ -6624,7 +6879,15 @@ static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma) /* Set the XferSize to transfer */ if (hi2c->XferCount > MAX_NBYTE_SIZE) { - hi2c->XferSize = MAX_NBYTE_SIZE; + /* Errata workaround 170323 */ + if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) + { + hi2c->XferSize = 1U; + } + else + { + hi2c->XferSize = MAX_NBYTE_SIZE; + } } else { @@ -6735,6 +6998,12 @@ static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uin { while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status) { + /* Check if an error is detected */ + if (I2C_IsErrorOccurred(hi2c, Timeout, Tickstart) != HAL_OK) + { + return HAL_ERROR; + } + /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) { @@ -6846,16 +7115,18 @@ static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) { - while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET) + HAL_StatusTypeDef status = HAL_OK; + + while ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET) && (status == HAL_OK)) { /* Check if an error is detected */ if (I2C_IsErrorOccurred(hi2c, Timeout, Tickstart) != HAL_OK) { - return HAL_ERROR; + status = HAL_ERROR; } /* Check if a STOPF is detected */ - if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) + if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) && (status == HAL_OK)) { /* Check if an RXNE is pending */ /* Store Last receive data if any */ @@ -6863,19 +7134,14 @@ static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, { /* Return HAL_OK */ /* The Reading of data from RXDR will be done in caller function */ - return HAL_OK; + status = HAL_OK; } - else + + /* Check a no-acknowledge have been detected */ + if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) { - if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) - { - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - hi2c->ErrorCode = HAL_I2C_ERROR_AF; - } - else - { - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - } + __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); + hi2c->ErrorCode = HAL_I2C_ERROR_AF; /* Clear STOP Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); @@ -6889,12 +7155,16 @@ static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, /* Process Unlocked */ __HAL_UNLOCK(hi2c); - return HAL_ERROR; + status = HAL_ERROR; + } + else + { + hi2c->ErrorCode = HAL_I2C_ERROR_NONE; } } /* Check for the Timeout */ - if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) + if ((((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) && (status == HAL_OK)) { if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)) { @@ -6904,11 +7174,11 @@ static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, /* Process Unlocked */ __HAL_UNLOCK(hi2c); - return HAL_ERROR; + status = HAL_ERROR; } } } - return HAL_OK; + return status; } /** @@ -7103,13 +7373,13 @@ static void I2C_Enable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest) if ((InterruptRequest & I2C_XFER_TX_IT) == I2C_XFER_TX_IT) { - /* Enable ERR, TC, STOP, NACK and RXI interrupts */ + /* Enable ERR, TC, STOP, NACK and TXI interrupts */ tmpisr |= I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_TXI; } if ((InterruptRequest & I2C_XFER_RX_IT) == I2C_XFER_RX_IT) { - /* Enable ERR, TC, STOP, NACK and TXI interrupts */ + /* Enable ERR, TC, STOP, NACK and RXI interrupts */ tmpisr |= I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_RXI; } @@ -7136,13 +7406,13 @@ static void I2C_Enable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest) if ((InterruptRequest & I2C_XFER_TX_IT) == I2C_XFER_TX_IT) { - /* Enable ERR, TC, STOP, NACK and RXI interrupts */ + /* Enable ERR, TC, STOP, NACK and TXI interrupts */ tmpisr |= I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_TXI; } if ((InterruptRequest & I2C_XFER_RX_IT) == I2C_XFER_RX_IT) { - /* Enable ERR, TC, STOP, NACK and TXI interrupts */ + /* Enable ERR, TC, STOP, NACK and RXI interrupts */ tmpisr |= I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_RXI; } @@ -7158,7 +7428,7 @@ static void I2C_Enable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest) tmpisr |= (I2C_IT_STOPI | I2C_IT_TCI); } - if ((hi2c->XferISR != I2C_Mem_ISR_DMA) && (InterruptRequest == I2C_XFER_RELOAD_IT)) + if (InterruptRequest == I2C_XFER_RELOAD_IT) { /* Enable TC interrupts */ tmpisr |= I2C_IT_TCI; diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2s.c b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2s.c index b694c49e22..fa9ec69f0e 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2s.c +++ b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2s.c @@ -756,15 +756,14 @@ HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uin return HAL_ERROR; } - /* Process Locked */ - __HAL_LOCK(hi2s); - if (hi2s->State != HAL_I2S_STATE_READY) { - __HAL_UNLOCK(hi2s); return HAL_BUSY; } + /* Process Locked */ + __HAL_LOCK(hi2s); + /* Set state and reset error code */ hi2s->State = HAL_I2S_STATE_BUSY_TX; hi2s->ErrorCode = HAL_I2S_ERROR_NONE; @@ -876,15 +875,14 @@ HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint return HAL_ERROR; } - /* Process Locked */ - __HAL_LOCK(hi2s); - if (hi2s->State != HAL_I2S_STATE_READY) { - __HAL_UNLOCK(hi2s); return HAL_BUSY; } + /* Process Locked */ + __HAL_LOCK(hi2s); + /* Set state and reset error code */ hi2s->State = HAL_I2S_STATE_BUSY_RX; hi2s->ErrorCode = HAL_I2S_ERROR_NONE; @@ -975,15 +973,14 @@ HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, return HAL_ERROR; } - /* Process Locked */ - __HAL_LOCK(hi2s); - if (hi2s->State != HAL_I2S_STATE_READY) { - __HAL_UNLOCK(hi2s); return HAL_BUSY; } + /* Process Locked */ + __HAL_LOCK(hi2s); + /* Set state and reset error code */ hi2s->State = HAL_I2S_STATE_BUSY_TX; hi2s->ErrorCode = HAL_I2S_ERROR_NONE; @@ -1002,6 +999,8 @@ HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, hi2s->TxXferCount = Size; } + __HAL_UNLOCK(hi2s); + /* Enable TXE and ERR interrupt */ __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR)); @@ -1012,7 +1011,6 @@ HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, __HAL_I2S_ENABLE(hi2s); } - __HAL_UNLOCK(hi2s); return HAL_OK; } @@ -1042,15 +1040,14 @@ HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, u return HAL_ERROR; } - /* Process Locked */ - __HAL_LOCK(hi2s); - if (hi2s->State != HAL_I2S_STATE_READY) { - __HAL_UNLOCK(hi2s); return HAL_BUSY; } + /* Process Locked */ + __HAL_LOCK(hi2s); + /* Set state and reset error code */ hi2s->State = HAL_I2S_STATE_BUSY_RX; hi2s->ErrorCode = HAL_I2S_ERROR_NONE; @@ -1069,6 +1066,8 @@ HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, u hi2s->RxXferCount = Size; } + __HAL_UNLOCK(hi2s); + /* Enable RXNE and ERR interrupt */ __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR)); @@ -1079,7 +1078,6 @@ HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, u __HAL_I2S_ENABLE(hi2s); } - __HAL_UNLOCK(hi2s); return HAL_OK; } @@ -1106,15 +1104,14 @@ HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, return HAL_ERROR; } - /* Process Locked */ - __HAL_LOCK(hi2s); - if (hi2s->State != HAL_I2S_STATE_READY) { - __HAL_UNLOCK(hi2s); return HAL_BUSY; } + /* Process Locked */ + __HAL_LOCK(hi2s); + /* Set state and reset error code */ hi2s->State = HAL_I2S_STATE_BUSY_TX; hi2s->ErrorCode = HAL_I2S_ERROR_NONE; @@ -1156,12 +1153,7 @@ HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, return HAL_ERROR; } - /* Check if the I2S is already enabled */ - if (HAL_IS_BIT_CLR(hi2s->Instance->I2SCFGR, SPI_I2SCFGR_I2SE)) - { - /* Enable I2S peripheral */ - __HAL_I2S_ENABLE(hi2s); - } + __HAL_UNLOCK(hi2s); /* Check if the I2S Tx request is already enabled */ if (HAL_IS_BIT_CLR(hi2s->Instance->CR2, SPI_CR2_TXDMAEN)) @@ -1170,7 +1162,13 @@ HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, SET_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN); } - __HAL_UNLOCK(hi2s); + /* Check if the I2S is already enabled */ + if (HAL_IS_BIT_CLR(hi2s->Instance->I2SCFGR, SPI_I2SCFGR_I2SE)) + { + /* Enable I2S peripheral */ + __HAL_I2S_ENABLE(hi2s); + } + return HAL_OK; } @@ -1197,15 +1195,14 @@ HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, return HAL_ERROR; } - /* Process Locked */ - __HAL_LOCK(hi2s); - if (hi2s->State != HAL_I2S_STATE_READY) { - __HAL_UNLOCK(hi2s); return HAL_BUSY; } + /* Process Locked */ + __HAL_LOCK(hi2s); + /* Set state and reset error code */ hi2s->State = HAL_I2S_STATE_BUSY_RX; hi2s->ErrorCode = HAL_I2S_ERROR_NONE; @@ -1253,12 +1250,7 @@ HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, return HAL_ERROR; } - /* Check if the I2S is already enabled */ - if (HAL_IS_BIT_CLR(hi2s->Instance->I2SCFGR, SPI_I2SCFGR_I2SE)) - { - /* Enable I2S peripheral */ - __HAL_I2S_ENABLE(hi2s); - } + __HAL_UNLOCK(hi2s); /* Check if the I2S Rx request is already enabled */ if (HAL_IS_BIT_CLR(hi2s->Instance->CR2, SPI_CR2_RXDMAEN)) @@ -1267,7 +1259,13 @@ HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, SET_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN); } - __HAL_UNLOCK(hi2s); + /* Check if the I2S is already enabled */ + if (HAL_IS_BIT_CLR(hi2s->Instance->I2SCFGR, SPI_I2SCFGR_I2SE)) + { + /* Enable I2S peripheral */ + __HAL_I2S_ENABLE(hi2s); + } + return HAL_OK; } @@ -1608,7 +1606,7 @@ __weak void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s) * the configuration information for I2S module * @retval HAL state */ -HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s) +HAL_I2S_StateTypeDef HAL_I2S_GetState(const I2S_HandleTypeDef *hi2s) { return hi2s->State; } @@ -1619,7 +1617,7 @@ HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s) * the configuration information for I2S module * @retval I2S Error Code */ -uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s) +uint32_t HAL_I2S_GetError(const I2S_HandleTypeDef *hi2s) { return hi2s->ErrorCode; } diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_irda.c b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_irda.c index 3f9aadb5d9..d124a362f6 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_irda.c +++ b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_irda.c @@ -142,7 +142,7 @@ [..] Use function HAL_IRDA_UnRegisterCallback() to reset a callback to the default - weak (surcharged) function. + weak function. HAL_IRDA_UnRegisterCallback() takes as parameters the HAL peripheral handle, and the Callback ID. This function allows to reset following callbacks: @@ -159,10 +159,10 @@ [..] By default, after the HAL_IRDA_Init() and when the state is HAL_IRDA_STATE_RESET - all callbacks are set to the corresponding weak (surcharged) functions: + all callbacks are set to the corresponding weak functions: examples HAL_IRDA_TxCpltCallback(), HAL_IRDA_RxHalfCpltCallback(). Exception done for MspInit and MspDeInit functions that are respectively - reset to the legacy weak (surcharged) functions in the HAL_IRDA_Init() + reset to the legacy weak functions in the HAL_IRDA_Init() and HAL_IRDA_DeInit() only when these callbacks are null (not registered beforehand). If not, MspInit or MspDeInit are not null, the HAL_IRDA_Init() and HAL_IRDA_DeInit() keep and use the user MspInit/MspDeInit callbacks (registered beforehand). @@ -179,7 +179,7 @@ [..] When The compilation define USE_HAL_IRDA_REGISTER_CALLBACKS is set to 0 or not defined, the callback registration feature is not available - and weak (surcharged) callbacks are used. + and weak callbacks are used. @endverbatim ****************************************************************************** @@ -461,7 +461,7 @@ __weak void HAL_IRDA_MspDeInit(IRDA_HandleTypeDef *hirda) #if (USE_HAL_IRDA_REGISTER_CALLBACKS == 1) /** * @brief Register a User IRDA Callback - * To be used instead of the weak predefined callback + * To be used to override the weak predefined callback * @note The HAL_IRDA_RegisterCallback() may be called before HAL_IRDA_Init() in HAL_IRDA_STATE_RESET * to register callbacks for HAL_IRDA_MSPINIT_CB_ID and HAL_IRDA_MSPDEINIT_CB_ID * @param hirda irda handle diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_pcd.c b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_pcd.c index a2b51f0f87..525cbd6d5d 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_pcd.c +++ b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_pcd.c @@ -1389,7 +1389,7 @@ HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address) HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type) { - HAL_StatusTypeDef ret = HAL_OK; + HAL_StatusTypeDef ret = HAL_OK; PCD_EPTypeDef *ep; if ((ep_addr & 0x80U) == 0x80U) @@ -1404,7 +1404,7 @@ HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, } ep->num = ep_addr & EP_ADDR_MSK; - ep->maxpacket = ep_mps; + ep->maxpacket = (uint32_t)ep_mps & 0x7FFU; ep->type = ep_type; /* Set initial data PID. */ @@ -1481,7 +1481,7 @@ HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, u * @param ep_addr endpoint address * @retval Data Size */ -uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) +uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef const *hpcd, uint8_t ep_addr) { return hpcd->OUT_ep[ep_addr & EP_ADDR_MSK].xfer_count; } @@ -1621,9 +1621,18 @@ HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) */ HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) { - /* Prevent unused argument(s) compilation warning */ - UNUSED(hpcd); - UNUSED(ep_addr); + __HAL_LOCK(hpcd); + + if ((ep_addr & 0x80U) == 0x80U) + { + (void)USB_FlushTxFifo(hpcd->Instance, (uint32_t)ep_addr & EP_ADDR_MSK); + } + else + { + (void)USB_FlushRxFifo(hpcd->Instance); + } + + __HAL_UNLOCK(hpcd); return HAL_OK; } @@ -1672,7 +1681,7 @@ HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd) * @param hpcd PCD handle * @retval HAL state */ -PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd) +PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef const *hpcd) { return hpcd->State; } @@ -1761,6 +1770,18 @@ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd) /* Get SETUP Packet */ ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num); + if (ep->xfer_count != 8U) + { + /* Set Stall condition for EP0 IN/OUT */ + PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_STALL); + PCD_SET_EP_TX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_TX_STALL); + + /* SETUP bit kept frozen while CTR_RX = 1 */ + PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0); + + return HAL_OK; + } + USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup, ep->pmaadress, (uint16_t)ep->xfer_count); @@ -1781,27 +1802,27 @@ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd) /* Get Control Data OUT Packet */ ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num); - if ((ep->xfer_count != 0U) && (ep->xfer_buff != 0U)) + if (ep->xfer_count == 0U) + { + /* Status phase re-arm for next setup */ + PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_VALID); + } + else { - USB_ReadPMA(hpcd->Instance, ep->xfer_buff, - ep->pmaadress, (uint16_t)ep->xfer_count); + if (ep->xfer_buff != 0U) + { + USB_ReadPMA(hpcd->Instance, ep->xfer_buff, + ep->pmaadress, (uint16_t)ep->xfer_count); /* max 64bytes */ - ep->xfer_buff += ep->xfer_count; + ep->xfer_buff += ep->xfer_count; - /* Process Control Data OUT Packet */ + /* Process Control Data OUT Packet */ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) - hpcd->DataOutStageCallback(hpcd, 0U); + hpcd->DataOutStageCallback(hpcd, 0U); #else - HAL_PCD_DataOutStageCallback(hpcd, 0U); + HAL_PCD_DataOutStageCallback(hpcd, 0U); #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ - } - - wEPVal = (uint16_t)PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0); - - if (((wEPVal & USB_EP_SETUP) == 0U) && ((wEPVal & USB_EP_RX_STRX) != USB_EP_RX_VALID)) - { - PCD_SET_EP_RX_CNT(hpcd->Instance, PCD_ENDP0, ep->maxpacket); - PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_VALID); + } } } } @@ -1867,7 +1888,6 @@ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd) /* multi-packet on the NON control OUT endpoint */ ep->xfer_count += count; - ep->xfer_buff += count; if ((ep->xfer_len == 0U) || (count < ep->maxpacket)) { @@ -1880,6 +1900,7 @@ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd) } else { + ep->xfer_buff += count; (void)USB_EPStartXfer(hpcd->Instance, ep); } } @@ -1921,7 +1942,7 @@ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd) /* Manage Single Buffer Transaction */ if ((wEPVal & USB_EP_KIND) == 0U) { - /* multi-packet on the NON control IN endpoint */ + /* Multi-packet on the NON control IN endpoint */ TxPctSize = (uint16_t)PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num); if (ep->xfer_len > TxPctSize) @@ -1997,7 +2018,7 @@ static uint16_t HAL_PCD_EP_DB_Receive(PCD_HandleTypeDef *hpcd, if (ep->xfer_len == 0U) { - /* set NAK to OUT endpoint since double buffer is enabled */ + /* Set NAK to OUT endpoint since double buffer is enabled */ PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK); } @@ -2029,11 +2050,11 @@ static uint16_t HAL_PCD_EP_DB_Receive(PCD_HandleTypeDef *hpcd, if (ep->xfer_len == 0U) { - /* set NAK on the current endpoint */ + /* Set NAK on the current endpoint */ PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK); } - /*Need to FreeUser Buffer*/ + /* Need to FreeUser Buffer */ if ((wEPVal & USB_EP_DTOG_TX) == 0U) { PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U); @@ -2083,6 +2104,12 @@ static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd, PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U); PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U); + if (ep->type == EP_TYPE_BULK) + { + /* Set Bulk endpoint in NAK state */ + PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_NAK); + } + /* TX COMPLETE */ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->DataInStageCallback(hpcd, ep->num); @@ -2094,10 +2121,12 @@ static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd, { PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U); } + + return HAL_OK; } else /* Transfer is not yet Done */ { - /* need to Free USB Buff */ + /* Need to Free USB Buffer */ if ((wEPVal & USB_EP_DTOG_RX) != 0U) { PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U); @@ -2128,7 +2157,7 @@ static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd, } /* Write remaining Data to Buffer */ - /* Set the Double buffer counter for pma buffer1 */ + /* Set the Double buffer counter for pma buffer0 */ PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, len); /* Copy user buffer to USB PMA */ @@ -2156,6 +2185,12 @@ static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd, PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U); PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U); + if (ep->type == EP_TYPE_BULK) + { + /* Set Bulk endpoint in NAK state */ + PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_NAK); + } + /* TX COMPLETE */ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->DataInStageCallback(hpcd, ep->num); @@ -2168,10 +2203,12 @@ static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd, { PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U); } + + return HAL_OK; } else /* Transfer is not yet Done */ { - /* need to Free USB Buff */ + /* Need to Free USB Buffer */ if ((wEPVal & USB_EP_DTOG_RX) == 0U) { PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U); @@ -2201,7 +2238,7 @@ static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd, ep->xfer_fill_db = 0; } - /* Set the Double buffer counter for pmabuffer1 */ + /* Set the Double buffer counter for pma buffer1 */ PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, len); /* Copy the user buffer to USB PMA */ @@ -2210,7 +2247,7 @@ static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd, } } - /*enable endpoint IN*/ + /* Enable endpoint IN */ PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_VALID); return HAL_OK; @@ -2218,13 +2255,11 @@ static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd, #endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ - /** * @} */ #endif /* defined (USB) */ #endif /* HAL_PCD_MODULE_ENABLED */ - /** * @} */ diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_pcd_ex.c b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_pcd_ex.c index 015420d21a..57cd078671 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_pcd_ex.c +++ b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_pcd_ex.c @@ -242,7 +242,6 @@ void HAL_PCDEx_BCD_VBUSDetect(PCD_HandleTypeDef *hpcd) } } - /** * @brief Activate LPM feature. * @param hpcd PCD handle @@ -279,7 +278,6 @@ HAL_StatusTypeDef HAL_PCDEx_DeActivateLPM(PCD_HandleTypeDef *hpcd) } - /** * @brief Send LPM message to user layer callback. * @param hpcd PCD handle diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.c b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.c index 77c88e2e28..fbcb6225a5 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.c +++ b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.c @@ -333,7 +333,7 @@ HAL_StatusTypeDef HAL_RCC_DeInit(void) * first and then HSE On or HSE Bypass. * @retval HAL status */ -HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) +HAL_StatusTypeDef HAL_RCC_OscConfig(const RCC_OscInitTypeDef *RCC_OscInitStruct) { uint32_t tickstart; uint32_t hsi_state; @@ -854,7 +854,7 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) * (for more details refer to section above "Initialization/de-initialization functions") * @retval HAL status */ -HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) +HAL_StatusTypeDef HAL_RCC_ClockConfig(const RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) { uint32_t tickstart; HAL_StatusTypeDef status; @@ -1242,17 +1242,17 @@ uint32_t HAL_RCC_GetSysClockFreq(void) if (__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI) { /* HSE used as PLL clock source */ - pllvco = (uint32_t)(((uint64_t)HSE_VALUE * (uint64_t)pllm) / (uint64_t)plld); + pllvco = (uint32_t)((HSE_VALUE * pllm) / plld); } else { if ((RCC->CR & RCC_CR_HSIDIVF) != 0U) { - pllvco = (uint32_t)((((uint64_t)(HSI_VALUE >> 2)) * (uint64_t)pllm) / (uint64_t)plld); + pllvco = (uint32_t)((((HSI_VALUE >> 2)) * pllm) / plld); } else { - pllvco = (uint32_t)(((uint64_t)HSI_VALUE * (uint64_t)pllm) / (uint64_t)plld); + pllvco = (uint32_t)((HSI_VALUE * pllm) / plld); } } sysclockfreq = pllvco; diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rng.c b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rng.c index f7515a1c7f..2f354bd570 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rng.c +++ b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rng.c @@ -52,7 +52,7 @@ [..] Use function HAL_RNG_UnRegisterCallback() to reset a callback to the default - weak (surcharged) function. + weak (overridden) function. HAL_RNG_UnRegisterCallback() takes as parameters the HAL peripheral handle, and the Callback ID. This function allows to reset following callbacks: @@ -66,10 +66,10 @@ [..] By default, after the HAL_RNG_Init() and when the state is HAL_RNG_STATE_RESET - all callbacks are set to the corresponding weak (surcharged) functions: + all callbacks are set to the corresponding weak (overridden) functions: example HAL_RNG_ErrorCallback(). Exception done for MspInit and MspDeInit functions that are respectively - reset to the legacy weak (surcharged) functions in the HAL_RNG_Init() + reset to the legacy weak (overridden) functions in the HAL_RNG_Init() and HAL_RNG_DeInit() only when these callbacks are null (not registered beforehand). If not, MspInit or MspDeInit are not null, the HAL_RNG_Init() and HAL_RNG_DeInit() keep and use the user MspInit/MspDeInit callbacks (registered beforehand). @@ -86,7 +86,7 @@ [..] When The compilation define USE_HAL_RNG_REGISTER_CALLBACKS is set to 0 or not defined, the callback registration feature is not available - and weak (surcharged) callbacks are used. + and weak (overridden) callbacks are used. @endverbatim ****************************************************************************** @@ -689,15 +689,16 @@ uint32_t HAL_RNG_GetRandomNumber_IT(RNG_HandleTypeDef *hrng) void HAL_RNG_IRQHandler(RNG_HandleTypeDef *hrng) { uint32_t rngclockerror = 0U; + uint32_t itflag = hrng->Instance->SR; /* RNG clock error interrupt occurred */ - if (__HAL_RNG_GET_IT(hrng, RNG_IT_CEI) != RESET) + if ((itflag & RNG_IT_CEI) == RNG_IT_CEI) { /* Update the error code */ hrng->ErrorCode = HAL_RNG_ERROR_CLOCK; rngclockerror = 1U; } - else if (__HAL_RNG_GET_IT(hrng, RNG_IT_SEI) != RESET) + else if ((itflag & RNG_IT_SEI) == RNG_IT_SEI) { /* Update the error code */ hrng->ErrorCode = HAL_RNG_ERROR_SEED; @@ -728,7 +729,7 @@ void HAL_RNG_IRQHandler(RNG_HandleTypeDef *hrng) } /* Check RNG data ready interrupt occurred */ - if (__HAL_RNG_GET_IT(hrng, RNG_IT_DRDY) != RESET) + if ((itflag & RNG_IT_DRDY) == RNG_IT_DRDY) { /* Generate random number once, so disable the IT */ __HAL_RNG_DISABLE_IT(hrng); @@ -760,7 +761,7 @@ void HAL_RNG_IRQHandler(RNG_HandleTypeDef *hrng) * the configuration information for RNG. * @retval random value */ -uint32_t HAL_RNG_ReadLastRandomNumber(RNG_HandleTypeDef *hrng) +uint32_t HAL_RNG_ReadLastRandomNumber(const RNG_HandleTypeDef *hrng) { return (hrng->RandomNumber); } @@ -822,7 +823,7 @@ __weak void HAL_RNG_ErrorCallback(RNG_HandleTypeDef *hrng) * the configuration information for RNG. * @retval HAL state */ -HAL_RNG_StateTypeDef HAL_RNG_GetState(RNG_HandleTypeDef *hrng) +HAL_RNG_StateTypeDef HAL_RNG_GetState(const RNG_HandleTypeDef *hrng) { return hrng->State; } @@ -832,7 +833,7 @@ HAL_RNG_StateTypeDef HAL_RNG_GetState(RNG_HandleTypeDef *hrng) * @param hrng: pointer to a RNG_HandleTypeDef structure. * @retval RNG Error Code */ -uint32_t HAL_RNG_GetError(RNG_HandleTypeDef *hrng) +uint32_t HAL_RNG_GetError(const RNG_HandleTypeDef *hrng) { /* Return RNG Error Code */ return hrng->ErrorCode; diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rtc.c b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rtc.c index d7558b8c60..55a434c71f 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rtc.c +++ b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rtc.c @@ -6,8 +6,8 @@ * This file provides firmware functions to manage the following * functionalities of the Real-Time Clock (RTC) peripheral: * + Initialization and de-initialization functions - * + RTC Calendar (Time and Date) configuration functions - * + RTC Alarms (Alarm A and Alarm B) configuration functions + * + Calendar (Time and Date) configuration functions + * + Alarms (Alarm A and Alarm B) configuration functions * + Peripheral Control functions * + Peripheral State functions * @@ -64,7 +64,7 @@ ##### Backup Domain Access ##### ================================================================== - [..] After reset, the backup domain (RTC registers, RTC backup data registers + [..] After reset, the backup domain (RTC registers and RTC backup data registers) is protected against possible unwanted write accesses. [..] To enable access to the RTC Domain and RTC registers, proceed as follows: (+) Enable the Power Controller (PWR) APB1 interface clock using the @@ -122,6 +122,12 @@ *** Callback registration *** ============================================= [..] + When the compilation define USE_HAL_RTC_REGISTER_CALLBACKS is set to 0 or + not defined, the callback registration feature is not available and all + callbacks are set to the corresponding weak functions. + This is the recommended configuration in order to optimize memory/code + consumption footprint/performances. + [..] The compilation define USE_HAL_RTC_REGISTER_CALLBACKS when set to 1 allows the user to configure dynamically the driver callbacks. Use Function HAL_RTC_RegisterCallback() to register an interrupt callback. @@ -131,11 +137,13 @@ (+) AlarmBEventCallback : RTC Alarm B Event callback. (+) TimeStampEventCallback : RTC Timestamp Event callback. (+) WakeUpTimerEventCallback : RTC WakeUpTimer Event callback. - (+) Tamper1EventCallback : RTC Tamper 1 Event callback. + (+) Tamper1EventCallback : RTC Tamper 1 Event callback. (*) (+) Tamper2EventCallback : RTC Tamper 2 Event callback. - (+) Tamper3EventCallback : RTC Tamper 3 Event callback. + (+) Tamper3EventCallback : RTC Tamper 3 Event callback. (*) (+) MspInitCallback : RTC MspInit callback. (+) MspDeInitCallback : RTC MspDeInit callback. + + (*) value not applicable to all devices. [..] This function takes as parameters the HAL peripheral handle, the Callback ID and a pointer to the user callback function. @@ -149,33 +157,31 @@ (+) AlarmBEventCallback : RTC Alarm B Event callback. (+) TimeStampEventCallback : RTC Timestamp Event callback. (+) WakeUpTimerEventCallback : RTC WakeUpTimer Event callback. - (+) Tamper1EventCallback : RTC Tamper 1 Event callback. + (+) Tamper1EventCallback : RTC Tamper 1 Event callback. (*) (+) Tamper2EventCallback : RTC Tamper 2 Event callback. - (+) Tamper3EventCallback : RTC Tamper 3 Event callback. + (+) Tamper3EventCallback : RTC Tamper 3 Event callback. (*) (+) MspInitCallback : RTC MspInit callback. (+) MspDeInitCallback : RTC MspDeInit callback. + + (*) value not applicable to all devices. [..] By default, after the HAL_RTC_Init() and when the state is HAL_RTC_STATE_RESET, all callbacks are set to the corresponding weak functions: - examples AlarmAEventCallback(), WakeUpTimerEventCallback(). + examples AlarmAEventCallback(), TimeStampEventCallback(). Exception done for MspInit() and MspDeInit() callbacks that are reset to the - legacy weak function in the HAL_RTC_Init()/HAL_RTC_DeInit() only - when these callbacks are null (not registered beforehand). + legacy weak function in the HAL_RTC_Init()/HAL_RTC_DeInit() only when these + callbacks are null (not registered beforehand). If not, MspInit() or MspDeInit() are not null, HAL_RTC_Init()/HAL_RTC_DeInit() keep and use the user MspInit()/MspDeInit() callbacks (registered beforehand). [..] Callbacks can be registered/unregistered in HAL_RTC_STATE_READY state only. - Exception done MspInit()/MspDeInit() that can be registered/unregistered + Exception done for MspInit() and MspDeInit() that can be registered/unregistered in HAL_RTC_STATE_READY or HAL_RTC_STATE_RESET state. Thus registered (user) MspInit()/MspDeInit() callbacks can be used during the Init/DeInit. - In that case first register the MspInit()/MspDeInit() user callbacks - using HAL_RTC_RegisterCallback() before calling HAL_RTC_DeInit() - or HAL_RTC_Init() functions. - [..] - When The compilation define USE_HAL_RTC_REGISTER_CALLBACKS is set to 0 or - not defined, the callback registration feature is not available and all - callbacks are set to the corresponding weak functions. + In that case first register the MspInit()/MspDeInit() user callbacks using + HAL_RTC_RegisterCallback() before calling HAL_RTC_DeInit() or HAL_RTC_Init() + functions. @endverbatim ****************************************************************************** @@ -444,13 +450,13 @@ HAL_StatusTypeDef HAL_RTC_DeInit(RTC_HandleTypeDef *hrtc) * @arg @ref HAL_RTC_ALARM_B_EVENT_CB_ID Alarm B Event Callback ID * @arg @ref HAL_RTC_TIMESTAMP_EVENT_CB_ID Timestamp Event Callback ID * @arg @ref HAL_RTC_WAKEUPTIMER_EVENT_CB_ID Wakeup Timer Event Callback ID - * @arg @ref HAL_RTC_TAMPER1_EVENT_CB_ID Tamper 1 Callback ID - * @arg @ref HAL_RTC_TAMPER2_EVENT_CB_ID Tamper 2 Callback ID - * @arg @ref HAL_RTC_TAMPER3_EVENT_CB_ID Tamper 3 Callback ID - * @arg @ref HAL_RTC_MSPINIT_CB_ID Msp Init callback ID - * @arg @ref HAL_RTC_MSPDEINIT_CB_ID Msp DeInit callback ID - * @note HAL_RTC_TAMPER1_EVENT_CB_ID is not applicable to all devices. - * @note HAL_RTC_TAMPER3_EVENT_CB_ID is not applicable to all devices. + * @arg @ref HAL_RTC_TAMPER1_EVENT_CB_ID Tamper 1 Event Callback ID (*) + * @arg @ref HAL_RTC_TAMPER2_EVENT_CB_ID Tamper 2 Event Callback ID + * @arg @ref HAL_RTC_TAMPER3_EVENT_CB_ID Tamper 3 Event Callback ID (*) + * @arg @ref HAL_RTC_MSPINIT_CB_ID MSP Init callback ID + * @arg @ref HAL_RTC_MSPDEINIT_CB_ID MSP DeInit callback ID + * + * (*) value not applicable to all devices. * @param pCallback pointer to the Callback function * @retval HAL status */ @@ -557,13 +563,13 @@ HAL_StatusTypeDef HAL_RTC_RegisterCallback(RTC_HandleTypeDef *hrtc, HAL_RTC_Call * @arg @ref HAL_RTC_ALARM_B_EVENT_CB_ID Alarm B Event Callback ID * @arg @ref HAL_RTC_TIMESTAMP_EVENT_CB_ID Timestamp Event Callback ID * @arg @ref HAL_RTC_WAKEUPTIMER_EVENT_CB_ID Wakeup Timer Event Callback ID - * @arg @ref HAL_RTC_TAMPER1_EVENT_CB_ID Tamper 1 Callback ID - * @arg @ref HAL_RTC_TAMPER2_EVENT_CB_ID Tamper 2 Callback ID - * @arg @ref HAL_RTC_TAMPER3_EVENT_CB_ID Tamper 3 Callback ID - * @arg @ref HAL_RTC_MSPINIT_CB_ID Msp Init callback ID - * @arg @ref HAL_RTC_MSPDEINIT_CB_ID Msp DeInit callback ID - * @note HAL_RTC_TAMPER1_EVENT_CB_ID is not applicable to all devices. - * @note HAL_RTC_TAMPER3_EVENT_CB_ID is not applicable to all devices. + * @arg @ref HAL_RTC_TAMPER1_EVENT_CB_ID Tamper 1 Event Callback ID (*) + * @arg @ref HAL_RTC_TAMPER2_EVENT_CB_ID Tamper 2 Event Callback ID + * @arg @ref HAL_RTC_TAMPER3_EVENT_CB_ID Tamper 3 Event Callback ID (*) + * @arg @ref HAL_RTC_MSPINIT_CB_ID MSP Init callback ID + * @arg @ref HAL_RTC_MSPDEINIT_CB_ID MSP DeInit callback ID + * + * (*) value not applicable to all devices. * @retval HAL status */ HAL_StatusTypeDef HAL_RTC_UnRegisterCallback(RTC_HandleTypeDef *hrtc, HAL_RTC_CallbackIDTypeDef CallbackID) @@ -1072,7 +1078,7 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sA tmpreg = (((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Hours) << RTC_ALRMAR_HU_Pos) | \ ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Minutes) << RTC_ALRMAR_MNU_Pos) | \ ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Seconds)) | \ - ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << RTC_TR_PM_Pos) | \ + ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << RTC_ALRMAR_PM_Pos) | \ ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmDateWeekDay) << RTC_ALRMAR_DU_Pos) | \ ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \ ((uint32_t)sAlarm->AlarmMask)); @@ -1105,7 +1111,7 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sA tmpreg = (((uint32_t)(sAlarm->AlarmTime.Hours) << RTC_ALRMAR_HU_Pos) | \ ((uint32_t)(sAlarm->AlarmTime.Minutes) << RTC_ALRMAR_MNU_Pos) | \ ((uint32_t) sAlarm->AlarmTime.Seconds) | \ - ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << RTC_TR_PM_Pos) | \ + ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << RTC_ALRMAR_PM_Pos) | \ ((uint32_t)(sAlarm->AlarmDateWeekDay) << RTC_ALRMAR_DU_Pos) | \ ((uint32_t) sAlarm->AlarmDateWeekDaySel) | \ ((uint32_t) sAlarm->AlarmMask)); @@ -1118,16 +1124,15 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sA /* Disable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - /* Configure the Alarm register */ if (sAlarm->Alarm == RTC_ALARM_A) { - /* Disable the Alarm A */ + /* Disable Alarm A */ __HAL_RTC_ALARMA_DISABLE(hrtc); /* In case interrupt mode is used, the interrupt source must be disabled */ __HAL_RTC_ALARM_DISABLE_IT(hrtc, RTC_IT_ALRA); - /* Clear the Alarm flag */ + /* Clear Alarm A flag */ __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRAF); /* Get tick */ @@ -1150,21 +1155,22 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sA } } + /* Configure Alarm A register */ hrtc->Instance->ALRMAR = (uint32_t)tmpreg; - /* Configure the Alarm A Subseconds register */ + /* Configure Alarm A Subseconds register */ hrtc->Instance->ALRMASSR = subsecondtmpreg; - /* Configure the Alarm state: Enable Alarm */ + /* Enable Alarm A */ __HAL_RTC_ALARMA_ENABLE(hrtc); } else { - /* Disable the Alarm B */ + /* Disable Alarm B */ __HAL_RTC_ALARMB_DISABLE(hrtc); /* In case interrupt mode is used, the interrupt source must be disabled */ __HAL_RTC_ALARM_DISABLE_IT(hrtc, RTC_IT_ALRB); - /* Clear the Alarm flag */ + /* Clear Alarm B flag */ __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRBF); /* Get tick */ @@ -1187,10 +1193,11 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sA } } + /* Configure Alarm B register */ hrtc->Instance->ALRMBR = (uint32_t)tmpreg; - /* Configure the Alarm B Subseconds register */ + /* Configure Alarm B Subseconds register */ hrtc->Instance->ALRMBSSR = subsecondtmpreg; - /* Configure the Alarm state: Enable Alarm */ + /* Enable Alarm B */ __HAL_RTC_ALARMB_ENABLE(hrtc); } @@ -1269,7 +1276,7 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef tmpreg = (((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Hours) << RTC_ALRMAR_HU_Pos) | \ ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Minutes) << RTC_ALRMAR_MNU_Pos) | \ ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Seconds)) | \ - ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << RTC_TR_PM_Pos) | \ + ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << RTC_ALRMAR_PM_Pos) | \ ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmDateWeekDay) << RTC_ALRMAR_DU_Pos) | \ ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \ ((uint32_t)sAlarm->AlarmMask)); @@ -1302,7 +1309,7 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef tmpreg = (((uint32_t)(sAlarm->AlarmTime.Hours) << RTC_ALRMAR_HU_Pos) | \ ((uint32_t)(sAlarm->AlarmTime.Minutes) << RTC_ALRMAR_MNU_Pos) | \ ((uint32_t) sAlarm->AlarmTime.Seconds) | \ - ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << RTC_TR_PM_Pos) | \ + ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << RTC_ALRMAR_PM_Pos) | \ ((uint32_t)(sAlarm->AlarmDateWeekDay) << RTC_ALRMAR_DU_Pos) | \ ((uint32_t) sAlarm->AlarmDateWeekDaySel) | \ ((uint32_t) sAlarm->AlarmMask)); @@ -1315,13 +1322,12 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef /* Disable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - /* Configure the Alarm register */ if (sAlarm->Alarm == RTC_ALARM_A) { - /* Disable the Alarm A */ + /* Disable Alarm A */ __HAL_RTC_ALARMA_DISABLE(hrtc); - /* Clear the Alarm flag */ + /* Clear Alarm A flag */ __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRAF); /* Wait till RTC ALRAWF flag is set and if timeout is reached exit */ @@ -1342,20 +1348,21 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef } } while (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAWF) == 0U); + /* Configure Alarm A register */ hrtc->Instance->ALRMAR = (uint32_t)tmpreg; - /* Configure the Alarm A Subseconds register */ + /* Configure Alarm A Subseconds register */ hrtc->Instance->ALRMASSR = subsecondtmpreg; - /* Configure the Alarm state: Enable Alarm */ + /* Enable Alarm A */ __HAL_RTC_ALARMA_ENABLE(hrtc); - /* Configure the Alarm interrupt */ + /* Enable Alarm A interrupt */ __HAL_RTC_ALARM_ENABLE_IT(hrtc, RTC_IT_ALRA); } else { - /* Disable the Alarm B */ + /* Disable Alarm B */ __HAL_RTC_ALARMB_DISABLE(hrtc); - /* Clear the Alarm flag */ + /* Clear Alarm B flag */ __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRBF); /* Reload the counter */ @@ -1379,16 +1386,17 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef } } while (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBWF) == 0U); + /* Configure Alarm B register */ hrtc->Instance->ALRMBR = (uint32_t)tmpreg; - /* Configure the Alarm B Subseconds register */ + /* Configure Alarm B Subseconds register */ hrtc->Instance->ALRMBSSR = subsecondtmpreg; - /* Configure the Alarm state: Enable Alarm */ + /* Enable Alarm B */ __HAL_RTC_ALARMB_ENABLE(hrtc); - /* Configure the Alarm interrupt */ + /* Enable Alarm B interrupt */ __HAL_RTC_ALARM_ENABLE_IT(hrtc, RTC_IT_ALRB); } - /* RTC Alarm Interrupt Configuration: EXTI configuration */ + /* Enable and configure the EXTI line associated to the RTC Alarm interrupt */ __HAL_RTC_ALARM_EXTI_ENABLE_IT(); __HAL_RTC_ALARM_EXTI_ENABLE_RISING_EDGE(); @@ -1440,7 +1448,7 @@ HAL_StatusTypeDef HAL_RTC_DeactivateAlarm(RTC_HandleTypeDef *hrtc, uint32_t Alar /* Get tick */ tickstart = HAL_GetTick(); - /* Wait till RTC ALRxWF flag is set and if timeout is reached exit */ + /* Wait till RTC ALRAWF flag is set and if timeout is reached exit */ while (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAWF) == 0U) { if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE) @@ -1468,7 +1476,7 @@ HAL_StatusTypeDef HAL_RTC_DeactivateAlarm(RTC_HandleTypeDef *hrtc, uint32_t Alar /* Get tick */ tickstart = HAL_GetTick(); - /* Wait till RTC ALRxWF flag is set and if timeout is reached exit */ + /* Wait till RTC ALRBWF flag is set and if timeout is reached exit */ while (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBWF) == 0U) { if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE) @@ -1565,7 +1573,7 @@ HAL_StatusTypeDef HAL_RTC_GetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sA */ void HAL_RTC_AlarmIRQHandler(RTC_HandleTypeDef *hrtc) { - /* Clear the EXTI's line Flag for RTC Alarm */ + /* Clear the EXTI flag associated to the RTC Alarm interrupt */ __HAL_RTC_ALARM_EXTI_CLEAR_FLAG(); /* Get the Alarm A interrupt source enable status */ diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rtc_ex.c b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rtc_ex.c index 49f1f68e71..df2bf370bd 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rtc_ex.c +++ b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rtc_ex.c @@ -54,7 +54,7 @@ *** Tamper configuration *** ============================ [..] - (+) To Enable the RTC Tamper and configure the Tamper filter count, trigger + (+) To enable the RTC Tamper and configure the Tamper filter count, trigger Edge or Level according to the Tamper filter value (if equal to 0 Edge else Level), sampling frequency, NoErase, MaskFlag, precharge or discharge and Pull-UP use the HAL_RTCEx_SetTamper() function. @@ -86,14 +86,14 @@ This cycle is maintained by a 20-bit counter clocked by RTCCLK. (+) The smooth calibration register (RTC_CALR) specifies the number of RTCCLK clock cycles to be masked during the 32-second cycle. - (+) The RTC Smooth Digital Calibration value and the corresponding calibration - cycle period (32s, 16s, or 8s) can be calibrated using the - HAL_RTCEx_SetSmoothCalib() function. + (+) To configure the RTC Smooth Digital Calibration value and the corresponding + calibration cycle period (32s,16s and 8s) use the HAL_RTCEx_SetSmoothCalib() + function. *** Outputs configuration *** ============================= [..] The RTC has 2 different outputs: - (+) RTC_ALARM: this output is used to manage the RTC Alarm A, Alarm B + (+) RTC_ALARM: this output is used to manage the RTC alarms (Alarm A and Alarm B) and WaKeUp signals. To output the selected RTC signal, use the HAL_RTC_Init() function. (+) RTC_CALIB: this output is 512Hz signal or 1Hz. @@ -288,7 +288,7 @@ HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp_IT(RTC_HandleTypeDef *hrtc, uint32_t RT /* Enable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - /* RTC Timestamp Interrupt Configuration: EXTI configuration */ + /* Enable and configure the EXTI line associated to the RTC Timestamp and Tamper interrupts */ __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT(); __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_EDGE(); @@ -319,7 +319,7 @@ HAL_StatusTypeDef HAL_RTCEx_DeactivateTimeStamp(RTC_HandleTypeDef *hrtc) /* Disable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - /* In case of interrupt mode is used, the interrupt source must disabled */ + /* In case interrupt mode is used, the interrupt source must disabled */ __HAL_RTC_TIMESTAMP_DISABLE_IT(hrtc, RTC_IT_TS); /* Get the RTC_CR register and clear the bits to be configured */ @@ -721,7 +721,7 @@ HAL_StatusTypeDef HAL_RTCEx_SetTamper_IT(RTC_HandleTypeDef *hrtc, RTC_TamperType /* Copy desired configuration into configuration register */ hrtc->Instance->TAMPCR = tmpreg; - /* RTC Tamper Interrupt Configuration: EXTI configuration */ + /* Enable and configure the EXTI line associated to the RTC Timestamp and Tamper interrupts */ __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT(); __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_EDGE(); @@ -740,11 +740,11 @@ HAL_StatusTypeDef HAL_RTCEx_SetTamper_IT(RTC_HandleTypeDef *hrtc, RTC_TamperType * the configuration information for RTC. * @param Tamper Selected tamper pin. * This parameter can be any combination of the following values: - * @arg RTC_TAMPER_1: Tamper 1 + * @arg RTC_TAMPER_1: Tamper 1 (*) * @arg RTC_TAMPER_2: Tamper 2 - * @arg RTC_TAMPER_3: Tamper 3 - * @note RTC_TAMPER_1 is not applicable to all devices. - * @note RTC_TAMPER_3 is not applicable to all devices. + * @arg RTC_TAMPER_3: Tamper 3 (*) + * + * (*) value not applicable to all devices. * @retval HAL status */ HAL_StatusTypeDef HAL_RTCEx_DeactivateTamper(RTC_HandleTypeDef *hrtc, uint32_t Tamper) @@ -795,7 +795,7 @@ HAL_StatusTypeDef HAL_RTCEx_DeactivateTamper(RTC_HandleTypeDef *hrtc, uint32_t T */ void HAL_RTCEx_TamperTimeStampIRQHandler(RTC_HandleTypeDef *hrtc) { - /* Clear the EXTI's Flag for RTC Timestamp and Tamper */ + /* Clear the EXTI flag associated to the RTC Timestamp and Tamper interrupts */ __HAL_RTC_TAMPER_TIMESTAMP_EXTI_CLEAR_FLAG(); /* Get the Timestamp interrupt source enable status */ @@ -1295,7 +1295,7 @@ HAL_StatusTypeDef HAL_RTCEx_SetWakeUpTimer_IT(RTC_HandleTypeDef *hrtc, uint32_t /* Configure the Wakeup Timer counter */ hrtc->Instance->WUTR = (uint32_t)WakeUpCounter; - /* RTC wakeup timer Interrupt Configuration: EXTI configuration */ + /* Enable and configure the EXTI line associated to the RTC Wakeup Timer interrupt */ __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_IT(); __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE(); @@ -1337,7 +1337,7 @@ HAL_StatusTypeDef HAL_RTCEx_DeactivateWakeUpTimer(RTC_HandleTypeDef *hrtc) /* Disable the Wakeup Timer */ __HAL_RTC_WAKEUPTIMER_DISABLE(hrtc); - /* In case of interrupt mode is used, the interrupt source must disabled */ + /* In case interrupt mode is used, the interrupt source must disabled */ __HAL_RTC_WAKEUPTIMER_DISABLE_IT(hrtc, RTC_IT_WUT); /* Get tick */ @@ -1391,7 +1391,7 @@ uint32_t HAL_RTCEx_GetWakeUpTimer(RTC_HandleTypeDef *hrtc) */ void HAL_RTCEx_WakeUpTimerIRQHandler(RTC_HandleTypeDef *hrtc) { - /* Clear the EXTI's line Flag for RTC WakeUpTimer */ + /* Clear the EXTI flag associated to the RTC Wakeup Timer interrupt */ __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG(); /* Get the Wakeup timer interrupt source enable status */ @@ -1512,7 +1512,7 @@ void HAL_RTCEx_BKUPWrite(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister, uint3 /* Check the parameters */ assert_param(IS_RTC_BKP(BackupRegister)); - tmp = (uint32_t) & (hrtc->Instance->BKP0R); + tmp = (uint32_t) &(hrtc->Instance->BKP0R); tmp += (BackupRegister * 4U); /* Write the specified register */ @@ -1535,7 +1535,7 @@ uint32_t HAL_RTCEx_BKUPRead(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister) /* Check the parameters */ assert_param(IS_RTC_BKP(BackupRegister)); - tmp = (uint32_t) & (hrtc->Instance->BKP0R); + tmp = (uint32_t) &(hrtc->Instance->BKP0R); tmp += (BackupRegister * 4U); /* Read the specified register */ @@ -1899,7 +1899,7 @@ HAL_StatusTypeDef HAL_RTCEx_EnableBypassShadow(RTC_HandleTypeDef *hrtc) __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); /* Set the BYPSHAD bit */ - hrtc->Instance->CR |= (uint8_t)RTC_CR_BYPSHAD; + hrtc->Instance->CR |= (uint32_t)RTC_CR_BYPSHAD; /* Enable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); @@ -1932,7 +1932,7 @@ HAL_StatusTypeDef HAL_RTCEx_DisableBypassShadow(RTC_HandleTypeDef *hrtc) __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); /* Reset the BYPSHAD bit */ - hrtc->Instance->CR &= (uint8_t)~RTC_CR_BYPSHAD; + hrtc->Instance->CR &= (uint32_t)~RTC_CR_BYPSHAD; /* Enable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_smartcard.c b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_smartcard.c index b59dce8efb..2592c42b7e 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_smartcard.c +++ b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_smartcard.c @@ -134,7 +134,7 @@ [..] Use function HAL_SMARTCARD_UnRegisterCallback() to reset a callback to the default - weak (surcharged) function. + weak function. HAL_SMARTCARD_UnRegisterCallback() takes as parameters the HAL peripheral handle, and the Callback ID. This function allows to reset following callbacks: @@ -149,10 +149,10 @@ [..] By default, after the HAL_SMARTCARD_Init() and when the state is HAL_SMARTCARD_STATE_RESET - all callbacks are set to the corresponding weak (surcharged) functions: + all callbacks are set to the corresponding weak functions: examples HAL_SMARTCARD_TxCpltCallback(), HAL_SMARTCARD_RxCpltCallback(). Exception done for MspInit and MspDeInit functions that are respectively - reset to the legacy weak (surcharged) functions in the HAL_SMARTCARD_Init() + reset to the legacy weak functions in the HAL_SMARTCARD_Init() and HAL_SMARTCARD_DeInit() only when these callbacks are null (not registered beforehand). If not, MspInit or MspDeInit are not null, the HAL_SMARTCARD_Init() and HAL_SMARTCARD_DeInit() keep and use the user MspInit/MspDeInit callbacks (registered beforehand). @@ -169,7 +169,7 @@ [..] When The compilation define USE_HAL_SMARTCARD_REGISTER_CALLBACKS is set to 0 or not defined, the callback registration feature is not available - and weak (surcharged) callbacks are used. + and weak callbacks are used. @endverbatim @@ -461,7 +461,7 @@ __weak void HAL_SMARTCARD_MspDeInit(SMARTCARD_HandleTypeDef *hsmartcard) #if (USE_HAL_SMARTCARD_REGISTER_CALLBACKS == 1) /** * @brief Register a User SMARTCARD Callback - * To be used instead of the weak predefined callback + * To be used to override the weak predefined callback * @note The HAL_SMARTCARD_RegisterCallback() may be called before HAL_SMARTCARD_Init() * in HAL_SMARTCARD_STATE_RESET to register callbacks for HAL_SMARTCARD_MSPINIT_CB_ID * and HAL_SMARTCARD_MSPDEINIT_CB_ID @@ -2283,7 +2283,7 @@ static HAL_StatusTypeDef SMARTCARD_SetConfig(SMARTCARD_HandleTypeDef *hsmartcard assert_param(IS_SMARTCARD_TIMEOUT_VALUE(hsmartcard->Init.TimeOutValue)); tmpreg |= (uint32_t) hsmartcard->Init.TimeOutValue; } - MODIFY_REG(hsmartcard->Instance->RTOR, (USART_RTOR_RTO | USART_RTOR_BLEN), tmpreg); + WRITE_REG(hsmartcard->Instance->RTOR, tmpreg); /*-------------------------- USART BRR Configuration -----------------------*/ SMARTCARD_GETCLOCKSOURCE(hsmartcard, clocksource); diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_smbus.c b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_smbus.c index ad040c5364..5f8557e0c1 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_smbus.c +++ b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_smbus.c @@ -926,6 +926,7 @@ HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint uint8_t *pData, uint16_t Size, uint32_t XferOptions) { uint32_t tmp; + uint32_t sizetoxfer; /* Check the parameters */ assert_param(IS_SMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions)); @@ -958,11 +959,35 @@ HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint hsmbus->XferSize = Size; } + sizetoxfer = hsmbus->XferSize; + if ((sizetoxfer > 0U) && ((XferOptions == SMBUS_FIRST_FRAME) || + (XferOptions == SMBUS_FIRST_AND_LAST_FRAME_NO_PEC) || + (XferOptions == SMBUS_FIRST_FRAME_WITH_PEC) || + (XferOptions == SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC))) + { + if (hsmbus->pBuffPtr != NULL) + { + /* Preload TX register */ + /* Write data to TXDR */ + hsmbus->Instance->TXDR = *hsmbus->pBuffPtr; + + /* Increment Buffer pointer */ + hsmbus->pBuffPtr++; + + hsmbus->XferCount--; + hsmbus->XferSize--; + } + else + { + return HAL_ERROR; + } + } + /* Send Slave Address */ /* Set NBYTES to write and reload if size > MAX_NBYTE_SIZE and generate RESTART */ - if ((hsmbus->XferSize < hsmbus->XferCount) && (hsmbus->XferSize == MAX_NBYTE_SIZE)) + if ((sizetoxfer < hsmbus->XferCount) && (sizetoxfer == MAX_NBYTE_SIZE)) { - SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)hsmbus->XferSize, + SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)sizetoxfer, SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_GENERATE_START_WRITE); } @@ -977,7 +1002,7 @@ HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint if ((hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_TX) && \ (IS_SMBUS_TRANSFER_OTHER_OPTIONS_REQUEST(tmp) == 0)) { - SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)hsmbus->XferSize, hsmbus->XferOptions, + SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)sizetoxfer, hsmbus->XferOptions, SMBUS_NO_STARTSTOP); } /* Else transfer direction change, so generate Restart with new transfer direction */ @@ -987,7 +1012,7 @@ HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint SMBUS_ConvertOtherXferOptions(hsmbus); /* Handle Transfer */ - SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)hsmbus->XferSize, + SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)sizetoxfer, hsmbus->XferOptions, SMBUS_GENERATE_START_WRITE); } @@ -996,8 +1021,15 @@ HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */ if (SMBUS_GET_PEC_MODE(hsmbus) != 0UL) { - hsmbus->XferSize--; - hsmbus->XferCount--; + if (hsmbus->XferSize > 0U) + { + hsmbus->XferSize--; + hsmbus->XferCount--; + } + else + { + return HAL_ERROR; + } } } @@ -2587,8 +2619,11 @@ static void SMBUS_ITErrorHandler(SMBUS_HandleTypeDef *hsmbus) __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_PECERR); } - /* Flush TX register */ - SMBUS_Flush_TXDR(hsmbus); + if (hsmbus->ErrorCode != HAL_SMBUS_ERROR_NONE) + { + /* Flush TX register */ + SMBUS_Flush_TXDR(hsmbus); + } /* Store current volatile hsmbus->ErrorCode, misra rule */ tmperror = hsmbus->ErrorCode; diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_smbus_ex.c b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_smbus_ex.c index 48c2151650..978257867f 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_smbus_ex.c +++ b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_smbus_ex.c @@ -6,6 +6,8 @@ * This file provides firmware functions to manage the following * functionalities of SMBUS Extended peripheral: * + Extended features functions + * + WakeUp Mode Functions + * + FastModePlus Functions * ****************************************************************************** * @attention diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_spi.c b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_spi.c index a7f489f02a..369023e9c1 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_spi.c +++ b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_spi.c @@ -44,7 +44,8 @@ (+++) Configure the DMA handle parameters (+++) Configure the DMA Tx or Rx Stream/Channel (+++) Associate the initialized hdma_tx(or _rx) handle to the hspi DMA Tx or Rx handle - (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx or Rx Stream/Channel + (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx + or Rx Stream/Channel (#) Program the Mode, BidirectionalMode , Data size, Baudrate Prescaler, NSS management, Clock polarity and phase, FirstBit and CRC configuration in the hspi Init structure. @@ -198,7 +199,8 @@ @note The max SPI frequency depend on SPI data size (8bits, 16bits), SPI mode(2 Lines fullduplex, 2 lines RxOnly, 1 line TX/RX) and Process mode (Polling, IT, DMA). @note - (#) TX/RX processes are HAL_SPI_TransmitReceive(), HAL_SPI_TransmitReceive_IT() and HAL_SPI_TransmitReceive_DMA() + (#) TX/RX processes are HAL_SPI_TransmitReceive(), HAL_SPI_TransmitReceive_IT() and + HAL_SPI_TransmitReceive_DMA() (#) RX processes are HAL_SPI_Receive(), HAL_SPI_Receive_IT() and HAL_SPI_Receive_DMA() (#) TX processes are HAL_SPI_Transmit(), HAL_SPI_Transmit_IT() and HAL_SPI_Transmit_DMA() @@ -223,7 +225,7 @@ * @{ */ #define SPI_DEFAULT_TIMEOUT 100U -#define SPI_BSY_FLAG_WORKAROUND_TIMEOUT 1000U /*!< Timeout 1000 µs */ +#define SPI_BSY_FLAG_WORKAROUND_TIMEOUT 1000U /*!< Timeout 1000 us */ /** * @} */ @@ -769,15 +771,14 @@ HAL_StatusTypeDef HAL_SPI_UnRegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_Ca * @brief Transmit an amount of data in blocking mode. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. - * @param pData pointer to data buffer - * @param Size amount of data to be sent - * @param Timeout Timeout duration + * @param pData pointer to data buffer (u8 or u16 data elements) + * @param Size amount of data elements (u8 or u16) to be sent + * @param Timeout Timeout duration in ms * @retval HAL status */ -HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout) +HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, const uint8_t *pData, uint16_t Size, uint32_t Timeout) { uint32_t tickstart; - HAL_StatusTypeDef errorcode = HAL_OK; uint16_t initial_TxXferCount; if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) @@ -790,29 +791,27 @@ HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint /* Check Direction parameter */ assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction)); - /* Process Locked */ - __HAL_LOCK(hspi); - /* Init tickstart for timeout management*/ tickstart = HAL_GetTick(); initial_TxXferCount = Size; if (hspi->State != HAL_SPI_STATE_READY) { - errorcode = HAL_BUSY; - goto error; + return HAL_BUSY; } if ((pData == NULL) || (Size == 0U)) { - errorcode = HAL_ERROR; - goto error; + return HAL_ERROR; } + /* Process Locked */ + __HAL_LOCK(hspi); + /* Set the transaction information */ hspi->State = HAL_SPI_STATE_BUSY_TX; hspi->ErrorCode = HAL_SPI_ERROR_NONE; - hspi->pTxBuffPtr = (uint8_t *)pData; + hspi->pTxBuffPtr = (const uint8_t *)pData; hspi->TxXferSize = Size; hspi->TxXferCount = Size; @@ -851,7 +850,7 @@ HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint { if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U)) { - hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); + hspi->Instance->DR = *((const uint16_t *)hspi->pTxBuffPtr); hspi->pTxBuffPtr += sizeof(uint16_t); hspi->TxXferCount--; } @@ -861,7 +860,7 @@ HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint /* Wait until TXE flag is set to send data */ if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) { - hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); + hspi->Instance->DR = *((const uint16_t *)hspi->pTxBuffPtr); hspi->pTxBuffPtr += sizeof(uint16_t); hspi->TxXferCount--; } @@ -870,9 +869,9 @@ HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint /* Timeout management */ if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U)) { - errorcode = HAL_TIMEOUT; hspi->State = HAL_SPI_STATE_READY; - goto error; + __HAL_UNLOCK(hspi); + return HAL_TIMEOUT; } } } @@ -882,7 +881,7 @@ HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint { if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U)) { - *((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr); + *((__IO uint8_t *)&hspi->Instance->DR) = *((const uint8_t *)hspi->pTxBuffPtr); hspi->pTxBuffPtr += sizeof(uint8_t); hspi->TxXferCount--; } @@ -891,7 +890,7 @@ HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint /* Wait until TXE flag is set to send data */ if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) { - *((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr); + *((__IO uint8_t *)&hspi->Instance->DR) = *((const uint8_t *)hspi->pTxBuffPtr); hspi->pTxBuffPtr += sizeof(uint8_t); hspi->TxXferCount--; } @@ -900,9 +899,9 @@ HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint /* Timeout management */ if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U)) { - errorcode = HAL_TIMEOUT; hspi->State = HAL_SPI_STATE_READY; - goto error; + __HAL_UNLOCK(hspi); + return HAL_TIMEOUT; } } } @@ -927,29 +926,31 @@ HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint __HAL_SPI_CLEAR_OVRFLAG(hspi); } + hspi->State = HAL_SPI_STATE_READY; + /* Process Unlocked */ + __HAL_UNLOCK(hspi); + if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) { - errorcode = HAL_ERROR; + return HAL_ERROR; } else { - hspi->State = HAL_SPI_STATE_READY; + return HAL_OK; } - -error: - /* Process Unlocked */ - __HAL_UNLOCK(hspi); - return errorcode; } /** * @brief Receive an amount of data in blocking mode. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. - * @param pData pointer to data buffer - * @param Size amount of data to be received - * @param Timeout Timeout duration + * @param pData pointer to data buffer (u8 or u16 data elements) + * @param Size amount of data elements (u8 or u16) to be received + * @param Timeout Timeout duration in ms * @retval HAL status + * @note In master mode, if the direction is set to SPI_DIRECTION_2LINES + * the receive buffer is written to data register (DR) to generate + * clock pulses and receive data */ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout) { @@ -957,7 +958,6 @@ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint1 __IO uint32_t tmpreg = 0U; #endif /* USE_SPI_CRC */ uint32_t tickstart; - HAL_StatusTypeDef errorcode = HAL_OK; if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) { @@ -968,8 +968,12 @@ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint1 if (hspi->State != HAL_SPI_STATE_READY) { - errorcode = HAL_BUSY; - goto error; + return HAL_BUSY; + } + + if ((pData == NULL) || (Size == 0U)) + { + return HAL_ERROR; } if ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES)) @@ -979,17 +983,11 @@ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint1 return HAL_SPI_TransmitReceive(hspi, pData, pData, Size, Timeout); } - /* Process Locked */ - __HAL_LOCK(hspi); - /* Init tickstart for timeout management*/ tickstart = HAL_GetTick(); - if ((pData == NULL) || (Size == 0U)) - { - errorcode = HAL_ERROR; - goto error; - } + /* Process Locked */ + __HAL_LOCK(hspi); /* Set the transaction information */ hspi->State = HAL_SPI_STATE_BUSY_RX; @@ -1049,9 +1047,9 @@ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint1 /* Timeout management */ if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U)) { - errorcode = HAL_TIMEOUT; hspi->State = HAL_SPI_STATE_READY; - goto error; + __HAL_UNLOCK(hspi); + return HAL_TIMEOUT; } } } @@ -1073,9 +1071,9 @@ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint1 /* Timeout management */ if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U)) { - errorcode = HAL_TIMEOUT; hspi->State = HAL_SPI_STATE_READY; - goto error; + __HAL_UNLOCK(hspi); + return HAL_TIMEOUT; } } } @@ -1092,8 +1090,8 @@ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint1 if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SET, Timeout, tickstart) != HAL_OK) { /* the latest data has not been received */ - errorcode = HAL_TIMEOUT; - goto error; + __HAL_UNLOCK(hspi); + return HAL_TIMEOUT; } /* Receive last data in 16 Bit mode */ @@ -1111,8 +1109,9 @@ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint1 if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SET, Timeout, tickstart) != HAL_OK) { SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); - errorcode = HAL_TIMEOUT; - goto error; + hspi->State = HAL_SPI_STATE_READY; + __HAL_UNLOCK(hspi); + return HAL_TIMEOUT; } /* Read CRC to Flush DR and RXNE flag */ @@ -1137,32 +1136,31 @@ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint1 } #endif /* USE_SPI_CRC */ + hspi->State = HAL_SPI_STATE_READY; + /* Unlock the process */ + __HAL_UNLOCK(hspi); if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) { - errorcode = HAL_ERROR; + return HAL_ERROR; } else { - hspi->State = HAL_SPI_STATE_READY; + return HAL_OK; } - -error : - __HAL_UNLOCK(hspi); - return errorcode; } /** * @brief Transmit and Receive an amount of data in blocking mode. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. - * @param pTxData pointer to transmission data buffer - * @param pRxData pointer to reception data buffer - * @param Size amount of data to be sent and received - * @param Timeout Timeout duration + * @param pTxData pointer to transmission data buffer (u8 or u16 data elements) + * @param pRxData pointer to reception data buffer (u8 or u16 data elements) + * @param Size amount of data elements (u8 or u16) to be sent and received + * @param Timeout Timeout duration in ms * @retval HAL status */ -HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, - uint32_t Timeout) +HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, const uint8_t *pTxData, uint8_t *pRxData, + uint16_t Size, uint32_t Timeout) { uint16_t initial_TxXferCount; uint32_t tmp_mode; @@ -1174,7 +1172,6 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD /* Variable used to alternate Rx and Tx during transfer */ uint32_t txallowed = 1U; - HAL_StatusTypeDef errorcode = HAL_OK; if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) { @@ -1187,9 +1184,6 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD /* Check Direction parameter */ assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction)); - /* Process Locked */ - __HAL_LOCK(hspi); - /* Init tickstart for timeout management*/ tickstart = HAL_GetTick(); @@ -1199,18 +1193,20 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD initial_TxXferCount = Size; if (!((tmp_state == HAL_SPI_STATE_READY) || \ - ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_state == HAL_SPI_STATE_BUSY_RX)))) + ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && + (tmp_state == HAL_SPI_STATE_BUSY_RX)))) { - errorcode = HAL_BUSY; - goto error; + return HAL_BUSY; } if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U)) { - errorcode = HAL_ERROR; - goto error; + return HAL_ERROR; } + /* Process Locked */ + __HAL_LOCK(hspi); + /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */ if (hspi->State != HAL_SPI_STATE_BUSY_RX) { @@ -1222,7 +1218,7 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD hspi->pRxBuffPtr = (uint8_t *)pRxData; hspi->RxXferCount = Size; hspi->RxXferSize = Size; - hspi->pTxBuffPtr = (uint8_t *)pTxData; + hspi->pTxBuffPtr = (const uint8_t *)pTxData; hspi->TxXferCount = Size; hspi->TxXferSize = Size; @@ -1250,16 +1246,25 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD { if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U)) { - hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); + hspi->Instance->DR = *((const uint16_t *)hspi->pTxBuffPtr); hspi->pTxBuffPtr += sizeof(uint16_t); hspi->TxXferCount--; + +#if (USE_SPI_CRC != 0U) + /* Enable CRC Transmission */ + if ((hspi->TxXferCount == 0U) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)) + { + SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT); + } +#endif /* USE_SPI_CRC */ + } while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U)) { /* Check TXE flag */ if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) && (hspi->TxXferCount > 0U) && (txallowed == 1U)) { - hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); + hspi->Instance->DR = *((const uint16_t *)hspi->pTxBuffPtr); hspi->pTxBuffPtr += sizeof(uint16_t); hspi->TxXferCount--; /* Next Data is a reception (Rx). Tx not allowed */ @@ -1285,9 +1290,9 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD } if (((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) { - errorcode = HAL_TIMEOUT; hspi->State = HAL_SPI_STATE_READY; - goto error; + __HAL_UNLOCK(hspi); + return HAL_TIMEOUT; } } } @@ -1296,16 +1301,24 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD { if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U)) { - *((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr); + *((__IO uint8_t *)&hspi->Instance->DR) = *((const uint8_t *)hspi->pTxBuffPtr); hspi->pTxBuffPtr += sizeof(uint8_t); hspi->TxXferCount--; + +#if (USE_SPI_CRC != 0U) + /* Enable CRC Transmission */ + if ((hspi->TxXferCount == 0U) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)) + { + SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT); + } +#endif /* USE_SPI_CRC */ } while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U)) { /* Check TXE flag */ if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) && (hspi->TxXferCount > 0U) && (txallowed == 1U)) { - *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr); + *(__IO uint8_t *)&hspi->Instance->DR = *((const uint8_t *)hspi->pTxBuffPtr); hspi->pTxBuffPtr++; hspi->TxXferCount--; /* Next Data is a reception (Rx). Tx not allowed */ @@ -1331,9 +1344,9 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD } if ((((HAL_GetTick() - tickstart) >= Timeout) && ((Timeout != HAL_MAX_DELAY))) || (Timeout == 0U)) { - errorcode = HAL_TIMEOUT; hspi->State = HAL_SPI_STATE_READY; - goto error; + __HAL_UNLOCK(hspi); + return HAL_TIMEOUT; } } } @@ -1347,8 +1360,9 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD { /* Error on the CRC reception */ SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); - errorcode = HAL_TIMEOUT; - goto error; + hspi->State = HAL_SPI_STATE_READY; + __HAL_UNLOCK(hspi); + return HAL_TIMEOUT; } /* Read CRC */ tmpreg = READ_REG(hspi->Instance->DR); @@ -1362,17 +1376,17 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); /* Clear CRC Flag */ __HAL_SPI_CLEAR_CRCERRFLAG(hspi); - - errorcode = HAL_ERROR; + __HAL_UNLOCK(hspi); + return HAL_ERROR; } #endif /* USE_SPI_CRC */ /* Check the end of the transaction */ if (SPI_EndRxTxTransaction(hspi, Timeout, tickstart) != HAL_OK) { - errorcode = HAL_ERROR; hspi->ErrorCode = HAL_SPI_ERROR_FLAG; - goto error; + __HAL_UNLOCK(hspi); + return HAL_ERROR; } /* Clear overrun flag in 2 Lines communication mode because received is not read */ @@ -1381,31 +1395,31 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD __HAL_SPI_CLEAR_OVRFLAG(hspi); } + + hspi->State = HAL_SPI_STATE_READY; + /* Unlock the process */ + __HAL_UNLOCK(hspi); + if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) { - errorcode = HAL_ERROR; + return HAL_ERROR; } else { - hspi->State = HAL_SPI_STATE_READY; + return HAL_OK; } - -error : - __HAL_UNLOCK(hspi); - return errorcode; } /** * @brief Transmit an amount of data in non-blocking mode with Interrupt. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. - * @param pData pointer to data buffer - * @param Size amount of data to be sent + * @param pData pointer to data buffer (u8 or u16 data elements) + * @param Size amount of data elements (u8 or u16) to be sent * @retval HAL status */ -HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size) +HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, const uint8_t *pData, uint16_t Size) { - HAL_StatusTypeDef errorcode = HAL_OK; if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) { @@ -1417,25 +1431,24 @@ HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, u /* Check Direction parameter */ assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction)); - /* Process Locked */ - __HAL_LOCK(hspi); if ((pData == NULL) || (Size == 0U)) { - errorcode = HAL_ERROR; - goto error; + return HAL_ERROR; } if (hspi->State != HAL_SPI_STATE_READY) { - errorcode = HAL_BUSY; - goto error; + return HAL_BUSY; } + /* Process Locked */ + __HAL_LOCK(hspi); + /* Set the transaction information */ hspi->State = HAL_SPI_STATE_BUSY_TX; hspi->ErrorCode = HAL_SPI_ERROR_NONE; - hspi->pTxBuffPtr = (uint8_t *)pData; + hspi->pTxBuffPtr = (const uint8_t *)pData; hspi->TxXferSize = Size; hspi->TxXferCount = Size; @@ -1471,10 +1484,6 @@ HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, u } #endif /* USE_SPI_CRC */ - /* Enable TXE and ERR interrupt */ - __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_ERR)); - - /* Check if the SPI is already enabled */ if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) { @@ -1482,23 +1491,24 @@ HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, u __HAL_SPI_ENABLE(hspi); } -error : + /* Process Unlocked */ __HAL_UNLOCK(hspi); - return errorcode; + /* Enable TXE and ERR interrupt */ + __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_ERR)); + + return HAL_OK; } /** * @brief Receive an amount of data in non-blocking mode with Interrupt. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. - * @param pData pointer to data buffer - * @param Size amount of data to be sent + * @param pData pointer to data buffer (u8 or u16 data elements) + * @param Size amount of data elements (u8 or u16) to be received * @retval HAL status */ HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size) { - HAL_StatusTypeDef errorcode = HAL_OK; - if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) { /* in this case, 16-bit access is performed on Data @@ -1509,8 +1519,12 @@ HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, ui if (hspi->State != HAL_SPI_STATE_READY) { - errorcode = HAL_BUSY; - goto error; + return HAL_BUSY; + } + + if ((pData == NULL) || (Size == 0U)) + { + return HAL_ERROR; } if ((hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->Init.Mode == SPI_MODE_MASTER)) @@ -1520,15 +1534,10 @@ HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, ui return HAL_SPI_TransmitReceive_IT(hspi, pData, pData, Size); } + /* Process Locked */ __HAL_LOCK(hspi); - if ((pData == NULL) || (Size == 0U)) - { - errorcode = HAL_ERROR; - goto error; - } - /* Set the transaction information */ hspi->State = HAL_SPI_STATE_BUSY_RX; hspi->ErrorCode = HAL_SPI_ERROR_NONE; @@ -1568,9 +1577,6 @@ HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, ui } #endif /* USE_SPI_CRC */ - /* Enable TXE and ERR interrupt */ - __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR)); - /* Note : The SPI must be enabled after unlocking current process to avoid the risk of SPI interrupt handle execution before current process unlock */ @@ -1582,26 +1588,28 @@ HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, ui __HAL_SPI_ENABLE(hspi); } -error : /* Process Unlocked */ __HAL_UNLOCK(hspi); - return errorcode; + /* Enable RXNE and ERR interrupt */ + __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR)); + + return HAL_OK; } /** * @brief Transmit and Receive an amount of data in non-blocking mode with Interrupt. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. - * @param pTxData pointer to transmission data buffer - * @param pRxData pointer to reception data buffer - * @param Size amount of data to be sent and received + * @param pTxData pointer to transmission data buffer (u8 or u16 data elements) + * @param pRxData pointer to reception data buffer (u8 or u16 data elements) + * @param Size amount of data elements (u8 or u16) to be sent and received * @retval HAL status */ -HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size) +HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, const uint8_t *pTxData, uint8_t *pRxData, + uint16_t Size) { uint32_t tmp_mode; HAL_SPI_StateTypeDef tmp_state; - HAL_StatusTypeDef errorcode = HAL_OK; if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) { @@ -1614,26 +1622,25 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *p /* Check Direction parameter */ assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction)); - /* Process locked */ - __HAL_LOCK(hspi); - /* Init temporary variables */ tmp_state = hspi->State; tmp_mode = hspi->Init.Mode; if (!((tmp_state == HAL_SPI_STATE_READY) || \ - ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_state == HAL_SPI_STATE_BUSY_RX)))) + ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && + (tmp_state == HAL_SPI_STATE_BUSY_RX)))) { - errorcode = HAL_BUSY; - goto error; + return HAL_BUSY; } if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U)) { - errorcode = HAL_ERROR; - goto error; + return HAL_ERROR; } + /* Process locked */ + __HAL_LOCK(hspi); + /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */ if (hspi->State != HAL_SPI_STATE_BUSY_RX) { @@ -1642,7 +1649,7 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *p /* Set the transaction information */ hspi->ErrorCode = HAL_SPI_ERROR_NONE; - hspi->pTxBuffPtr = (uint8_t *)pTxData; + hspi->pTxBuffPtr = (const uint8_t *)pTxData; hspi->TxXferSize = Size; hspi->TxXferCount = Size; hspi->pRxBuffPtr = (uint8_t *)pRxData; @@ -1669,8 +1676,6 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *p } #endif /* USE_SPI_CRC */ - /* Enable TXE, RXNE and ERR interrupt */ - __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR)); /* Check if the SPI is already enabled */ if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) @@ -1679,23 +1684,24 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *p __HAL_SPI_ENABLE(hspi); } -error : /* Process Unlocked */ __HAL_UNLOCK(hspi); - return errorcode; + /* Enable TXE, RXNE and ERR interrupt */ + __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR)); + + return HAL_OK; } /** * @brief Transmit an amount of data in non-blocking mode with DMA. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. - * @param pData pointer to data buffer - * @param Size amount of data to be sent + * @param pData pointer to data buffer (u8 or u16 data elements) + * @param Size amount of data elements (u8 or u16) to be sent * @retval HAL status */ -HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size) +HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, const uint8_t *pData, uint16_t Size) { - HAL_StatusTypeDef errorcode = HAL_OK; /* Check tx dma handle */ assert_param(IS_SPI_DMA_HANDLE(hspi->hdmatx)); @@ -1703,25 +1709,23 @@ HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, /* Check Direction parameter */ assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction)); - /* Process Locked */ - __HAL_LOCK(hspi); - if (hspi->State != HAL_SPI_STATE_READY) { - errorcode = HAL_BUSY; - goto error; + return HAL_BUSY; } if ((pData == NULL) || (Size == 0U)) { - errorcode = HAL_ERROR; - goto error; + return HAL_ERROR; } + /* Process Locked */ + __HAL_LOCK(hspi); + /* Set the transaction information */ hspi->State = HAL_SPI_STATE_BUSY_TX; hspi->ErrorCode = HAL_SPI_ERROR_NONE; - hspi->pTxBuffPtr = (uint8_t *)pData; + hspi->pTxBuffPtr = (const uint8_t *)pData; hspi->TxXferSize = Size; hspi->TxXferCount = Size; @@ -1766,9 +1770,9 @@ HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, { /* Update SPI error code */ SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA); - errorcode = HAL_ERROR; - - goto error; + /* Process Unlocked */ + __HAL_UNLOCK(hspi); + return HAL_ERROR; } /* Check if the SPI is already enabled */ @@ -1778,16 +1782,16 @@ HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, __HAL_SPI_ENABLE(hspi); } + /* Process Unlocked */ + __HAL_UNLOCK(hspi); + /* Enable the SPI Error Interrupt Bit */ __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_ERR)); /* Enable Tx DMA Request */ SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN); -error : - /* Process Unlocked */ - __HAL_UNLOCK(hspi); - return errorcode; + return HAL_OK; } /** @@ -1795,22 +1799,24 @@ error : * @note In case of MASTER mode and SPI_DIRECTION_2LINES direction, hdmatx shall be defined. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. - * @param pData pointer to data buffer + * @param pData pointer to data buffer (u8 or u16 data elements) * @note When the CRC feature is enabled the pData Length must be Size + 1. - * @param Size amount of data to be sent + * @param Size amount of data elements (u8 or u16) to be received * @retval HAL status */ HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size) { - HAL_StatusTypeDef errorcode = HAL_OK; - /* Check rx dma handle */ assert_param(IS_SPI_DMA_HANDLE(hspi->hdmarx)); if (hspi->State != HAL_SPI_STATE_READY) { - errorcode = HAL_BUSY; - goto error; + return HAL_BUSY; + } + + if ((pData == NULL) || (Size == 0U)) + { + return HAL_ERROR; } if ((hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->Init.Mode == SPI_MODE_MASTER)) @@ -1827,12 +1833,6 @@ HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, u /* Process Locked */ __HAL_LOCK(hspi); - if ((pData == NULL) || (Size == 0U)) - { - errorcode = HAL_ERROR; - goto error; - } - /* Set the transaction information */ hspi->State = HAL_SPI_STATE_BUSY_RX; hspi->ErrorCode = HAL_SPI_ERROR_NONE; @@ -1880,9 +1880,9 @@ HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, u { /* Update SPI error code */ SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA); - errorcode = HAL_ERROR; - - goto error; + /* Process Unlocked */ + __HAL_UNLOCK(hspi); + return HAL_ERROR; } /* Check if the SPI is already enabled */ @@ -1892,34 +1892,33 @@ HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, u __HAL_SPI_ENABLE(hspi); } + /* Process Unlocked */ + __HAL_UNLOCK(hspi); + /* Enable the SPI Error Interrupt Bit */ __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_ERR)); /* Enable Rx DMA Request */ SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN); -error: - /* Process Unlocked */ - __HAL_UNLOCK(hspi); - return errorcode; + return HAL_OK; } /** * @brief Transmit and Receive an amount of data in non-blocking mode with DMA. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. - * @param pTxData pointer to transmission data buffer - * @param pRxData pointer to reception data buffer + * @param pTxData pointer to transmission data buffer (u8 or u16 data elements) + * @param pRxData pointer to reception data buffer (u8 or u16 data elements) * @note When the CRC feature is enabled the pRxData Length must be Size + 1 - * @param Size amount of data to be sent + * @param Size amount of data elements (u8 or u16) to be sent and received * @retval HAL status */ -HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, +HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, const uint8_t *pTxData, uint8_t *pRxData, uint16_t Size) { uint32_t tmp_mode; HAL_SPI_StateTypeDef tmp_state; - HAL_StatusTypeDef errorcode = HAL_OK; /* Check rx & tx dma handles */ assert_param(IS_SPI_DMA_HANDLE(hspi->hdmarx)); @@ -1928,26 +1927,25 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t * /* Check Direction parameter */ assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction)); - /* Process locked */ - __HAL_LOCK(hspi); - /* Init temporary variables */ tmp_state = hspi->State; tmp_mode = hspi->Init.Mode; if (!((tmp_state == HAL_SPI_STATE_READY) || - ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_state == HAL_SPI_STATE_BUSY_RX)))) + ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && + (tmp_state == HAL_SPI_STATE_BUSY_RX)))) { - errorcode = HAL_BUSY; - goto error; + return HAL_BUSY; } if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U)) { - errorcode = HAL_ERROR; - goto error; + return HAL_ERROR; } + /* Process locked */ + __HAL_LOCK(hspi); + /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */ if (hspi->State != HAL_SPI_STATE_BUSY_RX) { @@ -1956,7 +1954,7 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t * /* Set the transaction information */ hspi->ErrorCode = HAL_SPI_ERROR_NONE; - hspi->pTxBuffPtr = (uint8_t *)pTxData; + hspi->pTxBuffPtr = (const uint8_t *)pTxData; hspi->TxXferSize = Size; hspi->TxXferCount = Size; hspi->pRxBuffPtr = (uint8_t *)pRxData; @@ -2001,9 +1999,9 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t * { /* Update SPI error code */ SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA); - errorcode = HAL_ERROR; - - goto error; + /* Process Unlocked */ + __HAL_UNLOCK(hspi); + return HAL_ERROR; } /* Enable Rx DMA Request */ @@ -2022,9 +2020,9 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t * { /* Update SPI error code */ SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA); - errorcode = HAL_ERROR; - - goto error; + /* Process Unlocked */ + __HAL_UNLOCK(hspi); + return HAL_ERROR; } /* Check if the SPI is already enabled */ @@ -2033,16 +2031,17 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t * /* Enable SPI peripheral */ __HAL_SPI_ENABLE(hspi); } + + /* Process Unlocked */ + __HAL_UNLOCK(hspi); + /* Enable the SPI Error Interrupt Bit */ __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_ERR)); /* Enable Tx DMA Request */ SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN); -error : - /* Process Unlocked */ - __HAL_UNLOCK(hspi); - return errorcode; + return HAL_OK; } /** @@ -2408,9 +2407,11 @@ HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi) { HAL_StatusTypeDef errorcode = HAL_OK; /* The Lock is not implemented on this API to allow the user application - to call the HAL SPI API under callbacks HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback(): + to call the HAL SPI API under callbacks HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or + HAL_SPI_TxRxCpltCallback(): when calling HAL_DMA_Abort() API the DMA TX/RX Transfer complete interrupt is generated - and the correspond call back is executed HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback() + and the correspond call back is executed HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or + HAL_SPI_TxRxCpltCallback() */ /* Abort the SPI DMA tx Stream/Channel */ @@ -2700,7 +2701,7 @@ __weak void HAL_SPI_AbortCpltCallback(SPI_HandleTypeDef *hspi) * the configuration information for SPI module. * @retval SPI state */ -HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi) +HAL_SPI_StateTypeDef HAL_SPI_GetState(const SPI_HandleTypeDef *hspi) { /* Return SPI handle state */ return hspi->State; @@ -2712,7 +2713,7 @@ HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi) * the configuration information for SPI module. * @retval SPI error code in bitmap format */ -uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi) +uint32_t HAL_SPI_GetError(const SPI_HandleTypeDef *hspi) { /* Return SPI ErrorCode */ return hspi->ErrorCode; @@ -2739,7 +2740,7 @@ uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi) */ static void SPI_DMATransmitCplt(DMA_HandleTypeDef *hdma) { - SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */ + SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); uint32_t tickstart; /* Init tickstart for timeout management*/ @@ -2796,7 +2797,7 @@ static void SPI_DMATransmitCplt(DMA_HandleTypeDef *hdma) */ static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma) { - SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */ + SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); uint32_t tickstart; #if (USE_SPI_CRC != 0U) __IO uint32_t tmpreg = 0U; @@ -2885,7 +2886,7 @@ static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma) */ static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma) { - SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */ + SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); uint32_t tickstart; #if (USE_SPI_CRC != 0U) __IO uint32_t tmpreg = 0U; @@ -2965,7 +2966,7 @@ static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma) */ static void SPI_DMAHalfTransmitCplt(DMA_HandleTypeDef *hdma) { - SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */ + SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Call user Tx half complete callback */ #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) @@ -2983,7 +2984,7 @@ static void SPI_DMAHalfTransmitCplt(DMA_HandleTypeDef *hdma) */ static void SPI_DMAHalfReceiveCplt(DMA_HandleTypeDef *hdma) { - SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */ + SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Call user Rx half complete callback */ #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) @@ -3001,7 +3002,7 @@ static void SPI_DMAHalfReceiveCplt(DMA_HandleTypeDef *hdma) */ static void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef *hdma) { - SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */ + SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Call user TxRx half complete callback */ #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) @@ -3019,7 +3020,7 @@ static void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef *hdma) */ static void SPI_DMAError(DMA_HandleTypeDef *hdma) { - SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */ + SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Stop the disable DMA transfer on SPI side */ CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN); @@ -3042,7 +3043,7 @@ static void SPI_DMAError(DMA_HandleTypeDef *hdma) */ static void SPI_DMAAbortOnError(DMA_HandleTypeDef *hdma) { - SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */ + SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); hspi->RxXferCount = 0U; hspi->TxXferCount = 0U; @@ -3064,7 +3065,7 @@ static void SPI_DMAAbortOnError(DMA_HandleTypeDef *hdma) */ static void SPI_DMATxAbortCallback(DMA_HandleTypeDef *hdma) { - SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */ + SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); __IO uint32_t count; hspi->hdmatx->XferAbortCallback = NULL; @@ -3129,7 +3130,7 @@ static void SPI_DMATxAbortCallback(DMA_HandleTypeDef *hdma) */ static void SPI_DMARxAbortCallback(DMA_HandleTypeDef *hdma) { - SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */ + SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Disable SPI Peripheral */ __HAL_SPI_DISABLE(hspi); @@ -3251,7 +3252,7 @@ static void SPI_2linesRxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi) */ static void SPI_2linesTxISR_8BIT(struct __SPI_HandleTypeDef *hspi) { - *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr); + *(__IO uint8_t *)&hspi->Instance->DR = *((const uint8_t *)hspi->pTxBuffPtr); hspi->pTxBuffPtr++; hspi->TxXferCount--; @@ -3344,7 +3345,7 @@ static void SPI_2linesRxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi) static void SPI_2linesTxISR_16BIT(struct __SPI_HandleTypeDef *hspi) { /* Transmit data in 16 Bit mode */ - hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); + hspi->Instance->DR = *((const uint16_t *)hspi->pTxBuffPtr); hspi->pTxBuffPtr += sizeof(uint16_t); hspi->TxXferCount--; @@ -3492,7 +3493,7 @@ static void SPI_RxISR_16BIT(struct __SPI_HandleTypeDef *hspi) */ static void SPI_TxISR_8BIT(struct __SPI_HandleTypeDef *hspi) { - *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr); + *(__IO uint8_t *)&hspi->Instance->DR = *((const uint8_t *)hspi->pTxBuffPtr); hspi->pTxBuffPtr++; hspi->TxXferCount--; @@ -3518,7 +3519,7 @@ static void SPI_TxISR_8BIT(struct __SPI_HandleTypeDef *hspi) static void SPI_TxISR_16BIT(struct __SPI_HandleTypeDef *hspi) { /* Transmit data in 16 Bit mode */ - hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); + hspi->Instance->DR = *((const uint16_t *)hspi->pTxBuffPtr); hspi->pTxBuffPtr += sizeof(uint16_t); hspi->TxXferCount--; @@ -3597,7 +3598,10 @@ static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi, { tmp_timeout = 0U; } - count--; + else + { + count--; + } } } @@ -3664,8 +3668,17 @@ static HAL_StatusTypeDef SPI_EndRxTransaction(SPI_HandleTypeDef *hspi, uint32_t */ static HAL_StatusTypeDef SPI_EndRxTxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart) { - /* Timeout in µs */ - __IO uint32_t count = SPI_BSY_FLAG_WORKAROUND_TIMEOUT * (SystemCoreClock / 24U / 1000000U); + __IO uint32_t count; + + /* Wait until TXE flag */ + if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_TXE, SET, Timeout, Tickstart) != HAL_OK) + { + SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); + return HAL_TIMEOUT; + } + + /* Timeout in us */ + count = SPI_BSY_FLAG_WORKAROUND_TIMEOUT * (SystemCoreClock / 24U / 1000000U); /* Erratasheet: BSY bit may stay high at the end of a data transfer in Slave mode */ if (hspi->Init.Mode == SPI_MODE_MASTER) { diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.c b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.c index 306ceb1f70..55de011fbd 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.c +++ b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.c @@ -3647,13 +3647,16 @@ HAL_StatusTypeDef HAL_TIM_Encoder_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Cha */ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) { + uint32_t itsource = htim->Instance->DIER; + uint32_t itflag = htim->Instance->SR; + /* Capture compare 1 event */ - if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) + if ((itflag & (TIM_FLAG_CC1)) == (TIM_FLAG_CC1)) { - if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) != RESET) + if ((itsource & (TIM_IT_CC1)) == (TIM_IT_CC1)) { { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1); + __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC1); htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; /* Input capture event */ @@ -3681,11 +3684,11 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) } } /* Capture compare 2 event */ - if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET) + if ((itflag & (TIM_FLAG_CC2)) == (TIM_FLAG_CC2)) { - if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) != RESET) + if ((itsource & (TIM_IT_CC2)) == (TIM_IT_CC2)) { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2); + __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC2); htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; /* Input capture event */ if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) @@ -3711,11 +3714,11 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) } } /* Capture compare 3 event */ - if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET) + if ((itflag & (TIM_FLAG_CC3)) == (TIM_FLAG_CC3)) { - if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) != RESET) + if ((itsource & (TIM_IT_CC3)) == (TIM_IT_CC3)) { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3); + __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC3); htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; /* Input capture event */ if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) @@ -3741,11 +3744,11 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) } } /* Capture compare 4 event */ - if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET) + if ((itflag & (TIM_FLAG_CC4)) == (TIM_FLAG_CC4)) { - if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) != RESET) + if ((itsource & (TIM_IT_CC4)) == (TIM_IT_CC4)) { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4); + __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC4); htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; /* Input capture event */ if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) @@ -3771,11 +3774,11 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) } } /* TIM Update event */ - if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET) + if ((itflag & (TIM_FLAG_UPDATE)) == (TIM_FLAG_UPDATE)) { - if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) != RESET) + if ((itsource & (TIM_IT_UPDATE)) == (TIM_IT_UPDATE)) { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); + __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_UPDATE); #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->PeriodElapsedCallback(htim); #else @@ -3784,11 +3787,11 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) } } /* TIM Trigger detection event */ - if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET) + if ((itflag & (TIM_FLAG_TRIGGER)) == (TIM_FLAG_TRIGGER)) { - if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) != RESET) + if ((itsource & (TIM_IT_TRIGGER)) == (TIM_IT_TRIGGER)) { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); + __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_TRIGGER); #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->TriggerCallback(htim); #else @@ -4269,7 +4272,8 @@ HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef *htim, TIM_O * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, - uint32_t BurstRequestSrc, const uint32_t *BurstBuffer, uint32_t BurstLength) + uint32_t BurstRequestSrc, const uint32_t *BurstBuffer, + uint32_t BurstLength) { HAL_StatusTypeDef status; @@ -6452,17 +6456,21 @@ static void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *St /* Set the auto-reload preload */ MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); - TIMx->CR1 = tmpcr1; - /* Set the Autoreload value */ TIMx->ARR = (uint32_t)Structure->Period ; /* Set the Prescaler value */ TIMx->PSC = Structure->Prescaler; + /* Disable Update Event (UEV) with Update Generation (UG) + by changing Update Request Source (URS) to avoid Update flag (UIF) */ + SET_BIT(TIMx->CR1, TIM_CR1_URS); + /* Generate an update event to reload the Prescaler and the repetition counter (only for advanced timer) value immediately */ TIMx->EGR = TIM_EGR_UG; + + TIMx->CR1 = tmpcr1; } /** @@ -6477,11 +6485,12 @@ static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Co uint32_t tmpccer; uint32_t tmpcr2; + /* Get the TIMx CCER register value */ + tmpccer = TIMx->CCER; + /* Disable the Channel 1: Reset the CC1E Bit */ TIMx->CCER &= ~TIM_CCER_CC1E; - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; @@ -6524,11 +6533,12 @@ static void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Co uint32_t tmpccer; uint32_t tmpcr2; + /* Get the TIMx CCER register value */ + tmpccer = TIMx->CCER; + /* Disable the Channel 2: Reset the CC2E Bit */ TIMx->CCER &= ~TIM_CCER_CC2E; - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; @@ -6572,11 +6582,12 @@ static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Co uint32_t tmpccer; uint32_t tmpcr2; + /* Get the TIMx CCER register value */ + tmpccer = TIMx->CCER; + /* Disable the Channel 3: Reset the CC2E Bit */ TIMx->CCER &= ~TIM_CCER_CC3E; - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; @@ -6619,11 +6630,12 @@ static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Co uint32_t tmpccer; uint32_t tmpcr2; + /* Get the TIMx CCER register value */ + tmpccer = TIMx->CCER; + /* Disable the Channel 4: Reset the CC4E Bit */ TIMx->CCER &= ~TIM_CCER_CC4E; - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; @@ -6802,9 +6814,9 @@ static void TIM_TI1_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32 uint32_t tmpccer; /* Disable the Channel 1: Reset the CC1E Bit */ + tmpccer = TIMx->CCER; TIMx->CCER &= ~TIM_CCER_CC1E; tmpccmr1 = TIMx->CCMR1; - tmpccer = TIMx->CCER; /* Select the Input */ if (IS_TIM_CC2_INSTANCE(TIMx) != RESET) @@ -6892,9 +6904,9 @@ static void TIM_TI2_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32 uint32_t tmpccer; /* Disable the Channel 2: Reset the CC2E Bit */ + tmpccer = TIMx->CCER; TIMx->CCER &= ~TIM_CCER_CC2E; tmpccmr1 = TIMx->CCMR1; - tmpccer = TIMx->CCER; /* Select the Input */ tmpccmr1 &= ~TIM_CCMR1_CC2S; @@ -6931,9 +6943,9 @@ static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t tmpccer; /* Disable the Channel 2: Reset the CC2E Bit */ + tmpccer = TIMx->CCER; TIMx->CCER &= ~TIM_CCER_CC2E; tmpccmr1 = TIMx->CCMR1; - tmpccer = TIMx->CCER; /* Set the filter */ tmpccmr1 &= ~TIM_CCMR1_IC2F; @@ -6975,9 +6987,9 @@ static void TIM_TI3_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32 uint32_t tmpccer; /* Disable the Channel 3: Reset the CC3E Bit */ + tmpccer = TIMx->CCER; TIMx->CCER &= ~TIM_CCER_CC3E; tmpccmr2 = TIMx->CCMR2; - tmpccer = TIMx->CCER; /* Select the Input */ tmpccmr2 &= ~TIM_CCMR2_CC3S; @@ -7023,9 +7035,9 @@ static void TIM_TI4_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32 uint32_t tmpccer; /* Disable the Channel 4: Reset the CC4E Bit */ + tmpccer = TIMx->CCER; TIMx->CCER &= ~TIM_CCER_CC4E; tmpccmr2 = TIMx->CCMR2; - tmpccer = TIMx->CCER; /* Select the Input */ tmpccmr2 &= ~TIM_CCMR2_CC4S; diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.c b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.c index 974db59017..93bd715ff0 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.c +++ b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.c @@ -105,7 +105,7 @@ [..] Use function HAL_UART_UnRegisterCallback() to reset a callback to the default - weak (surcharged) function. + weak function. HAL_UART_UnRegisterCallback() takes as parameters the HAL peripheral handle, and the Callback ID. This function allows to reset following callbacks: @@ -127,10 +127,10 @@ [..] By default, after the HAL_UART_Init() and when the state is HAL_UART_STATE_RESET - all callbacks are set to the corresponding weak (surcharged) functions: + all callbacks are set to the corresponding weak functions: examples HAL_UART_TxCpltCallback(), HAL_UART_RxHalfCpltCallback(). Exception done for MspInit and MspDeInit functions that are respectively - reset to the legacy weak (surcharged) functions in the HAL_UART_Init() + reset to the legacy weak functions in the HAL_UART_Init() and HAL_UART_DeInit() only when these callbacks are null (not registered beforehand). If not, MspInit or MspDeInit are not null, the HAL_UART_Init() and HAL_UART_DeInit() keep and use the user MspInit/MspDeInit callbacks (registered beforehand). @@ -147,7 +147,7 @@ [..] When The compilation define USE_HAL_UART_REGISTER_CALLBACKS is set to 0 or not defined, the callback registration feature is not available - and weak (surcharged) callbacks are used. + and weak callbacks are used. @endverbatim @@ -193,8 +193,8 @@ /** @addtogroup UART_Private_Functions * @{ */ -static void UART_EndTxTransfer(UART_HandleTypeDef *huart); static void UART_EndRxTransfer(UART_HandleTypeDef *huart); +static void UART_EndTxTransfer(UART_HandleTypeDef *huart); static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma); static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma); static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma); @@ -332,15 +332,17 @@ HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart) __HAL_UART_DISABLE(huart); - /* Set the UART Communication parameters */ - if (UART_SetConfig(huart) == HAL_ERROR) + /* Perform advanced settings configuration */ + /* For some items, configuration requires to be done prior TE and RE bits are set */ + if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) { - return HAL_ERROR; + UART_AdvFeatureConfig(huart); } - if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) + /* Set the UART Communication parameters */ + if (UART_SetConfig(huart) == HAL_ERROR) { - UART_AdvFeatureConfig(huart); + return HAL_ERROR; } /* In asynchronous mode, the following bits must be kept cleared: @@ -397,15 +399,17 @@ HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart) __HAL_UART_DISABLE(huart); - /* Set the UART Communication parameters */ - if (UART_SetConfig(huart) == HAL_ERROR) + /* Perform advanced settings configuration */ + /* For some items, configuration requires to be done prior TE and RE bits are set */ + if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) { - return HAL_ERROR; + UART_AdvFeatureConfig(huart); } - if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) + /* Set the UART Communication parameters */ + if (UART_SetConfig(huart) == HAL_ERROR) { - UART_AdvFeatureConfig(huart); + return HAL_ERROR; } /* In half-duplex mode, the following bits must be kept cleared: @@ -483,15 +487,17 @@ HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLe __HAL_UART_DISABLE(huart); - /* Set the UART Communication parameters */ - if (UART_SetConfig(huart) == HAL_ERROR) + /* Perform advanced settings configuration */ + /* For some items, configuration requires to be done prior TE and RE bits are set */ + if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) { - return HAL_ERROR; + UART_AdvFeatureConfig(huart); } - if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) + /* Set the UART Communication parameters */ + if (UART_SetConfig(huart) == HAL_ERROR) { - UART_AdvFeatureConfig(huart); + return HAL_ERROR; } /* In LIN mode, the following bits must be kept cleared: @@ -567,15 +573,17 @@ HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Add __HAL_UART_DISABLE(huart); - /* Set the UART Communication parameters */ - if (UART_SetConfig(huart) == HAL_ERROR) + /* Perform advanced settings configuration */ + /* For some items, configuration requires to be done prior TE and RE bits are set */ + if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) { - return HAL_ERROR; + UART_AdvFeatureConfig(huart); } - if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) + /* Set the UART Communication parameters */ + if (UART_SetConfig(huart) == HAL_ERROR) { - UART_AdvFeatureConfig(huart); + return HAL_ERROR; } /* In multiprocessor mode, the following bits must be kept cleared: @@ -680,7 +688,7 @@ __weak void HAL_UART_MspDeInit(UART_HandleTypeDef *huart) #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /** * @brief Register a User UART Callback - * To be used instead of the weak predefined callback + * To be used to override the weak predefined callback * @note The HAL_UART_RegisterCallback() may be called before HAL_UART_Init(), HAL_HalfDuplex_Init(), * HAL_LIN_Init(), HAL_MultiProcessor_Init() or HAL_RS485Ex_Init() in HAL_UART_STATE_RESET to register * callbacks for HAL_UART_MSPINIT_CB_ID and HAL_UART_MSPDEINIT_CB_ID @@ -928,10 +936,7 @@ HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pU return HAL_ERROR; } - /* Process locked */ - __HAL_LOCK(huart); - - if (huart->gState == HAL_UART_STATE_READY) + if (huart->RxState == HAL_UART_STATE_READY) { huart->RxEventCallback = pCallback; } @@ -942,9 +947,6 @@ HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pU status = HAL_ERROR; } - /* Release Lock */ - __HAL_UNLOCK(huart); - return status; } @@ -958,10 +960,7 @@ HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart) { HAL_StatusTypeDef status = HAL_OK; - /* Process locked */ - __HAL_LOCK(huart); - - if (huart->gState == HAL_UART_STATE_READY) + if (huart->RxState == HAL_UART_STATE_READY) { huart->RxEventCallback = HAL_UARTEx_RxEventCallback; /* Legacy weak UART Rx Event Callback */ } @@ -972,8 +971,6 @@ HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart) status = HAL_ERROR; } - /* Release Lock */ - __HAL_UNLOCK(huart); return status; } @@ -990,75 +987,79 @@ HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart) =============================================================================== ##### IO operation functions ##### =============================================================================== + [..] This subsection provides a set of functions allowing to manage the UART asynchronous and Half duplex data transfers. - (#) There are two mode of transfer: - (+) Blocking mode: The communication is performed in polling mode. - The HAL status of all data processing is returned by the same function - after finishing transfer. - (+) Non-Blocking mode: The communication is performed using Interrupts - or DMA, These API's return the HAL status. - The end of the data processing will be indicated through the - dedicated UART IRQ when using Interrupt mode or the DMA IRQ when - using DMA mode. - The HAL_UART_TxCpltCallback(), HAL_UART_RxCpltCallback() user callbacks - will be executed respectively at the end of the transmit or Receive process - The HAL_UART_ErrorCallback()user callback will be executed when a communication error is detected + (#) There are two modes of transfer: + (++) Blocking mode: The communication is performed in polling mode. + The HAL status of all data processing is returned by the same function + after finishing transfer. + (++) Non-Blocking mode: The communication is performed using Interrupts + or DMA, These API's return the HAL status. + The end of the data processing will be indicated through the + dedicated UART IRQ when using Interrupt mode or the DMA IRQ when + using DMA mode. + The HAL_UART_TxCpltCallback(), HAL_UART_RxCpltCallback() user callbacks + will be executed respectively at the end of the transmit or Receive process + The HAL_UART_ErrorCallback()user callback will be executed when a communication error is detected (#) Blocking mode API's are : - (+) HAL_UART_Transmit() - (+) HAL_UART_Receive() + (++) HAL_UART_Transmit() + (++) HAL_UART_Receive() (#) Non-Blocking mode API's with Interrupt are : - (+) HAL_UART_Transmit_IT() - (+) HAL_UART_Receive_IT() - (+) HAL_UART_IRQHandler() + (++) HAL_UART_Transmit_IT() + (++) HAL_UART_Receive_IT() + (++) HAL_UART_IRQHandler() (#) Non-Blocking mode API's with DMA are : - (+) HAL_UART_Transmit_DMA() - (+) HAL_UART_Receive_DMA() - (+) HAL_UART_DMAPause() - (+) HAL_UART_DMAResume() - (+) HAL_UART_DMAStop() + (++) HAL_UART_Transmit_DMA() + (++) HAL_UART_Receive_DMA() + (++) HAL_UART_DMAPause() + (++) HAL_UART_DMAResume() + (++) HAL_UART_DMAStop() (#) A set of Transfer Complete Callbacks are provided in Non_Blocking mode: - (+) HAL_UART_TxHalfCpltCallback() - (+) HAL_UART_TxCpltCallback() - (+) HAL_UART_RxHalfCpltCallback() - (+) HAL_UART_RxCpltCallback() - (+) HAL_UART_ErrorCallback() + (++) HAL_UART_TxHalfCpltCallback() + (++) HAL_UART_TxCpltCallback() + (++) HAL_UART_RxHalfCpltCallback() + (++) HAL_UART_RxCpltCallback() + (++) HAL_UART_ErrorCallback() (#) Non-Blocking mode transfers could be aborted using Abort API's : - (+) HAL_UART_Abort() - (+) HAL_UART_AbortTransmit() - (+) HAL_UART_AbortReceive() - (+) HAL_UART_Abort_IT() - (+) HAL_UART_AbortTransmit_IT() - (+) HAL_UART_AbortReceive_IT() + (++) HAL_UART_Abort() + (++) HAL_UART_AbortTransmit() + (++) HAL_UART_AbortReceive() + (++) HAL_UART_Abort_IT() + (++) HAL_UART_AbortTransmit_IT() + (++) HAL_UART_AbortReceive_IT() (#) For Abort services based on interrupts (HAL_UART_Abortxxx_IT), a set of Abort Complete Callbacks are provided: - (+) HAL_UART_AbortCpltCallback() - (+) HAL_UART_AbortTransmitCpltCallback() - (+) HAL_UART_AbortReceiveCpltCallback() + (++) HAL_UART_AbortCpltCallback() + (++) HAL_UART_AbortTransmitCpltCallback() + (++) HAL_UART_AbortReceiveCpltCallback() (#) A Rx Event Reception Callback (Rx event notification) is available for Non_Blocking modes of enhanced reception services: - (+) HAL_UARTEx_RxEventCallback() + (++) HAL_UARTEx_RxEventCallback() + + (#) Wakeup from Stop mode Callback: + (++) HAL_UARTEx_WakeupCallback() (#) In Non-Blocking mode transfers, possible errors are split into 2 categories. Errors are handled as follows : - (+) Error is considered as Recoverable and non blocking : Transfer could go till end, but error severity is - to be evaluated by user : this concerns Frame Error, Parity Error or Noise Error - in Interrupt mode reception . - Received character is then retrieved and stored in Rx buffer, Error code is set to allow user - to identify error type, and HAL_UART_ErrorCallback() user callback is executed. - Transfer is kept ongoing on UART side. - If user wants to abort it, Abort services should be called by user. - (+) Error is considered as Blocking : Transfer could not be completed properly and is aborted. - This concerns Overrun Error In Interrupt mode reception and all errors in DMA mode. - Error code is set to allow user to identify error type, and HAL_UART_ErrorCallback() - user callback is executed. + (++) Error is considered as Recoverable and non blocking : Transfer could go till end, but error severity is + to be evaluated by user : this concerns Frame Error, Parity Error or Noise Error + in Interrupt mode reception . + Received character is then retrieved and stored in Rx buffer, Error code is set to allow user + to identify error type, and HAL_UART_ErrorCallback() user callback is executed. + Transfer is kept ongoing on UART side. + If user wants to abort it, Abort services should be called by user. + (++) Error is considered as Blocking : Transfer could not be completed properly and is aborted. + This concerns Overrun Error In Interrupt mode reception and all errors in DMA mode. + Error code is set to allow user to identify error type, and HAL_UART_ErrorCallback() + user callback is executed. -@- In the Half duplex communication, it is forbidden to run the transmit and receive process in parallel, the UART state HAL_UART_STATE_BUSY_TX_RX can't be useful. @@ -2436,6 +2437,28 @@ void HAL_UART_IRQHandler(UART_HandleTypeDef *huart) HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ } + else + { + /* If DMA is in Circular mode, Idle event is to be reported to user + even if occurring after a Transfer Complete event from DMA */ + if (nb_remaining_rx_data == huart->RxXferSize) + { + if (HAL_IS_BIT_SET(huart->hdmarx->Instance->CCR, DMA_CCR_CIRC)) + { + /* Initialize type of RxEvent that correspond to RxEvent callback execution; + In this case, Rx Event type is Idle Event */ + huart->RxEventType = HAL_UART_RXEVENT_IDLE; + +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + /*Call registered Rx Event callback*/ + huart->RxEventCallback(huart, huart->RxXferSize); +#else + /*Call legacy weak Rx Event callback*/ + HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize); +#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ + } + } + } return; } else @@ -3213,6 +3236,13 @@ void UART_AdvFeatureConfig(UART_HandleTypeDef *huart) /* Check whether the set of advanced features to configure is properly set */ assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit)); + /* if required, configure RX/TX pins swap */ + if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT)) + { + assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap)); + MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap); + } + /* if required, configure TX pin active level inversion */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT)) { @@ -3234,13 +3264,6 @@ void UART_AdvFeatureConfig(UART_HandleTypeDef *huart) MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert); } - /* if required, configure RX/TX pins swap */ - if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT)) - { - assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap)); - MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap); - } - /* if required, configure RX overrun detection disabling */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT)) { @@ -3366,24 +3389,24 @@ HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_ return HAL_TIMEOUT; } - if (READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U) + if ((READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U) && (Flag != UART_FLAG_TXE) && (Flag != UART_FLAG_TC)) { if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) == SET) { - /* Clear Overrun Error flag*/ - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF); + /* Clear Overrun Error flag*/ + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF); - /* Blocking error : transfer is aborted - Set the UART state ready to be able to start again the process, - Disable Rx Interrupts if ongoing */ - UART_EndRxTransfer(huart); + /* Blocking error : transfer is aborted + Set the UART state ready to be able to start again the process, + Disable Rx Interrupts if ongoing */ + UART_EndRxTransfer(huart); - huart->ErrorCode = HAL_UART_ERROR_ORE; + huart->ErrorCode = HAL_UART_ERROR_ORE; - /* Process Unlocked */ - __HAL_UNLOCK(huart); + /* Process Unlocked */ + __HAL_UNLOCK(huart); - return HAL_ERROR; + return HAL_ERROR; } if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RTOF) == SET) { @@ -3653,12 +3676,24 @@ static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma) If Reception till IDLE event has been selected : use Rx Event callback */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) { + huart->RxXferCount = 0; + + /* Check current nb of data still to be received on DMA side. + DMA Normal mode, remaining nb of data will be 0 + DMA Circular mode, remaining nb of data is reset to RxXferSize */ + uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(hdma); + if (nb_remaining_rx_data < huart->RxXferSize) + { + /* Update nb of remaining data */ + huart->RxXferCount = nb_remaining_rx_data; + } + #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx Event callback*/ - huart->RxEventCallback(huart, huart->RxXferSize); + huart->RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); #else /*Call legacy weak Rx Event callback*/ - HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize); + HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } else @@ -3691,12 +3726,22 @@ static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma) If Reception till IDLE event has been selected : use Rx Event callback */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) { + huart->RxXferCount = huart->RxXferSize / 2U; + + /* Check current nb of data still to be received on DMA side. */ + uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(hdma); + if (nb_remaining_rx_data <= huart->RxXferSize) + { + /* Update nb of remaining data */ + huart->RxXferCount = nb_remaining_rx_data; + } + #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx Event callback*/ - huart->RxEventCallback(huart, huart->RxXferSize / 2U); + huart->RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); #else /*Call legacy weak Rx Event callback*/ - HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize / 2U); + HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } else @@ -3761,7 +3806,6 @@ static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma) { UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); huart->RxXferCount = 0U; - huart->TxXferCount = 0U; #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.c b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.c index ea4595369a..2727c83151 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.c +++ b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.c @@ -24,7 +24,7 @@ ============================================================================== ##### UART peripheral extended features ##### ============================================================================== - + [..] (#) Declare a UART_HandleTypeDef handle structure. (#) For the UART RS485 Driver Enable mode, initialize the UART registers @@ -193,15 +193,17 @@ HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, /* Disable the Peripheral */ __HAL_UART_DISABLE(huart); - /* Set the UART Communication parameters */ - if (UART_SetConfig(huart) == HAL_ERROR) + /* Perform advanced settings configuration */ + /* For some items, configuration requires to be done prior TE and RE bits are set */ + if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) { - return HAL_ERROR; + UART_AdvFeatureConfig(huart); } - if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) + /* Set the UART Communication parameters */ + if (UART_SetConfig(huart) == HAL_ERROR) { - UART_AdvFeatureConfig(huart); + return HAL_ERROR; } /* Enable the Driver Enable mode by setting the DEM bit in the CR3 register */ @@ -233,11 +235,10 @@ HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, =============================================================================== ##### IO operation functions ##### =============================================================================== + [..] This subsection provides a set of Wakeup and FIFO mode related callback functions. - (#) Wakeup from Stop mode Callback: - (+) HAL_UARTEx_WakeupCallback() - + (++) HAL_UARTEx_WakeupCallback() @endverbatim * @{ */ @@ -286,19 +287,19 @@ __weak void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart) (#) Compared to standard reception services which only consider number of received data elements as reception completion criteria, these functions also consider additional events as triggers for updating reception status to caller : - (+) Detection of inactivity period (RX line has not been active for a given period). - (++) RX inactivity detected by IDLE event, i.e. RX line has been in idle state (normally high state) + (++) Detection of inactivity period (RX line has not been active for a given period). + (+++) RX inactivity detected by IDLE event, i.e. RX line has been in idle state (normally high state) for 1 frame time, after last received byte. - (++) RX inactivity detected by RTO, i.e. line has been in idle state + (+++) RX inactivity detected by RTO, i.e. line has been in idle state for a programmable time, after last received byte. - (+) Detection that a specific character has been received. + (++) Detection that a specific character has been received. - (#) There are two mode of transfer: - (+) Blocking mode: The reception is performed in polling mode, until either expected number of data is received, + (#) There are two modes of transfer: + (++) Blocking mode: The reception is performed in polling mode, until either expected number of data is received, or till IDLE event occurs. Reception is handled only during function execution. When function exits, no data reception could occur. HAL status and number of actually received data elements, are returned by function after finishing transfer. - (+) Non-Blocking mode: The reception is performed using Interrupts or DMA. + (++) Non-Blocking mode: The reception is performed using Interrupts or DMA. These API's return the HAL status. The end of the data processing will be indicated through the dedicated UART IRQ when using Interrupt mode or the DMA IRQ when using DMA mode. @@ -306,13 +307,13 @@ __weak void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart) The HAL_UART_ErrorCallback()user callback will be executed when a reception error is detected. (#) Blocking mode API: - (+) HAL_UARTEx_ReceiveToIdle() + (++) HAL_UARTEx_ReceiveToIdle() (#) Non-Blocking mode API with Interrupt: - (+) HAL_UARTEx_ReceiveToIdle_IT() + (++) HAL_UARTEx_ReceiveToIdle_IT() (#) Non-Blocking mode API with DMA: - (+) HAL_UARTEx_ReceiveToIdle_DMA() + (++) HAL_UARTEx_ReceiveToIdle_DMA() @endverbatim * @{ @@ -662,7 +663,7 @@ HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *p */ HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) { - HAL_StatusTypeDef status; + HAL_StatusTypeDef status = HAL_OK; /* Check that a Rx process is not already ongoing */ if (huart->RxState == HAL_UART_STATE_READY) @@ -687,24 +688,20 @@ HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE; huart->RxEventType = HAL_UART_RXEVENT_TC; - status = UART_Start_Receive_IT(huart, pData, Size); + (void)UART_Start_Receive_IT(huart, pData, Size); - /* Check Rx process has been successfully started */ - if (status == HAL_OK) + if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) { - if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - { - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF); - ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - } - else - { - /* In case of errors already pending when reception is started, - Interrupts may have already been raised and lead to reception abortion. - (Overrun error for instance). - In such case Reception Type has been reset to HAL_UART_RECEPTION_STANDARD. */ - status = HAL_ERROR; - } + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF); + ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); + } + else + { + /* In case of errors already pending when reception is started, + Interrupts may have already been raised and lead to reception abortion. + (Overrun error for instance). + In such case Reception Type has been reset to HAL_UART_RECEPTION_STANDARD. */ + status = HAL_ERROR; } return status; @@ -800,23 +797,21 @@ HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_ * Half Transfer, or Transfer Complete), this function allows to retrieve the Rx Event type that has lead * to Rx Event callback execution. * @note This function is expected to be called within the user implementation of Rx Event Callback, - * in order to provide the accurate value : - * In Interrupt Mode : - * - HAL_UART_RXEVENT_TC : when Reception has been completed (expected nb of data has been received) - * - HAL_UART_RXEVENT_IDLE : when Idle event occurred prior reception has been completed (nb of - * received data is lower than expected one) - * In DMA Mode : - * - HAL_UART_RXEVENT_TC : when Reception has been completed (expected nb of data has been received) - * - HAL_UART_RXEVENT_HT : when half of expected nb of data has been received - * - HAL_UART_RXEVENT_IDLE : when Idle event occurred prior reception has been completed (nb of - * received data is lower than expected one). - * In DMA mode, RxEvent callback could be called several times; + * in order to provide the accurate value. + * @note In Interrupt Mode: + * - HAL_UART_RXEVENT_TC : when Reception has been completed (expected nb of data has been received). + * - HAL_UART_RXEVENT_IDLE : when Idle event occurred prior reception has been completed. + * @note In DMA Mode: + * - HAL_UART_RXEVENT_TC : when Reception has been completed (expected nb of data has been received). + * - HAL_UART_RXEVENT_HT : when half of expected nb of data has been received. + * - HAL_UART_RXEVENT_IDLE : when Idle event occurred prior reception has been completed. + * @note In DMA mode, RxEvent callback could be called several times; * When DMA is configured in Normal Mode, HT event does not stop Reception process; * When DMA is configured in Circular Mode, HT, TC or IDLE events don't stop Reception process; * @param huart UART handle. * @retval Rx Event Type (return vale will be a value of @ref UART_RxEvent_Type_Values) */ -HAL_UART_RxEventTypeTypeDef HAL_UARTEx_GetRxEventType(UART_HandleTypeDef *huart) +HAL_UART_RxEventTypeTypeDef HAL_UARTEx_GetRxEventType(const UART_HandleTypeDef *huart) { /* Return Rx Event type value, as stored in UART handle */ return (huart->RxEventType); diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_usart.c b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_usart.c index 29c79722dd..00a76438b8 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_usart.c +++ b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_usart.c @@ -89,7 +89,7 @@ [..] Use function HAL_USART_UnRegisterCallback() to reset a callback to the default - weak (surcharged) function. + weak function. HAL_USART_UnRegisterCallback() takes as parameters the HAL peripheral handle, and the Callback ID. This function allows to reset following callbacks: @@ -105,10 +105,10 @@ [..] By default, after the HAL_USART_Init() and when the state is HAL_USART_STATE_RESET - all callbacks are set to the corresponding weak (surcharged) functions: + all callbacks are set to the corresponding weak functions: examples HAL_USART_TxCpltCallback(), HAL_USART_RxHalfCpltCallback(). Exception done for MspInit and MspDeInit functions that are respectively - reset to the legacy weak (surcharged) functions in the HAL_USART_Init() + reset to the legacy weak functions in the HAL_USART_Init() and HAL_USART_DeInit() only when these callbacks are null (not registered beforehand). If not, MspInit or MspDeInit are not null, the HAL_USART_Init() and HAL_USART_DeInit() keep and use the user MspInit/MspDeInit callbacks (registered beforehand). @@ -125,7 +125,7 @@ [..] When The compilation define USE_HAL_USART_REGISTER_CALLBACKS is set to 0 or not defined, the callback registration feature is not available - and weak (surcharged) callbacks are used. + and weak callbacks are used. @endverbatim @@ -140,7 +140,7 @@ */ /** @defgroup USART USART - * @brief HAL USART Synchronous module driver + * @brief HAL USART Synchronous SPI module driver * @{ */ @@ -212,8 +212,8 @@ static void USART_RxISR_16BIT(USART_HandleTypeDef *husart); =============================================================================== [..] This subsection provides a set of functions allowing to initialize the USART - in asynchronous and in synchronous modes. - (+) For the asynchronous mode only these parameters can be configured: + in synchronous SPI master mode. + (+) For the synchronous SPI mode only these parameters can be configured: (++) Baud Rate (++) Word Length (++) Stop Bit @@ -225,7 +225,7 @@ static void USART_RxISR_16BIT(USART_HandleTypeDef *husart); (++) Receiver/transmitter modes [..] - The HAL_USART_Init() function follows the USART synchronous configuration + The HAL_USART_Init() function follows the USART synchronous SPI configuration procedure (details for the procedure are available in reference manual). @endverbatim @@ -303,7 +303,7 @@ HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart) return HAL_ERROR; } - /* In Synchronous mode, the following bits must be kept cleared: + /* In Synchronous SPI mode, the following bits must be kept cleared: - LINEN bit in the USART_CR2 register - HDSEL, SCEN and IREN bits in the USART_CR3 register. */ @@ -393,7 +393,7 @@ __weak void HAL_USART_MspDeInit(USART_HandleTypeDef *husart) #if (USE_HAL_USART_REGISTER_CALLBACKS == 1) /** * @brief Register a User USART Callback - * To be used instead of the weak predefined callback + * To be used to override the weak predefined callback * @note The HAL_USART_RegisterCallback() may be called before HAL_USART_Init() in HAL_USART_STATE_RESET * to register callbacks for HAL_USART_MSPINIT_CB_ID and HAL_USART_MSPDEINIT_CB_ID * @param husart usart handle @@ -626,10 +626,10 @@ HAL_StatusTypeDef HAL_USART_UnRegisterCallback(USART_HandleTypeDef *husart, HAL_ =============================================================================== ##### IO operation functions ##### =============================================================================== - [..] This subsection provides a set of functions allowing to manage the USART synchronous + [..] This subsection provides a set of functions allowing to manage the USART synchronous SPI data transfers. - [..] The USART supports master mode only: it cannot receive or send data related to an input + [..] The USART Synchronous SPI supports master mode only: it cannot receive or send data related to an input clock (SCLK is always an output). [..] @@ -2863,7 +2863,7 @@ static HAL_StatusTypeDef USART_SetConfig(USART_HandleTypeDef *husart) /* Clear and configure the USART Clock, CPOL, CPHA, LBCL and STOP bits: * set CPOL bit according to husart->Init.CLKPolarity value * set CPHA bit according to husart->Init.CLKPhase value - * set LBCL bit according to husart->Init.CLKLastBit value (used in SPI master mode only) + * set LBCL bit according to husart->Init.CLKLastBit value (used in USART Synchronous SPI master mode only) * set STOP[13:12] bits according to husart->Init.StopBits value */ tmpreg = (uint32_t)(USART_CLOCK_ENABLE); tmpreg |= (uint32_t)husart->Init.CLKLastBit; diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_crc.c b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_crc.c index cb76ed4c0a..8a97989e76 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_crc.c +++ b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_crc.c @@ -59,7 +59,7 @@ * - SUCCESS: CRC registers are de-initialized * - ERROR: CRC registers are not de-initialized */ -ErrorStatus LL_CRC_DeInit(CRC_TypeDef *CRCx) +ErrorStatus LL_CRC_DeInit(const CRC_TypeDef *CRCx) { ErrorStatus status = SUCCESS; diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rng.c b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rng.c index e6189614ee..76deab9faa 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rng.c +++ b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rng.c @@ -59,7 +59,7 @@ * - SUCCESS: RNG registers are de-initialized * - ERROR: not applicable */ -ErrorStatus LL_RNG_DeInit(RNG_TypeDef *RNGx) +ErrorStatus LL_RNG_DeInit(const RNG_TypeDef *RNGx) { ErrorStatus status = SUCCESS; diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_spi.c b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_spi.c index 3058c0eddb..a8e01ed10a 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_spi.c +++ b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_spi.c @@ -119,7 +119,7 @@ * - SUCCESS: SPI registers are de-initialized * - ERROR: SPI registers are not de-initialized */ -ErrorStatus LL_SPI_DeInit(SPI_TypeDef *SPIx) +ErrorStatus LL_SPI_DeInit(const SPI_TypeDef *SPIx) { ErrorStatus status = ERROR; @@ -156,8 +156,9 @@ ErrorStatus LL_SPI_DeInit(SPI_TypeDef *SPIx) /** * @brief Initialize the SPI registers according to the specified parameters in SPI_InitStruct. - * @note As some bits in SPI configuration registers can only be written when the SPI is disabled (SPI_CR1_SPE bit =0), - * SPI peripheral should be in disabled state prior calling this function. Otherwise, ERROR result will be returned. + * @note As some bits in SPI configuration registers can only be written when the + * SPI is disabled (SPI_CR1_SPE bit = 0), SPI peripheral should be in disabled state prior + * calling this function. Otherwise, ERROR result will be returned. * @param SPIx SPI Instance * @param SPI_InitStruct pointer to a @ref LL_SPI_InitTypeDef structure * @retval An ErrorStatus enumeration value. (Return always SUCCESS) @@ -336,7 +337,7 @@ void LL_SPI_StructInit(LL_SPI_InitTypeDef *SPI_InitStruct) * - SUCCESS: SPI registers are de-initialized * - ERROR: SPI registers are not de-initialized */ -ErrorStatus LL_I2S_DeInit(SPI_TypeDef *SPIx) +ErrorStatus LL_I2S_DeInit(const SPI_TypeDef *SPIx) { return LL_SPI_DeInit(SPIx); } diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c index 68a8095815..8dcb436291 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c +++ b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c @@ -700,7 +700,6 @@ static ErrorStatus OC4Config(TIM_TypeDef *TIMx, const LL_TIM_OC_InitTypeDef *TIM return SUCCESS; } - /** * @brief Configure the TIMx input channel 1. * @param TIMx Timer Instance @@ -825,7 +824,7 @@ static ErrorStatus IC4Config(TIM_TypeDef *TIMx, const LL_TIM_IC_InitTypeDef *TIM (TIM_CCMR2_CC4S | TIM_CCMR2_IC4F | TIM_CCMR2_IC4PSC), (TIM_ICInitStruct->ICActiveInput | TIM_ICInitStruct->ICFilter | TIM_ICInitStruct->ICPrescaler) >> 8U); - /* Select the Polarity and set the CC2E Bit */ + /* Select the Polarity and set the CC4E Bit */ MODIFY_REG(TIMx->CCER, (TIM_CCER_CC4P | TIM_CCER_CC4NP), ((TIM_ICInitStruct->ICPolarity << 12U) | TIM_CCER_CC4E)); diff --git a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usb.c b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usb.c index 7c715f9fd2..4e1c863f36 100644 --- a/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usb.c +++ b/system/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usb.c @@ -172,6 +172,47 @@ HAL_StatusTypeDef USB_DevInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg) return HAL_OK; } +/** + * @brief USB_FlushTxFifo : Flush a Tx FIFO + * @param USBx : Selected device + * @param num : FIFO number + * This parameter can be a value from 1 to 15 + 15 means Flush all Tx FIFOs + * @retval HAL status + */ +HAL_StatusTypeDef USB_FlushTxFifo(USB_TypeDef const *USBx, uint32_t num) +{ + /* Prevent unused argument(s) compilation warning */ + UNUSED(USBx); + UNUSED(num); + + /* NOTE : - This function is not required by USB Device FS peripheral, it is used + only by USB OTG FS peripheral. + - This function is added to ensure compatibility across platforms. + */ + + return HAL_OK; +} + +/** + * @brief USB_FlushRxFifo : Flush Rx FIFO + * @param USBx : Selected device + * @retval HAL status + */ +HAL_StatusTypeDef USB_FlushRxFifo(USB_TypeDef const *USBx) +{ + /* Prevent unused argument(s) compilation warning */ + UNUSED(USBx); + + /* NOTE : - This function is not required by USB Device FS peripheral, it is used + only by USB OTG FS peripheral. + - This function is added to ensure compatibility across platforms. + */ + + return HAL_OK; +} + + #if defined (HAL_PCD_MODULE_ENABLED) /** * @brief Activate and configure an endpoint @@ -278,6 +319,10 @@ HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep) PCD_CLEAR_RX_DTOG(USBx, ep->num); PCD_CLEAR_TX_DTOG(USBx, ep->num); + /* Set endpoint RX count */ + PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, ep->maxpacket); + + /* Set endpoint RX to valid state */ PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID); PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); } @@ -382,7 +427,7 @@ HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep) /* IN endpoint */ if (ep->is_in == 1U) { - /*Multi packet transfer*/ + /* Multi packet transfer */ if (ep->xfer_len > ep->maxpacket) { len = ep->maxpacket; @@ -484,9 +529,9 @@ HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep) USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); } } - else /* manage isochronous double buffer IN mode */ + else /* Manage isochronous double buffer IN mode */ { - /* each Time to write in PMA xfer_len_db will */ + /* Each Time to write in PMA xfer_len_db will */ ep->xfer_len_db -= len; /* Fill the data buffer */ @@ -518,19 +563,25 @@ HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep) { if (ep->doublebuffer == 0U) { + if ((ep->xfer_len == 0U) && (ep->type == EP_TYPE_CTRL)) + { + /* This is a status out stage set the OUT_STATUS */ + PCD_SET_OUT_STATUS(USBx, ep->num); + } + else + { + PCD_CLEAR_OUT_STATUS(USBx, ep->num); + } + /* Multi packet transfer */ if (ep->xfer_len > ep->maxpacket) { - len = ep->maxpacket; - ep->xfer_len -= len; + ep->xfer_len -= ep->maxpacket; } else { - len = ep->xfer_len; ep->xfer_len = 0U; } - /* configure and validate Rx endpoint */ - PCD_SET_EP_RX_CNT(USBx, ep->num, len); } #if (USE_USB_DOUBLE_BUFFER == 1U) else @@ -539,15 +590,13 @@ HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep) /* Set the Double buffer counter */ if (ep->type == EP_TYPE_BULK) { - PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, ep->maxpacket); - /* Coming from ISR */ if (ep->xfer_count != 0U) { - /* update last value to check if there is blocking state */ + /* Update last value to check if there is blocking state */ wEPVal = PCD_GET_ENDPOINT(USBx, ep->num); - /*Blocking State */ + /* Blocking State */ if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) || (((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U))) { @@ -558,18 +607,8 @@ HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep) /* iso out double */ else if (ep->type == EP_TYPE_ISOC) { - /* Multi packet transfer */ - if (ep->xfer_len > ep->maxpacket) - { - len = ep->maxpacket; - ep->xfer_len -= len; - } - else - { - len = ep->xfer_len; - ep->xfer_len = 0U; - } - PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, len); + /* Only single packet transfer supported in FS */ + ep->xfer_len = 0U; } else { @@ -613,26 +652,23 @@ HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx, USB_EPTypeDef *ep) */ HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep) { - if (ep->doublebuffer == 0U) + if (ep->is_in != 0U) { - if (ep->is_in != 0U) - { - PCD_CLEAR_TX_DTOG(USBx, ep->num); + PCD_CLEAR_TX_DTOG(USBx, ep->num); - if (ep->type != EP_TYPE_ISOC) - { - /* Configure NAK status for the Endpoint */ - PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK); - } - } - else + if (ep->type != EP_TYPE_ISOC) { - PCD_CLEAR_RX_DTOG(USBx, ep->num); - - /* Configure VALID status for the Endpoint */ - PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID); + /* Configure NAK status for the Endpoint */ + PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK); } } + else + { + PCD_CLEAR_RX_DTOG(USBx, ep->num); + + /* Configure VALID status for the Endpoint */ + PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID); + } return HAL_OK; } @@ -751,7 +787,7 @@ HAL_StatusTypeDef USB_DevDisconnect(USB_TypeDef *USBx) * @param USBx Selected device * @retval USB Global Interrupt status */ -uint32_t USB_ReadInterrupts(USB_TypeDef *USBx) +uint32_t USB_ReadInterrupts(USB_TypeDef const *USBx) { uint32_t tmpreg; @@ -791,7 +827,7 @@ HAL_StatusTypeDef USB_DeActivateRemoteWakeup(USB_TypeDef *USBx) * @param wNBytes no. of bytes to be copied. * @retval None */ -void USB_WritePMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes) +void USB_WritePMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes) { uint32_t n = ((uint32_t)wNBytes + 1U) >> 1; uint32_t BaseAddr = (uint32_t)USBx; @@ -826,7 +862,7 @@ void USB_WritePMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, ui * @param wNBytes no. of bytes to be copied. * @retval None */ -void USB_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes) +void USB_ReadPMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes) { uint32_t n = (uint32_t)wNBytes >> 1; uint32_t BaseAddr = (uint32_t)USBx; diff --git a/system/Drivers/STM32YYxx_HAL_Driver_version.md b/system/Drivers/STM32YYxx_HAL_Driver_version.md index 385bc6504c..1159a67d87 100644 --- a/system/Drivers/STM32YYxx_HAL_Driver_version.md +++ b/system/Drivers/STM32YYxx_HAL_Driver_version.md @@ -11,7 +11,7 @@ * STM32G4: 1.2.5 * STM32H5: 1.5.0 * STM32H7: 1.11.5 - * STM32L0: 1.10.6 + * STM32L0: 1.10.7 * STM32L1: 1.4.6 * STM32L4: 1.13.5 * STM32L5: 1.0.6 From e8424943d1479e1b5e2921530e590f84e704fbfc Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Tue, 25 Mar 2025 10:33:40 +0100 Subject: [PATCH 06/44] system(l0): update STM32L0xx CMSIS Drivers to v1.9.4 Included in STM32CubeL0 FW v1.12.3 Signed-off-by: Frederic Pillon --- .../Device/ST/STM32L0xx/Include/stm32l010x4.h | 242 ++++++++++++------ .../Device/ST/STM32L0xx/Include/stm32l010x6.h | 242 ++++++++++++------ .../Device/ST/STM32L0xx/Include/stm32l010x8.h | 242 ++++++++++++------ .../Device/ST/STM32L0xx/Include/stm32l010xb.h | 242 ++++++++++++------ .../Device/ST/STM32L0xx/Include/stm32l011xx.h | 242 ++++++++++++------ .../Device/ST/STM32L0xx/Include/stm32l021xx.h | 242 ++++++++++++------ .../Device/ST/STM32L0xx/Include/stm32l031xx.h | 242 ++++++++++++------ .../Device/ST/STM32L0xx/Include/stm32l041xx.h | 242 ++++++++++++------ .../Device/ST/STM32L0xx/Include/stm32l051xx.h | 242 ++++++++++++------ .../Device/ST/STM32L0xx/Include/stm32l052xx.h | 242 ++++++++++++------ .../Device/ST/STM32L0xx/Include/stm32l053xx.h | 242 ++++++++++++------ .../Device/ST/STM32L0xx/Include/stm32l062xx.h | 242 ++++++++++++------ .../Device/ST/STM32L0xx/Include/stm32l063xx.h | 242 ++++++++++++------ .../Device/ST/STM32L0xx/Include/stm32l071xx.h | 242 ++++++++++++------ .../Device/ST/STM32L0xx/Include/stm32l072xx.h | 242 ++++++++++++------ .../Device/ST/STM32L0xx/Include/stm32l073xx.h | 242 ++++++++++++------ .../Device/ST/STM32L0xx/Include/stm32l081xx.h | 242 ++++++++++++------ .../Device/ST/STM32L0xx/Include/stm32l082xx.h | 242 ++++++++++++------ .../Device/ST/STM32L0xx/Include/stm32l083xx.h | 242 ++++++++++++------ .../Device/ST/STM32L0xx/Include/stm32l0xx.h | 2 +- .../ST/STM32L0xx/{License.md => LICENSE.md} | 0 .../CMSIS/Device/ST/STM32L0xx/README.md | 25 +- .../Device/ST/STM32L0xx/Release_Notes.html | 93 ++++--- .../Source/Templates/system_stm32l0xx.c | 8 +- .../Device/ST/STM32YYxx_CMSIS_version.md | 2 +- 25 files changed, 3149 insertions(+), 1579 deletions(-) rename system/Drivers/CMSIS/Device/ST/STM32L0xx/{License.md => LICENSE.md} (100%) diff --git a/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l010x4.h b/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l010x4.h index 6349b7fd20..6d12941c0d 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l010x4.h +++ b/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l010x4.h @@ -2010,86 +2010,168 @@ typedef struct #define GPIO_OTYPER_OT_15 (0x00008000U) /**************** Bit definition for GPIO_OSPEEDR register ******************/ -#define GPIO_OSPEEDER_OSPEED0_Pos (0U) -#define GPIO_OSPEEDER_OSPEED0_Msk (0x3UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000003 */ -#define GPIO_OSPEEDER_OSPEED0 GPIO_OSPEEDER_OSPEED0_Msk -#define GPIO_OSPEEDER_OSPEED0_0 (0x1UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000001 */ -#define GPIO_OSPEEDER_OSPEED0_1 (0x2UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000002 */ -#define GPIO_OSPEEDER_OSPEED1_Pos (2U) -#define GPIO_OSPEEDER_OSPEED1_Msk (0x3UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x0000000C */ -#define GPIO_OSPEEDER_OSPEED1 GPIO_OSPEEDER_OSPEED1_Msk -#define GPIO_OSPEEDER_OSPEED1_0 (0x1UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x00000004 */ -#define GPIO_OSPEEDER_OSPEED1_1 (0x2UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x00000008 */ -#define GPIO_OSPEEDER_OSPEED2_Pos (4U) -#define GPIO_OSPEEDER_OSPEED2_Msk (0x3UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000030 */ -#define GPIO_OSPEEDER_OSPEED2 GPIO_OSPEEDER_OSPEED2_Msk -#define GPIO_OSPEEDER_OSPEED2_0 (0x1UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000010 */ -#define GPIO_OSPEEDER_OSPEED2_1 (0x2UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000020 */ -#define GPIO_OSPEEDER_OSPEED3_Pos (6U) -#define GPIO_OSPEEDER_OSPEED3_Msk (0x3UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x000000C0 */ -#define GPIO_OSPEEDER_OSPEED3 GPIO_OSPEEDER_OSPEED3_Msk -#define GPIO_OSPEEDER_OSPEED3_0 (0x1UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x00000040 */ -#define GPIO_OSPEEDER_OSPEED3_1 (0x2UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x00000080 */ -#define GPIO_OSPEEDER_OSPEED4_Pos (8U) -#define GPIO_OSPEEDER_OSPEED4_Msk (0x3UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000300 */ -#define GPIO_OSPEEDER_OSPEED4 GPIO_OSPEEDER_OSPEED4_Msk -#define GPIO_OSPEEDER_OSPEED4_0 (0x1UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000100 */ -#define GPIO_OSPEEDER_OSPEED4_1 (0x2UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000200 */ -#define GPIO_OSPEEDER_OSPEED5_Pos (10U) -#define GPIO_OSPEEDER_OSPEED5_Msk (0x3UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000C00 */ -#define GPIO_OSPEEDER_OSPEED5 GPIO_OSPEEDER_OSPEED5_Msk -#define GPIO_OSPEEDER_OSPEED5_0 (0x1UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000400 */ -#define GPIO_OSPEEDER_OSPEED5_1 (0x2UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000800 */ -#define GPIO_OSPEEDER_OSPEED6_Pos (12U) -#define GPIO_OSPEEDER_OSPEED6_Msk (0x3UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00003000 */ -#define GPIO_OSPEEDER_OSPEED6 GPIO_OSPEEDER_OSPEED6_Msk -#define GPIO_OSPEEDER_OSPEED6_0 (0x1UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00001000 */ -#define GPIO_OSPEEDER_OSPEED6_1 (0x2UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00002000 */ -#define GPIO_OSPEEDER_OSPEED7_Pos (14U) -#define GPIO_OSPEEDER_OSPEED7_Msk (0x3UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x0000C000 */ -#define GPIO_OSPEEDER_OSPEED7 GPIO_OSPEEDER_OSPEED7_Msk -#define GPIO_OSPEEDER_OSPEED7_0 (0x1UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x00004000 */ -#define GPIO_OSPEEDER_OSPEED7_1 (0x2UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x00008000 */ -#define GPIO_OSPEEDER_OSPEED8_Pos (16U) -#define GPIO_OSPEEDER_OSPEED8_Msk (0x3UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00030000 */ -#define GPIO_OSPEEDER_OSPEED8 GPIO_OSPEEDER_OSPEED8_Msk -#define GPIO_OSPEEDER_OSPEED8_0 (0x1UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00010000 */ -#define GPIO_OSPEEDER_OSPEED8_1 (0x2UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00020000 */ -#define GPIO_OSPEEDER_OSPEED9_Pos (18U) -#define GPIO_OSPEEDER_OSPEED9_Msk (0x3UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x000C0000 */ -#define GPIO_OSPEEDER_OSPEED9 GPIO_OSPEEDER_OSPEED9_Msk -#define GPIO_OSPEEDER_OSPEED9_0 (0x1UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x00040000 */ -#define GPIO_OSPEEDER_OSPEED9_1 (0x2UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x00080000 */ -#define GPIO_OSPEEDER_OSPEED10_Pos (20U) -#define GPIO_OSPEEDER_OSPEED10_Msk (0x3UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00300000 */ -#define GPIO_OSPEEDER_OSPEED10 GPIO_OSPEEDER_OSPEED10_Msk -#define GPIO_OSPEEDER_OSPEED10_0 (0x1UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00100000 */ -#define GPIO_OSPEEDER_OSPEED10_1 (0x2UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00200000 */ -#define GPIO_OSPEEDER_OSPEED11_Pos (22U) -#define GPIO_OSPEEDER_OSPEED11_Msk (0x3UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00C00000 */ -#define GPIO_OSPEEDER_OSPEED11 GPIO_OSPEEDER_OSPEED11_Msk -#define GPIO_OSPEEDER_OSPEED11_0 (0x1UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00400000 */ -#define GPIO_OSPEEDER_OSPEED11_1 (0x2UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00800000 */ -#define GPIO_OSPEEDER_OSPEED12_Pos (24U) -#define GPIO_OSPEEDER_OSPEED12_Msk (0x3UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x03000000 */ -#define GPIO_OSPEEDER_OSPEED12 GPIO_OSPEEDER_OSPEED12_Msk -#define GPIO_OSPEEDER_OSPEED12_0 (0x1UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x01000000 */ -#define GPIO_OSPEEDER_OSPEED12_1 (0x2UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x02000000 */ -#define GPIO_OSPEEDER_OSPEED13_Pos (26U) -#define GPIO_OSPEEDER_OSPEED13_Msk (0x3UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x0C000000 */ -#define GPIO_OSPEEDER_OSPEED13 GPIO_OSPEEDER_OSPEED13_Msk -#define GPIO_OSPEEDER_OSPEED13_0 (0x1UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x04000000 */ -#define GPIO_OSPEEDER_OSPEED13_1 (0x2UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x08000000 */ -#define GPIO_OSPEEDER_OSPEED14_Pos (28U) -#define GPIO_OSPEEDER_OSPEED14_Msk (0x3UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x30000000 */ -#define GPIO_OSPEEDER_OSPEED14 GPIO_OSPEEDER_OSPEED14_Msk -#define GPIO_OSPEEDER_OSPEED14_0 (0x1UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x10000000 */ -#define GPIO_OSPEEDER_OSPEED14_1 (0x2UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x20000000 */ -#define GPIO_OSPEEDER_OSPEED15_Pos (30U) -#define GPIO_OSPEEDER_OSPEED15_Msk (0x3UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0xC0000000 */ -#define GPIO_OSPEEDER_OSPEED15 GPIO_OSPEEDER_OSPEED15_Msk -#define GPIO_OSPEEDER_OSPEED15_0 (0x1UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0x40000000 */ -#define GPIO_OSPEEDER_OSPEED15_1 (0x2UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0x80000000 */ +#define GPIO_OSPEEDR_OSPEED0_Pos (0U) +#define GPIO_OSPEEDR_OSPEED0_Msk (0x3UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000003 */ +#define GPIO_OSPEEDR_OSPEED0 GPIO_OSPEEDR_OSPEED0_Msk +#define GPIO_OSPEEDR_OSPEED0_0 (0x1UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000001 */ +#define GPIO_OSPEEDR_OSPEED0_1 (0x2UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000002 */ +#define GPIO_OSPEEDR_OSPEED1_Pos (2U) +#define GPIO_OSPEEDR_OSPEED1_Msk (0x3UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x0000000C */ +#define GPIO_OSPEEDR_OSPEED1 GPIO_OSPEEDR_OSPEED1_Msk +#define GPIO_OSPEEDR_OSPEED1_0 (0x1UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x00000004 */ +#define GPIO_OSPEEDR_OSPEED1_1 (0x2UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x00000008 */ +#define GPIO_OSPEEDR_OSPEED2_Pos (4U) +#define GPIO_OSPEEDR_OSPEED2_Msk (0x3UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000030 */ +#define GPIO_OSPEEDR_OSPEED2 GPIO_OSPEEDR_OSPEED2_Msk +#define GPIO_OSPEEDR_OSPEED2_0 (0x1UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000010 */ +#define GPIO_OSPEEDR_OSPEED2_1 (0x2UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000020 */ +#define GPIO_OSPEEDR_OSPEED3_Pos (6U) +#define GPIO_OSPEEDR_OSPEED3_Msk (0x3UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x000000C0 */ +#define GPIO_OSPEEDR_OSPEED3 GPIO_OSPEEDR_OSPEED3_Msk +#define GPIO_OSPEEDR_OSPEED3_0 (0x1UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x00000040 */ +#define GPIO_OSPEEDR_OSPEED3_1 (0x2UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x00000080 */ +#define GPIO_OSPEEDR_OSPEED4_Pos (8U) +#define GPIO_OSPEEDR_OSPEED4_Msk (0x3UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000300 */ +#define GPIO_OSPEEDR_OSPEED4 GPIO_OSPEEDR_OSPEED4_Msk +#define GPIO_OSPEEDR_OSPEED4_0 (0x1UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000100 */ +#define GPIO_OSPEEDR_OSPEED4_1 (0x2UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000200 */ +#define GPIO_OSPEEDR_OSPEED5_Pos (10U) +#define GPIO_OSPEEDR_OSPEED5_Msk (0x3UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000C00 */ +#define GPIO_OSPEEDR_OSPEED5 GPIO_OSPEEDR_OSPEED5_Msk +#define GPIO_OSPEEDR_OSPEED5_0 (0x1UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000400 */ +#define GPIO_OSPEEDR_OSPEED5_1 (0x2UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000800 */ +#define GPIO_OSPEEDR_OSPEED6_Pos (12U) +#define GPIO_OSPEEDR_OSPEED6_Msk (0x3UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00003000 */ +#define GPIO_OSPEEDR_OSPEED6 GPIO_OSPEEDR_OSPEED6_Msk +#define GPIO_OSPEEDR_OSPEED6_0 (0x1UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00001000 */ +#define GPIO_OSPEEDR_OSPEED6_1 (0x2UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00002000 */ +#define GPIO_OSPEEDR_OSPEED7_Pos (14U) +#define GPIO_OSPEEDR_OSPEED7_Msk (0x3UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x0000C000 */ +#define GPIO_OSPEEDR_OSPEED7 GPIO_OSPEEDR_OSPEED7_Msk +#define GPIO_OSPEEDR_OSPEED7_0 (0x1UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x00004000 */ +#define GPIO_OSPEEDR_OSPEED7_1 (0x2UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x00008000 */ +#define GPIO_OSPEEDR_OSPEED8_Pos (16U) +#define GPIO_OSPEEDR_OSPEED8_Msk (0x3UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00030000 */ +#define GPIO_OSPEEDR_OSPEED8 GPIO_OSPEEDR_OSPEED8_Msk +#define GPIO_OSPEEDR_OSPEED8_0 (0x1UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00010000 */ +#define GPIO_OSPEEDR_OSPEED8_1 (0x2UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00020000 */ +#define GPIO_OSPEEDR_OSPEED9_Pos (18U) +#define GPIO_OSPEEDR_OSPEED9_Msk (0x3UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x000C0000 */ +#define GPIO_OSPEEDR_OSPEED9 GPIO_OSPEEDR_OSPEED9_Msk +#define GPIO_OSPEEDR_OSPEED9_0 (0x1UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x00040000 */ +#define GPIO_OSPEEDR_OSPEED9_1 (0x2UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x00080000 */ +#define GPIO_OSPEEDR_OSPEED10_Pos (20U) +#define GPIO_OSPEEDR_OSPEED10_Msk (0x3UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00300000 */ +#define GPIO_OSPEEDR_OSPEED10 GPIO_OSPEEDR_OSPEED10_Msk +#define GPIO_OSPEEDR_OSPEED10_0 (0x1UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00100000 */ +#define GPIO_OSPEEDR_OSPEED10_1 (0x2UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00200000 */ +#define GPIO_OSPEEDR_OSPEED11_Pos (22U) +#define GPIO_OSPEEDR_OSPEED11_Msk (0x3UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00C00000 */ +#define GPIO_OSPEEDR_OSPEED11 GPIO_OSPEEDR_OSPEED11_Msk +#define GPIO_OSPEEDR_OSPEED11_0 (0x1UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00400000 */ +#define GPIO_OSPEEDR_OSPEED11_1 (0x2UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00800000 */ +#define GPIO_OSPEEDR_OSPEED12_Pos (24U) +#define GPIO_OSPEEDR_OSPEED12_Msk (0x3UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x03000000 */ +#define GPIO_OSPEEDR_OSPEED12 GPIO_OSPEEDR_OSPEED12_Msk +#define GPIO_OSPEEDR_OSPEED12_0 (0x1UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x01000000 */ +#define GPIO_OSPEEDR_OSPEED12_1 (0x2UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x02000000 */ +#define GPIO_OSPEEDR_OSPEED13_Pos (26U) +#define GPIO_OSPEEDR_OSPEED13_Msk (0x3UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x0C000000 */ +#define GPIO_OSPEEDR_OSPEED13 GPIO_OSPEEDR_OSPEED13_Msk +#define GPIO_OSPEEDR_OSPEED13_0 (0x1UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x04000000 */ +#define GPIO_OSPEEDR_OSPEED13_1 (0x2UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x08000000 */ +#define GPIO_OSPEEDR_OSPEED14_Pos (28U) +#define GPIO_OSPEEDR_OSPEED14_Msk (0x3UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x30000000 */ +#define GPIO_OSPEEDR_OSPEED14 GPIO_OSPEEDR_OSPEED14_Msk +#define GPIO_OSPEEDR_OSPEED14_0 (0x1UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x10000000 */ +#define GPIO_OSPEEDR_OSPEED14_1 (0x2UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x20000000 */ +#define GPIO_OSPEEDR_OSPEED15_Pos (30U) +#define GPIO_OSPEEDR_OSPEED15_Msk (0x3UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0xC0000000 */ +#define GPIO_OSPEEDR_OSPEED15 GPIO_OSPEEDR_OSPEED15_Msk +#define GPIO_OSPEEDR_OSPEED15_0 (0x1UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0x40000000 */ +#define GPIO_OSPEEDR_OSPEED15_1 (0x2UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0x80000000 */ + +/* Legacy defines */ +#define GPIO_OSPEEDER_OSPEED0_Pos GPIO_OSPEEDR_OSPEED0_Pos +#define GPIO_OSPEEDER_OSPEED0_Msk GPIO_OSPEEDR_OSPEED0_Msk +#define GPIO_OSPEEDER_OSPEED0 GPIO_OSPEEDR_OSPEED0 +#define GPIO_OSPEEDER_OSPEED0_0 GPIO_OSPEEDR_OSPEED0_0 +#define GPIO_OSPEEDER_OSPEED0_1 GPIO_OSPEEDR_OSPEED0_1 +#define GPIO_OSPEEDER_OSPEED1_Pos GPIO_OSPEEDR_OSPEED1_Pos +#define GPIO_OSPEEDER_OSPEED1_Msk GPIO_OSPEEDR_OSPEED1_Msk +#define GPIO_OSPEEDER_OSPEED1 GPIO_OSPEEDR_OSPEED1 +#define GPIO_OSPEEDER_OSPEED1_0 GPIO_OSPEEDR_OSPEED1_0 +#define GPIO_OSPEEDER_OSPEED1_1 GPIO_OSPEEDR_OSPEED1_1 +#define GPIO_OSPEEDER_OSPEED2_Pos GPIO_OSPEEDR_OSPEED2_Pos +#define GPIO_OSPEEDER_OSPEED2_Msk GPIO_OSPEEDR_OSPEED2_Msk +#define GPIO_OSPEEDER_OSPEED2 GPIO_OSPEEDR_OSPEED2 +#define GPIO_OSPEEDER_OSPEED2_0 GPIO_OSPEEDR_OSPEED2_0 +#define GPIO_OSPEEDER_OSPEED2_1 GPIO_OSPEEDR_OSPEED2_1 +#define GPIO_OSPEEDER_OSPEED3_Pos GPIO_OSPEEDR_OSPEED3_Pos +#define GPIO_OSPEEDER_OSPEED3_Msk GPIO_OSPEEDR_OSPEED3_Msk +#define GPIO_OSPEEDER_OSPEED3 GPIO_OSPEEDR_OSPEED3 +#define GPIO_OSPEEDER_OSPEED3_0 GPIO_OSPEEDR_OSPEED3_0 +#define GPIO_OSPEEDER_OSPEED3_1 GPIO_OSPEEDR_OSPEED3_1 +#define GPIO_OSPEEDER_OSPEED4_Pos GPIO_OSPEEDR_OSPEED4_Pos +#define GPIO_OSPEEDER_OSPEED4_Msk GPIO_OSPEEDR_OSPEED4_Msk +#define GPIO_OSPEEDER_OSPEED4 GPIO_OSPEEDR_OSPEED4 +#define GPIO_OSPEEDER_OSPEED4_0 GPIO_OSPEEDR_OSPEED4_0 +#define GPIO_OSPEEDER_OSPEED4_1 GPIO_OSPEEDR_OSPEED4_1 +#define GPIO_OSPEEDER_OSPEED5_Pos GPIO_OSPEEDR_OSPEED5_Pos +#define GPIO_OSPEEDER_OSPEED5_Msk GPIO_OSPEEDR_OSPEED5_Msk +#define GPIO_OSPEEDER_OSPEED5 GPIO_OSPEEDR_OSPEED5 +#define GPIO_OSPEEDER_OSPEED5_0 GPIO_OSPEEDR_OSPEED5_0 +#define GPIO_OSPEEDER_OSPEED5_1 GPIO_OSPEEDR_OSPEED5_1 +#define GPIO_OSPEEDER_OSPEED6_Pos GPIO_OSPEEDR_OSPEED6_Pos +#define GPIO_OSPEEDER_OSPEED6_Msk GPIO_OSPEEDR_OSPEED6_Msk +#define GPIO_OSPEEDER_OSPEED6 GPIO_OSPEEDR_OSPEED6 +#define GPIO_OSPEEDER_OSPEED6_0 GPIO_OSPEEDR_OSPEED6_0 +#define GPIO_OSPEEDER_OSPEED6_1 GPIO_OSPEEDR_OSPEED6_1 +#define GPIO_OSPEEDER_OSPEED7_Pos GPIO_OSPEEDR_OSPEED7_Pos +#define GPIO_OSPEEDER_OSPEED7_Msk GPIO_OSPEEDR_OSPEED7_Msk +#define GPIO_OSPEEDER_OSPEED7 GPIO_OSPEEDR_OSPEED7 +#define GPIO_OSPEEDER_OSPEED7_0 GPIO_OSPEEDR_OSPEED7_0 +#define GPIO_OSPEEDER_OSPEED7_1 GPIO_OSPEEDR_OSPEED7_1 +#define GPIO_OSPEEDER_OSPEED8_Pos GPIO_OSPEEDR_OSPEED8_Pos +#define GPIO_OSPEEDER_OSPEED8_Msk GPIO_OSPEEDR_OSPEED8_Msk +#define GPIO_OSPEEDER_OSPEED8 GPIO_OSPEEDR_OSPEED8 +#define GPIO_OSPEEDER_OSPEED8_0 GPIO_OSPEEDR_OSPEED8_0 +#define GPIO_OSPEEDER_OSPEED8_1 GPIO_OSPEEDR_OSPEED8_1 +#define GPIO_OSPEEDER_OSPEED9_Pos GPIO_OSPEEDR_OSPEED9_Pos +#define GPIO_OSPEEDER_OSPEED9_Msk GPIO_OSPEEDR_OSPEED9_Msk +#define GPIO_OSPEEDER_OSPEED9 GPIO_OSPEEDR_OSPEED9 +#define GPIO_OSPEEDER_OSPEED9_0 GPIO_OSPEEDR_OSPEED9_0 +#define GPIO_OSPEEDER_OSPEED9_1 GPIO_OSPEEDR_OSPEED9_1 +#define GPIO_OSPEEDER_OSPEED10_Pos GPIO_OSPEEDR_OSPEED10_Pos +#define GPIO_OSPEEDER_OSPEED10_Msk GPIO_OSPEEDR_OSPEED10_Msk +#define GPIO_OSPEEDER_OSPEED10 GPIO_OSPEEDR_OSPEED10 +#define GPIO_OSPEEDER_OSPEED10_0 GPIO_OSPEEDR_OSPEED10_0 +#define GPIO_OSPEEDER_OSPEED10_1 GPIO_OSPEEDR_OSPEED10_1 +#define GPIO_OSPEEDER_OSPEED11_Pos GPIO_OSPEEDR_OSPEED11_Pos +#define GPIO_OSPEEDER_OSPEED11_Msk GPIO_OSPEEDR_OSPEED11_Msk +#define GPIO_OSPEEDER_OSPEED11 GPIO_OSPEEDR_OSPEED11 +#define GPIO_OSPEEDER_OSPEED11_0 GPIO_OSPEEDR_OSPEED11_0 +#define GPIO_OSPEEDER_OSPEED11_1 GPIO_OSPEEDR_OSPEED11_1 +#define GPIO_OSPEEDER_OSPEED12_Pos GPIO_OSPEEDR_OSPEED12_Pos +#define GPIO_OSPEEDER_OSPEED12_Msk GPIO_OSPEEDR_OSPEED12_Msk +#define GPIO_OSPEEDER_OSPEED12 GPIO_OSPEEDR_OSPEED12 +#define GPIO_OSPEEDER_OSPEED12_0 GPIO_OSPEEDR_OSPEED12_0 +#define GPIO_OSPEEDER_OSPEED12_1 GPIO_OSPEEDR_OSPEED12_1 +#define GPIO_OSPEEDER_OSPEED13_Pos GPIO_OSPEEDR_OSPEED13_Pos +#define GPIO_OSPEEDER_OSPEED13_Msk GPIO_OSPEEDR_OSPEED13_Msk +#define GPIO_OSPEEDER_OSPEED13 GPIO_OSPEEDR_OSPEED13 +#define GPIO_OSPEEDER_OSPEED13_0 GPIO_OSPEEDR_OSPEED13_0 +#define GPIO_OSPEEDER_OSPEED13_1 GPIO_OSPEEDR_OSPEED13_1 +#define GPIO_OSPEEDER_OSPEED14_Pos GPIO_OSPEEDR_OSPEED14_Pos +#define GPIO_OSPEEDER_OSPEED14_Msk GPIO_OSPEEDR_OSPEED14_Msk +#define GPIO_OSPEEDER_OSPEED14 GPIO_OSPEEDR_OSPEED14 +#define GPIO_OSPEEDER_OSPEED14_0 GPIO_OSPEEDR_OSPEED14_0 +#define GPIO_OSPEEDER_OSPEED14_1 GPIO_OSPEEDR_OSPEED14_1 +#define GPIO_OSPEEDER_OSPEED15_Pos GPIO_OSPEEDR_OSPEED15_Pos +#define GPIO_OSPEEDER_OSPEED15_Msk GPIO_OSPEEDR_OSPEED15_Msk +#define GPIO_OSPEEDER_OSPEED15 GPIO_OSPEEDR_OSPEED15 +#define GPIO_OSPEEDER_OSPEED15_0 GPIO_OSPEEDR_OSPEED15_0 +#define GPIO_OSPEEDER_OSPEED15_1 GPIO_OSPEEDR_OSPEED15_1 /******************* Bit definition for GPIO_PUPDR register ******************/ #define GPIO_PUPDR_PUPD0_Pos (0U) diff --git a/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l010x6.h b/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l010x6.h index a538cbe81f..987ec29039 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l010x6.h +++ b/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l010x6.h @@ -2016,86 +2016,168 @@ typedef struct #define GPIO_OTYPER_OT_15 (0x00008000U) /**************** Bit definition for GPIO_OSPEEDR register ******************/ -#define GPIO_OSPEEDER_OSPEED0_Pos (0U) -#define GPIO_OSPEEDER_OSPEED0_Msk (0x3UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000003 */ -#define GPIO_OSPEEDER_OSPEED0 GPIO_OSPEEDER_OSPEED0_Msk -#define GPIO_OSPEEDER_OSPEED0_0 (0x1UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000001 */ -#define GPIO_OSPEEDER_OSPEED0_1 (0x2UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000002 */ -#define GPIO_OSPEEDER_OSPEED1_Pos (2U) -#define GPIO_OSPEEDER_OSPEED1_Msk (0x3UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x0000000C */ -#define GPIO_OSPEEDER_OSPEED1 GPIO_OSPEEDER_OSPEED1_Msk -#define GPIO_OSPEEDER_OSPEED1_0 (0x1UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x00000004 */ -#define GPIO_OSPEEDER_OSPEED1_1 (0x2UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x00000008 */ -#define GPIO_OSPEEDER_OSPEED2_Pos (4U) -#define GPIO_OSPEEDER_OSPEED2_Msk (0x3UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000030 */ -#define GPIO_OSPEEDER_OSPEED2 GPIO_OSPEEDER_OSPEED2_Msk -#define GPIO_OSPEEDER_OSPEED2_0 (0x1UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000010 */ -#define GPIO_OSPEEDER_OSPEED2_1 (0x2UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000020 */ -#define GPIO_OSPEEDER_OSPEED3_Pos (6U) -#define GPIO_OSPEEDER_OSPEED3_Msk (0x3UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x000000C0 */ -#define GPIO_OSPEEDER_OSPEED3 GPIO_OSPEEDER_OSPEED3_Msk -#define GPIO_OSPEEDER_OSPEED3_0 (0x1UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x00000040 */ -#define GPIO_OSPEEDER_OSPEED3_1 (0x2UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x00000080 */ -#define GPIO_OSPEEDER_OSPEED4_Pos (8U) -#define GPIO_OSPEEDER_OSPEED4_Msk (0x3UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000300 */ -#define GPIO_OSPEEDER_OSPEED4 GPIO_OSPEEDER_OSPEED4_Msk -#define GPIO_OSPEEDER_OSPEED4_0 (0x1UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000100 */ -#define GPIO_OSPEEDER_OSPEED4_1 (0x2UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000200 */ -#define GPIO_OSPEEDER_OSPEED5_Pos (10U) -#define GPIO_OSPEEDER_OSPEED5_Msk (0x3UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000C00 */ -#define GPIO_OSPEEDER_OSPEED5 GPIO_OSPEEDER_OSPEED5_Msk -#define GPIO_OSPEEDER_OSPEED5_0 (0x1UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000400 */ -#define GPIO_OSPEEDER_OSPEED5_1 (0x2UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000800 */ -#define GPIO_OSPEEDER_OSPEED6_Pos (12U) -#define GPIO_OSPEEDER_OSPEED6_Msk (0x3UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00003000 */ -#define GPIO_OSPEEDER_OSPEED6 GPIO_OSPEEDER_OSPEED6_Msk -#define GPIO_OSPEEDER_OSPEED6_0 (0x1UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00001000 */ -#define GPIO_OSPEEDER_OSPEED6_1 (0x2UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00002000 */ -#define GPIO_OSPEEDER_OSPEED7_Pos (14U) -#define GPIO_OSPEEDER_OSPEED7_Msk (0x3UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x0000C000 */ -#define GPIO_OSPEEDER_OSPEED7 GPIO_OSPEEDER_OSPEED7_Msk -#define GPIO_OSPEEDER_OSPEED7_0 (0x1UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x00004000 */ -#define GPIO_OSPEEDER_OSPEED7_1 (0x2UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x00008000 */ -#define GPIO_OSPEEDER_OSPEED8_Pos (16U) -#define GPIO_OSPEEDER_OSPEED8_Msk (0x3UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00030000 */ -#define GPIO_OSPEEDER_OSPEED8 GPIO_OSPEEDER_OSPEED8_Msk -#define GPIO_OSPEEDER_OSPEED8_0 (0x1UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00010000 */ -#define GPIO_OSPEEDER_OSPEED8_1 (0x2UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00020000 */ -#define GPIO_OSPEEDER_OSPEED9_Pos (18U) -#define GPIO_OSPEEDER_OSPEED9_Msk (0x3UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x000C0000 */ -#define GPIO_OSPEEDER_OSPEED9 GPIO_OSPEEDER_OSPEED9_Msk -#define GPIO_OSPEEDER_OSPEED9_0 (0x1UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x00040000 */ -#define GPIO_OSPEEDER_OSPEED9_1 (0x2UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x00080000 */ -#define GPIO_OSPEEDER_OSPEED10_Pos (20U) -#define GPIO_OSPEEDER_OSPEED10_Msk (0x3UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00300000 */ -#define GPIO_OSPEEDER_OSPEED10 GPIO_OSPEEDER_OSPEED10_Msk -#define GPIO_OSPEEDER_OSPEED10_0 (0x1UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00100000 */ -#define GPIO_OSPEEDER_OSPEED10_1 (0x2UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00200000 */ -#define GPIO_OSPEEDER_OSPEED11_Pos (22U) -#define GPIO_OSPEEDER_OSPEED11_Msk (0x3UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00C00000 */ -#define GPIO_OSPEEDER_OSPEED11 GPIO_OSPEEDER_OSPEED11_Msk -#define GPIO_OSPEEDER_OSPEED11_0 (0x1UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00400000 */ -#define GPIO_OSPEEDER_OSPEED11_1 (0x2UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00800000 */ -#define GPIO_OSPEEDER_OSPEED12_Pos (24U) -#define GPIO_OSPEEDER_OSPEED12_Msk (0x3UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x03000000 */ -#define GPIO_OSPEEDER_OSPEED12 GPIO_OSPEEDER_OSPEED12_Msk -#define GPIO_OSPEEDER_OSPEED12_0 (0x1UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x01000000 */ -#define GPIO_OSPEEDER_OSPEED12_1 (0x2UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x02000000 */ -#define GPIO_OSPEEDER_OSPEED13_Pos (26U) -#define GPIO_OSPEEDER_OSPEED13_Msk (0x3UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x0C000000 */ -#define GPIO_OSPEEDER_OSPEED13 GPIO_OSPEEDER_OSPEED13_Msk -#define GPIO_OSPEEDER_OSPEED13_0 (0x1UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x04000000 */ -#define GPIO_OSPEEDER_OSPEED13_1 (0x2UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x08000000 */ -#define GPIO_OSPEEDER_OSPEED14_Pos (28U) -#define GPIO_OSPEEDER_OSPEED14_Msk (0x3UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x30000000 */ -#define GPIO_OSPEEDER_OSPEED14 GPIO_OSPEEDER_OSPEED14_Msk -#define GPIO_OSPEEDER_OSPEED14_0 (0x1UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x10000000 */ -#define GPIO_OSPEEDER_OSPEED14_1 (0x2UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x20000000 */ -#define GPIO_OSPEEDER_OSPEED15_Pos (30U) -#define GPIO_OSPEEDER_OSPEED15_Msk (0x3UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0xC0000000 */ -#define GPIO_OSPEEDER_OSPEED15 GPIO_OSPEEDER_OSPEED15_Msk -#define GPIO_OSPEEDER_OSPEED15_0 (0x1UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0x40000000 */ -#define GPIO_OSPEEDER_OSPEED15_1 (0x2UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0x80000000 */ +#define GPIO_OSPEEDR_OSPEED0_Pos (0U) +#define GPIO_OSPEEDR_OSPEED0_Msk (0x3UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000003 */ +#define GPIO_OSPEEDR_OSPEED0 GPIO_OSPEEDR_OSPEED0_Msk +#define GPIO_OSPEEDR_OSPEED0_0 (0x1UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000001 */ +#define GPIO_OSPEEDR_OSPEED0_1 (0x2UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000002 */ +#define GPIO_OSPEEDR_OSPEED1_Pos (2U) +#define GPIO_OSPEEDR_OSPEED1_Msk (0x3UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x0000000C */ +#define GPIO_OSPEEDR_OSPEED1 GPIO_OSPEEDR_OSPEED1_Msk +#define GPIO_OSPEEDR_OSPEED1_0 (0x1UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x00000004 */ +#define GPIO_OSPEEDR_OSPEED1_1 (0x2UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x00000008 */ +#define GPIO_OSPEEDR_OSPEED2_Pos (4U) +#define GPIO_OSPEEDR_OSPEED2_Msk (0x3UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000030 */ +#define GPIO_OSPEEDR_OSPEED2 GPIO_OSPEEDR_OSPEED2_Msk +#define GPIO_OSPEEDR_OSPEED2_0 (0x1UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000010 */ +#define GPIO_OSPEEDR_OSPEED2_1 (0x2UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000020 */ +#define GPIO_OSPEEDR_OSPEED3_Pos (6U) +#define GPIO_OSPEEDR_OSPEED3_Msk (0x3UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x000000C0 */ +#define GPIO_OSPEEDR_OSPEED3 GPIO_OSPEEDR_OSPEED3_Msk +#define GPIO_OSPEEDR_OSPEED3_0 (0x1UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x00000040 */ +#define GPIO_OSPEEDR_OSPEED3_1 (0x2UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x00000080 */ +#define GPIO_OSPEEDR_OSPEED4_Pos (8U) +#define GPIO_OSPEEDR_OSPEED4_Msk (0x3UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000300 */ +#define GPIO_OSPEEDR_OSPEED4 GPIO_OSPEEDR_OSPEED4_Msk +#define GPIO_OSPEEDR_OSPEED4_0 (0x1UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000100 */ +#define GPIO_OSPEEDR_OSPEED4_1 (0x2UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000200 */ +#define GPIO_OSPEEDR_OSPEED5_Pos (10U) +#define GPIO_OSPEEDR_OSPEED5_Msk (0x3UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000C00 */ +#define GPIO_OSPEEDR_OSPEED5 GPIO_OSPEEDR_OSPEED5_Msk +#define GPIO_OSPEEDR_OSPEED5_0 (0x1UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000400 */ +#define GPIO_OSPEEDR_OSPEED5_1 (0x2UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000800 */ +#define GPIO_OSPEEDR_OSPEED6_Pos (12U) +#define GPIO_OSPEEDR_OSPEED6_Msk (0x3UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00003000 */ +#define GPIO_OSPEEDR_OSPEED6 GPIO_OSPEEDR_OSPEED6_Msk +#define GPIO_OSPEEDR_OSPEED6_0 (0x1UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00001000 */ +#define GPIO_OSPEEDR_OSPEED6_1 (0x2UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00002000 */ +#define GPIO_OSPEEDR_OSPEED7_Pos (14U) +#define GPIO_OSPEEDR_OSPEED7_Msk (0x3UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x0000C000 */ +#define GPIO_OSPEEDR_OSPEED7 GPIO_OSPEEDR_OSPEED7_Msk +#define GPIO_OSPEEDR_OSPEED7_0 (0x1UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x00004000 */ +#define GPIO_OSPEEDR_OSPEED7_1 (0x2UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x00008000 */ +#define GPIO_OSPEEDR_OSPEED8_Pos (16U) +#define GPIO_OSPEEDR_OSPEED8_Msk (0x3UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00030000 */ +#define GPIO_OSPEEDR_OSPEED8 GPIO_OSPEEDR_OSPEED8_Msk +#define GPIO_OSPEEDR_OSPEED8_0 (0x1UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00010000 */ +#define GPIO_OSPEEDR_OSPEED8_1 (0x2UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00020000 */ +#define GPIO_OSPEEDR_OSPEED9_Pos (18U) +#define GPIO_OSPEEDR_OSPEED9_Msk (0x3UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x000C0000 */ +#define GPIO_OSPEEDR_OSPEED9 GPIO_OSPEEDR_OSPEED9_Msk +#define GPIO_OSPEEDR_OSPEED9_0 (0x1UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x00040000 */ +#define GPIO_OSPEEDR_OSPEED9_1 (0x2UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x00080000 */ +#define GPIO_OSPEEDR_OSPEED10_Pos (20U) +#define GPIO_OSPEEDR_OSPEED10_Msk (0x3UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00300000 */ +#define GPIO_OSPEEDR_OSPEED10 GPIO_OSPEEDR_OSPEED10_Msk +#define GPIO_OSPEEDR_OSPEED10_0 (0x1UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00100000 */ +#define GPIO_OSPEEDR_OSPEED10_1 (0x2UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00200000 */ +#define GPIO_OSPEEDR_OSPEED11_Pos (22U) +#define GPIO_OSPEEDR_OSPEED11_Msk (0x3UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00C00000 */ +#define GPIO_OSPEEDR_OSPEED11 GPIO_OSPEEDR_OSPEED11_Msk +#define GPIO_OSPEEDR_OSPEED11_0 (0x1UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00400000 */ +#define GPIO_OSPEEDR_OSPEED11_1 (0x2UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00800000 */ +#define GPIO_OSPEEDR_OSPEED12_Pos (24U) +#define GPIO_OSPEEDR_OSPEED12_Msk (0x3UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x03000000 */ +#define GPIO_OSPEEDR_OSPEED12 GPIO_OSPEEDR_OSPEED12_Msk +#define GPIO_OSPEEDR_OSPEED12_0 (0x1UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x01000000 */ +#define GPIO_OSPEEDR_OSPEED12_1 (0x2UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x02000000 */ +#define GPIO_OSPEEDR_OSPEED13_Pos (26U) +#define GPIO_OSPEEDR_OSPEED13_Msk (0x3UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x0C000000 */ +#define GPIO_OSPEEDR_OSPEED13 GPIO_OSPEEDR_OSPEED13_Msk +#define GPIO_OSPEEDR_OSPEED13_0 (0x1UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x04000000 */ +#define GPIO_OSPEEDR_OSPEED13_1 (0x2UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x08000000 */ +#define GPIO_OSPEEDR_OSPEED14_Pos (28U) +#define GPIO_OSPEEDR_OSPEED14_Msk (0x3UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x30000000 */ +#define GPIO_OSPEEDR_OSPEED14 GPIO_OSPEEDR_OSPEED14_Msk +#define GPIO_OSPEEDR_OSPEED14_0 (0x1UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x10000000 */ +#define GPIO_OSPEEDR_OSPEED14_1 (0x2UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x20000000 */ +#define GPIO_OSPEEDR_OSPEED15_Pos (30U) +#define GPIO_OSPEEDR_OSPEED15_Msk (0x3UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0xC0000000 */ +#define GPIO_OSPEEDR_OSPEED15 GPIO_OSPEEDR_OSPEED15_Msk +#define GPIO_OSPEEDR_OSPEED15_0 (0x1UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0x40000000 */ +#define GPIO_OSPEEDR_OSPEED15_1 (0x2UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0x80000000 */ + +/* Legacy defines */ +#define GPIO_OSPEEDER_OSPEED0_Pos GPIO_OSPEEDR_OSPEED0_Pos +#define GPIO_OSPEEDER_OSPEED0_Msk GPIO_OSPEEDR_OSPEED0_Msk +#define GPIO_OSPEEDER_OSPEED0 GPIO_OSPEEDR_OSPEED0 +#define GPIO_OSPEEDER_OSPEED0_0 GPIO_OSPEEDR_OSPEED0_0 +#define GPIO_OSPEEDER_OSPEED0_1 GPIO_OSPEEDR_OSPEED0_1 +#define GPIO_OSPEEDER_OSPEED1_Pos GPIO_OSPEEDR_OSPEED1_Pos +#define GPIO_OSPEEDER_OSPEED1_Msk GPIO_OSPEEDR_OSPEED1_Msk +#define GPIO_OSPEEDER_OSPEED1 GPIO_OSPEEDR_OSPEED1 +#define GPIO_OSPEEDER_OSPEED1_0 GPIO_OSPEEDR_OSPEED1_0 +#define GPIO_OSPEEDER_OSPEED1_1 GPIO_OSPEEDR_OSPEED1_1 +#define GPIO_OSPEEDER_OSPEED2_Pos GPIO_OSPEEDR_OSPEED2_Pos +#define GPIO_OSPEEDER_OSPEED2_Msk GPIO_OSPEEDR_OSPEED2_Msk +#define GPIO_OSPEEDER_OSPEED2 GPIO_OSPEEDR_OSPEED2 +#define GPIO_OSPEEDER_OSPEED2_0 GPIO_OSPEEDR_OSPEED2_0 +#define GPIO_OSPEEDER_OSPEED2_1 GPIO_OSPEEDR_OSPEED2_1 +#define GPIO_OSPEEDER_OSPEED3_Pos GPIO_OSPEEDR_OSPEED3_Pos +#define GPIO_OSPEEDER_OSPEED3_Msk GPIO_OSPEEDR_OSPEED3_Msk +#define GPIO_OSPEEDER_OSPEED3 GPIO_OSPEEDR_OSPEED3 +#define GPIO_OSPEEDER_OSPEED3_0 GPIO_OSPEEDR_OSPEED3_0 +#define GPIO_OSPEEDER_OSPEED3_1 GPIO_OSPEEDR_OSPEED3_1 +#define GPIO_OSPEEDER_OSPEED4_Pos GPIO_OSPEEDR_OSPEED4_Pos +#define GPIO_OSPEEDER_OSPEED4_Msk GPIO_OSPEEDR_OSPEED4_Msk +#define GPIO_OSPEEDER_OSPEED4 GPIO_OSPEEDR_OSPEED4 +#define GPIO_OSPEEDER_OSPEED4_0 GPIO_OSPEEDR_OSPEED4_0 +#define GPIO_OSPEEDER_OSPEED4_1 GPIO_OSPEEDR_OSPEED4_1 +#define GPIO_OSPEEDER_OSPEED5_Pos GPIO_OSPEEDR_OSPEED5_Pos +#define GPIO_OSPEEDER_OSPEED5_Msk GPIO_OSPEEDR_OSPEED5_Msk +#define GPIO_OSPEEDER_OSPEED5 GPIO_OSPEEDR_OSPEED5 +#define GPIO_OSPEEDER_OSPEED5_0 GPIO_OSPEEDR_OSPEED5_0 +#define GPIO_OSPEEDER_OSPEED5_1 GPIO_OSPEEDR_OSPEED5_1 +#define GPIO_OSPEEDER_OSPEED6_Pos GPIO_OSPEEDR_OSPEED6_Pos +#define GPIO_OSPEEDER_OSPEED6_Msk GPIO_OSPEEDR_OSPEED6_Msk +#define GPIO_OSPEEDER_OSPEED6 GPIO_OSPEEDR_OSPEED6 +#define GPIO_OSPEEDER_OSPEED6_0 GPIO_OSPEEDR_OSPEED6_0 +#define GPIO_OSPEEDER_OSPEED6_1 GPIO_OSPEEDR_OSPEED6_1 +#define GPIO_OSPEEDER_OSPEED7_Pos GPIO_OSPEEDR_OSPEED7_Pos +#define GPIO_OSPEEDER_OSPEED7_Msk GPIO_OSPEEDR_OSPEED7_Msk +#define GPIO_OSPEEDER_OSPEED7 GPIO_OSPEEDR_OSPEED7 +#define GPIO_OSPEEDER_OSPEED7_0 GPIO_OSPEEDR_OSPEED7_0 +#define GPIO_OSPEEDER_OSPEED7_1 GPIO_OSPEEDR_OSPEED7_1 +#define GPIO_OSPEEDER_OSPEED8_Pos GPIO_OSPEEDR_OSPEED8_Pos +#define GPIO_OSPEEDER_OSPEED8_Msk GPIO_OSPEEDR_OSPEED8_Msk +#define GPIO_OSPEEDER_OSPEED8 GPIO_OSPEEDR_OSPEED8 +#define GPIO_OSPEEDER_OSPEED8_0 GPIO_OSPEEDR_OSPEED8_0 +#define GPIO_OSPEEDER_OSPEED8_1 GPIO_OSPEEDR_OSPEED8_1 +#define GPIO_OSPEEDER_OSPEED9_Pos GPIO_OSPEEDR_OSPEED9_Pos +#define GPIO_OSPEEDER_OSPEED9_Msk GPIO_OSPEEDR_OSPEED9_Msk +#define GPIO_OSPEEDER_OSPEED9 GPIO_OSPEEDR_OSPEED9 +#define GPIO_OSPEEDER_OSPEED9_0 GPIO_OSPEEDR_OSPEED9_0 +#define GPIO_OSPEEDER_OSPEED9_1 GPIO_OSPEEDR_OSPEED9_1 +#define GPIO_OSPEEDER_OSPEED10_Pos GPIO_OSPEEDR_OSPEED10_Pos +#define GPIO_OSPEEDER_OSPEED10_Msk GPIO_OSPEEDR_OSPEED10_Msk +#define GPIO_OSPEEDER_OSPEED10 GPIO_OSPEEDR_OSPEED10 +#define GPIO_OSPEEDER_OSPEED10_0 GPIO_OSPEEDR_OSPEED10_0 +#define GPIO_OSPEEDER_OSPEED10_1 GPIO_OSPEEDR_OSPEED10_1 +#define GPIO_OSPEEDER_OSPEED11_Pos GPIO_OSPEEDR_OSPEED11_Pos +#define GPIO_OSPEEDER_OSPEED11_Msk GPIO_OSPEEDR_OSPEED11_Msk +#define GPIO_OSPEEDER_OSPEED11 GPIO_OSPEEDR_OSPEED11 +#define GPIO_OSPEEDER_OSPEED11_0 GPIO_OSPEEDR_OSPEED11_0 +#define GPIO_OSPEEDER_OSPEED11_1 GPIO_OSPEEDR_OSPEED11_1 +#define GPIO_OSPEEDER_OSPEED12_Pos GPIO_OSPEEDR_OSPEED12_Pos +#define GPIO_OSPEEDER_OSPEED12_Msk GPIO_OSPEEDR_OSPEED12_Msk +#define GPIO_OSPEEDER_OSPEED12 GPIO_OSPEEDR_OSPEED12 +#define GPIO_OSPEEDER_OSPEED12_0 GPIO_OSPEEDR_OSPEED12_0 +#define GPIO_OSPEEDER_OSPEED12_1 GPIO_OSPEEDR_OSPEED12_1 +#define GPIO_OSPEEDER_OSPEED13_Pos GPIO_OSPEEDR_OSPEED13_Pos +#define GPIO_OSPEEDER_OSPEED13_Msk GPIO_OSPEEDR_OSPEED13_Msk +#define GPIO_OSPEEDER_OSPEED13 GPIO_OSPEEDR_OSPEED13 +#define GPIO_OSPEEDER_OSPEED13_0 GPIO_OSPEEDR_OSPEED13_0 +#define GPIO_OSPEEDER_OSPEED13_1 GPIO_OSPEEDR_OSPEED13_1 +#define GPIO_OSPEEDER_OSPEED14_Pos GPIO_OSPEEDR_OSPEED14_Pos +#define GPIO_OSPEEDER_OSPEED14_Msk GPIO_OSPEEDR_OSPEED14_Msk +#define GPIO_OSPEEDER_OSPEED14 GPIO_OSPEEDR_OSPEED14 +#define GPIO_OSPEEDER_OSPEED14_0 GPIO_OSPEEDR_OSPEED14_0 +#define GPIO_OSPEEDER_OSPEED14_1 GPIO_OSPEEDR_OSPEED14_1 +#define GPIO_OSPEEDER_OSPEED15_Pos GPIO_OSPEEDR_OSPEED15_Pos +#define GPIO_OSPEEDER_OSPEED15_Msk GPIO_OSPEEDR_OSPEED15_Msk +#define GPIO_OSPEEDER_OSPEED15 GPIO_OSPEEDR_OSPEED15 +#define GPIO_OSPEEDER_OSPEED15_0 GPIO_OSPEEDR_OSPEED15_0 +#define GPIO_OSPEEDER_OSPEED15_1 GPIO_OSPEEDR_OSPEED15_1 /******************* Bit definition for GPIO_PUPDR register ******************/ #define GPIO_PUPDR_PUPD0_Pos (0U) diff --git a/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l010x8.h b/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l010x8.h index 100a071095..5d517cc61e 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l010x8.h +++ b/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l010x8.h @@ -2018,86 +2018,168 @@ typedef struct #define GPIO_OTYPER_OT_15 (0x00008000U) /**************** Bit definition for GPIO_OSPEEDR register ******************/ -#define GPIO_OSPEEDER_OSPEED0_Pos (0U) -#define GPIO_OSPEEDER_OSPEED0_Msk (0x3UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000003 */ -#define GPIO_OSPEEDER_OSPEED0 GPIO_OSPEEDER_OSPEED0_Msk -#define GPIO_OSPEEDER_OSPEED0_0 (0x1UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000001 */ -#define GPIO_OSPEEDER_OSPEED0_1 (0x2UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000002 */ -#define GPIO_OSPEEDER_OSPEED1_Pos (2U) -#define GPIO_OSPEEDER_OSPEED1_Msk (0x3UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x0000000C */ -#define GPIO_OSPEEDER_OSPEED1 GPIO_OSPEEDER_OSPEED1_Msk -#define GPIO_OSPEEDER_OSPEED1_0 (0x1UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x00000004 */ -#define GPIO_OSPEEDER_OSPEED1_1 (0x2UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x00000008 */ -#define GPIO_OSPEEDER_OSPEED2_Pos (4U) -#define GPIO_OSPEEDER_OSPEED2_Msk (0x3UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000030 */ -#define GPIO_OSPEEDER_OSPEED2 GPIO_OSPEEDER_OSPEED2_Msk -#define GPIO_OSPEEDER_OSPEED2_0 (0x1UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000010 */ -#define GPIO_OSPEEDER_OSPEED2_1 (0x2UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000020 */ -#define GPIO_OSPEEDER_OSPEED3_Pos (6U) -#define GPIO_OSPEEDER_OSPEED3_Msk (0x3UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x000000C0 */ -#define GPIO_OSPEEDER_OSPEED3 GPIO_OSPEEDER_OSPEED3_Msk -#define GPIO_OSPEEDER_OSPEED3_0 (0x1UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x00000040 */ -#define GPIO_OSPEEDER_OSPEED3_1 (0x2UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x00000080 */ -#define GPIO_OSPEEDER_OSPEED4_Pos (8U) -#define GPIO_OSPEEDER_OSPEED4_Msk (0x3UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000300 */ -#define GPIO_OSPEEDER_OSPEED4 GPIO_OSPEEDER_OSPEED4_Msk -#define GPIO_OSPEEDER_OSPEED4_0 (0x1UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000100 */ -#define GPIO_OSPEEDER_OSPEED4_1 (0x2UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000200 */ -#define GPIO_OSPEEDER_OSPEED5_Pos (10U) -#define GPIO_OSPEEDER_OSPEED5_Msk (0x3UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000C00 */ -#define GPIO_OSPEEDER_OSPEED5 GPIO_OSPEEDER_OSPEED5_Msk -#define GPIO_OSPEEDER_OSPEED5_0 (0x1UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000400 */ -#define GPIO_OSPEEDER_OSPEED5_1 (0x2UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000800 */ -#define GPIO_OSPEEDER_OSPEED6_Pos (12U) -#define GPIO_OSPEEDER_OSPEED6_Msk (0x3UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00003000 */ -#define GPIO_OSPEEDER_OSPEED6 GPIO_OSPEEDER_OSPEED6_Msk -#define GPIO_OSPEEDER_OSPEED6_0 (0x1UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00001000 */ -#define GPIO_OSPEEDER_OSPEED6_1 (0x2UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00002000 */ -#define GPIO_OSPEEDER_OSPEED7_Pos (14U) -#define GPIO_OSPEEDER_OSPEED7_Msk (0x3UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x0000C000 */ -#define GPIO_OSPEEDER_OSPEED7 GPIO_OSPEEDER_OSPEED7_Msk -#define GPIO_OSPEEDER_OSPEED7_0 (0x1UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x00004000 */ -#define GPIO_OSPEEDER_OSPEED7_1 (0x2UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x00008000 */ -#define GPIO_OSPEEDER_OSPEED8_Pos (16U) -#define GPIO_OSPEEDER_OSPEED8_Msk (0x3UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00030000 */ -#define GPIO_OSPEEDER_OSPEED8 GPIO_OSPEEDER_OSPEED8_Msk -#define GPIO_OSPEEDER_OSPEED8_0 (0x1UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00010000 */ -#define GPIO_OSPEEDER_OSPEED8_1 (0x2UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00020000 */ -#define GPIO_OSPEEDER_OSPEED9_Pos (18U) -#define GPIO_OSPEEDER_OSPEED9_Msk (0x3UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x000C0000 */ -#define GPIO_OSPEEDER_OSPEED9 GPIO_OSPEEDER_OSPEED9_Msk -#define GPIO_OSPEEDER_OSPEED9_0 (0x1UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x00040000 */ -#define GPIO_OSPEEDER_OSPEED9_1 (0x2UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x00080000 */ -#define GPIO_OSPEEDER_OSPEED10_Pos (20U) -#define GPIO_OSPEEDER_OSPEED10_Msk (0x3UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00300000 */ -#define GPIO_OSPEEDER_OSPEED10 GPIO_OSPEEDER_OSPEED10_Msk -#define GPIO_OSPEEDER_OSPEED10_0 (0x1UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00100000 */ -#define GPIO_OSPEEDER_OSPEED10_1 (0x2UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00200000 */ -#define GPIO_OSPEEDER_OSPEED11_Pos (22U) -#define GPIO_OSPEEDER_OSPEED11_Msk (0x3UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00C00000 */ -#define GPIO_OSPEEDER_OSPEED11 GPIO_OSPEEDER_OSPEED11_Msk -#define GPIO_OSPEEDER_OSPEED11_0 (0x1UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00400000 */ -#define GPIO_OSPEEDER_OSPEED11_1 (0x2UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00800000 */ -#define GPIO_OSPEEDER_OSPEED12_Pos (24U) -#define GPIO_OSPEEDER_OSPEED12_Msk (0x3UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x03000000 */ -#define GPIO_OSPEEDER_OSPEED12 GPIO_OSPEEDER_OSPEED12_Msk -#define GPIO_OSPEEDER_OSPEED12_0 (0x1UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x01000000 */ -#define GPIO_OSPEEDER_OSPEED12_1 (0x2UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x02000000 */ -#define GPIO_OSPEEDER_OSPEED13_Pos (26U) -#define GPIO_OSPEEDER_OSPEED13_Msk (0x3UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x0C000000 */ -#define GPIO_OSPEEDER_OSPEED13 GPIO_OSPEEDER_OSPEED13_Msk -#define GPIO_OSPEEDER_OSPEED13_0 (0x1UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x04000000 */ -#define GPIO_OSPEEDER_OSPEED13_1 (0x2UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x08000000 */ -#define GPIO_OSPEEDER_OSPEED14_Pos (28U) -#define GPIO_OSPEEDER_OSPEED14_Msk (0x3UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x30000000 */ -#define GPIO_OSPEEDER_OSPEED14 GPIO_OSPEEDER_OSPEED14_Msk -#define GPIO_OSPEEDER_OSPEED14_0 (0x1UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x10000000 */ -#define GPIO_OSPEEDER_OSPEED14_1 (0x2UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x20000000 */ -#define GPIO_OSPEEDER_OSPEED15_Pos (30U) -#define GPIO_OSPEEDER_OSPEED15_Msk (0x3UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0xC0000000 */ -#define GPIO_OSPEEDER_OSPEED15 GPIO_OSPEEDER_OSPEED15_Msk -#define GPIO_OSPEEDER_OSPEED15_0 (0x1UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0x40000000 */ -#define GPIO_OSPEEDER_OSPEED15_1 (0x2UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0x80000000 */ +#define GPIO_OSPEEDR_OSPEED0_Pos (0U) +#define GPIO_OSPEEDR_OSPEED0_Msk (0x3UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000003 */ +#define GPIO_OSPEEDR_OSPEED0 GPIO_OSPEEDR_OSPEED0_Msk +#define GPIO_OSPEEDR_OSPEED0_0 (0x1UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000001 */ +#define GPIO_OSPEEDR_OSPEED0_1 (0x2UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000002 */ +#define GPIO_OSPEEDR_OSPEED1_Pos (2U) +#define GPIO_OSPEEDR_OSPEED1_Msk (0x3UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x0000000C */ +#define GPIO_OSPEEDR_OSPEED1 GPIO_OSPEEDR_OSPEED1_Msk +#define GPIO_OSPEEDR_OSPEED1_0 (0x1UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x00000004 */ +#define GPIO_OSPEEDR_OSPEED1_1 (0x2UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x00000008 */ +#define GPIO_OSPEEDR_OSPEED2_Pos (4U) +#define GPIO_OSPEEDR_OSPEED2_Msk (0x3UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000030 */ +#define GPIO_OSPEEDR_OSPEED2 GPIO_OSPEEDR_OSPEED2_Msk +#define GPIO_OSPEEDR_OSPEED2_0 (0x1UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000010 */ +#define GPIO_OSPEEDR_OSPEED2_1 (0x2UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000020 */ +#define GPIO_OSPEEDR_OSPEED3_Pos (6U) +#define GPIO_OSPEEDR_OSPEED3_Msk (0x3UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x000000C0 */ +#define GPIO_OSPEEDR_OSPEED3 GPIO_OSPEEDR_OSPEED3_Msk +#define GPIO_OSPEEDR_OSPEED3_0 (0x1UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x00000040 */ +#define GPIO_OSPEEDR_OSPEED3_1 (0x2UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x00000080 */ +#define GPIO_OSPEEDR_OSPEED4_Pos (8U) +#define GPIO_OSPEEDR_OSPEED4_Msk (0x3UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000300 */ +#define GPIO_OSPEEDR_OSPEED4 GPIO_OSPEEDR_OSPEED4_Msk +#define GPIO_OSPEEDR_OSPEED4_0 (0x1UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000100 */ +#define GPIO_OSPEEDR_OSPEED4_1 (0x2UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000200 */ +#define GPIO_OSPEEDR_OSPEED5_Pos (10U) +#define GPIO_OSPEEDR_OSPEED5_Msk (0x3UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000C00 */ +#define GPIO_OSPEEDR_OSPEED5 GPIO_OSPEEDR_OSPEED5_Msk +#define GPIO_OSPEEDR_OSPEED5_0 (0x1UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000400 */ +#define GPIO_OSPEEDR_OSPEED5_1 (0x2UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000800 */ +#define GPIO_OSPEEDR_OSPEED6_Pos (12U) +#define GPIO_OSPEEDR_OSPEED6_Msk (0x3UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00003000 */ +#define GPIO_OSPEEDR_OSPEED6 GPIO_OSPEEDR_OSPEED6_Msk +#define GPIO_OSPEEDR_OSPEED6_0 (0x1UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00001000 */ +#define GPIO_OSPEEDR_OSPEED6_1 (0x2UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00002000 */ +#define GPIO_OSPEEDR_OSPEED7_Pos (14U) +#define GPIO_OSPEEDR_OSPEED7_Msk (0x3UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x0000C000 */ +#define GPIO_OSPEEDR_OSPEED7 GPIO_OSPEEDR_OSPEED7_Msk +#define GPIO_OSPEEDR_OSPEED7_0 (0x1UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x00004000 */ +#define GPIO_OSPEEDR_OSPEED7_1 (0x2UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x00008000 */ +#define GPIO_OSPEEDR_OSPEED8_Pos (16U) +#define GPIO_OSPEEDR_OSPEED8_Msk (0x3UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00030000 */ +#define GPIO_OSPEEDR_OSPEED8 GPIO_OSPEEDR_OSPEED8_Msk +#define GPIO_OSPEEDR_OSPEED8_0 (0x1UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00010000 */ +#define GPIO_OSPEEDR_OSPEED8_1 (0x2UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00020000 */ +#define GPIO_OSPEEDR_OSPEED9_Pos (18U) +#define GPIO_OSPEEDR_OSPEED9_Msk (0x3UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x000C0000 */ +#define GPIO_OSPEEDR_OSPEED9 GPIO_OSPEEDR_OSPEED9_Msk +#define GPIO_OSPEEDR_OSPEED9_0 (0x1UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x00040000 */ +#define GPIO_OSPEEDR_OSPEED9_1 (0x2UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x00080000 */ +#define GPIO_OSPEEDR_OSPEED10_Pos (20U) +#define GPIO_OSPEEDR_OSPEED10_Msk (0x3UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00300000 */ +#define GPIO_OSPEEDR_OSPEED10 GPIO_OSPEEDR_OSPEED10_Msk +#define GPIO_OSPEEDR_OSPEED10_0 (0x1UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00100000 */ +#define GPIO_OSPEEDR_OSPEED10_1 (0x2UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00200000 */ +#define GPIO_OSPEEDR_OSPEED11_Pos (22U) +#define GPIO_OSPEEDR_OSPEED11_Msk (0x3UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00C00000 */ +#define GPIO_OSPEEDR_OSPEED11 GPIO_OSPEEDR_OSPEED11_Msk +#define GPIO_OSPEEDR_OSPEED11_0 (0x1UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00400000 */ +#define GPIO_OSPEEDR_OSPEED11_1 (0x2UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00800000 */ +#define GPIO_OSPEEDR_OSPEED12_Pos (24U) +#define GPIO_OSPEEDR_OSPEED12_Msk (0x3UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x03000000 */ +#define GPIO_OSPEEDR_OSPEED12 GPIO_OSPEEDR_OSPEED12_Msk +#define GPIO_OSPEEDR_OSPEED12_0 (0x1UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x01000000 */ +#define GPIO_OSPEEDR_OSPEED12_1 (0x2UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x02000000 */ +#define GPIO_OSPEEDR_OSPEED13_Pos (26U) +#define GPIO_OSPEEDR_OSPEED13_Msk (0x3UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x0C000000 */ +#define GPIO_OSPEEDR_OSPEED13 GPIO_OSPEEDR_OSPEED13_Msk +#define GPIO_OSPEEDR_OSPEED13_0 (0x1UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x04000000 */ +#define GPIO_OSPEEDR_OSPEED13_1 (0x2UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x08000000 */ +#define GPIO_OSPEEDR_OSPEED14_Pos (28U) +#define GPIO_OSPEEDR_OSPEED14_Msk (0x3UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x30000000 */ +#define GPIO_OSPEEDR_OSPEED14 GPIO_OSPEEDR_OSPEED14_Msk +#define GPIO_OSPEEDR_OSPEED14_0 (0x1UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x10000000 */ +#define GPIO_OSPEEDR_OSPEED14_1 (0x2UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x20000000 */ +#define GPIO_OSPEEDR_OSPEED15_Pos (30U) +#define GPIO_OSPEEDR_OSPEED15_Msk (0x3UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0xC0000000 */ +#define GPIO_OSPEEDR_OSPEED15 GPIO_OSPEEDR_OSPEED15_Msk +#define GPIO_OSPEEDR_OSPEED15_0 (0x1UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0x40000000 */ +#define GPIO_OSPEEDR_OSPEED15_1 (0x2UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0x80000000 */ + +/* Legacy defines */ +#define GPIO_OSPEEDER_OSPEED0_Pos GPIO_OSPEEDR_OSPEED0_Pos +#define GPIO_OSPEEDER_OSPEED0_Msk GPIO_OSPEEDR_OSPEED0_Msk +#define GPIO_OSPEEDER_OSPEED0 GPIO_OSPEEDR_OSPEED0 +#define GPIO_OSPEEDER_OSPEED0_0 GPIO_OSPEEDR_OSPEED0_0 +#define GPIO_OSPEEDER_OSPEED0_1 GPIO_OSPEEDR_OSPEED0_1 +#define GPIO_OSPEEDER_OSPEED1_Pos GPIO_OSPEEDR_OSPEED1_Pos +#define GPIO_OSPEEDER_OSPEED1_Msk GPIO_OSPEEDR_OSPEED1_Msk +#define GPIO_OSPEEDER_OSPEED1 GPIO_OSPEEDR_OSPEED1 +#define GPIO_OSPEEDER_OSPEED1_0 GPIO_OSPEEDR_OSPEED1_0 +#define GPIO_OSPEEDER_OSPEED1_1 GPIO_OSPEEDR_OSPEED1_1 +#define GPIO_OSPEEDER_OSPEED2_Pos GPIO_OSPEEDR_OSPEED2_Pos +#define GPIO_OSPEEDER_OSPEED2_Msk GPIO_OSPEEDR_OSPEED2_Msk +#define GPIO_OSPEEDER_OSPEED2 GPIO_OSPEEDR_OSPEED2 +#define GPIO_OSPEEDER_OSPEED2_0 GPIO_OSPEEDR_OSPEED2_0 +#define GPIO_OSPEEDER_OSPEED2_1 GPIO_OSPEEDR_OSPEED2_1 +#define GPIO_OSPEEDER_OSPEED3_Pos GPIO_OSPEEDR_OSPEED3_Pos +#define GPIO_OSPEEDER_OSPEED3_Msk GPIO_OSPEEDR_OSPEED3_Msk +#define GPIO_OSPEEDER_OSPEED3 GPIO_OSPEEDR_OSPEED3 +#define GPIO_OSPEEDER_OSPEED3_0 GPIO_OSPEEDR_OSPEED3_0 +#define GPIO_OSPEEDER_OSPEED3_1 GPIO_OSPEEDR_OSPEED3_1 +#define GPIO_OSPEEDER_OSPEED4_Pos GPIO_OSPEEDR_OSPEED4_Pos +#define GPIO_OSPEEDER_OSPEED4_Msk GPIO_OSPEEDR_OSPEED4_Msk +#define GPIO_OSPEEDER_OSPEED4 GPIO_OSPEEDR_OSPEED4 +#define GPIO_OSPEEDER_OSPEED4_0 GPIO_OSPEEDR_OSPEED4_0 +#define GPIO_OSPEEDER_OSPEED4_1 GPIO_OSPEEDR_OSPEED4_1 +#define GPIO_OSPEEDER_OSPEED5_Pos GPIO_OSPEEDR_OSPEED5_Pos +#define GPIO_OSPEEDER_OSPEED5_Msk GPIO_OSPEEDR_OSPEED5_Msk +#define GPIO_OSPEEDER_OSPEED5 GPIO_OSPEEDR_OSPEED5 +#define GPIO_OSPEEDER_OSPEED5_0 GPIO_OSPEEDR_OSPEED5_0 +#define GPIO_OSPEEDER_OSPEED5_1 GPIO_OSPEEDR_OSPEED5_1 +#define GPIO_OSPEEDER_OSPEED6_Pos GPIO_OSPEEDR_OSPEED6_Pos +#define GPIO_OSPEEDER_OSPEED6_Msk GPIO_OSPEEDR_OSPEED6_Msk +#define GPIO_OSPEEDER_OSPEED6 GPIO_OSPEEDR_OSPEED6 +#define GPIO_OSPEEDER_OSPEED6_0 GPIO_OSPEEDR_OSPEED6_0 +#define GPIO_OSPEEDER_OSPEED6_1 GPIO_OSPEEDR_OSPEED6_1 +#define GPIO_OSPEEDER_OSPEED7_Pos GPIO_OSPEEDR_OSPEED7_Pos +#define GPIO_OSPEEDER_OSPEED7_Msk GPIO_OSPEEDR_OSPEED7_Msk +#define GPIO_OSPEEDER_OSPEED7 GPIO_OSPEEDR_OSPEED7 +#define GPIO_OSPEEDER_OSPEED7_0 GPIO_OSPEEDR_OSPEED7_0 +#define GPIO_OSPEEDER_OSPEED7_1 GPIO_OSPEEDR_OSPEED7_1 +#define GPIO_OSPEEDER_OSPEED8_Pos GPIO_OSPEEDR_OSPEED8_Pos +#define GPIO_OSPEEDER_OSPEED8_Msk GPIO_OSPEEDR_OSPEED8_Msk +#define GPIO_OSPEEDER_OSPEED8 GPIO_OSPEEDR_OSPEED8 +#define GPIO_OSPEEDER_OSPEED8_0 GPIO_OSPEEDR_OSPEED8_0 +#define GPIO_OSPEEDER_OSPEED8_1 GPIO_OSPEEDR_OSPEED8_1 +#define GPIO_OSPEEDER_OSPEED9_Pos GPIO_OSPEEDR_OSPEED9_Pos +#define GPIO_OSPEEDER_OSPEED9_Msk GPIO_OSPEEDR_OSPEED9_Msk +#define GPIO_OSPEEDER_OSPEED9 GPIO_OSPEEDR_OSPEED9 +#define GPIO_OSPEEDER_OSPEED9_0 GPIO_OSPEEDR_OSPEED9_0 +#define GPIO_OSPEEDER_OSPEED9_1 GPIO_OSPEEDR_OSPEED9_1 +#define GPIO_OSPEEDER_OSPEED10_Pos GPIO_OSPEEDR_OSPEED10_Pos +#define GPIO_OSPEEDER_OSPEED10_Msk GPIO_OSPEEDR_OSPEED10_Msk +#define GPIO_OSPEEDER_OSPEED10 GPIO_OSPEEDR_OSPEED10 +#define GPIO_OSPEEDER_OSPEED10_0 GPIO_OSPEEDR_OSPEED10_0 +#define GPIO_OSPEEDER_OSPEED10_1 GPIO_OSPEEDR_OSPEED10_1 +#define GPIO_OSPEEDER_OSPEED11_Pos GPIO_OSPEEDR_OSPEED11_Pos +#define GPIO_OSPEEDER_OSPEED11_Msk GPIO_OSPEEDR_OSPEED11_Msk +#define GPIO_OSPEEDER_OSPEED11 GPIO_OSPEEDR_OSPEED11 +#define GPIO_OSPEEDER_OSPEED11_0 GPIO_OSPEEDR_OSPEED11_0 +#define GPIO_OSPEEDER_OSPEED11_1 GPIO_OSPEEDR_OSPEED11_1 +#define GPIO_OSPEEDER_OSPEED12_Pos GPIO_OSPEEDR_OSPEED12_Pos +#define GPIO_OSPEEDER_OSPEED12_Msk GPIO_OSPEEDR_OSPEED12_Msk +#define GPIO_OSPEEDER_OSPEED12 GPIO_OSPEEDR_OSPEED12 +#define GPIO_OSPEEDER_OSPEED12_0 GPIO_OSPEEDR_OSPEED12_0 +#define GPIO_OSPEEDER_OSPEED12_1 GPIO_OSPEEDR_OSPEED12_1 +#define GPIO_OSPEEDER_OSPEED13_Pos GPIO_OSPEEDR_OSPEED13_Pos +#define GPIO_OSPEEDER_OSPEED13_Msk GPIO_OSPEEDR_OSPEED13_Msk +#define GPIO_OSPEEDER_OSPEED13 GPIO_OSPEEDR_OSPEED13 +#define GPIO_OSPEEDER_OSPEED13_0 GPIO_OSPEEDR_OSPEED13_0 +#define GPIO_OSPEEDER_OSPEED13_1 GPIO_OSPEEDR_OSPEED13_1 +#define GPIO_OSPEEDER_OSPEED14_Pos GPIO_OSPEEDR_OSPEED14_Pos +#define GPIO_OSPEEDER_OSPEED14_Msk GPIO_OSPEEDR_OSPEED14_Msk +#define GPIO_OSPEEDER_OSPEED14 GPIO_OSPEEDR_OSPEED14 +#define GPIO_OSPEEDER_OSPEED14_0 GPIO_OSPEEDR_OSPEED14_0 +#define GPIO_OSPEEDER_OSPEED14_1 GPIO_OSPEEDR_OSPEED14_1 +#define GPIO_OSPEEDER_OSPEED15_Pos GPIO_OSPEEDR_OSPEED15_Pos +#define GPIO_OSPEEDER_OSPEED15_Msk GPIO_OSPEEDR_OSPEED15_Msk +#define GPIO_OSPEEDER_OSPEED15 GPIO_OSPEEDR_OSPEED15 +#define GPIO_OSPEEDER_OSPEED15_0 GPIO_OSPEEDR_OSPEED15_0 +#define GPIO_OSPEEDER_OSPEED15_1 GPIO_OSPEEDR_OSPEED15_1 /******************* Bit definition for GPIO_PUPDR register ******************/ #define GPIO_PUPDR_PUPD0_Pos (0U) diff --git a/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l010xb.h b/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l010xb.h index 0c4d289c3b..9bde1b9ae0 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l010xb.h +++ b/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l010xb.h @@ -2026,86 +2026,168 @@ typedef struct #define GPIO_OTYPER_OT_15 (0x00008000U) /**************** Bit definition for GPIO_OSPEEDR register ******************/ -#define GPIO_OSPEEDER_OSPEED0_Pos (0U) -#define GPIO_OSPEEDER_OSPEED0_Msk (0x3UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000003 */ -#define GPIO_OSPEEDER_OSPEED0 GPIO_OSPEEDER_OSPEED0_Msk -#define GPIO_OSPEEDER_OSPEED0_0 (0x1UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000001 */ -#define GPIO_OSPEEDER_OSPEED0_1 (0x2UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000002 */ -#define GPIO_OSPEEDER_OSPEED1_Pos (2U) -#define GPIO_OSPEEDER_OSPEED1_Msk (0x3UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x0000000C */ -#define GPIO_OSPEEDER_OSPEED1 GPIO_OSPEEDER_OSPEED1_Msk -#define GPIO_OSPEEDER_OSPEED1_0 (0x1UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x00000004 */ -#define GPIO_OSPEEDER_OSPEED1_1 (0x2UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x00000008 */ -#define GPIO_OSPEEDER_OSPEED2_Pos (4U) -#define GPIO_OSPEEDER_OSPEED2_Msk (0x3UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000030 */ -#define GPIO_OSPEEDER_OSPEED2 GPIO_OSPEEDER_OSPEED2_Msk -#define GPIO_OSPEEDER_OSPEED2_0 (0x1UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000010 */ -#define GPIO_OSPEEDER_OSPEED2_1 (0x2UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000020 */ -#define GPIO_OSPEEDER_OSPEED3_Pos (6U) -#define GPIO_OSPEEDER_OSPEED3_Msk (0x3UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x000000C0 */ -#define GPIO_OSPEEDER_OSPEED3 GPIO_OSPEEDER_OSPEED3_Msk -#define GPIO_OSPEEDER_OSPEED3_0 (0x1UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x00000040 */ -#define GPIO_OSPEEDER_OSPEED3_1 (0x2UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x00000080 */ -#define GPIO_OSPEEDER_OSPEED4_Pos (8U) -#define GPIO_OSPEEDER_OSPEED4_Msk (0x3UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000300 */ -#define GPIO_OSPEEDER_OSPEED4 GPIO_OSPEEDER_OSPEED4_Msk -#define GPIO_OSPEEDER_OSPEED4_0 (0x1UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000100 */ -#define GPIO_OSPEEDER_OSPEED4_1 (0x2UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000200 */ -#define GPIO_OSPEEDER_OSPEED5_Pos (10U) -#define GPIO_OSPEEDER_OSPEED5_Msk (0x3UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000C00 */ -#define GPIO_OSPEEDER_OSPEED5 GPIO_OSPEEDER_OSPEED5_Msk -#define GPIO_OSPEEDER_OSPEED5_0 (0x1UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000400 */ -#define GPIO_OSPEEDER_OSPEED5_1 (0x2UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000800 */ -#define GPIO_OSPEEDER_OSPEED6_Pos (12U) -#define GPIO_OSPEEDER_OSPEED6_Msk (0x3UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00003000 */ -#define GPIO_OSPEEDER_OSPEED6 GPIO_OSPEEDER_OSPEED6_Msk -#define GPIO_OSPEEDER_OSPEED6_0 (0x1UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00001000 */ -#define GPIO_OSPEEDER_OSPEED6_1 (0x2UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00002000 */ -#define GPIO_OSPEEDER_OSPEED7_Pos (14U) -#define GPIO_OSPEEDER_OSPEED7_Msk (0x3UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x0000C000 */ -#define GPIO_OSPEEDER_OSPEED7 GPIO_OSPEEDER_OSPEED7_Msk -#define GPIO_OSPEEDER_OSPEED7_0 (0x1UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x00004000 */ -#define GPIO_OSPEEDER_OSPEED7_1 (0x2UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x00008000 */ -#define GPIO_OSPEEDER_OSPEED8_Pos (16U) -#define GPIO_OSPEEDER_OSPEED8_Msk (0x3UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00030000 */ -#define GPIO_OSPEEDER_OSPEED8 GPIO_OSPEEDER_OSPEED8_Msk -#define GPIO_OSPEEDER_OSPEED8_0 (0x1UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00010000 */ -#define GPIO_OSPEEDER_OSPEED8_1 (0x2UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00020000 */ -#define GPIO_OSPEEDER_OSPEED9_Pos (18U) -#define GPIO_OSPEEDER_OSPEED9_Msk (0x3UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x000C0000 */ -#define GPIO_OSPEEDER_OSPEED9 GPIO_OSPEEDER_OSPEED9_Msk -#define GPIO_OSPEEDER_OSPEED9_0 (0x1UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x00040000 */ -#define GPIO_OSPEEDER_OSPEED9_1 (0x2UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x00080000 */ -#define GPIO_OSPEEDER_OSPEED10_Pos (20U) -#define GPIO_OSPEEDER_OSPEED10_Msk (0x3UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00300000 */ -#define GPIO_OSPEEDER_OSPEED10 GPIO_OSPEEDER_OSPEED10_Msk -#define GPIO_OSPEEDER_OSPEED10_0 (0x1UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00100000 */ -#define GPIO_OSPEEDER_OSPEED10_1 (0x2UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00200000 */ -#define GPIO_OSPEEDER_OSPEED11_Pos (22U) -#define GPIO_OSPEEDER_OSPEED11_Msk (0x3UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00C00000 */ -#define GPIO_OSPEEDER_OSPEED11 GPIO_OSPEEDER_OSPEED11_Msk -#define GPIO_OSPEEDER_OSPEED11_0 (0x1UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00400000 */ -#define GPIO_OSPEEDER_OSPEED11_1 (0x2UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00800000 */ -#define GPIO_OSPEEDER_OSPEED12_Pos (24U) -#define GPIO_OSPEEDER_OSPEED12_Msk (0x3UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x03000000 */ -#define GPIO_OSPEEDER_OSPEED12 GPIO_OSPEEDER_OSPEED12_Msk -#define GPIO_OSPEEDER_OSPEED12_0 (0x1UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x01000000 */ -#define GPIO_OSPEEDER_OSPEED12_1 (0x2UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x02000000 */ -#define GPIO_OSPEEDER_OSPEED13_Pos (26U) -#define GPIO_OSPEEDER_OSPEED13_Msk (0x3UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x0C000000 */ -#define GPIO_OSPEEDER_OSPEED13 GPIO_OSPEEDER_OSPEED13_Msk -#define GPIO_OSPEEDER_OSPEED13_0 (0x1UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x04000000 */ -#define GPIO_OSPEEDER_OSPEED13_1 (0x2UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x08000000 */ -#define GPIO_OSPEEDER_OSPEED14_Pos (28U) -#define GPIO_OSPEEDER_OSPEED14_Msk (0x3UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x30000000 */ -#define GPIO_OSPEEDER_OSPEED14 GPIO_OSPEEDER_OSPEED14_Msk -#define GPIO_OSPEEDER_OSPEED14_0 (0x1UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x10000000 */ -#define GPIO_OSPEEDER_OSPEED14_1 (0x2UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x20000000 */ -#define GPIO_OSPEEDER_OSPEED15_Pos (30U) -#define GPIO_OSPEEDER_OSPEED15_Msk (0x3UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0xC0000000 */ -#define GPIO_OSPEEDER_OSPEED15 GPIO_OSPEEDER_OSPEED15_Msk -#define GPIO_OSPEEDER_OSPEED15_0 (0x1UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0x40000000 */ -#define GPIO_OSPEEDER_OSPEED15_1 (0x2UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0x80000000 */ +#define GPIO_OSPEEDR_OSPEED0_Pos (0U) +#define GPIO_OSPEEDR_OSPEED0_Msk (0x3UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000003 */ +#define GPIO_OSPEEDR_OSPEED0 GPIO_OSPEEDR_OSPEED0_Msk +#define GPIO_OSPEEDR_OSPEED0_0 (0x1UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000001 */ +#define GPIO_OSPEEDR_OSPEED0_1 (0x2UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000002 */ +#define GPIO_OSPEEDR_OSPEED1_Pos (2U) +#define GPIO_OSPEEDR_OSPEED1_Msk (0x3UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x0000000C */ +#define GPIO_OSPEEDR_OSPEED1 GPIO_OSPEEDR_OSPEED1_Msk +#define GPIO_OSPEEDR_OSPEED1_0 (0x1UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x00000004 */ +#define GPIO_OSPEEDR_OSPEED1_1 (0x2UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x00000008 */ +#define GPIO_OSPEEDR_OSPEED2_Pos (4U) +#define GPIO_OSPEEDR_OSPEED2_Msk (0x3UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000030 */ +#define GPIO_OSPEEDR_OSPEED2 GPIO_OSPEEDR_OSPEED2_Msk +#define GPIO_OSPEEDR_OSPEED2_0 (0x1UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000010 */ +#define GPIO_OSPEEDR_OSPEED2_1 (0x2UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000020 */ +#define GPIO_OSPEEDR_OSPEED3_Pos (6U) +#define GPIO_OSPEEDR_OSPEED3_Msk (0x3UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x000000C0 */ +#define GPIO_OSPEEDR_OSPEED3 GPIO_OSPEEDR_OSPEED3_Msk +#define GPIO_OSPEEDR_OSPEED3_0 (0x1UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x00000040 */ +#define GPIO_OSPEEDR_OSPEED3_1 (0x2UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x00000080 */ +#define GPIO_OSPEEDR_OSPEED4_Pos (8U) +#define GPIO_OSPEEDR_OSPEED4_Msk (0x3UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000300 */ +#define GPIO_OSPEEDR_OSPEED4 GPIO_OSPEEDR_OSPEED4_Msk +#define GPIO_OSPEEDR_OSPEED4_0 (0x1UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000100 */ +#define GPIO_OSPEEDR_OSPEED4_1 (0x2UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000200 */ +#define GPIO_OSPEEDR_OSPEED5_Pos (10U) +#define GPIO_OSPEEDR_OSPEED5_Msk (0x3UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000C00 */ +#define GPIO_OSPEEDR_OSPEED5 GPIO_OSPEEDR_OSPEED5_Msk +#define GPIO_OSPEEDR_OSPEED5_0 (0x1UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000400 */ +#define GPIO_OSPEEDR_OSPEED5_1 (0x2UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000800 */ +#define GPIO_OSPEEDR_OSPEED6_Pos (12U) +#define GPIO_OSPEEDR_OSPEED6_Msk (0x3UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00003000 */ +#define GPIO_OSPEEDR_OSPEED6 GPIO_OSPEEDR_OSPEED6_Msk +#define GPIO_OSPEEDR_OSPEED6_0 (0x1UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00001000 */ +#define GPIO_OSPEEDR_OSPEED6_1 (0x2UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00002000 */ +#define GPIO_OSPEEDR_OSPEED7_Pos (14U) +#define GPIO_OSPEEDR_OSPEED7_Msk (0x3UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x0000C000 */ +#define GPIO_OSPEEDR_OSPEED7 GPIO_OSPEEDR_OSPEED7_Msk +#define GPIO_OSPEEDR_OSPEED7_0 (0x1UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x00004000 */ +#define GPIO_OSPEEDR_OSPEED7_1 (0x2UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x00008000 */ +#define GPIO_OSPEEDR_OSPEED8_Pos (16U) +#define GPIO_OSPEEDR_OSPEED8_Msk (0x3UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00030000 */ +#define GPIO_OSPEEDR_OSPEED8 GPIO_OSPEEDR_OSPEED8_Msk +#define GPIO_OSPEEDR_OSPEED8_0 (0x1UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00010000 */ +#define GPIO_OSPEEDR_OSPEED8_1 (0x2UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00020000 */ +#define GPIO_OSPEEDR_OSPEED9_Pos (18U) +#define GPIO_OSPEEDR_OSPEED9_Msk (0x3UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x000C0000 */ +#define GPIO_OSPEEDR_OSPEED9 GPIO_OSPEEDR_OSPEED9_Msk +#define GPIO_OSPEEDR_OSPEED9_0 (0x1UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x00040000 */ +#define GPIO_OSPEEDR_OSPEED9_1 (0x2UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x00080000 */ +#define GPIO_OSPEEDR_OSPEED10_Pos (20U) +#define GPIO_OSPEEDR_OSPEED10_Msk (0x3UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00300000 */ +#define GPIO_OSPEEDR_OSPEED10 GPIO_OSPEEDR_OSPEED10_Msk +#define GPIO_OSPEEDR_OSPEED10_0 (0x1UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00100000 */ +#define GPIO_OSPEEDR_OSPEED10_1 (0x2UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00200000 */ +#define GPIO_OSPEEDR_OSPEED11_Pos (22U) +#define GPIO_OSPEEDR_OSPEED11_Msk (0x3UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00C00000 */ +#define GPIO_OSPEEDR_OSPEED11 GPIO_OSPEEDR_OSPEED11_Msk +#define GPIO_OSPEEDR_OSPEED11_0 (0x1UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00400000 */ +#define GPIO_OSPEEDR_OSPEED11_1 (0x2UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00800000 */ +#define GPIO_OSPEEDR_OSPEED12_Pos (24U) +#define GPIO_OSPEEDR_OSPEED12_Msk (0x3UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x03000000 */ +#define GPIO_OSPEEDR_OSPEED12 GPIO_OSPEEDR_OSPEED12_Msk +#define GPIO_OSPEEDR_OSPEED12_0 (0x1UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x01000000 */ +#define GPIO_OSPEEDR_OSPEED12_1 (0x2UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x02000000 */ +#define GPIO_OSPEEDR_OSPEED13_Pos (26U) +#define GPIO_OSPEEDR_OSPEED13_Msk (0x3UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x0C000000 */ +#define GPIO_OSPEEDR_OSPEED13 GPIO_OSPEEDR_OSPEED13_Msk +#define GPIO_OSPEEDR_OSPEED13_0 (0x1UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x04000000 */ +#define GPIO_OSPEEDR_OSPEED13_1 (0x2UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x08000000 */ +#define GPIO_OSPEEDR_OSPEED14_Pos (28U) +#define GPIO_OSPEEDR_OSPEED14_Msk (0x3UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x30000000 */ +#define GPIO_OSPEEDR_OSPEED14 GPIO_OSPEEDR_OSPEED14_Msk +#define GPIO_OSPEEDR_OSPEED14_0 (0x1UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x10000000 */ +#define GPIO_OSPEEDR_OSPEED14_1 (0x2UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x20000000 */ +#define GPIO_OSPEEDR_OSPEED15_Pos (30U) +#define GPIO_OSPEEDR_OSPEED15_Msk (0x3UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0xC0000000 */ +#define GPIO_OSPEEDR_OSPEED15 GPIO_OSPEEDR_OSPEED15_Msk +#define GPIO_OSPEEDR_OSPEED15_0 (0x1UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0x40000000 */ +#define GPIO_OSPEEDR_OSPEED15_1 (0x2UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0x80000000 */ + +/* Legacy defines */ +#define GPIO_OSPEEDER_OSPEED0_Pos GPIO_OSPEEDR_OSPEED0_Pos +#define GPIO_OSPEEDER_OSPEED0_Msk GPIO_OSPEEDR_OSPEED0_Msk +#define GPIO_OSPEEDER_OSPEED0 GPIO_OSPEEDR_OSPEED0 +#define GPIO_OSPEEDER_OSPEED0_0 GPIO_OSPEEDR_OSPEED0_0 +#define GPIO_OSPEEDER_OSPEED0_1 GPIO_OSPEEDR_OSPEED0_1 +#define GPIO_OSPEEDER_OSPEED1_Pos GPIO_OSPEEDR_OSPEED1_Pos +#define GPIO_OSPEEDER_OSPEED1_Msk GPIO_OSPEEDR_OSPEED1_Msk +#define GPIO_OSPEEDER_OSPEED1 GPIO_OSPEEDR_OSPEED1 +#define GPIO_OSPEEDER_OSPEED1_0 GPIO_OSPEEDR_OSPEED1_0 +#define GPIO_OSPEEDER_OSPEED1_1 GPIO_OSPEEDR_OSPEED1_1 +#define GPIO_OSPEEDER_OSPEED2_Pos GPIO_OSPEEDR_OSPEED2_Pos +#define GPIO_OSPEEDER_OSPEED2_Msk GPIO_OSPEEDR_OSPEED2_Msk +#define GPIO_OSPEEDER_OSPEED2 GPIO_OSPEEDR_OSPEED2 +#define GPIO_OSPEEDER_OSPEED2_0 GPIO_OSPEEDR_OSPEED2_0 +#define GPIO_OSPEEDER_OSPEED2_1 GPIO_OSPEEDR_OSPEED2_1 +#define GPIO_OSPEEDER_OSPEED3_Pos GPIO_OSPEEDR_OSPEED3_Pos +#define GPIO_OSPEEDER_OSPEED3_Msk GPIO_OSPEEDR_OSPEED3_Msk +#define GPIO_OSPEEDER_OSPEED3 GPIO_OSPEEDR_OSPEED3 +#define GPIO_OSPEEDER_OSPEED3_0 GPIO_OSPEEDR_OSPEED3_0 +#define GPIO_OSPEEDER_OSPEED3_1 GPIO_OSPEEDR_OSPEED3_1 +#define GPIO_OSPEEDER_OSPEED4_Pos GPIO_OSPEEDR_OSPEED4_Pos +#define GPIO_OSPEEDER_OSPEED4_Msk GPIO_OSPEEDR_OSPEED4_Msk +#define GPIO_OSPEEDER_OSPEED4 GPIO_OSPEEDR_OSPEED4 +#define GPIO_OSPEEDER_OSPEED4_0 GPIO_OSPEEDR_OSPEED4_0 +#define GPIO_OSPEEDER_OSPEED4_1 GPIO_OSPEEDR_OSPEED4_1 +#define GPIO_OSPEEDER_OSPEED5_Pos GPIO_OSPEEDR_OSPEED5_Pos +#define GPIO_OSPEEDER_OSPEED5_Msk GPIO_OSPEEDR_OSPEED5_Msk +#define GPIO_OSPEEDER_OSPEED5 GPIO_OSPEEDR_OSPEED5 +#define GPIO_OSPEEDER_OSPEED5_0 GPIO_OSPEEDR_OSPEED5_0 +#define GPIO_OSPEEDER_OSPEED5_1 GPIO_OSPEEDR_OSPEED5_1 +#define GPIO_OSPEEDER_OSPEED6_Pos GPIO_OSPEEDR_OSPEED6_Pos +#define GPIO_OSPEEDER_OSPEED6_Msk GPIO_OSPEEDR_OSPEED6_Msk +#define GPIO_OSPEEDER_OSPEED6 GPIO_OSPEEDR_OSPEED6 +#define GPIO_OSPEEDER_OSPEED6_0 GPIO_OSPEEDR_OSPEED6_0 +#define GPIO_OSPEEDER_OSPEED6_1 GPIO_OSPEEDR_OSPEED6_1 +#define GPIO_OSPEEDER_OSPEED7_Pos GPIO_OSPEEDR_OSPEED7_Pos +#define GPIO_OSPEEDER_OSPEED7_Msk GPIO_OSPEEDR_OSPEED7_Msk +#define GPIO_OSPEEDER_OSPEED7 GPIO_OSPEEDR_OSPEED7 +#define GPIO_OSPEEDER_OSPEED7_0 GPIO_OSPEEDR_OSPEED7_0 +#define GPIO_OSPEEDER_OSPEED7_1 GPIO_OSPEEDR_OSPEED7_1 +#define GPIO_OSPEEDER_OSPEED8_Pos GPIO_OSPEEDR_OSPEED8_Pos +#define GPIO_OSPEEDER_OSPEED8_Msk GPIO_OSPEEDR_OSPEED8_Msk +#define GPIO_OSPEEDER_OSPEED8 GPIO_OSPEEDR_OSPEED8 +#define GPIO_OSPEEDER_OSPEED8_0 GPIO_OSPEEDR_OSPEED8_0 +#define GPIO_OSPEEDER_OSPEED8_1 GPIO_OSPEEDR_OSPEED8_1 +#define GPIO_OSPEEDER_OSPEED9_Pos GPIO_OSPEEDR_OSPEED9_Pos +#define GPIO_OSPEEDER_OSPEED9_Msk GPIO_OSPEEDR_OSPEED9_Msk +#define GPIO_OSPEEDER_OSPEED9 GPIO_OSPEEDR_OSPEED9 +#define GPIO_OSPEEDER_OSPEED9_0 GPIO_OSPEEDR_OSPEED9_0 +#define GPIO_OSPEEDER_OSPEED9_1 GPIO_OSPEEDR_OSPEED9_1 +#define GPIO_OSPEEDER_OSPEED10_Pos GPIO_OSPEEDR_OSPEED10_Pos +#define GPIO_OSPEEDER_OSPEED10_Msk GPIO_OSPEEDR_OSPEED10_Msk +#define GPIO_OSPEEDER_OSPEED10 GPIO_OSPEEDR_OSPEED10 +#define GPIO_OSPEEDER_OSPEED10_0 GPIO_OSPEEDR_OSPEED10_0 +#define GPIO_OSPEEDER_OSPEED10_1 GPIO_OSPEEDR_OSPEED10_1 +#define GPIO_OSPEEDER_OSPEED11_Pos GPIO_OSPEEDR_OSPEED11_Pos +#define GPIO_OSPEEDER_OSPEED11_Msk GPIO_OSPEEDR_OSPEED11_Msk +#define GPIO_OSPEEDER_OSPEED11 GPIO_OSPEEDR_OSPEED11 +#define GPIO_OSPEEDER_OSPEED11_0 GPIO_OSPEEDR_OSPEED11_0 +#define GPIO_OSPEEDER_OSPEED11_1 GPIO_OSPEEDR_OSPEED11_1 +#define GPIO_OSPEEDER_OSPEED12_Pos GPIO_OSPEEDR_OSPEED12_Pos +#define GPIO_OSPEEDER_OSPEED12_Msk GPIO_OSPEEDR_OSPEED12_Msk +#define GPIO_OSPEEDER_OSPEED12 GPIO_OSPEEDR_OSPEED12 +#define GPIO_OSPEEDER_OSPEED12_0 GPIO_OSPEEDR_OSPEED12_0 +#define GPIO_OSPEEDER_OSPEED12_1 GPIO_OSPEEDR_OSPEED12_1 +#define GPIO_OSPEEDER_OSPEED13_Pos GPIO_OSPEEDR_OSPEED13_Pos +#define GPIO_OSPEEDER_OSPEED13_Msk GPIO_OSPEEDR_OSPEED13_Msk +#define GPIO_OSPEEDER_OSPEED13 GPIO_OSPEEDR_OSPEED13 +#define GPIO_OSPEEDER_OSPEED13_0 GPIO_OSPEEDR_OSPEED13_0 +#define GPIO_OSPEEDER_OSPEED13_1 GPIO_OSPEEDR_OSPEED13_1 +#define GPIO_OSPEEDER_OSPEED14_Pos GPIO_OSPEEDR_OSPEED14_Pos +#define GPIO_OSPEEDER_OSPEED14_Msk GPIO_OSPEEDR_OSPEED14_Msk +#define GPIO_OSPEEDER_OSPEED14 GPIO_OSPEEDR_OSPEED14 +#define GPIO_OSPEEDER_OSPEED14_0 GPIO_OSPEEDR_OSPEED14_0 +#define GPIO_OSPEEDER_OSPEED14_1 GPIO_OSPEEDR_OSPEED14_1 +#define GPIO_OSPEEDER_OSPEED15_Pos GPIO_OSPEEDR_OSPEED15_Pos +#define GPIO_OSPEEDER_OSPEED15_Msk GPIO_OSPEEDR_OSPEED15_Msk +#define GPIO_OSPEEDER_OSPEED15 GPIO_OSPEEDR_OSPEED15 +#define GPIO_OSPEEDER_OSPEED15_0 GPIO_OSPEEDR_OSPEED15_0 +#define GPIO_OSPEEDER_OSPEED15_1 GPIO_OSPEEDR_OSPEED15_1 /******************* Bit definition for GPIO_PUPDR register ******************/ #define GPIO_PUPDR_PUPD0_Pos (0U) diff --git a/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l011xx.h b/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l011xx.h index e9360b4160..1dfee91597 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l011xx.h +++ b/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l011xx.h @@ -2091,86 +2091,168 @@ typedef struct #define GPIO_OTYPER_OT_15 (0x00008000U) /**************** Bit definition for GPIO_OSPEEDR register ******************/ -#define GPIO_OSPEEDER_OSPEED0_Pos (0U) -#define GPIO_OSPEEDER_OSPEED0_Msk (0x3UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000003 */ -#define GPIO_OSPEEDER_OSPEED0 GPIO_OSPEEDER_OSPEED0_Msk -#define GPIO_OSPEEDER_OSPEED0_0 (0x1UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000001 */ -#define GPIO_OSPEEDER_OSPEED0_1 (0x2UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000002 */ -#define GPIO_OSPEEDER_OSPEED1_Pos (2U) -#define GPIO_OSPEEDER_OSPEED1_Msk (0x3UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x0000000C */ -#define GPIO_OSPEEDER_OSPEED1 GPIO_OSPEEDER_OSPEED1_Msk -#define GPIO_OSPEEDER_OSPEED1_0 (0x1UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x00000004 */ -#define GPIO_OSPEEDER_OSPEED1_1 (0x2UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x00000008 */ -#define GPIO_OSPEEDER_OSPEED2_Pos (4U) -#define GPIO_OSPEEDER_OSPEED2_Msk (0x3UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000030 */ -#define GPIO_OSPEEDER_OSPEED2 GPIO_OSPEEDER_OSPEED2_Msk -#define GPIO_OSPEEDER_OSPEED2_0 (0x1UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000010 */ -#define GPIO_OSPEEDER_OSPEED2_1 (0x2UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000020 */ -#define GPIO_OSPEEDER_OSPEED3_Pos (6U) -#define GPIO_OSPEEDER_OSPEED3_Msk (0x3UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x000000C0 */ -#define GPIO_OSPEEDER_OSPEED3 GPIO_OSPEEDER_OSPEED3_Msk -#define GPIO_OSPEEDER_OSPEED3_0 (0x1UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x00000040 */ -#define GPIO_OSPEEDER_OSPEED3_1 (0x2UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x00000080 */ -#define GPIO_OSPEEDER_OSPEED4_Pos (8U) -#define GPIO_OSPEEDER_OSPEED4_Msk (0x3UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000300 */ -#define GPIO_OSPEEDER_OSPEED4 GPIO_OSPEEDER_OSPEED4_Msk -#define GPIO_OSPEEDER_OSPEED4_0 (0x1UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000100 */ -#define GPIO_OSPEEDER_OSPEED4_1 (0x2UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000200 */ -#define GPIO_OSPEEDER_OSPEED5_Pos (10U) -#define GPIO_OSPEEDER_OSPEED5_Msk (0x3UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000C00 */ -#define GPIO_OSPEEDER_OSPEED5 GPIO_OSPEEDER_OSPEED5_Msk -#define GPIO_OSPEEDER_OSPEED5_0 (0x1UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000400 */ -#define GPIO_OSPEEDER_OSPEED5_1 (0x2UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000800 */ -#define GPIO_OSPEEDER_OSPEED6_Pos (12U) -#define GPIO_OSPEEDER_OSPEED6_Msk (0x3UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00003000 */ -#define GPIO_OSPEEDER_OSPEED6 GPIO_OSPEEDER_OSPEED6_Msk -#define GPIO_OSPEEDER_OSPEED6_0 (0x1UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00001000 */ -#define GPIO_OSPEEDER_OSPEED6_1 (0x2UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00002000 */ -#define GPIO_OSPEEDER_OSPEED7_Pos (14U) -#define GPIO_OSPEEDER_OSPEED7_Msk (0x3UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x0000C000 */ -#define GPIO_OSPEEDER_OSPEED7 GPIO_OSPEEDER_OSPEED7_Msk -#define GPIO_OSPEEDER_OSPEED7_0 (0x1UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x00004000 */ -#define GPIO_OSPEEDER_OSPEED7_1 (0x2UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x00008000 */ -#define GPIO_OSPEEDER_OSPEED8_Pos (16U) -#define GPIO_OSPEEDER_OSPEED8_Msk (0x3UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00030000 */ -#define GPIO_OSPEEDER_OSPEED8 GPIO_OSPEEDER_OSPEED8_Msk -#define GPIO_OSPEEDER_OSPEED8_0 (0x1UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00010000 */ -#define GPIO_OSPEEDER_OSPEED8_1 (0x2UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00020000 */ -#define GPIO_OSPEEDER_OSPEED9_Pos (18U) -#define GPIO_OSPEEDER_OSPEED9_Msk (0x3UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x000C0000 */ -#define GPIO_OSPEEDER_OSPEED9 GPIO_OSPEEDER_OSPEED9_Msk -#define GPIO_OSPEEDER_OSPEED9_0 (0x1UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x00040000 */ -#define GPIO_OSPEEDER_OSPEED9_1 (0x2UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x00080000 */ -#define GPIO_OSPEEDER_OSPEED10_Pos (20U) -#define GPIO_OSPEEDER_OSPEED10_Msk (0x3UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00300000 */ -#define GPIO_OSPEEDER_OSPEED10 GPIO_OSPEEDER_OSPEED10_Msk -#define GPIO_OSPEEDER_OSPEED10_0 (0x1UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00100000 */ -#define GPIO_OSPEEDER_OSPEED10_1 (0x2UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00200000 */ -#define GPIO_OSPEEDER_OSPEED11_Pos (22U) -#define GPIO_OSPEEDER_OSPEED11_Msk (0x3UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00C00000 */ -#define GPIO_OSPEEDER_OSPEED11 GPIO_OSPEEDER_OSPEED11_Msk -#define GPIO_OSPEEDER_OSPEED11_0 (0x1UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00400000 */ -#define GPIO_OSPEEDER_OSPEED11_1 (0x2UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00800000 */ -#define GPIO_OSPEEDER_OSPEED12_Pos (24U) -#define GPIO_OSPEEDER_OSPEED12_Msk (0x3UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x03000000 */ -#define GPIO_OSPEEDER_OSPEED12 GPIO_OSPEEDER_OSPEED12_Msk -#define GPIO_OSPEEDER_OSPEED12_0 (0x1UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x01000000 */ -#define GPIO_OSPEEDER_OSPEED12_1 (0x2UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x02000000 */ -#define GPIO_OSPEEDER_OSPEED13_Pos (26U) -#define GPIO_OSPEEDER_OSPEED13_Msk (0x3UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x0C000000 */ -#define GPIO_OSPEEDER_OSPEED13 GPIO_OSPEEDER_OSPEED13_Msk -#define GPIO_OSPEEDER_OSPEED13_0 (0x1UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x04000000 */ -#define GPIO_OSPEEDER_OSPEED13_1 (0x2UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x08000000 */ -#define GPIO_OSPEEDER_OSPEED14_Pos (28U) -#define GPIO_OSPEEDER_OSPEED14_Msk (0x3UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x30000000 */ -#define GPIO_OSPEEDER_OSPEED14 GPIO_OSPEEDER_OSPEED14_Msk -#define GPIO_OSPEEDER_OSPEED14_0 (0x1UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x10000000 */ -#define GPIO_OSPEEDER_OSPEED14_1 (0x2UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x20000000 */ -#define GPIO_OSPEEDER_OSPEED15_Pos (30U) -#define GPIO_OSPEEDER_OSPEED15_Msk (0x3UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0xC0000000 */ -#define GPIO_OSPEEDER_OSPEED15 GPIO_OSPEEDER_OSPEED15_Msk -#define GPIO_OSPEEDER_OSPEED15_0 (0x1UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0x40000000 */ -#define GPIO_OSPEEDER_OSPEED15_1 (0x2UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0x80000000 */ +#define GPIO_OSPEEDR_OSPEED0_Pos (0U) +#define GPIO_OSPEEDR_OSPEED0_Msk (0x3UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000003 */ +#define GPIO_OSPEEDR_OSPEED0 GPIO_OSPEEDR_OSPEED0_Msk +#define GPIO_OSPEEDR_OSPEED0_0 (0x1UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000001 */ +#define GPIO_OSPEEDR_OSPEED0_1 (0x2UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000002 */ +#define GPIO_OSPEEDR_OSPEED1_Pos (2U) +#define GPIO_OSPEEDR_OSPEED1_Msk (0x3UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x0000000C */ +#define GPIO_OSPEEDR_OSPEED1 GPIO_OSPEEDR_OSPEED1_Msk +#define GPIO_OSPEEDR_OSPEED1_0 (0x1UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x00000004 */ +#define GPIO_OSPEEDR_OSPEED1_1 (0x2UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x00000008 */ +#define GPIO_OSPEEDR_OSPEED2_Pos (4U) +#define GPIO_OSPEEDR_OSPEED2_Msk (0x3UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000030 */ +#define GPIO_OSPEEDR_OSPEED2 GPIO_OSPEEDR_OSPEED2_Msk +#define GPIO_OSPEEDR_OSPEED2_0 (0x1UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000010 */ +#define GPIO_OSPEEDR_OSPEED2_1 (0x2UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000020 */ +#define GPIO_OSPEEDR_OSPEED3_Pos (6U) +#define GPIO_OSPEEDR_OSPEED3_Msk (0x3UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x000000C0 */ +#define GPIO_OSPEEDR_OSPEED3 GPIO_OSPEEDR_OSPEED3_Msk +#define GPIO_OSPEEDR_OSPEED3_0 (0x1UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x00000040 */ +#define GPIO_OSPEEDR_OSPEED3_1 (0x2UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x00000080 */ +#define GPIO_OSPEEDR_OSPEED4_Pos (8U) +#define GPIO_OSPEEDR_OSPEED4_Msk (0x3UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000300 */ +#define GPIO_OSPEEDR_OSPEED4 GPIO_OSPEEDR_OSPEED4_Msk +#define GPIO_OSPEEDR_OSPEED4_0 (0x1UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000100 */ +#define GPIO_OSPEEDR_OSPEED4_1 (0x2UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000200 */ +#define GPIO_OSPEEDR_OSPEED5_Pos (10U) +#define GPIO_OSPEEDR_OSPEED5_Msk (0x3UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000C00 */ +#define GPIO_OSPEEDR_OSPEED5 GPIO_OSPEEDR_OSPEED5_Msk +#define GPIO_OSPEEDR_OSPEED5_0 (0x1UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000400 */ +#define GPIO_OSPEEDR_OSPEED5_1 (0x2UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000800 */ +#define GPIO_OSPEEDR_OSPEED6_Pos (12U) +#define GPIO_OSPEEDR_OSPEED6_Msk (0x3UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00003000 */ +#define GPIO_OSPEEDR_OSPEED6 GPIO_OSPEEDR_OSPEED6_Msk +#define GPIO_OSPEEDR_OSPEED6_0 (0x1UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00001000 */ +#define GPIO_OSPEEDR_OSPEED6_1 (0x2UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00002000 */ +#define GPIO_OSPEEDR_OSPEED7_Pos (14U) +#define GPIO_OSPEEDR_OSPEED7_Msk (0x3UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x0000C000 */ +#define GPIO_OSPEEDR_OSPEED7 GPIO_OSPEEDR_OSPEED7_Msk +#define GPIO_OSPEEDR_OSPEED7_0 (0x1UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x00004000 */ +#define GPIO_OSPEEDR_OSPEED7_1 (0x2UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x00008000 */ +#define GPIO_OSPEEDR_OSPEED8_Pos (16U) +#define GPIO_OSPEEDR_OSPEED8_Msk (0x3UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00030000 */ +#define GPIO_OSPEEDR_OSPEED8 GPIO_OSPEEDR_OSPEED8_Msk +#define GPIO_OSPEEDR_OSPEED8_0 (0x1UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00010000 */ +#define GPIO_OSPEEDR_OSPEED8_1 (0x2UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00020000 */ +#define GPIO_OSPEEDR_OSPEED9_Pos (18U) +#define GPIO_OSPEEDR_OSPEED9_Msk (0x3UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x000C0000 */ +#define GPIO_OSPEEDR_OSPEED9 GPIO_OSPEEDR_OSPEED9_Msk +#define GPIO_OSPEEDR_OSPEED9_0 (0x1UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x00040000 */ +#define GPIO_OSPEEDR_OSPEED9_1 (0x2UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x00080000 */ +#define GPIO_OSPEEDR_OSPEED10_Pos (20U) +#define GPIO_OSPEEDR_OSPEED10_Msk (0x3UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00300000 */ +#define GPIO_OSPEEDR_OSPEED10 GPIO_OSPEEDR_OSPEED10_Msk +#define GPIO_OSPEEDR_OSPEED10_0 (0x1UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00100000 */ +#define GPIO_OSPEEDR_OSPEED10_1 (0x2UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00200000 */ +#define GPIO_OSPEEDR_OSPEED11_Pos (22U) +#define GPIO_OSPEEDR_OSPEED11_Msk (0x3UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00C00000 */ +#define GPIO_OSPEEDR_OSPEED11 GPIO_OSPEEDR_OSPEED11_Msk +#define GPIO_OSPEEDR_OSPEED11_0 (0x1UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00400000 */ +#define GPIO_OSPEEDR_OSPEED11_1 (0x2UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00800000 */ +#define GPIO_OSPEEDR_OSPEED12_Pos (24U) +#define GPIO_OSPEEDR_OSPEED12_Msk (0x3UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x03000000 */ +#define GPIO_OSPEEDR_OSPEED12 GPIO_OSPEEDR_OSPEED12_Msk +#define GPIO_OSPEEDR_OSPEED12_0 (0x1UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x01000000 */ +#define GPIO_OSPEEDR_OSPEED12_1 (0x2UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x02000000 */ +#define GPIO_OSPEEDR_OSPEED13_Pos (26U) +#define GPIO_OSPEEDR_OSPEED13_Msk (0x3UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x0C000000 */ +#define GPIO_OSPEEDR_OSPEED13 GPIO_OSPEEDR_OSPEED13_Msk +#define GPIO_OSPEEDR_OSPEED13_0 (0x1UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x04000000 */ +#define GPIO_OSPEEDR_OSPEED13_1 (0x2UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x08000000 */ +#define GPIO_OSPEEDR_OSPEED14_Pos (28U) +#define GPIO_OSPEEDR_OSPEED14_Msk (0x3UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x30000000 */ +#define GPIO_OSPEEDR_OSPEED14 GPIO_OSPEEDR_OSPEED14_Msk +#define GPIO_OSPEEDR_OSPEED14_0 (0x1UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x10000000 */ +#define GPIO_OSPEEDR_OSPEED14_1 (0x2UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x20000000 */ +#define GPIO_OSPEEDR_OSPEED15_Pos (30U) +#define GPIO_OSPEEDR_OSPEED15_Msk (0x3UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0xC0000000 */ +#define GPIO_OSPEEDR_OSPEED15 GPIO_OSPEEDR_OSPEED15_Msk +#define GPIO_OSPEEDR_OSPEED15_0 (0x1UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0x40000000 */ +#define GPIO_OSPEEDR_OSPEED15_1 (0x2UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0x80000000 */ + +/* Legacy defines */ +#define GPIO_OSPEEDER_OSPEED0_Pos GPIO_OSPEEDR_OSPEED0_Pos +#define GPIO_OSPEEDER_OSPEED0_Msk GPIO_OSPEEDR_OSPEED0_Msk +#define GPIO_OSPEEDER_OSPEED0 GPIO_OSPEEDR_OSPEED0 +#define GPIO_OSPEEDER_OSPEED0_0 GPIO_OSPEEDR_OSPEED0_0 +#define GPIO_OSPEEDER_OSPEED0_1 GPIO_OSPEEDR_OSPEED0_1 +#define GPIO_OSPEEDER_OSPEED1_Pos GPIO_OSPEEDR_OSPEED1_Pos +#define GPIO_OSPEEDER_OSPEED1_Msk GPIO_OSPEEDR_OSPEED1_Msk +#define GPIO_OSPEEDER_OSPEED1 GPIO_OSPEEDR_OSPEED1 +#define GPIO_OSPEEDER_OSPEED1_0 GPIO_OSPEEDR_OSPEED1_0 +#define GPIO_OSPEEDER_OSPEED1_1 GPIO_OSPEEDR_OSPEED1_1 +#define GPIO_OSPEEDER_OSPEED2_Pos GPIO_OSPEEDR_OSPEED2_Pos +#define GPIO_OSPEEDER_OSPEED2_Msk GPIO_OSPEEDR_OSPEED2_Msk +#define GPIO_OSPEEDER_OSPEED2 GPIO_OSPEEDR_OSPEED2 +#define GPIO_OSPEEDER_OSPEED2_0 GPIO_OSPEEDR_OSPEED2_0 +#define GPIO_OSPEEDER_OSPEED2_1 GPIO_OSPEEDR_OSPEED2_1 +#define GPIO_OSPEEDER_OSPEED3_Pos GPIO_OSPEEDR_OSPEED3_Pos +#define GPIO_OSPEEDER_OSPEED3_Msk GPIO_OSPEEDR_OSPEED3_Msk +#define GPIO_OSPEEDER_OSPEED3 GPIO_OSPEEDR_OSPEED3 +#define GPIO_OSPEEDER_OSPEED3_0 GPIO_OSPEEDR_OSPEED3_0 +#define GPIO_OSPEEDER_OSPEED3_1 GPIO_OSPEEDR_OSPEED3_1 +#define GPIO_OSPEEDER_OSPEED4_Pos GPIO_OSPEEDR_OSPEED4_Pos +#define GPIO_OSPEEDER_OSPEED4_Msk GPIO_OSPEEDR_OSPEED4_Msk +#define GPIO_OSPEEDER_OSPEED4 GPIO_OSPEEDR_OSPEED4 +#define GPIO_OSPEEDER_OSPEED4_0 GPIO_OSPEEDR_OSPEED4_0 +#define GPIO_OSPEEDER_OSPEED4_1 GPIO_OSPEEDR_OSPEED4_1 +#define GPIO_OSPEEDER_OSPEED5_Pos GPIO_OSPEEDR_OSPEED5_Pos +#define GPIO_OSPEEDER_OSPEED5_Msk GPIO_OSPEEDR_OSPEED5_Msk +#define GPIO_OSPEEDER_OSPEED5 GPIO_OSPEEDR_OSPEED5 +#define GPIO_OSPEEDER_OSPEED5_0 GPIO_OSPEEDR_OSPEED5_0 +#define GPIO_OSPEEDER_OSPEED5_1 GPIO_OSPEEDR_OSPEED5_1 +#define GPIO_OSPEEDER_OSPEED6_Pos GPIO_OSPEEDR_OSPEED6_Pos +#define GPIO_OSPEEDER_OSPEED6_Msk GPIO_OSPEEDR_OSPEED6_Msk +#define GPIO_OSPEEDER_OSPEED6 GPIO_OSPEEDR_OSPEED6 +#define GPIO_OSPEEDER_OSPEED6_0 GPIO_OSPEEDR_OSPEED6_0 +#define GPIO_OSPEEDER_OSPEED6_1 GPIO_OSPEEDR_OSPEED6_1 +#define GPIO_OSPEEDER_OSPEED7_Pos GPIO_OSPEEDR_OSPEED7_Pos +#define GPIO_OSPEEDER_OSPEED7_Msk GPIO_OSPEEDR_OSPEED7_Msk +#define GPIO_OSPEEDER_OSPEED7 GPIO_OSPEEDR_OSPEED7 +#define GPIO_OSPEEDER_OSPEED7_0 GPIO_OSPEEDR_OSPEED7_0 +#define GPIO_OSPEEDER_OSPEED7_1 GPIO_OSPEEDR_OSPEED7_1 +#define GPIO_OSPEEDER_OSPEED8_Pos GPIO_OSPEEDR_OSPEED8_Pos +#define GPIO_OSPEEDER_OSPEED8_Msk GPIO_OSPEEDR_OSPEED8_Msk +#define GPIO_OSPEEDER_OSPEED8 GPIO_OSPEEDR_OSPEED8 +#define GPIO_OSPEEDER_OSPEED8_0 GPIO_OSPEEDR_OSPEED8_0 +#define GPIO_OSPEEDER_OSPEED8_1 GPIO_OSPEEDR_OSPEED8_1 +#define GPIO_OSPEEDER_OSPEED9_Pos GPIO_OSPEEDR_OSPEED9_Pos +#define GPIO_OSPEEDER_OSPEED9_Msk GPIO_OSPEEDR_OSPEED9_Msk +#define GPIO_OSPEEDER_OSPEED9 GPIO_OSPEEDR_OSPEED9 +#define GPIO_OSPEEDER_OSPEED9_0 GPIO_OSPEEDR_OSPEED9_0 +#define GPIO_OSPEEDER_OSPEED9_1 GPIO_OSPEEDR_OSPEED9_1 +#define GPIO_OSPEEDER_OSPEED10_Pos GPIO_OSPEEDR_OSPEED10_Pos +#define GPIO_OSPEEDER_OSPEED10_Msk GPIO_OSPEEDR_OSPEED10_Msk +#define GPIO_OSPEEDER_OSPEED10 GPIO_OSPEEDR_OSPEED10 +#define GPIO_OSPEEDER_OSPEED10_0 GPIO_OSPEEDR_OSPEED10_0 +#define GPIO_OSPEEDER_OSPEED10_1 GPIO_OSPEEDR_OSPEED10_1 +#define GPIO_OSPEEDER_OSPEED11_Pos GPIO_OSPEEDR_OSPEED11_Pos +#define GPIO_OSPEEDER_OSPEED11_Msk GPIO_OSPEEDR_OSPEED11_Msk +#define GPIO_OSPEEDER_OSPEED11 GPIO_OSPEEDR_OSPEED11 +#define GPIO_OSPEEDER_OSPEED11_0 GPIO_OSPEEDR_OSPEED11_0 +#define GPIO_OSPEEDER_OSPEED11_1 GPIO_OSPEEDR_OSPEED11_1 +#define GPIO_OSPEEDER_OSPEED12_Pos GPIO_OSPEEDR_OSPEED12_Pos +#define GPIO_OSPEEDER_OSPEED12_Msk GPIO_OSPEEDR_OSPEED12_Msk +#define GPIO_OSPEEDER_OSPEED12 GPIO_OSPEEDR_OSPEED12 +#define GPIO_OSPEEDER_OSPEED12_0 GPIO_OSPEEDR_OSPEED12_0 +#define GPIO_OSPEEDER_OSPEED12_1 GPIO_OSPEEDR_OSPEED12_1 +#define GPIO_OSPEEDER_OSPEED13_Pos GPIO_OSPEEDR_OSPEED13_Pos +#define GPIO_OSPEEDER_OSPEED13_Msk GPIO_OSPEEDR_OSPEED13_Msk +#define GPIO_OSPEEDER_OSPEED13 GPIO_OSPEEDR_OSPEED13 +#define GPIO_OSPEEDER_OSPEED13_0 GPIO_OSPEEDR_OSPEED13_0 +#define GPIO_OSPEEDER_OSPEED13_1 GPIO_OSPEEDR_OSPEED13_1 +#define GPIO_OSPEEDER_OSPEED14_Pos GPIO_OSPEEDR_OSPEED14_Pos +#define GPIO_OSPEEDER_OSPEED14_Msk GPIO_OSPEEDR_OSPEED14_Msk +#define GPIO_OSPEEDER_OSPEED14 GPIO_OSPEEDR_OSPEED14 +#define GPIO_OSPEEDER_OSPEED14_0 GPIO_OSPEEDR_OSPEED14_0 +#define GPIO_OSPEEDER_OSPEED14_1 GPIO_OSPEEDR_OSPEED14_1 +#define GPIO_OSPEEDER_OSPEED15_Pos GPIO_OSPEEDR_OSPEED15_Pos +#define GPIO_OSPEEDER_OSPEED15_Msk GPIO_OSPEEDR_OSPEED15_Msk +#define GPIO_OSPEEDER_OSPEED15 GPIO_OSPEEDR_OSPEED15 +#define GPIO_OSPEEDER_OSPEED15_0 GPIO_OSPEEDR_OSPEED15_0 +#define GPIO_OSPEEDER_OSPEED15_1 GPIO_OSPEEDR_OSPEED15_1 /******************* Bit definition for GPIO_PUPDR register ******************/ #define GPIO_PUPDR_PUPD0_Pos (0U) diff --git a/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l021xx.h b/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l021xx.h index a056668d39..fd2715d5d7 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l021xx.h +++ b/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l021xx.h @@ -2219,86 +2219,168 @@ typedef struct #define GPIO_OTYPER_OT_15 (0x00008000U) /**************** Bit definition for GPIO_OSPEEDR register ******************/ -#define GPIO_OSPEEDER_OSPEED0_Pos (0U) -#define GPIO_OSPEEDER_OSPEED0_Msk (0x3UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000003 */ -#define GPIO_OSPEEDER_OSPEED0 GPIO_OSPEEDER_OSPEED0_Msk -#define GPIO_OSPEEDER_OSPEED0_0 (0x1UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000001 */ -#define GPIO_OSPEEDER_OSPEED0_1 (0x2UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000002 */ -#define GPIO_OSPEEDER_OSPEED1_Pos (2U) -#define GPIO_OSPEEDER_OSPEED1_Msk (0x3UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x0000000C */ -#define GPIO_OSPEEDER_OSPEED1 GPIO_OSPEEDER_OSPEED1_Msk -#define GPIO_OSPEEDER_OSPEED1_0 (0x1UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x00000004 */ -#define GPIO_OSPEEDER_OSPEED1_1 (0x2UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x00000008 */ -#define GPIO_OSPEEDER_OSPEED2_Pos (4U) -#define GPIO_OSPEEDER_OSPEED2_Msk (0x3UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000030 */ -#define GPIO_OSPEEDER_OSPEED2 GPIO_OSPEEDER_OSPEED2_Msk -#define GPIO_OSPEEDER_OSPEED2_0 (0x1UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000010 */ -#define GPIO_OSPEEDER_OSPEED2_1 (0x2UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000020 */ -#define GPIO_OSPEEDER_OSPEED3_Pos (6U) -#define GPIO_OSPEEDER_OSPEED3_Msk (0x3UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x000000C0 */ -#define GPIO_OSPEEDER_OSPEED3 GPIO_OSPEEDER_OSPEED3_Msk -#define GPIO_OSPEEDER_OSPEED3_0 (0x1UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x00000040 */ -#define GPIO_OSPEEDER_OSPEED3_1 (0x2UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x00000080 */ -#define GPIO_OSPEEDER_OSPEED4_Pos (8U) -#define GPIO_OSPEEDER_OSPEED4_Msk (0x3UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000300 */ -#define GPIO_OSPEEDER_OSPEED4 GPIO_OSPEEDER_OSPEED4_Msk -#define GPIO_OSPEEDER_OSPEED4_0 (0x1UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000100 */ -#define GPIO_OSPEEDER_OSPEED4_1 (0x2UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000200 */ -#define GPIO_OSPEEDER_OSPEED5_Pos (10U) -#define GPIO_OSPEEDER_OSPEED5_Msk (0x3UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000C00 */ -#define GPIO_OSPEEDER_OSPEED5 GPIO_OSPEEDER_OSPEED5_Msk -#define GPIO_OSPEEDER_OSPEED5_0 (0x1UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000400 */ -#define GPIO_OSPEEDER_OSPEED5_1 (0x2UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000800 */ -#define GPIO_OSPEEDER_OSPEED6_Pos (12U) -#define GPIO_OSPEEDER_OSPEED6_Msk (0x3UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00003000 */ -#define GPIO_OSPEEDER_OSPEED6 GPIO_OSPEEDER_OSPEED6_Msk -#define GPIO_OSPEEDER_OSPEED6_0 (0x1UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00001000 */ -#define GPIO_OSPEEDER_OSPEED6_1 (0x2UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00002000 */ -#define GPIO_OSPEEDER_OSPEED7_Pos (14U) -#define GPIO_OSPEEDER_OSPEED7_Msk (0x3UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x0000C000 */ -#define GPIO_OSPEEDER_OSPEED7 GPIO_OSPEEDER_OSPEED7_Msk -#define GPIO_OSPEEDER_OSPEED7_0 (0x1UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x00004000 */ -#define GPIO_OSPEEDER_OSPEED7_1 (0x2UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x00008000 */ -#define GPIO_OSPEEDER_OSPEED8_Pos (16U) -#define GPIO_OSPEEDER_OSPEED8_Msk (0x3UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00030000 */ -#define GPIO_OSPEEDER_OSPEED8 GPIO_OSPEEDER_OSPEED8_Msk -#define GPIO_OSPEEDER_OSPEED8_0 (0x1UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00010000 */ -#define GPIO_OSPEEDER_OSPEED8_1 (0x2UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00020000 */ -#define GPIO_OSPEEDER_OSPEED9_Pos (18U) -#define GPIO_OSPEEDER_OSPEED9_Msk (0x3UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x000C0000 */ -#define GPIO_OSPEEDER_OSPEED9 GPIO_OSPEEDER_OSPEED9_Msk -#define GPIO_OSPEEDER_OSPEED9_0 (0x1UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x00040000 */ -#define GPIO_OSPEEDER_OSPEED9_1 (0x2UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x00080000 */ -#define GPIO_OSPEEDER_OSPEED10_Pos (20U) -#define GPIO_OSPEEDER_OSPEED10_Msk (0x3UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00300000 */ -#define GPIO_OSPEEDER_OSPEED10 GPIO_OSPEEDER_OSPEED10_Msk -#define GPIO_OSPEEDER_OSPEED10_0 (0x1UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00100000 */ -#define GPIO_OSPEEDER_OSPEED10_1 (0x2UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00200000 */ -#define GPIO_OSPEEDER_OSPEED11_Pos (22U) -#define GPIO_OSPEEDER_OSPEED11_Msk (0x3UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00C00000 */ -#define GPIO_OSPEEDER_OSPEED11 GPIO_OSPEEDER_OSPEED11_Msk -#define GPIO_OSPEEDER_OSPEED11_0 (0x1UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00400000 */ -#define GPIO_OSPEEDER_OSPEED11_1 (0x2UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00800000 */ -#define GPIO_OSPEEDER_OSPEED12_Pos (24U) -#define GPIO_OSPEEDER_OSPEED12_Msk (0x3UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x03000000 */ -#define GPIO_OSPEEDER_OSPEED12 GPIO_OSPEEDER_OSPEED12_Msk -#define GPIO_OSPEEDER_OSPEED12_0 (0x1UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x01000000 */ -#define GPIO_OSPEEDER_OSPEED12_1 (0x2UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x02000000 */ -#define GPIO_OSPEEDER_OSPEED13_Pos (26U) -#define GPIO_OSPEEDER_OSPEED13_Msk (0x3UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x0C000000 */ -#define GPIO_OSPEEDER_OSPEED13 GPIO_OSPEEDER_OSPEED13_Msk -#define GPIO_OSPEEDER_OSPEED13_0 (0x1UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x04000000 */ -#define GPIO_OSPEEDER_OSPEED13_1 (0x2UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x08000000 */ -#define GPIO_OSPEEDER_OSPEED14_Pos (28U) -#define GPIO_OSPEEDER_OSPEED14_Msk (0x3UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x30000000 */ -#define GPIO_OSPEEDER_OSPEED14 GPIO_OSPEEDER_OSPEED14_Msk -#define GPIO_OSPEEDER_OSPEED14_0 (0x1UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x10000000 */ -#define GPIO_OSPEEDER_OSPEED14_1 (0x2UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x20000000 */ -#define GPIO_OSPEEDER_OSPEED15_Pos (30U) -#define GPIO_OSPEEDER_OSPEED15_Msk (0x3UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0xC0000000 */ -#define GPIO_OSPEEDER_OSPEED15 GPIO_OSPEEDER_OSPEED15_Msk -#define GPIO_OSPEEDER_OSPEED15_0 (0x1UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0x40000000 */ -#define GPIO_OSPEEDER_OSPEED15_1 (0x2UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0x80000000 */ +#define GPIO_OSPEEDR_OSPEED0_Pos (0U) +#define GPIO_OSPEEDR_OSPEED0_Msk (0x3UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000003 */ +#define GPIO_OSPEEDR_OSPEED0 GPIO_OSPEEDR_OSPEED0_Msk +#define GPIO_OSPEEDR_OSPEED0_0 (0x1UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000001 */ +#define GPIO_OSPEEDR_OSPEED0_1 (0x2UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000002 */ +#define GPIO_OSPEEDR_OSPEED1_Pos (2U) +#define GPIO_OSPEEDR_OSPEED1_Msk (0x3UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x0000000C */ +#define GPIO_OSPEEDR_OSPEED1 GPIO_OSPEEDR_OSPEED1_Msk +#define GPIO_OSPEEDR_OSPEED1_0 (0x1UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x00000004 */ +#define GPIO_OSPEEDR_OSPEED1_1 (0x2UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x00000008 */ +#define GPIO_OSPEEDR_OSPEED2_Pos (4U) +#define GPIO_OSPEEDR_OSPEED2_Msk (0x3UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000030 */ +#define GPIO_OSPEEDR_OSPEED2 GPIO_OSPEEDR_OSPEED2_Msk +#define GPIO_OSPEEDR_OSPEED2_0 (0x1UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000010 */ +#define GPIO_OSPEEDR_OSPEED2_1 (0x2UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000020 */ +#define GPIO_OSPEEDR_OSPEED3_Pos (6U) +#define GPIO_OSPEEDR_OSPEED3_Msk (0x3UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x000000C0 */ +#define GPIO_OSPEEDR_OSPEED3 GPIO_OSPEEDR_OSPEED3_Msk +#define GPIO_OSPEEDR_OSPEED3_0 (0x1UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x00000040 */ +#define GPIO_OSPEEDR_OSPEED3_1 (0x2UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x00000080 */ +#define GPIO_OSPEEDR_OSPEED4_Pos (8U) +#define GPIO_OSPEEDR_OSPEED4_Msk (0x3UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000300 */ +#define GPIO_OSPEEDR_OSPEED4 GPIO_OSPEEDR_OSPEED4_Msk +#define GPIO_OSPEEDR_OSPEED4_0 (0x1UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000100 */ +#define GPIO_OSPEEDR_OSPEED4_1 (0x2UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000200 */ +#define GPIO_OSPEEDR_OSPEED5_Pos (10U) +#define GPIO_OSPEEDR_OSPEED5_Msk (0x3UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000C00 */ +#define GPIO_OSPEEDR_OSPEED5 GPIO_OSPEEDR_OSPEED5_Msk +#define GPIO_OSPEEDR_OSPEED5_0 (0x1UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000400 */ +#define GPIO_OSPEEDR_OSPEED5_1 (0x2UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000800 */ +#define GPIO_OSPEEDR_OSPEED6_Pos (12U) +#define GPIO_OSPEEDR_OSPEED6_Msk (0x3UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00003000 */ +#define GPIO_OSPEEDR_OSPEED6 GPIO_OSPEEDR_OSPEED6_Msk +#define GPIO_OSPEEDR_OSPEED6_0 (0x1UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00001000 */ +#define GPIO_OSPEEDR_OSPEED6_1 (0x2UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00002000 */ +#define GPIO_OSPEEDR_OSPEED7_Pos (14U) +#define GPIO_OSPEEDR_OSPEED7_Msk (0x3UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x0000C000 */ +#define GPIO_OSPEEDR_OSPEED7 GPIO_OSPEEDR_OSPEED7_Msk +#define GPIO_OSPEEDR_OSPEED7_0 (0x1UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x00004000 */ +#define GPIO_OSPEEDR_OSPEED7_1 (0x2UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x00008000 */ +#define GPIO_OSPEEDR_OSPEED8_Pos (16U) +#define GPIO_OSPEEDR_OSPEED8_Msk (0x3UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00030000 */ +#define GPIO_OSPEEDR_OSPEED8 GPIO_OSPEEDR_OSPEED8_Msk +#define GPIO_OSPEEDR_OSPEED8_0 (0x1UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00010000 */ +#define GPIO_OSPEEDR_OSPEED8_1 (0x2UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00020000 */ +#define GPIO_OSPEEDR_OSPEED9_Pos (18U) +#define GPIO_OSPEEDR_OSPEED9_Msk (0x3UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x000C0000 */ +#define GPIO_OSPEEDR_OSPEED9 GPIO_OSPEEDR_OSPEED9_Msk +#define GPIO_OSPEEDR_OSPEED9_0 (0x1UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x00040000 */ +#define GPIO_OSPEEDR_OSPEED9_1 (0x2UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x00080000 */ +#define GPIO_OSPEEDR_OSPEED10_Pos (20U) +#define GPIO_OSPEEDR_OSPEED10_Msk (0x3UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00300000 */ +#define GPIO_OSPEEDR_OSPEED10 GPIO_OSPEEDR_OSPEED10_Msk +#define GPIO_OSPEEDR_OSPEED10_0 (0x1UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00100000 */ +#define GPIO_OSPEEDR_OSPEED10_1 (0x2UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00200000 */ +#define GPIO_OSPEEDR_OSPEED11_Pos (22U) +#define GPIO_OSPEEDR_OSPEED11_Msk (0x3UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00C00000 */ +#define GPIO_OSPEEDR_OSPEED11 GPIO_OSPEEDR_OSPEED11_Msk +#define GPIO_OSPEEDR_OSPEED11_0 (0x1UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00400000 */ +#define GPIO_OSPEEDR_OSPEED11_1 (0x2UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00800000 */ +#define GPIO_OSPEEDR_OSPEED12_Pos (24U) +#define GPIO_OSPEEDR_OSPEED12_Msk (0x3UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x03000000 */ +#define GPIO_OSPEEDR_OSPEED12 GPIO_OSPEEDR_OSPEED12_Msk +#define GPIO_OSPEEDR_OSPEED12_0 (0x1UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x01000000 */ +#define GPIO_OSPEEDR_OSPEED12_1 (0x2UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x02000000 */ +#define GPIO_OSPEEDR_OSPEED13_Pos (26U) +#define GPIO_OSPEEDR_OSPEED13_Msk (0x3UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x0C000000 */ +#define GPIO_OSPEEDR_OSPEED13 GPIO_OSPEEDR_OSPEED13_Msk +#define GPIO_OSPEEDR_OSPEED13_0 (0x1UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x04000000 */ +#define GPIO_OSPEEDR_OSPEED13_1 (0x2UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x08000000 */ +#define GPIO_OSPEEDR_OSPEED14_Pos (28U) +#define GPIO_OSPEEDR_OSPEED14_Msk (0x3UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x30000000 */ +#define GPIO_OSPEEDR_OSPEED14 GPIO_OSPEEDR_OSPEED14_Msk +#define GPIO_OSPEEDR_OSPEED14_0 (0x1UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x10000000 */ +#define GPIO_OSPEEDR_OSPEED14_1 (0x2UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x20000000 */ +#define GPIO_OSPEEDR_OSPEED15_Pos (30U) +#define GPIO_OSPEEDR_OSPEED15_Msk (0x3UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0xC0000000 */ +#define GPIO_OSPEEDR_OSPEED15 GPIO_OSPEEDR_OSPEED15_Msk +#define GPIO_OSPEEDR_OSPEED15_0 (0x1UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0x40000000 */ +#define GPIO_OSPEEDR_OSPEED15_1 (0x2UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0x80000000 */ + +/* Legacy defines */ +#define GPIO_OSPEEDER_OSPEED0_Pos GPIO_OSPEEDR_OSPEED0_Pos +#define GPIO_OSPEEDER_OSPEED0_Msk GPIO_OSPEEDR_OSPEED0_Msk +#define GPIO_OSPEEDER_OSPEED0 GPIO_OSPEEDR_OSPEED0 +#define GPIO_OSPEEDER_OSPEED0_0 GPIO_OSPEEDR_OSPEED0_0 +#define GPIO_OSPEEDER_OSPEED0_1 GPIO_OSPEEDR_OSPEED0_1 +#define GPIO_OSPEEDER_OSPEED1_Pos GPIO_OSPEEDR_OSPEED1_Pos +#define GPIO_OSPEEDER_OSPEED1_Msk GPIO_OSPEEDR_OSPEED1_Msk +#define GPIO_OSPEEDER_OSPEED1 GPIO_OSPEEDR_OSPEED1 +#define GPIO_OSPEEDER_OSPEED1_0 GPIO_OSPEEDR_OSPEED1_0 +#define GPIO_OSPEEDER_OSPEED1_1 GPIO_OSPEEDR_OSPEED1_1 +#define GPIO_OSPEEDER_OSPEED2_Pos GPIO_OSPEEDR_OSPEED2_Pos +#define GPIO_OSPEEDER_OSPEED2_Msk GPIO_OSPEEDR_OSPEED2_Msk +#define GPIO_OSPEEDER_OSPEED2 GPIO_OSPEEDR_OSPEED2 +#define GPIO_OSPEEDER_OSPEED2_0 GPIO_OSPEEDR_OSPEED2_0 +#define GPIO_OSPEEDER_OSPEED2_1 GPIO_OSPEEDR_OSPEED2_1 +#define GPIO_OSPEEDER_OSPEED3_Pos GPIO_OSPEEDR_OSPEED3_Pos +#define GPIO_OSPEEDER_OSPEED3_Msk GPIO_OSPEEDR_OSPEED3_Msk +#define GPIO_OSPEEDER_OSPEED3 GPIO_OSPEEDR_OSPEED3 +#define GPIO_OSPEEDER_OSPEED3_0 GPIO_OSPEEDR_OSPEED3_0 +#define GPIO_OSPEEDER_OSPEED3_1 GPIO_OSPEEDR_OSPEED3_1 +#define GPIO_OSPEEDER_OSPEED4_Pos GPIO_OSPEEDR_OSPEED4_Pos +#define GPIO_OSPEEDER_OSPEED4_Msk GPIO_OSPEEDR_OSPEED4_Msk +#define GPIO_OSPEEDER_OSPEED4 GPIO_OSPEEDR_OSPEED4 +#define GPIO_OSPEEDER_OSPEED4_0 GPIO_OSPEEDR_OSPEED4_0 +#define GPIO_OSPEEDER_OSPEED4_1 GPIO_OSPEEDR_OSPEED4_1 +#define GPIO_OSPEEDER_OSPEED5_Pos GPIO_OSPEEDR_OSPEED5_Pos +#define GPIO_OSPEEDER_OSPEED5_Msk GPIO_OSPEEDR_OSPEED5_Msk +#define GPIO_OSPEEDER_OSPEED5 GPIO_OSPEEDR_OSPEED5 +#define GPIO_OSPEEDER_OSPEED5_0 GPIO_OSPEEDR_OSPEED5_0 +#define GPIO_OSPEEDER_OSPEED5_1 GPIO_OSPEEDR_OSPEED5_1 +#define GPIO_OSPEEDER_OSPEED6_Pos GPIO_OSPEEDR_OSPEED6_Pos +#define GPIO_OSPEEDER_OSPEED6_Msk GPIO_OSPEEDR_OSPEED6_Msk +#define GPIO_OSPEEDER_OSPEED6 GPIO_OSPEEDR_OSPEED6 +#define GPIO_OSPEEDER_OSPEED6_0 GPIO_OSPEEDR_OSPEED6_0 +#define GPIO_OSPEEDER_OSPEED6_1 GPIO_OSPEEDR_OSPEED6_1 +#define GPIO_OSPEEDER_OSPEED7_Pos GPIO_OSPEEDR_OSPEED7_Pos +#define GPIO_OSPEEDER_OSPEED7_Msk GPIO_OSPEEDR_OSPEED7_Msk +#define GPIO_OSPEEDER_OSPEED7 GPIO_OSPEEDR_OSPEED7 +#define GPIO_OSPEEDER_OSPEED7_0 GPIO_OSPEEDR_OSPEED7_0 +#define GPIO_OSPEEDER_OSPEED7_1 GPIO_OSPEEDR_OSPEED7_1 +#define GPIO_OSPEEDER_OSPEED8_Pos GPIO_OSPEEDR_OSPEED8_Pos +#define GPIO_OSPEEDER_OSPEED8_Msk GPIO_OSPEEDR_OSPEED8_Msk +#define GPIO_OSPEEDER_OSPEED8 GPIO_OSPEEDR_OSPEED8 +#define GPIO_OSPEEDER_OSPEED8_0 GPIO_OSPEEDR_OSPEED8_0 +#define GPIO_OSPEEDER_OSPEED8_1 GPIO_OSPEEDR_OSPEED8_1 +#define GPIO_OSPEEDER_OSPEED9_Pos GPIO_OSPEEDR_OSPEED9_Pos +#define GPIO_OSPEEDER_OSPEED9_Msk GPIO_OSPEEDR_OSPEED9_Msk +#define GPIO_OSPEEDER_OSPEED9 GPIO_OSPEEDR_OSPEED9 +#define GPIO_OSPEEDER_OSPEED9_0 GPIO_OSPEEDR_OSPEED9_0 +#define GPIO_OSPEEDER_OSPEED9_1 GPIO_OSPEEDR_OSPEED9_1 +#define GPIO_OSPEEDER_OSPEED10_Pos GPIO_OSPEEDR_OSPEED10_Pos +#define GPIO_OSPEEDER_OSPEED10_Msk GPIO_OSPEEDR_OSPEED10_Msk +#define GPIO_OSPEEDER_OSPEED10 GPIO_OSPEEDR_OSPEED10 +#define GPIO_OSPEEDER_OSPEED10_0 GPIO_OSPEEDR_OSPEED10_0 +#define GPIO_OSPEEDER_OSPEED10_1 GPIO_OSPEEDR_OSPEED10_1 +#define GPIO_OSPEEDER_OSPEED11_Pos GPIO_OSPEEDR_OSPEED11_Pos +#define GPIO_OSPEEDER_OSPEED11_Msk GPIO_OSPEEDR_OSPEED11_Msk +#define GPIO_OSPEEDER_OSPEED11 GPIO_OSPEEDR_OSPEED11 +#define GPIO_OSPEEDER_OSPEED11_0 GPIO_OSPEEDR_OSPEED11_0 +#define GPIO_OSPEEDER_OSPEED11_1 GPIO_OSPEEDR_OSPEED11_1 +#define GPIO_OSPEEDER_OSPEED12_Pos GPIO_OSPEEDR_OSPEED12_Pos +#define GPIO_OSPEEDER_OSPEED12_Msk GPIO_OSPEEDR_OSPEED12_Msk +#define GPIO_OSPEEDER_OSPEED12 GPIO_OSPEEDR_OSPEED12 +#define GPIO_OSPEEDER_OSPEED12_0 GPIO_OSPEEDR_OSPEED12_0 +#define GPIO_OSPEEDER_OSPEED12_1 GPIO_OSPEEDR_OSPEED12_1 +#define GPIO_OSPEEDER_OSPEED13_Pos GPIO_OSPEEDR_OSPEED13_Pos +#define GPIO_OSPEEDER_OSPEED13_Msk GPIO_OSPEEDR_OSPEED13_Msk +#define GPIO_OSPEEDER_OSPEED13 GPIO_OSPEEDR_OSPEED13 +#define GPIO_OSPEEDER_OSPEED13_0 GPIO_OSPEEDR_OSPEED13_0 +#define GPIO_OSPEEDER_OSPEED13_1 GPIO_OSPEEDR_OSPEED13_1 +#define GPIO_OSPEEDER_OSPEED14_Pos GPIO_OSPEEDR_OSPEED14_Pos +#define GPIO_OSPEEDER_OSPEED14_Msk GPIO_OSPEEDR_OSPEED14_Msk +#define GPIO_OSPEEDER_OSPEED14 GPIO_OSPEEDR_OSPEED14 +#define GPIO_OSPEEDER_OSPEED14_0 GPIO_OSPEEDR_OSPEED14_0 +#define GPIO_OSPEEDER_OSPEED14_1 GPIO_OSPEEDR_OSPEED14_1 +#define GPIO_OSPEEDER_OSPEED15_Pos GPIO_OSPEEDR_OSPEED15_Pos +#define GPIO_OSPEEDER_OSPEED15_Msk GPIO_OSPEEDR_OSPEED15_Msk +#define GPIO_OSPEEDER_OSPEED15 GPIO_OSPEEDR_OSPEED15 +#define GPIO_OSPEEDER_OSPEED15_0 GPIO_OSPEEDR_OSPEED15_0 +#define GPIO_OSPEEDER_OSPEED15_1 GPIO_OSPEEDR_OSPEED15_1 /******************* Bit definition for GPIO_PUPDR register ******************/ #define GPIO_PUPDR_PUPD0_Pos (0U) diff --git a/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l031xx.h b/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l031xx.h index dc83514cef..379556f619 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l031xx.h +++ b/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l031xx.h @@ -2157,86 +2157,168 @@ typedef struct #define GPIO_OTYPER_OT_15 (0x00008000U) /**************** Bit definition for GPIO_OSPEEDR register ******************/ -#define GPIO_OSPEEDER_OSPEED0_Pos (0U) -#define GPIO_OSPEEDER_OSPEED0_Msk (0x3UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000003 */ -#define GPIO_OSPEEDER_OSPEED0 GPIO_OSPEEDER_OSPEED0_Msk -#define GPIO_OSPEEDER_OSPEED0_0 (0x1UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000001 */ -#define GPIO_OSPEEDER_OSPEED0_1 (0x2UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000002 */ -#define GPIO_OSPEEDER_OSPEED1_Pos (2U) -#define GPIO_OSPEEDER_OSPEED1_Msk (0x3UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x0000000C */ -#define GPIO_OSPEEDER_OSPEED1 GPIO_OSPEEDER_OSPEED1_Msk -#define GPIO_OSPEEDER_OSPEED1_0 (0x1UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x00000004 */ -#define GPIO_OSPEEDER_OSPEED1_1 (0x2UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x00000008 */ -#define GPIO_OSPEEDER_OSPEED2_Pos (4U) -#define GPIO_OSPEEDER_OSPEED2_Msk (0x3UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000030 */ -#define GPIO_OSPEEDER_OSPEED2 GPIO_OSPEEDER_OSPEED2_Msk -#define GPIO_OSPEEDER_OSPEED2_0 (0x1UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000010 */ -#define GPIO_OSPEEDER_OSPEED2_1 (0x2UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000020 */ -#define GPIO_OSPEEDER_OSPEED3_Pos (6U) -#define GPIO_OSPEEDER_OSPEED3_Msk (0x3UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x000000C0 */ -#define GPIO_OSPEEDER_OSPEED3 GPIO_OSPEEDER_OSPEED3_Msk -#define GPIO_OSPEEDER_OSPEED3_0 (0x1UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x00000040 */ -#define GPIO_OSPEEDER_OSPEED3_1 (0x2UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x00000080 */ -#define GPIO_OSPEEDER_OSPEED4_Pos (8U) -#define GPIO_OSPEEDER_OSPEED4_Msk (0x3UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000300 */ -#define GPIO_OSPEEDER_OSPEED4 GPIO_OSPEEDER_OSPEED4_Msk -#define GPIO_OSPEEDER_OSPEED4_0 (0x1UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000100 */ -#define GPIO_OSPEEDER_OSPEED4_1 (0x2UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000200 */ -#define GPIO_OSPEEDER_OSPEED5_Pos (10U) -#define GPIO_OSPEEDER_OSPEED5_Msk (0x3UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000C00 */ -#define GPIO_OSPEEDER_OSPEED5 GPIO_OSPEEDER_OSPEED5_Msk -#define GPIO_OSPEEDER_OSPEED5_0 (0x1UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000400 */ -#define GPIO_OSPEEDER_OSPEED5_1 (0x2UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000800 */ -#define GPIO_OSPEEDER_OSPEED6_Pos (12U) -#define GPIO_OSPEEDER_OSPEED6_Msk (0x3UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00003000 */ -#define GPIO_OSPEEDER_OSPEED6 GPIO_OSPEEDER_OSPEED6_Msk -#define GPIO_OSPEEDER_OSPEED6_0 (0x1UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00001000 */ -#define GPIO_OSPEEDER_OSPEED6_1 (0x2UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00002000 */ -#define GPIO_OSPEEDER_OSPEED7_Pos (14U) -#define GPIO_OSPEEDER_OSPEED7_Msk (0x3UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x0000C000 */ -#define GPIO_OSPEEDER_OSPEED7 GPIO_OSPEEDER_OSPEED7_Msk -#define GPIO_OSPEEDER_OSPEED7_0 (0x1UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x00004000 */ -#define GPIO_OSPEEDER_OSPEED7_1 (0x2UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x00008000 */ -#define GPIO_OSPEEDER_OSPEED8_Pos (16U) -#define GPIO_OSPEEDER_OSPEED8_Msk (0x3UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00030000 */ -#define GPIO_OSPEEDER_OSPEED8 GPIO_OSPEEDER_OSPEED8_Msk -#define GPIO_OSPEEDER_OSPEED8_0 (0x1UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00010000 */ -#define GPIO_OSPEEDER_OSPEED8_1 (0x2UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00020000 */ -#define GPIO_OSPEEDER_OSPEED9_Pos (18U) -#define GPIO_OSPEEDER_OSPEED9_Msk (0x3UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x000C0000 */ -#define GPIO_OSPEEDER_OSPEED9 GPIO_OSPEEDER_OSPEED9_Msk -#define GPIO_OSPEEDER_OSPEED9_0 (0x1UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x00040000 */ -#define GPIO_OSPEEDER_OSPEED9_1 (0x2UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x00080000 */ -#define GPIO_OSPEEDER_OSPEED10_Pos (20U) -#define GPIO_OSPEEDER_OSPEED10_Msk (0x3UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00300000 */ -#define GPIO_OSPEEDER_OSPEED10 GPIO_OSPEEDER_OSPEED10_Msk -#define GPIO_OSPEEDER_OSPEED10_0 (0x1UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00100000 */ -#define GPIO_OSPEEDER_OSPEED10_1 (0x2UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00200000 */ -#define GPIO_OSPEEDER_OSPEED11_Pos (22U) -#define GPIO_OSPEEDER_OSPEED11_Msk (0x3UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00C00000 */ -#define GPIO_OSPEEDER_OSPEED11 GPIO_OSPEEDER_OSPEED11_Msk -#define GPIO_OSPEEDER_OSPEED11_0 (0x1UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00400000 */ -#define GPIO_OSPEEDER_OSPEED11_1 (0x2UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00800000 */ -#define GPIO_OSPEEDER_OSPEED12_Pos (24U) -#define GPIO_OSPEEDER_OSPEED12_Msk (0x3UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x03000000 */ -#define GPIO_OSPEEDER_OSPEED12 GPIO_OSPEEDER_OSPEED12_Msk -#define GPIO_OSPEEDER_OSPEED12_0 (0x1UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x01000000 */ -#define GPIO_OSPEEDER_OSPEED12_1 (0x2UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x02000000 */ -#define GPIO_OSPEEDER_OSPEED13_Pos (26U) -#define GPIO_OSPEEDER_OSPEED13_Msk (0x3UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x0C000000 */ -#define GPIO_OSPEEDER_OSPEED13 GPIO_OSPEEDER_OSPEED13_Msk -#define GPIO_OSPEEDER_OSPEED13_0 (0x1UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x04000000 */ -#define GPIO_OSPEEDER_OSPEED13_1 (0x2UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x08000000 */ -#define GPIO_OSPEEDER_OSPEED14_Pos (28U) -#define GPIO_OSPEEDER_OSPEED14_Msk (0x3UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x30000000 */ -#define GPIO_OSPEEDER_OSPEED14 GPIO_OSPEEDER_OSPEED14_Msk -#define GPIO_OSPEEDER_OSPEED14_0 (0x1UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x10000000 */ -#define GPIO_OSPEEDER_OSPEED14_1 (0x2UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x20000000 */ -#define GPIO_OSPEEDER_OSPEED15_Pos (30U) -#define GPIO_OSPEEDER_OSPEED15_Msk (0x3UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0xC0000000 */ -#define GPIO_OSPEEDER_OSPEED15 GPIO_OSPEEDER_OSPEED15_Msk -#define GPIO_OSPEEDER_OSPEED15_0 (0x1UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0x40000000 */ -#define GPIO_OSPEEDER_OSPEED15_1 (0x2UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0x80000000 */ +#define GPIO_OSPEEDR_OSPEED0_Pos (0U) +#define GPIO_OSPEEDR_OSPEED0_Msk (0x3UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000003 */ +#define GPIO_OSPEEDR_OSPEED0 GPIO_OSPEEDR_OSPEED0_Msk +#define GPIO_OSPEEDR_OSPEED0_0 (0x1UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000001 */ +#define GPIO_OSPEEDR_OSPEED0_1 (0x2UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000002 */ +#define GPIO_OSPEEDR_OSPEED1_Pos (2U) +#define GPIO_OSPEEDR_OSPEED1_Msk (0x3UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x0000000C */ +#define GPIO_OSPEEDR_OSPEED1 GPIO_OSPEEDR_OSPEED1_Msk +#define GPIO_OSPEEDR_OSPEED1_0 (0x1UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x00000004 */ +#define GPIO_OSPEEDR_OSPEED1_1 (0x2UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x00000008 */ +#define GPIO_OSPEEDR_OSPEED2_Pos (4U) +#define GPIO_OSPEEDR_OSPEED2_Msk (0x3UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000030 */ +#define GPIO_OSPEEDR_OSPEED2 GPIO_OSPEEDR_OSPEED2_Msk +#define GPIO_OSPEEDR_OSPEED2_0 (0x1UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000010 */ +#define GPIO_OSPEEDR_OSPEED2_1 (0x2UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000020 */ +#define GPIO_OSPEEDR_OSPEED3_Pos (6U) +#define GPIO_OSPEEDR_OSPEED3_Msk (0x3UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x000000C0 */ +#define GPIO_OSPEEDR_OSPEED3 GPIO_OSPEEDR_OSPEED3_Msk +#define GPIO_OSPEEDR_OSPEED3_0 (0x1UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x00000040 */ +#define GPIO_OSPEEDR_OSPEED3_1 (0x2UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x00000080 */ +#define GPIO_OSPEEDR_OSPEED4_Pos (8U) +#define GPIO_OSPEEDR_OSPEED4_Msk (0x3UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000300 */ +#define GPIO_OSPEEDR_OSPEED4 GPIO_OSPEEDR_OSPEED4_Msk +#define GPIO_OSPEEDR_OSPEED4_0 (0x1UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000100 */ +#define GPIO_OSPEEDR_OSPEED4_1 (0x2UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000200 */ +#define GPIO_OSPEEDR_OSPEED5_Pos (10U) +#define GPIO_OSPEEDR_OSPEED5_Msk (0x3UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000C00 */ +#define GPIO_OSPEEDR_OSPEED5 GPIO_OSPEEDR_OSPEED5_Msk +#define GPIO_OSPEEDR_OSPEED5_0 (0x1UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000400 */ +#define GPIO_OSPEEDR_OSPEED5_1 (0x2UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000800 */ +#define GPIO_OSPEEDR_OSPEED6_Pos (12U) +#define GPIO_OSPEEDR_OSPEED6_Msk (0x3UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00003000 */ +#define GPIO_OSPEEDR_OSPEED6 GPIO_OSPEEDR_OSPEED6_Msk +#define GPIO_OSPEEDR_OSPEED6_0 (0x1UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00001000 */ +#define GPIO_OSPEEDR_OSPEED6_1 (0x2UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00002000 */ +#define GPIO_OSPEEDR_OSPEED7_Pos (14U) +#define GPIO_OSPEEDR_OSPEED7_Msk (0x3UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x0000C000 */ +#define GPIO_OSPEEDR_OSPEED7 GPIO_OSPEEDR_OSPEED7_Msk +#define GPIO_OSPEEDR_OSPEED7_0 (0x1UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x00004000 */ +#define GPIO_OSPEEDR_OSPEED7_1 (0x2UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x00008000 */ +#define GPIO_OSPEEDR_OSPEED8_Pos (16U) +#define GPIO_OSPEEDR_OSPEED8_Msk (0x3UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00030000 */ +#define GPIO_OSPEEDR_OSPEED8 GPIO_OSPEEDR_OSPEED8_Msk +#define GPIO_OSPEEDR_OSPEED8_0 (0x1UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00010000 */ +#define GPIO_OSPEEDR_OSPEED8_1 (0x2UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00020000 */ +#define GPIO_OSPEEDR_OSPEED9_Pos (18U) +#define GPIO_OSPEEDR_OSPEED9_Msk (0x3UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x000C0000 */ +#define GPIO_OSPEEDR_OSPEED9 GPIO_OSPEEDR_OSPEED9_Msk +#define GPIO_OSPEEDR_OSPEED9_0 (0x1UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x00040000 */ +#define GPIO_OSPEEDR_OSPEED9_1 (0x2UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x00080000 */ +#define GPIO_OSPEEDR_OSPEED10_Pos (20U) +#define GPIO_OSPEEDR_OSPEED10_Msk (0x3UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00300000 */ +#define GPIO_OSPEEDR_OSPEED10 GPIO_OSPEEDR_OSPEED10_Msk +#define GPIO_OSPEEDR_OSPEED10_0 (0x1UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00100000 */ +#define GPIO_OSPEEDR_OSPEED10_1 (0x2UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00200000 */ +#define GPIO_OSPEEDR_OSPEED11_Pos (22U) +#define GPIO_OSPEEDR_OSPEED11_Msk (0x3UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00C00000 */ +#define GPIO_OSPEEDR_OSPEED11 GPIO_OSPEEDR_OSPEED11_Msk +#define GPIO_OSPEEDR_OSPEED11_0 (0x1UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00400000 */ +#define GPIO_OSPEEDR_OSPEED11_1 (0x2UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00800000 */ +#define GPIO_OSPEEDR_OSPEED12_Pos (24U) +#define GPIO_OSPEEDR_OSPEED12_Msk (0x3UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x03000000 */ +#define GPIO_OSPEEDR_OSPEED12 GPIO_OSPEEDR_OSPEED12_Msk +#define GPIO_OSPEEDR_OSPEED12_0 (0x1UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x01000000 */ +#define GPIO_OSPEEDR_OSPEED12_1 (0x2UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x02000000 */ +#define GPIO_OSPEEDR_OSPEED13_Pos (26U) +#define GPIO_OSPEEDR_OSPEED13_Msk (0x3UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x0C000000 */ +#define GPIO_OSPEEDR_OSPEED13 GPIO_OSPEEDR_OSPEED13_Msk +#define GPIO_OSPEEDR_OSPEED13_0 (0x1UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x04000000 */ +#define GPIO_OSPEEDR_OSPEED13_1 (0x2UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x08000000 */ +#define GPIO_OSPEEDR_OSPEED14_Pos (28U) +#define GPIO_OSPEEDR_OSPEED14_Msk (0x3UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x30000000 */ +#define GPIO_OSPEEDR_OSPEED14 GPIO_OSPEEDR_OSPEED14_Msk +#define GPIO_OSPEEDR_OSPEED14_0 (0x1UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x10000000 */ +#define GPIO_OSPEEDR_OSPEED14_1 (0x2UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x20000000 */ +#define GPIO_OSPEEDR_OSPEED15_Pos (30U) +#define GPIO_OSPEEDR_OSPEED15_Msk (0x3UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0xC0000000 */ +#define GPIO_OSPEEDR_OSPEED15 GPIO_OSPEEDR_OSPEED15_Msk +#define GPIO_OSPEEDR_OSPEED15_0 (0x1UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0x40000000 */ +#define GPIO_OSPEEDR_OSPEED15_1 (0x2UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0x80000000 */ + +/* Legacy defines */ +#define GPIO_OSPEEDER_OSPEED0_Pos GPIO_OSPEEDR_OSPEED0_Pos +#define GPIO_OSPEEDER_OSPEED0_Msk GPIO_OSPEEDR_OSPEED0_Msk +#define GPIO_OSPEEDER_OSPEED0 GPIO_OSPEEDR_OSPEED0 +#define GPIO_OSPEEDER_OSPEED0_0 GPIO_OSPEEDR_OSPEED0_0 +#define GPIO_OSPEEDER_OSPEED0_1 GPIO_OSPEEDR_OSPEED0_1 +#define GPIO_OSPEEDER_OSPEED1_Pos GPIO_OSPEEDR_OSPEED1_Pos +#define GPIO_OSPEEDER_OSPEED1_Msk GPIO_OSPEEDR_OSPEED1_Msk +#define GPIO_OSPEEDER_OSPEED1 GPIO_OSPEEDR_OSPEED1 +#define GPIO_OSPEEDER_OSPEED1_0 GPIO_OSPEEDR_OSPEED1_0 +#define GPIO_OSPEEDER_OSPEED1_1 GPIO_OSPEEDR_OSPEED1_1 +#define GPIO_OSPEEDER_OSPEED2_Pos GPIO_OSPEEDR_OSPEED2_Pos +#define GPIO_OSPEEDER_OSPEED2_Msk GPIO_OSPEEDR_OSPEED2_Msk +#define GPIO_OSPEEDER_OSPEED2 GPIO_OSPEEDR_OSPEED2 +#define GPIO_OSPEEDER_OSPEED2_0 GPIO_OSPEEDR_OSPEED2_0 +#define GPIO_OSPEEDER_OSPEED2_1 GPIO_OSPEEDR_OSPEED2_1 +#define GPIO_OSPEEDER_OSPEED3_Pos GPIO_OSPEEDR_OSPEED3_Pos +#define GPIO_OSPEEDER_OSPEED3_Msk GPIO_OSPEEDR_OSPEED3_Msk +#define GPIO_OSPEEDER_OSPEED3 GPIO_OSPEEDR_OSPEED3 +#define GPIO_OSPEEDER_OSPEED3_0 GPIO_OSPEEDR_OSPEED3_0 +#define GPIO_OSPEEDER_OSPEED3_1 GPIO_OSPEEDR_OSPEED3_1 +#define GPIO_OSPEEDER_OSPEED4_Pos GPIO_OSPEEDR_OSPEED4_Pos +#define GPIO_OSPEEDER_OSPEED4_Msk GPIO_OSPEEDR_OSPEED4_Msk +#define GPIO_OSPEEDER_OSPEED4 GPIO_OSPEEDR_OSPEED4 +#define GPIO_OSPEEDER_OSPEED4_0 GPIO_OSPEEDR_OSPEED4_0 +#define GPIO_OSPEEDER_OSPEED4_1 GPIO_OSPEEDR_OSPEED4_1 +#define GPIO_OSPEEDER_OSPEED5_Pos GPIO_OSPEEDR_OSPEED5_Pos +#define GPIO_OSPEEDER_OSPEED5_Msk GPIO_OSPEEDR_OSPEED5_Msk +#define GPIO_OSPEEDER_OSPEED5 GPIO_OSPEEDR_OSPEED5 +#define GPIO_OSPEEDER_OSPEED5_0 GPIO_OSPEEDR_OSPEED5_0 +#define GPIO_OSPEEDER_OSPEED5_1 GPIO_OSPEEDR_OSPEED5_1 +#define GPIO_OSPEEDER_OSPEED6_Pos GPIO_OSPEEDR_OSPEED6_Pos +#define GPIO_OSPEEDER_OSPEED6_Msk GPIO_OSPEEDR_OSPEED6_Msk +#define GPIO_OSPEEDER_OSPEED6 GPIO_OSPEEDR_OSPEED6 +#define GPIO_OSPEEDER_OSPEED6_0 GPIO_OSPEEDR_OSPEED6_0 +#define GPIO_OSPEEDER_OSPEED6_1 GPIO_OSPEEDR_OSPEED6_1 +#define GPIO_OSPEEDER_OSPEED7_Pos GPIO_OSPEEDR_OSPEED7_Pos +#define GPIO_OSPEEDER_OSPEED7_Msk GPIO_OSPEEDR_OSPEED7_Msk +#define GPIO_OSPEEDER_OSPEED7 GPIO_OSPEEDR_OSPEED7 +#define GPIO_OSPEEDER_OSPEED7_0 GPIO_OSPEEDR_OSPEED7_0 +#define GPIO_OSPEEDER_OSPEED7_1 GPIO_OSPEEDR_OSPEED7_1 +#define GPIO_OSPEEDER_OSPEED8_Pos GPIO_OSPEEDR_OSPEED8_Pos +#define GPIO_OSPEEDER_OSPEED8_Msk GPIO_OSPEEDR_OSPEED8_Msk +#define GPIO_OSPEEDER_OSPEED8 GPIO_OSPEEDR_OSPEED8 +#define GPIO_OSPEEDER_OSPEED8_0 GPIO_OSPEEDR_OSPEED8_0 +#define GPIO_OSPEEDER_OSPEED8_1 GPIO_OSPEEDR_OSPEED8_1 +#define GPIO_OSPEEDER_OSPEED9_Pos GPIO_OSPEEDR_OSPEED9_Pos +#define GPIO_OSPEEDER_OSPEED9_Msk GPIO_OSPEEDR_OSPEED9_Msk +#define GPIO_OSPEEDER_OSPEED9 GPIO_OSPEEDR_OSPEED9 +#define GPIO_OSPEEDER_OSPEED9_0 GPIO_OSPEEDR_OSPEED9_0 +#define GPIO_OSPEEDER_OSPEED9_1 GPIO_OSPEEDR_OSPEED9_1 +#define GPIO_OSPEEDER_OSPEED10_Pos GPIO_OSPEEDR_OSPEED10_Pos +#define GPIO_OSPEEDER_OSPEED10_Msk GPIO_OSPEEDR_OSPEED10_Msk +#define GPIO_OSPEEDER_OSPEED10 GPIO_OSPEEDR_OSPEED10 +#define GPIO_OSPEEDER_OSPEED10_0 GPIO_OSPEEDR_OSPEED10_0 +#define GPIO_OSPEEDER_OSPEED10_1 GPIO_OSPEEDR_OSPEED10_1 +#define GPIO_OSPEEDER_OSPEED11_Pos GPIO_OSPEEDR_OSPEED11_Pos +#define GPIO_OSPEEDER_OSPEED11_Msk GPIO_OSPEEDR_OSPEED11_Msk +#define GPIO_OSPEEDER_OSPEED11 GPIO_OSPEEDR_OSPEED11 +#define GPIO_OSPEEDER_OSPEED11_0 GPIO_OSPEEDR_OSPEED11_0 +#define GPIO_OSPEEDER_OSPEED11_1 GPIO_OSPEEDR_OSPEED11_1 +#define GPIO_OSPEEDER_OSPEED12_Pos GPIO_OSPEEDR_OSPEED12_Pos +#define GPIO_OSPEEDER_OSPEED12_Msk GPIO_OSPEEDR_OSPEED12_Msk +#define GPIO_OSPEEDER_OSPEED12 GPIO_OSPEEDR_OSPEED12 +#define GPIO_OSPEEDER_OSPEED12_0 GPIO_OSPEEDR_OSPEED12_0 +#define GPIO_OSPEEDER_OSPEED12_1 GPIO_OSPEEDR_OSPEED12_1 +#define GPIO_OSPEEDER_OSPEED13_Pos GPIO_OSPEEDR_OSPEED13_Pos +#define GPIO_OSPEEDER_OSPEED13_Msk GPIO_OSPEEDR_OSPEED13_Msk +#define GPIO_OSPEEDER_OSPEED13 GPIO_OSPEEDR_OSPEED13 +#define GPIO_OSPEEDER_OSPEED13_0 GPIO_OSPEEDR_OSPEED13_0 +#define GPIO_OSPEEDER_OSPEED13_1 GPIO_OSPEEDR_OSPEED13_1 +#define GPIO_OSPEEDER_OSPEED14_Pos GPIO_OSPEEDR_OSPEED14_Pos +#define GPIO_OSPEEDER_OSPEED14_Msk GPIO_OSPEEDR_OSPEED14_Msk +#define GPIO_OSPEEDER_OSPEED14 GPIO_OSPEEDR_OSPEED14 +#define GPIO_OSPEEDER_OSPEED14_0 GPIO_OSPEEDR_OSPEED14_0 +#define GPIO_OSPEEDER_OSPEED14_1 GPIO_OSPEEDR_OSPEED14_1 +#define GPIO_OSPEEDER_OSPEED15_Pos GPIO_OSPEEDR_OSPEED15_Pos +#define GPIO_OSPEEDER_OSPEED15_Msk GPIO_OSPEEDR_OSPEED15_Msk +#define GPIO_OSPEEDER_OSPEED15 GPIO_OSPEEDR_OSPEED15 +#define GPIO_OSPEEDER_OSPEED15_0 GPIO_OSPEEDR_OSPEED15_0 +#define GPIO_OSPEEDER_OSPEED15_1 GPIO_OSPEEDR_OSPEED15_1 /******************* Bit definition for GPIO_PUPDR register ******************/ #define GPIO_PUPDR_PUPD0_Pos (0U) diff --git a/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l041xx.h b/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l041xx.h index 9890981d4c..f723aeea31 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l041xx.h +++ b/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l041xx.h @@ -2285,86 +2285,168 @@ typedef struct #define GPIO_OTYPER_OT_15 (0x00008000U) /**************** Bit definition for GPIO_OSPEEDR register ******************/ -#define GPIO_OSPEEDER_OSPEED0_Pos (0U) -#define GPIO_OSPEEDER_OSPEED0_Msk (0x3UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000003 */ -#define GPIO_OSPEEDER_OSPEED0 GPIO_OSPEEDER_OSPEED0_Msk -#define GPIO_OSPEEDER_OSPEED0_0 (0x1UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000001 */ -#define GPIO_OSPEEDER_OSPEED0_1 (0x2UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000002 */ -#define GPIO_OSPEEDER_OSPEED1_Pos (2U) -#define GPIO_OSPEEDER_OSPEED1_Msk (0x3UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x0000000C */ -#define GPIO_OSPEEDER_OSPEED1 GPIO_OSPEEDER_OSPEED1_Msk -#define GPIO_OSPEEDER_OSPEED1_0 (0x1UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x00000004 */ -#define GPIO_OSPEEDER_OSPEED1_1 (0x2UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x00000008 */ -#define GPIO_OSPEEDER_OSPEED2_Pos (4U) -#define GPIO_OSPEEDER_OSPEED2_Msk (0x3UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000030 */ -#define GPIO_OSPEEDER_OSPEED2 GPIO_OSPEEDER_OSPEED2_Msk -#define GPIO_OSPEEDER_OSPEED2_0 (0x1UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000010 */ -#define GPIO_OSPEEDER_OSPEED2_1 (0x2UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000020 */ -#define GPIO_OSPEEDER_OSPEED3_Pos (6U) -#define GPIO_OSPEEDER_OSPEED3_Msk (0x3UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x000000C0 */ -#define GPIO_OSPEEDER_OSPEED3 GPIO_OSPEEDER_OSPEED3_Msk -#define GPIO_OSPEEDER_OSPEED3_0 (0x1UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x00000040 */ -#define GPIO_OSPEEDER_OSPEED3_1 (0x2UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x00000080 */ -#define GPIO_OSPEEDER_OSPEED4_Pos (8U) -#define GPIO_OSPEEDER_OSPEED4_Msk (0x3UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000300 */ -#define GPIO_OSPEEDER_OSPEED4 GPIO_OSPEEDER_OSPEED4_Msk -#define GPIO_OSPEEDER_OSPEED4_0 (0x1UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000100 */ -#define GPIO_OSPEEDER_OSPEED4_1 (0x2UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000200 */ -#define GPIO_OSPEEDER_OSPEED5_Pos (10U) -#define GPIO_OSPEEDER_OSPEED5_Msk (0x3UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000C00 */ -#define GPIO_OSPEEDER_OSPEED5 GPIO_OSPEEDER_OSPEED5_Msk -#define GPIO_OSPEEDER_OSPEED5_0 (0x1UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000400 */ -#define GPIO_OSPEEDER_OSPEED5_1 (0x2UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000800 */ -#define GPIO_OSPEEDER_OSPEED6_Pos (12U) -#define GPIO_OSPEEDER_OSPEED6_Msk (0x3UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00003000 */ -#define GPIO_OSPEEDER_OSPEED6 GPIO_OSPEEDER_OSPEED6_Msk -#define GPIO_OSPEEDER_OSPEED6_0 (0x1UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00001000 */ -#define GPIO_OSPEEDER_OSPEED6_1 (0x2UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00002000 */ -#define GPIO_OSPEEDER_OSPEED7_Pos (14U) -#define GPIO_OSPEEDER_OSPEED7_Msk (0x3UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x0000C000 */ -#define GPIO_OSPEEDER_OSPEED7 GPIO_OSPEEDER_OSPEED7_Msk -#define GPIO_OSPEEDER_OSPEED7_0 (0x1UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x00004000 */ -#define GPIO_OSPEEDER_OSPEED7_1 (0x2UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x00008000 */ -#define GPIO_OSPEEDER_OSPEED8_Pos (16U) -#define GPIO_OSPEEDER_OSPEED8_Msk (0x3UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00030000 */ -#define GPIO_OSPEEDER_OSPEED8 GPIO_OSPEEDER_OSPEED8_Msk -#define GPIO_OSPEEDER_OSPEED8_0 (0x1UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00010000 */ -#define GPIO_OSPEEDER_OSPEED8_1 (0x2UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00020000 */ -#define GPIO_OSPEEDER_OSPEED9_Pos (18U) -#define GPIO_OSPEEDER_OSPEED9_Msk (0x3UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x000C0000 */ -#define GPIO_OSPEEDER_OSPEED9 GPIO_OSPEEDER_OSPEED9_Msk -#define GPIO_OSPEEDER_OSPEED9_0 (0x1UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x00040000 */ -#define GPIO_OSPEEDER_OSPEED9_1 (0x2UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x00080000 */ -#define GPIO_OSPEEDER_OSPEED10_Pos (20U) -#define GPIO_OSPEEDER_OSPEED10_Msk (0x3UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00300000 */ -#define GPIO_OSPEEDER_OSPEED10 GPIO_OSPEEDER_OSPEED10_Msk -#define GPIO_OSPEEDER_OSPEED10_0 (0x1UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00100000 */ -#define GPIO_OSPEEDER_OSPEED10_1 (0x2UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00200000 */ -#define GPIO_OSPEEDER_OSPEED11_Pos (22U) -#define GPIO_OSPEEDER_OSPEED11_Msk (0x3UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00C00000 */ -#define GPIO_OSPEEDER_OSPEED11 GPIO_OSPEEDER_OSPEED11_Msk -#define GPIO_OSPEEDER_OSPEED11_0 (0x1UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00400000 */ -#define GPIO_OSPEEDER_OSPEED11_1 (0x2UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00800000 */ -#define GPIO_OSPEEDER_OSPEED12_Pos (24U) -#define GPIO_OSPEEDER_OSPEED12_Msk (0x3UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x03000000 */ -#define GPIO_OSPEEDER_OSPEED12 GPIO_OSPEEDER_OSPEED12_Msk -#define GPIO_OSPEEDER_OSPEED12_0 (0x1UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x01000000 */ -#define GPIO_OSPEEDER_OSPEED12_1 (0x2UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x02000000 */ -#define GPIO_OSPEEDER_OSPEED13_Pos (26U) -#define GPIO_OSPEEDER_OSPEED13_Msk (0x3UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x0C000000 */ -#define GPIO_OSPEEDER_OSPEED13 GPIO_OSPEEDER_OSPEED13_Msk -#define GPIO_OSPEEDER_OSPEED13_0 (0x1UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x04000000 */ -#define GPIO_OSPEEDER_OSPEED13_1 (0x2UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x08000000 */ -#define GPIO_OSPEEDER_OSPEED14_Pos (28U) -#define GPIO_OSPEEDER_OSPEED14_Msk (0x3UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x30000000 */ -#define GPIO_OSPEEDER_OSPEED14 GPIO_OSPEEDER_OSPEED14_Msk -#define GPIO_OSPEEDER_OSPEED14_0 (0x1UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x10000000 */ -#define GPIO_OSPEEDER_OSPEED14_1 (0x2UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x20000000 */ -#define GPIO_OSPEEDER_OSPEED15_Pos (30U) -#define GPIO_OSPEEDER_OSPEED15_Msk (0x3UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0xC0000000 */ -#define GPIO_OSPEEDER_OSPEED15 GPIO_OSPEEDER_OSPEED15_Msk -#define GPIO_OSPEEDER_OSPEED15_0 (0x1UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0x40000000 */ -#define GPIO_OSPEEDER_OSPEED15_1 (0x2UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0x80000000 */ +#define GPIO_OSPEEDR_OSPEED0_Pos (0U) +#define GPIO_OSPEEDR_OSPEED0_Msk (0x3UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000003 */ +#define GPIO_OSPEEDR_OSPEED0 GPIO_OSPEEDR_OSPEED0_Msk +#define GPIO_OSPEEDR_OSPEED0_0 (0x1UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000001 */ +#define GPIO_OSPEEDR_OSPEED0_1 (0x2UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000002 */ +#define GPIO_OSPEEDR_OSPEED1_Pos (2U) +#define GPIO_OSPEEDR_OSPEED1_Msk (0x3UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x0000000C */ +#define GPIO_OSPEEDR_OSPEED1 GPIO_OSPEEDR_OSPEED1_Msk +#define GPIO_OSPEEDR_OSPEED1_0 (0x1UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x00000004 */ +#define GPIO_OSPEEDR_OSPEED1_1 (0x2UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x00000008 */ +#define GPIO_OSPEEDR_OSPEED2_Pos (4U) +#define GPIO_OSPEEDR_OSPEED2_Msk (0x3UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000030 */ +#define GPIO_OSPEEDR_OSPEED2 GPIO_OSPEEDR_OSPEED2_Msk +#define GPIO_OSPEEDR_OSPEED2_0 (0x1UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000010 */ +#define GPIO_OSPEEDR_OSPEED2_1 (0x2UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000020 */ +#define GPIO_OSPEEDR_OSPEED3_Pos (6U) +#define GPIO_OSPEEDR_OSPEED3_Msk (0x3UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x000000C0 */ +#define GPIO_OSPEEDR_OSPEED3 GPIO_OSPEEDR_OSPEED3_Msk +#define GPIO_OSPEEDR_OSPEED3_0 (0x1UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x00000040 */ +#define GPIO_OSPEEDR_OSPEED3_1 (0x2UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x00000080 */ +#define GPIO_OSPEEDR_OSPEED4_Pos (8U) +#define GPIO_OSPEEDR_OSPEED4_Msk (0x3UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000300 */ +#define GPIO_OSPEEDR_OSPEED4 GPIO_OSPEEDR_OSPEED4_Msk +#define GPIO_OSPEEDR_OSPEED4_0 (0x1UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000100 */ +#define GPIO_OSPEEDR_OSPEED4_1 (0x2UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000200 */ +#define GPIO_OSPEEDR_OSPEED5_Pos (10U) +#define GPIO_OSPEEDR_OSPEED5_Msk (0x3UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000C00 */ +#define GPIO_OSPEEDR_OSPEED5 GPIO_OSPEEDR_OSPEED5_Msk +#define GPIO_OSPEEDR_OSPEED5_0 (0x1UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000400 */ +#define GPIO_OSPEEDR_OSPEED5_1 (0x2UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000800 */ +#define GPIO_OSPEEDR_OSPEED6_Pos (12U) +#define GPIO_OSPEEDR_OSPEED6_Msk (0x3UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00003000 */ +#define GPIO_OSPEEDR_OSPEED6 GPIO_OSPEEDR_OSPEED6_Msk +#define GPIO_OSPEEDR_OSPEED6_0 (0x1UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00001000 */ +#define GPIO_OSPEEDR_OSPEED6_1 (0x2UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00002000 */ +#define GPIO_OSPEEDR_OSPEED7_Pos (14U) +#define GPIO_OSPEEDR_OSPEED7_Msk (0x3UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x0000C000 */ +#define GPIO_OSPEEDR_OSPEED7 GPIO_OSPEEDR_OSPEED7_Msk +#define GPIO_OSPEEDR_OSPEED7_0 (0x1UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x00004000 */ +#define GPIO_OSPEEDR_OSPEED7_1 (0x2UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x00008000 */ +#define GPIO_OSPEEDR_OSPEED8_Pos (16U) +#define GPIO_OSPEEDR_OSPEED8_Msk (0x3UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00030000 */ +#define GPIO_OSPEEDR_OSPEED8 GPIO_OSPEEDR_OSPEED8_Msk +#define GPIO_OSPEEDR_OSPEED8_0 (0x1UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00010000 */ +#define GPIO_OSPEEDR_OSPEED8_1 (0x2UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00020000 */ +#define GPIO_OSPEEDR_OSPEED9_Pos (18U) +#define GPIO_OSPEEDR_OSPEED9_Msk (0x3UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x000C0000 */ +#define GPIO_OSPEEDR_OSPEED9 GPIO_OSPEEDR_OSPEED9_Msk +#define GPIO_OSPEEDR_OSPEED9_0 (0x1UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x00040000 */ +#define GPIO_OSPEEDR_OSPEED9_1 (0x2UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x00080000 */ +#define GPIO_OSPEEDR_OSPEED10_Pos (20U) +#define GPIO_OSPEEDR_OSPEED10_Msk (0x3UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00300000 */ +#define GPIO_OSPEEDR_OSPEED10 GPIO_OSPEEDR_OSPEED10_Msk +#define GPIO_OSPEEDR_OSPEED10_0 (0x1UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00100000 */ +#define GPIO_OSPEEDR_OSPEED10_1 (0x2UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00200000 */ +#define GPIO_OSPEEDR_OSPEED11_Pos (22U) +#define GPIO_OSPEEDR_OSPEED11_Msk (0x3UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00C00000 */ +#define GPIO_OSPEEDR_OSPEED11 GPIO_OSPEEDR_OSPEED11_Msk +#define GPIO_OSPEEDR_OSPEED11_0 (0x1UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00400000 */ +#define GPIO_OSPEEDR_OSPEED11_1 (0x2UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00800000 */ +#define GPIO_OSPEEDR_OSPEED12_Pos (24U) +#define GPIO_OSPEEDR_OSPEED12_Msk (0x3UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x03000000 */ +#define GPIO_OSPEEDR_OSPEED12 GPIO_OSPEEDR_OSPEED12_Msk +#define GPIO_OSPEEDR_OSPEED12_0 (0x1UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x01000000 */ +#define GPIO_OSPEEDR_OSPEED12_1 (0x2UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x02000000 */ +#define GPIO_OSPEEDR_OSPEED13_Pos (26U) +#define GPIO_OSPEEDR_OSPEED13_Msk (0x3UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x0C000000 */ +#define GPIO_OSPEEDR_OSPEED13 GPIO_OSPEEDR_OSPEED13_Msk +#define GPIO_OSPEEDR_OSPEED13_0 (0x1UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x04000000 */ +#define GPIO_OSPEEDR_OSPEED13_1 (0x2UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x08000000 */ +#define GPIO_OSPEEDR_OSPEED14_Pos (28U) +#define GPIO_OSPEEDR_OSPEED14_Msk (0x3UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x30000000 */ +#define GPIO_OSPEEDR_OSPEED14 GPIO_OSPEEDR_OSPEED14_Msk +#define GPIO_OSPEEDR_OSPEED14_0 (0x1UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x10000000 */ +#define GPIO_OSPEEDR_OSPEED14_1 (0x2UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x20000000 */ +#define GPIO_OSPEEDR_OSPEED15_Pos (30U) +#define GPIO_OSPEEDR_OSPEED15_Msk (0x3UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0xC0000000 */ +#define GPIO_OSPEEDR_OSPEED15 GPIO_OSPEEDR_OSPEED15_Msk +#define GPIO_OSPEEDR_OSPEED15_0 (0x1UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0x40000000 */ +#define GPIO_OSPEEDR_OSPEED15_1 (0x2UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0x80000000 */ + +/* Legacy defines */ +#define GPIO_OSPEEDER_OSPEED0_Pos GPIO_OSPEEDR_OSPEED0_Pos +#define GPIO_OSPEEDER_OSPEED0_Msk GPIO_OSPEEDR_OSPEED0_Msk +#define GPIO_OSPEEDER_OSPEED0 GPIO_OSPEEDR_OSPEED0 +#define GPIO_OSPEEDER_OSPEED0_0 GPIO_OSPEEDR_OSPEED0_0 +#define GPIO_OSPEEDER_OSPEED0_1 GPIO_OSPEEDR_OSPEED0_1 +#define GPIO_OSPEEDER_OSPEED1_Pos GPIO_OSPEEDR_OSPEED1_Pos +#define GPIO_OSPEEDER_OSPEED1_Msk GPIO_OSPEEDR_OSPEED1_Msk +#define GPIO_OSPEEDER_OSPEED1 GPIO_OSPEEDR_OSPEED1 +#define GPIO_OSPEEDER_OSPEED1_0 GPIO_OSPEEDR_OSPEED1_0 +#define GPIO_OSPEEDER_OSPEED1_1 GPIO_OSPEEDR_OSPEED1_1 +#define GPIO_OSPEEDER_OSPEED2_Pos GPIO_OSPEEDR_OSPEED2_Pos +#define GPIO_OSPEEDER_OSPEED2_Msk GPIO_OSPEEDR_OSPEED2_Msk +#define GPIO_OSPEEDER_OSPEED2 GPIO_OSPEEDR_OSPEED2 +#define GPIO_OSPEEDER_OSPEED2_0 GPIO_OSPEEDR_OSPEED2_0 +#define GPIO_OSPEEDER_OSPEED2_1 GPIO_OSPEEDR_OSPEED2_1 +#define GPIO_OSPEEDER_OSPEED3_Pos GPIO_OSPEEDR_OSPEED3_Pos +#define GPIO_OSPEEDER_OSPEED3_Msk GPIO_OSPEEDR_OSPEED3_Msk +#define GPIO_OSPEEDER_OSPEED3 GPIO_OSPEEDR_OSPEED3 +#define GPIO_OSPEEDER_OSPEED3_0 GPIO_OSPEEDR_OSPEED3_0 +#define GPIO_OSPEEDER_OSPEED3_1 GPIO_OSPEEDR_OSPEED3_1 +#define GPIO_OSPEEDER_OSPEED4_Pos GPIO_OSPEEDR_OSPEED4_Pos +#define GPIO_OSPEEDER_OSPEED4_Msk GPIO_OSPEEDR_OSPEED4_Msk +#define GPIO_OSPEEDER_OSPEED4 GPIO_OSPEEDR_OSPEED4 +#define GPIO_OSPEEDER_OSPEED4_0 GPIO_OSPEEDR_OSPEED4_0 +#define GPIO_OSPEEDER_OSPEED4_1 GPIO_OSPEEDR_OSPEED4_1 +#define GPIO_OSPEEDER_OSPEED5_Pos GPIO_OSPEEDR_OSPEED5_Pos +#define GPIO_OSPEEDER_OSPEED5_Msk GPIO_OSPEEDR_OSPEED5_Msk +#define GPIO_OSPEEDER_OSPEED5 GPIO_OSPEEDR_OSPEED5 +#define GPIO_OSPEEDER_OSPEED5_0 GPIO_OSPEEDR_OSPEED5_0 +#define GPIO_OSPEEDER_OSPEED5_1 GPIO_OSPEEDR_OSPEED5_1 +#define GPIO_OSPEEDER_OSPEED6_Pos GPIO_OSPEEDR_OSPEED6_Pos +#define GPIO_OSPEEDER_OSPEED6_Msk GPIO_OSPEEDR_OSPEED6_Msk +#define GPIO_OSPEEDER_OSPEED6 GPIO_OSPEEDR_OSPEED6 +#define GPIO_OSPEEDER_OSPEED6_0 GPIO_OSPEEDR_OSPEED6_0 +#define GPIO_OSPEEDER_OSPEED6_1 GPIO_OSPEEDR_OSPEED6_1 +#define GPIO_OSPEEDER_OSPEED7_Pos GPIO_OSPEEDR_OSPEED7_Pos +#define GPIO_OSPEEDER_OSPEED7_Msk GPIO_OSPEEDR_OSPEED7_Msk +#define GPIO_OSPEEDER_OSPEED7 GPIO_OSPEEDR_OSPEED7 +#define GPIO_OSPEEDER_OSPEED7_0 GPIO_OSPEEDR_OSPEED7_0 +#define GPIO_OSPEEDER_OSPEED7_1 GPIO_OSPEEDR_OSPEED7_1 +#define GPIO_OSPEEDER_OSPEED8_Pos GPIO_OSPEEDR_OSPEED8_Pos +#define GPIO_OSPEEDER_OSPEED8_Msk GPIO_OSPEEDR_OSPEED8_Msk +#define GPIO_OSPEEDER_OSPEED8 GPIO_OSPEEDR_OSPEED8 +#define GPIO_OSPEEDER_OSPEED8_0 GPIO_OSPEEDR_OSPEED8_0 +#define GPIO_OSPEEDER_OSPEED8_1 GPIO_OSPEEDR_OSPEED8_1 +#define GPIO_OSPEEDER_OSPEED9_Pos GPIO_OSPEEDR_OSPEED9_Pos +#define GPIO_OSPEEDER_OSPEED9_Msk GPIO_OSPEEDR_OSPEED9_Msk +#define GPIO_OSPEEDER_OSPEED9 GPIO_OSPEEDR_OSPEED9 +#define GPIO_OSPEEDER_OSPEED9_0 GPIO_OSPEEDR_OSPEED9_0 +#define GPIO_OSPEEDER_OSPEED9_1 GPIO_OSPEEDR_OSPEED9_1 +#define GPIO_OSPEEDER_OSPEED10_Pos GPIO_OSPEEDR_OSPEED10_Pos +#define GPIO_OSPEEDER_OSPEED10_Msk GPIO_OSPEEDR_OSPEED10_Msk +#define GPIO_OSPEEDER_OSPEED10 GPIO_OSPEEDR_OSPEED10 +#define GPIO_OSPEEDER_OSPEED10_0 GPIO_OSPEEDR_OSPEED10_0 +#define GPIO_OSPEEDER_OSPEED10_1 GPIO_OSPEEDR_OSPEED10_1 +#define GPIO_OSPEEDER_OSPEED11_Pos GPIO_OSPEEDR_OSPEED11_Pos +#define GPIO_OSPEEDER_OSPEED11_Msk GPIO_OSPEEDR_OSPEED11_Msk +#define GPIO_OSPEEDER_OSPEED11 GPIO_OSPEEDR_OSPEED11 +#define GPIO_OSPEEDER_OSPEED11_0 GPIO_OSPEEDR_OSPEED11_0 +#define GPIO_OSPEEDER_OSPEED11_1 GPIO_OSPEEDR_OSPEED11_1 +#define GPIO_OSPEEDER_OSPEED12_Pos GPIO_OSPEEDR_OSPEED12_Pos +#define GPIO_OSPEEDER_OSPEED12_Msk GPIO_OSPEEDR_OSPEED12_Msk +#define GPIO_OSPEEDER_OSPEED12 GPIO_OSPEEDR_OSPEED12 +#define GPIO_OSPEEDER_OSPEED12_0 GPIO_OSPEEDR_OSPEED12_0 +#define GPIO_OSPEEDER_OSPEED12_1 GPIO_OSPEEDR_OSPEED12_1 +#define GPIO_OSPEEDER_OSPEED13_Pos GPIO_OSPEEDR_OSPEED13_Pos +#define GPIO_OSPEEDER_OSPEED13_Msk GPIO_OSPEEDR_OSPEED13_Msk +#define GPIO_OSPEEDER_OSPEED13 GPIO_OSPEEDR_OSPEED13 +#define GPIO_OSPEEDER_OSPEED13_0 GPIO_OSPEEDR_OSPEED13_0 +#define GPIO_OSPEEDER_OSPEED13_1 GPIO_OSPEEDR_OSPEED13_1 +#define GPIO_OSPEEDER_OSPEED14_Pos GPIO_OSPEEDR_OSPEED14_Pos +#define GPIO_OSPEEDER_OSPEED14_Msk GPIO_OSPEEDR_OSPEED14_Msk +#define GPIO_OSPEEDER_OSPEED14 GPIO_OSPEEDR_OSPEED14 +#define GPIO_OSPEEDER_OSPEED14_0 GPIO_OSPEEDR_OSPEED14_0 +#define GPIO_OSPEEDER_OSPEED14_1 GPIO_OSPEEDR_OSPEED14_1 +#define GPIO_OSPEEDER_OSPEED15_Pos GPIO_OSPEEDR_OSPEED15_Pos +#define GPIO_OSPEEDER_OSPEED15_Msk GPIO_OSPEEDR_OSPEED15_Msk +#define GPIO_OSPEEDER_OSPEED15 GPIO_OSPEEDR_OSPEED15 +#define GPIO_OSPEEDER_OSPEED15_0 GPIO_OSPEEDR_OSPEED15_0 +#define GPIO_OSPEEDER_OSPEED15_1 GPIO_OSPEEDR_OSPEED15_1 /******************* Bit definition for GPIO_PUPDR register ******************/ #define GPIO_PUPDR_PUPD0_Pos (0U) diff --git a/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l051xx.h b/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l051xx.h index df8cf52d46..8a8a4cb880 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l051xx.h +++ b/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l051xx.h @@ -2198,86 +2198,168 @@ typedef struct #define GPIO_OTYPER_OT_15 (0x00008000U) /**************** Bit definition for GPIO_OSPEEDR register ******************/ -#define GPIO_OSPEEDER_OSPEED0_Pos (0U) -#define GPIO_OSPEEDER_OSPEED0_Msk (0x3UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000003 */ -#define GPIO_OSPEEDER_OSPEED0 GPIO_OSPEEDER_OSPEED0_Msk -#define GPIO_OSPEEDER_OSPEED0_0 (0x1UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000001 */ -#define GPIO_OSPEEDER_OSPEED0_1 (0x2UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000002 */ -#define GPIO_OSPEEDER_OSPEED1_Pos (2U) -#define GPIO_OSPEEDER_OSPEED1_Msk (0x3UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x0000000C */ -#define GPIO_OSPEEDER_OSPEED1 GPIO_OSPEEDER_OSPEED1_Msk -#define GPIO_OSPEEDER_OSPEED1_0 (0x1UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x00000004 */ -#define GPIO_OSPEEDER_OSPEED1_1 (0x2UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x00000008 */ -#define GPIO_OSPEEDER_OSPEED2_Pos (4U) -#define GPIO_OSPEEDER_OSPEED2_Msk (0x3UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000030 */ -#define GPIO_OSPEEDER_OSPEED2 GPIO_OSPEEDER_OSPEED2_Msk -#define GPIO_OSPEEDER_OSPEED2_0 (0x1UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000010 */ -#define GPIO_OSPEEDER_OSPEED2_1 (0x2UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000020 */ -#define GPIO_OSPEEDER_OSPEED3_Pos (6U) -#define GPIO_OSPEEDER_OSPEED3_Msk (0x3UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x000000C0 */ -#define GPIO_OSPEEDER_OSPEED3 GPIO_OSPEEDER_OSPEED3_Msk -#define GPIO_OSPEEDER_OSPEED3_0 (0x1UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x00000040 */ -#define GPIO_OSPEEDER_OSPEED3_1 (0x2UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x00000080 */ -#define GPIO_OSPEEDER_OSPEED4_Pos (8U) -#define GPIO_OSPEEDER_OSPEED4_Msk (0x3UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000300 */ -#define GPIO_OSPEEDER_OSPEED4 GPIO_OSPEEDER_OSPEED4_Msk -#define GPIO_OSPEEDER_OSPEED4_0 (0x1UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000100 */ -#define GPIO_OSPEEDER_OSPEED4_1 (0x2UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000200 */ -#define GPIO_OSPEEDER_OSPEED5_Pos (10U) -#define GPIO_OSPEEDER_OSPEED5_Msk (0x3UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000C00 */ -#define GPIO_OSPEEDER_OSPEED5 GPIO_OSPEEDER_OSPEED5_Msk -#define GPIO_OSPEEDER_OSPEED5_0 (0x1UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000400 */ -#define GPIO_OSPEEDER_OSPEED5_1 (0x2UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000800 */ -#define GPIO_OSPEEDER_OSPEED6_Pos (12U) -#define GPIO_OSPEEDER_OSPEED6_Msk (0x3UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00003000 */ -#define GPIO_OSPEEDER_OSPEED6 GPIO_OSPEEDER_OSPEED6_Msk -#define GPIO_OSPEEDER_OSPEED6_0 (0x1UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00001000 */ -#define GPIO_OSPEEDER_OSPEED6_1 (0x2UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00002000 */ -#define GPIO_OSPEEDER_OSPEED7_Pos (14U) -#define GPIO_OSPEEDER_OSPEED7_Msk (0x3UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x0000C000 */ -#define GPIO_OSPEEDER_OSPEED7 GPIO_OSPEEDER_OSPEED7_Msk -#define GPIO_OSPEEDER_OSPEED7_0 (0x1UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x00004000 */ -#define GPIO_OSPEEDER_OSPEED7_1 (0x2UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x00008000 */ -#define GPIO_OSPEEDER_OSPEED8_Pos (16U) -#define GPIO_OSPEEDER_OSPEED8_Msk (0x3UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00030000 */ -#define GPIO_OSPEEDER_OSPEED8 GPIO_OSPEEDER_OSPEED8_Msk -#define GPIO_OSPEEDER_OSPEED8_0 (0x1UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00010000 */ -#define GPIO_OSPEEDER_OSPEED8_1 (0x2UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00020000 */ -#define GPIO_OSPEEDER_OSPEED9_Pos (18U) -#define GPIO_OSPEEDER_OSPEED9_Msk (0x3UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x000C0000 */ -#define GPIO_OSPEEDER_OSPEED9 GPIO_OSPEEDER_OSPEED9_Msk -#define GPIO_OSPEEDER_OSPEED9_0 (0x1UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x00040000 */ -#define GPIO_OSPEEDER_OSPEED9_1 (0x2UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x00080000 */ -#define GPIO_OSPEEDER_OSPEED10_Pos (20U) -#define GPIO_OSPEEDER_OSPEED10_Msk (0x3UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00300000 */ -#define GPIO_OSPEEDER_OSPEED10 GPIO_OSPEEDER_OSPEED10_Msk -#define GPIO_OSPEEDER_OSPEED10_0 (0x1UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00100000 */ -#define GPIO_OSPEEDER_OSPEED10_1 (0x2UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00200000 */ -#define GPIO_OSPEEDER_OSPEED11_Pos (22U) -#define GPIO_OSPEEDER_OSPEED11_Msk (0x3UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00C00000 */ -#define GPIO_OSPEEDER_OSPEED11 GPIO_OSPEEDER_OSPEED11_Msk -#define GPIO_OSPEEDER_OSPEED11_0 (0x1UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00400000 */ -#define GPIO_OSPEEDER_OSPEED11_1 (0x2UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00800000 */ -#define GPIO_OSPEEDER_OSPEED12_Pos (24U) -#define GPIO_OSPEEDER_OSPEED12_Msk (0x3UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x03000000 */ -#define GPIO_OSPEEDER_OSPEED12 GPIO_OSPEEDER_OSPEED12_Msk -#define GPIO_OSPEEDER_OSPEED12_0 (0x1UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x01000000 */ -#define GPIO_OSPEEDER_OSPEED12_1 (0x2UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x02000000 */ -#define GPIO_OSPEEDER_OSPEED13_Pos (26U) -#define GPIO_OSPEEDER_OSPEED13_Msk (0x3UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x0C000000 */ -#define GPIO_OSPEEDER_OSPEED13 GPIO_OSPEEDER_OSPEED13_Msk -#define GPIO_OSPEEDER_OSPEED13_0 (0x1UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x04000000 */ -#define GPIO_OSPEEDER_OSPEED13_1 (0x2UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x08000000 */ -#define GPIO_OSPEEDER_OSPEED14_Pos (28U) -#define GPIO_OSPEEDER_OSPEED14_Msk (0x3UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x30000000 */ -#define GPIO_OSPEEDER_OSPEED14 GPIO_OSPEEDER_OSPEED14_Msk -#define GPIO_OSPEEDER_OSPEED14_0 (0x1UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x10000000 */ -#define GPIO_OSPEEDER_OSPEED14_1 (0x2UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x20000000 */ -#define GPIO_OSPEEDER_OSPEED15_Pos (30U) -#define GPIO_OSPEEDER_OSPEED15_Msk (0x3UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0xC0000000 */ -#define GPIO_OSPEEDER_OSPEED15 GPIO_OSPEEDER_OSPEED15_Msk -#define GPIO_OSPEEDER_OSPEED15_0 (0x1UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0x40000000 */ -#define GPIO_OSPEEDER_OSPEED15_1 (0x2UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0x80000000 */ +#define GPIO_OSPEEDR_OSPEED0_Pos (0U) +#define GPIO_OSPEEDR_OSPEED0_Msk (0x3UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000003 */ +#define GPIO_OSPEEDR_OSPEED0 GPIO_OSPEEDR_OSPEED0_Msk +#define GPIO_OSPEEDR_OSPEED0_0 (0x1UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000001 */ +#define GPIO_OSPEEDR_OSPEED0_1 (0x2UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000002 */ +#define GPIO_OSPEEDR_OSPEED1_Pos (2U) +#define GPIO_OSPEEDR_OSPEED1_Msk (0x3UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x0000000C */ +#define GPIO_OSPEEDR_OSPEED1 GPIO_OSPEEDR_OSPEED1_Msk +#define GPIO_OSPEEDR_OSPEED1_0 (0x1UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x00000004 */ +#define GPIO_OSPEEDR_OSPEED1_1 (0x2UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x00000008 */ +#define GPIO_OSPEEDR_OSPEED2_Pos (4U) +#define GPIO_OSPEEDR_OSPEED2_Msk (0x3UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000030 */ +#define GPIO_OSPEEDR_OSPEED2 GPIO_OSPEEDR_OSPEED2_Msk +#define GPIO_OSPEEDR_OSPEED2_0 (0x1UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000010 */ +#define GPIO_OSPEEDR_OSPEED2_1 (0x2UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000020 */ +#define GPIO_OSPEEDR_OSPEED3_Pos (6U) +#define GPIO_OSPEEDR_OSPEED3_Msk (0x3UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x000000C0 */ +#define GPIO_OSPEEDR_OSPEED3 GPIO_OSPEEDR_OSPEED3_Msk +#define GPIO_OSPEEDR_OSPEED3_0 (0x1UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x00000040 */ +#define GPIO_OSPEEDR_OSPEED3_1 (0x2UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x00000080 */ +#define GPIO_OSPEEDR_OSPEED4_Pos (8U) +#define GPIO_OSPEEDR_OSPEED4_Msk (0x3UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000300 */ +#define GPIO_OSPEEDR_OSPEED4 GPIO_OSPEEDR_OSPEED4_Msk +#define GPIO_OSPEEDR_OSPEED4_0 (0x1UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000100 */ +#define GPIO_OSPEEDR_OSPEED4_1 (0x2UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000200 */ +#define GPIO_OSPEEDR_OSPEED5_Pos (10U) +#define GPIO_OSPEEDR_OSPEED5_Msk (0x3UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000C00 */ +#define GPIO_OSPEEDR_OSPEED5 GPIO_OSPEEDR_OSPEED5_Msk +#define GPIO_OSPEEDR_OSPEED5_0 (0x1UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000400 */ +#define GPIO_OSPEEDR_OSPEED5_1 (0x2UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000800 */ +#define GPIO_OSPEEDR_OSPEED6_Pos (12U) +#define GPIO_OSPEEDR_OSPEED6_Msk (0x3UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00003000 */ +#define GPIO_OSPEEDR_OSPEED6 GPIO_OSPEEDR_OSPEED6_Msk +#define GPIO_OSPEEDR_OSPEED6_0 (0x1UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00001000 */ +#define GPIO_OSPEEDR_OSPEED6_1 (0x2UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00002000 */ +#define GPIO_OSPEEDR_OSPEED7_Pos (14U) +#define GPIO_OSPEEDR_OSPEED7_Msk (0x3UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x0000C000 */ +#define GPIO_OSPEEDR_OSPEED7 GPIO_OSPEEDR_OSPEED7_Msk +#define GPIO_OSPEEDR_OSPEED7_0 (0x1UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x00004000 */ +#define GPIO_OSPEEDR_OSPEED7_1 (0x2UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x00008000 */ +#define GPIO_OSPEEDR_OSPEED8_Pos (16U) +#define GPIO_OSPEEDR_OSPEED8_Msk (0x3UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00030000 */ +#define GPIO_OSPEEDR_OSPEED8 GPIO_OSPEEDR_OSPEED8_Msk +#define GPIO_OSPEEDR_OSPEED8_0 (0x1UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00010000 */ +#define GPIO_OSPEEDR_OSPEED8_1 (0x2UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00020000 */ +#define GPIO_OSPEEDR_OSPEED9_Pos (18U) +#define GPIO_OSPEEDR_OSPEED9_Msk (0x3UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x000C0000 */ +#define GPIO_OSPEEDR_OSPEED9 GPIO_OSPEEDR_OSPEED9_Msk +#define GPIO_OSPEEDR_OSPEED9_0 (0x1UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x00040000 */ +#define GPIO_OSPEEDR_OSPEED9_1 (0x2UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x00080000 */ +#define GPIO_OSPEEDR_OSPEED10_Pos (20U) +#define GPIO_OSPEEDR_OSPEED10_Msk (0x3UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00300000 */ +#define GPIO_OSPEEDR_OSPEED10 GPIO_OSPEEDR_OSPEED10_Msk +#define GPIO_OSPEEDR_OSPEED10_0 (0x1UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00100000 */ +#define GPIO_OSPEEDR_OSPEED10_1 (0x2UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00200000 */ +#define GPIO_OSPEEDR_OSPEED11_Pos (22U) +#define GPIO_OSPEEDR_OSPEED11_Msk (0x3UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00C00000 */ +#define GPIO_OSPEEDR_OSPEED11 GPIO_OSPEEDR_OSPEED11_Msk +#define GPIO_OSPEEDR_OSPEED11_0 (0x1UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00400000 */ +#define GPIO_OSPEEDR_OSPEED11_1 (0x2UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00800000 */ +#define GPIO_OSPEEDR_OSPEED12_Pos (24U) +#define GPIO_OSPEEDR_OSPEED12_Msk (0x3UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x03000000 */ +#define GPIO_OSPEEDR_OSPEED12 GPIO_OSPEEDR_OSPEED12_Msk +#define GPIO_OSPEEDR_OSPEED12_0 (0x1UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x01000000 */ +#define GPIO_OSPEEDR_OSPEED12_1 (0x2UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x02000000 */ +#define GPIO_OSPEEDR_OSPEED13_Pos (26U) +#define GPIO_OSPEEDR_OSPEED13_Msk (0x3UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x0C000000 */ +#define GPIO_OSPEEDR_OSPEED13 GPIO_OSPEEDR_OSPEED13_Msk +#define GPIO_OSPEEDR_OSPEED13_0 (0x1UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x04000000 */ +#define GPIO_OSPEEDR_OSPEED13_1 (0x2UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x08000000 */ +#define GPIO_OSPEEDR_OSPEED14_Pos (28U) +#define GPIO_OSPEEDR_OSPEED14_Msk (0x3UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x30000000 */ +#define GPIO_OSPEEDR_OSPEED14 GPIO_OSPEEDR_OSPEED14_Msk +#define GPIO_OSPEEDR_OSPEED14_0 (0x1UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x10000000 */ +#define GPIO_OSPEEDR_OSPEED14_1 (0x2UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x20000000 */ +#define GPIO_OSPEEDR_OSPEED15_Pos (30U) +#define GPIO_OSPEEDR_OSPEED15_Msk (0x3UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0xC0000000 */ +#define GPIO_OSPEEDR_OSPEED15 GPIO_OSPEEDR_OSPEED15_Msk +#define GPIO_OSPEEDR_OSPEED15_0 (0x1UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0x40000000 */ +#define GPIO_OSPEEDR_OSPEED15_1 (0x2UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0x80000000 */ + +/* Legacy defines */ +#define GPIO_OSPEEDER_OSPEED0_Pos GPIO_OSPEEDR_OSPEED0_Pos +#define GPIO_OSPEEDER_OSPEED0_Msk GPIO_OSPEEDR_OSPEED0_Msk +#define GPIO_OSPEEDER_OSPEED0 GPIO_OSPEEDR_OSPEED0 +#define GPIO_OSPEEDER_OSPEED0_0 GPIO_OSPEEDR_OSPEED0_0 +#define GPIO_OSPEEDER_OSPEED0_1 GPIO_OSPEEDR_OSPEED0_1 +#define GPIO_OSPEEDER_OSPEED1_Pos GPIO_OSPEEDR_OSPEED1_Pos +#define GPIO_OSPEEDER_OSPEED1_Msk GPIO_OSPEEDR_OSPEED1_Msk +#define GPIO_OSPEEDER_OSPEED1 GPIO_OSPEEDR_OSPEED1 +#define GPIO_OSPEEDER_OSPEED1_0 GPIO_OSPEEDR_OSPEED1_0 +#define GPIO_OSPEEDER_OSPEED1_1 GPIO_OSPEEDR_OSPEED1_1 +#define GPIO_OSPEEDER_OSPEED2_Pos GPIO_OSPEEDR_OSPEED2_Pos +#define GPIO_OSPEEDER_OSPEED2_Msk GPIO_OSPEEDR_OSPEED2_Msk +#define GPIO_OSPEEDER_OSPEED2 GPIO_OSPEEDR_OSPEED2 +#define GPIO_OSPEEDER_OSPEED2_0 GPIO_OSPEEDR_OSPEED2_0 +#define GPIO_OSPEEDER_OSPEED2_1 GPIO_OSPEEDR_OSPEED2_1 +#define GPIO_OSPEEDER_OSPEED3_Pos GPIO_OSPEEDR_OSPEED3_Pos +#define GPIO_OSPEEDER_OSPEED3_Msk GPIO_OSPEEDR_OSPEED3_Msk +#define GPIO_OSPEEDER_OSPEED3 GPIO_OSPEEDR_OSPEED3 +#define GPIO_OSPEEDER_OSPEED3_0 GPIO_OSPEEDR_OSPEED3_0 +#define GPIO_OSPEEDER_OSPEED3_1 GPIO_OSPEEDR_OSPEED3_1 +#define GPIO_OSPEEDER_OSPEED4_Pos GPIO_OSPEEDR_OSPEED4_Pos +#define GPIO_OSPEEDER_OSPEED4_Msk GPIO_OSPEEDR_OSPEED4_Msk +#define GPIO_OSPEEDER_OSPEED4 GPIO_OSPEEDR_OSPEED4 +#define GPIO_OSPEEDER_OSPEED4_0 GPIO_OSPEEDR_OSPEED4_0 +#define GPIO_OSPEEDER_OSPEED4_1 GPIO_OSPEEDR_OSPEED4_1 +#define GPIO_OSPEEDER_OSPEED5_Pos GPIO_OSPEEDR_OSPEED5_Pos +#define GPIO_OSPEEDER_OSPEED5_Msk GPIO_OSPEEDR_OSPEED5_Msk +#define GPIO_OSPEEDER_OSPEED5 GPIO_OSPEEDR_OSPEED5 +#define GPIO_OSPEEDER_OSPEED5_0 GPIO_OSPEEDR_OSPEED5_0 +#define GPIO_OSPEEDER_OSPEED5_1 GPIO_OSPEEDR_OSPEED5_1 +#define GPIO_OSPEEDER_OSPEED6_Pos GPIO_OSPEEDR_OSPEED6_Pos +#define GPIO_OSPEEDER_OSPEED6_Msk GPIO_OSPEEDR_OSPEED6_Msk +#define GPIO_OSPEEDER_OSPEED6 GPIO_OSPEEDR_OSPEED6 +#define GPIO_OSPEEDER_OSPEED6_0 GPIO_OSPEEDR_OSPEED6_0 +#define GPIO_OSPEEDER_OSPEED6_1 GPIO_OSPEEDR_OSPEED6_1 +#define GPIO_OSPEEDER_OSPEED7_Pos GPIO_OSPEEDR_OSPEED7_Pos +#define GPIO_OSPEEDER_OSPEED7_Msk GPIO_OSPEEDR_OSPEED7_Msk +#define GPIO_OSPEEDER_OSPEED7 GPIO_OSPEEDR_OSPEED7 +#define GPIO_OSPEEDER_OSPEED7_0 GPIO_OSPEEDR_OSPEED7_0 +#define GPIO_OSPEEDER_OSPEED7_1 GPIO_OSPEEDR_OSPEED7_1 +#define GPIO_OSPEEDER_OSPEED8_Pos GPIO_OSPEEDR_OSPEED8_Pos +#define GPIO_OSPEEDER_OSPEED8_Msk GPIO_OSPEEDR_OSPEED8_Msk +#define GPIO_OSPEEDER_OSPEED8 GPIO_OSPEEDR_OSPEED8 +#define GPIO_OSPEEDER_OSPEED8_0 GPIO_OSPEEDR_OSPEED8_0 +#define GPIO_OSPEEDER_OSPEED8_1 GPIO_OSPEEDR_OSPEED8_1 +#define GPIO_OSPEEDER_OSPEED9_Pos GPIO_OSPEEDR_OSPEED9_Pos +#define GPIO_OSPEEDER_OSPEED9_Msk GPIO_OSPEEDR_OSPEED9_Msk +#define GPIO_OSPEEDER_OSPEED9 GPIO_OSPEEDR_OSPEED9 +#define GPIO_OSPEEDER_OSPEED9_0 GPIO_OSPEEDR_OSPEED9_0 +#define GPIO_OSPEEDER_OSPEED9_1 GPIO_OSPEEDR_OSPEED9_1 +#define GPIO_OSPEEDER_OSPEED10_Pos GPIO_OSPEEDR_OSPEED10_Pos +#define GPIO_OSPEEDER_OSPEED10_Msk GPIO_OSPEEDR_OSPEED10_Msk +#define GPIO_OSPEEDER_OSPEED10 GPIO_OSPEEDR_OSPEED10 +#define GPIO_OSPEEDER_OSPEED10_0 GPIO_OSPEEDR_OSPEED10_0 +#define GPIO_OSPEEDER_OSPEED10_1 GPIO_OSPEEDR_OSPEED10_1 +#define GPIO_OSPEEDER_OSPEED11_Pos GPIO_OSPEEDR_OSPEED11_Pos +#define GPIO_OSPEEDER_OSPEED11_Msk GPIO_OSPEEDR_OSPEED11_Msk +#define GPIO_OSPEEDER_OSPEED11 GPIO_OSPEEDR_OSPEED11 +#define GPIO_OSPEEDER_OSPEED11_0 GPIO_OSPEEDR_OSPEED11_0 +#define GPIO_OSPEEDER_OSPEED11_1 GPIO_OSPEEDR_OSPEED11_1 +#define GPIO_OSPEEDER_OSPEED12_Pos GPIO_OSPEEDR_OSPEED12_Pos +#define GPIO_OSPEEDER_OSPEED12_Msk GPIO_OSPEEDR_OSPEED12_Msk +#define GPIO_OSPEEDER_OSPEED12 GPIO_OSPEEDR_OSPEED12 +#define GPIO_OSPEEDER_OSPEED12_0 GPIO_OSPEEDR_OSPEED12_0 +#define GPIO_OSPEEDER_OSPEED12_1 GPIO_OSPEEDR_OSPEED12_1 +#define GPIO_OSPEEDER_OSPEED13_Pos GPIO_OSPEEDR_OSPEED13_Pos +#define GPIO_OSPEEDER_OSPEED13_Msk GPIO_OSPEEDR_OSPEED13_Msk +#define GPIO_OSPEEDER_OSPEED13 GPIO_OSPEEDR_OSPEED13 +#define GPIO_OSPEEDER_OSPEED13_0 GPIO_OSPEEDR_OSPEED13_0 +#define GPIO_OSPEEDER_OSPEED13_1 GPIO_OSPEEDR_OSPEED13_1 +#define GPIO_OSPEEDER_OSPEED14_Pos GPIO_OSPEEDR_OSPEED14_Pos +#define GPIO_OSPEEDER_OSPEED14_Msk GPIO_OSPEEDR_OSPEED14_Msk +#define GPIO_OSPEEDER_OSPEED14 GPIO_OSPEEDR_OSPEED14 +#define GPIO_OSPEEDER_OSPEED14_0 GPIO_OSPEEDR_OSPEED14_0 +#define GPIO_OSPEEDER_OSPEED14_1 GPIO_OSPEEDR_OSPEED14_1 +#define GPIO_OSPEEDER_OSPEED15_Pos GPIO_OSPEEDR_OSPEED15_Pos +#define GPIO_OSPEEDER_OSPEED15_Msk GPIO_OSPEEDR_OSPEED15_Msk +#define GPIO_OSPEEDER_OSPEED15 GPIO_OSPEEDR_OSPEED15 +#define GPIO_OSPEEDER_OSPEED15_0 GPIO_OSPEEDR_OSPEED15_0 +#define GPIO_OSPEEDER_OSPEED15_1 GPIO_OSPEEDR_OSPEED15_1 /******************* Bit definition for GPIO_PUPDR register ******************/ #define GPIO_PUPDR_PUPD0_Pos (0U) diff --git a/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l052xx.h b/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l052xx.h index 941c8f125e..b6b281a81e 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l052xx.h +++ b/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l052xx.h @@ -2487,86 +2487,168 @@ typedef struct #define GPIO_OTYPER_OT_15 (0x00008000U) /**************** Bit definition for GPIO_OSPEEDR register ******************/ -#define GPIO_OSPEEDER_OSPEED0_Pos (0U) -#define GPIO_OSPEEDER_OSPEED0_Msk (0x3UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000003 */ -#define GPIO_OSPEEDER_OSPEED0 GPIO_OSPEEDER_OSPEED0_Msk -#define GPIO_OSPEEDER_OSPEED0_0 (0x1UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000001 */ -#define GPIO_OSPEEDER_OSPEED0_1 (0x2UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000002 */ -#define GPIO_OSPEEDER_OSPEED1_Pos (2U) -#define GPIO_OSPEEDER_OSPEED1_Msk (0x3UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x0000000C */ -#define GPIO_OSPEEDER_OSPEED1 GPIO_OSPEEDER_OSPEED1_Msk -#define GPIO_OSPEEDER_OSPEED1_0 (0x1UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x00000004 */ -#define GPIO_OSPEEDER_OSPEED1_1 (0x2UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x00000008 */ -#define GPIO_OSPEEDER_OSPEED2_Pos (4U) -#define GPIO_OSPEEDER_OSPEED2_Msk (0x3UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000030 */ -#define GPIO_OSPEEDER_OSPEED2 GPIO_OSPEEDER_OSPEED2_Msk -#define GPIO_OSPEEDER_OSPEED2_0 (0x1UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000010 */ -#define GPIO_OSPEEDER_OSPEED2_1 (0x2UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000020 */ -#define GPIO_OSPEEDER_OSPEED3_Pos (6U) -#define GPIO_OSPEEDER_OSPEED3_Msk (0x3UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x000000C0 */ -#define GPIO_OSPEEDER_OSPEED3 GPIO_OSPEEDER_OSPEED3_Msk -#define GPIO_OSPEEDER_OSPEED3_0 (0x1UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x00000040 */ -#define GPIO_OSPEEDER_OSPEED3_1 (0x2UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x00000080 */ -#define GPIO_OSPEEDER_OSPEED4_Pos (8U) -#define GPIO_OSPEEDER_OSPEED4_Msk (0x3UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000300 */ -#define GPIO_OSPEEDER_OSPEED4 GPIO_OSPEEDER_OSPEED4_Msk -#define GPIO_OSPEEDER_OSPEED4_0 (0x1UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000100 */ -#define GPIO_OSPEEDER_OSPEED4_1 (0x2UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000200 */ -#define GPIO_OSPEEDER_OSPEED5_Pos (10U) -#define GPIO_OSPEEDER_OSPEED5_Msk (0x3UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000C00 */ -#define GPIO_OSPEEDER_OSPEED5 GPIO_OSPEEDER_OSPEED5_Msk -#define GPIO_OSPEEDER_OSPEED5_0 (0x1UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000400 */ -#define GPIO_OSPEEDER_OSPEED5_1 (0x2UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000800 */ -#define GPIO_OSPEEDER_OSPEED6_Pos (12U) -#define GPIO_OSPEEDER_OSPEED6_Msk (0x3UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00003000 */ -#define GPIO_OSPEEDER_OSPEED6 GPIO_OSPEEDER_OSPEED6_Msk -#define GPIO_OSPEEDER_OSPEED6_0 (0x1UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00001000 */ -#define GPIO_OSPEEDER_OSPEED6_1 (0x2UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00002000 */ -#define GPIO_OSPEEDER_OSPEED7_Pos (14U) -#define GPIO_OSPEEDER_OSPEED7_Msk (0x3UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x0000C000 */ -#define GPIO_OSPEEDER_OSPEED7 GPIO_OSPEEDER_OSPEED7_Msk -#define GPIO_OSPEEDER_OSPEED7_0 (0x1UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x00004000 */ -#define GPIO_OSPEEDER_OSPEED7_1 (0x2UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x00008000 */ -#define GPIO_OSPEEDER_OSPEED8_Pos (16U) -#define GPIO_OSPEEDER_OSPEED8_Msk (0x3UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00030000 */ -#define GPIO_OSPEEDER_OSPEED8 GPIO_OSPEEDER_OSPEED8_Msk -#define GPIO_OSPEEDER_OSPEED8_0 (0x1UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00010000 */ -#define GPIO_OSPEEDER_OSPEED8_1 (0x2UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00020000 */ -#define GPIO_OSPEEDER_OSPEED9_Pos (18U) -#define GPIO_OSPEEDER_OSPEED9_Msk (0x3UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x000C0000 */ -#define GPIO_OSPEEDER_OSPEED9 GPIO_OSPEEDER_OSPEED9_Msk -#define GPIO_OSPEEDER_OSPEED9_0 (0x1UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x00040000 */ -#define GPIO_OSPEEDER_OSPEED9_1 (0x2UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x00080000 */ -#define GPIO_OSPEEDER_OSPEED10_Pos (20U) -#define GPIO_OSPEEDER_OSPEED10_Msk (0x3UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00300000 */ -#define GPIO_OSPEEDER_OSPEED10 GPIO_OSPEEDER_OSPEED10_Msk -#define GPIO_OSPEEDER_OSPEED10_0 (0x1UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00100000 */ -#define GPIO_OSPEEDER_OSPEED10_1 (0x2UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00200000 */ -#define GPIO_OSPEEDER_OSPEED11_Pos (22U) -#define GPIO_OSPEEDER_OSPEED11_Msk (0x3UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00C00000 */ -#define GPIO_OSPEEDER_OSPEED11 GPIO_OSPEEDER_OSPEED11_Msk -#define GPIO_OSPEEDER_OSPEED11_0 (0x1UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00400000 */ -#define GPIO_OSPEEDER_OSPEED11_1 (0x2UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00800000 */ -#define GPIO_OSPEEDER_OSPEED12_Pos (24U) -#define GPIO_OSPEEDER_OSPEED12_Msk (0x3UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x03000000 */ -#define GPIO_OSPEEDER_OSPEED12 GPIO_OSPEEDER_OSPEED12_Msk -#define GPIO_OSPEEDER_OSPEED12_0 (0x1UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x01000000 */ -#define GPIO_OSPEEDER_OSPEED12_1 (0x2UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x02000000 */ -#define GPIO_OSPEEDER_OSPEED13_Pos (26U) -#define GPIO_OSPEEDER_OSPEED13_Msk (0x3UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x0C000000 */ -#define GPIO_OSPEEDER_OSPEED13 GPIO_OSPEEDER_OSPEED13_Msk -#define GPIO_OSPEEDER_OSPEED13_0 (0x1UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x04000000 */ -#define GPIO_OSPEEDER_OSPEED13_1 (0x2UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x08000000 */ -#define GPIO_OSPEEDER_OSPEED14_Pos (28U) -#define GPIO_OSPEEDER_OSPEED14_Msk (0x3UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x30000000 */ -#define GPIO_OSPEEDER_OSPEED14 GPIO_OSPEEDER_OSPEED14_Msk -#define GPIO_OSPEEDER_OSPEED14_0 (0x1UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x10000000 */ -#define GPIO_OSPEEDER_OSPEED14_1 (0x2UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x20000000 */ -#define GPIO_OSPEEDER_OSPEED15_Pos (30U) -#define GPIO_OSPEEDER_OSPEED15_Msk (0x3UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0xC0000000 */ -#define GPIO_OSPEEDER_OSPEED15 GPIO_OSPEEDER_OSPEED15_Msk -#define GPIO_OSPEEDER_OSPEED15_0 (0x1UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0x40000000 */ -#define GPIO_OSPEEDER_OSPEED15_1 (0x2UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0x80000000 */ +#define GPIO_OSPEEDR_OSPEED0_Pos (0U) +#define GPIO_OSPEEDR_OSPEED0_Msk (0x3UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000003 */ +#define GPIO_OSPEEDR_OSPEED0 GPIO_OSPEEDR_OSPEED0_Msk +#define GPIO_OSPEEDR_OSPEED0_0 (0x1UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000001 */ +#define GPIO_OSPEEDR_OSPEED0_1 (0x2UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000002 */ +#define GPIO_OSPEEDR_OSPEED1_Pos (2U) +#define GPIO_OSPEEDR_OSPEED1_Msk (0x3UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x0000000C */ +#define GPIO_OSPEEDR_OSPEED1 GPIO_OSPEEDR_OSPEED1_Msk +#define GPIO_OSPEEDR_OSPEED1_0 (0x1UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x00000004 */ +#define GPIO_OSPEEDR_OSPEED1_1 (0x2UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x00000008 */ +#define GPIO_OSPEEDR_OSPEED2_Pos (4U) +#define GPIO_OSPEEDR_OSPEED2_Msk (0x3UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000030 */ +#define GPIO_OSPEEDR_OSPEED2 GPIO_OSPEEDR_OSPEED2_Msk +#define GPIO_OSPEEDR_OSPEED2_0 (0x1UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000010 */ +#define GPIO_OSPEEDR_OSPEED2_1 (0x2UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000020 */ +#define GPIO_OSPEEDR_OSPEED3_Pos (6U) +#define GPIO_OSPEEDR_OSPEED3_Msk (0x3UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x000000C0 */ +#define GPIO_OSPEEDR_OSPEED3 GPIO_OSPEEDR_OSPEED3_Msk +#define GPIO_OSPEEDR_OSPEED3_0 (0x1UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x00000040 */ +#define GPIO_OSPEEDR_OSPEED3_1 (0x2UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x00000080 */ +#define GPIO_OSPEEDR_OSPEED4_Pos (8U) +#define GPIO_OSPEEDR_OSPEED4_Msk (0x3UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000300 */ +#define GPIO_OSPEEDR_OSPEED4 GPIO_OSPEEDR_OSPEED4_Msk +#define GPIO_OSPEEDR_OSPEED4_0 (0x1UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000100 */ +#define GPIO_OSPEEDR_OSPEED4_1 (0x2UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000200 */ +#define GPIO_OSPEEDR_OSPEED5_Pos (10U) +#define GPIO_OSPEEDR_OSPEED5_Msk (0x3UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000C00 */ +#define GPIO_OSPEEDR_OSPEED5 GPIO_OSPEEDR_OSPEED5_Msk +#define GPIO_OSPEEDR_OSPEED5_0 (0x1UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000400 */ +#define GPIO_OSPEEDR_OSPEED5_1 (0x2UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000800 */ +#define GPIO_OSPEEDR_OSPEED6_Pos (12U) +#define GPIO_OSPEEDR_OSPEED6_Msk (0x3UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00003000 */ +#define GPIO_OSPEEDR_OSPEED6 GPIO_OSPEEDR_OSPEED6_Msk +#define GPIO_OSPEEDR_OSPEED6_0 (0x1UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00001000 */ +#define GPIO_OSPEEDR_OSPEED6_1 (0x2UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00002000 */ +#define GPIO_OSPEEDR_OSPEED7_Pos (14U) +#define GPIO_OSPEEDR_OSPEED7_Msk (0x3UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x0000C000 */ +#define GPIO_OSPEEDR_OSPEED7 GPIO_OSPEEDR_OSPEED7_Msk +#define GPIO_OSPEEDR_OSPEED7_0 (0x1UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x00004000 */ +#define GPIO_OSPEEDR_OSPEED7_1 (0x2UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x00008000 */ +#define GPIO_OSPEEDR_OSPEED8_Pos (16U) +#define GPIO_OSPEEDR_OSPEED8_Msk (0x3UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00030000 */ +#define GPIO_OSPEEDR_OSPEED8 GPIO_OSPEEDR_OSPEED8_Msk +#define GPIO_OSPEEDR_OSPEED8_0 (0x1UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00010000 */ +#define GPIO_OSPEEDR_OSPEED8_1 (0x2UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00020000 */ +#define GPIO_OSPEEDR_OSPEED9_Pos (18U) +#define GPIO_OSPEEDR_OSPEED9_Msk (0x3UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x000C0000 */ +#define GPIO_OSPEEDR_OSPEED9 GPIO_OSPEEDR_OSPEED9_Msk +#define GPIO_OSPEEDR_OSPEED9_0 (0x1UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x00040000 */ +#define GPIO_OSPEEDR_OSPEED9_1 (0x2UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x00080000 */ +#define GPIO_OSPEEDR_OSPEED10_Pos (20U) +#define GPIO_OSPEEDR_OSPEED10_Msk (0x3UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00300000 */ +#define GPIO_OSPEEDR_OSPEED10 GPIO_OSPEEDR_OSPEED10_Msk +#define GPIO_OSPEEDR_OSPEED10_0 (0x1UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00100000 */ +#define GPIO_OSPEEDR_OSPEED10_1 (0x2UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00200000 */ +#define GPIO_OSPEEDR_OSPEED11_Pos (22U) +#define GPIO_OSPEEDR_OSPEED11_Msk (0x3UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00C00000 */ +#define GPIO_OSPEEDR_OSPEED11 GPIO_OSPEEDR_OSPEED11_Msk +#define GPIO_OSPEEDR_OSPEED11_0 (0x1UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00400000 */ +#define GPIO_OSPEEDR_OSPEED11_1 (0x2UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00800000 */ +#define GPIO_OSPEEDR_OSPEED12_Pos (24U) +#define GPIO_OSPEEDR_OSPEED12_Msk (0x3UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x03000000 */ +#define GPIO_OSPEEDR_OSPEED12 GPIO_OSPEEDR_OSPEED12_Msk +#define GPIO_OSPEEDR_OSPEED12_0 (0x1UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x01000000 */ +#define GPIO_OSPEEDR_OSPEED12_1 (0x2UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x02000000 */ +#define GPIO_OSPEEDR_OSPEED13_Pos (26U) +#define GPIO_OSPEEDR_OSPEED13_Msk (0x3UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x0C000000 */ +#define GPIO_OSPEEDR_OSPEED13 GPIO_OSPEEDR_OSPEED13_Msk +#define GPIO_OSPEEDR_OSPEED13_0 (0x1UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x04000000 */ +#define GPIO_OSPEEDR_OSPEED13_1 (0x2UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x08000000 */ +#define GPIO_OSPEEDR_OSPEED14_Pos (28U) +#define GPIO_OSPEEDR_OSPEED14_Msk (0x3UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x30000000 */ +#define GPIO_OSPEEDR_OSPEED14 GPIO_OSPEEDR_OSPEED14_Msk +#define GPIO_OSPEEDR_OSPEED14_0 (0x1UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x10000000 */ +#define GPIO_OSPEEDR_OSPEED14_1 (0x2UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x20000000 */ +#define GPIO_OSPEEDR_OSPEED15_Pos (30U) +#define GPIO_OSPEEDR_OSPEED15_Msk (0x3UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0xC0000000 */ +#define GPIO_OSPEEDR_OSPEED15 GPIO_OSPEEDR_OSPEED15_Msk +#define GPIO_OSPEEDR_OSPEED15_0 (0x1UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0x40000000 */ +#define GPIO_OSPEEDR_OSPEED15_1 (0x2UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0x80000000 */ + +/* Legacy defines */ +#define GPIO_OSPEEDER_OSPEED0_Pos GPIO_OSPEEDR_OSPEED0_Pos +#define GPIO_OSPEEDER_OSPEED0_Msk GPIO_OSPEEDR_OSPEED0_Msk +#define GPIO_OSPEEDER_OSPEED0 GPIO_OSPEEDR_OSPEED0 +#define GPIO_OSPEEDER_OSPEED0_0 GPIO_OSPEEDR_OSPEED0_0 +#define GPIO_OSPEEDER_OSPEED0_1 GPIO_OSPEEDR_OSPEED0_1 +#define GPIO_OSPEEDER_OSPEED1_Pos GPIO_OSPEEDR_OSPEED1_Pos +#define GPIO_OSPEEDER_OSPEED1_Msk GPIO_OSPEEDR_OSPEED1_Msk +#define GPIO_OSPEEDER_OSPEED1 GPIO_OSPEEDR_OSPEED1 +#define GPIO_OSPEEDER_OSPEED1_0 GPIO_OSPEEDR_OSPEED1_0 +#define GPIO_OSPEEDER_OSPEED1_1 GPIO_OSPEEDR_OSPEED1_1 +#define GPIO_OSPEEDER_OSPEED2_Pos GPIO_OSPEEDR_OSPEED2_Pos +#define GPIO_OSPEEDER_OSPEED2_Msk GPIO_OSPEEDR_OSPEED2_Msk +#define GPIO_OSPEEDER_OSPEED2 GPIO_OSPEEDR_OSPEED2 +#define GPIO_OSPEEDER_OSPEED2_0 GPIO_OSPEEDR_OSPEED2_0 +#define GPIO_OSPEEDER_OSPEED2_1 GPIO_OSPEEDR_OSPEED2_1 +#define GPIO_OSPEEDER_OSPEED3_Pos GPIO_OSPEEDR_OSPEED3_Pos +#define GPIO_OSPEEDER_OSPEED3_Msk GPIO_OSPEEDR_OSPEED3_Msk +#define GPIO_OSPEEDER_OSPEED3 GPIO_OSPEEDR_OSPEED3 +#define GPIO_OSPEEDER_OSPEED3_0 GPIO_OSPEEDR_OSPEED3_0 +#define GPIO_OSPEEDER_OSPEED3_1 GPIO_OSPEEDR_OSPEED3_1 +#define GPIO_OSPEEDER_OSPEED4_Pos GPIO_OSPEEDR_OSPEED4_Pos +#define GPIO_OSPEEDER_OSPEED4_Msk GPIO_OSPEEDR_OSPEED4_Msk +#define GPIO_OSPEEDER_OSPEED4 GPIO_OSPEEDR_OSPEED4 +#define GPIO_OSPEEDER_OSPEED4_0 GPIO_OSPEEDR_OSPEED4_0 +#define GPIO_OSPEEDER_OSPEED4_1 GPIO_OSPEEDR_OSPEED4_1 +#define GPIO_OSPEEDER_OSPEED5_Pos GPIO_OSPEEDR_OSPEED5_Pos +#define GPIO_OSPEEDER_OSPEED5_Msk GPIO_OSPEEDR_OSPEED5_Msk +#define GPIO_OSPEEDER_OSPEED5 GPIO_OSPEEDR_OSPEED5 +#define GPIO_OSPEEDER_OSPEED5_0 GPIO_OSPEEDR_OSPEED5_0 +#define GPIO_OSPEEDER_OSPEED5_1 GPIO_OSPEEDR_OSPEED5_1 +#define GPIO_OSPEEDER_OSPEED6_Pos GPIO_OSPEEDR_OSPEED6_Pos +#define GPIO_OSPEEDER_OSPEED6_Msk GPIO_OSPEEDR_OSPEED6_Msk +#define GPIO_OSPEEDER_OSPEED6 GPIO_OSPEEDR_OSPEED6 +#define GPIO_OSPEEDER_OSPEED6_0 GPIO_OSPEEDR_OSPEED6_0 +#define GPIO_OSPEEDER_OSPEED6_1 GPIO_OSPEEDR_OSPEED6_1 +#define GPIO_OSPEEDER_OSPEED7_Pos GPIO_OSPEEDR_OSPEED7_Pos +#define GPIO_OSPEEDER_OSPEED7_Msk GPIO_OSPEEDR_OSPEED7_Msk +#define GPIO_OSPEEDER_OSPEED7 GPIO_OSPEEDR_OSPEED7 +#define GPIO_OSPEEDER_OSPEED7_0 GPIO_OSPEEDR_OSPEED7_0 +#define GPIO_OSPEEDER_OSPEED7_1 GPIO_OSPEEDR_OSPEED7_1 +#define GPIO_OSPEEDER_OSPEED8_Pos GPIO_OSPEEDR_OSPEED8_Pos +#define GPIO_OSPEEDER_OSPEED8_Msk GPIO_OSPEEDR_OSPEED8_Msk +#define GPIO_OSPEEDER_OSPEED8 GPIO_OSPEEDR_OSPEED8 +#define GPIO_OSPEEDER_OSPEED8_0 GPIO_OSPEEDR_OSPEED8_0 +#define GPIO_OSPEEDER_OSPEED8_1 GPIO_OSPEEDR_OSPEED8_1 +#define GPIO_OSPEEDER_OSPEED9_Pos GPIO_OSPEEDR_OSPEED9_Pos +#define GPIO_OSPEEDER_OSPEED9_Msk GPIO_OSPEEDR_OSPEED9_Msk +#define GPIO_OSPEEDER_OSPEED9 GPIO_OSPEEDR_OSPEED9 +#define GPIO_OSPEEDER_OSPEED9_0 GPIO_OSPEEDR_OSPEED9_0 +#define GPIO_OSPEEDER_OSPEED9_1 GPIO_OSPEEDR_OSPEED9_1 +#define GPIO_OSPEEDER_OSPEED10_Pos GPIO_OSPEEDR_OSPEED10_Pos +#define GPIO_OSPEEDER_OSPEED10_Msk GPIO_OSPEEDR_OSPEED10_Msk +#define GPIO_OSPEEDER_OSPEED10 GPIO_OSPEEDR_OSPEED10 +#define GPIO_OSPEEDER_OSPEED10_0 GPIO_OSPEEDR_OSPEED10_0 +#define GPIO_OSPEEDER_OSPEED10_1 GPIO_OSPEEDR_OSPEED10_1 +#define GPIO_OSPEEDER_OSPEED11_Pos GPIO_OSPEEDR_OSPEED11_Pos +#define GPIO_OSPEEDER_OSPEED11_Msk GPIO_OSPEEDR_OSPEED11_Msk +#define GPIO_OSPEEDER_OSPEED11 GPIO_OSPEEDR_OSPEED11 +#define GPIO_OSPEEDER_OSPEED11_0 GPIO_OSPEEDR_OSPEED11_0 +#define GPIO_OSPEEDER_OSPEED11_1 GPIO_OSPEEDR_OSPEED11_1 +#define GPIO_OSPEEDER_OSPEED12_Pos GPIO_OSPEEDR_OSPEED12_Pos +#define GPIO_OSPEEDER_OSPEED12_Msk GPIO_OSPEEDR_OSPEED12_Msk +#define GPIO_OSPEEDER_OSPEED12 GPIO_OSPEEDR_OSPEED12 +#define GPIO_OSPEEDER_OSPEED12_0 GPIO_OSPEEDR_OSPEED12_0 +#define GPIO_OSPEEDER_OSPEED12_1 GPIO_OSPEEDR_OSPEED12_1 +#define GPIO_OSPEEDER_OSPEED13_Pos GPIO_OSPEEDR_OSPEED13_Pos +#define GPIO_OSPEEDER_OSPEED13_Msk GPIO_OSPEEDR_OSPEED13_Msk +#define GPIO_OSPEEDER_OSPEED13 GPIO_OSPEEDR_OSPEED13 +#define GPIO_OSPEEDER_OSPEED13_0 GPIO_OSPEEDR_OSPEED13_0 +#define GPIO_OSPEEDER_OSPEED13_1 GPIO_OSPEEDR_OSPEED13_1 +#define GPIO_OSPEEDER_OSPEED14_Pos GPIO_OSPEEDR_OSPEED14_Pos +#define GPIO_OSPEEDER_OSPEED14_Msk GPIO_OSPEEDR_OSPEED14_Msk +#define GPIO_OSPEEDER_OSPEED14 GPIO_OSPEEDR_OSPEED14 +#define GPIO_OSPEEDER_OSPEED14_0 GPIO_OSPEEDR_OSPEED14_0 +#define GPIO_OSPEEDER_OSPEED14_1 GPIO_OSPEEDR_OSPEED14_1 +#define GPIO_OSPEEDER_OSPEED15_Pos GPIO_OSPEEDR_OSPEED15_Pos +#define GPIO_OSPEEDER_OSPEED15_Msk GPIO_OSPEEDR_OSPEED15_Msk +#define GPIO_OSPEEDER_OSPEED15 GPIO_OSPEEDR_OSPEED15 +#define GPIO_OSPEEDER_OSPEED15_0 GPIO_OSPEEDR_OSPEED15_0 +#define GPIO_OSPEEDER_OSPEED15_1 GPIO_OSPEEDR_OSPEED15_1 /******************* Bit definition for GPIO_PUPDR register ******************/ #define GPIO_PUPDR_PUPD0_Pos (0U) diff --git a/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l053xx.h b/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l053xx.h index 155bd6a953..8e74bf7a32 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l053xx.h +++ b/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l053xx.h @@ -2509,86 +2509,168 @@ typedef struct #define GPIO_OTYPER_OT_15 (0x00008000U) /**************** Bit definition for GPIO_OSPEEDR register ******************/ -#define GPIO_OSPEEDER_OSPEED0_Pos (0U) -#define GPIO_OSPEEDER_OSPEED0_Msk (0x3UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000003 */ -#define GPIO_OSPEEDER_OSPEED0 GPIO_OSPEEDER_OSPEED0_Msk -#define GPIO_OSPEEDER_OSPEED0_0 (0x1UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000001 */ -#define GPIO_OSPEEDER_OSPEED0_1 (0x2UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000002 */ -#define GPIO_OSPEEDER_OSPEED1_Pos (2U) -#define GPIO_OSPEEDER_OSPEED1_Msk (0x3UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x0000000C */ -#define GPIO_OSPEEDER_OSPEED1 GPIO_OSPEEDER_OSPEED1_Msk -#define GPIO_OSPEEDER_OSPEED1_0 (0x1UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x00000004 */ -#define GPIO_OSPEEDER_OSPEED1_1 (0x2UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x00000008 */ -#define GPIO_OSPEEDER_OSPEED2_Pos (4U) -#define GPIO_OSPEEDER_OSPEED2_Msk (0x3UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000030 */ -#define GPIO_OSPEEDER_OSPEED2 GPIO_OSPEEDER_OSPEED2_Msk -#define GPIO_OSPEEDER_OSPEED2_0 (0x1UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000010 */ -#define GPIO_OSPEEDER_OSPEED2_1 (0x2UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000020 */ -#define GPIO_OSPEEDER_OSPEED3_Pos (6U) -#define GPIO_OSPEEDER_OSPEED3_Msk (0x3UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x000000C0 */ -#define GPIO_OSPEEDER_OSPEED3 GPIO_OSPEEDER_OSPEED3_Msk -#define GPIO_OSPEEDER_OSPEED3_0 (0x1UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x00000040 */ -#define GPIO_OSPEEDER_OSPEED3_1 (0x2UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x00000080 */ -#define GPIO_OSPEEDER_OSPEED4_Pos (8U) -#define GPIO_OSPEEDER_OSPEED4_Msk (0x3UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000300 */ -#define GPIO_OSPEEDER_OSPEED4 GPIO_OSPEEDER_OSPEED4_Msk -#define GPIO_OSPEEDER_OSPEED4_0 (0x1UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000100 */ -#define GPIO_OSPEEDER_OSPEED4_1 (0x2UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000200 */ -#define GPIO_OSPEEDER_OSPEED5_Pos (10U) -#define GPIO_OSPEEDER_OSPEED5_Msk (0x3UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000C00 */ -#define GPIO_OSPEEDER_OSPEED5 GPIO_OSPEEDER_OSPEED5_Msk -#define GPIO_OSPEEDER_OSPEED5_0 (0x1UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000400 */ -#define GPIO_OSPEEDER_OSPEED5_1 (0x2UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000800 */ -#define GPIO_OSPEEDER_OSPEED6_Pos (12U) -#define GPIO_OSPEEDER_OSPEED6_Msk (0x3UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00003000 */ -#define GPIO_OSPEEDER_OSPEED6 GPIO_OSPEEDER_OSPEED6_Msk -#define GPIO_OSPEEDER_OSPEED6_0 (0x1UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00001000 */ -#define GPIO_OSPEEDER_OSPEED6_1 (0x2UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00002000 */ -#define GPIO_OSPEEDER_OSPEED7_Pos (14U) -#define GPIO_OSPEEDER_OSPEED7_Msk (0x3UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x0000C000 */ -#define GPIO_OSPEEDER_OSPEED7 GPIO_OSPEEDER_OSPEED7_Msk -#define GPIO_OSPEEDER_OSPEED7_0 (0x1UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x00004000 */ -#define GPIO_OSPEEDER_OSPEED7_1 (0x2UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x00008000 */ -#define GPIO_OSPEEDER_OSPEED8_Pos (16U) -#define GPIO_OSPEEDER_OSPEED8_Msk (0x3UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00030000 */ -#define GPIO_OSPEEDER_OSPEED8 GPIO_OSPEEDER_OSPEED8_Msk -#define GPIO_OSPEEDER_OSPEED8_0 (0x1UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00010000 */ -#define GPIO_OSPEEDER_OSPEED8_1 (0x2UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00020000 */ -#define GPIO_OSPEEDER_OSPEED9_Pos (18U) -#define GPIO_OSPEEDER_OSPEED9_Msk (0x3UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x000C0000 */ -#define GPIO_OSPEEDER_OSPEED9 GPIO_OSPEEDER_OSPEED9_Msk -#define GPIO_OSPEEDER_OSPEED9_0 (0x1UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x00040000 */ -#define GPIO_OSPEEDER_OSPEED9_1 (0x2UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x00080000 */ -#define GPIO_OSPEEDER_OSPEED10_Pos (20U) -#define GPIO_OSPEEDER_OSPEED10_Msk (0x3UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00300000 */ -#define GPIO_OSPEEDER_OSPEED10 GPIO_OSPEEDER_OSPEED10_Msk -#define GPIO_OSPEEDER_OSPEED10_0 (0x1UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00100000 */ -#define GPIO_OSPEEDER_OSPEED10_1 (0x2UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00200000 */ -#define GPIO_OSPEEDER_OSPEED11_Pos (22U) -#define GPIO_OSPEEDER_OSPEED11_Msk (0x3UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00C00000 */ -#define GPIO_OSPEEDER_OSPEED11 GPIO_OSPEEDER_OSPEED11_Msk -#define GPIO_OSPEEDER_OSPEED11_0 (0x1UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00400000 */ -#define GPIO_OSPEEDER_OSPEED11_1 (0x2UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00800000 */ -#define GPIO_OSPEEDER_OSPEED12_Pos (24U) -#define GPIO_OSPEEDER_OSPEED12_Msk (0x3UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x03000000 */ -#define GPIO_OSPEEDER_OSPEED12 GPIO_OSPEEDER_OSPEED12_Msk -#define GPIO_OSPEEDER_OSPEED12_0 (0x1UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x01000000 */ -#define GPIO_OSPEEDER_OSPEED12_1 (0x2UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x02000000 */ -#define GPIO_OSPEEDER_OSPEED13_Pos (26U) -#define GPIO_OSPEEDER_OSPEED13_Msk (0x3UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x0C000000 */ -#define GPIO_OSPEEDER_OSPEED13 GPIO_OSPEEDER_OSPEED13_Msk -#define GPIO_OSPEEDER_OSPEED13_0 (0x1UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x04000000 */ -#define GPIO_OSPEEDER_OSPEED13_1 (0x2UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x08000000 */ -#define GPIO_OSPEEDER_OSPEED14_Pos (28U) -#define GPIO_OSPEEDER_OSPEED14_Msk (0x3UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x30000000 */ -#define GPIO_OSPEEDER_OSPEED14 GPIO_OSPEEDER_OSPEED14_Msk -#define GPIO_OSPEEDER_OSPEED14_0 (0x1UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x10000000 */ -#define GPIO_OSPEEDER_OSPEED14_1 (0x2UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x20000000 */ -#define GPIO_OSPEEDER_OSPEED15_Pos (30U) -#define GPIO_OSPEEDER_OSPEED15_Msk (0x3UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0xC0000000 */ -#define GPIO_OSPEEDER_OSPEED15 GPIO_OSPEEDER_OSPEED15_Msk -#define GPIO_OSPEEDER_OSPEED15_0 (0x1UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0x40000000 */ -#define GPIO_OSPEEDER_OSPEED15_1 (0x2UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0x80000000 */ +#define GPIO_OSPEEDR_OSPEED0_Pos (0U) +#define GPIO_OSPEEDR_OSPEED0_Msk (0x3UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000003 */ +#define GPIO_OSPEEDR_OSPEED0 GPIO_OSPEEDR_OSPEED0_Msk +#define GPIO_OSPEEDR_OSPEED0_0 (0x1UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000001 */ +#define GPIO_OSPEEDR_OSPEED0_1 (0x2UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000002 */ +#define GPIO_OSPEEDR_OSPEED1_Pos (2U) +#define GPIO_OSPEEDR_OSPEED1_Msk (0x3UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x0000000C */ +#define GPIO_OSPEEDR_OSPEED1 GPIO_OSPEEDR_OSPEED1_Msk +#define GPIO_OSPEEDR_OSPEED1_0 (0x1UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x00000004 */ +#define GPIO_OSPEEDR_OSPEED1_1 (0x2UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x00000008 */ +#define GPIO_OSPEEDR_OSPEED2_Pos (4U) +#define GPIO_OSPEEDR_OSPEED2_Msk (0x3UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000030 */ +#define GPIO_OSPEEDR_OSPEED2 GPIO_OSPEEDR_OSPEED2_Msk +#define GPIO_OSPEEDR_OSPEED2_0 (0x1UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000010 */ +#define GPIO_OSPEEDR_OSPEED2_1 (0x2UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000020 */ +#define GPIO_OSPEEDR_OSPEED3_Pos (6U) +#define GPIO_OSPEEDR_OSPEED3_Msk (0x3UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x000000C0 */ +#define GPIO_OSPEEDR_OSPEED3 GPIO_OSPEEDR_OSPEED3_Msk +#define GPIO_OSPEEDR_OSPEED3_0 (0x1UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x00000040 */ +#define GPIO_OSPEEDR_OSPEED3_1 (0x2UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x00000080 */ +#define GPIO_OSPEEDR_OSPEED4_Pos (8U) +#define GPIO_OSPEEDR_OSPEED4_Msk (0x3UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000300 */ +#define GPIO_OSPEEDR_OSPEED4 GPIO_OSPEEDR_OSPEED4_Msk +#define GPIO_OSPEEDR_OSPEED4_0 (0x1UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000100 */ +#define GPIO_OSPEEDR_OSPEED4_1 (0x2UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000200 */ +#define GPIO_OSPEEDR_OSPEED5_Pos (10U) +#define GPIO_OSPEEDR_OSPEED5_Msk (0x3UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000C00 */ +#define GPIO_OSPEEDR_OSPEED5 GPIO_OSPEEDR_OSPEED5_Msk +#define GPIO_OSPEEDR_OSPEED5_0 (0x1UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000400 */ +#define GPIO_OSPEEDR_OSPEED5_1 (0x2UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000800 */ +#define GPIO_OSPEEDR_OSPEED6_Pos (12U) +#define GPIO_OSPEEDR_OSPEED6_Msk (0x3UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00003000 */ +#define GPIO_OSPEEDR_OSPEED6 GPIO_OSPEEDR_OSPEED6_Msk +#define GPIO_OSPEEDR_OSPEED6_0 (0x1UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00001000 */ +#define GPIO_OSPEEDR_OSPEED6_1 (0x2UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00002000 */ +#define GPIO_OSPEEDR_OSPEED7_Pos (14U) +#define GPIO_OSPEEDR_OSPEED7_Msk (0x3UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x0000C000 */ +#define GPIO_OSPEEDR_OSPEED7 GPIO_OSPEEDR_OSPEED7_Msk +#define GPIO_OSPEEDR_OSPEED7_0 (0x1UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x00004000 */ +#define GPIO_OSPEEDR_OSPEED7_1 (0x2UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x00008000 */ +#define GPIO_OSPEEDR_OSPEED8_Pos (16U) +#define GPIO_OSPEEDR_OSPEED8_Msk (0x3UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00030000 */ +#define GPIO_OSPEEDR_OSPEED8 GPIO_OSPEEDR_OSPEED8_Msk +#define GPIO_OSPEEDR_OSPEED8_0 (0x1UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00010000 */ +#define GPIO_OSPEEDR_OSPEED8_1 (0x2UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00020000 */ +#define GPIO_OSPEEDR_OSPEED9_Pos (18U) +#define GPIO_OSPEEDR_OSPEED9_Msk (0x3UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x000C0000 */ +#define GPIO_OSPEEDR_OSPEED9 GPIO_OSPEEDR_OSPEED9_Msk +#define GPIO_OSPEEDR_OSPEED9_0 (0x1UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x00040000 */ +#define GPIO_OSPEEDR_OSPEED9_1 (0x2UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x00080000 */ +#define GPIO_OSPEEDR_OSPEED10_Pos (20U) +#define GPIO_OSPEEDR_OSPEED10_Msk (0x3UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00300000 */ +#define GPIO_OSPEEDR_OSPEED10 GPIO_OSPEEDR_OSPEED10_Msk +#define GPIO_OSPEEDR_OSPEED10_0 (0x1UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00100000 */ +#define GPIO_OSPEEDR_OSPEED10_1 (0x2UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00200000 */ +#define GPIO_OSPEEDR_OSPEED11_Pos (22U) +#define GPIO_OSPEEDR_OSPEED11_Msk (0x3UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00C00000 */ +#define GPIO_OSPEEDR_OSPEED11 GPIO_OSPEEDR_OSPEED11_Msk +#define GPIO_OSPEEDR_OSPEED11_0 (0x1UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00400000 */ +#define GPIO_OSPEEDR_OSPEED11_1 (0x2UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00800000 */ +#define GPIO_OSPEEDR_OSPEED12_Pos (24U) +#define GPIO_OSPEEDR_OSPEED12_Msk (0x3UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x03000000 */ +#define GPIO_OSPEEDR_OSPEED12 GPIO_OSPEEDR_OSPEED12_Msk +#define GPIO_OSPEEDR_OSPEED12_0 (0x1UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x01000000 */ +#define GPIO_OSPEEDR_OSPEED12_1 (0x2UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x02000000 */ +#define GPIO_OSPEEDR_OSPEED13_Pos (26U) +#define GPIO_OSPEEDR_OSPEED13_Msk (0x3UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x0C000000 */ +#define GPIO_OSPEEDR_OSPEED13 GPIO_OSPEEDR_OSPEED13_Msk +#define GPIO_OSPEEDR_OSPEED13_0 (0x1UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x04000000 */ +#define GPIO_OSPEEDR_OSPEED13_1 (0x2UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x08000000 */ +#define GPIO_OSPEEDR_OSPEED14_Pos (28U) +#define GPIO_OSPEEDR_OSPEED14_Msk (0x3UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x30000000 */ +#define GPIO_OSPEEDR_OSPEED14 GPIO_OSPEEDR_OSPEED14_Msk +#define GPIO_OSPEEDR_OSPEED14_0 (0x1UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x10000000 */ +#define GPIO_OSPEEDR_OSPEED14_1 (0x2UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x20000000 */ +#define GPIO_OSPEEDR_OSPEED15_Pos (30U) +#define GPIO_OSPEEDR_OSPEED15_Msk (0x3UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0xC0000000 */ +#define GPIO_OSPEEDR_OSPEED15 GPIO_OSPEEDR_OSPEED15_Msk +#define GPIO_OSPEEDR_OSPEED15_0 (0x1UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0x40000000 */ +#define GPIO_OSPEEDR_OSPEED15_1 (0x2UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0x80000000 */ + +/* Legacy defines */ +#define GPIO_OSPEEDER_OSPEED0_Pos GPIO_OSPEEDR_OSPEED0_Pos +#define GPIO_OSPEEDER_OSPEED0_Msk GPIO_OSPEEDR_OSPEED0_Msk +#define GPIO_OSPEEDER_OSPEED0 GPIO_OSPEEDR_OSPEED0 +#define GPIO_OSPEEDER_OSPEED0_0 GPIO_OSPEEDR_OSPEED0_0 +#define GPIO_OSPEEDER_OSPEED0_1 GPIO_OSPEEDR_OSPEED0_1 +#define GPIO_OSPEEDER_OSPEED1_Pos GPIO_OSPEEDR_OSPEED1_Pos +#define GPIO_OSPEEDER_OSPEED1_Msk GPIO_OSPEEDR_OSPEED1_Msk +#define GPIO_OSPEEDER_OSPEED1 GPIO_OSPEEDR_OSPEED1 +#define GPIO_OSPEEDER_OSPEED1_0 GPIO_OSPEEDR_OSPEED1_0 +#define GPIO_OSPEEDER_OSPEED1_1 GPIO_OSPEEDR_OSPEED1_1 +#define GPIO_OSPEEDER_OSPEED2_Pos GPIO_OSPEEDR_OSPEED2_Pos +#define GPIO_OSPEEDER_OSPEED2_Msk GPIO_OSPEEDR_OSPEED2_Msk +#define GPIO_OSPEEDER_OSPEED2 GPIO_OSPEEDR_OSPEED2 +#define GPIO_OSPEEDER_OSPEED2_0 GPIO_OSPEEDR_OSPEED2_0 +#define GPIO_OSPEEDER_OSPEED2_1 GPIO_OSPEEDR_OSPEED2_1 +#define GPIO_OSPEEDER_OSPEED3_Pos GPIO_OSPEEDR_OSPEED3_Pos +#define GPIO_OSPEEDER_OSPEED3_Msk GPIO_OSPEEDR_OSPEED3_Msk +#define GPIO_OSPEEDER_OSPEED3 GPIO_OSPEEDR_OSPEED3 +#define GPIO_OSPEEDER_OSPEED3_0 GPIO_OSPEEDR_OSPEED3_0 +#define GPIO_OSPEEDER_OSPEED3_1 GPIO_OSPEEDR_OSPEED3_1 +#define GPIO_OSPEEDER_OSPEED4_Pos GPIO_OSPEEDR_OSPEED4_Pos +#define GPIO_OSPEEDER_OSPEED4_Msk GPIO_OSPEEDR_OSPEED4_Msk +#define GPIO_OSPEEDER_OSPEED4 GPIO_OSPEEDR_OSPEED4 +#define GPIO_OSPEEDER_OSPEED4_0 GPIO_OSPEEDR_OSPEED4_0 +#define GPIO_OSPEEDER_OSPEED4_1 GPIO_OSPEEDR_OSPEED4_1 +#define GPIO_OSPEEDER_OSPEED5_Pos GPIO_OSPEEDR_OSPEED5_Pos +#define GPIO_OSPEEDER_OSPEED5_Msk GPIO_OSPEEDR_OSPEED5_Msk +#define GPIO_OSPEEDER_OSPEED5 GPIO_OSPEEDR_OSPEED5 +#define GPIO_OSPEEDER_OSPEED5_0 GPIO_OSPEEDR_OSPEED5_0 +#define GPIO_OSPEEDER_OSPEED5_1 GPIO_OSPEEDR_OSPEED5_1 +#define GPIO_OSPEEDER_OSPEED6_Pos GPIO_OSPEEDR_OSPEED6_Pos +#define GPIO_OSPEEDER_OSPEED6_Msk GPIO_OSPEEDR_OSPEED6_Msk +#define GPIO_OSPEEDER_OSPEED6 GPIO_OSPEEDR_OSPEED6 +#define GPIO_OSPEEDER_OSPEED6_0 GPIO_OSPEEDR_OSPEED6_0 +#define GPIO_OSPEEDER_OSPEED6_1 GPIO_OSPEEDR_OSPEED6_1 +#define GPIO_OSPEEDER_OSPEED7_Pos GPIO_OSPEEDR_OSPEED7_Pos +#define GPIO_OSPEEDER_OSPEED7_Msk GPIO_OSPEEDR_OSPEED7_Msk +#define GPIO_OSPEEDER_OSPEED7 GPIO_OSPEEDR_OSPEED7 +#define GPIO_OSPEEDER_OSPEED7_0 GPIO_OSPEEDR_OSPEED7_0 +#define GPIO_OSPEEDER_OSPEED7_1 GPIO_OSPEEDR_OSPEED7_1 +#define GPIO_OSPEEDER_OSPEED8_Pos GPIO_OSPEEDR_OSPEED8_Pos +#define GPIO_OSPEEDER_OSPEED8_Msk GPIO_OSPEEDR_OSPEED8_Msk +#define GPIO_OSPEEDER_OSPEED8 GPIO_OSPEEDR_OSPEED8 +#define GPIO_OSPEEDER_OSPEED8_0 GPIO_OSPEEDR_OSPEED8_0 +#define GPIO_OSPEEDER_OSPEED8_1 GPIO_OSPEEDR_OSPEED8_1 +#define GPIO_OSPEEDER_OSPEED9_Pos GPIO_OSPEEDR_OSPEED9_Pos +#define GPIO_OSPEEDER_OSPEED9_Msk GPIO_OSPEEDR_OSPEED9_Msk +#define GPIO_OSPEEDER_OSPEED9 GPIO_OSPEEDR_OSPEED9 +#define GPIO_OSPEEDER_OSPEED9_0 GPIO_OSPEEDR_OSPEED9_0 +#define GPIO_OSPEEDER_OSPEED9_1 GPIO_OSPEEDR_OSPEED9_1 +#define GPIO_OSPEEDER_OSPEED10_Pos GPIO_OSPEEDR_OSPEED10_Pos +#define GPIO_OSPEEDER_OSPEED10_Msk GPIO_OSPEEDR_OSPEED10_Msk +#define GPIO_OSPEEDER_OSPEED10 GPIO_OSPEEDR_OSPEED10 +#define GPIO_OSPEEDER_OSPEED10_0 GPIO_OSPEEDR_OSPEED10_0 +#define GPIO_OSPEEDER_OSPEED10_1 GPIO_OSPEEDR_OSPEED10_1 +#define GPIO_OSPEEDER_OSPEED11_Pos GPIO_OSPEEDR_OSPEED11_Pos +#define GPIO_OSPEEDER_OSPEED11_Msk GPIO_OSPEEDR_OSPEED11_Msk +#define GPIO_OSPEEDER_OSPEED11 GPIO_OSPEEDR_OSPEED11 +#define GPIO_OSPEEDER_OSPEED11_0 GPIO_OSPEEDR_OSPEED11_0 +#define GPIO_OSPEEDER_OSPEED11_1 GPIO_OSPEEDR_OSPEED11_1 +#define GPIO_OSPEEDER_OSPEED12_Pos GPIO_OSPEEDR_OSPEED12_Pos +#define GPIO_OSPEEDER_OSPEED12_Msk GPIO_OSPEEDR_OSPEED12_Msk +#define GPIO_OSPEEDER_OSPEED12 GPIO_OSPEEDR_OSPEED12 +#define GPIO_OSPEEDER_OSPEED12_0 GPIO_OSPEEDR_OSPEED12_0 +#define GPIO_OSPEEDER_OSPEED12_1 GPIO_OSPEEDR_OSPEED12_1 +#define GPIO_OSPEEDER_OSPEED13_Pos GPIO_OSPEEDR_OSPEED13_Pos +#define GPIO_OSPEEDER_OSPEED13_Msk GPIO_OSPEEDR_OSPEED13_Msk +#define GPIO_OSPEEDER_OSPEED13 GPIO_OSPEEDR_OSPEED13 +#define GPIO_OSPEEDER_OSPEED13_0 GPIO_OSPEEDR_OSPEED13_0 +#define GPIO_OSPEEDER_OSPEED13_1 GPIO_OSPEEDR_OSPEED13_1 +#define GPIO_OSPEEDER_OSPEED14_Pos GPIO_OSPEEDR_OSPEED14_Pos +#define GPIO_OSPEEDER_OSPEED14_Msk GPIO_OSPEEDR_OSPEED14_Msk +#define GPIO_OSPEEDER_OSPEED14 GPIO_OSPEEDR_OSPEED14 +#define GPIO_OSPEEDER_OSPEED14_0 GPIO_OSPEEDR_OSPEED14_0 +#define GPIO_OSPEEDER_OSPEED14_1 GPIO_OSPEEDR_OSPEED14_1 +#define GPIO_OSPEEDER_OSPEED15_Pos GPIO_OSPEEDR_OSPEED15_Pos +#define GPIO_OSPEEDER_OSPEED15_Msk GPIO_OSPEEDR_OSPEED15_Msk +#define GPIO_OSPEEDER_OSPEED15 GPIO_OSPEEDR_OSPEED15 +#define GPIO_OSPEEDER_OSPEED15_0 GPIO_OSPEEDR_OSPEED15_0 +#define GPIO_OSPEEDER_OSPEED15_1 GPIO_OSPEEDR_OSPEED15_1 /******************* Bit definition for GPIO_PUPDR register ******************/ #define GPIO_PUPDR_PUPD0_Pos (0U) diff --git a/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l062xx.h b/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l062xx.h index 23ac2024e7..b57d9e0e04 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l062xx.h +++ b/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l062xx.h @@ -2615,86 +2615,168 @@ typedef struct #define GPIO_OTYPER_OT_15 (0x00008000U) /**************** Bit definition for GPIO_OSPEEDR register ******************/ -#define GPIO_OSPEEDER_OSPEED0_Pos (0U) -#define GPIO_OSPEEDER_OSPEED0_Msk (0x3UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000003 */ -#define GPIO_OSPEEDER_OSPEED0 GPIO_OSPEEDER_OSPEED0_Msk -#define GPIO_OSPEEDER_OSPEED0_0 (0x1UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000001 */ -#define GPIO_OSPEEDER_OSPEED0_1 (0x2UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000002 */ -#define GPIO_OSPEEDER_OSPEED1_Pos (2U) -#define GPIO_OSPEEDER_OSPEED1_Msk (0x3UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x0000000C */ -#define GPIO_OSPEEDER_OSPEED1 GPIO_OSPEEDER_OSPEED1_Msk -#define GPIO_OSPEEDER_OSPEED1_0 (0x1UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x00000004 */ -#define GPIO_OSPEEDER_OSPEED1_1 (0x2UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x00000008 */ -#define GPIO_OSPEEDER_OSPEED2_Pos (4U) -#define GPIO_OSPEEDER_OSPEED2_Msk (0x3UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000030 */ -#define GPIO_OSPEEDER_OSPEED2 GPIO_OSPEEDER_OSPEED2_Msk -#define GPIO_OSPEEDER_OSPEED2_0 (0x1UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000010 */ -#define GPIO_OSPEEDER_OSPEED2_1 (0x2UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000020 */ -#define GPIO_OSPEEDER_OSPEED3_Pos (6U) -#define GPIO_OSPEEDER_OSPEED3_Msk (0x3UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x000000C0 */ -#define GPIO_OSPEEDER_OSPEED3 GPIO_OSPEEDER_OSPEED3_Msk -#define GPIO_OSPEEDER_OSPEED3_0 (0x1UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x00000040 */ -#define GPIO_OSPEEDER_OSPEED3_1 (0x2UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x00000080 */ -#define GPIO_OSPEEDER_OSPEED4_Pos (8U) -#define GPIO_OSPEEDER_OSPEED4_Msk (0x3UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000300 */ -#define GPIO_OSPEEDER_OSPEED4 GPIO_OSPEEDER_OSPEED4_Msk -#define GPIO_OSPEEDER_OSPEED4_0 (0x1UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000100 */ -#define GPIO_OSPEEDER_OSPEED4_1 (0x2UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000200 */ -#define GPIO_OSPEEDER_OSPEED5_Pos (10U) -#define GPIO_OSPEEDER_OSPEED5_Msk (0x3UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000C00 */ -#define GPIO_OSPEEDER_OSPEED5 GPIO_OSPEEDER_OSPEED5_Msk -#define GPIO_OSPEEDER_OSPEED5_0 (0x1UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000400 */ -#define GPIO_OSPEEDER_OSPEED5_1 (0x2UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000800 */ -#define GPIO_OSPEEDER_OSPEED6_Pos (12U) -#define GPIO_OSPEEDER_OSPEED6_Msk (0x3UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00003000 */ -#define GPIO_OSPEEDER_OSPEED6 GPIO_OSPEEDER_OSPEED6_Msk -#define GPIO_OSPEEDER_OSPEED6_0 (0x1UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00001000 */ -#define GPIO_OSPEEDER_OSPEED6_1 (0x2UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00002000 */ -#define GPIO_OSPEEDER_OSPEED7_Pos (14U) -#define GPIO_OSPEEDER_OSPEED7_Msk (0x3UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x0000C000 */ -#define GPIO_OSPEEDER_OSPEED7 GPIO_OSPEEDER_OSPEED7_Msk -#define GPIO_OSPEEDER_OSPEED7_0 (0x1UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x00004000 */ -#define GPIO_OSPEEDER_OSPEED7_1 (0x2UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x00008000 */ -#define GPIO_OSPEEDER_OSPEED8_Pos (16U) -#define GPIO_OSPEEDER_OSPEED8_Msk (0x3UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00030000 */ -#define GPIO_OSPEEDER_OSPEED8 GPIO_OSPEEDER_OSPEED8_Msk -#define GPIO_OSPEEDER_OSPEED8_0 (0x1UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00010000 */ -#define GPIO_OSPEEDER_OSPEED8_1 (0x2UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00020000 */ -#define GPIO_OSPEEDER_OSPEED9_Pos (18U) -#define GPIO_OSPEEDER_OSPEED9_Msk (0x3UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x000C0000 */ -#define GPIO_OSPEEDER_OSPEED9 GPIO_OSPEEDER_OSPEED9_Msk -#define GPIO_OSPEEDER_OSPEED9_0 (0x1UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x00040000 */ -#define GPIO_OSPEEDER_OSPEED9_1 (0x2UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x00080000 */ -#define GPIO_OSPEEDER_OSPEED10_Pos (20U) -#define GPIO_OSPEEDER_OSPEED10_Msk (0x3UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00300000 */ -#define GPIO_OSPEEDER_OSPEED10 GPIO_OSPEEDER_OSPEED10_Msk -#define GPIO_OSPEEDER_OSPEED10_0 (0x1UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00100000 */ -#define GPIO_OSPEEDER_OSPEED10_1 (0x2UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00200000 */ -#define GPIO_OSPEEDER_OSPEED11_Pos (22U) -#define GPIO_OSPEEDER_OSPEED11_Msk (0x3UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00C00000 */ -#define GPIO_OSPEEDER_OSPEED11 GPIO_OSPEEDER_OSPEED11_Msk -#define GPIO_OSPEEDER_OSPEED11_0 (0x1UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00400000 */ -#define GPIO_OSPEEDER_OSPEED11_1 (0x2UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00800000 */ -#define GPIO_OSPEEDER_OSPEED12_Pos (24U) -#define GPIO_OSPEEDER_OSPEED12_Msk (0x3UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x03000000 */ -#define GPIO_OSPEEDER_OSPEED12 GPIO_OSPEEDER_OSPEED12_Msk -#define GPIO_OSPEEDER_OSPEED12_0 (0x1UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x01000000 */ -#define GPIO_OSPEEDER_OSPEED12_1 (0x2UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x02000000 */ -#define GPIO_OSPEEDER_OSPEED13_Pos (26U) -#define GPIO_OSPEEDER_OSPEED13_Msk (0x3UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x0C000000 */ -#define GPIO_OSPEEDER_OSPEED13 GPIO_OSPEEDER_OSPEED13_Msk -#define GPIO_OSPEEDER_OSPEED13_0 (0x1UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x04000000 */ -#define GPIO_OSPEEDER_OSPEED13_1 (0x2UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x08000000 */ -#define GPIO_OSPEEDER_OSPEED14_Pos (28U) -#define GPIO_OSPEEDER_OSPEED14_Msk (0x3UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x30000000 */ -#define GPIO_OSPEEDER_OSPEED14 GPIO_OSPEEDER_OSPEED14_Msk -#define GPIO_OSPEEDER_OSPEED14_0 (0x1UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x10000000 */ -#define GPIO_OSPEEDER_OSPEED14_1 (0x2UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x20000000 */ -#define GPIO_OSPEEDER_OSPEED15_Pos (30U) -#define GPIO_OSPEEDER_OSPEED15_Msk (0x3UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0xC0000000 */ -#define GPIO_OSPEEDER_OSPEED15 GPIO_OSPEEDER_OSPEED15_Msk -#define GPIO_OSPEEDER_OSPEED15_0 (0x1UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0x40000000 */ -#define GPIO_OSPEEDER_OSPEED15_1 (0x2UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0x80000000 */ +#define GPIO_OSPEEDR_OSPEED0_Pos (0U) +#define GPIO_OSPEEDR_OSPEED0_Msk (0x3UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000003 */ +#define GPIO_OSPEEDR_OSPEED0 GPIO_OSPEEDR_OSPEED0_Msk +#define GPIO_OSPEEDR_OSPEED0_0 (0x1UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000001 */ +#define GPIO_OSPEEDR_OSPEED0_1 (0x2UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000002 */ +#define GPIO_OSPEEDR_OSPEED1_Pos (2U) +#define GPIO_OSPEEDR_OSPEED1_Msk (0x3UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x0000000C */ +#define GPIO_OSPEEDR_OSPEED1 GPIO_OSPEEDR_OSPEED1_Msk +#define GPIO_OSPEEDR_OSPEED1_0 (0x1UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x00000004 */ +#define GPIO_OSPEEDR_OSPEED1_1 (0x2UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x00000008 */ +#define GPIO_OSPEEDR_OSPEED2_Pos (4U) +#define GPIO_OSPEEDR_OSPEED2_Msk (0x3UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000030 */ +#define GPIO_OSPEEDR_OSPEED2 GPIO_OSPEEDR_OSPEED2_Msk +#define GPIO_OSPEEDR_OSPEED2_0 (0x1UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000010 */ +#define GPIO_OSPEEDR_OSPEED2_1 (0x2UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000020 */ +#define GPIO_OSPEEDR_OSPEED3_Pos (6U) +#define GPIO_OSPEEDR_OSPEED3_Msk (0x3UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x000000C0 */ +#define GPIO_OSPEEDR_OSPEED3 GPIO_OSPEEDR_OSPEED3_Msk +#define GPIO_OSPEEDR_OSPEED3_0 (0x1UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x00000040 */ +#define GPIO_OSPEEDR_OSPEED3_1 (0x2UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x00000080 */ +#define GPIO_OSPEEDR_OSPEED4_Pos (8U) +#define GPIO_OSPEEDR_OSPEED4_Msk (0x3UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000300 */ +#define GPIO_OSPEEDR_OSPEED4 GPIO_OSPEEDR_OSPEED4_Msk +#define GPIO_OSPEEDR_OSPEED4_0 (0x1UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000100 */ +#define GPIO_OSPEEDR_OSPEED4_1 (0x2UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000200 */ +#define GPIO_OSPEEDR_OSPEED5_Pos (10U) +#define GPIO_OSPEEDR_OSPEED5_Msk (0x3UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000C00 */ +#define GPIO_OSPEEDR_OSPEED5 GPIO_OSPEEDR_OSPEED5_Msk +#define GPIO_OSPEEDR_OSPEED5_0 (0x1UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000400 */ +#define GPIO_OSPEEDR_OSPEED5_1 (0x2UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000800 */ +#define GPIO_OSPEEDR_OSPEED6_Pos (12U) +#define GPIO_OSPEEDR_OSPEED6_Msk (0x3UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00003000 */ +#define GPIO_OSPEEDR_OSPEED6 GPIO_OSPEEDR_OSPEED6_Msk +#define GPIO_OSPEEDR_OSPEED6_0 (0x1UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00001000 */ +#define GPIO_OSPEEDR_OSPEED6_1 (0x2UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00002000 */ +#define GPIO_OSPEEDR_OSPEED7_Pos (14U) +#define GPIO_OSPEEDR_OSPEED7_Msk (0x3UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x0000C000 */ +#define GPIO_OSPEEDR_OSPEED7 GPIO_OSPEEDR_OSPEED7_Msk +#define GPIO_OSPEEDR_OSPEED7_0 (0x1UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x00004000 */ +#define GPIO_OSPEEDR_OSPEED7_1 (0x2UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x00008000 */ +#define GPIO_OSPEEDR_OSPEED8_Pos (16U) +#define GPIO_OSPEEDR_OSPEED8_Msk (0x3UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00030000 */ +#define GPIO_OSPEEDR_OSPEED8 GPIO_OSPEEDR_OSPEED8_Msk +#define GPIO_OSPEEDR_OSPEED8_0 (0x1UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00010000 */ +#define GPIO_OSPEEDR_OSPEED8_1 (0x2UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00020000 */ +#define GPIO_OSPEEDR_OSPEED9_Pos (18U) +#define GPIO_OSPEEDR_OSPEED9_Msk (0x3UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x000C0000 */ +#define GPIO_OSPEEDR_OSPEED9 GPIO_OSPEEDR_OSPEED9_Msk +#define GPIO_OSPEEDR_OSPEED9_0 (0x1UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x00040000 */ +#define GPIO_OSPEEDR_OSPEED9_1 (0x2UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x00080000 */ +#define GPIO_OSPEEDR_OSPEED10_Pos (20U) +#define GPIO_OSPEEDR_OSPEED10_Msk (0x3UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00300000 */ +#define GPIO_OSPEEDR_OSPEED10 GPIO_OSPEEDR_OSPEED10_Msk +#define GPIO_OSPEEDR_OSPEED10_0 (0x1UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00100000 */ +#define GPIO_OSPEEDR_OSPEED10_1 (0x2UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00200000 */ +#define GPIO_OSPEEDR_OSPEED11_Pos (22U) +#define GPIO_OSPEEDR_OSPEED11_Msk (0x3UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00C00000 */ +#define GPIO_OSPEEDR_OSPEED11 GPIO_OSPEEDR_OSPEED11_Msk +#define GPIO_OSPEEDR_OSPEED11_0 (0x1UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00400000 */ +#define GPIO_OSPEEDR_OSPEED11_1 (0x2UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00800000 */ +#define GPIO_OSPEEDR_OSPEED12_Pos (24U) +#define GPIO_OSPEEDR_OSPEED12_Msk (0x3UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x03000000 */ +#define GPIO_OSPEEDR_OSPEED12 GPIO_OSPEEDR_OSPEED12_Msk +#define GPIO_OSPEEDR_OSPEED12_0 (0x1UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x01000000 */ +#define GPIO_OSPEEDR_OSPEED12_1 (0x2UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x02000000 */ +#define GPIO_OSPEEDR_OSPEED13_Pos (26U) +#define GPIO_OSPEEDR_OSPEED13_Msk (0x3UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x0C000000 */ +#define GPIO_OSPEEDR_OSPEED13 GPIO_OSPEEDR_OSPEED13_Msk +#define GPIO_OSPEEDR_OSPEED13_0 (0x1UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x04000000 */ +#define GPIO_OSPEEDR_OSPEED13_1 (0x2UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x08000000 */ +#define GPIO_OSPEEDR_OSPEED14_Pos (28U) +#define GPIO_OSPEEDR_OSPEED14_Msk (0x3UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x30000000 */ +#define GPIO_OSPEEDR_OSPEED14 GPIO_OSPEEDR_OSPEED14_Msk +#define GPIO_OSPEEDR_OSPEED14_0 (0x1UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x10000000 */ +#define GPIO_OSPEEDR_OSPEED14_1 (0x2UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x20000000 */ +#define GPIO_OSPEEDR_OSPEED15_Pos (30U) +#define GPIO_OSPEEDR_OSPEED15_Msk (0x3UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0xC0000000 */ +#define GPIO_OSPEEDR_OSPEED15 GPIO_OSPEEDR_OSPEED15_Msk +#define GPIO_OSPEEDR_OSPEED15_0 (0x1UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0x40000000 */ +#define GPIO_OSPEEDR_OSPEED15_1 (0x2UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0x80000000 */ + +/* Legacy defines */ +#define GPIO_OSPEEDER_OSPEED0_Pos GPIO_OSPEEDR_OSPEED0_Pos +#define GPIO_OSPEEDER_OSPEED0_Msk GPIO_OSPEEDR_OSPEED0_Msk +#define GPIO_OSPEEDER_OSPEED0 GPIO_OSPEEDR_OSPEED0 +#define GPIO_OSPEEDER_OSPEED0_0 GPIO_OSPEEDR_OSPEED0_0 +#define GPIO_OSPEEDER_OSPEED0_1 GPIO_OSPEEDR_OSPEED0_1 +#define GPIO_OSPEEDER_OSPEED1_Pos GPIO_OSPEEDR_OSPEED1_Pos +#define GPIO_OSPEEDER_OSPEED1_Msk GPIO_OSPEEDR_OSPEED1_Msk +#define GPIO_OSPEEDER_OSPEED1 GPIO_OSPEEDR_OSPEED1 +#define GPIO_OSPEEDER_OSPEED1_0 GPIO_OSPEEDR_OSPEED1_0 +#define GPIO_OSPEEDER_OSPEED1_1 GPIO_OSPEEDR_OSPEED1_1 +#define GPIO_OSPEEDER_OSPEED2_Pos GPIO_OSPEEDR_OSPEED2_Pos +#define GPIO_OSPEEDER_OSPEED2_Msk GPIO_OSPEEDR_OSPEED2_Msk +#define GPIO_OSPEEDER_OSPEED2 GPIO_OSPEEDR_OSPEED2 +#define GPIO_OSPEEDER_OSPEED2_0 GPIO_OSPEEDR_OSPEED2_0 +#define GPIO_OSPEEDER_OSPEED2_1 GPIO_OSPEEDR_OSPEED2_1 +#define GPIO_OSPEEDER_OSPEED3_Pos GPIO_OSPEEDR_OSPEED3_Pos +#define GPIO_OSPEEDER_OSPEED3_Msk GPIO_OSPEEDR_OSPEED3_Msk +#define GPIO_OSPEEDER_OSPEED3 GPIO_OSPEEDR_OSPEED3 +#define GPIO_OSPEEDER_OSPEED3_0 GPIO_OSPEEDR_OSPEED3_0 +#define GPIO_OSPEEDER_OSPEED3_1 GPIO_OSPEEDR_OSPEED3_1 +#define GPIO_OSPEEDER_OSPEED4_Pos GPIO_OSPEEDR_OSPEED4_Pos +#define GPIO_OSPEEDER_OSPEED4_Msk GPIO_OSPEEDR_OSPEED4_Msk +#define GPIO_OSPEEDER_OSPEED4 GPIO_OSPEEDR_OSPEED4 +#define GPIO_OSPEEDER_OSPEED4_0 GPIO_OSPEEDR_OSPEED4_0 +#define GPIO_OSPEEDER_OSPEED4_1 GPIO_OSPEEDR_OSPEED4_1 +#define GPIO_OSPEEDER_OSPEED5_Pos GPIO_OSPEEDR_OSPEED5_Pos +#define GPIO_OSPEEDER_OSPEED5_Msk GPIO_OSPEEDR_OSPEED5_Msk +#define GPIO_OSPEEDER_OSPEED5 GPIO_OSPEEDR_OSPEED5 +#define GPIO_OSPEEDER_OSPEED5_0 GPIO_OSPEEDR_OSPEED5_0 +#define GPIO_OSPEEDER_OSPEED5_1 GPIO_OSPEEDR_OSPEED5_1 +#define GPIO_OSPEEDER_OSPEED6_Pos GPIO_OSPEEDR_OSPEED6_Pos +#define GPIO_OSPEEDER_OSPEED6_Msk GPIO_OSPEEDR_OSPEED6_Msk +#define GPIO_OSPEEDER_OSPEED6 GPIO_OSPEEDR_OSPEED6 +#define GPIO_OSPEEDER_OSPEED6_0 GPIO_OSPEEDR_OSPEED6_0 +#define GPIO_OSPEEDER_OSPEED6_1 GPIO_OSPEEDR_OSPEED6_1 +#define GPIO_OSPEEDER_OSPEED7_Pos GPIO_OSPEEDR_OSPEED7_Pos +#define GPIO_OSPEEDER_OSPEED7_Msk GPIO_OSPEEDR_OSPEED7_Msk +#define GPIO_OSPEEDER_OSPEED7 GPIO_OSPEEDR_OSPEED7 +#define GPIO_OSPEEDER_OSPEED7_0 GPIO_OSPEEDR_OSPEED7_0 +#define GPIO_OSPEEDER_OSPEED7_1 GPIO_OSPEEDR_OSPEED7_1 +#define GPIO_OSPEEDER_OSPEED8_Pos GPIO_OSPEEDR_OSPEED8_Pos +#define GPIO_OSPEEDER_OSPEED8_Msk GPIO_OSPEEDR_OSPEED8_Msk +#define GPIO_OSPEEDER_OSPEED8 GPIO_OSPEEDR_OSPEED8 +#define GPIO_OSPEEDER_OSPEED8_0 GPIO_OSPEEDR_OSPEED8_0 +#define GPIO_OSPEEDER_OSPEED8_1 GPIO_OSPEEDR_OSPEED8_1 +#define GPIO_OSPEEDER_OSPEED9_Pos GPIO_OSPEEDR_OSPEED9_Pos +#define GPIO_OSPEEDER_OSPEED9_Msk GPIO_OSPEEDR_OSPEED9_Msk +#define GPIO_OSPEEDER_OSPEED9 GPIO_OSPEEDR_OSPEED9 +#define GPIO_OSPEEDER_OSPEED9_0 GPIO_OSPEEDR_OSPEED9_0 +#define GPIO_OSPEEDER_OSPEED9_1 GPIO_OSPEEDR_OSPEED9_1 +#define GPIO_OSPEEDER_OSPEED10_Pos GPIO_OSPEEDR_OSPEED10_Pos +#define GPIO_OSPEEDER_OSPEED10_Msk GPIO_OSPEEDR_OSPEED10_Msk +#define GPIO_OSPEEDER_OSPEED10 GPIO_OSPEEDR_OSPEED10 +#define GPIO_OSPEEDER_OSPEED10_0 GPIO_OSPEEDR_OSPEED10_0 +#define GPIO_OSPEEDER_OSPEED10_1 GPIO_OSPEEDR_OSPEED10_1 +#define GPIO_OSPEEDER_OSPEED11_Pos GPIO_OSPEEDR_OSPEED11_Pos +#define GPIO_OSPEEDER_OSPEED11_Msk GPIO_OSPEEDR_OSPEED11_Msk +#define GPIO_OSPEEDER_OSPEED11 GPIO_OSPEEDR_OSPEED11 +#define GPIO_OSPEEDER_OSPEED11_0 GPIO_OSPEEDR_OSPEED11_0 +#define GPIO_OSPEEDER_OSPEED11_1 GPIO_OSPEEDR_OSPEED11_1 +#define GPIO_OSPEEDER_OSPEED12_Pos GPIO_OSPEEDR_OSPEED12_Pos +#define GPIO_OSPEEDER_OSPEED12_Msk GPIO_OSPEEDR_OSPEED12_Msk +#define GPIO_OSPEEDER_OSPEED12 GPIO_OSPEEDR_OSPEED12 +#define GPIO_OSPEEDER_OSPEED12_0 GPIO_OSPEEDR_OSPEED12_0 +#define GPIO_OSPEEDER_OSPEED12_1 GPIO_OSPEEDR_OSPEED12_1 +#define GPIO_OSPEEDER_OSPEED13_Pos GPIO_OSPEEDR_OSPEED13_Pos +#define GPIO_OSPEEDER_OSPEED13_Msk GPIO_OSPEEDR_OSPEED13_Msk +#define GPIO_OSPEEDER_OSPEED13 GPIO_OSPEEDR_OSPEED13 +#define GPIO_OSPEEDER_OSPEED13_0 GPIO_OSPEEDR_OSPEED13_0 +#define GPIO_OSPEEDER_OSPEED13_1 GPIO_OSPEEDR_OSPEED13_1 +#define GPIO_OSPEEDER_OSPEED14_Pos GPIO_OSPEEDR_OSPEED14_Pos +#define GPIO_OSPEEDER_OSPEED14_Msk GPIO_OSPEEDR_OSPEED14_Msk +#define GPIO_OSPEEDER_OSPEED14 GPIO_OSPEEDR_OSPEED14 +#define GPIO_OSPEEDER_OSPEED14_0 GPIO_OSPEEDR_OSPEED14_0 +#define GPIO_OSPEEDER_OSPEED14_1 GPIO_OSPEEDR_OSPEED14_1 +#define GPIO_OSPEEDER_OSPEED15_Pos GPIO_OSPEEDR_OSPEED15_Pos +#define GPIO_OSPEEDER_OSPEED15_Msk GPIO_OSPEEDR_OSPEED15_Msk +#define GPIO_OSPEEDER_OSPEED15 GPIO_OSPEEDR_OSPEED15 +#define GPIO_OSPEEDER_OSPEED15_0 GPIO_OSPEEDR_OSPEED15_0 +#define GPIO_OSPEEDER_OSPEED15_1 GPIO_OSPEEDR_OSPEED15_1 /******************* Bit definition for GPIO_PUPDR register ******************/ #define GPIO_PUPDR_PUPD0_Pos (0U) diff --git a/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l063xx.h b/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l063xx.h index da17873f12..a7cf903a24 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l063xx.h +++ b/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l063xx.h @@ -2637,86 +2637,168 @@ typedef struct #define GPIO_OTYPER_OT_15 (0x00008000U) /**************** Bit definition for GPIO_OSPEEDR register ******************/ -#define GPIO_OSPEEDER_OSPEED0_Pos (0U) -#define GPIO_OSPEEDER_OSPEED0_Msk (0x3UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000003 */ -#define GPIO_OSPEEDER_OSPEED0 GPIO_OSPEEDER_OSPEED0_Msk -#define GPIO_OSPEEDER_OSPEED0_0 (0x1UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000001 */ -#define GPIO_OSPEEDER_OSPEED0_1 (0x2UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000002 */ -#define GPIO_OSPEEDER_OSPEED1_Pos (2U) -#define GPIO_OSPEEDER_OSPEED1_Msk (0x3UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x0000000C */ -#define GPIO_OSPEEDER_OSPEED1 GPIO_OSPEEDER_OSPEED1_Msk -#define GPIO_OSPEEDER_OSPEED1_0 (0x1UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x00000004 */ -#define GPIO_OSPEEDER_OSPEED1_1 (0x2UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x00000008 */ -#define GPIO_OSPEEDER_OSPEED2_Pos (4U) -#define GPIO_OSPEEDER_OSPEED2_Msk (0x3UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000030 */ -#define GPIO_OSPEEDER_OSPEED2 GPIO_OSPEEDER_OSPEED2_Msk -#define GPIO_OSPEEDER_OSPEED2_0 (0x1UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000010 */ -#define GPIO_OSPEEDER_OSPEED2_1 (0x2UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000020 */ -#define GPIO_OSPEEDER_OSPEED3_Pos (6U) -#define GPIO_OSPEEDER_OSPEED3_Msk (0x3UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x000000C0 */ -#define GPIO_OSPEEDER_OSPEED3 GPIO_OSPEEDER_OSPEED3_Msk -#define GPIO_OSPEEDER_OSPEED3_0 (0x1UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x00000040 */ -#define GPIO_OSPEEDER_OSPEED3_1 (0x2UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x00000080 */ -#define GPIO_OSPEEDER_OSPEED4_Pos (8U) -#define GPIO_OSPEEDER_OSPEED4_Msk (0x3UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000300 */ -#define GPIO_OSPEEDER_OSPEED4 GPIO_OSPEEDER_OSPEED4_Msk -#define GPIO_OSPEEDER_OSPEED4_0 (0x1UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000100 */ -#define GPIO_OSPEEDER_OSPEED4_1 (0x2UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000200 */ -#define GPIO_OSPEEDER_OSPEED5_Pos (10U) -#define GPIO_OSPEEDER_OSPEED5_Msk (0x3UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000C00 */ -#define GPIO_OSPEEDER_OSPEED5 GPIO_OSPEEDER_OSPEED5_Msk -#define GPIO_OSPEEDER_OSPEED5_0 (0x1UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000400 */ -#define GPIO_OSPEEDER_OSPEED5_1 (0x2UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000800 */ -#define GPIO_OSPEEDER_OSPEED6_Pos (12U) -#define GPIO_OSPEEDER_OSPEED6_Msk (0x3UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00003000 */ -#define GPIO_OSPEEDER_OSPEED6 GPIO_OSPEEDER_OSPEED6_Msk -#define GPIO_OSPEEDER_OSPEED6_0 (0x1UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00001000 */ -#define GPIO_OSPEEDER_OSPEED6_1 (0x2UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00002000 */ -#define GPIO_OSPEEDER_OSPEED7_Pos (14U) -#define GPIO_OSPEEDER_OSPEED7_Msk (0x3UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x0000C000 */ -#define GPIO_OSPEEDER_OSPEED7 GPIO_OSPEEDER_OSPEED7_Msk -#define GPIO_OSPEEDER_OSPEED7_0 (0x1UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x00004000 */ -#define GPIO_OSPEEDER_OSPEED7_1 (0x2UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x00008000 */ -#define GPIO_OSPEEDER_OSPEED8_Pos (16U) -#define GPIO_OSPEEDER_OSPEED8_Msk (0x3UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00030000 */ -#define GPIO_OSPEEDER_OSPEED8 GPIO_OSPEEDER_OSPEED8_Msk -#define GPIO_OSPEEDER_OSPEED8_0 (0x1UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00010000 */ -#define GPIO_OSPEEDER_OSPEED8_1 (0x2UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00020000 */ -#define GPIO_OSPEEDER_OSPEED9_Pos (18U) -#define GPIO_OSPEEDER_OSPEED9_Msk (0x3UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x000C0000 */ -#define GPIO_OSPEEDER_OSPEED9 GPIO_OSPEEDER_OSPEED9_Msk -#define GPIO_OSPEEDER_OSPEED9_0 (0x1UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x00040000 */ -#define GPIO_OSPEEDER_OSPEED9_1 (0x2UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x00080000 */ -#define GPIO_OSPEEDER_OSPEED10_Pos (20U) -#define GPIO_OSPEEDER_OSPEED10_Msk (0x3UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00300000 */ -#define GPIO_OSPEEDER_OSPEED10 GPIO_OSPEEDER_OSPEED10_Msk -#define GPIO_OSPEEDER_OSPEED10_0 (0x1UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00100000 */ -#define GPIO_OSPEEDER_OSPEED10_1 (0x2UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00200000 */ -#define GPIO_OSPEEDER_OSPEED11_Pos (22U) -#define GPIO_OSPEEDER_OSPEED11_Msk (0x3UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00C00000 */ -#define GPIO_OSPEEDER_OSPEED11 GPIO_OSPEEDER_OSPEED11_Msk -#define GPIO_OSPEEDER_OSPEED11_0 (0x1UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00400000 */ -#define GPIO_OSPEEDER_OSPEED11_1 (0x2UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00800000 */ -#define GPIO_OSPEEDER_OSPEED12_Pos (24U) -#define GPIO_OSPEEDER_OSPEED12_Msk (0x3UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x03000000 */ -#define GPIO_OSPEEDER_OSPEED12 GPIO_OSPEEDER_OSPEED12_Msk -#define GPIO_OSPEEDER_OSPEED12_0 (0x1UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x01000000 */ -#define GPIO_OSPEEDER_OSPEED12_1 (0x2UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x02000000 */ -#define GPIO_OSPEEDER_OSPEED13_Pos (26U) -#define GPIO_OSPEEDER_OSPEED13_Msk (0x3UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x0C000000 */ -#define GPIO_OSPEEDER_OSPEED13 GPIO_OSPEEDER_OSPEED13_Msk -#define GPIO_OSPEEDER_OSPEED13_0 (0x1UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x04000000 */ -#define GPIO_OSPEEDER_OSPEED13_1 (0x2UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x08000000 */ -#define GPIO_OSPEEDER_OSPEED14_Pos (28U) -#define GPIO_OSPEEDER_OSPEED14_Msk (0x3UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x30000000 */ -#define GPIO_OSPEEDER_OSPEED14 GPIO_OSPEEDER_OSPEED14_Msk -#define GPIO_OSPEEDER_OSPEED14_0 (0x1UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x10000000 */ -#define GPIO_OSPEEDER_OSPEED14_1 (0x2UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x20000000 */ -#define GPIO_OSPEEDER_OSPEED15_Pos (30U) -#define GPIO_OSPEEDER_OSPEED15_Msk (0x3UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0xC0000000 */ -#define GPIO_OSPEEDER_OSPEED15 GPIO_OSPEEDER_OSPEED15_Msk -#define GPIO_OSPEEDER_OSPEED15_0 (0x1UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0x40000000 */ -#define GPIO_OSPEEDER_OSPEED15_1 (0x2UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0x80000000 */ +#define GPIO_OSPEEDR_OSPEED0_Pos (0U) +#define GPIO_OSPEEDR_OSPEED0_Msk (0x3UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000003 */ +#define GPIO_OSPEEDR_OSPEED0 GPIO_OSPEEDR_OSPEED0_Msk +#define GPIO_OSPEEDR_OSPEED0_0 (0x1UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000001 */ +#define GPIO_OSPEEDR_OSPEED0_1 (0x2UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000002 */ +#define GPIO_OSPEEDR_OSPEED1_Pos (2U) +#define GPIO_OSPEEDR_OSPEED1_Msk (0x3UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x0000000C */ +#define GPIO_OSPEEDR_OSPEED1 GPIO_OSPEEDR_OSPEED1_Msk +#define GPIO_OSPEEDR_OSPEED1_0 (0x1UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x00000004 */ +#define GPIO_OSPEEDR_OSPEED1_1 (0x2UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x00000008 */ +#define GPIO_OSPEEDR_OSPEED2_Pos (4U) +#define GPIO_OSPEEDR_OSPEED2_Msk (0x3UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000030 */ +#define GPIO_OSPEEDR_OSPEED2 GPIO_OSPEEDR_OSPEED2_Msk +#define GPIO_OSPEEDR_OSPEED2_0 (0x1UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000010 */ +#define GPIO_OSPEEDR_OSPEED2_1 (0x2UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000020 */ +#define GPIO_OSPEEDR_OSPEED3_Pos (6U) +#define GPIO_OSPEEDR_OSPEED3_Msk (0x3UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x000000C0 */ +#define GPIO_OSPEEDR_OSPEED3 GPIO_OSPEEDR_OSPEED3_Msk +#define GPIO_OSPEEDR_OSPEED3_0 (0x1UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x00000040 */ +#define GPIO_OSPEEDR_OSPEED3_1 (0x2UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x00000080 */ +#define GPIO_OSPEEDR_OSPEED4_Pos (8U) +#define GPIO_OSPEEDR_OSPEED4_Msk (0x3UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000300 */ +#define GPIO_OSPEEDR_OSPEED4 GPIO_OSPEEDR_OSPEED4_Msk +#define GPIO_OSPEEDR_OSPEED4_0 (0x1UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000100 */ +#define GPIO_OSPEEDR_OSPEED4_1 (0x2UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000200 */ +#define GPIO_OSPEEDR_OSPEED5_Pos (10U) +#define GPIO_OSPEEDR_OSPEED5_Msk (0x3UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000C00 */ +#define GPIO_OSPEEDR_OSPEED5 GPIO_OSPEEDR_OSPEED5_Msk +#define GPIO_OSPEEDR_OSPEED5_0 (0x1UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000400 */ +#define GPIO_OSPEEDR_OSPEED5_1 (0x2UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000800 */ +#define GPIO_OSPEEDR_OSPEED6_Pos (12U) +#define GPIO_OSPEEDR_OSPEED6_Msk (0x3UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00003000 */ +#define GPIO_OSPEEDR_OSPEED6 GPIO_OSPEEDR_OSPEED6_Msk +#define GPIO_OSPEEDR_OSPEED6_0 (0x1UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00001000 */ +#define GPIO_OSPEEDR_OSPEED6_1 (0x2UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00002000 */ +#define GPIO_OSPEEDR_OSPEED7_Pos (14U) +#define GPIO_OSPEEDR_OSPEED7_Msk (0x3UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x0000C000 */ +#define GPIO_OSPEEDR_OSPEED7 GPIO_OSPEEDR_OSPEED7_Msk +#define GPIO_OSPEEDR_OSPEED7_0 (0x1UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x00004000 */ +#define GPIO_OSPEEDR_OSPEED7_1 (0x2UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x00008000 */ +#define GPIO_OSPEEDR_OSPEED8_Pos (16U) +#define GPIO_OSPEEDR_OSPEED8_Msk (0x3UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00030000 */ +#define GPIO_OSPEEDR_OSPEED8 GPIO_OSPEEDR_OSPEED8_Msk +#define GPIO_OSPEEDR_OSPEED8_0 (0x1UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00010000 */ +#define GPIO_OSPEEDR_OSPEED8_1 (0x2UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00020000 */ +#define GPIO_OSPEEDR_OSPEED9_Pos (18U) +#define GPIO_OSPEEDR_OSPEED9_Msk (0x3UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x000C0000 */ +#define GPIO_OSPEEDR_OSPEED9 GPIO_OSPEEDR_OSPEED9_Msk +#define GPIO_OSPEEDR_OSPEED9_0 (0x1UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x00040000 */ +#define GPIO_OSPEEDR_OSPEED9_1 (0x2UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x00080000 */ +#define GPIO_OSPEEDR_OSPEED10_Pos (20U) +#define GPIO_OSPEEDR_OSPEED10_Msk (0x3UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00300000 */ +#define GPIO_OSPEEDR_OSPEED10 GPIO_OSPEEDR_OSPEED10_Msk +#define GPIO_OSPEEDR_OSPEED10_0 (0x1UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00100000 */ +#define GPIO_OSPEEDR_OSPEED10_1 (0x2UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00200000 */ +#define GPIO_OSPEEDR_OSPEED11_Pos (22U) +#define GPIO_OSPEEDR_OSPEED11_Msk (0x3UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00C00000 */ +#define GPIO_OSPEEDR_OSPEED11 GPIO_OSPEEDR_OSPEED11_Msk +#define GPIO_OSPEEDR_OSPEED11_0 (0x1UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00400000 */ +#define GPIO_OSPEEDR_OSPEED11_1 (0x2UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00800000 */ +#define GPIO_OSPEEDR_OSPEED12_Pos (24U) +#define GPIO_OSPEEDR_OSPEED12_Msk (0x3UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x03000000 */ +#define GPIO_OSPEEDR_OSPEED12 GPIO_OSPEEDR_OSPEED12_Msk +#define GPIO_OSPEEDR_OSPEED12_0 (0x1UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x01000000 */ +#define GPIO_OSPEEDR_OSPEED12_1 (0x2UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x02000000 */ +#define GPIO_OSPEEDR_OSPEED13_Pos (26U) +#define GPIO_OSPEEDR_OSPEED13_Msk (0x3UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x0C000000 */ +#define GPIO_OSPEEDR_OSPEED13 GPIO_OSPEEDR_OSPEED13_Msk +#define GPIO_OSPEEDR_OSPEED13_0 (0x1UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x04000000 */ +#define GPIO_OSPEEDR_OSPEED13_1 (0x2UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x08000000 */ +#define GPIO_OSPEEDR_OSPEED14_Pos (28U) +#define GPIO_OSPEEDR_OSPEED14_Msk (0x3UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x30000000 */ +#define GPIO_OSPEEDR_OSPEED14 GPIO_OSPEEDR_OSPEED14_Msk +#define GPIO_OSPEEDR_OSPEED14_0 (0x1UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x10000000 */ +#define GPIO_OSPEEDR_OSPEED14_1 (0x2UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x20000000 */ +#define GPIO_OSPEEDR_OSPEED15_Pos (30U) +#define GPIO_OSPEEDR_OSPEED15_Msk (0x3UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0xC0000000 */ +#define GPIO_OSPEEDR_OSPEED15 GPIO_OSPEEDR_OSPEED15_Msk +#define GPIO_OSPEEDR_OSPEED15_0 (0x1UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0x40000000 */ +#define GPIO_OSPEEDR_OSPEED15_1 (0x2UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0x80000000 */ + +/* Legacy defines */ +#define GPIO_OSPEEDER_OSPEED0_Pos GPIO_OSPEEDR_OSPEED0_Pos +#define GPIO_OSPEEDER_OSPEED0_Msk GPIO_OSPEEDR_OSPEED0_Msk +#define GPIO_OSPEEDER_OSPEED0 GPIO_OSPEEDR_OSPEED0 +#define GPIO_OSPEEDER_OSPEED0_0 GPIO_OSPEEDR_OSPEED0_0 +#define GPIO_OSPEEDER_OSPEED0_1 GPIO_OSPEEDR_OSPEED0_1 +#define GPIO_OSPEEDER_OSPEED1_Pos GPIO_OSPEEDR_OSPEED1_Pos +#define GPIO_OSPEEDER_OSPEED1_Msk GPIO_OSPEEDR_OSPEED1_Msk +#define GPIO_OSPEEDER_OSPEED1 GPIO_OSPEEDR_OSPEED1 +#define GPIO_OSPEEDER_OSPEED1_0 GPIO_OSPEEDR_OSPEED1_0 +#define GPIO_OSPEEDER_OSPEED1_1 GPIO_OSPEEDR_OSPEED1_1 +#define GPIO_OSPEEDER_OSPEED2_Pos GPIO_OSPEEDR_OSPEED2_Pos +#define GPIO_OSPEEDER_OSPEED2_Msk GPIO_OSPEEDR_OSPEED2_Msk +#define GPIO_OSPEEDER_OSPEED2 GPIO_OSPEEDR_OSPEED2 +#define GPIO_OSPEEDER_OSPEED2_0 GPIO_OSPEEDR_OSPEED2_0 +#define GPIO_OSPEEDER_OSPEED2_1 GPIO_OSPEEDR_OSPEED2_1 +#define GPIO_OSPEEDER_OSPEED3_Pos GPIO_OSPEEDR_OSPEED3_Pos +#define GPIO_OSPEEDER_OSPEED3_Msk GPIO_OSPEEDR_OSPEED3_Msk +#define GPIO_OSPEEDER_OSPEED3 GPIO_OSPEEDR_OSPEED3 +#define GPIO_OSPEEDER_OSPEED3_0 GPIO_OSPEEDR_OSPEED3_0 +#define GPIO_OSPEEDER_OSPEED3_1 GPIO_OSPEEDR_OSPEED3_1 +#define GPIO_OSPEEDER_OSPEED4_Pos GPIO_OSPEEDR_OSPEED4_Pos +#define GPIO_OSPEEDER_OSPEED4_Msk GPIO_OSPEEDR_OSPEED4_Msk +#define GPIO_OSPEEDER_OSPEED4 GPIO_OSPEEDR_OSPEED4 +#define GPIO_OSPEEDER_OSPEED4_0 GPIO_OSPEEDR_OSPEED4_0 +#define GPIO_OSPEEDER_OSPEED4_1 GPIO_OSPEEDR_OSPEED4_1 +#define GPIO_OSPEEDER_OSPEED5_Pos GPIO_OSPEEDR_OSPEED5_Pos +#define GPIO_OSPEEDER_OSPEED5_Msk GPIO_OSPEEDR_OSPEED5_Msk +#define GPIO_OSPEEDER_OSPEED5 GPIO_OSPEEDR_OSPEED5 +#define GPIO_OSPEEDER_OSPEED5_0 GPIO_OSPEEDR_OSPEED5_0 +#define GPIO_OSPEEDER_OSPEED5_1 GPIO_OSPEEDR_OSPEED5_1 +#define GPIO_OSPEEDER_OSPEED6_Pos GPIO_OSPEEDR_OSPEED6_Pos +#define GPIO_OSPEEDER_OSPEED6_Msk GPIO_OSPEEDR_OSPEED6_Msk +#define GPIO_OSPEEDER_OSPEED6 GPIO_OSPEEDR_OSPEED6 +#define GPIO_OSPEEDER_OSPEED6_0 GPIO_OSPEEDR_OSPEED6_0 +#define GPIO_OSPEEDER_OSPEED6_1 GPIO_OSPEEDR_OSPEED6_1 +#define GPIO_OSPEEDER_OSPEED7_Pos GPIO_OSPEEDR_OSPEED7_Pos +#define GPIO_OSPEEDER_OSPEED7_Msk GPIO_OSPEEDR_OSPEED7_Msk +#define GPIO_OSPEEDER_OSPEED7 GPIO_OSPEEDR_OSPEED7 +#define GPIO_OSPEEDER_OSPEED7_0 GPIO_OSPEEDR_OSPEED7_0 +#define GPIO_OSPEEDER_OSPEED7_1 GPIO_OSPEEDR_OSPEED7_1 +#define GPIO_OSPEEDER_OSPEED8_Pos GPIO_OSPEEDR_OSPEED8_Pos +#define GPIO_OSPEEDER_OSPEED8_Msk GPIO_OSPEEDR_OSPEED8_Msk +#define GPIO_OSPEEDER_OSPEED8 GPIO_OSPEEDR_OSPEED8 +#define GPIO_OSPEEDER_OSPEED8_0 GPIO_OSPEEDR_OSPEED8_0 +#define GPIO_OSPEEDER_OSPEED8_1 GPIO_OSPEEDR_OSPEED8_1 +#define GPIO_OSPEEDER_OSPEED9_Pos GPIO_OSPEEDR_OSPEED9_Pos +#define GPIO_OSPEEDER_OSPEED9_Msk GPIO_OSPEEDR_OSPEED9_Msk +#define GPIO_OSPEEDER_OSPEED9 GPIO_OSPEEDR_OSPEED9 +#define GPIO_OSPEEDER_OSPEED9_0 GPIO_OSPEEDR_OSPEED9_0 +#define GPIO_OSPEEDER_OSPEED9_1 GPIO_OSPEEDR_OSPEED9_1 +#define GPIO_OSPEEDER_OSPEED10_Pos GPIO_OSPEEDR_OSPEED10_Pos +#define GPIO_OSPEEDER_OSPEED10_Msk GPIO_OSPEEDR_OSPEED10_Msk +#define GPIO_OSPEEDER_OSPEED10 GPIO_OSPEEDR_OSPEED10 +#define GPIO_OSPEEDER_OSPEED10_0 GPIO_OSPEEDR_OSPEED10_0 +#define GPIO_OSPEEDER_OSPEED10_1 GPIO_OSPEEDR_OSPEED10_1 +#define GPIO_OSPEEDER_OSPEED11_Pos GPIO_OSPEEDR_OSPEED11_Pos +#define GPIO_OSPEEDER_OSPEED11_Msk GPIO_OSPEEDR_OSPEED11_Msk +#define GPIO_OSPEEDER_OSPEED11 GPIO_OSPEEDR_OSPEED11 +#define GPIO_OSPEEDER_OSPEED11_0 GPIO_OSPEEDR_OSPEED11_0 +#define GPIO_OSPEEDER_OSPEED11_1 GPIO_OSPEEDR_OSPEED11_1 +#define GPIO_OSPEEDER_OSPEED12_Pos GPIO_OSPEEDR_OSPEED12_Pos +#define GPIO_OSPEEDER_OSPEED12_Msk GPIO_OSPEEDR_OSPEED12_Msk +#define GPIO_OSPEEDER_OSPEED12 GPIO_OSPEEDR_OSPEED12 +#define GPIO_OSPEEDER_OSPEED12_0 GPIO_OSPEEDR_OSPEED12_0 +#define GPIO_OSPEEDER_OSPEED12_1 GPIO_OSPEEDR_OSPEED12_1 +#define GPIO_OSPEEDER_OSPEED13_Pos GPIO_OSPEEDR_OSPEED13_Pos +#define GPIO_OSPEEDER_OSPEED13_Msk GPIO_OSPEEDR_OSPEED13_Msk +#define GPIO_OSPEEDER_OSPEED13 GPIO_OSPEEDR_OSPEED13 +#define GPIO_OSPEEDER_OSPEED13_0 GPIO_OSPEEDR_OSPEED13_0 +#define GPIO_OSPEEDER_OSPEED13_1 GPIO_OSPEEDR_OSPEED13_1 +#define GPIO_OSPEEDER_OSPEED14_Pos GPIO_OSPEEDR_OSPEED14_Pos +#define GPIO_OSPEEDER_OSPEED14_Msk GPIO_OSPEEDR_OSPEED14_Msk +#define GPIO_OSPEEDER_OSPEED14 GPIO_OSPEEDR_OSPEED14 +#define GPIO_OSPEEDER_OSPEED14_0 GPIO_OSPEEDR_OSPEED14_0 +#define GPIO_OSPEEDER_OSPEED14_1 GPIO_OSPEEDR_OSPEED14_1 +#define GPIO_OSPEEDER_OSPEED15_Pos GPIO_OSPEEDR_OSPEED15_Pos +#define GPIO_OSPEEDER_OSPEED15_Msk GPIO_OSPEEDR_OSPEED15_Msk +#define GPIO_OSPEEDER_OSPEED15 GPIO_OSPEEDR_OSPEED15 +#define GPIO_OSPEEDER_OSPEED15_0 GPIO_OSPEEDR_OSPEED15_0 +#define GPIO_OSPEEDER_OSPEED15_1 GPIO_OSPEEDR_OSPEED15_1 /******************* Bit definition for GPIO_PUPDR register ******************/ #define GPIO_PUPDR_PUPD0_Pos (0U) diff --git a/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l071xx.h b/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l071xx.h index d0df9aea06..13bf84ae45 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l071xx.h +++ b/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l071xx.h @@ -2244,86 +2244,168 @@ typedef struct #define GPIO_OTYPER_OT_15 (0x00008000U) /**************** Bit definition for GPIO_OSPEEDR register ******************/ -#define GPIO_OSPEEDER_OSPEED0_Pos (0U) -#define GPIO_OSPEEDER_OSPEED0_Msk (0x3UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000003 */ -#define GPIO_OSPEEDER_OSPEED0 GPIO_OSPEEDER_OSPEED0_Msk -#define GPIO_OSPEEDER_OSPEED0_0 (0x1UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000001 */ -#define GPIO_OSPEEDER_OSPEED0_1 (0x2UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000002 */ -#define GPIO_OSPEEDER_OSPEED1_Pos (2U) -#define GPIO_OSPEEDER_OSPEED1_Msk (0x3UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x0000000C */ -#define GPIO_OSPEEDER_OSPEED1 GPIO_OSPEEDER_OSPEED1_Msk -#define GPIO_OSPEEDER_OSPEED1_0 (0x1UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x00000004 */ -#define GPIO_OSPEEDER_OSPEED1_1 (0x2UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x00000008 */ -#define GPIO_OSPEEDER_OSPEED2_Pos (4U) -#define GPIO_OSPEEDER_OSPEED2_Msk (0x3UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000030 */ -#define GPIO_OSPEEDER_OSPEED2 GPIO_OSPEEDER_OSPEED2_Msk -#define GPIO_OSPEEDER_OSPEED2_0 (0x1UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000010 */ -#define GPIO_OSPEEDER_OSPEED2_1 (0x2UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000020 */ -#define GPIO_OSPEEDER_OSPEED3_Pos (6U) -#define GPIO_OSPEEDER_OSPEED3_Msk (0x3UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x000000C0 */ -#define GPIO_OSPEEDER_OSPEED3 GPIO_OSPEEDER_OSPEED3_Msk -#define GPIO_OSPEEDER_OSPEED3_0 (0x1UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x00000040 */ -#define GPIO_OSPEEDER_OSPEED3_1 (0x2UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x00000080 */ -#define GPIO_OSPEEDER_OSPEED4_Pos (8U) -#define GPIO_OSPEEDER_OSPEED4_Msk (0x3UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000300 */ -#define GPIO_OSPEEDER_OSPEED4 GPIO_OSPEEDER_OSPEED4_Msk -#define GPIO_OSPEEDER_OSPEED4_0 (0x1UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000100 */ -#define GPIO_OSPEEDER_OSPEED4_1 (0x2UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000200 */ -#define GPIO_OSPEEDER_OSPEED5_Pos (10U) -#define GPIO_OSPEEDER_OSPEED5_Msk (0x3UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000C00 */ -#define GPIO_OSPEEDER_OSPEED5 GPIO_OSPEEDER_OSPEED5_Msk -#define GPIO_OSPEEDER_OSPEED5_0 (0x1UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000400 */ -#define GPIO_OSPEEDER_OSPEED5_1 (0x2UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000800 */ -#define GPIO_OSPEEDER_OSPEED6_Pos (12U) -#define GPIO_OSPEEDER_OSPEED6_Msk (0x3UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00003000 */ -#define GPIO_OSPEEDER_OSPEED6 GPIO_OSPEEDER_OSPEED6_Msk -#define GPIO_OSPEEDER_OSPEED6_0 (0x1UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00001000 */ -#define GPIO_OSPEEDER_OSPEED6_1 (0x2UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00002000 */ -#define GPIO_OSPEEDER_OSPEED7_Pos (14U) -#define GPIO_OSPEEDER_OSPEED7_Msk (0x3UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x0000C000 */ -#define GPIO_OSPEEDER_OSPEED7 GPIO_OSPEEDER_OSPEED7_Msk -#define GPIO_OSPEEDER_OSPEED7_0 (0x1UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x00004000 */ -#define GPIO_OSPEEDER_OSPEED7_1 (0x2UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x00008000 */ -#define GPIO_OSPEEDER_OSPEED8_Pos (16U) -#define GPIO_OSPEEDER_OSPEED8_Msk (0x3UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00030000 */ -#define GPIO_OSPEEDER_OSPEED8 GPIO_OSPEEDER_OSPEED8_Msk -#define GPIO_OSPEEDER_OSPEED8_0 (0x1UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00010000 */ -#define GPIO_OSPEEDER_OSPEED8_1 (0x2UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00020000 */ -#define GPIO_OSPEEDER_OSPEED9_Pos (18U) -#define GPIO_OSPEEDER_OSPEED9_Msk (0x3UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x000C0000 */ -#define GPIO_OSPEEDER_OSPEED9 GPIO_OSPEEDER_OSPEED9_Msk -#define GPIO_OSPEEDER_OSPEED9_0 (0x1UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x00040000 */ -#define GPIO_OSPEEDER_OSPEED9_1 (0x2UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x00080000 */ -#define GPIO_OSPEEDER_OSPEED10_Pos (20U) -#define GPIO_OSPEEDER_OSPEED10_Msk (0x3UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00300000 */ -#define GPIO_OSPEEDER_OSPEED10 GPIO_OSPEEDER_OSPEED10_Msk -#define GPIO_OSPEEDER_OSPEED10_0 (0x1UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00100000 */ -#define GPIO_OSPEEDER_OSPEED10_1 (0x2UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00200000 */ -#define GPIO_OSPEEDER_OSPEED11_Pos (22U) -#define GPIO_OSPEEDER_OSPEED11_Msk (0x3UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00C00000 */ -#define GPIO_OSPEEDER_OSPEED11 GPIO_OSPEEDER_OSPEED11_Msk -#define GPIO_OSPEEDER_OSPEED11_0 (0x1UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00400000 */ -#define GPIO_OSPEEDER_OSPEED11_1 (0x2UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00800000 */ -#define GPIO_OSPEEDER_OSPEED12_Pos (24U) -#define GPIO_OSPEEDER_OSPEED12_Msk (0x3UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x03000000 */ -#define GPIO_OSPEEDER_OSPEED12 GPIO_OSPEEDER_OSPEED12_Msk -#define GPIO_OSPEEDER_OSPEED12_0 (0x1UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x01000000 */ -#define GPIO_OSPEEDER_OSPEED12_1 (0x2UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x02000000 */ -#define GPIO_OSPEEDER_OSPEED13_Pos (26U) -#define GPIO_OSPEEDER_OSPEED13_Msk (0x3UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x0C000000 */ -#define GPIO_OSPEEDER_OSPEED13 GPIO_OSPEEDER_OSPEED13_Msk -#define GPIO_OSPEEDER_OSPEED13_0 (0x1UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x04000000 */ -#define GPIO_OSPEEDER_OSPEED13_1 (0x2UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x08000000 */ -#define GPIO_OSPEEDER_OSPEED14_Pos (28U) -#define GPIO_OSPEEDER_OSPEED14_Msk (0x3UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x30000000 */ -#define GPIO_OSPEEDER_OSPEED14 GPIO_OSPEEDER_OSPEED14_Msk -#define GPIO_OSPEEDER_OSPEED14_0 (0x1UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x10000000 */ -#define GPIO_OSPEEDER_OSPEED14_1 (0x2UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x20000000 */ -#define GPIO_OSPEEDER_OSPEED15_Pos (30U) -#define GPIO_OSPEEDER_OSPEED15_Msk (0x3UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0xC0000000 */ -#define GPIO_OSPEEDER_OSPEED15 GPIO_OSPEEDER_OSPEED15_Msk -#define GPIO_OSPEEDER_OSPEED15_0 (0x1UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0x40000000 */ -#define GPIO_OSPEEDER_OSPEED15_1 (0x2UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0x80000000 */ +#define GPIO_OSPEEDR_OSPEED0_Pos (0U) +#define GPIO_OSPEEDR_OSPEED0_Msk (0x3UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000003 */ +#define GPIO_OSPEEDR_OSPEED0 GPIO_OSPEEDR_OSPEED0_Msk +#define GPIO_OSPEEDR_OSPEED0_0 (0x1UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000001 */ +#define GPIO_OSPEEDR_OSPEED0_1 (0x2UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000002 */ +#define GPIO_OSPEEDR_OSPEED1_Pos (2U) +#define GPIO_OSPEEDR_OSPEED1_Msk (0x3UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x0000000C */ +#define GPIO_OSPEEDR_OSPEED1 GPIO_OSPEEDR_OSPEED1_Msk +#define GPIO_OSPEEDR_OSPEED1_0 (0x1UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x00000004 */ +#define GPIO_OSPEEDR_OSPEED1_1 (0x2UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x00000008 */ +#define GPIO_OSPEEDR_OSPEED2_Pos (4U) +#define GPIO_OSPEEDR_OSPEED2_Msk (0x3UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000030 */ +#define GPIO_OSPEEDR_OSPEED2 GPIO_OSPEEDR_OSPEED2_Msk +#define GPIO_OSPEEDR_OSPEED2_0 (0x1UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000010 */ +#define GPIO_OSPEEDR_OSPEED2_1 (0x2UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000020 */ +#define GPIO_OSPEEDR_OSPEED3_Pos (6U) +#define GPIO_OSPEEDR_OSPEED3_Msk (0x3UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x000000C0 */ +#define GPIO_OSPEEDR_OSPEED3 GPIO_OSPEEDR_OSPEED3_Msk +#define GPIO_OSPEEDR_OSPEED3_0 (0x1UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x00000040 */ +#define GPIO_OSPEEDR_OSPEED3_1 (0x2UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x00000080 */ +#define GPIO_OSPEEDR_OSPEED4_Pos (8U) +#define GPIO_OSPEEDR_OSPEED4_Msk (0x3UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000300 */ +#define GPIO_OSPEEDR_OSPEED4 GPIO_OSPEEDR_OSPEED4_Msk +#define GPIO_OSPEEDR_OSPEED4_0 (0x1UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000100 */ +#define GPIO_OSPEEDR_OSPEED4_1 (0x2UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000200 */ +#define GPIO_OSPEEDR_OSPEED5_Pos (10U) +#define GPIO_OSPEEDR_OSPEED5_Msk (0x3UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000C00 */ +#define GPIO_OSPEEDR_OSPEED5 GPIO_OSPEEDR_OSPEED5_Msk +#define GPIO_OSPEEDR_OSPEED5_0 (0x1UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000400 */ +#define GPIO_OSPEEDR_OSPEED5_1 (0x2UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000800 */ +#define GPIO_OSPEEDR_OSPEED6_Pos (12U) +#define GPIO_OSPEEDR_OSPEED6_Msk (0x3UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00003000 */ +#define GPIO_OSPEEDR_OSPEED6 GPIO_OSPEEDR_OSPEED6_Msk +#define GPIO_OSPEEDR_OSPEED6_0 (0x1UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00001000 */ +#define GPIO_OSPEEDR_OSPEED6_1 (0x2UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00002000 */ +#define GPIO_OSPEEDR_OSPEED7_Pos (14U) +#define GPIO_OSPEEDR_OSPEED7_Msk (0x3UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x0000C000 */ +#define GPIO_OSPEEDR_OSPEED7 GPIO_OSPEEDR_OSPEED7_Msk +#define GPIO_OSPEEDR_OSPEED7_0 (0x1UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x00004000 */ +#define GPIO_OSPEEDR_OSPEED7_1 (0x2UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x00008000 */ +#define GPIO_OSPEEDR_OSPEED8_Pos (16U) +#define GPIO_OSPEEDR_OSPEED8_Msk (0x3UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00030000 */ +#define GPIO_OSPEEDR_OSPEED8 GPIO_OSPEEDR_OSPEED8_Msk +#define GPIO_OSPEEDR_OSPEED8_0 (0x1UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00010000 */ +#define GPIO_OSPEEDR_OSPEED8_1 (0x2UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00020000 */ +#define GPIO_OSPEEDR_OSPEED9_Pos (18U) +#define GPIO_OSPEEDR_OSPEED9_Msk (0x3UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x000C0000 */ +#define GPIO_OSPEEDR_OSPEED9 GPIO_OSPEEDR_OSPEED9_Msk +#define GPIO_OSPEEDR_OSPEED9_0 (0x1UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x00040000 */ +#define GPIO_OSPEEDR_OSPEED9_1 (0x2UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x00080000 */ +#define GPIO_OSPEEDR_OSPEED10_Pos (20U) +#define GPIO_OSPEEDR_OSPEED10_Msk (0x3UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00300000 */ +#define GPIO_OSPEEDR_OSPEED10 GPIO_OSPEEDR_OSPEED10_Msk +#define GPIO_OSPEEDR_OSPEED10_0 (0x1UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00100000 */ +#define GPIO_OSPEEDR_OSPEED10_1 (0x2UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00200000 */ +#define GPIO_OSPEEDR_OSPEED11_Pos (22U) +#define GPIO_OSPEEDR_OSPEED11_Msk (0x3UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00C00000 */ +#define GPIO_OSPEEDR_OSPEED11 GPIO_OSPEEDR_OSPEED11_Msk +#define GPIO_OSPEEDR_OSPEED11_0 (0x1UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00400000 */ +#define GPIO_OSPEEDR_OSPEED11_1 (0x2UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00800000 */ +#define GPIO_OSPEEDR_OSPEED12_Pos (24U) +#define GPIO_OSPEEDR_OSPEED12_Msk (0x3UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x03000000 */ +#define GPIO_OSPEEDR_OSPEED12 GPIO_OSPEEDR_OSPEED12_Msk +#define GPIO_OSPEEDR_OSPEED12_0 (0x1UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x01000000 */ +#define GPIO_OSPEEDR_OSPEED12_1 (0x2UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x02000000 */ +#define GPIO_OSPEEDR_OSPEED13_Pos (26U) +#define GPIO_OSPEEDR_OSPEED13_Msk (0x3UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x0C000000 */ +#define GPIO_OSPEEDR_OSPEED13 GPIO_OSPEEDR_OSPEED13_Msk +#define GPIO_OSPEEDR_OSPEED13_0 (0x1UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x04000000 */ +#define GPIO_OSPEEDR_OSPEED13_1 (0x2UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x08000000 */ +#define GPIO_OSPEEDR_OSPEED14_Pos (28U) +#define GPIO_OSPEEDR_OSPEED14_Msk (0x3UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x30000000 */ +#define GPIO_OSPEEDR_OSPEED14 GPIO_OSPEEDR_OSPEED14_Msk +#define GPIO_OSPEEDR_OSPEED14_0 (0x1UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x10000000 */ +#define GPIO_OSPEEDR_OSPEED14_1 (0x2UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x20000000 */ +#define GPIO_OSPEEDR_OSPEED15_Pos (30U) +#define GPIO_OSPEEDR_OSPEED15_Msk (0x3UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0xC0000000 */ +#define GPIO_OSPEEDR_OSPEED15 GPIO_OSPEEDR_OSPEED15_Msk +#define GPIO_OSPEEDR_OSPEED15_0 (0x1UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0x40000000 */ +#define GPIO_OSPEEDR_OSPEED15_1 (0x2UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0x80000000 */ + +/* Legacy defines */ +#define GPIO_OSPEEDER_OSPEED0_Pos GPIO_OSPEEDR_OSPEED0_Pos +#define GPIO_OSPEEDER_OSPEED0_Msk GPIO_OSPEEDR_OSPEED0_Msk +#define GPIO_OSPEEDER_OSPEED0 GPIO_OSPEEDR_OSPEED0 +#define GPIO_OSPEEDER_OSPEED0_0 GPIO_OSPEEDR_OSPEED0_0 +#define GPIO_OSPEEDER_OSPEED0_1 GPIO_OSPEEDR_OSPEED0_1 +#define GPIO_OSPEEDER_OSPEED1_Pos GPIO_OSPEEDR_OSPEED1_Pos +#define GPIO_OSPEEDER_OSPEED1_Msk GPIO_OSPEEDR_OSPEED1_Msk +#define GPIO_OSPEEDER_OSPEED1 GPIO_OSPEEDR_OSPEED1 +#define GPIO_OSPEEDER_OSPEED1_0 GPIO_OSPEEDR_OSPEED1_0 +#define GPIO_OSPEEDER_OSPEED1_1 GPIO_OSPEEDR_OSPEED1_1 +#define GPIO_OSPEEDER_OSPEED2_Pos GPIO_OSPEEDR_OSPEED2_Pos +#define GPIO_OSPEEDER_OSPEED2_Msk GPIO_OSPEEDR_OSPEED2_Msk +#define GPIO_OSPEEDER_OSPEED2 GPIO_OSPEEDR_OSPEED2 +#define GPIO_OSPEEDER_OSPEED2_0 GPIO_OSPEEDR_OSPEED2_0 +#define GPIO_OSPEEDER_OSPEED2_1 GPIO_OSPEEDR_OSPEED2_1 +#define GPIO_OSPEEDER_OSPEED3_Pos GPIO_OSPEEDR_OSPEED3_Pos +#define GPIO_OSPEEDER_OSPEED3_Msk GPIO_OSPEEDR_OSPEED3_Msk +#define GPIO_OSPEEDER_OSPEED3 GPIO_OSPEEDR_OSPEED3 +#define GPIO_OSPEEDER_OSPEED3_0 GPIO_OSPEEDR_OSPEED3_0 +#define GPIO_OSPEEDER_OSPEED3_1 GPIO_OSPEEDR_OSPEED3_1 +#define GPIO_OSPEEDER_OSPEED4_Pos GPIO_OSPEEDR_OSPEED4_Pos +#define GPIO_OSPEEDER_OSPEED4_Msk GPIO_OSPEEDR_OSPEED4_Msk +#define GPIO_OSPEEDER_OSPEED4 GPIO_OSPEEDR_OSPEED4 +#define GPIO_OSPEEDER_OSPEED4_0 GPIO_OSPEEDR_OSPEED4_0 +#define GPIO_OSPEEDER_OSPEED4_1 GPIO_OSPEEDR_OSPEED4_1 +#define GPIO_OSPEEDER_OSPEED5_Pos GPIO_OSPEEDR_OSPEED5_Pos +#define GPIO_OSPEEDER_OSPEED5_Msk GPIO_OSPEEDR_OSPEED5_Msk +#define GPIO_OSPEEDER_OSPEED5 GPIO_OSPEEDR_OSPEED5 +#define GPIO_OSPEEDER_OSPEED5_0 GPIO_OSPEEDR_OSPEED5_0 +#define GPIO_OSPEEDER_OSPEED5_1 GPIO_OSPEEDR_OSPEED5_1 +#define GPIO_OSPEEDER_OSPEED6_Pos GPIO_OSPEEDR_OSPEED6_Pos +#define GPIO_OSPEEDER_OSPEED6_Msk GPIO_OSPEEDR_OSPEED6_Msk +#define GPIO_OSPEEDER_OSPEED6 GPIO_OSPEEDR_OSPEED6 +#define GPIO_OSPEEDER_OSPEED6_0 GPIO_OSPEEDR_OSPEED6_0 +#define GPIO_OSPEEDER_OSPEED6_1 GPIO_OSPEEDR_OSPEED6_1 +#define GPIO_OSPEEDER_OSPEED7_Pos GPIO_OSPEEDR_OSPEED7_Pos +#define GPIO_OSPEEDER_OSPEED7_Msk GPIO_OSPEEDR_OSPEED7_Msk +#define GPIO_OSPEEDER_OSPEED7 GPIO_OSPEEDR_OSPEED7 +#define GPIO_OSPEEDER_OSPEED7_0 GPIO_OSPEEDR_OSPEED7_0 +#define GPIO_OSPEEDER_OSPEED7_1 GPIO_OSPEEDR_OSPEED7_1 +#define GPIO_OSPEEDER_OSPEED8_Pos GPIO_OSPEEDR_OSPEED8_Pos +#define GPIO_OSPEEDER_OSPEED8_Msk GPIO_OSPEEDR_OSPEED8_Msk +#define GPIO_OSPEEDER_OSPEED8 GPIO_OSPEEDR_OSPEED8 +#define GPIO_OSPEEDER_OSPEED8_0 GPIO_OSPEEDR_OSPEED8_0 +#define GPIO_OSPEEDER_OSPEED8_1 GPIO_OSPEEDR_OSPEED8_1 +#define GPIO_OSPEEDER_OSPEED9_Pos GPIO_OSPEEDR_OSPEED9_Pos +#define GPIO_OSPEEDER_OSPEED9_Msk GPIO_OSPEEDR_OSPEED9_Msk +#define GPIO_OSPEEDER_OSPEED9 GPIO_OSPEEDR_OSPEED9 +#define GPIO_OSPEEDER_OSPEED9_0 GPIO_OSPEEDR_OSPEED9_0 +#define GPIO_OSPEEDER_OSPEED9_1 GPIO_OSPEEDR_OSPEED9_1 +#define GPIO_OSPEEDER_OSPEED10_Pos GPIO_OSPEEDR_OSPEED10_Pos +#define GPIO_OSPEEDER_OSPEED10_Msk GPIO_OSPEEDR_OSPEED10_Msk +#define GPIO_OSPEEDER_OSPEED10 GPIO_OSPEEDR_OSPEED10 +#define GPIO_OSPEEDER_OSPEED10_0 GPIO_OSPEEDR_OSPEED10_0 +#define GPIO_OSPEEDER_OSPEED10_1 GPIO_OSPEEDR_OSPEED10_1 +#define GPIO_OSPEEDER_OSPEED11_Pos GPIO_OSPEEDR_OSPEED11_Pos +#define GPIO_OSPEEDER_OSPEED11_Msk GPIO_OSPEEDR_OSPEED11_Msk +#define GPIO_OSPEEDER_OSPEED11 GPIO_OSPEEDR_OSPEED11 +#define GPIO_OSPEEDER_OSPEED11_0 GPIO_OSPEEDR_OSPEED11_0 +#define GPIO_OSPEEDER_OSPEED11_1 GPIO_OSPEEDR_OSPEED11_1 +#define GPIO_OSPEEDER_OSPEED12_Pos GPIO_OSPEEDR_OSPEED12_Pos +#define GPIO_OSPEEDER_OSPEED12_Msk GPIO_OSPEEDR_OSPEED12_Msk +#define GPIO_OSPEEDER_OSPEED12 GPIO_OSPEEDR_OSPEED12 +#define GPIO_OSPEEDER_OSPEED12_0 GPIO_OSPEEDR_OSPEED12_0 +#define GPIO_OSPEEDER_OSPEED12_1 GPIO_OSPEEDR_OSPEED12_1 +#define GPIO_OSPEEDER_OSPEED13_Pos GPIO_OSPEEDR_OSPEED13_Pos +#define GPIO_OSPEEDER_OSPEED13_Msk GPIO_OSPEEDR_OSPEED13_Msk +#define GPIO_OSPEEDER_OSPEED13 GPIO_OSPEEDR_OSPEED13 +#define GPIO_OSPEEDER_OSPEED13_0 GPIO_OSPEEDR_OSPEED13_0 +#define GPIO_OSPEEDER_OSPEED13_1 GPIO_OSPEEDR_OSPEED13_1 +#define GPIO_OSPEEDER_OSPEED14_Pos GPIO_OSPEEDR_OSPEED14_Pos +#define GPIO_OSPEEDER_OSPEED14_Msk GPIO_OSPEEDR_OSPEED14_Msk +#define GPIO_OSPEEDER_OSPEED14 GPIO_OSPEEDR_OSPEED14 +#define GPIO_OSPEEDER_OSPEED14_0 GPIO_OSPEEDR_OSPEED14_0 +#define GPIO_OSPEEDER_OSPEED14_1 GPIO_OSPEEDR_OSPEED14_1 +#define GPIO_OSPEEDER_OSPEED15_Pos GPIO_OSPEEDR_OSPEED15_Pos +#define GPIO_OSPEEDER_OSPEED15_Msk GPIO_OSPEEDR_OSPEED15_Msk +#define GPIO_OSPEEDER_OSPEED15 GPIO_OSPEEDR_OSPEED15 +#define GPIO_OSPEEDER_OSPEED15_0 GPIO_OSPEEDR_OSPEED15_0 +#define GPIO_OSPEEDER_OSPEED15_1 GPIO_OSPEEDR_OSPEED15_1 /******************* Bit definition for GPIO_PUPDR register ******************/ #define GPIO_PUPDR_PUPD0_Pos (0U) diff --git a/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l072xx.h b/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l072xx.h index 18a980888e..750d946722 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l072xx.h +++ b/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l072xx.h @@ -2632,86 +2632,168 @@ typedef struct #define GPIO_OTYPER_OT_15 (0x00008000U) /**************** Bit definition for GPIO_OSPEEDR register ******************/ -#define GPIO_OSPEEDER_OSPEED0_Pos (0U) -#define GPIO_OSPEEDER_OSPEED0_Msk (0x3UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000003 */ -#define GPIO_OSPEEDER_OSPEED0 GPIO_OSPEEDER_OSPEED0_Msk -#define GPIO_OSPEEDER_OSPEED0_0 (0x1UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000001 */ -#define GPIO_OSPEEDER_OSPEED0_1 (0x2UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000002 */ -#define GPIO_OSPEEDER_OSPEED1_Pos (2U) -#define GPIO_OSPEEDER_OSPEED1_Msk (0x3UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x0000000C */ -#define GPIO_OSPEEDER_OSPEED1 GPIO_OSPEEDER_OSPEED1_Msk -#define GPIO_OSPEEDER_OSPEED1_0 (0x1UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x00000004 */ -#define GPIO_OSPEEDER_OSPEED1_1 (0x2UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x00000008 */ -#define GPIO_OSPEEDER_OSPEED2_Pos (4U) -#define GPIO_OSPEEDER_OSPEED2_Msk (0x3UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000030 */ -#define GPIO_OSPEEDER_OSPEED2 GPIO_OSPEEDER_OSPEED2_Msk -#define GPIO_OSPEEDER_OSPEED2_0 (0x1UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000010 */ -#define GPIO_OSPEEDER_OSPEED2_1 (0x2UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000020 */ -#define GPIO_OSPEEDER_OSPEED3_Pos (6U) -#define GPIO_OSPEEDER_OSPEED3_Msk (0x3UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x000000C0 */ -#define GPIO_OSPEEDER_OSPEED3 GPIO_OSPEEDER_OSPEED3_Msk -#define GPIO_OSPEEDER_OSPEED3_0 (0x1UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x00000040 */ -#define GPIO_OSPEEDER_OSPEED3_1 (0x2UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x00000080 */ -#define GPIO_OSPEEDER_OSPEED4_Pos (8U) -#define GPIO_OSPEEDER_OSPEED4_Msk (0x3UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000300 */ -#define GPIO_OSPEEDER_OSPEED4 GPIO_OSPEEDER_OSPEED4_Msk -#define GPIO_OSPEEDER_OSPEED4_0 (0x1UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000100 */ -#define GPIO_OSPEEDER_OSPEED4_1 (0x2UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000200 */ -#define GPIO_OSPEEDER_OSPEED5_Pos (10U) -#define GPIO_OSPEEDER_OSPEED5_Msk (0x3UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000C00 */ -#define GPIO_OSPEEDER_OSPEED5 GPIO_OSPEEDER_OSPEED5_Msk -#define GPIO_OSPEEDER_OSPEED5_0 (0x1UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000400 */ -#define GPIO_OSPEEDER_OSPEED5_1 (0x2UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000800 */ -#define GPIO_OSPEEDER_OSPEED6_Pos (12U) -#define GPIO_OSPEEDER_OSPEED6_Msk (0x3UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00003000 */ -#define GPIO_OSPEEDER_OSPEED6 GPIO_OSPEEDER_OSPEED6_Msk -#define GPIO_OSPEEDER_OSPEED6_0 (0x1UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00001000 */ -#define GPIO_OSPEEDER_OSPEED6_1 (0x2UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00002000 */ -#define GPIO_OSPEEDER_OSPEED7_Pos (14U) -#define GPIO_OSPEEDER_OSPEED7_Msk (0x3UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x0000C000 */ -#define GPIO_OSPEEDER_OSPEED7 GPIO_OSPEEDER_OSPEED7_Msk -#define GPIO_OSPEEDER_OSPEED7_0 (0x1UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x00004000 */ -#define GPIO_OSPEEDER_OSPEED7_1 (0x2UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x00008000 */ -#define GPIO_OSPEEDER_OSPEED8_Pos (16U) -#define GPIO_OSPEEDER_OSPEED8_Msk (0x3UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00030000 */ -#define GPIO_OSPEEDER_OSPEED8 GPIO_OSPEEDER_OSPEED8_Msk -#define GPIO_OSPEEDER_OSPEED8_0 (0x1UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00010000 */ -#define GPIO_OSPEEDER_OSPEED8_1 (0x2UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00020000 */ -#define GPIO_OSPEEDER_OSPEED9_Pos (18U) -#define GPIO_OSPEEDER_OSPEED9_Msk (0x3UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x000C0000 */ -#define GPIO_OSPEEDER_OSPEED9 GPIO_OSPEEDER_OSPEED9_Msk -#define GPIO_OSPEEDER_OSPEED9_0 (0x1UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x00040000 */ -#define GPIO_OSPEEDER_OSPEED9_1 (0x2UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x00080000 */ -#define GPIO_OSPEEDER_OSPEED10_Pos (20U) -#define GPIO_OSPEEDER_OSPEED10_Msk (0x3UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00300000 */ -#define GPIO_OSPEEDER_OSPEED10 GPIO_OSPEEDER_OSPEED10_Msk -#define GPIO_OSPEEDER_OSPEED10_0 (0x1UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00100000 */ -#define GPIO_OSPEEDER_OSPEED10_1 (0x2UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00200000 */ -#define GPIO_OSPEEDER_OSPEED11_Pos (22U) -#define GPIO_OSPEEDER_OSPEED11_Msk (0x3UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00C00000 */ -#define GPIO_OSPEEDER_OSPEED11 GPIO_OSPEEDER_OSPEED11_Msk -#define GPIO_OSPEEDER_OSPEED11_0 (0x1UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00400000 */ -#define GPIO_OSPEEDER_OSPEED11_1 (0x2UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00800000 */ -#define GPIO_OSPEEDER_OSPEED12_Pos (24U) -#define GPIO_OSPEEDER_OSPEED12_Msk (0x3UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x03000000 */ -#define GPIO_OSPEEDER_OSPEED12 GPIO_OSPEEDER_OSPEED12_Msk -#define GPIO_OSPEEDER_OSPEED12_0 (0x1UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x01000000 */ -#define GPIO_OSPEEDER_OSPEED12_1 (0x2UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x02000000 */ -#define GPIO_OSPEEDER_OSPEED13_Pos (26U) -#define GPIO_OSPEEDER_OSPEED13_Msk (0x3UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x0C000000 */ -#define GPIO_OSPEEDER_OSPEED13 GPIO_OSPEEDER_OSPEED13_Msk -#define GPIO_OSPEEDER_OSPEED13_0 (0x1UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x04000000 */ -#define GPIO_OSPEEDER_OSPEED13_1 (0x2UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x08000000 */ -#define GPIO_OSPEEDER_OSPEED14_Pos (28U) -#define GPIO_OSPEEDER_OSPEED14_Msk (0x3UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x30000000 */ -#define GPIO_OSPEEDER_OSPEED14 GPIO_OSPEEDER_OSPEED14_Msk -#define GPIO_OSPEEDER_OSPEED14_0 (0x1UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x10000000 */ -#define GPIO_OSPEEDER_OSPEED14_1 (0x2UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x20000000 */ -#define GPIO_OSPEEDER_OSPEED15_Pos (30U) -#define GPIO_OSPEEDER_OSPEED15_Msk (0x3UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0xC0000000 */ -#define GPIO_OSPEEDER_OSPEED15 GPIO_OSPEEDER_OSPEED15_Msk -#define GPIO_OSPEEDER_OSPEED15_0 (0x1UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0x40000000 */ -#define GPIO_OSPEEDER_OSPEED15_1 (0x2UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0x80000000 */ +#define GPIO_OSPEEDR_OSPEED0_Pos (0U) +#define GPIO_OSPEEDR_OSPEED0_Msk (0x3UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000003 */ +#define GPIO_OSPEEDR_OSPEED0 GPIO_OSPEEDR_OSPEED0_Msk +#define GPIO_OSPEEDR_OSPEED0_0 (0x1UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000001 */ +#define GPIO_OSPEEDR_OSPEED0_1 (0x2UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000002 */ +#define GPIO_OSPEEDR_OSPEED1_Pos (2U) +#define GPIO_OSPEEDR_OSPEED1_Msk (0x3UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x0000000C */ +#define GPIO_OSPEEDR_OSPEED1 GPIO_OSPEEDR_OSPEED1_Msk +#define GPIO_OSPEEDR_OSPEED1_0 (0x1UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x00000004 */ +#define GPIO_OSPEEDR_OSPEED1_1 (0x2UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x00000008 */ +#define GPIO_OSPEEDR_OSPEED2_Pos (4U) +#define GPIO_OSPEEDR_OSPEED2_Msk (0x3UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000030 */ +#define GPIO_OSPEEDR_OSPEED2 GPIO_OSPEEDR_OSPEED2_Msk +#define GPIO_OSPEEDR_OSPEED2_0 (0x1UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000010 */ +#define GPIO_OSPEEDR_OSPEED2_1 (0x2UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000020 */ +#define GPIO_OSPEEDR_OSPEED3_Pos (6U) +#define GPIO_OSPEEDR_OSPEED3_Msk (0x3UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x000000C0 */ +#define GPIO_OSPEEDR_OSPEED3 GPIO_OSPEEDR_OSPEED3_Msk +#define GPIO_OSPEEDR_OSPEED3_0 (0x1UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x00000040 */ +#define GPIO_OSPEEDR_OSPEED3_1 (0x2UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x00000080 */ +#define GPIO_OSPEEDR_OSPEED4_Pos (8U) +#define GPIO_OSPEEDR_OSPEED4_Msk (0x3UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000300 */ +#define GPIO_OSPEEDR_OSPEED4 GPIO_OSPEEDR_OSPEED4_Msk +#define GPIO_OSPEEDR_OSPEED4_0 (0x1UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000100 */ +#define GPIO_OSPEEDR_OSPEED4_1 (0x2UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000200 */ +#define GPIO_OSPEEDR_OSPEED5_Pos (10U) +#define GPIO_OSPEEDR_OSPEED5_Msk (0x3UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000C00 */ +#define GPIO_OSPEEDR_OSPEED5 GPIO_OSPEEDR_OSPEED5_Msk +#define GPIO_OSPEEDR_OSPEED5_0 (0x1UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000400 */ +#define GPIO_OSPEEDR_OSPEED5_1 (0x2UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000800 */ +#define GPIO_OSPEEDR_OSPEED6_Pos (12U) +#define GPIO_OSPEEDR_OSPEED6_Msk (0x3UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00003000 */ +#define GPIO_OSPEEDR_OSPEED6 GPIO_OSPEEDR_OSPEED6_Msk +#define GPIO_OSPEEDR_OSPEED6_0 (0x1UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00001000 */ +#define GPIO_OSPEEDR_OSPEED6_1 (0x2UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00002000 */ +#define GPIO_OSPEEDR_OSPEED7_Pos (14U) +#define GPIO_OSPEEDR_OSPEED7_Msk (0x3UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x0000C000 */ +#define GPIO_OSPEEDR_OSPEED7 GPIO_OSPEEDR_OSPEED7_Msk +#define GPIO_OSPEEDR_OSPEED7_0 (0x1UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x00004000 */ +#define GPIO_OSPEEDR_OSPEED7_1 (0x2UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x00008000 */ +#define GPIO_OSPEEDR_OSPEED8_Pos (16U) +#define GPIO_OSPEEDR_OSPEED8_Msk (0x3UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00030000 */ +#define GPIO_OSPEEDR_OSPEED8 GPIO_OSPEEDR_OSPEED8_Msk +#define GPIO_OSPEEDR_OSPEED8_0 (0x1UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00010000 */ +#define GPIO_OSPEEDR_OSPEED8_1 (0x2UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00020000 */ +#define GPIO_OSPEEDR_OSPEED9_Pos (18U) +#define GPIO_OSPEEDR_OSPEED9_Msk (0x3UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x000C0000 */ +#define GPIO_OSPEEDR_OSPEED9 GPIO_OSPEEDR_OSPEED9_Msk +#define GPIO_OSPEEDR_OSPEED9_0 (0x1UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x00040000 */ +#define GPIO_OSPEEDR_OSPEED9_1 (0x2UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x00080000 */ +#define GPIO_OSPEEDR_OSPEED10_Pos (20U) +#define GPIO_OSPEEDR_OSPEED10_Msk (0x3UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00300000 */ +#define GPIO_OSPEEDR_OSPEED10 GPIO_OSPEEDR_OSPEED10_Msk +#define GPIO_OSPEEDR_OSPEED10_0 (0x1UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00100000 */ +#define GPIO_OSPEEDR_OSPEED10_1 (0x2UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00200000 */ +#define GPIO_OSPEEDR_OSPEED11_Pos (22U) +#define GPIO_OSPEEDR_OSPEED11_Msk (0x3UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00C00000 */ +#define GPIO_OSPEEDR_OSPEED11 GPIO_OSPEEDR_OSPEED11_Msk +#define GPIO_OSPEEDR_OSPEED11_0 (0x1UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00400000 */ +#define GPIO_OSPEEDR_OSPEED11_1 (0x2UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00800000 */ +#define GPIO_OSPEEDR_OSPEED12_Pos (24U) +#define GPIO_OSPEEDR_OSPEED12_Msk (0x3UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x03000000 */ +#define GPIO_OSPEEDR_OSPEED12 GPIO_OSPEEDR_OSPEED12_Msk +#define GPIO_OSPEEDR_OSPEED12_0 (0x1UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x01000000 */ +#define GPIO_OSPEEDR_OSPEED12_1 (0x2UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x02000000 */ +#define GPIO_OSPEEDR_OSPEED13_Pos (26U) +#define GPIO_OSPEEDR_OSPEED13_Msk (0x3UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x0C000000 */ +#define GPIO_OSPEEDR_OSPEED13 GPIO_OSPEEDR_OSPEED13_Msk +#define GPIO_OSPEEDR_OSPEED13_0 (0x1UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x04000000 */ +#define GPIO_OSPEEDR_OSPEED13_1 (0x2UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x08000000 */ +#define GPIO_OSPEEDR_OSPEED14_Pos (28U) +#define GPIO_OSPEEDR_OSPEED14_Msk (0x3UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x30000000 */ +#define GPIO_OSPEEDR_OSPEED14 GPIO_OSPEEDR_OSPEED14_Msk +#define GPIO_OSPEEDR_OSPEED14_0 (0x1UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x10000000 */ +#define GPIO_OSPEEDR_OSPEED14_1 (0x2UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x20000000 */ +#define GPIO_OSPEEDR_OSPEED15_Pos (30U) +#define GPIO_OSPEEDR_OSPEED15_Msk (0x3UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0xC0000000 */ +#define GPIO_OSPEEDR_OSPEED15 GPIO_OSPEEDR_OSPEED15_Msk +#define GPIO_OSPEEDR_OSPEED15_0 (0x1UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0x40000000 */ +#define GPIO_OSPEEDR_OSPEED15_1 (0x2UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0x80000000 */ + +/* Legacy defines */ +#define GPIO_OSPEEDER_OSPEED0_Pos GPIO_OSPEEDR_OSPEED0_Pos +#define GPIO_OSPEEDER_OSPEED0_Msk GPIO_OSPEEDR_OSPEED0_Msk +#define GPIO_OSPEEDER_OSPEED0 GPIO_OSPEEDR_OSPEED0 +#define GPIO_OSPEEDER_OSPEED0_0 GPIO_OSPEEDR_OSPEED0_0 +#define GPIO_OSPEEDER_OSPEED0_1 GPIO_OSPEEDR_OSPEED0_1 +#define GPIO_OSPEEDER_OSPEED1_Pos GPIO_OSPEEDR_OSPEED1_Pos +#define GPIO_OSPEEDER_OSPEED1_Msk GPIO_OSPEEDR_OSPEED1_Msk +#define GPIO_OSPEEDER_OSPEED1 GPIO_OSPEEDR_OSPEED1 +#define GPIO_OSPEEDER_OSPEED1_0 GPIO_OSPEEDR_OSPEED1_0 +#define GPIO_OSPEEDER_OSPEED1_1 GPIO_OSPEEDR_OSPEED1_1 +#define GPIO_OSPEEDER_OSPEED2_Pos GPIO_OSPEEDR_OSPEED2_Pos +#define GPIO_OSPEEDER_OSPEED2_Msk GPIO_OSPEEDR_OSPEED2_Msk +#define GPIO_OSPEEDER_OSPEED2 GPIO_OSPEEDR_OSPEED2 +#define GPIO_OSPEEDER_OSPEED2_0 GPIO_OSPEEDR_OSPEED2_0 +#define GPIO_OSPEEDER_OSPEED2_1 GPIO_OSPEEDR_OSPEED2_1 +#define GPIO_OSPEEDER_OSPEED3_Pos GPIO_OSPEEDR_OSPEED3_Pos +#define GPIO_OSPEEDER_OSPEED3_Msk GPIO_OSPEEDR_OSPEED3_Msk +#define GPIO_OSPEEDER_OSPEED3 GPIO_OSPEEDR_OSPEED3 +#define GPIO_OSPEEDER_OSPEED3_0 GPIO_OSPEEDR_OSPEED3_0 +#define GPIO_OSPEEDER_OSPEED3_1 GPIO_OSPEEDR_OSPEED3_1 +#define GPIO_OSPEEDER_OSPEED4_Pos GPIO_OSPEEDR_OSPEED4_Pos +#define GPIO_OSPEEDER_OSPEED4_Msk GPIO_OSPEEDR_OSPEED4_Msk +#define GPIO_OSPEEDER_OSPEED4 GPIO_OSPEEDR_OSPEED4 +#define GPIO_OSPEEDER_OSPEED4_0 GPIO_OSPEEDR_OSPEED4_0 +#define GPIO_OSPEEDER_OSPEED4_1 GPIO_OSPEEDR_OSPEED4_1 +#define GPIO_OSPEEDER_OSPEED5_Pos GPIO_OSPEEDR_OSPEED5_Pos +#define GPIO_OSPEEDER_OSPEED5_Msk GPIO_OSPEEDR_OSPEED5_Msk +#define GPIO_OSPEEDER_OSPEED5 GPIO_OSPEEDR_OSPEED5 +#define GPIO_OSPEEDER_OSPEED5_0 GPIO_OSPEEDR_OSPEED5_0 +#define GPIO_OSPEEDER_OSPEED5_1 GPIO_OSPEEDR_OSPEED5_1 +#define GPIO_OSPEEDER_OSPEED6_Pos GPIO_OSPEEDR_OSPEED6_Pos +#define GPIO_OSPEEDER_OSPEED6_Msk GPIO_OSPEEDR_OSPEED6_Msk +#define GPIO_OSPEEDER_OSPEED6 GPIO_OSPEEDR_OSPEED6 +#define GPIO_OSPEEDER_OSPEED6_0 GPIO_OSPEEDR_OSPEED6_0 +#define GPIO_OSPEEDER_OSPEED6_1 GPIO_OSPEEDR_OSPEED6_1 +#define GPIO_OSPEEDER_OSPEED7_Pos GPIO_OSPEEDR_OSPEED7_Pos +#define GPIO_OSPEEDER_OSPEED7_Msk GPIO_OSPEEDR_OSPEED7_Msk +#define GPIO_OSPEEDER_OSPEED7 GPIO_OSPEEDR_OSPEED7 +#define GPIO_OSPEEDER_OSPEED7_0 GPIO_OSPEEDR_OSPEED7_0 +#define GPIO_OSPEEDER_OSPEED7_1 GPIO_OSPEEDR_OSPEED7_1 +#define GPIO_OSPEEDER_OSPEED8_Pos GPIO_OSPEEDR_OSPEED8_Pos +#define GPIO_OSPEEDER_OSPEED8_Msk GPIO_OSPEEDR_OSPEED8_Msk +#define GPIO_OSPEEDER_OSPEED8 GPIO_OSPEEDR_OSPEED8 +#define GPIO_OSPEEDER_OSPEED8_0 GPIO_OSPEEDR_OSPEED8_0 +#define GPIO_OSPEEDER_OSPEED8_1 GPIO_OSPEEDR_OSPEED8_1 +#define GPIO_OSPEEDER_OSPEED9_Pos GPIO_OSPEEDR_OSPEED9_Pos +#define GPIO_OSPEEDER_OSPEED9_Msk GPIO_OSPEEDR_OSPEED9_Msk +#define GPIO_OSPEEDER_OSPEED9 GPIO_OSPEEDR_OSPEED9 +#define GPIO_OSPEEDER_OSPEED9_0 GPIO_OSPEEDR_OSPEED9_0 +#define GPIO_OSPEEDER_OSPEED9_1 GPIO_OSPEEDR_OSPEED9_1 +#define GPIO_OSPEEDER_OSPEED10_Pos GPIO_OSPEEDR_OSPEED10_Pos +#define GPIO_OSPEEDER_OSPEED10_Msk GPIO_OSPEEDR_OSPEED10_Msk +#define GPIO_OSPEEDER_OSPEED10 GPIO_OSPEEDR_OSPEED10 +#define GPIO_OSPEEDER_OSPEED10_0 GPIO_OSPEEDR_OSPEED10_0 +#define GPIO_OSPEEDER_OSPEED10_1 GPIO_OSPEEDR_OSPEED10_1 +#define GPIO_OSPEEDER_OSPEED11_Pos GPIO_OSPEEDR_OSPEED11_Pos +#define GPIO_OSPEEDER_OSPEED11_Msk GPIO_OSPEEDR_OSPEED11_Msk +#define GPIO_OSPEEDER_OSPEED11 GPIO_OSPEEDR_OSPEED11 +#define GPIO_OSPEEDER_OSPEED11_0 GPIO_OSPEEDR_OSPEED11_0 +#define GPIO_OSPEEDER_OSPEED11_1 GPIO_OSPEEDR_OSPEED11_1 +#define GPIO_OSPEEDER_OSPEED12_Pos GPIO_OSPEEDR_OSPEED12_Pos +#define GPIO_OSPEEDER_OSPEED12_Msk GPIO_OSPEEDR_OSPEED12_Msk +#define GPIO_OSPEEDER_OSPEED12 GPIO_OSPEEDR_OSPEED12 +#define GPIO_OSPEEDER_OSPEED12_0 GPIO_OSPEEDR_OSPEED12_0 +#define GPIO_OSPEEDER_OSPEED12_1 GPIO_OSPEEDR_OSPEED12_1 +#define GPIO_OSPEEDER_OSPEED13_Pos GPIO_OSPEEDR_OSPEED13_Pos +#define GPIO_OSPEEDER_OSPEED13_Msk GPIO_OSPEEDR_OSPEED13_Msk +#define GPIO_OSPEEDER_OSPEED13 GPIO_OSPEEDR_OSPEED13 +#define GPIO_OSPEEDER_OSPEED13_0 GPIO_OSPEEDR_OSPEED13_0 +#define GPIO_OSPEEDER_OSPEED13_1 GPIO_OSPEEDR_OSPEED13_1 +#define GPIO_OSPEEDER_OSPEED14_Pos GPIO_OSPEEDR_OSPEED14_Pos +#define GPIO_OSPEEDER_OSPEED14_Msk GPIO_OSPEEDR_OSPEED14_Msk +#define GPIO_OSPEEDER_OSPEED14 GPIO_OSPEEDR_OSPEED14 +#define GPIO_OSPEEDER_OSPEED14_0 GPIO_OSPEEDR_OSPEED14_0 +#define GPIO_OSPEEDER_OSPEED14_1 GPIO_OSPEEDR_OSPEED14_1 +#define GPIO_OSPEEDER_OSPEED15_Pos GPIO_OSPEEDR_OSPEED15_Pos +#define GPIO_OSPEEDER_OSPEED15_Msk GPIO_OSPEEDR_OSPEED15_Msk +#define GPIO_OSPEEDER_OSPEED15 GPIO_OSPEEDR_OSPEED15 +#define GPIO_OSPEEDER_OSPEED15_0 GPIO_OSPEEDR_OSPEED15_0 +#define GPIO_OSPEEDER_OSPEED15_1 GPIO_OSPEEDR_OSPEED15_1 /******************* Bit definition for GPIO_PUPDR register ******************/ #define GPIO_PUPDR_PUPD0_Pos (0U) diff --git a/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h b/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h index af87c0ce07..6aa4fb2d7c 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h +++ b/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h @@ -2654,86 +2654,168 @@ typedef struct #define GPIO_OTYPER_OT_15 (0x00008000U) /**************** Bit definition for GPIO_OSPEEDR register ******************/ -#define GPIO_OSPEEDER_OSPEED0_Pos (0U) -#define GPIO_OSPEEDER_OSPEED0_Msk (0x3UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000003 */ -#define GPIO_OSPEEDER_OSPEED0 GPIO_OSPEEDER_OSPEED0_Msk -#define GPIO_OSPEEDER_OSPEED0_0 (0x1UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000001 */ -#define GPIO_OSPEEDER_OSPEED0_1 (0x2UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000002 */ -#define GPIO_OSPEEDER_OSPEED1_Pos (2U) -#define GPIO_OSPEEDER_OSPEED1_Msk (0x3UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x0000000C */ -#define GPIO_OSPEEDER_OSPEED1 GPIO_OSPEEDER_OSPEED1_Msk -#define GPIO_OSPEEDER_OSPEED1_0 (0x1UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x00000004 */ -#define GPIO_OSPEEDER_OSPEED1_1 (0x2UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x00000008 */ -#define GPIO_OSPEEDER_OSPEED2_Pos (4U) -#define GPIO_OSPEEDER_OSPEED2_Msk (0x3UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000030 */ -#define GPIO_OSPEEDER_OSPEED2 GPIO_OSPEEDER_OSPEED2_Msk -#define GPIO_OSPEEDER_OSPEED2_0 (0x1UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000010 */ -#define GPIO_OSPEEDER_OSPEED2_1 (0x2UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000020 */ -#define GPIO_OSPEEDER_OSPEED3_Pos (6U) -#define GPIO_OSPEEDER_OSPEED3_Msk (0x3UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x000000C0 */ -#define GPIO_OSPEEDER_OSPEED3 GPIO_OSPEEDER_OSPEED3_Msk -#define GPIO_OSPEEDER_OSPEED3_0 (0x1UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x00000040 */ -#define GPIO_OSPEEDER_OSPEED3_1 (0x2UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x00000080 */ -#define GPIO_OSPEEDER_OSPEED4_Pos (8U) -#define GPIO_OSPEEDER_OSPEED4_Msk (0x3UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000300 */ -#define GPIO_OSPEEDER_OSPEED4 GPIO_OSPEEDER_OSPEED4_Msk -#define GPIO_OSPEEDER_OSPEED4_0 (0x1UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000100 */ -#define GPIO_OSPEEDER_OSPEED4_1 (0x2UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000200 */ -#define GPIO_OSPEEDER_OSPEED5_Pos (10U) -#define GPIO_OSPEEDER_OSPEED5_Msk (0x3UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000C00 */ -#define GPIO_OSPEEDER_OSPEED5 GPIO_OSPEEDER_OSPEED5_Msk -#define GPIO_OSPEEDER_OSPEED5_0 (0x1UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000400 */ -#define GPIO_OSPEEDER_OSPEED5_1 (0x2UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000800 */ -#define GPIO_OSPEEDER_OSPEED6_Pos (12U) -#define GPIO_OSPEEDER_OSPEED6_Msk (0x3UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00003000 */ -#define GPIO_OSPEEDER_OSPEED6 GPIO_OSPEEDER_OSPEED6_Msk -#define GPIO_OSPEEDER_OSPEED6_0 (0x1UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00001000 */ -#define GPIO_OSPEEDER_OSPEED6_1 (0x2UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00002000 */ -#define GPIO_OSPEEDER_OSPEED7_Pos (14U) -#define GPIO_OSPEEDER_OSPEED7_Msk (0x3UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x0000C000 */ -#define GPIO_OSPEEDER_OSPEED7 GPIO_OSPEEDER_OSPEED7_Msk -#define GPIO_OSPEEDER_OSPEED7_0 (0x1UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x00004000 */ -#define GPIO_OSPEEDER_OSPEED7_1 (0x2UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x00008000 */ -#define GPIO_OSPEEDER_OSPEED8_Pos (16U) -#define GPIO_OSPEEDER_OSPEED8_Msk (0x3UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00030000 */ -#define GPIO_OSPEEDER_OSPEED8 GPIO_OSPEEDER_OSPEED8_Msk -#define GPIO_OSPEEDER_OSPEED8_0 (0x1UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00010000 */ -#define GPIO_OSPEEDER_OSPEED8_1 (0x2UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00020000 */ -#define GPIO_OSPEEDER_OSPEED9_Pos (18U) -#define GPIO_OSPEEDER_OSPEED9_Msk (0x3UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x000C0000 */ -#define GPIO_OSPEEDER_OSPEED9 GPIO_OSPEEDER_OSPEED9_Msk -#define GPIO_OSPEEDER_OSPEED9_0 (0x1UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x00040000 */ -#define GPIO_OSPEEDER_OSPEED9_1 (0x2UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x00080000 */ -#define GPIO_OSPEEDER_OSPEED10_Pos (20U) -#define GPIO_OSPEEDER_OSPEED10_Msk (0x3UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00300000 */ -#define GPIO_OSPEEDER_OSPEED10 GPIO_OSPEEDER_OSPEED10_Msk -#define GPIO_OSPEEDER_OSPEED10_0 (0x1UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00100000 */ -#define GPIO_OSPEEDER_OSPEED10_1 (0x2UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00200000 */ -#define GPIO_OSPEEDER_OSPEED11_Pos (22U) -#define GPIO_OSPEEDER_OSPEED11_Msk (0x3UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00C00000 */ -#define GPIO_OSPEEDER_OSPEED11 GPIO_OSPEEDER_OSPEED11_Msk -#define GPIO_OSPEEDER_OSPEED11_0 (0x1UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00400000 */ -#define GPIO_OSPEEDER_OSPEED11_1 (0x2UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00800000 */ -#define GPIO_OSPEEDER_OSPEED12_Pos (24U) -#define GPIO_OSPEEDER_OSPEED12_Msk (0x3UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x03000000 */ -#define GPIO_OSPEEDER_OSPEED12 GPIO_OSPEEDER_OSPEED12_Msk -#define GPIO_OSPEEDER_OSPEED12_0 (0x1UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x01000000 */ -#define GPIO_OSPEEDER_OSPEED12_1 (0x2UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x02000000 */ -#define GPIO_OSPEEDER_OSPEED13_Pos (26U) -#define GPIO_OSPEEDER_OSPEED13_Msk (0x3UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x0C000000 */ -#define GPIO_OSPEEDER_OSPEED13 GPIO_OSPEEDER_OSPEED13_Msk -#define GPIO_OSPEEDER_OSPEED13_0 (0x1UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x04000000 */ -#define GPIO_OSPEEDER_OSPEED13_1 (0x2UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x08000000 */ -#define GPIO_OSPEEDER_OSPEED14_Pos (28U) -#define GPIO_OSPEEDER_OSPEED14_Msk (0x3UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x30000000 */ -#define GPIO_OSPEEDER_OSPEED14 GPIO_OSPEEDER_OSPEED14_Msk -#define GPIO_OSPEEDER_OSPEED14_0 (0x1UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x10000000 */ -#define GPIO_OSPEEDER_OSPEED14_1 (0x2UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x20000000 */ -#define GPIO_OSPEEDER_OSPEED15_Pos (30U) -#define GPIO_OSPEEDER_OSPEED15_Msk (0x3UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0xC0000000 */ -#define GPIO_OSPEEDER_OSPEED15 GPIO_OSPEEDER_OSPEED15_Msk -#define GPIO_OSPEEDER_OSPEED15_0 (0x1UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0x40000000 */ -#define GPIO_OSPEEDER_OSPEED15_1 (0x2UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0x80000000 */ +#define GPIO_OSPEEDR_OSPEED0_Pos (0U) +#define GPIO_OSPEEDR_OSPEED0_Msk (0x3UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000003 */ +#define GPIO_OSPEEDR_OSPEED0 GPIO_OSPEEDR_OSPEED0_Msk +#define GPIO_OSPEEDR_OSPEED0_0 (0x1UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000001 */ +#define GPIO_OSPEEDR_OSPEED0_1 (0x2UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000002 */ +#define GPIO_OSPEEDR_OSPEED1_Pos (2U) +#define GPIO_OSPEEDR_OSPEED1_Msk (0x3UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x0000000C */ +#define GPIO_OSPEEDR_OSPEED1 GPIO_OSPEEDR_OSPEED1_Msk +#define GPIO_OSPEEDR_OSPEED1_0 (0x1UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x00000004 */ +#define GPIO_OSPEEDR_OSPEED1_1 (0x2UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x00000008 */ +#define GPIO_OSPEEDR_OSPEED2_Pos (4U) +#define GPIO_OSPEEDR_OSPEED2_Msk (0x3UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000030 */ +#define GPIO_OSPEEDR_OSPEED2 GPIO_OSPEEDR_OSPEED2_Msk +#define GPIO_OSPEEDR_OSPEED2_0 (0x1UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000010 */ +#define GPIO_OSPEEDR_OSPEED2_1 (0x2UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000020 */ +#define GPIO_OSPEEDR_OSPEED3_Pos (6U) +#define GPIO_OSPEEDR_OSPEED3_Msk (0x3UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x000000C0 */ +#define GPIO_OSPEEDR_OSPEED3 GPIO_OSPEEDR_OSPEED3_Msk +#define GPIO_OSPEEDR_OSPEED3_0 (0x1UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x00000040 */ +#define GPIO_OSPEEDR_OSPEED3_1 (0x2UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x00000080 */ +#define GPIO_OSPEEDR_OSPEED4_Pos (8U) +#define GPIO_OSPEEDR_OSPEED4_Msk (0x3UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000300 */ +#define GPIO_OSPEEDR_OSPEED4 GPIO_OSPEEDR_OSPEED4_Msk +#define GPIO_OSPEEDR_OSPEED4_0 (0x1UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000100 */ +#define GPIO_OSPEEDR_OSPEED4_1 (0x2UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000200 */ +#define GPIO_OSPEEDR_OSPEED5_Pos (10U) +#define GPIO_OSPEEDR_OSPEED5_Msk (0x3UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000C00 */ +#define GPIO_OSPEEDR_OSPEED5 GPIO_OSPEEDR_OSPEED5_Msk +#define GPIO_OSPEEDR_OSPEED5_0 (0x1UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000400 */ +#define GPIO_OSPEEDR_OSPEED5_1 (0x2UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000800 */ +#define GPIO_OSPEEDR_OSPEED6_Pos (12U) +#define GPIO_OSPEEDR_OSPEED6_Msk (0x3UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00003000 */ +#define GPIO_OSPEEDR_OSPEED6 GPIO_OSPEEDR_OSPEED6_Msk +#define GPIO_OSPEEDR_OSPEED6_0 (0x1UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00001000 */ +#define GPIO_OSPEEDR_OSPEED6_1 (0x2UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00002000 */ +#define GPIO_OSPEEDR_OSPEED7_Pos (14U) +#define GPIO_OSPEEDR_OSPEED7_Msk (0x3UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x0000C000 */ +#define GPIO_OSPEEDR_OSPEED7 GPIO_OSPEEDR_OSPEED7_Msk +#define GPIO_OSPEEDR_OSPEED7_0 (0x1UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x00004000 */ +#define GPIO_OSPEEDR_OSPEED7_1 (0x2UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x00008000 */ +#define GPIO_OSPEEDR_OSPEED8_Pos (16U) +#define GPIO_OSPEEDR_OSPEED8_Msk (0x3UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00030000 */ +#define GPIO_OSPEEDR_OSPEED8 GPIO_OSPEEDR_OSPEED8_Msk +#define GPIO_OSPEEDR_OSPEED8_0 (0x1UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00010000 */ +#define GPIO_OSPEEDR_OSPEED8_1 (0x2UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00020000 */ +#define GPIO_OSPEEDR_OSPEED9_Pos (18U) +#define GPIO_OSPEEDR_OSPEED9_Msk (0x3UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x000C0000 */ +#define GPIO_OSPEEDR_OSPEED9 GPIO_OSPEEDR_OSPEED9_Msk +#define GPIO_OSPEEDR_OSPEED9_0 (0x1UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x00040000 */ +#define GPIO_OSPEEDR_OSPEED9_1 (0x2UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x00080000 */ +#define GPIO_OSPEEDR_OSPEED10_Pos (20U) +#define GPIO_OSPEEDR_OSPEED10_Msk (0x3UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00300000 */ +#define GPIO_OSPEEDR_OSPEED10 GPIO_OSPEEDR_OSPEED10_Msk +#define GPIO_OSPEEDR_OSPEED10_0 (0x1UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00100000 */ +#define GPIO_OSPEEDR_OSPEED10_1 (0x2UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00200000 */ +#define GPIO_OSPEEDR_OSPEED11_Pos (22U) +#define GPIO_OSPEEDR_OSPEED11_Msk (0x3UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00C00000 */ +#define GPIO_OSPEEDR_OSPEED11 GPIO_OSPEEDR_OSPEED11_Msk +#define GPIO_OSPEEDR_OSPEED11_0 (0x1UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00400000 */ +#define GPIO_OSPEEDR_OSPEED11_1 (0x2UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00800000 */ +#define GPIO_OSPEEDR_OSPEED12_Pos (24U) +#define GPIO_OSPEEDR_OSPEED12_Msk (0x3UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x03000000 */ +#define GPIO_OSPEEDR_OSPEED12 GPIO_OSPEEDR_OSPEED12_Msk +#define GPIO_OSPEEDR_OSPEED12_0 (0x1UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x01000000 */ +#define GPIO_OSPEEDR_OSPEED12_1 (0x2UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x02000000 */ +#define GPIO_OSPEEDR_OSPEED13_Pos (26U) +#define GPIO_OSPEEDR_OSPEED13_Msk (0x3UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x0C000000 */ +#define GPIO_OSPEEDR_OSPEED13 GPIO_OSPEEDR_OSPEED13_Msk +#define GPIO_OSPEEDR_OSPEED13_0 (0x1UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x04000000 */ +#define GPIO_OSPEEDR_OSPEED13_1 (0x2UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x08000000 */ +#define GPIO_OSPEEDR_OSPEED14_Pos (28U) +#define GPIO_OSPEEDR_OSPEED14_Msk (0x3UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x30000000 */ +#define GPIO_OSPEEDR_OSPEED14 GPIO_OSPEEDR_OSPEED14_Msk +#define GPIO_OSPEEDR_OSPEED14_0 (0x1UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x10000000 */ +#define GPIO_OSPEEDR_OSPEED14_1 (0x2UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x20000000 */ +#define GPIO_OSPEEDR_OSPEED15_Pos (30U) +#define GPIO_OSPEEDR_OSPEED15_Msk (0x3UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0xC0000000 */ +#define GPIO_OSPEEDR_OSPEED15 GPIO_OSPEEDR_OSPEED15_Msk +#define GPIO_OSPEEDR_OSPEED15_0 (0x1UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0x40000000 */ +#define GPIO_OSPEEDR_OSPEED15_1 (0x2UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0x80000000 */ + +/* Legacy defines */ +#define GPIO_OSPEEDER_OSPEED0_Pos GPIO_OSPEEDR_OSPEED0_Pos +#define GPIO_OSPEEDER_OSPEED0_Msk GPIO_OSPEEDR_OSPEED0_Msk +#define GPIO_OSPEEDER_OSPEED0 GPIO_OSPEEDR_OSPEED0 +#define GPIO_OSPEEDER_OSPEED0_0 GPIO_OSPEEDR_OSPEED0_0 +#define GPIO_OSPEEDER_OSPEED0_1 GPIO_OSPEEDR_OSPEED0_1 +#define GPIO_OSPEEDER_OSPEED1_Pos GPIO_OSPEEDR_OSPEED1_Pos +#define GPIO_OSPEEDER_OSPEED1_Msk GPIO_OSPEEDR_OSPEED1_Msk +#define GPIO_OSPEEDER_OSPEED1 GPIO_OSPEEDR_OSPEED1 +#define GPIO_OSPEEDER_OSPEED1_0 GPIO_OSPEEDR_OSPEED1_0 +#define GPIO_OSPEEDER_OSPEED1_1 GPIO_OSPEEDR_OSPEED1_1 +#define GPIO_OSPEEDER_OSPEED2_Pos GPIO_OSPEEDR_OSPEED2_Pos +#define GPIO_OSPEEDER_OSPEED2_Msk GPIO_OSPEEDR_OSPEED2_Msk +#define GPIO_OSPEEDER_OSPEED2 GPIO_OSPEEDR_OSPEED2 +#define GPIO_OSPEEDER_OSPEED2_0 GPIO_OSPEEDR_OSPEED2_0 +#define GPIO_OSPEEDER_OSPEED2_1 GPIO_OSPEEDR_OSPEED2_1 +#define GPIO_OSPEEDER_OSPEED3_Pos GPIO_OSPEEDR_OSPEED3_Pos +#define GPIO_OSPEEDER_OSPEED3_Msk GPIO_OSPEEDR_OSPEED3_Msk +#define GPIO_OSPEEDER_OSPEED3 GPIO_OSPEEDR_OSPEED3 +#define GPIO_OSPEEDER_OSPEED3_0 GPIO_OSPEEDR_OSPEED3_0 +#define GPIO_OSPEEDER_OSPEED3_1 GPIO_OSPEEDR_OSPEED3_1 +#define GPIO_OSPEEDER_OSPEED4_Pos GPIO_OSPEEDR_OSPEED4_Pos +#define GPIO_OSPEEDER_OSPEED4_Msk GPIO_OSPEEDR_OSPEED4_Msk +#define GPIO_OSPEEDER_OSPEED4 GPIO_OSPEEDR_OSPEED4 +#define GPIO_OSPEEDER_OSPEED4_0 GPIO_OSPEEDR_OSPEED4_0 +#define GPIO_OSPEEDER_OSPEED4_1 GPIO_OSPEEDR_OSPEED4_1 +#define GPIO_OSPEEDER_OSPEED5_Pos GPIO_OSPEEDR_OSPEED5_Pos +#define GPIO_OSPEEDER_OSPEED5_Msk GPIO_OSPEEDR_OSPEED5_Msk +#define GPIO_OSPEEDER_OSPEED5 GPIO_OSPEEDR_OSPEED5 +#define GPIO_OSPEEDER_OSPEED5_0 GPIO_OSPEEDR_OSPEED5_0 +#define GPIO_OSPEEDER_OSPEED5_1 GPIO_OSPEEDR_OSPEED5_1 +#define GPIO_OSPEEDER_OSPEED6_Pos GPIO_OSPEEDR_OSPEED6_Pos +#define GPIO_OSPEEDER_OSPEED6_Msk GPIO_OSPEEDR_OSPEED6_Msk +#define GPIO_OSPEEDER_OSPEED6 GPIO_OSPEEDR_OSPEED6 +#define GPIO_OSPEEDER_OSPEED6_0 GPIO_OSPEEDR_OSPEED6_0 +#define GPIO_OSPEEDER_OSPEED6_1 GPIO_OSPEEDR_OSPEED6_1 +#define GPIO_OSPEEDER_OSPEED7_Pos GPIO_OSPEEDR_OSPEED7_Pos +#define GPIO_OSPEEDER_OSPEED7_Msk GPIO_OSPEEDR_OSPEED7_Msk +#define GPIO_OSPEEDER_OSPEED7 GPIO_OSPEEDR_OSPEED7 +#define GPIO_OSPEEDER_OSPEED7_0 GPIO_OSPEEDR_OSPEED7_0 +#define GPIO_OSPEEDER_OSPEED7_1 GPIO_OSPEEDR_OSPEED7_1 +#define GPIO_OSPEEDER_OSPEED8_Pos GPIO_OSPEEDR_OSPEED8_Pos +#define GPIO_OSPEEDER_OSPEED8_Msk GPIO_OSPEEDR_OSPEED8_Msk +#define GPIO_OSPEEDER_OSPEED8 GPIO_OSPEEDR_OSPEED8 +#define GPIO_OSPEEDER_OSPEED8_0 GPIO_OSPEEDR_OSPEED8_0 +#define GPIO_OSPEEDER_OSPEED8_1 GPIO_OSPEEDR_OSPEED8_1 +#define GPIO_OSPEEDER_OSPEED9_Pos GPIO_OSPEEDR_OSPEED9_Pos +#define GPIO_OSPEEDER_OSPEED9_Msk GPIO_OSPEEDR_OSPEED9_Msk +#define GPIO_OSPEEDER_OSPEED9 GPIO_OSPEEDR_OSPEED9 +#define GPIO_OSPEEDER_OSPEED9_0 GPIO_OSPEEDR_OSPEED9_0 +#define GPIO_OSPEEDER_OSPEED9_1 GPIO_OSPEEDR_OSPEED9_1 +#define GPIO_OSPEEDER_OSPEED10_Pos GPIO_OSPEEDR_OSPEED10_Pos +#define GPIO_OSPEEDER_OSPEED10_Msk GPIO_OSPEEDR_OSPEED10_Msk +#define GPIO_OSPEEDER_OSPEED10 GPIO_OSPEEDR_OSPEED10 +#define GPIO_OSPEEDER_OSPEED10_0 GPIO_OSPEEDR_OSPEED10_0 +#define GPIO_OSPEEDER_OSPEED10_1 GPIO_OSPEEDR_OSPEED10_1 +#define GPIO_OSPEEDER_OSPEED11_Pos GPIO_OSPEEDR_OSPEED11_Pos +#define GPIO_OSPEEDER_OSPEED11_Msk GPIO_OSPEEDR_OSPEED11_Msk +#define GPIO_OSPEEDER_OSPEED11 GPIO_OSPEEDR_OSPEED11 +#define GPIO_OSPEEDER_OSPEED11_0 GPIO_OSPEEDR_OSPEED11_0 +#define GPIO_OSPEEDER_OSPEED11_1 GPIO_OSPEEDR_OSPEED11_1 +#define GPIO_OSPEEDER_OSPEED12_Pos GPIO_OSPEEDR_OSPEED12_Pos +#define GPIO_OSPEEDER_OSPEED12_Msk GPIO_OSPEEDR_OSPEED12_Msk +#define GPIO_OSPEEDER_OSPEED12 GPIO_OSPEEDR_OSPEED12 +#define GPIO_OSPEEDER_OSPEED12_0 GPIO_OSPEEDR_OSPEED12_0 +#define GPIO_OSPEEDER_OSPEED12_1 GPIO_OSPEEDR_OSPEED12_1 +#define GPIO_OSPEEDER_OSPEED13_Pos GPIO_OSPEEDR_OSPEED13_Pos +#define GPIO_OSPEEDER_OSPEED13_Msk GPIO_OSPEEDR_OSPEED13_Msk +#define GPIO_OSPEEDER_OSPEED13 GPIO_OSPEEDR_OSPEED13 +#define GPIO_OSPEEDER_OSPEED13_0 GPIO_OSPEEDR_OSPEED13_0 +#define GPIO_OSPEEDER_OSPEED13_1 GPIO_OSPEEDR_OSPEED13_1 +#define GPIO_OSPEEDER_OSPEED14_Pos GPIO_OSPEEDR_OSPEED14_Pos +#define GPIO_OSPEEDER_OSPEED14_Msk GPIO_OSPEEDR_OSPEED14_Msk +#define GPIO_OSPEEDER_OSPEED14 GPIO_OSPEEDR_OSPEED14 +#define GPIO_OSPEEDER_OSPEED14_0 GPIO_OSPEEDR_OSPEED14_0 +#define GPIO_OSPEEDER_OSPEED14_1 GPIO_OSPEEDR_OSPEED14_1 +#define GPIO_OSPEEDER_OSPEED15_Pos GPIO_OSPEEDR_OSPEED15_Pos +#define GPIO_OSPEEDER_OSPEED15_Msk GPIO_OSPEEDR_OSPEED15_Msk +#define GPIO_OSPEEDER_OSPEED15 GPIO_OSPEEDR_OSPEED15 +#define GPIO_OSPEEDER_OSPEED15_0 GPIO_OSPEEDR_OSPEED15_0 +#define GPIO_OSPEEDER_OSPEED15_1 GPIO_OSPEEDR_OSPEED15_1 /******************* Bit definition for GPIO_PUPDR register ******************/ #define GPIO_PUPDR_PUPD0_Pos (0U) diff --git a/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l081xx.h b/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l081xx.h index 3449d29a4f..4e58712c22 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l081xx.h +++ b/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l081xx.h @@ -2372,86 +2372,168 @@ typedef struct #define GPIO_OTYPER_OT_15 (0x00008000U) /**************** Bit definition for GPIO_OSPEEDR register ******************/ -#define GPIO_OSPEEDER_OSPEED0_Pos (0U) -#define GPIO_OSPEEDER_OSPEED0_Msk (0x3UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000003 */ -#define GPIO_OSPEEDER_OSPEED0 GPIO_OSPEEDER_OSPEED0_Msk -#define GPIO_OSPEEDER_OSPEED0_0 (0x1UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000001 */ -#define GPIO_OSPEEDER_OSPEED0_1 (0x2UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000002 */ -#define GPIO_OSPEEDER_OSPEED1_Pos (2U) -#define GPIO_OSPEEDER_OSPEED1_Msk (0x3UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x0000000C */ -#define GPIO_OSPEEDER_OSPEED1 GPIO_OSPEEDER_OSPEED1_Msk -#define GPIO_OSPEEDER_OSPEED1_0 (0x1UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x00000004 */ -#define GPIO_OSPEEDER_OSPEED1_1 (0x2UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x00000008 */ -#define GPIO_OSPEEDER_OSPEED2_Pos (4U) -#define GPIO_OSPEEDER_OSPEED2_Msk (0x3UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000030 */ -#define GPIO_OSPEEDER_OSPEED2 GPIO_OSPEEDER_OSPEED2_Msk -#define GPIO_OSPEEDER_OSPEED2_0 (0x1UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000010 */ -#define GPIO_OSPEEDER_OSPEED2_1 (0x2UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000020 */ -#define GPIO_OSPEEDER_OSPEED3_Pos (6U) -#define GPIO_OSPEEDER_OSPEED3_Msk (0x3UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x000000C0 */ -#define GPIO_OSPEEDER_OSPEED3 GPIO_OSPEEDER_OSPEED3_Msk -#define GPIO_OSPEEDER_OSPEED3_0 (0x1UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x00000040 */ -#define GPIO_OSPEEDER_OSPEED3_1 (0x2UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x00000080 */ -#define GPIO_OSPEEDER_OSPEED4_Pos (8U) -#define GPIO_OSPEEDER_OSPEED4_Msk (0x3UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000300 */ -#define GPIO_OSPEEDER_OSPEED4 GPIO_OSPEEDER_OSPEED4_Msk -#define GPIO_OSPEEDER_OSPEED4_0 (0x1UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000100 */ -#define GPIO_OSPEEDER_OSPEED4_1 (0x2UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000200 */ -#define GPIO_OSPEEDER_OSPEED5_Pos (10U) -#define GPIO_OSPEEDER_OSPEED5_Msk (0x3UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000C00 */ -#define GPIO_OSPEEDER_OSPEED5 GPIO_OSPEEDER_OSPEED5_Msk -#define GPIO_OSPEEDER_OSPEED5_0 (0x1UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000400 */ -#define GPIO_OSPEEDER_OSPEED5_1 (0x2UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000800 */ -#define GPIO_OSPEEDER_OSPEED6_Pos (12U) -#define GPIO_OSPEEDER_OSPEED6_Msk (0x3UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00003000 */ -#define GPIO_OSPEEDER_OSPEED6 GPIO_OSPEEDER_OSPEED6_Msk -#define GPIO_OSPEEDER_OSPEED6_0 (0x1UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00001000 */ -#define GPIO_OSPEEDER_OSPEED6_1 (0x2UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00002000 */ -#define GPIO_OSPEEDER_OSPEED7_Pos (14U) -#define GPIO_OSPEEDER_OSPEED7_Msk (0x3UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x0000C000 */ -#define GPIO_OSPEEDER_OSPEED7 GPIO_OSPEEDER_OSPEED7_Msk -#define GPIO_OSPEEDER_OSPEED7_0 (0x1UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x00004000 */ -#define GPIO_OSPEEDER_OSPEED7_1 (0x2UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x00008000 */ -#define GPIO_OSPEEDER_OSPEED8_Pos (16U) -#define GPIO_OSPEEDER_OSPEED8_Msk (0x3UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00030000 */ -#define GPIO_OSPEEDER_OSPEED8 GPIO_OSPEEDER_OSPEED8_Msk -#define GPIO_OSPEEDER_OSPEED8_0 (0x1UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00010000 */ -#define GPIO_OSPEEDER_OSPEED8_1 (0x2UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00020000 */ -#define GPIO_OSPEEDER_OSPEED9_Pos (18U) -#define GPIO_OSPEEDER_OSPEED9_Msk (0x3UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x000C0000 */ -#define GPIO_OSPEEDER_OSPEED9 GPIO_OSPEEDER_OSPEED9_Msk -#define GPIO_OSPEEDER_OSPEED9_0 (0x1UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x00040000 */ -#define GPIO_OSPEEDER_OSPEED9_1 (0x2UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x00080000 */ -#define GPIO_OSPEEDER_OSPEED10_Pos (20U) -#define GPIO_OSPEEDER_OSPEED10_Msk (0x3UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00300000 */ -#define GPIO_OSPEEDER_OSPEED10 GPIO_OSPEEDER_OSPEED10_Msk -#define GPIO_OSPEEDER_OSPEED10_0 (0x1UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00100000 */ -#define GPIO_OSPEEDER_OSPEED10_1 (0x2UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00200000 */ -#define GPIO_OSPEEDER_OSPEED11_Pos (22U) -#define GPIO_OSPEEDER_OSPEED11_Msk (0x3UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00C00000 */ -#define GPIO_OSPEEDER_OSPEED11 GPIO_OSPEEDER_OSPEED11_Msk -#define GPIO_OSPEEDER_OSPEED11_0 (0x1UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00400000 */ -#define GPIO_OSPEEDER_OSPEED11_1 (0x2UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00800000 */ -#define GPIO_OSPEEDER_OSPEED12_Pos (24U) -#define GPIO_OSPEEDER_OSPEED12_Msk (0x3UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x03000000 */ -#define GPIO_OSPEEDER_OSPEED12 GPIO_OSPEEDER_OSPEED12_Msk -#define GPIO_OSPEEDER_OSPEED12_0 (0x1UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x01000000 */ -#define GPIO_OSPEEDER_OSPEED12_1 (0x2UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x02000000 */ -#define GPIO_OSPEEDER_OSPEED13_Pos (26U) -#define GPIO_OSPEEDER_OSPEED13_Msk (0x3UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x0C000000 */ -#define GPIO_OSPEEDER_OSPEED13 GPIO_OSPEEDER_OSPEED13_Msk -#define GPIO_OSPEEDER_OSPEED13_0 (0x1UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x04000000 */ -#define GPIO_OSPEEDER_OSPEED13_1 (0x2UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x08000000 */ -#define GPIO_OSPEEDER_OSPEED14_Pos (28U) -#define GPIO_OSPEEDER_OSPEED14_Msk (0x3UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x30000000 */ -#define GPIO_OSPEEDER_OSPEED14 GPIO_OSPEEDER_OSPEED14_Msk -#define GPIO_OSPEEDER_OSPEED14_0 (0x1UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x10000000 */ -#define GPIO_OSPEEDER_OSPEED14_1 (0x2UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x20000000 */ -#define GPIO_OSPEEDER_OSPEED15_Pos (30U) -#define GPIO_OSPEEDER_OSPEED15_Msk (0x3UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0xC0000000 */ -#define GPIO_OSPEEDER_OSPEED15 GPIO_OSPEEDER_OSPEED15_Msk -#define GPIO_OSPEEDER_OSPEED15_0 (0x1UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0x40000000 */ -#define GPIO_OSPEEDER_OSPEED15_1 (0x2UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0x80000000 */ +#define GPIO_OSPEEDR_OSPEED0_Pos (0U) +#define GPIO_OSPEEDR_OSPEED0_Msk (0x3UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000003 */ +#define GPIO_OSPEEDR_OSPEED0 GPIO_OSPEEDR_OSPEED0_Msk +#define GPIO_OSPEEDR_OSPEED0_0 (0x1UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000001 */ +#define GPIO_OSPEEDR_OSPEED0_1 (0x2UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000002 */ +#define GPIO_OSPEEDR_OSPEED1_Pos (2U) +#define GPIO_OSPEEDR_OSPEED1_Msk (0x3UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x0000000C */ +#define GPIO_OSPEEDR_OSPEED1 GPIO_OSPEEDR_OSPEED1_Msk +#define GPIO_OSPEEDR_OSPEED1_0 (0x1UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x00000004 */ +#define GPIO_OSPEEDR_OSPEED1_1 (0x2UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x00000008 */ +#define GPIO_OSPEEDR_OSPEED2_Pos (4U) +#define GPIO_OSPEEDR_OSPEED2_Msk (0x3UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000030 */ +#define GPIO_OSPEEDR_OSPEED2 GPIO_OSPEEDR_OSPEED2_Msk +#define GPIO_OSPEEDR_OSPEED2_0 (0x1UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000010 */ +#define GPIO_OSPEEDR_OSPEED2_1 (0x2UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000020 */ +#define GPIO_OSPEEDR_OSPEED3_Pos (6U) +#define GPIO_OSPEEDR_OSPEED3_Msk (0x3UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x000000C0 */ +#define GPIO_OSPEEDR_OSPEED3 GPIO_OSPEEDR_OSPEED3_Msk +#define GPIO_OSPEEDR_OSPEED3_0 (0x1UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x00000040 */ +#define GPIO_OSPEEDR_OSPEED3_1 (0x2UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x00000080 */ +#define GPIO_OSPEEDR_OSPEED4_Pos (8U) +#define GPIO_OSPEEDR_OSPEED4_Msk (0x3UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000300 */ +#define GPIO_OSPEEDR_OSPEED4 GPIO_OSPEEDR_OSPEED4_Msk +#define GPIO_OSPEEDR_OSPEED4_0 (0x1UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000100 */ +#define GPIO_OSPEEDR_OSPEED4_1 (0x2UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000200 */ +#define GPIO_OSPEEDR_OSPEED5_Pos (10U) +#define GPIO_OSPEEDR_OSPEED5_Msk (0x3UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000C00 */ +#define GPIO_OSPEEDR_OSPEED5 GPIO_OSPEEDR_OSPEED5_Msk +#define GPIO_OSPEEDR_OSPEED5_0 (0x1UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000400 */ +#define GPIO_OSPEEDR_OSPEED5_1 (0x2UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000800 */ +#define GPIO_OSPEEDR_OSPEED6_Pos (12U) +#define GPIO_OSPEEDR_OSPEED6_Msk (0x3UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00003000 */ +#define GPIO_OSPEEDR_OSPEED6 GPIO_OSPEEDR_OSPEED6_Msk +#define GPIO_OSPEEDR_OSPEED6_0 (0x1UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00001000 */ +#define GPIO_OSPEEDR_OSPEED6_1 (0x2UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00002000 */ +#define GPIO_OSPEEDR_OSPEED7_Pos (14U) +#define GPIO_OSPEEDR_OSPEED7_Msk (0x3UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x0000C000 */ +#define GPIO_OSPEEDR_OSPEED7 GPIO_OSPEEDR_OSPEED7_Msk +#define GPIO_OSPEEDR_OSPEED7_0 (0x1UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x00004000 */ +#define GPIO_OSPEEDR_OSPEED7_1 (0x2UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x00008000 */ +#define GPIO_OSPEEDR_OSPEED8_Pos (16U) +#define GPIO_OSPEEDR_OSPEED8_Msk (0x3UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00030000 */ +#define GPIO_OSPEEDR_OSPEED8 GPIO_OSPEEDR_OSPEED8_Msk +#define GPIO_OSPEEDR_OSPEED8_0 (0x1UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00010000 */ +#define GPIO_OSPEEDR_OSPEED8_1 (0x2UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00020000 */ +#define GPIO_OSPEEDR_OSPEED9_Pos (18U) +#define GPIO_OSPEEDR_OSPEED9_Msk (0x3UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x000C0000 */ +#define GPIO_OSPEEDR_OSPEED9 GPIO_OSPEEDR_OSPEED9_Msk +#define GPIO_OSPEEDR_OSPEED9_0 (0x1UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x00040000 */ +#define GPIO_OSPEEDR_OSPEED9_1 (0x2UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x00080000 */ +#define GPIO_OSPEEDR_OSPEED10_Pos (20U) +#define GPIO_OSPEEDR_OSPEED10_Msk (0x3UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00300000 */ +#define GPIO_OSPEEDR_OSPEED10 GPIO_OSPEEDR_OSPEED10_Msk +#define GPIO_OSPEEDR_OSPEED10_0 (0x1UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00100000 */ +#define GPIO_OSPEEDR_OSPEED10_1 (0x2UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00200000 */ +#define GPIO_OSPEEDR_OSPEED11_Pos (22U) +#define GPIO_OSPEEDR_OSPEED11_Msk (0x3UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00C00000 */ +#define GPIO_OSPEEDR_OSPEED11 GPIO_OSPEEDR_OSPEED11_Msk +#define GPIO_OSPEEDR_OSPEED11_0 (0x1UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00400000 */ +#define GPIO_OSPEEDR_OSPEED11_1 (0x2UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00800000 */ +#define GPIO_OSPEEDR_OSPEED12_Pos (24U) +#define GPIO_OSPEEDR_OSPEED12_Msk (0x3UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x03000000 */ +#define GPIO_OSPEEDR_OSPEED12 GPIO_OSPEEDR_OSPEED12_Msk +#define GPIO_OSPEEDR_OSPEED12_0 (0x1UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x01000000 */ +#define GPIO_OSPEEDR_OSPEED12_1 (0x2UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x02000000 */ +#define GPIO_OSPEEDR_OSPEED13_Pos (26U) +#define GPIO_OSPEEDR_OSPEED13_Msk (0x3UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x0C000000 */ +#define GPIO_OSPEEDR_OSPEED13 GPIO_OSPEEDR_OSPEED13_Msk +#define GPIO_OSPEEDR_OSPEED13_0 (0x1UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x04000000 */ +#define GPIO_OSPEEDR_OSPEED13_1 (0x2UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x08000000 */ +#define GPIO_OSPEEDR_OSPEED14_Pos (28U) +#define GPIO_OSPEEDR_OSPEED14_Msk (0x3UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x30000000 */ +#define GPIO_OSPEEDR_OSPEED14 GPIO_OSPEEDR_OSPEED14_Msk +#define GPIO_OSPEEDR_OSPEED14_0 (0x1UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x10000000 */ +#define GPIO_OSPEEDR_OSPEED14_1 (0x2UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x20000000 */ +#define GPIO_OSPEEDR_OSPEED15_Pos (30U) +#define GPIO_OSPEEDR_OSPEED15_Msk (0x3UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0xC0000000 */ +#define GPIO_OSPEEDR_OSPEED15 GPIO_OSPEEDR_OSPEED15_Msk +#define GPIO_OSPEEDR_OSPEED15_0 (0x1UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0x40000000 */ +#define GPIO_OSPEEDR_OSPEED15_1 (0x2UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0x80000000 */ + +/* Legacy defines */ +#define GPIO_OSPEEDER_OSPEED0_Pos GPIO_OSPEEDR_OSPEED0_Pos +#define GPIO_OSPEEDER_OSPEED0_Msk GPIO_OSPEEDR_OSPEED0_Msk +#define GPIO_OSPEEDER_OSPEED0 GPIO_OSPEEDR_OSPEED0 +#define GPIO_OSPEEDER_OSPEED0_0 GPIO_OSPEEDR_OSPEED0_0 +#define GPIO_OSPEEDER_OSPEED0_1 GPIO_OSPEEDR_OSPEED0_1 +#define GPIO_OSPEEDER_OSPEED1_Pos GPIO_OSPEEDR_OSPEED1_Pos +#define GPIO_OSPEEDER_OSPEED1_Msk GPIO_OSPEEDR_OSPEED1_Msk +#define GPIO_OSPEEDER_OSPEED1 GPIO_OSPEEDR_OSPEED1 +#define GPIO_OSPEEDER_OSPEED1_0 GPIO_OSPEEDR_OSPEED1_0 +#define GPIO_OSPEEDER_OSPEED1_1 GPIO_OSPEEDR_OSPEED1_1 +#define GPIO_OSPEEDER_OSPEED2_Pos GPIO_OSPEEDR_OSPEED2_Pos +#define GPIO_OSPEEDER_OSPEED2_Msk GPIO_OSPEEDR_OSPEED2_Msk +#define GPIO_OSPEEDER_OSPEED2 GPIO_OSPEEDR_OSPEED2 +#define GPIO_OSPEEDER_OSPEED2_0 GPIO_OSPEEDR_OSPEED2_0 +#define GPIO_OSPEEDER_OSPEED2_1 GPIO_OSPEEDR_OSPEED2_1 +#define GPIO_OSPEEDER_OSPEED3_Pos GPIO_OSPEEDR_OSPEED3_Pos +#define GPIO_OSPEEDER_OSPEED3_Msk GPIO_OSPEEDR_OSPEED3_Msk +#define GPIO_OSPEEDER_OSPEED3 GPIO_OSPEEDR_OSPEED3 +#define GPIO_OSPEEDER_OSPEED3_0 GPIO_OSPEEDR_OSPEED3_0 +#define GPIO_OSPEEDER_OSPEED3_1 GPIO_OSPEEDR_OSPEED3_1 +#define GPIO_OSPEEDER_OSPEED4_Pos GPIO_OSPEEDR_OSPEED4_Pos +#define GPIO_OSPEEDER_OSPEED4_Msk GPIO_OSPEEDR_OSPEED4_Msk +#define GPIO_OSPEEDER_OSPEED4 GPIO_OSPEEDR_OSPEED4 +#define GPIO_OSPEEDER_OSPEED4_0 GPIO_OSPEEDR_OSPEED4_0 +#define GPIO_OSPEEDER_OSPEED4_1 GPIO_OSPEEDR_OSPEED4_1 +#define GPIO_OSPEEDER_OSPEED5_Pos GPIO_OSPEEDR_OSPEED5_Pos +#define GPIO_OSPEEDER_OSPEED5_Msk GPIO_OSPEEDR_OSPEED5_Msk +#define GPIO_OSPEEDER_OSPEED5 GPIO_OSPEEDR_OSPEED5 +#define GPIO_OSPEEDER_OSPEED5_0 GPIO_OSPEEDR_OSPEED5_0 +#define GPIO_OSPEEDER_OSPEED5_1 GPIO_OSPEEDR_OSPEED5_1 +#define GPIO_OSPEEDER_OSPEED6_Pos GPIO_OSPEEDR_OSPEED6_Pos +#define GPIO_OSPEEDER_OSPEED6_Msk GPIO_OSPEEDR_OSPEED6_Msk +#define GPIO_OSPEEDER_OSPEED6 GPIO_OSPEEDR_OSPEED6 +#define GPIO_OSPEEDER_OSPEED6_0 GPIO_OSPEEDR_OSPEED6_0 +#define GPIO_OSPEEDER_OSPEED6_1 GPIO_OSPEEDR_OSPEED6_1 +#define GPIO_OSPEEDER_OSPEED7_Pos GPIO_OSPEEDR_OSPEED7_Pos +#define GPIO_OSPEEDER_OSPEED7_Msk GPIO_OSPEEDR_OSPEED7_Msk +#define GPIO_OSPEEDER_OSPEED7 GPIO_OSPEEDR_OSPEED7 +#define GPIO_OSPEEDER_OSPEED7_0 GPIO_OSPEEDR_OSPEED7_0 +#define GPIO_OSPEEDER_OSPEED7_1 GPIO_OSPEEDR_OSPEED7_1 +#define GPIO_OSPEEDER_OSPEED8_Pos GPIO_OSPEEDR_OSPEED8_Pos +#define GPIO_OSPEEDER_OSPEED8_Msk GPIO_OSPEEDR_OSPEED8_Msk +#define GPIO_OSPEEDER_OSPEED8 GPIO_OSPEEDR_OSPEED8 +#define GPIO_OSPEEDER_OSPEED8_0 GPIO_OSPEEDR_OSPEED8_0 +#define GPIO_OSPEEDER_OSPEED8_1 GPIO_OSPEEDR_OSPEED8_1 +#define GPIO_OSPEEDER_OSPEED9_Pos GPIO_OSPEEDR_OSPEED9_Pos +#define GPIO_OSPEEDER_OSPEED9_Msk GPIO_OSPEEDR_OSPEED9_Msk +#define GPIO_OSPEEDER_OSPEED9 GPIO_OSPEEDR_OSPEED9 +#define GPIO_OSPEEDER_OSPEED9_0 GPIO_OSPEEDR_OSPEED9_0 +#define GPIO_OSPEEDER_OSPEED9_1 GPIO_OSPEEDR_OSPEED9_1 +#define GPIO_OSPEEDER_OSPEED10_Pos GPIO_OSPEEDR_OSPEED10_Pos +#define GPIO_OSPEEDER_OSPEED10_Msk GPIO_OSPEEDR_OSPEED10_Msk +#define GPIO_OSPEEDER_OSPEED10 GPIO_OSPEEDR_OSPEED10 +#define GPIO_OSPEEDER_OSPEED10_0 GPIO_OSPEEDR_OSPEED10_0 +#define GPIO_OSPEEDER_OSPEED10_1 GPIO_OSPEEDR_OSPEED10_1 +#define GPIO_OSPEEDER_OSPEED11_Pos GPIO_OSPEEDR_OSPEED11_Pos +#define GPIO_OSPEEDER_OSPEED11_Msk GPIO_OSPEEDR_OSPEED11_Msk +#define GPIO_OSPEEDER_OSPEED11 GPIO_OSPEEDR_OSPEED11 +#define GPIO_OSPEEDER_OSPEED11_0 GPIO_OSPEEDR_OSPEED11_0 +#define GPIO_OSPEEDER_OSPEED11_1 GPIO_OSPEEDR_OSPEED11_1 +#define GPIO_OSPEEDER_OSPEED12_Pos GPIO_OSPEEDR_OSPEED12_Pos +#define GPIO_OSPEEDER_OSPEED12_Msk GPIO_OSPEEDR_OSPEED12_Msk +#define GPIO_OSPEEDER_OSPEED12 GPIO_OSPEEDR_OSPEED12 +#define GPIO_OSPEEDER_OSPEED12_0 GPIO_OSPEEDR_OSPEED12_0 +#define GPIO_OSPEEDER_OSPEED12_1 GPIO_OSPEEDR_OSPEED12_1 +#define GPIO_OSPEEDER_OSPEED13_Pos GPIO_OSPEEDR_OSPEED13_Pos +#define GPIO_OSPEEDER_OSPEED13_Msk GPIO_OSPEEDR_OSPEED13_Msk +#define GPIO_OSPEEDER_OSPEED13 GPIO_OSPEEDR_OSPEED13 +#define GPIO_OSPEEDER_OSPEED13_0 GPIO_OSPEEDR_OSPEED13_0 +#define GPIO_OSPEEDER_OSPEED13_1 GPIO_OSPEEDR_OSPEED13_1 +#define GPIO_OSPEEDER_OSPEED14_Pos GPIO_OSPEEDR_OSPEED14_Pos +#define GPIO_OSPEEDER_OSPEED14_Msk GPIO_OSPEEDR_OSPEED14_Msk +#define GPIO_OSPEEDER_OSPEED14 GPIO_OSPEEDR_OSPEED14 +#define GPIO_OSPEEDER_OSPEED14_0 GPIO_OSPEEDR_OSPEED14_0 +#define GPIO_OSPEEDER_OSPEED14_1 GPIO_OSPEEDR_OSPEED14_1 +#define GPIO_OSPEEDER_OSPEED15_Pos GPIO_OSPEEDR_OSPEED15_Pos +#define GPIO_OSPEEDER_OSPEED15_Msk GPIO_OSPEEDR_OSPEED15_Msk +#define GPIO_OSPEEDER_OSPEED15 GPIO_OSPEEDR_OSPEED15 +#define GPIO_OSPEEDER_OSPEED15_0 GPIO_OSPEEDR_OSPEED15_0 +#define GPIO_OSPEEDER_OSPEED15_1 GPIO_OSPEEDR_OSPEED15_1 /******************* Bit definition for GPIO_PUPDR register ******************/ #define GPIO_PUPDR_PUPD0_Pos (0U) diff --git a/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l082xx.h b/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l082xx.h index 5a1b61eaf8..d2b70e8652 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l082xx.h +++ b/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l082xx.h @@ -2760,86 +2760,168 @@ typedef struct #define GPIO_OTYPER_OT_15 (0x00008000U) /**************** Bit definition for GPIO_OSPEEDR register ******************/ -#define GPIO_OSPEEDER_OSPEED0_Pos (0U) -#define GPIO_OSPEEDER_OSPEED0_Msk (0x3UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000003 */ -#define GPIO_OSPEEDER_OSPEED0 GPIO_OSPEEDER_OSPEED0_Msk -#define GPIO_OSPEEDER_OSPEED0_0 (0x1UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000001 */ -#define GPIO_OSPEEDER_OSPEED0_1 (0x2UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000002 */ -#define GPIO_OSPEEDER_OSPEED1_Pos (2U) -#define GPIO_OSPEEDER_OSPEED1_Msk (0x3UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x0000000C */ -#define GPIO_OSPEEDER_OSPEED1 GPIO_OSPEEDER_OSPEED1_Msk -#define GPIO_OSPEEDER_OSPEED1_0 (0x1UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x00000004 */ -#define GPIO_OSPEEDER_OSPEED1_1 (0x2UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x00000008 */ -#define GPIO_OSPEEDER_OSPEED2_Pos (4U) -#define GPIO_OSPEEDER_OSPEED2_Msk (0x3UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000030 */ -#define GPIO_OSPEEDER_OSPEED2 GPIO_OSPEEDER_OSPEED2_Msk -#define GPIO_OSPEEDER_OSPEED2_0 (0x1UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000010 */ -#define GPIO_OSPEEDER_OSPEED2_1 (0x2UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000020 */ -#define GPIO_OSPEEDER_OSPEED3_Pos (6U) -#define GPIO_OSPEEDER_OSPEED3_Msk (0x3UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x000000C0 */ -#define GPIO_OSPEEDER_OSPEED3 GPIO_OSPEEDER_OSPEED3_Msk -#define GPIO_OSPEEDER_OSPEED3_0 (0x1UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x00000040 */ -#define GPIO_OSPEEDER_OSPEED3_1 (0x2UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x00000080 */ -#define GPIO_OSPEEDER_OSPEED4_Pos (8U) -#define GPIO_OSPEEDER_OSPEED4_Msk (0x3UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000300 */ -#define GPIO_OSPEEDER_OSPEED4 GPIO_OSPEEDER_OSPEED4_Msk -#define GPIO_OSPEEDER_OSPEED4_0 (0x1UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000100 */ -#define GPIO_OSPEEDER_OSPEED4_1 (0x2UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000200 */ -#define GPIO_OSPEEDER_OSPEED5_Pos (10U) -#define GPIO_OSPEEDER_OSPEED5_Msk (0x3UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000C00 */ -#define GPIO_OSPEEDER_OSPEED5 GPIO_OSPEEDER_OSPEED5_Msk -#define GPIO_OSPEEDER_OSPEED5_0 (0x1UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000400 */ -#define GPIO_OSPEEDER_OSPEED5_1 (0x2UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000800 */ -#define GPIO_OSPEEDER_OSPEED6_Pos (12U) -#define GPIO_OSPEEDER_OSPEED6_Msk (0x3UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00003000 */ -#define GPIO_OSPEEDER_OSPEED6 GPIO_OSPEEDER_OSPEED6_Msk -#define GPIO_OSPEEDER_OSPEED6_0 (0x1UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00001000 */ -#define GPIO_OSPEEDER_OSPEED6_1 (0x2UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00002000 */ -#define GPIO_OSPEEDER_OSPEED7_Pos (14U) -#define GPIO_OSPEEDER_OSPEED7_Msk (0x3UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x0000C000 */ -#define GPIO_OSPEEDER_OSPEED7 GPIO_OSPEEDER_OSPEED7_Msk -#define GPIO_OSPEEDER_OSPEED7_0 (0x1UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x00004000 */ -#define GPIO_OSPEEDER_OSPEED7_1 (0x2UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x00008000 */ -#define GPIO_OSPEEDER_OSPEED8_Pos (16U) -#define GPIO_OSPEEDER_OSPEED8_Msk (0x3UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00030000 */ -#define GPIO_OSPEEDER_OSPEED8 GPIO_OSPEEDER_OSPEED8_Msk -#define GPIO_OSPEEDER_OSPEED8_0 (0x1UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00010000 */ -#define GPIO_OSPEEDER_OSPEED8_1 (0x2UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00020000 */ -#define GPIO_OSPEEDER_OSPEED9_Pos (18U) -#define GPIO_OSPEEDER_OSPEED9_Msk (0x3UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x000C0000 */ -#define GPIO_OSPEEDER_OSPEED9 GPIO_OSPEEDER_OSPEED9_Msk -#define GPIO_OSPEEDER_OSPEED9_0 (0x1UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x00040000 */ -#define GPIO_OSPEEDER_OSPEED9_1 (0x2UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x00080000 */ -#define GPIO_OSPEEDER_OSPEED10_Pos (20U) -#define GPIO_OSPEEDER_OSPEED10_Msk (0x3UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00300000 */ -#define GPIO_OSPEEDER_OSPEED10 GPIO_OSPEEDER_OSPEED10_Msk -#define GPIO_OSPEEDER_OSPEED10_0 (0x1UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00100000 */ -#define GPIO_OSPEEDER_OSPEED10_1 (0x2UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00200000 */ -#define GPIO_OSPEEDER_OSPEED11_Pos (22U) -#define GPIO_OSPEEDER_OSPEED11_Msk (0x3UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00C00000 */ -#define GPIO_OSPEEDER_OSPEED11 GPIO_OSPEEDER_OSPEED11_Msk -#define GPIO_OSPEEDER_OSPEED11_0 (0x1UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00400000 */ -#define GPIO_OSPEEDER_OSPEED11_1 (0x2UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00800000 */ -#define GPIO_OSPEEDER_OSPEED12_Pos (24U) -#define GPIO_OSPEEDER_OSPEED12_Msk (0x3UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x03000000 */ -#define GPIO_OSPEEDER_OSPEED12 GPIO_OSPEEDER_OSPEED12_Msk -#define GPIO_OSPEEDER_OSPEED12_0 (0x1UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x01000000 */ -#define GPIO_OSPEEDER_OSPEED12_1 (0x2UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x02000000 */ -#define GPIO_OSPEEDER_OSPEED13_Pos (26U) -#define GPIO_OSPEEDER_OSPEED13_Msk (0x3UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x0C000000 */ -#define GPIO_OSPEEDER_OSPEED13 GPIO_OSPEEDER_OSPEED13_Msk -#define GPIO_OSPEEDER_OSPEED13_0 (0x1UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x04000000 */ -#define GPIO_OSPEEDER_OSPEED13_1 (0x2UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x08000000 */ -#define GPIO_OSPEEDER_OSPEED14_Pos (28U) -#define GPIO_OSPEEDER_OSPEED14_Msk (0x3UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x30000000 */ -#define GPIO_OSPEEDER_OSPEED14 GPIO_OSPEEDER_OSPEED14_Msk -#define GPIO_OSPEEDER_OSPEED14_0 (0x1UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x10000000 */ -#define GPIO_OSPEEDER_OSPEED14_1 (0x2UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x20000000 */ -#define GPIO_OSPEEDER_OSPEED15_Pos (30U) -#define GPIO_OSPEEDER_OSPEED15_Msk (0x3UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0xC0000000 */ -#define GPIO_OSPEEDER_OSPEED15 GPIO_OSPEEDER_OSPEED15_Msk -#define GPIO_OSPEEDER_OSPEED15_0 (0x1UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0x40000000 */ -#define GPIO_OSPEEDER_OSPEED15_1 (0x2UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0x80000000 */ +#define GPIO_OSPEEDR_OSPEED0_Pos (0U) +#define GPIO_OSPEEDR_OSPEED0_Msk (0x3UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000003 */ +#define GPIO_OSPEEDR_OSPEED0 GPIO_OSPEEDR_OSPEED0_Msk +#define GPIO_OSPEEDR_OSPEED0_0 (0x1UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000001 */ +#define GPIO_OSPEEDR_OSPEED0_1 (0x2UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000002 */ +#define GPIO_OSPEEDR_OSPEED1_Pos (2U) +#define GPIO_OSPEEDR_OSPEED1_Msk (0x3UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x0000000C */ +#define GPIO_OSPEEDR_OSPEED1 GPIO_OSPEEDR_OSPEED1_Msk +#define GPIO_OSPEEDR_OSPEED1_0 (0x1UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x00000004 */ +#define GPIO_OSPEEDR_OSPEED1_1 (0x2UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x00000008 */ +#define GPIO_OSPEEDR_OSPEED2_Pos (4U) +#define GPIO_OSPEEDR_OSPEED2_Msk (0x3UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000030 */ +#define GPIO_OSPEEDR_OSPEED2 GPIO_OSPEEDR_OSPEED2_Msk +#define GPIO_OSPEEDR_OSPEED2_0 (0x1UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000010 */ +#define GPIO_OSPEEDR_OSPEED2_1 (0x2UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000020 */ +#define GPIO_OSPEEDR_OSPEED3_Pos (6U) +#define GPIO_OSPEEDR_OSPEED3_Msk (0x3UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x000000C0 */ +#define GPIO_OSPEEDR_OSPEED3 GPIO_OSPEEDR_OSPEED3_Msk +#define GPIO_OSPEEDR_OSPEED3_0 (0x1UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x00000040 */ +#define GPIO_OSPEEDR_OSPEED3_1 (0x2UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x00000080 */ +#define GPIO_OSPEEDR_OSPEED4_Pos (8U) +#define GPIO_OSPEEDR_OSPEED4_Msk (0x3UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000300 */ +#define GPIO_OSPEEDR_OSPEED4 GPIO_OSPEEDR_OSPEED4_Msk +#define GPIO_OSPEEDR_OSPEED4_0 (0x1UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000100 */ +#define GPIO_OSPEEDR_OSPEED4_1 (0x2UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000200 */ +#define GPIO_OSPEEDR_OSPEED5_Pos (10U) +#define GPIO_OSPEEDR_OSPEED5_Msk (0x3UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000C00 */ +#define GPIO_OSPEEDR_OSPEED5 GPIO_OSPEEDR_OSPEED5_Msk +#define GPIO_OSPEEDR_OSPEED5_0 (0x1UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000400 */ +#define GPIO_OSPEEDR_OSPEED5_1 (0x2UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000800 */ +#define GPIO_OSPEEDR_OSPEED6_Pos (12U) +#define GPIO_OSPEEDR_OSPEED6_Msk (0x3UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00003000 */ +#define GPIO_OSPEEDR_OSPEED6 GPIO_OSPEEDR_OSPEED6_Msk +#define GPIO_OSPEEDR_OSPEED6_0 (0x1UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00001000 */ +#define GPIO_OSPEEDR_OSPEED6_1 (0x2UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00002000 */ +#define GPIO_OSPEEDR_OSPEED7_Pos (14U) +#define GPIO_OSPEEDR_OSPEED7_Msk (0x3UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x0000C000 */ +#define GPIO_OSPEEDR_OSPEED7 GPIO_OSPEEDR_OSPEED7_Msk +#define GPIO_OSPEEDR_OSPEED7_0 (0x1UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x00004000 */ +#define GPIO_OSPEEDR_OSPEED7_1 (0x2UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x00008000 */ +#define GPIO_OSPEEDR_OSPEED8_Pos (16U) +#define GPIO_OSPEEDR_OSPEED8_Msk (0x3UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00030000 */ +#define GPIO_OSPEEDR_OSPEED8 GPIO_OSPEEDR_OSPEED8_Msk +#define GPIO_OSPEEDR_OSPEED8_0 (0x1UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00010000 */ +#define GPIO_OSPEEDR_OSPEED8_1 (0x2UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00020000 */ +#define GPIO_OSPEEDR_OSPEED9_Pos (18U) +#define GPIO_OSPEEDR_OSPEED9_Msk (0x3UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x000C0000 */ +#define GPIO_OSPEEDR_OSPEED9 GPIO_OSPEEDR_OSPEED9_Msk +#define GPIO_OSPEEDR_OSPEED9_0 (0x1UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x00040000 */ +#define GPIO_OSPEEDR_OSPEED9_1 (0x2UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x00080000 */ +#define GPIO_OSPEEDR_OSPEED10_Pos (20U) +#define GPIO_OSPEEDR_OSPEED10_Msk (0x3UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00300000 */ +#define GPIO_OSPEEDR_OSPEED10 GPIO_OSPEEDR_OSPEED10_Msk +#define GPIO_OSPEEDR_OSPEED10_0 (0x1UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00100000 */ +#define GPIO_OSPEEDR_OSPEED10_1 (0x2UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00200000 */ +#define GPIO_OSPEEDR_OSPEED11_Pos (22U) +#define GPIO_OSPEEDR_OSPEED11_Msk (0x3UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00C00000 */ +#define GPIO_OSPEEDR_OSPEED11 GPIO_OSPEEDR_OSPEED11_Msk +#define GPIO_OSPEEDR_OSPEED11_0 (0x1UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00400000 */ +#define GPIO_OSPEEDR_OSPEED11_1 (0x2UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00800000 */ +#define GPIO_OSPEEDR_OSPEED12_Pos (24U) +#define GPIO_OSPEEDR_OSPEED12_Msk (0x3UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x03000000 */ +#define GPIO_OSPEEDR_OSPEED12 GPIO_OSPEEDR_OSPEED12_Msk +#define GPIO_OSPEEDR_OSPEED12_0 (0x1UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x01000000 */ +#define GPIO_OSPEEDR_OSPEED12_1 (0x2UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x02000000 */ +#define GPIO_OSPEEDR_OSPEED13_Pos (26U) +#define GPIO_OSPEEDR_OSPEED13_Msk (0x3UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x0C000000 */ +#define GPIO_OSPEEDR_OSPEED13 GPIO_OSPEEDR_OSPEED13_Msk +#define GPIO_OSPEEDR_OSPEED13_0 (0x1UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x04000000 */ +#define GPIO_OSPEEDR_OSPEED13_1 (0x2UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x08000000 */ +#define GPIO_OSPEEDR_OSPEED14_Pos (28U) +#define GPIO_OSPEEDR_OSPEED14_Msk (0x3UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x30000000 */ +#define GPIO_OSPEEDR_OSPEED14 GPIO_OSPEEDR_OSPEED14_Msk +#define GPIO_OSPEEDR_OSPEED14_0 (0x1UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x10000000 */ +#define GPIO_OSPEEDR_OSPEED14_1 (0x2UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x20000000 */ +#define GPIO_OSPEEDR_OSPEED15_Pos (30U) +#define GPIO_OSPEEDR_OSPEED15_Msk (0x3UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0xC0000000 */ +#define GPIO_OSPEEDR_OSPEED15 GPIO_OSPEEDR_OSPEED15_Msk +#define GPIO_OSPEEDR_OSPEED15_0 (0x1UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0x40000000 */ +#define GPIO_OSPEEDR_OSPEED15_1 (0x2UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0x80000000 */ + +/* Legacy defines */ +#define GPIO_OSPEEDER_OSPEED0_Pos GPIO_OSPEEDR_OSPEED0_Pos +#define GPIO_OSPEEDER_OSPEED0_Msk GPIO_OSPEEDR_OSPEED0_Msk +#define GPIO_OSPEEDER_OSPEED0 GPIO_OSPEEDR_OSPEED0 +#define GPIO_OSPEEDER_OSPEED0_0 GPIO_OSPEEDR_OSPEED0_0 +#define GPIO_OSPEEDER_OSPEED0_1 GPIO_OSPEEDR_OSPEED0_1 +#define GPIO_OSPEEDER_OSPEED1_Pos GPIO_OSPEEDR_OSPEED1_Pos +#define GPIO_OSPEEDER_OSPEED1_Msk GPIO_OSPEEDR_OSPEED1_Msk +#define GPIO_OSPEEDER_OSPEED1 GPIO_OSPEEDR_OSPEED1 +#define GPIO_OSPEEDER_OSPEED1_0 GPIO_OSPEEDR_OSPEED1_0 +#define GPIO_OSPEEDER_OSPEED1_1 GPIO_OSPEEDR_OSPEED1_1 +#define GPIO_OSPEEDER_OSPEED2_Pos GPIO_OSPEEDR_OSPEED2_Pos +#define GPIO_OSPEEDER_OSPEED2_Msk GPIO_OSPEEDR_OSPEED2_Msk +#define GPIO_OSPEEDER_OSPEED2 GPIO_OSPEEDR_OSPEED2 +#define GPIO_OSPEEDER_OSPEED2_0 GPIO_OSPEEDR_OSPEED2_0 +#define GPIO_OSPEEDER_OSPEED2_1 GPIO_OSPEEDR_OSPEED2_1 +#define GPIO_OSPEEDER_OSPEED3_Pos GPIO_OSPEEDR_OSPEED3_Pos +#define GPIO_OSPEEDER_OSPEED3_Msk GPIO_OSPEEDR_OSPEED3_Msk +#define GPIO_OSPEEDER_OSPEED3 GPIO_OSPEEDR_OSPEED3 +#define GPIO_OSPEEDER_OSPEED3_0 GPIO_OSPEEDR_OSPEED3_0 +#define GPIO_OSPEEDER_OSPEED3_1 GPIO_OSPEEDR_OSPEED3_1 +#define GPIO_OSPEEDER_OSPEED4_Pos GPIO_OSPEEDR_OSPEED4_Pos +#define GPIO_OSPEEDER_OSPEED4_Msk GPIO_OSPEEDR_OSPEED4_Msk +#define GPIO_OSPEEDER_OSPEED4 GPIO_OSPEEDR_OSPEED4 +#define GPIO_OSPEEDER_OSPEED4_0 GPIO_OSPEEDR_OSPEED4_0 +#define GPIO_OSPEEDER_OSPEED4_1 GPIO_OSPEEDR_OSPEED4_1 +#define GPIO_OSPEEDER_OSPEED5_Pos GPIO_OSPEEDR_OSPEED5_Pos +#define GPIO_OSPEEDER_OSPEED5_Msk GPIO_OSPEEDR_OSPEED5_Msk +#define GPIO_OSPEEDER_OSPEED5 GPIO_OSPEEDR_OSPEED5 +#define GPIO_OSPEEDER_OSPEED5_0 GPIO_OSPEEDR_OSPEED5_0 +#define GPIO_OSPEEDER_OSPEED5_1 GPIO_OSPEEDR_OSPEED5_1 +#define GPIO_OSPEEDER_OSPEED6_Pos GPIO_OSPEEDR_OSPEED6_Pos +#define GPIO_OSPEEDER_OSPEED6_Msk GPIO_OSPEEDR_OSPEED6_Msk +#define GPIO_OSPEEDER_OSPEED6 GPIO_OSPEEDR_OSPEED6 +#define GPIO_OSPEEDER_OSPEED6_0 GPIO_OSPEEDR_OSPEED6_0 +#define GPIO_OSPEEDER_OSPEED6_1 GPIO_OSPEEDR_OSPEED6_1 +#define GPIO_OSPEEDER_OSPEED7_Pos GPIO_OSPEEDR_OSPEED7_Pos +#define GPIO_OSPEEDER_OSPEED7_Msk GPIO_OSPEEDR_OSPEED7_Msk +#define GPIO_OSPEEDER_OSPEED7 GPIO_OSPEEDR_OSPEED7 +#define GPIO_OSPEEDER_OSPEED7_0 GPIO_OSPEEDR_OSPEED7_0 +#define GPIO_OSPEEDER_OSPEED7_1 GPIO_OSPEEDR_OSPEED7_1 +#define GPIO_OSPEEDER_OSPEED8_Pos GPIO_OSPEEDR_OSPEED8_Pos +#define GPIO_OSPEEDER_OSPEED8_Msk GPIO_OSPEEDR_OSPEED8_Msk +#define GPIO_OSPEEDER_OSPEED8 GPIO_OSPEEDR_OSPEED8 +#define GPIO_OSPEEDER_OSPEED8_0 GPIO_OSPEEDR_OSPEED8_0 +#define GPIO_OSPEEDER_OSPEED8_1 GPIO_OSPEEDR_OSPEED8_1 +#define GPIO_OSPEEDER_OSPEED9_Pos GPIO_OSPEEDR_OSPEED9_Pos +#define GPIO_OSPEEDER_OSPEED9_Msk GPIO_OSPEEDR_OSPEED9_Msk +#define GPIO_OSPEEDER_OSPEED9 GPIO_OSPEEDR_OSPEED9 +#define GPIO_OSPEEDER_OSPEED9_0 GPIO_OSPEEDR_OSPEED9_0 +#define GPIO_OSPEEDER_OSPEED9_1 GPIO_OSPEEDR_OSPEED9_1 +#define GPIO_OSPEEDER_OSPEED10_Pos GPIO_OSPEEDR_OSPEED10_Pos +#define GPIO_OSPEEDER_OSPEED10_Msk GPIO_OSPEEDR_OSPEED10_Msk +#define GPIO_OSPEEDER_OSPEED10 GPIO_OSPEEDR_OSPEED10 +#define GPIO_OSPEEDER_OSPEED10_0 GPIO_OSPEEDR_OSPEED10_0 +#define GPIO_OSPEEDER_OSPEED10_1 GPIO_OSPEEDR_OSPEED10_1 +#define GPIO_OSPEEDER_OSPEED11_Pos GPIO_OSPEEDR_OSPEED11_Pos +#define GPIO_OSPEEDER_OSPEED11_Msk GPIO_OSPEEDR_OSPEED11_Msk +#define GPIO_OSPEEDER_OSPEED11 GPIO_OSPEEDR_OSPEED11 +#define GPIO_OSPEEDER_OSPEED11_0 GPIO_OSPEEDR_OSPEED11_0 +#define GPIO_OSPEEDER_OSPEED11_1 GPIO_OSPEEDR_OSPEED11_1 +#define GPIO_OSPEEDER_OSPEED12_Pos GPIO_OSPEEDR_OSPEED12_Pos +#define GPIO_OSPEEDER_OSPEED12_Msk GPIO_OSPEEDR_OSPEED12_Msk +#define GPIO_OSPEEDER_OSPEED12 GPIO_OSPEEDR_OSPEED12 +#define GPIO_OSPEEDER_OSPEED12_0 GPIO_OSPEEDR_OSPEED12_0 +#define GPIO_OSPEEDER_OSPEED12_1 GPIO_OSPEEDR_OSPEED12_1 +#define GPIO_OSPEEDER_OSPEED13_Pos GPIO_OSPEEDR_OSPEED13_Pos +#define GPIO_OSPEEDER_OSPEED13_Msk GPIO_OSPEEDR_OSPEED13_Msk +#define GPIO_OSPEEDER_OSPEED13 GPIO_OSPEEDR_OSPEED13 +#define GPIO_OSPEEDER_OSPEED13_0 GPIO_OSPEEDR_OSPEED13_0 +#define GPIO_OSPEEDER_OSPEED13_1 GPIO_OSPEEDR_OSPEED13_1 +#define GPIO_OSPEEDER_OSPEED14_Pos GPIO_OSPEEDR_OSPEED14_Pos +#define GPIO_OSPEEDER_OSPEED14_Msk GPIO_OSPEEDR_OSPEED14_Msk +#define GPIO_OSPEEDER_OSPEED14 GPIO_OSPEEDR_OSPEED14 +#define GPIO_OSPEEDER_OSPEED14_0 GPIO_OSPEEDR_OSPEED14_0 +#define GPIO_OSPEEDER_OSPEED14_1 GPIO_OSPEEDR_OSPEED14_1 +#define GPIO_OSPEEDER_OSPEED15_Pos GPIO_OSPEEDR_OSPEED15_Pos +#define GPIO_OSPEEDER_OSPEED15_Msk GPIO_OSPEEDR_OSPEED15_Msk +#define GPIO_OSPEEDER_OSPEED15 GPIO_OSPEEDR_OSPEED15 +#define GPIO_OSPEEDER_OSPEED15_0 GPIO_OSPEEDR_OSPEED15_0 +#define GPIO_OSPEEDER_OSPEED15_1 GPIO_OSPEEDR_OSPEED15_1 /******************* Bit definition for GPIO_PUPDR register ******************/ #define GPIO_PUPDR_PUPD0_Pos (0U) diff --git a/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l083xx.h b/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l083xx.h index 1bbc635359..cdb103ad74 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l083xx.h +++ b/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l083xx.h @@ -2782,86 +2782,168 @@ typedef struct #define GPIO_OTYPER_OT_15 (0x00008000U) /**************** Bit definition for GPIO_OSPEEDR register ******************/ -#define GPIO_OSPEEDER_OSPEED0_Pos (0U) -#define GPIO_OSPEEDER_OSPEED0_Msk (0x3UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000003 */ -#define GPIO_OSPEEDER_OSPEED0 GPIO_OSPEEDER_OSPEED0_Msk -#define GPIO_OSPEEDER_OSPEED0_0 (0x1UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000001 */ -#define GPIO_OSPEEDER_OSPEED0_1 (0x2UL << GPIO_OSPEEDER_OSPEED0_Pos) /*!< 0x00000002 */ -#define GPIO_OSPEEDER_OSPEED1_Pos (2U) -#define GPIO_OSPEEDER_OSPEED1_Msk (0x3UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x0000000C */ -#define GPIO_OSPEEDER_OSPEED1 GPIO_OSPEEDER_OSPEED1_Msk -#define GPIO_OSPEEDER_OSPEED1_0 (0x1UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x00000004 */ -#define GPIO_OSPEEDER_OSPEED1_1 (0x2UL << GPIO_OSPEEDER_OSPEED1_Pos) /*!< 0x00000008 */ -#define GPIO_OSPEEDER_OSPEED2_Pos (4U) -#define GPIO_OSPEEDER_OSPEED2_Msk (0x3UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000030 */ -#define GPIO_OSPEEDER_OSPEED2 GPIO_OSPEEDER_OSPEED2_Msk -#define GPIO_OSPEEDER_OSPEED2_0 (0x1UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000010 */ -#define GPIO_OSPEEDER_OSPEED2_1 (0x2UL << GPIO_OSPEEDER_OSPEED2_Pos) /*!< 0x00000020 */ -#define GPIO_OSPEEDER_OSPEED3_Pos (6U) -#define GPIO_OSPEEDER_OSPEED3_Msk (0x3UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x000000C0 */ -#define GPIO_OSPEEDER_OSPEED3 GPIO_OSPEEDER_OSPEED3_Msk -#define GPIO_OSPEEDER_OSPEED3_0 (0x1UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x00000040 */ -#define GPIO_OSPEEDER_OSPEED3_1 (0x2UL << GPIO_OSPEEDER_OSPEED3_Pos) /*!< 0x00000080 */ -#define GPIO_OSPEEDER_OSPEED4_Pos (8U) -#define GPIO_OSPEEDER_OSPEED4_Msk (0x3UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000300 */ -#define GPIO_OSPEEDER_OSPEED4 GPIO_OSPEEDER_OSPEED4_Msk -#define GPIO_OSPEEDER_OSPEED4_0 (0x1UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000100 */ -#define GPIO_OSPEEDER_OSPEED4_1 (0x2UL << GPIO_OSPEEDER_OSPEED4_Pos) /*!< 0x00000200 */ -#define GPIO_OSPEEDER_OSPEED5_Pos (10U) -#define GPIO_OSPEEDER_OSPEED5_Msk (0x3UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000C00 */ -#define GPIO_OSPEEDER_OSPEED5 GPIO_OSPEEDER_OSPEED5_Msk -#define GPIO_OSPEEDER_OSPEED5_0 (0x1UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000400 */ -#define GPIO_OSPEEDER_OSPEED5_1 (0x2UL << GPIO_OSPEEDER_OSPEED5_Pos) /*!< 0x00000800 */ -#define GPIO_OSPEEDER_OSPEED6_Pos (12U) -#define GPIO_OSPEEDER_OSPEED6_Msk (0x3UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00003000 */ -#define GPIO_OSPEEDER_OSPEED6 GPIO_OSPEEDER_OSPEED6_Msk -#define GPIO_OSPEEDER_OSPEED6_0 (0x1UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00001000 */ -#define GPIO_OSPEEDER_OSPEED6_1 (0x2UL << GPIO_OSPEEDER_OSPEED6_Pos) /*!< 0x00002000 */ -#define GPIO_OSPEEDER_OSPEED7_Pos (14U) -#define GPIO_OSPEEDER_OSPEED7_Msk (0x3UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x0000C000 */ -#define GPIO_OSPEEDER_OSPEED7 GPIO_OSPEEDER_OSPEED7_Msk -#define GPIO_OSPEEDER_OSPEED7_0 (0x1UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x00004000 */ -#define GPIO_OSPEEDER_OSPEED7_1 (0x2UL << GPIO_OSPEEDER_OSPEED7_Pos) /*!< 0x00008000 */ -#define GPIO_OSPEEDER_OSPEED8_Pos (16U) -#define GPIO_OSPEEDER_OSPEED8_Msk (0x3UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00030000 */ -#define GPIO_OSPEEDER_OSPEED8 GPIO_OSPEEDER_OSPEED8_Msk -#define GPIO_OSPEEDER_OSPEED8_0 (0x1UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00010000 */ -#define GPIO_OSPEEDER_OSPEED8_1 (0x2UL << GPIO_OSPEEDER_OSPEED8_Pos) /*!< 0x00020000 */ -#define GPIO_OSPEEDER_OSPEED9_Pos (18U) -#define GPIO_OSPEEDER_OSPEED9_Msk (0x3UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x000C0000 */ -#define GPIO_OSPEEDER_OSPEED9 GPIO_OSPEEDER_OSPEED9_Msk -#define GPIO_OSPEEDER_OSPEED9_0 (0x1UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x00040000 */ -#define GPIO_OSPEEDER_OSPEED9_1 (0x2UL << GPIO_OSPEEDER_OSPEED9_Pos) /*!< 0x00080000 */ -#define GPIO_OSPEEDER_OSPEED10_Pos (20U) -#define GPIO_OSPEEDER_OSPEED10_Msk (0x3UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00300000 */ -#define GPIO_OSPEEDER_OSPEED10 GPIO_OSPEEDER_OSPEED10_Msk -#define GPIO_OSPEEDER_OSPEED10_0 (0x1UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00100000 */ -#define GPIO_OSPEEDER_OSPEED10_1 (0x2UL << GPIO_OSPEEDER_OSPEED10_Pos) /*!< 0x00200000 */ -#define GPIO_OSPEEDER_OSPEED11_Pos (22U) -#define GPIO_OSPEEDER_OSPEED11_Msk (0x3UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00C00000 */ -#define GPIO_OSPEEDER_OSPEED11 GPIO_OSPEEDER_OSPEED11_Msk -#define GPIO_OSPEEDER_OSPEED11_0 (0x1UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00400000 */ -#define GPIO_OSPEEDER_OSPEED11_1 (0x2UL << GPIO_OSPEEDER_OSPEED11_Pos) /*!< 0x00800000 */ -#define GPIO_OSPEEDER_OSPEED12_Pos (24U) -#define GPIO_OSPEEDER_OSPEED12_Msk (0x3UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x03000000 */ -#define GPIO_OSPEEDER_OSPEED12 GPIO_OSPEEDER_OSPEED12_Msk -#define GPIO_OSPEEDER_OSPEED12_0 (0x1UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x01000000 */ -#define GPIO_OSPEEDER_OSPEED12_1 (0x2UL << GPIO_OSPEEDER_OSPEED12_Pos) /*!< 0x02000000 */ -#define GPIO_OSPEEDER_OSPEED13_Pos (26U) -#define GPIO_OSPEEDER_OSPEED13_Msk (0x3UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x0C000000 */ -#define GPIO_OSPEEDER_OSPEED13 GPIO_OSPEEDER_OSPEED13_Msk -#define GPIO_OSPEEDER_OSPEED13_0 (0x1UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x04000000 */ -#define GPIO_OSPEEDER_OSPEED13_1 (0x2UL << GPIO_OSPEEDER_OSPEED13_Pos) /*!< 0x08000000 */ -#define GPIO_OSPEEDER_OSPEED14_Pos (28U) -#define GPIO_OSPEEDER_OSPEED14_Msk (0x3UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x30000000 */ -#define GPIO_OSPEEDER_OSPEED14 GPIO_OSPEEDER_OSPEED14_Msk -#define GPIO_OSPEEDER_OSPEED14_0 (0x1UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x10000000 */ -#define GPIO_OSPEEDER_OSPEED14_1 (0x2UL << GPIO_OSPEEDER_OSPEED14_Pos) /*!< 0x20000000 */ -#define GPIO_OSPEEDER_OSPEED15_Pos (30U) -#define GPIO_OSPEEDER_OSPEED15_Msk (0x3UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0xC0000000 */ -#define GPIO_OSPEEDER_OSPEED15 GPIO_OSPEEDER_OSPEED15_Msk -#define GPIO_OSPEEDER_OSPEED15_0 (0x1UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0x40000000 */ -#define GPIO_OSPEEDER_OSPEED15_1 (0x2UL << GPIO_OSPEEDER_OSPEED15_Pos) /*!< 0x80000000 */ +#define GPIO_OSPEEDR_OSPEED0_Pos (0U) +#define GPIO_OSPEEDR_OSPEED0_Msk (0x3UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000003 */ +#define GPIO_OSPEEDR_OSPEED0 GPIO_OSPEEDR_OSPEED0_Msk +#define GPIO_OSPEEDR_OSPEED0_0 (0x1UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000001 */ +#define GPIO_OSPEEDR_OSPEED0_1 (0x2UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000002 */ +#define GPIO_OSPEEDR_OSPEED1_Pos (2U) +#define GPIO_OSPEEDR_OSPEED1_Msk (0x3UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x0000000C */ +#define GPIO_OSPEEDR_OSPEED1 GPIO_OSPEEDR_OSPEED1_Msk +#define GPIO_OSPEEDR_OSPEED1_0 (0x1UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x00000004 */ +#define GPIO_OSPEEDR_OSPEED1_1 (0x2UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x00000008 */ +#define GPIO_OSPEEDR_OSPEED2_Pos (4U) +#define GPIO_OSPEEDR_OSPEED2_Msk (0x3UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000030 */ +#define GPIO_OSPEEDR_OSPEED2 GPIO_OSPEEDR_OSPEED2_Msk +#define GPIO_OSPEEDR_OSPEED2_0 (0x1UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000010 */ +#define GPIO_OSPEEDR_OSPEED2_1 (0x2UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000020 */ +#define GPIO_OSPEEDR_OSPEED3_Pos (6U) +#define GPIO_OSPEEDR_OSPEED3_Msk (0x3UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x000000C0 */ +#define GPIO_OSPEEDR_OSPEED3 GPIO_OSPEEDR_OSPEED3_Msk +#define GPIO_OSPEEDR_OSPEED3_0 (0x1UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x00000040 */ +#define GPIO_OSPEEDR_OSPEED3_1 (0x2UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x00000080 */ +#define GPIO_OSPEEDR_OSPEED4_Pos (8U) +#define GPIO_OSPEEDR_OSPEED4_Msk (0x3UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000300 */ +#define GPIO_OSPEEDR_OSPEED4 GPIO_OSPEEDR_OSPEED4_Msk +#define GPIO_OSPEEDR_OSPEED4_0 (0x1UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000100 */ +#define GPIO_OSPEEDR_OSPEED4_1 (0x2UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000200 */ +#define GPIO_OSPEEDR_OSPEED5_Pos (10U) +#define GPIO_OSPEEDR_OSPEED5_Msk (0x3UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000C00 */ +#define GPIO_OSPEEDR_OSPEED5 GPIO_OSPEEDR_OSPEED5_Msk +#define GPIO_OSPEEDR_OSPEED5_0 (0x1UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000400 */ +#define GPIO_OSPEEDR_OSPEED5_1 (0x2UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000800 */ +#define GPIO_OSPEEDR_OSPEED6_Pos (12U) +#define GPIO_OSPEEDR_OSPEED6_Msk (0x3UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00003000 */ +#define GPIO_OSPEEDR_OSPEED6 GPIO_OSPEEDR_OSPEED6_Msk +#define GPIO_OSPEEDR_OSPEED6_0 (0x1UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00001000 */ +#define GPIO_OSPEEDR_OSPEED6_1 (0x2UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00002000 */ +#define GPIO_OSPEEDR_OSPEED7_Pos (14U) +#define GPIO_OSPEEDR_OSPEED7_Msk (0x3UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x0000C000 */ +#define GPIO_OSPEEDR_OSPEED7 GPIO_OSPEEDR_OSPEED7_Msk +#define GPIO_OSPEEDR_OSPEED7_0 (0x1UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x00004000 */ +#define GPIO_OSPEEDR_OSPEED7_1 (0x2UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x00008000 */ +#define GPIO_OSPEEDR_OSPEED8_Pos (16U) +#define GPIO_OSPEEDR_OSPEED8_Msk (0x3UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00030000 */ +#define GPIO_OSPEEDR_OSPEED8 GPIO_OSPEEDR_OSPEED8_Msk +#define GPIO_OSPEEDR_OSPEED8_0 (0x1UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00010000 */ +#define GPIO_OSPEEDR_OSPEED8_1 (0x2UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00020000 */ +#define GPIO_OSPEEDR_OSPEED9_Pos (18U) +#define GPIO_OSPEEDR_OSPEED9_Msk (0x3UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x000C0000 */ +#define GPIO_OSPEEDR_OSPEED9 GPIO_OSPEEDR_OSPEED9_Msk +#define GPIO_OSPEEDR_OSPEED9_0 (0x1UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x00040000 */ +#define GPIO_OSPEEDR_OSPEED9_1 (0x2UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x00080000 */ +#define GPIO_OSPEEDR_OSPEED10_Pos (20U) +#define GPIO_OSPEEDR_OSPEED10_Msk (0x3UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00300000 */ +#define GPIO_OSPEEDR_OSPEED10 GPIO_OSPEEDR_OSPEED10_Msk +#define GPIO_OSPEEDR_OSPEED10_0 (0x1UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00100000 */ +#define GPIO_OSPEEDR_OSPEED10_1 (0x2UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00200000 */ +#define GPIO_OSPEEDR_OSPEED11_Pos (22U) +#define GPIO_OSPEEDR_OSPEED11_Msk (0x3UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00C00000 */ +#define GPIO_OSPEEDR_OSPEED11 GPIO_OSPEEDR_OSPEED11_Msk +#define GPIO_OSPEEDR_OSPEED11_0 (0x1UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00400000 */ +#define GPIO_OSPEEDR_OSPEED11_1 (0x2UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00800000 */ +#define GPIO_OSPEEDR_OSPEED12_Pos (24U) +#define GPIO_OSPEEDR_OSPEED12_Msk (0x3UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x03000000 */ +#define GPIO_OSPEEDR_OSPEED12 GPIO_OSPEEDR_OSPEED12_Msk +#define GPIO_OSPEEDR_OSPEED12_0 (0x1UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x01000000 */ +#define GPIO_OSPEEDR_OSPEED12_1 (0x2UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x02000000 */ +#define GPIO_OSPEEDR_OSPEED13_Pos (26U) +#define GPIO_OSPEEDR_OSPEED13_Msk (0x3UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x0C000000 */ +#define GPIO_OSPEEDR_OSPEED13 GPIO_OSPEEDR_OSPEED13_Msk +#define GPIO_OSPEEDR_OSPEED13_0 (0x1UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x04000000 */ +#define GPIO_OSPEEDR_OSPEED13_1 (0x2UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x08000000 */ +#define GPIO_OSPEEDR_OSPEED14_Pos (28U) +#define GPIO_OSPEEDR_OSPEED14_Msk (0x3UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x30000000 */ +#define GPIO_OSPEEDR_OSPEED14 GPIO_OSPEEDR_OSPEED14_Msk +#define GPIO_OSPEEDR_OSPEED14_0 (0x1UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x10000000 */ +#define GPIO_OSPEEDR_OSPEED14_1 (0x2UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x20000000 */ +#define GPIO_OSPEEDR_OSPEED15_Pos (30U) +#define GPIO_OSPEEDR_OSPEED15_Msk (0x3UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0xC0000000 */ +#define GPIO_OSPEEDR_OSPEED15 GPIO_OSPEEDR_OSPEED15_Msk +#define GPIO_OSPEEDR_OSPEED15_0 (0x1UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0x40000000 */ +#define GPIO_OSPEEDR_OSPEED15_1 (0x2UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0x80000000 */ + +/* Legacy defines */ +#define GPIO_OSPEEDER_OSPEED0_Pos GPIO_OSPEEDR_OSPEED0_Pos +#define GPIO_OSPEEDER_OSPEED0_Msk GPIO_OSPEEDR_OSPEED0_Msk +#define GPIO_OSPEEDER_OSPEED0 GPIO_OSPEEDR_OSPEED0 +#define GPIO_OSPEEDER_OSPEED0_0 GPIO_OSPEEDR_OSPEED0_0 +#define GPIO_OSPEEDER_OSPEED0_1 GPIO_OSPEEDR_OSPEED0_1 +#define GPIO_OSPEEDER_OSPEED1_Pos GPIO_OSPEEDR_OSPEED1_Pos +#define GPIO_OSPEEDER_OSPEED1_Msk GPIO_OSPEEDR_OSPEED1_Msk +#define GPIO_OSPEEDER_OSPEED1 GPIO_OSPEEDR_OSPEED1 +#define GPIO_OSPEEDER_OSPEED1_0 GPIO_OSPEEDR_OSPEED1_0 +#define GPIO_OSPEEDER_OSPEED1_1 GPIO_OSPEEDR_OSPEED1_1 +#define GPIO_OSPEEDER_OSPEED2_Pos GPIO_OSPEEDR_OSPEED2_Pos +#define GPIO_OSPEEDER_OSPEED2_Msk GPIO_OSPEEDR_OSPEED2_Msk +#define GPIO_OSPEEDER_OSPEED2 GPIO_OSPEEDR_OSPEED2 +#define GPIO_OSPEEDER_OSPEED2_0 GPIO_OSPEEDR_OSPEED2_0 +#define GPIO_OSPEEDER_OSPEED2_1 GPIO_OSPEEDR_OSPEED2_1 +#define GPIO_OSPEEDER_OSPEED3_Pos GPIO_OSPEEDR_OSPEED3_Pos +#define GPIO_OSPEEDER_OSPEED3_Msk GPIO_OSPEEDR_OSPEED3_Msk +#define GPIO_OSPEEDER_OSPEED3 GPIO_OSPEEDR_OSPEED3 +#define GPIO_OSPEEDER_OSPEED3_0 GPIO_OSPEEDR_OSPEED3_0 +#define GPIO_OSPEEDER_OSPEED3_1 GPIO_OSPEEDR_OSPEED3_1 +#define GPIO_OSPEEDER_OSPEED4_Pos GPIO_OSPEEDR_OSPEED4_Pos +#define GPIO_OSPEEDER_OSPEED4_Msk GPIO_OSPEEDR_OSPEED4_Msk +#define GPIO_OSPEEDER_OSPEED4 GPIO_OSPEEDR_OSPEED4 +#define GPIO_OSPEEDER_OSPEED4_0 GPIO_OSPEEDR_OSPEED4_0 +#define GPIO_OSPEEDER_OSPEED4_1 GPIO_OSPEEDR_OSPEED4_1 +#define GPIO_OSPEEDER_OSPEED5_Pos GPIO_OSPEEDR_OSPEED5_Pos +#define GPIO_OSPEEDER_OSPEED5_Msk GPIO_OSPEEDR_OSPEED5_Msk +#define GPIO_OSPEEDER_OSPEED5 GPIO_OSPEEDR_OSPEED5 +#define GPIO_OSPEEDER_OSPEED5_0 GPIO_OSPEEDR_OSPEED5_0 +#define GPIO_OSPEEDER_OSPEED5_1 GPIO_OSPEEDR_OSPEED5_1 +#define GPIO_OSPEEDER_OSPEED6_Pos GPIO_OSPEEDR_OSPEED6_Pos +#define GPIO_OSPEEDER_OSPEED6_Msk GPIO_OSPEEDR_OSPEED6_Msk +#define GPIO_OSPEEDER_OSPEED6 GPIO_OSPEEDR_OSPEED6 +#define GPIO_OSPEEDER_OSPEED6_0 GPIO_OSPEEDR_OSPEED6_0 +#define GPIO_OSPEEDER_OSPEED6_1 GPIO_OSPEEDR_OSPEED6_1 +#define GPIO_OSPEEDER_OSPEED7_Pos GPIO_OSPEEDR_OSPEED7_Pos +#define GPIO_OSPEEDER_OSPEED7_Msk GPIO_OSPEEDR_OSPEED7_Msk +#define GPIO_OSPEEDER_OSPEED7 GPIO_OSPEEDR_OSPEED7 +#define GPIO_OSPEEDER_OSPEED7_0 GPIO_OSPEEDR_OSPEED7_0 +#define GPIO_OSPEEDER_OSPEED7_1 GPIO_OSPEEDR_OSPEED7_1 +#define GPIO_OSPEEDER_OSPEED8_Pos GPIO_OSPEEDR_OSPEED8_Pos +#define GPIO_OSPEEDER_OSPEED8_Msk GPIO_OSPEEDR_OSPEED8_Msk +#define GPIO_OSPEEDER_OSPEED8 GPIO_OSPEEDR_OSPEED8 +#define GPIO_OSPEEDER_OSPEED8_0 GPIO_OSPEEDR_OSPEED8_0 +#define GPIO_OSPEEDER_OSPEED8_1 GPIO_OSPEEDR_OSPEED8_1 +#define GPIO_OSPEEDER_OSPEED9_Pos GPIO_OSPEEDR_OSPEED9_Pos +#define GPIO_OSPEEDER_OSPEED9_Msk GPIO_OSPEEDR_OSPEED9_Msk +#define GPIO_OSPEEDER_OSPEED9 GPIO_OSPEEDR_OSPEED9 +#define GPIO_OSPEEDER_OSPEED9_0 GPIO_OSPEEDR_OSPEED9_0 +#define GPIO_OSPEEDER_OSPEED9_1 GPIO_OSPEEDR_OSPEED9_1 +#define GPIO_OSPEEDER_OSPEED10_Pos GPIO_OSPEEDR_OSPEED10_Pos +#define GPIO_OSPEEDER_OSPEED10_Msk GPIO_OSPEEDR_OSPEED10_Msk +#define GPIO_OSPEEDER_OSPEED10 GPIO_OSPEEDR_OSPEED10 +#define GPIO_OSPEEDER_OSPEED10_0 GPIO_OSPEEDR_OSPEED10_0 +#define GPIO_OSPEEDER_OSPEED10_1 GPIO_OSPEEDR_OSPEED10_1 +#define GPIO_OSPEEDER_OSPEED11_Pos GPIO_OSPEEDR_OSPEED11_Pos +#define GPIO_OSPEEDER_OSPEED11_Msk GPIO_OSPEEDR_OSPEED11_Msk +#define GPIO_OSPEEDER_OSPEED11 GPIO_OSPEEDR_OSPEED11 +#define GPIO_OSPEEDER_OSPEED11_0 GPIO_OSPEEDR_OSPEED11_0 +#define GPIO_OSPEEDER_OSPEED11_1 GPIO_OSPEEDR_OSPEED11_1 +#define GPIO_OSPEEDER_OSPEED12_Pos GPIO_OSPEEDR_OSPEED12_Pos +#define GPIO_OSPEEDER_OSPEED12_Msk GPIO_OSPEEDR_OSPEED12_Msk +#define GPIO_OSPEEDER_OSPEED12 GPIO_OSPEEDR_OSPEED12 +#define GPIO_OSPEEDER_OSPEED12_0 GPIO_OSPEEDR_OSPEED12_0 +#define GPIO_OSPEEDER_OSPEED12_1 GPIO_OSPEEDR_OSPEED12_1 +#define GPIO_OSPEEDER_OSPEED13_Pos GPIO_OSPEEDR_OSPEED13_Pos +#define GPIO_OSPEEDER_OSPEED13_Msk GPIO_OSPEEDR_OSPEED13_Msk +#define GPIO_OSPEEDER_OSPEED13 GPIO_OSPEEDR_OSPEED13 +#define GPIO_OSPEEDER_OSPEED13_0 GPIO_OSPEEDR_OSPEED13_0 +#define GPIO_OSPEEDER_OSPEED13_1 GPIO_OSPEEDR_OSPEED13_1 +#define GPIO_OSPEEDER_OSPEED14_Pos GPIO_OSPEEDR_OSPEED14_Pos +#define GPIO_OSPEEDER_OSPEED14_Msk GPIO_OSPEEDR_OSPEED14_Msk +#define GPIO_OSPEEDER_OSPEED14 GPIO_OSPEEDR_OSPEED14 +#define GPIO_OSPEEDER_OSPEED14_0 GPIO_OSPEEDR_OSPEED14_0 +#define GPIO_OSPEEDER_OSPEED14_1 GPIO_OSPEEDR_OSPEED14_1 +#define GPIO_OSPEEDER_OSPEED15_Pos GPIO_OSPEEDR_OSPEED15_Pos +#define GPIO_OSPEEDER_OSPEED15_Msk GPIO_OSPEEDR_OSPEED15_Msk +#define GPIO_OSPEEDER_OSPEED15 GPIO_OSPEEDR_OSPEED15 +#define GPIO_OSPEEDER_OSPEED15_0 GPIO_OSPEEDR_OSPEED15_0 +#define GPIO_OSPEEDER_OSPEED15_1 GPIO_OSPEEDR_OSPEED15_1 /******************* Bit definition for GPIO_PUPDR register ******************/ #define GPIO_PUPDR_PUPD0_Pos (0U) diff --git a/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h b/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h index 4a550efa6f..1416377d81 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h +++ b/system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h @@ -103,7 +103,7 @@ */ #define __STM32L0xx_CMSIS_VERSION_MAIN (0x01) /*!< [31:24] main version */ #define __STM32L0xx_CMSIS_VERSION_SUB1 (0x09) /*!< [23:16] sub1 version */ -#define __STM32L0xx_CMSIS_VERSION_SUB2 (0x03) /*!< [15:8] sub2 version */ +#define __STM32L0xx_CMSIS_VERSION_SUB2 (0x04) /*!< [15:8] sub2 version */ #define __STM32L0xx_CMSIS_VERSION_RC (0x00) /*!< [7:0] release candidate */ #define __STM32L0xx_CMSIS_VERSION ((__STM32L0xx_CMSIS_VERSION_MAIN << 24)\ |(__STM32L0xx_CMSIS_VERSION_SUB1 << 16)\ diff --git a/system/Drivers/CMSIS/Device/ST/STM32L0xx/License.md b/system/Drivers/CMSIS/Device/ST/STM32L0xx/LICENSE.md similarity index 100% rename from system/Drivers/CMSIS/Device/ST/STM32L0xx/License.md rename to system/Drivers/CMSIS/Device/ST/STM32L0xx/LICENSE.md diff --git a/system/Drivers/CMSIS/Device/ST/STM32L0xx/README.md b/system/Drivers/CMSIS/Device/ST/STM32L0xx/README.md index e022d05950..05d7cd7245 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32L0xx/README.md +++ b/system/Drivers/CMSIS/Device/ST/STM32L0xx/README.md @@ -1,19 +1,21 @@ -# STM32CubeG4 CMSIS Device MCU Component +# STM32CubeL0 CMSIS Device MCU Component + +![latest tag](https://img.shields.io/github/v/tag/STMicroelectronics/cmsis_device_l0.svg?color=brightgreen) ## Overview **STM32Cube** is an STMicroelectronics original initiative to ease the developers life by reducing efforts, time and cost. -**STM32Cube** covers the overall STM32 products portfolio. It includes a comprehensive embedded software platform, delivered for each STM32 series. - * The CMSIS modules (core and device) corresponding to the ARM(tm) core implemented in this STM32 product - * The STM32 HAL-LL drivers : an abstraction drivers layer, the API ensuring maximized portability across the STM32 portfolio - * The BSP Drivers of each evaluation or demonstration board provided by this STM32 series - * A consistent set of middlewares components such as RTOS, USB, FatFS, Graphics, STM32_TouchSensing_Library ... - * A full set of software projects (basic examples, applications or demonstrations) for each board provided by this STM32 series +**STM32Cube** covers the overall STM32 products portfolio. It includes a comprehensive embedded software platform delivered for each STM32 series. + * The CMSIS modules (core and device) corresponding to the ARM(tm) core implemented in this STM32 product. + * The STM32 HAL-LL drivers, an abstraction layer offering a set of APIs ensuring maximized portability across the STM32 portfolio. + * The BSP drivers of each evaluation, discovery, or nucleo board provided for this STM32 series. -Two models of publication are proposed for the STM32Cube embedded software : - * The monolithic **MCU Package** : all STM32Cube software modules of one STM32 series are present (Drivers, Middlewares, Projects, Utilities) in the repo (usual name **STM32Cubexx**, xx corresponding to the STM32 series) - * The **MCU component** : progressively from November 2019, each STM32Cube software module being part of the STM32Cube MCU Package, will be delivered as an individual repo, allowing the user to select and get only the required software functions. + * A consistent set of middleware libraries such as RTOS, USB, FatFS, graphics, touch sensing library... + * A full set of software projects (basic examples, applications, and demonstrations) for each board provided for this STM32 series. +Two models of publication are proposed for the STM32Cube embedded software: + * The monolithic **MCU Package**: all STM32Cube software modules of one STM32 series are present (Drivers, Middleware, Projects, Utilities) in the repository (usual name **STM32Cubexx**, xx corresponding to the STM32 series). + * The **MCU component**: each STM32Cube software module being part of the STM32Cube MCU Package, is delivered as an individual repository, allowing the user to select and get only the required software functions. ## Description @@ -30,6 +32,5 @@ It is **crucial** that you use a consistent set of versions for the CMSIS Core - The full **STM32CubeL0** MCU package is available [here](https://github.com/STMicroelectronics/STM32CubeL0). ## Troubleshooting -If you have any issue with the **Software content** of this repo, you can [file an issue on Github](https://github.com/STMicroelectronics/cmsis_device_l0/issues/new). -For any other question related to the product, the tools, the environment, you can submit a topic on the [ST Community/STM32 MCUs forum](https://community.st.com/s/group/0F90X000000AXsASAW/stm32-mcus). \ No newline at end of file +Please refer to the [CONTRIBUTING.md](CONTRIBUTING.md) guide. diff --git a/system/Drivers/CMSIS/Device/ST/STM32L0xx/Release_Notes.html b/system/Drivers/CMSIS/Device/ST/STM32L0xx/Release_Notes.html index ecfd8d86a5..74ff71c8f6 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32L0xx/Release_Notes.html +++ b/system/Drivers/CMSIS/Device/ST/STM32L0xx/Release_Notes.html @@ -46,12 +46,23 @@

                                                                Purpose

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                                                                • Align GPIO_OSPEEDR Register Bits Naming with Reference Manual.
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                                                                • All source files: update disclaimer to add reference to the new license agreement.
                                                                • Fix inconsistent IRQn_Type enumeration for supervisor call exception with alias for compatibility.
                                                                • Update the GCC startup file to be aligned to IAR/Keil IDE.
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                                                                  • Add new atomic register access macros in stm32l0xx.h file.
                                                                  • Add LSI maximum startup time datasheet value: LSI_STARTUP_TIME.
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                                                                            • Updated IS_COMP_COMMON_INSTANCE() macro.
                                                                            • Corrected ADC_CFGR2_TOVS bit and mask definitions.
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                                                                              • Added Pos and Msk macros missing within the CMSIS stm32l083xx.h file.
                                                                              • Added LCD_CR_BUFEN bit definition in LCD CR register for stm32l053xx, stm32l063xx, stm32l073xx, stm32l083xx devices.
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                                                                                    • MISRA C 2004 rule 5.1 and rule 10.6 compliance.
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                                                                                      • Remove the Debug Monitor handler from the startup files (not supported on L0).
                                                                                      • Renamings and usage of some aliases in order to be compliant with the RefManuals.
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                                                                                        • Several renamings in order to be compliant with the specifications.
                                                                                        • Adding of new bit definitions (COMP_CSR_COMP2LPTIM1IN1, SYSCFG_CFGR1_UFB, I2C_OAR2_x, LCD_CR_MUX_SEG, RTC_BKP_NUMBER)
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                                                                                          • Add IAR set of files STM32L073xx - STM32L072xx - STM32L071xx - STM32L083xx - STM32L082xx - STM32L081xx
                                                                                          • Added MDK-ARM startup files for L071xx, L072xx, L073xx, L081xx, L082xx, L083xx
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                                                                                            • Header files
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                                                                                                diff --git a/system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/system_stm32l0xx.c b/system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/system_stm32l0xx.c index d50e65c844..d87a7480e7 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/system_stm32l0xx.c +++ b/system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/system_stm32l0xx.c @@ -90,14 +90,14 @@ #if defined(VECT_TAB_SRAM) #define VECT_TAB_BASE_ADDRESS SRAM_BASE /*!< Vector Table base address field. This value must be a multiple of 0x200. */ -#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field. - This value must be a multiple of 0x200. */ #else #define VECT_TAB_BASE_ADDRESS FLASH_BASE /*!< Vector Table base address field. This value must be a multiple of 0x200. */ -#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field. - This value must be a multiple of 0x200. */ #endif /* VECT_TAB_SRAM */ +#if !defined(VECT_TAB_OFFSET) +#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table offset field. + This value must be a multiple of 0x200. */ +#endif /* VECT_TAB_OFFSET */ #endif /* USER_VECT_TAB_ADDRESS */ /******************************************************************************/ diff --git a/system/Drivers/CMSIS/Device/ST/STM32YYxx_CMSIS_version.md b/system/Drivers/CMSIS/Device/ST/STM32YYxx_CMSIS_version.md index 9c4aa19e70..f2e4cc5252 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32YYxx_CMSIS_version.md +++ b/system/Drivers/CMSIS/Device/ST/STM32YYxx_CMSIS_version.md @@ -11,7 +11,7 @@ * STM32G4: 1.2.5 * STM32H5: 1.4.0 * STM32H7: 1.10.6 - * STM32L0: 1.9.3 + * STM32L0: 1.9.4 * STM32L1: 2.3.4 * STM32L4: 1.7.4 * STM32L5: 1.0.6 From 782fbafea706eb5275740152541fcec93a6b9c7e Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Tue, 25 Mar 2025 14:45:58 +0100 Subject: [PATCH 07/44] ci(stm32variant): improve skip feature avoid to parse the xml file if family have to be skipped Signed-off-by: Frederic Pillon --- CI/update/stm32variant.py | 27 +++++++++++++++------------ 1 file changed, 15 insertions(+), 12 deletions(-) diff --git a/CI/update/stm32variant.py b/CI/update/stm32variant.py index 35af1c64e6..bfc9facc62 100644 --- a/CI/update/stm32variant.py +++ b/CI/update/stm32variant.py @@ -178,6 +178,19 @@ def parse_mcu_file(): if mcu_family.endswith("+"): mcu_family = mcu_family[:-1] + + # Generate only for specified pattern series or supported one + # Check if mcu_family is supported by the core + if ( + mcu_family not in stm32_list + or args.serie + and serie_pattern.search(mcu_family) is None + ): + if mcu_family not in ignored_stm32_list and mcu_family not in stm32_list: + ignored_stm32_list.append(mcu_family) + xml_mcu.unlink() + return False + mcu_refname = mcu_node.attributes["RefName"].value core_node = mcu_node.getElementsByTagName("Core") for f in core_node: @@ -213,6 +226,7 @@ def parse_mcu_file(): else: if gpiofile == "" and s.attributes["Name"].value == "GPIO": gpiofile = s.attributes["Version"].value + return True def get_gpio_af_num(pintofind, iptofind): @@ -2742,18 +2756,7 @@ def manage_repo(): for mcu_file in mcu_list: # Open input file xml_mcu = parse(str(mcu_file)) - parse_mcu_file() - - # Generate only for specified pattern series or supported one - # Check if mcu_family is supported by the core - if ( - mcu_family not in stm32_list - or args.serie - and serie_pattern.search(mcu_family) is None - ): - if mcu_family not in ignored_stm32_list and mcu_family not in stm32_list: - ignored_stm32_list.append(mcu_family) - xml_mcu.unlink() + if parse_mcu_file() is False: continue # Add mcu family to the list of directory to aggregate From df761bf36f90a3997ee171876345e8842e326e6f Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Fri, 14 Mar 2025 10:37:47 +0100 Subject: [PATCH 08/44] fix(openocd): update to xpack-openocd v0.12.0-6 https://github.com/xpack-dev-tools/openocd-xpack/releases/tag/v0.12.0-6 Fixes #2683. Signed-off-by: Frederic Pillon --- platform.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/platform.txt b/platform.txt index 651928558f..faeddf45fa 100644 --- a/platform.txt +++ b/platform.txt @@ -17,7 +17,7 @@ busybox= busybox.windows={runtime.tools.STM32Tools.path}/win/busybox.exe toolchain_dir={runtime.tools.xpack-arm-none-eabi-gcc-14.2.1-1.1.path} -openocd_dir={runtime.tools.xpack-openocd-0.12.0-5.path} +openocd_dir={runtime.tools.xpack-openocd-0.12.0-6.path} tools_bin_path.windows={runtime.tools.STM32Tools.path}/win tools_bin_path.macosx={runtime.tools.STM32Tools.path}/macosx From 2ef2edb393c7f58a7c9d04ab6a8a161e256e6fc9 Mon Sep 17 00:00:00 2001 From: Tom Hayden Date: Thu, 20 Mar 2025 15:23:28 -0500 Subject: [PATCH 09/44] variant(l5): add generic L552Q(C-E)IxQ and L562QEIxQ Signed-off-by: Tom Hayden Co-Authored-by: Frederic Pillon --- README.md | 2 + boards.txt | 27 +++ .../L552Q(C-E)IxQ_L562QEIxQ/generic_clock.c | 58 +++++- .../L552Q(C-E)IxQ_L562QEIxQ/ldscript.ld | 186 ++++++++++++++++++ 4 files changed, 272 insertions(+), 1 deletion(-) create mode 100644 variants/STM32L5xx/L552Q(C-E)IxQ_L562QEIxQ/ldscript.ld diff --git a/README.md b/README.md index 1353cefcb6..3144385b98 100644 --- a/README.md +++ b/README.md @@ -743,7 +743,9 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d | Status | Device(s) | Name | Release | Notes | | :----: | :-------: | ---- | :-----: | :---- | | :green_heart: | STM32L552ZC-Q
                                                                                                STM32L552ZE-Q | Generic Board | *2.0.0* | | +| :yellow_heart: | STM32L552QCIxQ
                                                                                                STM32L552QEIxQ | Generic Board | **2.11.0** | | | :green_heart: | STM32L562ZE-Q | Generic Board | *2.0.0* | | +| :yellow_heart: | STM32L562QEIxQ | Generic Board | **2.11.0** | | ### Generic STM32U0 boards diff --git a/boards.txt b/boards.txt index 9d8fb3b19e..abaa3a4438 100644 --- a/boards.txt +++ b/boards.txt @@ -12226,6 +12226,24 @@ GenL5.openocd.target=stm32l5x GenL5.vid.0=0x0483 GenL5.pid.0=0x5740 +# Generic L552QCIxQ +GenL5.menu.pnum.GENERIC_L552QCIXQ=Generic L552QCIxQ +GenL5.menu.pnum.GENERIC_L552QCIXQ.upload.maximum_size=262144 +GenL5.menu.pnum.GENERIC_L552QCIXQ.upload.maximum_data_size=262144 +GenL5.menu.pnum.GENERIC_L552QCIXQ.build.board=GENERIC_L552QCIXQ +GenL5.menu.pnum.GENERIC_L552QCIXQ.build.product_line=STM32L552xx +GenL5.menu.pnum.GENERIC_L552QCIXQ.build.variant=STM32L5xx/L552Q(C-E)IxQ_L562QEIxQ +GenL5.menu.pnum.GENERIC_L552QCIXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32L5xx/STM32L552.svd + +# Generic L552QEIxQ +GenL5.menu.pnum.GENERIC_L552QEIXQ=Generic L552QEIxQ +GenL5.menu.pnum.GENERIC_L552QEIXQ.upload.maximum_size=524288 +GenL5.menu.pnum.GENERIC_L552QEIXQ.upload.maximum_data_size=262144 +GenL5.menu.pnum.GENERIC_L552QEIXQ.build.board=GENERIC_L552QEIXQ +GenL5.menu.pnum.GENERIC_L552QEIXQ.build.product_line=STM32L552xx +GenL5.menu.pnum.GENERIC_L552QEIXQ.build.variant=STM32L5xx/L552Q(C-E)IxQ_L562QEIxQ +GenL5.menu.pnum.GENERIC_L552QEIXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32L5xx/STM32L552.svd + # Generic L552ZCTxQ GenL5.menu.pnum.GENERIC_L552ZCTXQ=Generic L552ZCTxQ GenL5.menu.pnum.GENERIC_L552ZCTXQ.upload.maximum_size=262144 @@ -12244,6 +12262,15 @@ GenL5.menu.pnum.GENERIC_L552ZETXQ.build.product_line=STM32L552xx GenL5.menu.pnum.GENERIC_L552ZETXQ.build.variant=STM32L5xx/L552Z(C-E)TxQ_L562ZETxQ GenL5.menu.pnum.GENERIC_L552ZETXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32L5xx/STM32L552.svd +# Generic L562QC-EIxQ +GenL5.menu.pnum.GENERIC_L562QEIXQ=Generic L562QC-EIxQ +GenL5.menu.pnum.GENERIC_L562QEIXQ.upload.maximum_size=524288 +GenL5.menu.pnum.GENERIC_L562QEIXQ.upload.maximum_data_size=196608 +GenL5.menu.pnum.GENERIC_L562QEIXQ.build.board=GENERIC_L562QEIXQ +GenL5.menu.pnum.GENERIC_L562QEIXQ.build.product_line=STM32L562xx +GenL5.menu.pnum.GENERIC_L562QEIXQ.build.variant=STM32L5xx/L552Q(C-E)IxQ_L562QEIxQ +GenL5.menu.pnum.GENERIC_L562QEIXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32L5xx/STM32L562.svd + # Generic L562ZETxQ GenL5.menu.pnum.GENERIC_L562ZETXQ=Generic L562ZETxQ GenL5.menu.pnum.GENERIC_L562ZETXQ.upload.maximum_size=524288 diff --git a/variants/STM32L5xx/L552Q(C-E)IxQ_L562QEIxQ/generic_clock.c b/variants/STM32L5xx/L552Q(C-E)IxQ_L562QEIxQ/generic_clock.c index ea09640eb3..fcbb9b3dff 100644 --- a/variants/STM32L5xx/L552Q(C-E)IxQ_L562QEIxQ/generic_clock.c +++ b/variants/STM32L5xx/L552Q(C-E)IxQ_L562QEIxQ/generic_clock.c @@ -22,7 +22,63 @@ WEAK void SystemClock_Config(void) { /* SystemClock_Config can be generated by STM32CubeMX */ -#warning "SystemClock_Config() is empty. Default clock at reset is used." + RCC_OscInitTypeDef RCC_OscInitStruct = {}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; + RCC_PeriphCLKInitTypeDef PeriphClkInit = {}; + + /** Configure the main internal regulator output voltage + */ + if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE0) != HAL_OK) { + Error_Handler(); + } + + /** Initializes the RCC Oscillators according to the specified parameters + * in the RCC_OscInitTypeDef structure. + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSI + | RCC_OSCILLATORTYPE_MSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.MSIState = RCC_MSI_ON; + RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT; + RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI; + RCC_OscInitStruct.PLL.PLLM = 1; + RCC_OscInitStruct.PLL.PLLN = 55; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7; + RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2; + RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { + Error_Handler(); + } + + /** Initializes the CPU, AHB and APB buses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK + | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) { + Error_Handler(); + } + + /** Initializes the peripherals clock + */ + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_USB; + PeriphClkInit.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_HSI; + PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) { + Error_Handler(); + } + + /** Enable MSI Auto calibration + */ + HAL_RCCEx_EnableMSIPLLMode(); } #endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32L5xx/L552Q(C-E)IxQ_L562QEIxQ/ldscript.ld b/variants/STM32L5xx/L552Q(C-E)IxQ_L562QEIxQ/ldscript.ld new file mode 100644 index 0000000000..1cc217a4cb --- /dev/null +++ b/variants/STM32L5xx/L552Q(C-E)IxQ_L562QEIxQ/ldscript.ld @@ -0,0 +1,186 @@ +/* +****************************************************************************** +** +** File : LinkerScript.ld +** +** Author : STM32CubeIDE +** +** Abstract : Linker script for STM32L562xE Device from STM32L5 series +** 512Kbytes FLASH +** 256Kbytes RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Distribution: The file is distributed as is without any warranty +** of any kind. +** +***************************************************************************** +** @attention +** +** Copyright (c) 2025 STMicroelectronics. +** All rights reserved. +** +** This software is licensed under terms that can be found in the LICENSE file +** in the root directory of this software component. +** If no LICENSE file comes with this software, it is provided AS-IS. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ + +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Memories definition */ +MEMORY +{ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE + FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET +} + +/* Sections */ +SECTIONS +{ + /* The startup code into "FLASH" Rom type memory */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data into "FLASH" Rom type memory */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data into "FLASH" Rom type memory */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + *(.ARM.extab* .gnu.linkonce.armextab.*) + . = ALIGN(4); + } >FLASH + .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + . = ALIGN(4); + } >FLASH + + .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + . = ALIGN(4); + } >FLASH + + .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + . = ALIGN(4); + } >FLASH + + .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + . = ALIGN(4); + } >FLASH + + /* Used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections into "RAM" Ram type memory */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + *(.RamFunc) /* .RamFunc sections */ + *(.RamFunc*) /* .RamFunc* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + + } >RAM AT> FLASH + + /* Uninitialized data section into "RAM" Ram type memory */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + /* Remove information from the compiler libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} From 9bff2b6f57bbe10d487dd721f4e00e883482792a Mon Sep 17 00:00:00 2001 From: Tom Hayden Date: Wed, 26 Mar 2025 11:00:01 +0100 Subject: [PATCH 10/44] variant(l5): add support for STM32L562E-DK board Signed-off-by: Tom Hayden Co-Authored-by: Frederic Pillon --- README.md | 1 + boards.txt | 16 + .../PeripheralPins_STM32L562E_DK.c | 431 ++++++++++++++++++ .../variant_STM32L562E_DK.cpp | 220 +++++++++ .../variant_STM32L562E_DK.h | 281 ++++++++++++ 5 files changed, 949 insertions(+) create mode 100644 variants/STM32L5xx/L552Q(C-E)IxQ_L562QEIxQ/PeripheralPins_STM32L562E_DK.c create mode 100644 variants/STM32L5xx/L552Q(C-E)IxQ_L562QEIxQ/variant_STM32L562E_DK.cpp create mode 100644 variants/STM32L5xx/L552Q(C-E)IxQ_L562QEIxQ/variant_STM32L562E_DK.h diff --git a/README.md b/README.md index 3144385b98..f8b7b0bd73 100644 --- a/README.md +++ b/README.md @@ -192,6 +192,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d | :green_heart: | STM32H573IIKxQ | [STM32H573I-DK](https://www.st.com/en/evaluation-tools/stm32h573i-dk.html) | *2.6.0* | | | :green_heart: | STM32H747XIHx | [STM32H747I-DISCO](https://www.st.com/en/evaluation-tools/stm32h747i-disco.html) | *2.7.0* | | | :green_heart: | STM32L4S5VI | [B-L4S5I-IOT01A](https://www.st.com/en/evaluation-tools/b-l4s5i-iot01a.html) | *2.0.0* | | +| :yellow_heart: | STM32L562QEIxQ | [STM32L562E-DK](https://www.st.com/en/evaluation-tools/stm32l562e-dk.html) | **2.11.0** | | | :green_heart: | STM32U585AIIxQ | [B-U585I-IOT02A](https://www.st.com/en/evaluation-tools/b-u585i-iot02a.html) | *2.1.0* | | | :green_heart: | STM32WB5MMG | [STM32WB5MM-DK](https://www.st.com/en/evaluation-tools/stm32wb5mm-dk.html) | *2.1.0* | | diff --git a/boards.txt b/boards.txt index abaa3a4438..aaebef7be9 100644 --- a/boards.txt +++ b/boards.txt @@ -1423,6 +1423,22 @@ Disco.menu.pnum.STM32H747I_DISCO.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS Disco.menu.pnum.STM32H747I_DISCO.openocd.target=stm32h7x Disco.menu.pnum.STM32H747I_DISCO.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32H7xx/STM32H747_CM7.svd +# STM32L562E-DK +Disco.menu.pnum.STM32L562E_DK=STM32L562E-DK +Disco.menu.pnum.STM32L562E_DK.node=DIS_L562QE +Disco.menu.pnum.STM32L562E_DK.upload.maximum_size=524288 +Disco.menu.pnum.STM32L562E_DK.upload.maximum_data_size=196608 +Disco.menu.pnum.STM32L562E_DK.build.mcu=cortex-m33 +Disco.menu.pnum.STM32L562E_DK.build.fpu=-mfpu=fpv4-sp-d16 +Disco.menu.pnum.STM32L562E_DK.build.float-abi=-mfloat-abi=hard +Disco.menu.pnum.STM32L562E_DK.build.board=STM32L562E_DK +Disco.menu.pnum.STM32L562E_DK.build.series=STM32L5xx +Disco.menu.pnum.STM32L562E_DK.build.product_line=STM32L562xx +Disco.menu.pnum.STM32L562E_DK.build.variant=STM32L5xx/L552Q(C-E)IxQ_L562QEIxQ +Disco.menu.pnum.STM32L562E_DK.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS +Disco.menu.pnum.STM32L562E_DK.openocd.target=stm32l5x +Disco.menu.pnum.STM32L562E_DK.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32L5xx/STM32L562.svd + # STM32WB5MM-DK board Disco.menu.pnum.STM32WB5MM_DK=STM32WB5MM-DK Disco.menu.pnum.STM32WB5MM_DK.node="DIS_WB5MMG" diff --git a/variants/STM32L5xx/L552Q(C-E)IxQ_L562QEIxQ/PeripheralPins_STM32L562E_DK.c b/variants/STM32L5xx/L552Q(C-E)IxQ_L562QEIxQ/PeripheralPins_STM32L562E_DK.c new file mode 100644 index 0000000000..e083b99c20 --- /dev/null +++ b/variants/STM32L5xx/L552Q(C-E)IxQ_L562QEIxQ/PeripheralPins_STM32L562E_DK.c @@ -0,0 +1,431 @@ +/* + ******************************************************************************* + * Copyright (c) 2020, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +/* + * Automatically generated from STM32L552Q(C-E)IxQ.xml, STM32L562QEIxQ.xml + * CubeMX DB release 6.0.140 + */ +#if defined(ARDUINO_STM32L562E_DK) +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Notes: + * - The pins mentioned Px_y_ALTz are alternative possibilities which use other + * HW peripheral instances. You can use them the same way as any other "normal" + * pin (i.e. analogWrite(PA7_ALT1, 128);). + * + * - Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +WEAK const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_0_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_1_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PA_4_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PA_5_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13 + {PC_4_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13 + {PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14 + {PC_5_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_IN14 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +#ifdef HAL_DAC_MODULE_ENABLED +WEAK const PinMap PinMap_DAC[] = { + {PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC1_OUT1 + {PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC1_OUT2 + {NC, NP, 0} +}; +#endif + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SDA[] = { + {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_7_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I2C4)}, + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_11_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I2C4)}, + {PD_13, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SCL[] = { + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_6_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I2C4)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_10_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I2C4)}, + {PB_13, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PD_12, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, + {NC, NP, 0} +}; +#endif + +//*** No I3C *** + +//*** TIM *** + +#ifdef HAL_TIM_MODULE_ENABLED +WEAK const PinMap PinMap_TIM[] = { + {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_0_ALT1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1 + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1_ALT1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2 + {PA_1_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_5_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PB_6_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N + {PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PB_7_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 1)}, // TIM17_CH1N + {PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PB_8_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PB_9_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PB_13_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PC_6_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1 + {PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PC_8_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3 + {PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PC_9_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4 + {PD_12, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PD_13, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PE_0, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PG_9, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PG_10, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {NC, NP, 0} +}; +#endif + +//*** UART *** + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_TX[] = { + {PA_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_11, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_4, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_10, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_10_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PG_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RX[] = { + {PA_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_5, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_11_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_2, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PD_6, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PG_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PB_4, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PD_2, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_12, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_CTS[] = { + {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_5, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF_NONE)}, + {PB_7, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF_NONE)}, + {PB_13, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_13_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MOSI[] = { + {PB_5_ALT1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PD_6, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI3)}, + {PG_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MISO[] = { + {PB_4_ALT1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PG_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SCLK[] = { + {PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PG_2, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_9, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_4_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PG_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +//*** FDCAN *** + +#ifdef HAL_FDCAN_MODULE_ENABLED +WEAK const PinMap PinMap_CAN_RD[] = { + {PB_8, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_FDCAN_MODULE_ENABLED +WEAK const PinMap PinMap_CAN_TD[] = { + {PB_9, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {NC, NP, 0} +}; +#endif + +//*** No ETHERNET *** + +//*** OCTOSPI *** + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA0[] = { + {PB_1, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO0 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA1[] = { + {PB_0, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO1 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA2[] = { + {PA_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO2 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA3[] = { + {PA_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO3 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA4[] = { + {PC_1, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO4 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA5[] = { + {PC_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO5 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA6[] = { + {PC_3, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_IO6 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA7[] = { + {PC_0, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_OCTOSPI1)}, // OCTOSPI1_IO7 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_SCLK[] = { + {PA_3, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_CLK + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_SSEL[] = { + {PA_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPI1_NCS + {NC, NP, 0} +}; +#endif + +//*** USB *** + +#if defined(HAL_PCD_MODULE_ENABLED) || defined(HAL_HCD_MODULE_ENABLED) +WEAK const PinMap PinMap_USB[] = { + {PA_11, USB, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_USB)}, // USB_DM + {PA_12, USB, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_USB)}, // USB_DP + {NC, NP, 0} +}; +#endif + +//*** SD *** + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CMD[] = { + {PD_2, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDMMC1)}, // SDMMC1_CMD + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CK[] = { + {PC_12, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDMMC1)}, // SDMMC1_CK + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA0[] = { + {PC_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D0 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA1[] = { + {PC_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D1 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA2[] = { + {PC_10, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D2 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA3[] = { + {PC_11, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D3 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA4[] = { + {PB_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D4 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA5[] = { + {PB_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D5 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA6[] = { + {PC_6, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D6 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA7[] = { + {PC_7, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D7 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CKIN[] = { + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CDIR[] = { + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_D0DIR[] = { + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_D123DIR[] = { + {NC, NP, 0} +}; +#endif + +#endif /* ARDUINO_STM32L562E_DK */ diff --git a/variants/STM32L5xx/L552Q(C-E)IxQ_L562QEIxQ/variant_STM32L562E_DK.cpp b/variants/STM32L5xx/L552Q(C-E)IxQ_L562QEIxQ/variant_STM32L562E_DK.cpp new file mode 100644 index 0000000000..806c9b190c --- /dev/null +++ b/variants/STM32L5xx/L552Q(C-E)IxQ_L562QEIxQ/variant_STM32L562E_DK.cpp @@ -0,0 +1,220 @@ +/* + ******************************************************************************* + * Copyright (c) 2020, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_STM32L562E_DK) +#include "pins_arduino.h" + +// Digital PinName array +const PinName digitalPin[] = { + PB_10, // D0 + PB_11, + PD_11, + PD_12, + PF_4, + PD_13, + PB_8, + PC_6, + PG_0, + PB_9, + PE_0, // D10 + PB_5, + PB_4, + PG_9, + PB_7, + PB_6, + PA_0, + PA_1, + PA_4, + PA_5, + PC_4, // D20 + PC_5, + PB_14, + PB_15, + PA_2, + PA_3, + PA_6, + PA_7, + PB_0, + PB_1, + PB_2, // D30 + PC_0, + PC_1, + PC_2, + PC_3, + PF_2, + PC_8, + PC_9, + PC_10, + PC_11, + PC_12, // D40 + PD_2, + PD_7, + PD_5, + PD_4, + PF_0, + PD_14, + PD_15, + PD_0, + PD_1, + PE_7, // D50 + PE_8, + PE_9, + PE_10, + PE_11, + PE_12, + PE_13, + PE_14, + PE_15, + PD_8, + PD_9, // D60 + PD_10, + PE_1, + PF_1, + PA_8, + PF_14, + PF_15, + PH_0, + PA_11, + PA_12, + PC_13, // D70 + PD_3, + PG_12, + PG_8, + PG_6, + PG_5, + PG_4, + PG_3, + PG_2, + PG_1, + PE_2, // D80 + PE_3, + PE_4, + PE_5, + PE_6, + PG_7, + PB_12, + PC_7, + PH_1, + PF_3, + PF_11, // D90 + PF_12, + PB_13, + PF_5, + PD_6, + PG_10, + PB_3, + PA_15, + PA_9, + PA_10, + PA_13, // D100 + PA_14, + PC_14, + PC_15 +}; + + +const uint32_t analogInputPin[] = { + 16, // A0 + 17, // A1 + 18, // A2 + 19, // A3 + 20, // A4 + 21 // A5 +}; + +// ---------------------------------------------------------------------------- +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief System Clock Configuration + * @param None + * @retval None + */ +WEAK void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; + RCC_PeriphCLKInitTypeDef PeriphClkInit = {}; + + // Configure the main internal regulator output voltage + if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE0) != HAL_OK) { + Error_Handler(); + } + + /** Configure LSE Drive Capability + */ + HAL_PWR_EnableBkUpAccess(); + __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW); + /** Initializes the RCC Oscillators according to the specified parameters + * in the RCC_OscInitTypeDef structure. + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_LSE + | RCC_OSCILLATORTYPE_MSI; + RCC_OscInitStruct.LSEState = RCC_LSE_ON; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.MSIState = RCC_MSI_ON; + RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT; + RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_11; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI; + RCC_OscInitStruct.PLL.PLLM = 12; + RCC_OscInitStruct.PLL.PLLN = 55; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7; + RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2; + RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { + Error_Handler(); + } + + /** Initializes the CPU, AHB and APB buses clocks */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK + | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) { + Error_Handler(); + } + + // Configure the other peripheral clocks + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_LPUART1 + | RCC_PERIPHCLK_OSPI | RCC_PERIPHCLK_SAI1 + | RCC_PERIPHCLK_SDMMC1 | RCC_PERIPHCLK_USB; + PeriphClkInit.Sai1ClockSelection = RCC_SAI1CLKSOURCE_PLLSAI1; + PeriphClkInit.AdcClockSelection = RCC_ADCCLKSOURCE_PLLSAI1; + PeriphClkInit.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_HSI; + PeriphClkInit.OspiClockSelection = RCC_OSPICLKSOURCE_SYSCLK; + PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSAI1SOURCE_HSI; + PeriphClkInit.PLLSAI1.PLLSAI1M = 4; + PeriphClkInit.PLLSAI1.PLLSAI1N = 48; + PeriphClkInit.PLLSAI1.PLLSAI1P = RCC_PLLP_DIV17; + PeriphClkInit.PLLSAI1.PLLSAI1Q = RCC_PLLQ_DIV2; + PeriphClkInit.PLLSAI1.PLLSAI1R = RCC_PLLR_DIV2; + PeriphClkInit.PLLSAI1.PLLSAI1ClockOut = RCC_PLLSAI1_SAI1CLK | RCC_PLLSAI1_ADC1CLK; + PeriphClkInit.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_MSI; + PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_MSI; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) { + Error_Handler(); + } + + /** Enable MSI Auto calibration */ + HAL_RCCEx_EnableMSIPLLMode(); +} + +#ifdef __cplusplus +} +#endif +#endif /* ARDUINO_STM32L562E_DK */ diff --git a/variants/STM32L5xx/L552Q(C-E)IxQ_L562QEIxQ/variant_STM32L562E_DK.h b/variants/STM32L5xx/L552Q(C-E)IxQ_L562QEIxQ/variant_STM32L562E_DK.h new file mode 100644 index 0000000000..f268407c09 --- /dev/null +++ b/variants/STM32L5xx/L552Q(C-E)IxQ_L562QEIxQ/variant_STM32L562E_DK.h @@ -0,0 +1,281 @@ +/* + ******************************************************************************* + * Copyright (c) 2020, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#pragma once + +/*---------------------------------------------------------------------------- + * STM32 pins number + *----------------------------------------------------------------------------*/ + +// CN12: Arduino connector +#define PB10 0 // ARD.D0_RX, T.VCP_RX +#define PB11 1 // ARD.D1_TX, T.VCP_TX +#define PD11 2 // ARD.D2_IO +#define PD12 3 // ARD.D3_TIM +#define PF4 4 // ARD.D4_INT +#define PD13 5 // ARD.D5_TIM +#define PB8 6 // ARD.D6_TIM +#define PC6 7 // ARD.D7_IO + +// CN11: Arduino connector +#define PG0 8 // ARD.D8_IO +#define PB9 9 // ARD.D9_TIM +#define PE0 10 // ARD.D10: SPI_CSn and TIM16_CH1 +#define PB5 11 // ARD.D11_TIM_SPI_MOSI, STMod+3_SPI_MOSIp +#define PB4 12 // ARD.D12_SPI_MISO, STMod+3_SPI_MISOp +#define PG9 13 // ARD.D13_SPI_SCK +#define PB7 14 // ARD.D14_I2C1_SDA +#define PB6 15 // ARD.D15_I2C1_SCL + +// CN19: Arduino connector +#define PA0 PIN_A0 // ARD.A0: ADC1_IN5, shared with STMod+ +#define PA1 PIN_A1 // ARD.A1: ADC1_IN6 +#define PA4 PIN_A2 // ARD_ADC.A2, USB_C.VBUS_VSENSE +#define PA5 PIN_A3 // ARD_ADC.A3 +#define PC4 PIN_A4 // ARD_ADC.A5 +#define PC5 PIN_A5 // ARD_ADC.A4 + +// CN17: USB Micro-B +#define PB14 22 // USB_C.FLT +#define PB15 23 // USB_C.CC2 + +// octoSPI pins (no reused pin numbers) +#define PA2 24 // OCTOSPI.NCS +#define PA3 25 // OCTOSPI.CLK +#define PA6 26 // OCTOSPI.IO3 +#define PA7 27 // OCTOSPI.IO2 +#define PB0 28 // OCTOSPI.IO1 +#define PB1 29 // OCTOSPI.IO0 +#define PB2 30 // OCTOSPI.DQS +#define PC0 31 // OCTOSPI.IO7 +#define PC1 32 // OCTOSPI.IO4 +#define PC2 33 // OCTOSPI.IO5 +#define PC3 34 // OCTOSPI.IO6 + +// microSD card pins +#define PF2 35 // SDIO.DETECT +#define PC8 36 // SDIO.D0 +#define PC9 37 // SDIO.D1 +#define PC10 38 // SDIO.D2 +#define PC11 39 // SDIO.D3 +#define PC12 40 // SDIO.CLK +#define PD2 41 // SDIO.CMD + +// LCD pins +#define PD7 42 // LCD.FMC_NE1_CS +#define PD5 43 // LCD.FMC_NWE +#define PD4 44 // LCD.FMC_NOE +#define PF0 45 // LCD.FMC_A0 +#define PD14 46 // LCD.FMC_D0 +#define PD15 47 // LCD.FMC_D1 +#define PD0 48 // LCD.FMC_D2 +#define PD1 49 // LCD.FMC_D3 +#define PE7 50 // LCD.FMC_D4 +#define PE8 51 // LCD.FMC_D5 +#define PE9 52 // LCD.FMC_D6 +#define PE10 53 // LCD.FMC_D7 +#define PE11 54 // LCD.FMC_D8 +#define PE12 55 // LCD.FMC_D9 +#define PE13 56 // LCD.FMC_D10 +#define PE14 57 // LCD.FMC_D11 +#define PE15 58 // LCD.FMC_D12 +#define PD8 59 // LCD.FMC_D13 +#define PD9 60 // LCD.FMC_D14 +#define PD10 61 // LCD.FMC_D15 +#define PE1 62 // LCD_BL_CTRL +#define PF1 63 // LCD.CTP_INT +#define PA8 64 +#define PF14 65 // LCD.RST +#define PF15 66 // LCD.CTP_RST +#define PH0 67 // LCD_PWR_ON + +// usb +#define PA11 68 // USB_C.FS_N +#define PA12 69 // USB_C.FS_P + +// User button +#define PC13 70 // USER BUTTON (WKUP2), PM_WAKE-UP + +// User LED +#define PD3 71 // LED_RED +#define PG12 72 // LED_GREEN + +// bluetooth low energy and spi +#define PG8 73 // BLE_RSTN +#define PG6 74 // BLE_INT +#define PG5 75 // SPI1.BLE_CS +#define PG4 76 // SPI1.MOSI +#define PG3 77 // SPI1.MISO +#define PG2 78 // SPI1.SCK + +// Audio codec interface +#define PG1 79 // audio RESET (active low) +#define PE2 80 // SAI.MCLK_A +#define PE3 81 // SAI.SD_B +#define PE4 82 // SAI.FS_A +#define PE5 83 // SAI.SCK_A +#define PE6 84 // SAI.SD_A + +// Digital microphone interface +#define PG7 85 // DFSDM_CKOUT +#define PB12 86 // DFSDM_DATIN1 +#define PC7 87 // DFSDM_DATIN3 +#define PH1 88 // Module LED + +// 3D ACC/GYRO +#define PF3 89 // GYRO_ACC_INT. + +// Pmod +#define PF11 90 // STMod+ SEL_12 +#define PF12 91 // STMod+ SEL_34 +#define PB13 92 +#define PF5 93 + +// STMod+ +#define PD6 94 +#define PG10 95 + +// STLINK-V3E +#define PB3 96 // T.SWO +#define PA15 97 // T.JTDI +#define PA9 98 // T.VCP_TX +#define PA10 99 // T.VCP_RX, ARD.D0_RX +#define PA13 100 // T.SWDIO +#define PA14 101 // T.SWCLK + +#define PC14 102 // OSC32_IN +#define PC15 103 // OSC32_OUT + +// PF13 NC +// PH3 Boot0 + +// Alternate pins number +#define PA0_ALT1 (PA0 | ALT1) +#define PA1_ALT1 (PA1 | ALT1) +#define PA1_ALT2 (PA1 | ALT2) +#define PA2_ALT1 (PA2 | ALT1) +#define PA2_ALT2 (PA2 | ALT2) +#define PA3_ALT1 (PA3 | ALT1) +#define PA3_ALT2 (PA3 | ALT2) +#define PA4_ALT1 (PA4 | ALT1) +#define PA5_ALT1 (PA5 | ALT1) +#define PB4_ALT1 (PB4 | ALT1) +#define PB5_ALT1 (PB5 | ALT1) +#define PB6_ALT1 (PB6 | ALT1) +#define PB7_ALT1 (PB7 | ALT1) +#define PB8_ALT1 (PB8 | ALT1) +#define PB9_ALT1 (PB9 | ALT1) +#define PB10_ALT1 (PB10 | ALT1) +#define PB11_ALT1 (PB11 | ALT1) +#define PB13_ALT1 (PB13 | ALT1) +#define PC4_ALT1 (PC4 | ALT1) +#define PC5_ALT1 (PC5 | ALT1) +#define PC6_ALT1 (PC6 | ALT1) +#define PC8_ALT1 (PC8 | ALT1) +#define PC9_ALT1 (PC9 | ALT1) +#define PC10_ALT1 (PC10 | ALT1) +#define PC11_ALT1 (PC11 | ALT1) + +#define NUM_DIGITAL_PINS 104 +#define NUM_ANALOG_INPUTS 6 + +// On-board LEDs pin number +#define LED1 PG9 +#define LED_BLUE LED1 +#define LED2 PG12 +#define LED_GREEN LED2 +#define LED3 PD3 +#define LED_RED LED3 + +#ifndef LED_BUILTIN + #define LED_BUILTIN LED_BLUE +#endif + +// On-board user button +#ifndef USER_BTN + #define USER_BTN PC13 +#endif + +// Timer Definitions +// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin +#ifndef TIMER_TONE + #define TIMER_TONE TIM6 +#endif +#ifndef TIMER_SERVO + #define TIMER_SERVO TIM7 +#endif + +// UART Definitions +#ifndef SERIAL_UART_INSTANCE + #define SERIAL_UART_INSTANCE 1 +#endif + +// Default pin used for generic 'Serial' instance +// Mandatory for Firmata +#ifndef PIN_SERIAL_RX + #define PIN_SERIAL_RX PA10 +#endif +#ifndef PIN_SERIAL_TX + #define PIN_SERIAL_TX PA9 +#endif + +// Pin UCPD to configure TCPP in default Type-C legacy state (UCPD_DBn for TCPP01) +#define PIN_UCPD_TCPP PB5 + +// SDMMC signals not available +#define SDMMC_CKIN_NA +#define SDMMC_CDIR_NA +#define SDMMC_D0DIR_NA +#define SDMMC_D123DIR_NA +// SD detect signal +#ifndef SD_DETECT_PIN + #define SD_DETECT_PIN PF2 +#endif + +// Extra HAL modules +#if !defined(HAL_DAC_MODULE_DISABLED) + #define HAL_DAC_MODULE_ENABLED +#endif +#if !defined(HAL_OSPI_MODULE_DISABLED) + #define HAL_OSPI_MODULE_ENABLED +#endif +#if !defined(HAL_SD_MODULE_DISABLED) + #define HAL_SD_MODULE_ENABLED +#endif + +/*---------------------------------------------------------------------------- + * Arduino objects - C++ only + *----------------------------------------------------------------------------*/ + +#ifdef __cplusplus + // These serial port names are intended to allow libraries and architecture-neutral + // sketches to automatically default to the correct port name for a particular type + // of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN, + // the first hardware serial port whose RX/TX pins are not dedicated to another use. + // + // SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor + // + // SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial + // + // SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library + // + // SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins. + // + // SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX + // pins are NOT connected to anything by default. + #ifndef SERIAL_PORT_MONITOR + #define SERIAL_PORT_MONITOR Serial + #endif + #ifndef SERIAL_PORT_HARDWARE + #define SERIAL_PORT_HARDWARE Serial + #endif +#endif From 646bec61cc8afba9396714dd9d19d8a187560e34 Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Sat, 29 Mar 2025 11:17:18 +0100 Subject: [PATCH 11/44] fix(uart): typo Signed-off-by: Frederic Pillon --- cores/arduino/HardwareSerial.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/cores/arduino/HardwareSerial.cpp b/cores/arduino/HardwareSerial.cpp index 1c89de7f61..0bd61e6ddf 100644 --- a/cores/arduino/HardwareSerial.cpp +++ b/cores/arduino/HardwareSerial.cpp @@ -273,7 +273,7 @@ HardwareSerial::HardwareSerial(void *peripheral, HalfDuplexMode_t halfDuplex) } else #endif #if defined(PIN_SERIALLP3_TX) && defined(LPUART3_BASE) - if (peripheral == LPUART2) { + if (peripheral == LPUART3) { #if defined(PIN_SERIALLP3_RX) setRx(PIN_SERIALLP3_RX); #endif From 3a607767059e451c1093322d8d1b7e3b5dde0a8b Mon Sep 17 00:00:00 2001 From: Andrew Yong Date: Thu, 27 Mar 2025 22:48:50 +0800 Subject: [PATCH 12/44] feat(uart): support UART Tx, Rx and data invert function This enables UART Tx, Rx and data invert function on STM32 families that support it. In order to enable Tx, Rx and/or data invert, call respectively: ```c++ Serial1.setTxInvert(); Serial1.setRxInvert(); Serial1.setDataInvert(); ``` Fixes: #1160 #2669 See also: #1418 Signed-off-by: Andrew Yong --- cores/arduino/HardwareSerial.cpp | 17 ++++++++++++++- cores/arduino/HardwareSerial.h | 9 ++++++++ keywords.txt | 3 +++ libraries/SrcWrapper/inc/uart.h | 3 ++- libraries/SrcWrapper/src/stm32/uart.c | 30 ++++++++++++++++++++++----- 5 files changed, 55 insertions(+), 7 deletions(-) diff --git a/cores/arduino/HardwareSerial.cpp b/cores/arduino/HardwareSerial.cpp index 0bd61e6ddf..4dd8fd02a4 100644 --- a/cores/arduino/HardwareSerial.cpp +++ b/cores/arduino/HardwareSerial.cpp @@ -446,7 +446,7 @@ void HardwareSerial::begin(unsigned long baud, byte config) break; } - uart_init(&_serial, (uint32_t)baud, databits, parity, stopbits); + uart_init(&_serial, (uint32_t)baud, databits, parity, stopbits, _rx_invert, _tx_invert, _data_invert); enableHalfDuplexRx(); uart_attach_rx_callback(&_serial, _rx_complete_irq); } @@ -668,4 +668,19 @@ void HardwareSerial::enableHalfDuplexRx(void) } } +void HardwareSerial::setRxInvert(void) +{ + _rx_invert = true; +} + +void HardwareSerial::setTxInvert(void) +{ + _tx_invert = true; +} + +void HardwareSerial::setDataInvert(void) +{ + _data_invert = true; +} + #endif // HAL_UART_MODULE_ENABLED && !HAL_UART_MODULE_ONLY diff --git a/cores/arduino/HardwareSerial.h b/cores/arduino/HardwareSerial.h index f8a2884de0..3ed29a873d 100644 --- a/cores/arduino/HardwareSerial.h +++ b/cores/arduino/HardwareSerial.h @@ -95,6 +95,9 @@ class HardwareSerial : public Stream { protected: // Has any byte been written to the UART since begin() bool _written; + bool _rx_invert; + bool _tx_invert; + bool _data_invert; // Don't put any members after these buffers, since only the first // 32 bytes of this struct can be accessed quickly using the ldd @@ -165,6 +168,12 @@ class HardwareSerial : public Stream { bool isHalfDuplex(void) const; void enableHalfDuplexRx(void); + // Enable HW Rx/Tx/data inversion + // This needs to be done before the call to begin() + void setRxInvert(void); + void setTxInvert(void); + void setDataInvert(void); + friend class STM32LowPower; // Interrupt handlers diff --git a/keywords.txt b/keywords.txt index a4a284e59a..5ddcab36dd 100644 --- a/keywords.txt +++ b/keywords.txt @@ -274,6 +274,9 @@ HALF_DUPLEX_ENABLED LITERAL1 setHalfDuplex KEYWORD2 isHalfDuplex KEYWORD2 enableHalfDuplexRx KEYWORD2 +setRxInvert KEYWORD2 +setTxInvert KEYWORD2 +setDataInvert KEYWORD2 Serial4 KEYWORD1 Serial5 KEYWORD1 Serial6 KEYWORD1 diff --git a/libraries/SrcWrapper/inc/uart.h b/libraries/SrcWrapper/inc/uart.h index a6c41390e7..7f99d498e7 100644 --- a/libraries/SrcWrapper/inc/uart.h +++ b/libraries/SrcWrapper/inc/uart.h @@ -38,6 +38,7 @@ #define __UART_H /* Includes ------------------------------------------------------------------*/ +#include #include "stm32_def.h" #include "PinNames.h" @@ -254,7 +255,7 @@ struct serial_s { /* Exported macro ------------------------------------------------------------*/ /* Exported functions ------------------------------------------------------- */ -void uart_init(serial_t *obj, uint32_t baudrate, uint32_t databits, uint32_t parity, uint32_t stopbits); +void uart_init(serial_t *obj, uint32_t baudrate, uint32_t databits, uint32_t parity, uint32_t stopbits, bool rx_invert, bool tx_invert, bool data_invert); void uart_deinit(serial_t *obj); #if defined(HAL_PWR_MODULE_ENABLED) && (defined(UART_IT_WUF) || defined(LPUART1_BASE)) void uart_config_lowpower(serial_t *obj); diff --git a/libraries/SrcWrapper/src/stm32/uart.c b/libraries/SrcWrapper/src/stm32/uart.c index 04ccb2c820..4aaa3f0e2e 100644 --- a/libraries/SrcWrapper/src/stm32/uart.c +++ b/libraries/SrcWrapper/src/stm32/uart.c @@ -115,7 +115,7 @@ serial_t *get_serial_obj(UART_HandleTypeDef *huart) * @param obj : pointer to serial_t structure * @retval None */ -void uart_init(serial_t *obj, uint32_t baudrate, uint32_t databits, uint32_t parity, uint32_t stopbits) +void uart_init(serial_t *obj, uint32_t baudrate, uint32_t databits, uint32_t parity, uint32_t stopbits, bool rx_invert, bool tx_invert, bool data_invert) { if (obj == NULL) { return; @@ -407,11 +407,31 @@ void uart_init(serial_t *obj, uint32_t baudrate, uint32_t databits, uint32_t par huart->Init.Mode = UART_MODE_TX_RX; huart->Init.HwFlowCtl = flow_control; huart->Init.OverSampling = UART_OVERSAMPLING_16; +#if defined(UART_ADVFEATURE_NO_INIT) + // Default value + huart->AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; #if defined(UART_ADVFEATURE_SWAP_INIT) - huart->AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_SWAP_INIT; + huart->AdvancedInit.AdvFeatureInit |= UART_ADVFEATURE_SWAP_INIT; huart->AdvancedInit.Swap = pin_swap; -#elif defined(UART_ADVFEATURE_NO_INIT) - huart->AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; +#endif +#if defined(UART_ADVFEATURE_RXINVERT_INIT) + if (rx_invert) { + huart->AdvancedInit.AdvFeatureInit |= UART_ADVFEATURE_RXINVERT_INIT; + huart->AdvancedInit.RxPinLevelInvert = UART_ADVFEATURE_RXINV_ENABLE; + } +#endif +#if defined(UART_ADVFEATURE_TXINVERT_INIT) + if (tx_invert) { + huart->AdvancedInit.AdvFeatureInit |= UART_ADVFEATURE_TXINVERT_INIT; + huart->AdvancedInit.TxPinLevelInvert = UART_ADVFEATURE_TXINV_ENABLE; + } +#endif +#if defined(UART_ADVFEATURE_DATAINVERT_INIT) + if (data_invert) { + huart->AdvancedInit.AdvFeatureInit |= UART_ADVFEATURE_DATAINVERT_INIT; + huart->AdvancedInit.DataInvert = UART_ADVFEATURE_DATAINV_ENABLE; + } +#endif #endif #ifdef UART_ONE_BIT_SAMPLE_DISABLE huart->Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; @@ -812,7 +832,7 @@ void uart_debug_init(void) serial_debug.pin_tx = pinmap_pin(DEBUG_UART, PinMap_UART_TX); #endif /* serial_debug.pin_rx set by default to NC to configure in half duplex mode */ - uart_init(&serial_debug, DEBUG_UART_BAUDRATE, UART_WORDLENGTH_8B, UART_PARITY_NONE, UART_STOPBITS_1); + uart_init(&serial_debug, DEBUG_UART_BAUDRATE, UART_WORDLENGTH_8B, UART_PARITY_NONE, UART_STOPBITS_1, false, false, false); } } From 06547a23b14c8de9d2ad658977323772b0490eba Mon Sep 17 00:00:00 2001 From: dojyorin Date: Thu, 20 Mar 2025 01:28:01 +0900 Subject: [PATCH 13/44] chore: unify clock configuration of H5. Signed-off-by: dojyorin --- .../STM32H5xx/H503CB(T-U)/generic_clock.c | 30 ++++------ variants/STM32H5xx/H503KBU/generic_clock.c | 40 +++++++------ variants/STM32H5xx/H503RBT/generic_clock.c | 40 +++++++------ .../H503RBT/variant_NUCLEO_H503RB.cpp | 42 +++++++------ .../STM32H5xx/H503RBT/variant_NUCLEO_H503RB.h | 7 ++- .../STM32H5xx/H562R(G-I)T/generic_clock.c | 53 ++++++++--------- .../H562R(G-I)T/variant_WEACT_H562RG.cpp | 49 ++++++++------- .../H562R(G-I)T/variant_WEACT_H562RG.h | 4 +- .../H563IIKxQ_H573IIKxQ/generic_clock.c | 39 ++++++------ .../variant_STM32H573I_DK.cpp | 59 ++++++++++--------- .../H563R(G-I)T_H573RIT/generic_clock.c | 47 ++++++++------- .../H563Z(G-I)T_H573ZIT/generic_clock.c | 39 ++++++------ .../variant_NUCLEO_H563ZI.cpp | 57 +++++++++--------- .../variant_NUCLEO_H563ZI.h | 6 +- 14 files changed, 254 insertions(+), 258 deletions(-) diff --git a/variants/STM32H5xx/H503CB(T-U)/generic_clock.c b/variants/STM32H5xx/H503CB(T-U)/generic_clock.c index 914aa62e0f..e551c58b58 100644 --- a/variants/STM32H5xx/H503CB(T-U)/generic_clock.c +++ b/variants/STM32H5xx/H503CB(T-U)/generic_clock.c @@ -33,20 +33,20 @@ WEAK void SystemClock_Config(void) /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_LSI - | RCC_OSCILLATORTYPE_CSI; - RCC_OscInitStruct.LSIState = RCC_LSI_ON; - RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_CSI | RCC_OSCILLATORTYPE_HSI48 + | RCC_OSCILLATORTYPE_LSI; RCC_OscInitStruct.CSIState = RCC_CSI_ON; RCC_OscInitStruct.CSICalibrationValue = RCC_CSICALIBRATION_DEFAULT; + RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; + RCC_OscInitStruct.LSIState = RCC_LSI_ON; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLL1_SOURCE_CSI; - RCC_OscInitStruct.PLL.PLLM = 1; - RCC_OscInitStruct.PLL.PLLN = 125; + RCC_OscInitStruct.PLL.PLLM = 2; + RCC_OscInitStruct.PLL.PLLN = 250; RCC_OscInitStruct.PLL.PLLP = 2; RCC_OscInitStruct.PLL.PLLQ = 10; RCC_OscInitStruct.PLL.PLLR = 2; - RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_2; + RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_1; RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1_VCORANGE_WIDE; RCC_OscInitStruct.PLL.PLLFRACN = 0; if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { @@ -55,7 +55,7 @@ WEAK void SystemClock_Config(void) /** Initializes the CPU, AHB and APB buses clocks */ - RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_PCLK3; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; @@ -63,7 +63,6 @@ WEAK void SystemClock_Config(void) RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; RCC_ClkInitStruct.APB3CLKDivider = RCC_HCLK_DIV1; - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) { Error_Handler(); } @@ -78,17 +77,17 @@ WEAK void SystemClock_Config(void) | RCC_PERIPHCLK_USB | RCC_PERIPHCLK_SPI1 | RCC_PERIPHCLK_SPI2 | RCC_PERIPHCLK_SPI3; PeriphClkInitStruct.PLL2.PLL2Source = RCC_PLL2_SOURCE_CSI; - PeriphClkInitStruct.PLL2.PLL2M = 1; - PeriphClkInitStruct.PLL2.PLL2N = 125; + PeriphClkInitStruct.PLL2.PLL2M = 2; + PeriphClkInitStruct.PLL2.PLL2N = 250; PeriphClkInitStruct.PLL2.PLL2P = 2; PeriphClkInitStruct.PLL2.PLL2Q = 15; PeriphClkInitStruct.PLL2.PLL2R = 4; - PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2_VCIRANGE_2; + PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2_VCIRANGE_1; PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2_VCORANGE_WIDE; PeriphClkInitStruct.PLL2.PLL2FRACN = 0; PeriphClkInitStruct.PLL2.PLL2ClockOut = RCC_PLL2_DIVQ | RCC_PLL2_DIVR; - PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q; PeriphClkInitStruct.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_PLL2R; + PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q; PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; PeriphClkInitStruct.Spi1ClockSelection = RCC_SPI1CLKSOURCE_PLL1Q; PeriphClkInitStruct.Spi2ClockSelection = RCC_SPI2CLKSOURCE_PLL1Q; @@ -96,11 +95,6 @@ WEAK void SystemClock_Config(void) if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) { Error_Handler(); } - - - /** Configure the programming delay - */ - __HAL_FLASH_SET_PROGRAM_DELAY(FLASH_PROGRAMMING_DELAY_2); } #endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32H5xx/H503KBU/generic_clock.c b/variants/STM32H5xx/H503KBU/generic_clock.c index 9963cdf75a..97c81ecb17 100644 --- a/variants/STM32H5xx/H503KBU/generic_clock.c +++ b/variants/STM32H5xx/H503KBU/generic_clock.c @@ -33,30 +33,29 @@ WEAK void SystemClock_Config(void) /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_LSI - | RCC_OSCILLATORTYPE_CSI; - RCC_OscInitStruct.LSIState = RCC_LSI_ON; - RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_CSI | RCC_OSCILLATORTYPE_HSI48 + | RCC_OSCILLATORTYPE_LSI; RCC_OscInitStruct.CSIState = RCC_CSI_ON; RCC_OscInitStruct.CSICalibrationValue = RCC_CSICALIBRATION_DEFAULT; + RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; + RCC_OscInitStruct.LSIState = RCC_LSI_ON; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLL1_SOURCE_CSI; - RCC_OscInitStruct.PLL.PLLM = 1; - RCC_OscInitStruct.PLL.PLLN = 125; + RCC_OscInitStruct.PLL.PLLM = 2; + RCC_OscInitStruct.PLL.PLLN = 250; RCC_OscInitStruct.PLL.PLLP = 2; - RCC_OscInitStruct.PLL.PLLQ = 2; + RCC_OscInitStruct.PLL.PLLQ = 10; RCC_OscInitStruct.PLL.PLLR = 2; - RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_2; + RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_1; RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1_VCORANGE_WIDE; RCC_OscInitStruct.PLL.PLLFRACN = 0; - if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { Error_Handler(); } /** Initializes the CPU, AHB and APB buses clocks */ - RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_PCLK3; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; @@ -64,33 +63,38 @@ WEAK void SystemClock_Config(void) RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; RCC_ClkInitStruct.APB3CLKDivider = RCC_HCLK_DIV1; - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) { Error_Handler(); } + /** Configure the programming delay + */ + __HAL_FLASH_SET_PROGRAM_DELAY(FLASH_PROGRAMMING_DELAY_2); + /** Initializes the peripherals clock */ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_ADCDAC | RCC_PERIPHCLK_LPUART1 - | RCC_PERIPHCLK_USB; + | RCC_PERIPHCLK_USB | RCC_PERIPHCLK_SPI1 + | RCC_PERIPHCLK_SPI2 | RCC_PERIPHCLK_SPI3; PeriphClkInitStruct.PLL2.PLL2Source = RCC_PLL2_SOURCE_CSI; - PeriphClkInitStruct.PLL2.PLL2M = 1; - PeriphClkInitStruct.PLL2.PLL2N = 125; + PeriphClkInitStruct.PLL2.PLL2M = 2; + PeriphClkInitStruct.PLL2.PLL2N = 250; PeriphClkInitStruct.PLL2.PLL2P = 2; PeriphClkInitStruct.PLL2.PLL2Q = 15; PeriphClkInitStruct.PLL2.PLL2R = 4; - PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2_VCIRANGE_2; + PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2_VCIRANGE_1; PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2_VCORANGE_WIDE; PeriphClkInitStruct.PLL2.PLL2FRACN = 0; PeriphClkInitStruct.PLL2.PLL2ClockOut = RCC_PLL2_DIVQ | RCC_PLL2_DIVR; - PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q; PeriphClkInitStruct.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_PLL2R; + PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q; PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; - + PeriphClkInitStruct.Spi1ClockSelection = RCC_SPI1CLKSOURCE_PLL1Q; + PeriphClkInitStruct.Spi2ClockSelection = RCC_SPI2CLKSOURCE_PLL1Q; + PeriphClkInitStruct.Spi3ClockSelection = RCC_SPI3CLKSOURCE_PLL1Q; if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) { Error_Handler(); } - } #endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32H5xx/H503RBT/generic_clock.c b/variants/STM32H5xx/H503RBT/generic_clock.c index 2ac59ece4c..05793477a7 100644 --- a/variants/STM32H5xx/H503RBT/generic_clock.c +++ b/variants/STM32H5xx/H503RBT/generic_clock.c @@ -24,35 +24,38 @@ WEAK void SystemClock_Config(void) RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {}; - /* Configure the main internal regulator output voltage */ + /** Configure the main internal regulator output voltage + */ __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0); while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {} - /* Initializes the RCC Oscillators according to the specified parameters - * in the RCC_OscInitTypeDef structure. - */ - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_LSI - | RCC_OSCILLATORTYPE_CSI; - RCC_OscInitStruct.LSIState = RCC_LSI_ON; - RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; + /** Initializes the RCC Oscillators according to the specified parameters + * in the RCC_OscInitTypeDef structure. + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_CSI | RCC_OSCILLATORTYPE_HSI48 + | RCC_OSCILLATORTYPE_LSI; RCC_OscInitStruct.CSIState = RCC_CSI_ON; RCC_OscInitStruct.CSICalibrationValue = RCC_CSICALIBRATION_DEFAULT; + RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; + RCC_OscInitStruct.LSIState = RCC_LSI_ON; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLL1_SOURCE_CSI; - RCC_OscInitStruct.PLL.PLLM = 1; - RCC_OscInitStruct.PLL.PLLN = 125; + RCC_OscInitStruct.PLL.PLLM = 2; + RCC_OscInitStruct.PLL.PLLN = 250; RCC_OscInitStruct.PLL.PLLP = 2; RCC_OscInitStruct.PLL.PLLQ = 10; RCC_OscInitStruct.PLL.PLLR = 2; - RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_2; + RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_1; RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1_VCORANGE_WIDE; RCC_OscInitStruct.PLL.PLLFRACN = 0; if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { Error_Handler(); } - /* Initializes the CPU, AHB and APB buses clocks */ - RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK + + /** Initializes the CPU, AHB and APB buses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_PCLK3; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; @@ -68,22 +71,23 @@ WEAK void SystemClock_Config(void) */ __HAL_FLASH_SET_PROGRAM_DELAY(FLASH_PROGRAMMING_DELAY_2); - /* Initializes the peripherals clock */ + /** Initializes the peripherals clock + */ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_ADCDAC | RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_USB | RCC_PERIPHCLK_SPI1 | RCC_PERIPHCLK_SPI2 | RCC_PERIPHCLK_SPI3; PeriphClkInitStruct.PLL2.PLL2Source = RCC_PLL2_SOURCE_CSI; - PeriphClkInitStruct.PLL2.PLL2M = 1; - PeriphClkInitStruct.PLL2.PLL2N = 125; + PeriphClkInitStruct.PLL2.PLL2M = 2; + PeriphClkInitStruct.PLL2.PLL2N = 250; PeriphClkInitStruct.PLL2.PLL2P = 2; PeriphClkInitStruct.PLL2.PLL2Q = 15; PeriphClkInitStruct.PLL2.PLL2R = 4; - PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2_VCIRANGE_2; + PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2_VCIRANGE_1; PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2_VCORANGE_WIDE; PeriphClkInitStruct.PLL2.PLL2FRACN = 0; PeriphClkInitStruct.PLL2.PLL2ClockOut = RCC_PLL2_DIVQ | RCC_PLL2_DIVR; - PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q; PeriphClkInitStruct.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_PLL2R; + PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q; PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; PeriphClkInitStruct.Spi1ClockSelection = RCC_SPI1CLKSOURCE_PLL1Q; PeriphClkInitStruct.Spi2ClockSelection = RCC_SPI2CLKSOURCE_PLL1Q; diff --git a/variants/STM32H5xx/H503RBT/variant_NUCLEO_H503RB.cpp b/variants/STM32H5xx/H503RBT/variant_NUCLEO_H503RB.cpp index 1bdf66f48a..e3dfb8cbb2 100644 --- a/variants/STM32H5xx/H503RBT/variant_NUCLEO_H503RB.cpp +++ b/variants/STM32H5xx/H503RBT/variant_NUCLEO_H503RB.cpp @@ -109,7 +109,8 @@ WEAK void SystemClock_Config(void) RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {}; - /* Configure the main internal regulator output voltage */ + /** Configure the main internal regulator output voltage + */ __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0); while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {} @@ -120,29 +121,32 @@ WEAK void SystemClock_Config(void) HAL_PWR_EnableBkUpAccess(); __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW); - /* Initializes the RCC Oscillators according to the specified parameters in the RCC_OscInitTypeDef structure */ - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_LSE - | RCC_OSCILLATORTYPE_CSI; - RCC_OscInitStruct.LSEState = RCC_LSE_ON; - RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; + /** Initializes the RCC Oscillators according to the specified parameters + * in the RCC_OscInitTypeDef structure. + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_CSI | RCC_OSCILLATORTYPE_HSI48 + | RCC_OSCILLATORTYPE_LSE; RCC_OscInitStruct.CSIState = RCC_CSI_ON; RCC_OscInitStruct.CSICalibrationValue = RCC_CSICALIBRATION_DEFAULT; + RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; + RCC_OscInitStruct.LSEState = RCC_LSE_ON; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLL1_SOURCE_CSI; - RCC_OscInitStruct.PLL.PLLM = 1; - RCC_OscInitStruct.PLL.PLLN = 125; + RCC_OscInitStruct.PLL.PLLM = 2; + RCC_OscInitStruct.PLL.PLLN = 250; RCC_OscInitStruct.PLL.PLLP = 2; RCC_OscInitStruct.PLL.PLLQ = 10; RCC_OscInitStruct.PLL.PLLR = 2; - RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_2; + RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_1; RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1_VCORANGE_WIDE; RCC_OscInitStruct.PLL.PLLFRACN = 0; if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { Error_Handler(); } - /* Initializes the CPU, AHB and APB buses clocks */ - RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK + /** Initializes the CPU, AHB and APB buses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_PCLK3; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; @@ -150,7 +154,6 @@ WEAK void SystemClock_Config(void) RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; RCC_ClkInitStruct.APB3CLKDivider = RCC_HCLK_DIV1; - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) { Error_Handler(); } @@ -159,22 +162,23 @@ WEAK void SystemClock_Config(void) */ __HAL_FLASH_SET_PROGRAM_DELAY(FLASH_PROGRAMMING_DELAY_2); - /* Initializes the peripherals clock */ - PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB | RCC_PERIPHCLK_ADCDAC - | RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_SPI1 + /** Initializes the peripherals clock + */ + PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_ADCDAC | RCC_PERIPHCLK_LPUART1 + | RCC_PERIPHCLK_USB | RCC_PERIPHCLK_SPI1 | RCC_PERIPHCLK_SPI2 | RCC_PERIPHCLK_SPI3; PeriphClkInitStruct.PLL2.PLL2Source = RCC_PLL2_SOURCE_CSI; - PeriphClkInitStruct.PLL2.PLL2M = 1; - PeriphClkInitStruct.PLL2.PLL2N = 125; + PeriphClkInitStruct.PLL2.PLL2M = 2; + PeriphClkInitStruct.PLL2.PLL2N = 250; PeriphClkInitStruct.PLL2.PLL2P = 2; PeriphClkInitStruct.PLL2.PLL2Q = 15; PeriphClkInitStruct.PLL2.PLL2R = 4; - PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2_VCIRANGE_2; + PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2_VCIRANGE_1; PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2_VCORANGE_WIDE; PeriphClkInitStruct.PLL2.PLL2FRACN = 0; PeriphClkInitStruct.PLL2.PLL2ClockOut = RCC_PLL2_DIVQ | RCC_PLL2_DIVR; - PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q; PeriphClkInitStruct.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_PLL2R; + PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q; PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; PeriphClkInitStruct.Spi1ClockSelection = RCC_SPI1CLKSOURCE_PLL1Q; PeriphClkInitStruct.Spi2ClockSelection = RCC_SPI2CLKSOURCE_PLL1Q; diff --git a/variants/STM32H5xx/H503RBT/variant_NUCLEO_H503RB.h b/variants/STM32H5xx/H503RBT/variant_NUCLEO_H503RB.h index f9b1282e19..ac10a32bce 100644 --- a/variants/STM32H5xx/H503RBT/variant_NUCLEO_H503RB.h +++ b/variants/STM32H5xx/H503RBT/variant_NUCLEO_H503RB.h @@ -157,13 +157,14 @@ #define PIN_SERIAL_TX PA4 #endif -#define HSE_VALUE 24000000UL /*!< Value of the External oscillator in Hz */ - // Extra HAL modules #if !defined(HAL_DAC_MODULE_DISABLED) #define HAL_DAC_MODULE_ENABLED #endif +// Value of the External oscillator in Hz +#define HSE_VALUE 24000000UL + /*---------------------------------------------------------------------------- * Arduino objects - C++ only *----------------------------------------------------------------------------*/ @@ -190,4 +191,4 @@ #ifndef SERIAL_PORT_HARDWARE #define SERIAL_PORT_HARDWARE Serial #endif -#endif \ No newline at end of file +#endif diff --git a/variants/STM32H5xx/H562R(G-I)T/generic_clock.c b/variants/STM32H5xx/H562R(G-I)T/generic_clock.c index 346843eb6d..1a0abf62c2 100644 --- a/variants/STM32H5xx/H562R(G-I)T/generic_clock.c +++ b/variants/STM32H5xx/H562R(G-I)T/generic_clock.c @@ -33,30 +33,29 @@ WEAK void SystemClock_Config(void) /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_LSI - | RCC_OSCILLATORTYPE_CSI; - RCC_OscInitStruct.LSIState = RCC_LSI_ON; - RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_CSI | RCC_OSCILLATORTYPE_HSI48 + | RCC_OSCILLATORTYPE_LSI; RCC_OscInitStruct.CSIState = RCC_CSI_ON; RCC_OscInitStruct.CSICalibrationValue = RCC_CSICALIBRATION_DEFAULT; + RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; + RCC_OscInitStruct.LSIState = RCC_LSI_ON; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLL1_SOURCE_CSI; - RCC_OscInitStruct.PLL.PLLM = 1; - RCC_OscInitStruct.PLL.PLLN = 125; + RCC_OscInitStruct.PLL.PLLM = 2; + RCC_OscInitStruct.PLL.PLLN = 250; RCC_OscInitStruct.PLL.PLLP = 2; RCC_OscInitStruct.PLL.PLLQ = 10; RCC_OscInitStruct.PLL.PLLR = 2; - RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_2; + RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_1; RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1_VCORANGE_WIDE; RCC_OscInitStruct.PLL.PLLFRACN = 0; if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { Error_Handler(); } - /** Initializes the CPU, AHB and APB buses clocks */ - RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_PCLK3; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; @@ -64,7 +63,6 @@ WEAK void SystemClock_Config(void) RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; RCC_ClkInitStruct.APB3CLKDivider = RCC_HCLK_DIV1; - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) { Error_Handler(); } @@ -74,47 +72,42 @@ WEAK void SystemClock_Config(void) __HAL_FLASH_SET_PROGRAM_DELAY(FLASH_PROGRAMMING_DELAY_2); /** Initializes the peripherals clock - */ - PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_ADCDAC | RCC_PERIPHCLK_LPUART1 - | RCC_PERIPHCLK_SDMMC1 | RCC_PERIPHCLK_USB + */ + PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SDMMC1 | RCC_PERIPHCLK_ADCDAC + | RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_USB | RCC_PERIPHCLK_SPI1 | RCC_PERIPHCLK_SPI2 | RCC_PERIPHCLK_SPI3 | RCC_PERIPHCLK_SPI6; PeriphClkInitStruct.PLL2.PLL2Source = RCC_PLL2_SOURCE_CSI; - PeriphClkInitStruct.PLL2.PLL2M = 1; - PeriphClkInitStruct.PLL2.PLL2N = 125; + PeriphClkInitStruct.PLL2.PLL2M = 2; + PeriphClkInitStruct.PLL2.PLL2N = 250; PeriphClkInitStruct.PLL2.PLL2P = 2; PeriphClkInitStruct.PLL2.PLL2Q = 15; - PeriphClkInitStruct.PLL2.PLL2R = 10; - PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2_VCIRANGE_2; + PeriphClkInitStruct.PLL2.PLL2R = 4; + PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2_VCIRANGE_1; PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2_VCORANGE_WIDE; PeriphClkInitStruct.PLL2.PLL2FRACN = 0; PeriphClkInitStruct.PLL2.PLL2ClockOut = RCC_PLL2_DIVQ | RCC_PLL2_DIVR; - PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q; - PeriphClkInitStruct.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_PLL2R; - PeriphClkInitStruct.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_PLL1Q; - PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; - PeriphClkInitStruct.Spi1ClockSelection = RCC_SPI1CLKSOURCE_PLL1Q; - PeriphClkInitStruct.Spi2ClockSelection = RCC_SPI2CLKSOURCE_PLL1Q; - PeriphClkInitStruct.Spi3ClockSelection = RCC_SPI3CLKSOURCE_PLL1Q; PeriphClkInitStruct.PLL3.PLL3Source = RCC_PLL3_SOURCE_CSI; PeriphClkInitStruct.PLL3.PLL3M = 2; PeriphClkInitStruct.PLL3.PLL3N = 125; PeriphClkInitStruct.PLL3.PLL3P = 2; PeriphClkInitStruct.PLL3.PLL3Q = 5; PeriphClkInitStruct.PLL3.PLL3R = 2; - PeriphClkInitStruct.PLL3.PLL3RGE = RCC_PLL3_VCIRANGE_3; + PeriphClkInitStruct.PLL3.PLL3RGE = RCC_PLL3_VCIRANGE_1; PeriphClkInitStruct.PLL3.PLL3VCOSEL = RCC_PLL3_VCORANGE_WIDE; PeriphClkInitStruct.PLL3.PLL3FRACN = 0; PeriphClkInitStruct.PLL3.PLL3ClockOut = RCC_PLL3_DIVQ; + PeriphClkInitStruct.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_PLL1Q; + PeriphClkInitStruct.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_PLL2R; + PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q; + PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; + PeriphClkInitStruct.Spi1ClockSelection = RCC_SPI1CLKSOURCE_PLL1Q; + PeriphClkInitStruct.Spi2ClockSelection = RCC_SPI2CLKSOURCE_PLL1Q; + PeriphClkInitStruct.Spi3ClockSelection = RCC_SPI3CLKSOURCE_PLL1Q; PeriphClkInitStruct.Spi6ClockSelection = RCC_SPI6CLKSOURCE_PLL3Q; - PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL1Q; if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) { Error_Handler(); } - - /** Configure the programming delay - */ - __HAL_FLASH_SET_PROGRAM_DELAY(FLASH_PROGRAMMING_DELAY_2); } #endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32H5xx/H562R(G-I)T/variant_WEACT_H562RG.cpp b/variants/STM32H5xx/H562R(G-I)T/variant_WEACT_H562RG.cpp index de8d46e0f5..181291d8c0 100644 --- a/variants/STM32H5xx/H562R(G-I)T/variant_WEACT_H562RG.cpp +++ b/variants/STM32H5xx/H562R(G-I)T/variant_WEACT_H562RG.cpp @@ -112,30 +112,29 @@ WEAK void SystemClock_Config(void) /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_LSI - | RCC_OSCILLATORTYPE_CSI; - RCC_OscInitStruct.LSIState = RCC_LSI_ON; - RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_CSI | RCC_OSCILLATORTYPE_HSI48 + | RCC_OSCILLATORTYPE_LSI; RCC_OscInitStruct.CSIState = RCC_CSI_ON; RCC_OscInitStruct.CSICalibrationValue = RCC_CSICALIBRATION_DEFAULT; + RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; + RCC_OscInitStruct.LSIState = RCC_LSI_ON; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLL1_SOURCE_CSI; - RCC_OscInitStruct.PLL.PLLM = 1; - RCC_OscInitStruct.PLL.PLLN = 125; + RCC_OscInitStruct.PLL.PLLM = 2; + RCC_OscInitStruct.PLL.PLLN = 250; RCC_OscInitStruct.PLL.PLLP = 2; RCC_OscInitStruct.PLL.PLLQ = 10; RCC_OscInitStruct.PLL.PLLR = 2; - RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_2; + RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_1; RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1_VCORANGE_WIDE; RCC_OscInitStruct.PLL.PLLFRACN = 0; if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { Error_Handler(); } - /** Initializes the CPU, AHB and APB buses clocks */ - RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_PCLK3; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; @@ -143,7 +142,6 @@ WEAK void SystemClock_Config(void) RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; RCC_ClkInitStruct.APB3CLKDivider = RCC_HCLK_DIV1; - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) { Error_Handler(); } @@ -153,40 +151,39 @@ WEAK void SystemClock_Config(void) __HAL_FLASH_SET_PROGRAM_DELAY(FLASH_PROGRAMMING_DELAY_2); /** Initializes the peripherals clock - */ - PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_ADCDAC | RCC_PERIPHCLK_LPUART1 - | RCC_PERIPHCLK_SDMMC1 | RCC_PERIPHCLK_USB + */ + PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SDMMC1 | RCC_PERIPHCLK_ADCDAC + | RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_USB | RCC_PERIPHCLK_SPI1 | RCC_PERIPHCLK_SPI2 | RCC_PERIPHCLK_SPI3 | RCC_PERIPHCLK_SPI6; PeriphClkInitStruct.PLL2.PLL2Source = RCC_PLL2_SOURCE_CSI; - PeriphClkInitStruct.PLL2.PLL2M = 1; - PeriphClkInitStruct.PLL2.PLL2N = 125; + PeriphClkInitStruct.PLL2.PLL2M = 2; + PeriphClkInitStruct.PLL2.PLL2N = 250; PeriphClkInitStruct.PLL2.PLL2P = 2; PeriphClkInitStruct.PLL2.PLL2Q = 15; - PeriphClkInitStruct.PLL2.PLL2R = 10; - PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2_VCIRANGE_2; + PeriphClkInitStruct.PLL2.PLL2R = 4; + PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2_VCIRANGE_1; PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2_VCORANGE_WIDE; PeriphClkInitStruct.PLL2.PLL2FRACN = 0; PeriphClkInitStruct.PLL2.PLL2ClockOut = RCC_PLL2_DIVQ | RCC_PLL2_DIVR; - PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q; - PeriphClkInitStruct.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_PLL2R; - PeriphClkInitStruct.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_PLL1Q; - PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; - PeriphClkInitStruct.Spi1ClockSelection = RCC_SPI1CLKSOURCE_PLL1Q; - PeriphClkInitStruct.Spi2ClockSelection = RCC_SPI2CLKSOURCE_PLL1Q; - PeriphClkInitStruct.Spi3ClockSelection = RCC_SPI3CLKSOURCE_PLL1Q; PeriphClkInitStruct.PLL3.PLL3Source = RCC_PLL3_SOURCE_CSI; PeriphClkInitStruct.PLL3.PLL3M = 2; PeriphClkInitStruct.PLL3.PLL3N = 125; PeriphClkInitStruct.PLL3.PLL3P = 2; PeriphClkInitStruct.PLL3.PLL3Q = 5; PeriphClkInitStruct.PLL3.PLL3R = 2; - PeriphClkInitStruct.PLL3.PLL3RGE = RCC_PLL3_VCIRANGE_3; + PeriphClkInitStruct.PLL3.PLL3RGE = RCC_PLL3_VCIRANGE_1; PeriphClkInitStruct.PLL3.PLL3VCOSEL = RCC_PLL3_VCORANGE_WIDE; PeriphClkInitStruct.PLL3.PLL3FRACN = 0; PeriphClkInitStruct.PLL3.PLL3ClockOut = RCC_PLL3_DIVQ; + PeriphClkInitStruct.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_PLL1Q; + PeriphClkInitStruct.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_PLL2R; + PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q; + PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; + PeriphClkInitStruct.Spi1ClockSelection = RCC_SPI1CLKSOURCE_PLL1Q; + PeriphClkInitStruct.Spi2ClockSelection = RCC_SPI2CLKSOURCE_PLL1Q; + PeriphClkInitStruct.Spi3ClockSelection = RCC_SPI3CLKSOURCE_PLL1Q; PeriphClkInitStruct.Spi6ClockSelection = RCC_SPI6CLKSOURCE_PLL3Q; - PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL1Q; if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) { Error_Handler(); } diff --git a/variants/STM32H5xx/H562R(G-I)T/variant_WEACT_H562RG.h b/variants/STM32H5xx/H562R(G-I)T/variant_WEACT_H562RG.h index 795a583011..7de50c267b 100644 --- a/variants/STM32H5xx/H562R(G-I)T/variant_WEACT_H562RG.h +++ b/variants/STM32H5xx/H562R(G-I)T/variant_WEACT_H562RG.h @@ -222,8 +222,6 @@ P1 P2 #define HAL_SD_MODULE_ENABLED #endif -#define HSE_VALUE 8000000UL - // SD card slot Definitions // SDMMC signals not available #define SDMMC_CDIR_NA @@ -257,6 +255,8 @@ P1 P2 #define SDX_CK PC12 #endif +#define HSE_VALUE 8000000UL + /*---------------------------------------------------------------------------- * Arduino objects - C++ only *----------------------------------------------------------------------------*/ diff --git a/variants/STM32H5xx/H563IIKxQ_H573IIKxQ/generic_clock.c b/variants/STM32H5xx/H563IIKxQ_H573IIKxQ/generic_clock.c index 341cde4070..804709efd0 100644 --- a/variants/STM32H5xx/H563IIKxQ_H573IIKxQ/generic_clock.c +++ b/variants/STM32H5xx/H563IIKxQ_H573IIKxQ/generic_clock.c @@ -33,20 +33,20 @@ WEAK void SystemClock_Config(void) /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_LSI - | RCC_OSCILLATORTYPE_CSI; - RCC_OscInitStruct.LSIState = RCC_LSI_ON; - RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_CSI | RCC_OSCILLATORTYPE_HSI48 + | RCC_OSCILLATORTYPE_LSI; RCC_OscInitStruct.CSIState = RCC_CSI_ON; RCC_OscInitStruct.CSICalibrationValue = RCC_CSICALIBRATION_DEFAULT; + RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; + RCC_OscInitStruct.LSIState = RCC_LSI_ON; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLL1_SOURCE_CSI; - RCC_OscInitStruct.PLL.PLLM = 1; - RCC_OscInitStruct.PLL.PLLN = 125; + RCC_OscInitStruct.PLL.PLLM = 2; + RCC_OscInitStruct.PLL.PLLN = 250; RCC_OscInitStruct.PLL.PLLP = 2; RCC_OscInitStruct.PLL.PLLQ = 10; RCC_OscInitStruct.PLL.PLLR = 2; - RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_2; + RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_1; RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1_VCORANGE_WIDE; RCC_OscInitStruct.PLL.PLLFRACN = 0; if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { @@ -55,7 +55,7 @@ WEAK void SystemClock_Config(void) /** Initializes the CPU, AHB and APB buses clocks */ - RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_PCLK3; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; @@ -63,7 +63,6 @@ WEAK void SystemClock_Config(void) RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; RCC_ClkInitStruct.APB3CLKDivider = RCC_HCLK_DIV1; - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) { Error_Handler(); } @@ -74,19 +73,18 @@ WEAK void SystemClock_Config(void) /** Initializes the peripherals clock */ - PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_ADCDAC | RCC_PERIPHCLK_LPUART1 - | RCC_PERIPHCLK_OSPI | RCC_PERIPHCLK_SDMMC1 + PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SDMMC1 | RCC_PERIPHCLK_ADCDAC + | RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_USB | RCC_PERIPHCLK_SPI1 | RCC_PERIPHCLK_SPI2 | RCC_PERIPHCLK_SPI3 | RCC_PERIPHCLK_SPI4 - | RCC_PERIPHCLK_SPI5 | RCC_PERIPHCLK_SPI6 - | RCC_PERIPHCLK_USB; + | RCC_PERIPHCLK_SPI5 | RCC_PERIPHCLK_SPI6; PeriphClkInitStruct.PLL2.PLL2Source = RCC_PLL2_SOURCE_CSI; - PeriphClkInitStruct.PLL2.PLL2M = 1; - PeriphClkInitStruct.PLL2.PLL2N = 125; + PeriphClkInitStruct.PLL2.PLL2M = 2; + PeriphClkInitStruct.PLL2.PLL2N = 250; PeriphClkInitStruct.PLL2.PLL2P = 2; PeriphClkInitStruct.PLL2.PLL2Q = 15; PeriphClkInitStruct.PLL2.PLL2R = 4; - PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2_VCIRANGE_2; + PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2_VCIRANGE_1; PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2_VCORANGE_WIDE; PeriphClkInitStruct.PLL2.PLL2FRACN = 0; PeriphClkInitStruct.PLL2.PLL2ClockOut = RCC_PLL2_DIVQ | RCC_PLL2_DIVR; @@ -96,21 +94,20 @@ WEAK void SystemClock_Config(void) PeriphClkInitStruct.PLL3.PLL3P = 2; PeriphClkInitStruct.PLL3.PLL3Q = 5; PeriphClkInitStruct.PLL3.PLL3R = 2; - PeriphClkInitStruct.PLL3.PLL3RGE = RCC_PLL3_VCIRANGE_3; + PeriphClkInitStruct.PLL3.PLL3RGE = RCC_PLL3_VCIRANGE_1; PeriphClkInitStruct.PLL3.PLL3VCOSEL = RCC_PLL3_VCORANGE_WIDE; PeriphClkInitStruct.PLL3.PLL3FRACN = 0; PeriphClkInitStruct.PLL3.PLL3ClockOut = RCC_PLL3_DIVQ; - PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q; - PeriphClkInitStruct.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_PLL2R; - PeriphClkInitStruct.OspiClockSelection = RCC_OSPICLKSOURCE_HCLK; PeriphClkInitStruct.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_PLL1Q; + PeriphClkInitStruct.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_PLL2R; + PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q; + PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; PeriphClkInitStruct.Spi1ClockSelection = RCC_SPI1CLKSOURCE_PLL1Q; PeriphClkInitStruct.Spi2ClockSelection = RCC_SPI2CLKSOURCE_PLL1Q; PeriphClkInitStruct.Spi3ClockSelection = RCC_SPI3CLKSOURCE_PLL1Q; PeriphClkInitStruct.Spi4ClockSelection = RCC_SPI4CLKSOURCE_PLL3Q; PeriphClkInitStruct.Spi5ClockSelection = RCC_SPI5CLKSOURCE_PLL3Q; PeriphClkInitStruct.Spi6ClockSelection = RCC_SPI6CLKSOURCE_PLL3Q; - PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) { Error_Handler(); } diff --git a/variants/STM32H5xx/H563IIKxQ_H573IIKxQ/variant_STM32H573I_DK.cpp b/variants/STM32H5xx/H563IIKxQ_H573IIKxQ/variant_STM32H573I_DK.cpp index 0d4f520fb1..bff522d755 100644 --- a/variants/STM32H5xx/H563IIKxQ_H573IIKxQ/variant_STM32H573I_DK.cpp +++ b/variants/STM32H5xx/H563IIKxQ_H573IIKxQ/variant_STM32H573I_DK.cpp @@ -205,18 +205,22 @@ WEAK void SystemClock_Config(void) while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {} + /** Configure LSE Drive Capability + * Warning : Only applied when the LSE is disabled. + */ + HAL_PWR_EnableBkUpAccess(); + __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW); + /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSI - | RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_CSI; - RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS_DIGITAL; - RCC_OscInitStruct.HSIState = RCC_HSI_ON; - RCC_OscInitStruct.HSIDiv = RCC_HSI_DIV1; - RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; - RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_CSI | RCC_OSCILLATORTYPE_HSI48 + | RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_LSE; RCC_OscInitStruct.CSIState = RCC_CSI_ON; RCC_OscInitStruct.CSICalibrationValue = RCC_CSICALIBRATION_DEFAULT; + RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; + RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS_DIGITAL; + RCC_OscInitStruct.LSEState = RCC_LSE_ON; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLL1_SOURCE_HSE; RCC_OscInitStruct.PLL.PLLM = 5; @@ -233,7 +237,7 @@ WEAK void SystemClock_Config(void) /** Initializes the CPU, AHB and APB buses clocks */ - RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_PCLK3; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; @@ -241,7 +245,6 @@ WEAK void SystemClock_Config(void) RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; RCC_ClkInitStruct.APB3CLKDivider = RCC_HCLK_DIV1; - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) { Error_Handler(); } @@ -252,44 +255,44 @@ WEAK void SystemClock_Config(void) /** Initializes the peripherals clock */ - PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_ADCDAC | RCC_PERIPHCLK_LPUART1 + PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SDMMC1 | RCC_PERIPHCLK_ADCDAC | RCC_PERIPHCLK_SAI1 | RCC_PERIPHCLK_SAI2 + | RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_USB | RCC_PERIPHCLK_SPI1 | RCC_PERIPHCLK_SPI2 | RCC_PERIPHCLK_SPI3 | RCC_PERIPHCLK_SPI4 - | RCC_PERIPHCLK_SPI5 | RCC_PERIPHCLK_SPI6 - | RCC_PERIPHCLK_SDMMC1 | RCC_PERIPHCLK_USB; - PeriphClkInitStruct.PLL2.PLL2Source = RCC_PLL2_SOURCE_CSI; - PeriphClkInitStruct.PLL2.PLL2M = 1; - PeriphClkInitStruct.PLL2.PLL2N = 32; - PeriphClkInitStruct.PLL2.PLL2P = 1; - PeriphClkInitStruct.PLL2.PLL2Q = 4; - PeriphClkInitStruct.PLL2.PLL2R = 2; + | RCC_PERIPHCLK_SPI5 | RCC_PERIPHCLK_SPI6; + PeriphClkInitStruct.PLL2.PLL2Source = RCC_PLL2_SOURCE_HSE; + PeriphClkInitStruct.PLL2.PLL2M = 5; + PeriphClkInitStruct.PLL2.PLL2N = 100; + PeriphClkInitStruct.PLL2.PLL2P = 2; + PeriphClkInitStruct.PLL2.PLL2Q = 15; + PeriphClkInitStruct.PLL2.PLL2R = 4; PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2_VCIRANGE_2; PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2_VCORANGE_WIDE; PeriphClkInitStruct.PLL2.PLL2FRACN = 0; PeriphClkInitStruct.PLL2.PLL2ClockOut = RCC_PLL2_DIVQ | RCC_PLL2_DIVR; - PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q; - PeriphClkInitStruct.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_PLL2R; - PeriphClkInitStruct.PLL3.PLL3Source = RCC_PLL3_SOURCE_CSI; - PeriphClkInitStruct.PLL3.PLL3M = 2; - PeriphClkInitStruct.PLL3.PLL3N = 125; + PeriphClkInitStruct.PLL3.PLL3Source = RCC_PLL3_SOURCE_HSE; + PeriphClkInitStruct.PLL3.PLL3M = 5; + PeriphClkInitStruct.PLL3.PLL3N = 50; PeriphClkInitStruct.PLL3.PLL3P = 2; PeriphClkInitStruct.PLL3.PLL3Q = 5; PeriphClkInitStruct.PLL3.PLL3R = 2; - PeriphClkInitStruct.PLL3.PLL3RGE = RCC_PLL3_VCIRANGE_3; + PeriphClkInitStruct.PLL3.PLL3RGE = RCC_PLL3_VCIRANGE_2; PeriphClkInitStruct.PLL3.PLL3VCOSEL = RCC_PLL3_VCORANGE_WIDE; PeriphClkInitStruct.PLL3.PLL3FRACN = 0; - PeriphClkInitStruct.PLL3.PLL3ClockOut = RCC_PLL3_DIVQ; - PeriphClkInitStruct.Sai1ClockSelection = RCC_SAI1CLKSOURCE_PLL2P; - PeriphClkInitStruct.Sai2ClockSelection = RCC_SAI2CLKSOURCE_PLL2P; + PeriphClkInitStruct.PLL3.PLL3ClockOut = RCC_PLL3_DIVP | RCC_PLL3_DIVQ; + PeriphClkInitStruct.Sai1ClockSelection = RCC_SAI1CLKSOURCE_PLL3P; + PeriphClkInitStruct.Sai2ClockSelection = RCC_SAI2CLKSOURCE_PLL3P; PeriphClkInitStruct.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_PLL1Q; + PeriphClkInitStruct.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_PLL2R; + PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q; + PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; PeriphClkInitStruct.Spi1ClockSelection = RCC_SPI1CLKSOURCE_PLL1Q; PeriphClkInitStruct.Spi2ClockSelection = RCC_SPI2CLKSOURCE_PLL1Q; PeriphClkInitStruct.Spi3ClockSelection = RCC_SPI3CLKSOURCE_PLL1Q; PeriphClkInitStruct.Spi4ClockSelection = RCC_SPI4CLKSOURCE_PLL3Q; PeriphClkInitStruct.Spi5ClockSelection = RCC_SPI5CLKSOURCE_PLL3Q; PeriphClkInitStruct.Spi6ClockSelection = RCC_SPI6CLKSOURCE_PLL3Q; - PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) { Error_Handler(); } diff --git a/variants/STM32H5xx/H563R(G-I)T_H573RIT/generic_clock.c b/variants/STM32H5xx/H563R(G-I)T_H573RIT/generic_clock.c index 8a4327650f..3ce37be061 100644 --- a/variants/STM32H5xx/H563R(G-I)T_H573RIT/generic_clock.c +++ b/variants/STM32H5xx/H563R(G-I)T_H573RIT/generic_clock.c @@ -34,20 +34,20 @@ WEAK void SystemClock_Config(void) /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_LSI - | RCC_OSCILLATORTYPE_CSI; - RCC_OscInitStruct.LSIState = RCC_LSI_ON; - RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_CSI | RCC_OSCILLATORTYPE_HSI48 + | RCC_OSCILLATORTYPE_LSI; RCC_OscInitStruct.CSIState = RCC_CSI_ON; RCC_OscInitStruct.CSICalibrationValue = RCC_CSICALIBRATION_DEFAULT; + RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; + RCC_OscInitStruct.LSIState = RCC_LSI_ON; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLL1_SOURCE_CSI; - RCC_OscInitStruct.PLL.PLLM = 1; - RCC_OscInitStruct.PLL.PLLN = 125; + RCC_OscInitStruct.PLL.PLLM = 2; + RCC_OscInitStruct.PLL.PLLN = 250; RCC_OscInitStruct.PLL.PLLP = 2; RCC_OscInitStruct.PLL.PLLQ = 10; RCC_OscInitStruct.PLL.PLLR = 2; - RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_2; + RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_1; RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1_VCORANGE_WIDE; RCC_OscInitStruct.PLL.PLLFRACN = 0; if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { @@ -56,7 +56,7 @@ WEAK void SystemClock_Config(void) /** Initializes the CPU, AHB and APB buses clocks */ - RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_PCLK3; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; @@ -64,7 +64,6 @@ WEAK void SystemClock_Config(void) RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; RCC_ClkInitStruct.APB3CLKDivider = RCC_HCLK_DIV1; - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) { Error_Handler(); } @@ -75,38 +74,38 @@ WEAK void SystemClock_Config(void) /** Initializes the peripherals clock */ - PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_ADCDAC | RCC_PERIPHCLK_LPUART1 + PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SDMMC1 | RCC_PERIPHCLK_ADCDAC + | RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_USB | RCC_PERIPHCLK_SPI1 | RCC_PERIPHCLK_SPI2 - | RCC_PERIPHCLK_SPI3 | RCC_PERIPHCLK_SPI6 - | RCC_PERIPHCLK_USB; + | RCC_PERIPHCLK_SPI3 | RCC_PERIPHCLK_SPI6; PeriphClkInitStruct.PLL2.PLL2Source = RCC_PLL2_SOURCE_CSI; - PeriphClkInitStruct.PLL2.PLL2M = 1; - PeriphClkInitStruct.PLL2.PLL2N = 125; + PeriphClkInitStruct.PLL2.PLL2M = 2; + PeriphClkInitStruct.PLL2.PLL2N = 250; PeriphClkInitStruct.PLL2.PLL2P = 2; PeriphClkInitStruct.PLL2.PLL2Q = 15; - PeriphClkInitStruct.PLL2.PLL2R = 8; - PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2_VCIRANGE_2; + PeriphClkInitStruct.PLL2.PLL2R = 4; + PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2_VCIRANGE_1; PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2_VCORANGE_WIDE; PeriphClkInitStruct.PLL2.PLL2FRACN = 0; PeriphClkInitStruct.PLL2.PLL2ClockOut = RCC_PLL2_DIVQ | RCC_PLL2_DIVR; - PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q; - PeriphClkInitStruct.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_PLL2R; - PeriphClkInitStruct.Spi1ClockSelection = RCC_SPI1CLKSOURCE_PLL1Q; - PeriphClkInitStruct.Spi2ClockSelection = RCC_SPI2CLKSOURCE_PLL1Q; - PeriphClkInitStruct.Spi3ClockSelection = RCC_SPI3CLKSOURCE_PLL1Q; PeriphClkInitStruct.PLL3.PLL3Source = RCC_PLL3_SOURCE_CSI; PeriphClkInitStruct.PLL3.PLL3M = 2; PeriphClkInitStruct.PLL3.PLL3N = 125; PeriphClkInitStruct.PLL3.PLL3P = 2; PeriphClkInitStruct.PLL3.PLL3Q = 5; PeriphClkInitStruct.PLL3.PLL3R = 2; - PeriphClkInitStruct.PLL3.PLL3RGE = RCC_PLL3_VCIRANGE_3; + PeriphClkInitStruct.PLL3.PLL3RGE = RCC_PLL3_VCIRANGE_1; PeriphClkInitStruct.PLL3.PLL3VCOSEL = RCC_PLL3_VCORANGE_WIDE; PeriphClkInitStruct.PLL3.PLL3FRACN = 0; PeriphClkInitStruct.PLL3.PLL3ClockOut = RCC_PLL3_DIVQ; - PeriphClkInitStruct.Spi6ClockSelection = RCC_SPI6CLKSOURCE_PLL3Q; + PeriphClkInitStruct.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_PLL1Q; + PeriphClkInitStruct.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_PLL2R; + PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q; PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; - + PeriphClkInitStruct.Spi1ClockSelection = RCC_SPI1CLKSOURCE_PLL1Q; + PeriphClkInitStruct.Spi2ClockSelection = RCC_SPI2CLKSOURCE_PLL1Q; + PeriphClkInitStruct.Spi3ClockSelection = RCC_SPI3CLKSOURCE_PLL1Q; + PeriphClkInitStruct.Spi6ClockSelection = RCC_SPI6CLKSOURCE_PLL3Q; if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) { Error_Handler(); } diff --git a/variants/STM32H5xx/H563Z(G-I)T_H573ZIT/generic_clock.c b/variants/STM32H5xx/H563Z(G-I)T_H573ZIT/generic_clock.c index f983f04d9c..eb6d45bfed 100644 --- a/variants/STM32H5xx/H563Z(G-I)T_H573ZIT/generic_clock.c +++ b/variants/STM32H5xx/H563Z(G-I)T_H573ZIT/generic_clock.c @@ -34,20 +34,20 @@ WEAK void SystemClock_Config(void) /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_LSI - | RCC_OSCILLATORTYPE_CSI; - RCC_OscInitStruct.LSIState = RCC_LSI_ON; - RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_CSI | RCC_OSCILLATORTYPE_HSI48 + | RCC_OSCILLATORTYPE_LSI; RCC_OscInitStruct.CSIState = RCC_CSI_ON; RCC_OscInitStruct.CSICalibrationValue = RCC_CSICALIBRATION_DEFAULT; + RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; + RCC_OscInitStruct.LSIState = RCC_LSI_ON; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLL1_SOURCE_CSI; - RCC_OscInitStruct.PLL.PLLM = 1; - RCC_OscInitStruct.PLL.PLLN = 125; + RCC_OscInitStruct.PLL.PLLM = 2; + RCC_OscInitStruct.PLL.PLLN = 250; RCC_OscInitStruct.PLL.PLLP = 2; RCC_OscInitStruct.PLL.PLLQ = 10; RCC_OscInitStruct.PLL.PLLR = 2; - RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_2; + RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_1; RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1_VCORANGE_WIDE; RCC_OscInitStruct.PLL.PLLFRACN = 0; if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { @@ -56,7 +56,7 @@ WEAK void SystemClock_Config(void) /** Initializes the CPU, AHB and APB buses clocks */ - RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_PCLK3; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; @@ -64,7 +64,6 @@ WEAK void SystemClock_Config(void) RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; RCC_ClkInitStruct.APB3CLKDivider = RCC_HCLK_DIV1; - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) { Error_Handler(); } @@ -76,17 +75,17 @@ WEAK void SystemClock_Config(void) /** Initializes the peripherals clock */ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SDMMC1 | RCC_PERIPHCLK_ADCDAC - | RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_SPI1 - | RCC_PERIPHCLK_SPI2 | RCC_PERIPHCLK_SPI3 - | RCC_PERIPHCLK_SPI4 | RCC_PERIPHCLK_SPI5 - | RCC_PERIPHCLK_SPI6 | RCC_PERIPHCLK_USB; + | RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_USB + | RCC_PERIPHCLK_SPI1 | RCC_PERIPHCLK_SPI2 + | RCC_PERIPHCLK_SPI3 | RCC_PERIPHCLK_SPI4 + | RCC_PERIPHCLK_SPI5 | RCC_PERIPHCLK_SPI6; PeriphClkInitStruct.PLL2.PLL2Source = RCC_PLL2_SOURCE_CSI; - PeriphClkInitStruct.PLL2.PLL2M = 1; - PeriphClkInitStruct.PLL2.PLL2N = 125; + PeriphClkInitStruct.PLL2.PLL2M = 2; + PeriphClkInitStruct.PLL2.PLL2N = 250; PeriphClkInitStruct.PLL2.PLL2P = 2; PeriphClkInitStruct.PLL2.PLL2Q = 15; PeriphClkInitStruct.PLL2.PLL2R = 4; - PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2_VCIRANGE_2; + PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2_VCIRANGE_1; PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2_VCORANGE_WIDE; PeriphClkInitStruct.PLL2.PLL2FRACN = 0; PeriphClkInitStruct.PLL2.PLL2ClockOut = RCC_PLL2_DIVQ | RCC_PLL2_DIVR; @@ -96,20 +95,20 @@ WEAK void SystemClock_Config(void) PeriphClkInitStruct.PLL3.PLL3P = 2; PeriphClkInitStruct.PLL3.PLL3Q = 5; PeriphClkInitStruct.PLL3.PLL3R = 2; - PeriphClkInitStruct.PLL3.PLL3RGE = RCC_PLL3_VCIRANGE_3; + PeriphClkInitStruct.PLL3.PLL3RGE = RCC_PLL3_VCIRANGE_1; PeriphClkInitStruct.PLL3.PLL3VCOSEL = RCC_PLL3_VCORANGE_WIDE; PeriphClkInitStruct.PLL3.PLL3FRACN = 0; PeriphClkInitStruct.PLL3.PLL3ClockOut = RCC_PLL3_DIVQ; - PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q; - PeriphClkInitStruct.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_PLL2R; + PeriphClkInitStruct.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_PLL1Q; PeriphClkInitStruct.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_PLL2R; + PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q; + PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; PeriphClkInitStruct.Spi1ClockSelection = RCC_SPI1CLKSOURCE_PLL1Q; PeriphClkInitStruct.Spi2ClockSelection = RCC_SPI2CLKSOURCE_PLL1Q; PeriphClkInitStruct.Spi3ClockSelection = RCC_SPI3CLKSOURCE_PLL1Q; PeriphClkInitStruct.Spi4ClockSelection = RCC_SPI4CLKSOURCE_PLL3Q; PeriphClkInitStruct.Spi5ClockSelection = RCC_SPI5CLKSOURCE_PLL3Q; PeriphClkInitStruct.Spi6ClockSelection = RCC_SPI6CLKSOURCE_PLL3Q; - PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) { Error_Handler(); } diff --git a/variants/STM32H5xx/H563Z(G-I)T_H573ZIT/variant_NUCLEO_H563ZI.cpp b/variants/STM32H5xx/H563Z(G-I)T_H573ZIT/variant_NUCLEO_H563ZI.cpp index 6446bceb5b..97bea6a4c8 100644 --- a/variants/STM32H5xx/H563Z(G-I)T_H573ZIT/variant_NUCLEO_H563ZI.cpp +++ b/variants/STM32H5xx/H563Z(G-I)T_H573ZIT/variant_NUCLEO_H563ZI.cpp @@ -188,27 +188,30 @@ WEAK void SystemClock_Config(void) /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_LSE; - RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_CSI | RCC_OSCILLATORTYPE_HSI48 + | RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_LSE; + RCC_OscInitStruct.CSIState = RCC_CSI_ON; + RCC_OscInitStruct.CSICalibrationValue = RCC_CSICALIBRATION_DEFAULT; + RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; + RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS_DIGITAL; RCC_OscInitStruct.LSEState = RCC_LSE_ON; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLL1_SOURCE_HSE; RCC_OscInitStruct.PLL.PLLM = 4; RCC_OscInitStruct.PLL.PLLN = 250; RCC_OscInitStruct.PLL.PLLP = 2; - RCC_OscInitStruct.PLL.PLLQ = 2; + RCC_OscInitStruct.PLL.PLLQ = 10; RCC_OscInitStruct.PLL.PLLR = 2; RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_1; RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1_VCORANGE_WIDE; RCC_OscInitStruct.PLL.PLLFRACN = 0; - if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { Error_Handler(); } /** Initializes the CPU, AHB and APB buses clocks */ - RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_PCLK3; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; @@ -216,7 +219,6 @@ WEAK void SystemClock_Config(void) RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; RCC_ClkInitStruct.APB3CLKDivider = RCC_HCLK_DIV1; - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) { Error_Handler(); } @@ -227,42 +229,41 @@ WEAK void SystemClock_Config(void) /** Initializes the peripherals clock */ - PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB | RCC_PERIPHCLK_ADCDAC - | RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_SPI1 - | RCC_PERIPHCLK_SPI2 | RCC_PERIPHCLK_SPI3 - | RCC_PERIPHCLK_SPI4 | RCC_PERIPHCLK_SPI5 - | RCC_PERIPHCLK_SPI6; + PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SDMMC1 | RCC_PERIPHCLK_ADCDAC + | RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_USB + | RCC_PERIPHCLK_SPI1 | RCC_PERIPHCLK_SPI2 + | RCC_PERIPHCLK_SPI3 | RCC_PERIPHCLK_SPI4 + | RCC_PERIPHCLK_SPI5 | RCC_PERIPHCLK_SPI6; PeriphClkInitStruct.PLL2.PLL2Source = RCC_PLL2_SOURCE_HSE; - PeriphClkInitStruct.PLL2.PLL2M = 2; - PeriphClkInitStruct.PLL2.PLL2N = 125; - PeriphClkInitStruct.PLL2.PLL2P = 10; + PeriphClkInitStruct.PLL2.PLL2M = 4; + PeriphClkInitStruct.PLL2.PLL2N = 250; + PeriphClkInitStruct.PLL2.PLL2P = 2; PeriphClkInitStruct.PLL2.PLL2Q = 15; PeriphClkInitStruct.PLL2.PLL2R = 4; - PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2_VCIRANGE_2; + PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2_VCIRANGE_1; PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2_VCORANGE_WIDE; PeriphClkInitStruct.PLL2.PLL2FRACN = 0; - PeriphClkInitStruct.PLL2.PLL2ClockOut = RCC_PLL2_DIVP | RCC_PLL2_DIVQ - | RCC_PLL2_DIVR; + PeriphClkInitStruct.PLL2.PLL2ClockOut = RCC_PLL2_DIVQ | RCC_PLL2_DIVR; PeriphClkInitStruct.PLL3.PLL3Source = RCC_PLL3_SOURCE_HSE; - PeriphClkInitStruct.PLL3.PLL3M = 2; - PeriphClkInitStruct.PLL3.PLL3N = 96; + PeriphClkInitStruct.PLL3.PLL3M = 4; + PeriphClkInitStruct.PLL3.PLL3N = 125; PeriphClkInitStruct.PLL3.PLL3P = 2; - PeriphClkInitStruct.PLL3.PLL3Q = 8; + PeriphClkInitStruct.PLL3.PLL3Q = 5; PeriphClkInitStruct.PLL3.PLL3R = 2; - PeriphClkInitStruct.PLL3.PLL3RGE = RCC_PLL3_VCIRANGE_0; - PeriphClkInitStruct.PLL3.PLL3VCOSEL = RCC_PLL3_VCORANGE_MEDIUM; + PeriphClkInitStruct.PLL3.PLL3RGE = RCC_PLL3_VCIRANGE_1; + PeriphClkInitStruct.PLL3.PLL3VCOSEL = RCC_PLL3_VCORANGE_WIDE; PeriphClkInitStruct.PLL3.PLL3FRACN = 0; PeriphClkInitStruct.PLL3.PLL3ClockOut = RCC_PLL3_DIVQ; - PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q; + PeriphClkInitStruct.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_PLL1Q; PeriphClkInitStruct.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_PLL2R; - PeriphClkInitStruct.Spi1ClockSelection = RCC_SPI1CLKSOURCE_PLL2P; - PeriphClkInitStruct.Spi2ClockSelection = RCC_SPI2CLKSOURCE_PLL2P; - PeriphClkInitStruct.Spi3ClockSelection = RCC_SPI3CLKSOURCE_PLL2P; + PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q; + PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; + PeriphClkInitStruct.Spi1ClockSelection = RCC_SPI1CLKSOURCE_PLL1Q; + PeriphClkInitStruct.Spi2ClockSelection = RCC_SPI2CLKSOURCE_PLL1Q; + PeriphClkInitStruct.Spi3ClockSelection = RCC_SPI3CLKSOURCE_PLL1Q; PeriphClkInitStruct.Spi4ClockSelection = RCC_SPI4CLKSOURCE_PLL3Q; PeriphClkInitStruct.Spi5ClockSelection = RCC_SPI5CLKSOURCE_PLL3Q; PeriphClkInitStruct.Spi6ClockSelection = RCC_SPI6CLKSOURCE_PLL3Q; - PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL3Q; - if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) { Error_Handler(); } diff --git a/variants/STM32H5xx/H563Z(G-I)T_H573ZIT/variant_NUCLEO_H563ZI.h b/variants/STM32H5xx/H563Z(G-I)T_H573ZIT/variant_NUCLEO_H563ZI.h index 0019181e6b..6741386632 100644 --- a/variants/STM32H5xx/H563Z(G-I)T_H573ZIT/variant_NUCLEO_H563ZI.h +++ b/variants/STM32H5xx/H563Z(G-I)T_H573ZIT/variant_NUCLEO_H563ZI.h @@ -254,12 +254,12 @@ #define HAL_SD_MODULE_ENABLED #endif -// Value of the HSE Bypass in Hz -#define HSE_VALUE 8000000U - // Pin UCPD to configure TCPP in default Type-C legacy state (UCPD_DBn for TCPP01) #define PIN_UCPD_TCPP PA9 +// Value of the HSE Bypass in Hz +#define HSE_VALUE 8000000U + /*---------------------------------------------------------------------------- * Arduino objects - C++ only *----------------------------------------------------------------------------*/ From 55e4695ce625d24758b96756b6e7dbda8d09b35e Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Mon, 31 Mar 2025 16:43:27 +0200 Subject: [PATCH 14/44] ci: harden python scripts Signed-off-by: Frederic Pillon --- CI/update/fqbn.py | 5 +- CI/update/stm32cube.py | 70 +++++++++++------------ CI/update/stm32svd.py | 8 +-- CI/update/stm32variant.py | 115 ++++++++++++++++++-------------------- CI/update/stm32wrapper.py | 56 +++++++++---------- 5 files changed, 122 insertions(+), 132 deletions(-) diff --git a/CI/update/fqbn.py b/CI/update/fqbn.py index 4c9dde4e5e..25d0033907 100644 --- a/CI/update/fqbn.py +++ b/CI/update/fqbn.py @@ -66,7 +66,7 @@ def get_fqbn_list(): for fqbn in fqbn_list_tmp: try: output = subprocess.check_output( - [arduino_cli, "board", "details", "--format", "json", fqbn], + [arduino_cli, "board", "details", "--format", "json", "-b", fqbn], stderr=subprocess.DEVNULL, ).decode("utf-8") board_detail = json.loads(output) @@ -106,8 +106,7 @@ def main(): arg_board_pattern = re.compile(args.board, re.IGNORECASE) for fqbn in fqbn_list: - if args.board: - if arg_board_pattern.search(fqbn) is None: + if args.board and arg_board_pattern.search(fqbn) is None: continue print(fqbn) diff --git a/CI/update/stm32cube.py b/CI/update/stm32cube.py index 09e0db29fb..5732fa769e 100644 --- a/CI/update/stm32cube.py +++ b/CI/update/stm32cube.py @@ -96,9 +96,8 @@ def checkConfig(): config_file_path = script_path / "update_config.json" if config_file_path.is_file(): try: - config_file = open(config_file_path, "r") - path_config = json.load(config_file) - config_file.close() + with open(config_file_path, "r") as config_file: + path_config = json.load(config_file) # Common path if "REPO_LOCAL_PATH" not in path_config: path_config["REPO_LOCAL_PATH"] = str(repo_local_path) @@ -201,9 +200,8 @@ def createSystemFiles(serie): stm32_hal_conf_file = system_serie / stm32yyxx_hal_conf_file.replace( "yy", serie.lower() ) - out_file = open(stm32_hal_conf_file, "w", newline="\n") - out_file.write(stm32yyxx_hal_conf_file_template.render(serie=serie)) - out_file.close() + with open(stm32_hal_conf_file, "w", newline="\n") as out_file: + out_file.write(stm32yyxx_hal_conf_file_template.render(serie=serie)) # Copy system_stm32*.c file from CMSIS device template system_stm32_path = cmsis_dest_path / f"STM32{serie}xx" / "Source" / "Templates" filelist = sorted(system_stm32_path.glob("system_stm32*.c")) @@ -365,36 +363,36 @@ def parseVersion(path, patterns): sub1_found = False sub2_found = False rc_found = False - - for i, line in enumerate(open(path, encoding="utf8", errors="ignore")): - for match in re.finditer(patterns[0], line): - VERSION_MAIN = int(match.group(1), 16) - main_found = True - for match in re.finditer(patterns[1], line): - VERSION_SUB1 = int(match.group(1), 16) - sub1_found = True - for match in re.finditer(patterns[2], line): - VERSION_SUB2 = int(match.group(1), 16) - sub2_found = True - for match in re.finditer(patterns[3], line): - VERSION_RC = int(match.group(1), 16) - rc_found = True - if main_found and sub1_found and sub2_found and rc_found: - break - else: - print(f"Could not find the full version in {path}") - if main_found: - print(f"main version found: {VERSION_MAIN}") - VERSION_MAIN = "FF" - if sub1_found: - print(f"sub1 version found: {VERSION_SUB1}") - VERSION_SUB1 = "FF" - if sub2_found: - print(f"sub2 version found: {VERSION_SUB2}") - VERSION_SUB2 = "FF" - if rc_found: - print(f"rc version found: {VERSION_RC}") - VERSION_RC = "FF" + with open(path, encoding="utf8", errors="ignore") as fp: + for _i, line in enumerate(fp): + for match in re.finditer(patterns[0], line): + VERSION_MAIN = int(match.group(1), 16) + main_found = True + for match in re.finditer(patterns[1], line): + VERSION_SUB1 = int(match.group(1), 16) + sub1_found = True + for match in re.finditer(patterns[2], line): + VERSION_SUB2 = int(match.group(1), 16) + sub2_found = True + for match in re.finditer(patterns[3], line): + VERSION_RC = int(match.group(1), 16) + rc_found = True + if main_found and sub1_found and sub2_found and rc_found: + break + else: + print(f"Could not find the full version in {path}") + if main_found: + print(f"main version found: {VERSION_MAIN}") + VERSION_MAIN = "FF" + if sub1_found: + print(f"sub1 version found: {VERSION_SUB1}") + VERSION_SUB1 = "FF" + if sub2_found: + print(f"sub2 version found: {VERSION_SUB2}") + VERSION_SUB2 = "FF" + if rc_found: + print(f"rc version found: {VERSION_RC}") + VERSION_RC = "FF" ret = f"{VERSION_MAIN}.{VERSION_SUB1}.{VERSION_SUB2}" diff --git a/CI/update/stm32svd.py b/CI/update/stm32svd.py index 199c8baab1..aa2babb28b 100644 --- a/CI/update/stm32svd.py +++ b/CI/update/stm32svd.py @@ -28,9 +28,8 @@ def checkConfig(): config_file_path = script_path / "update_config.json" if config_file_path.is_file(): try: - config_file = open(config_file_path, "r") - path_config = json.load(config_file) - config_file.close() + with open(config_file_path, "r") as config_file: + path_config = json.load(config_file) if "STM32CUBECLT_PATH" not in path_config: path_config["STM32CUBECLT_PATH"] = str( @@ -159,8 +158,9 @@ def main(): for serie in stm32_list: serie_dir = stm32_svd_dir / f"STM32{serie}xx" if not any(serie_dir.glob("*")): - print (f"Folder {serie_dir} is empty.") + print(f"Folder {serie_dir} is empty.") serie_dir.rmdir() + if __name__ == "__main__": main() diff --git a/CI/update/stm32variant.py b/CI/update/stm32variant.py index bfc9facc62..95181242a7 100644 --- a/CI/update/stm32variant.py +++ b/CI/update/stm32variant.py @@ -382,9 +382,8 @@ def get_gpio_af_numF1_default(pintofind, iptofind): # return "AFIO_" + iptofind .split("_")[0] + "_DISABLE" ip = iptofind.split("_")[0] afio_default = "AFIO_NONE" - if pintofind in default_afio_f1: - if ip in default_afio_f1[pintofind]: - afio_default = default_afio_f1[pintofind][ip] + if pintofind in default_afio_f1 and ip in default_afio_f1[pintofind]: + afio_default = default_afio_f1[pintofind][ip] return afio_default @@ -559,10 +558,9 @@ def store_xspi(pin, name, signal): # Store SYS pins def store_sys(pin, name, signal): - if "_WKUP" in signal: - if not any(pin.replace("_C", "") in i for i in syswkup_list): - signal = signal.replace("PWR", "SYS") - syswkup_list.append([pin, name, signal]) + if "_WKUP" in signal and not any(pin.replace("_C", "") in i for i in syswkup_list): + signal = signal.replace("PWR", "SYS") + syswkup_list.append([pin, name, signal]) # Store USB pins @@ -1341,7 +1339,7 @@ def print_pinamevar(): alt_syswkup_list = [] for idx, syswkup_list in enumerate(syswkup_pins_list, start=1): if len(syswkup_list) > 1: - for idx2, lst in enumerate(syswkup_list[1:], start=1): + for idx2, _lst in enumerate(syswkup_list[1:], start=1): alt_syswkup_list.append(f"{idx}_{idx2}") return alt_syswkup_list @@ -1375,13 +1373,13 @@ def spi_pins_variant(): for ss in spissel_list: ss_inst = ss[2].split("_", 1)[0] if mosi_inst == ss_inst: - if "PNUM_NOT_DEFINED" == ss_pin: + if ss_pin == "PNUM_NOT_DEFINED": ss_pin = ss[0].replace("_", "", 1) - elif "PNUM_NOT_DEFINED" == ss1_pin: + elif ss1_pin == "PNUM_NOT_DEFINED": ss1_pin = ss[0].replace("_", "", 1) - elif "PNUM_NOT_DEFINED" == ss2_pin: + elif ss2_pin == "PNUM_NOT_DEFINED": ss2_pin = ss[0].replace("_", "", 1) - elif "PNUM_NOT_DEFINED" == ss3_pin: + elif ss3_pin == "PNUM_NOT_DEFINED": ss3_pin = ss[0].replace("_", "", 1) break break @@ -1449,7 +1447,7 @@ def serial_pins_variant(): print("No serial instance number found!") serialnum = "-1" else: - serialtx_pin = serialtx_pin = "PNUM_NOT_DEFINED" + serialtx_pin = "PNUM_NOT_DEFINED" serialnum = "-1" print("No serial found!") return dict(instance=serialnum, rx=serialrx_pin, tx=serialtx_pin) @@ -1653,10 +1651,13 @@ def search_product_line(valueline: str, extra: str) -> str: else: break if pline >= vline: - if extra and len(product_line_list) > idx_pline + 1: - if product_line_list[idx_pline + 1] == (product_line + extra): - # Look for the next product line if contains the extra - product_line = product_line_list[idx_pline + 1] + if ( + extra + and len(product_line_list) > idx_pline + 1 + and product_line_list[idx_pline + 1] == (product_line + extra) + ): + # Look for the next product line if contains the extra + product_line = product_line_list[idx_pline + 1] break else: # In case of CMSIS device does not exist @@ -1700,9 +1701,7 @@ def parse_stm32targets(): def search_svdfile(mcu_name): - svd_file = "" - if mcu_name in svd_dict: - svd_file = svd_dict[mcu_name] + svd_file = svd_dict.get(mcu_name, "") return svd_file @@ -2275,7 +2274,7 @@ def merge_dir(out_temp_path, group_mcu_dir, mcu_family, periph_xml, variant_exp) # Save board entry skip = False with open(dir_name / boards_entry_filename) as fp: - for index, line in enumerate(fp): + for _index, line in enumerate(fp): # Skip until next empty line (included) if skip: if line == "\n": @@ -2391,24 +2390,23 @@ def aggregate_dir(): periph_xml_tmp = [] variant_exp_tmp = [] for index2, fname in enumerate(mcu_dir1_files_list): - with open(fname, "r") as f1: - with open(mcu_dir2_files_list[index2], "r") as f2: - diff = set(f1).symmetric_difference(f2) - diff.discard("\n") - if not diff or len(diff) == 2: - if index2 == 0: - for line in diff: - periph_xml_tmp += periperalpins_regex.findall( - line - ) - elif index2 == 2: - for line in diff: - variant_exp_tmp += variant_regex.findall(line) - continue - else: - # Not the same directory compare with the next one - index += 1 - break + with open(fname, "r") as f1, open( + mcu_dir2_files_list[index2], "r" + ) as f2: + diff = set(f1).symmetric_difference(f2) + diff.discard("\n") + if not diff or len(diff) == 2: + if index2 == 0: + for line in diff: + periph_xml_tmp += periperalpins_regex.findall(line) + elif index2 == 2: + for line in diff: + variant_exp_tmp += variant_regex.findall(line) + continue + else: + # Not the same directory compare with the next one + index += 1 + break # All files compared and matched else: # Concatenate lists without duplicate @@ -2505,10 +2503,11 @@ def checkConfig(): default_cubemxdir() if config_filename.is_file(): try: - config_file = open(config_filename, "r") - path_config = json.load(config_file) - config_file.close() - + # config_file = open(config_filename, "r") + # path_config = json.load(config_file) + # config_file.close() + with open(config_filename, "r") as config_file: + path_config = json.load(config_file) if "REPO_LOCAL_PATH" not in path_config: path_config["REPO_LOCAL_PATH"] = str(repo_local_path) defaultConfig(config_filename, path_config) @@ -2779,21 +2778,21 @@ def manage_repo(): generic_clock_filepath = out_temp_path / generic_clock_filename out_temp_path.mkdir(parents=True, exist_ok=True) - # open output file - periph_c_file = open(periph_c_filepath, "w", newline="\n") - pinvar_h_file = open(pinvar_h_filepath, "w", newline="\n") - variant_cpp_file = open(variant_cpp_filepath, "w", newline="\n") - variant_h_file = open(variant_h_filepath, "w", newline="\n") - boards_entry_file = open(boards_entry_filepath, "w", newline="\n") - generic_clock_file = open(generic_clock_filepath, "w", newline="\n") parse_pins() manage_af_and_alternate() - generic_list = print_boards_entry() - print_general_clock(generic_list) - print_peripheral() - alt_syswkup_list = print_pinamevar() - print_variant(generic_list, alt_syswkup_list) + with open(boards_entry_filepath, "w", newline="\n") as boards_entry_file: + generic_list = print_boards_entry() + with open(generic_clock_filepath, "w", newline="\n") as generic_clock_file: + print_general_clock(generic_list) + with open(periph_c_filepath, "w", newline="\n") as periph_c_file: + print_peripheral() + with open(pinvar_h_filepath, "w", newline="\n") as pinvar_h_file: + alt_syswkup_list = print_pinamevar() + with open(variant_cpp_filepath, "w", newline="\n") as variant_cpp_file, open( + variant_h_filepath, "w", newline="\n" + ) as variant_h_file: + print_variant(generic_list, alt_syswkup_list) del alt_syswkup_list[:] del generic_list[:] sum_io = len(io_list) + len(alt_list) + len(dualpad_list) + len(remap_list) @@ -2810,12 +2809,6 @@ def manage_repo(): clean_all_lists() - periph_c_file.close() - pinvar_h_file.close() - variant_h_file.close() - variant_cpp_file.close() - boards_entry_file.close() - generic_clock_file.close() xml_mcu.unlink() xml_gpio.unlink() diff --git a/CI/update/stm32wrapper.py b/CI/update/stm32wrapper.py index ac1d24d917..2132944c71 100644 --- a/CI/update/stm32wrapper.py +++ b/CI/update/stm32wrapper.py @@ -129,9 +129,8 @@ def printCMSISStartup(log): vline = valueline[1].upper().replace("X", "x") cm = valueline[2].upper() cmsis_list.append({"vline": vline, "fn": fn, "cm": cm}) - out_file = open(CMSIS_Startupfile, "w", newline="\n") - out_file.write(stm32_def_build_template.render(cmsis_list=cmsis_list)) - out_file.close() + with open(CMSIS_Startupfile, "w", newline="\n") as out_file: + out_file.write(stm32_def_build_template.render(cmsis_list=cmsis_list)) else: if log: print("No startup files found!") @@ -145,9 +144,8 @@ def printSystemSTM32(log): system_list = [] for fp in filelist: system_list.append({"serie": fp.parent.name, "fn": fp.name}) - out_file = open(system_stm32_outfile, "w", newline="\n") - out_file.write(system_stm32_template.render(system_list=system_list)) - out_file.close() + with open(system_stm32_outfile, "w", newline="\n") as out_file: + out_file.write(system_stm32_template.render(system_list=system_list)) else: if log: print("No system stm32 files found!") @@ -186,7 +184,7 @@ def wrap(arg_core, arg_cmsis, log): # Search stm32yyxx_[hal|ll]*.c file filelist = src.glob(f"**/stm32{lower}xx_*.c") for fp in filelist: - legacy = True if fp.parent.name == "Legacy" else False + legacy = fp.parent.name == "Legacy" # File name fn = fp.name found = peripheral_c_regex.match(fn) @@ -242,30 +240,32 @@ def wrap(arg_core, arg_cmsis, log): filepath = HALoutSrc_path / c_file.replace("zz", "hal").replace("_ppp", "") else: filepath = HALoutSrc_path / c_file.replace("zz", "hal").replace("ppp", key) - out_file = open(filepath, "w", newline="\n") - out_file.write(c_file_template.render(periph=key, type="hal", serieslist=value)) - out_file.close() + with open(filepath, "w", newline="\n") as out_file: + out_file.write( + c_file_template.render(periph=key, type="hal", serieslist=value) + ) # Generate stm32yyxx_ll_*.c file for key, value in ll_c_dict.items(): filepath = LLoutSrc_path / c_file.replace("zz", "ll").replace("ppp", key) - out_file = open(filepath, "w", newline="\n") - out_file.write(c_file_template.render(periph=key, type="ll", serieslist=value)) - out_file.close() + with open(filepath, "w", newline="\n") as out_file: + out_file.write( + c_file_template.render(periph=key, type="ll", serieslist=value) + ) # Generate stm32yyxx_ll_*.h file for key, value in ll_h_dict.items(): filepath = LLoutInc_path / ll_h_file.replace("ppp", key) - out_file = open(filepath, "w", newline="\n") - out_file.write(ll_h_file_template.render(periph=key, serieslist=value)) - out_file.close() + with open(filepath, "w", newline="\n") as out_file: + out_file.write(ll_h_file_template.render(periph=key, serieslist=value)) if log: print("done") # Filter all LL header file all_ll_h_list = sorted(set(all_ll_h_list)) # Generate the all LL header file - all_ll_file = open(LLoutInc_path / all_ll_h_file, "w", newline="\n") - all_ll_file.write(all_ll_header_file_template.render(ll_header_list=all_ll_h_list)) - all_ll_file.close() + with open(LLoutInc_path / all_ll_h_file, "w", newline="\n") as all_ll_file: + all_ll_file.write( + all_ll_header_file_template.render(ll_header_list=all_ll_h_list) + ) # CMSIS startup files printCMSISStartup(log) @@ -280,15 +280,15 @@ def wrap(arg_core, arg_cmsis, log): # Delete all subfolders deleteFolder(CMSIS_DSP_outSrc_path / "*") for path_object in CMSIS_DSPSrc_path.glob("**/*"): - if path_object.is_file(): - if path_object.name.endswith(".c"): - dn = path_object.parent.name - fn = path_object.name - if dn in fn: - fdn = CMSIS_DSP_outSrc_path / dn - out_file = open(fdn / (f"{fn}"), "w", newline="\n") - out_file.write(dsp_file_template.render(dsp_dir=dn, dsp_name=fn)) - out_file.close() + if path_object.is_file() and path_object.name.endswith(".c"): + dn = path_object.parent.name + fn = path_object.name + if dn in fn: + fdn = CMSIS_DSP_outSrc_path / dn + with open(fdn / (f"{fn}"), "w", newline="\n") as out_file: + out_file.write( + dsp_file_template.render(dsp_dir=dn, dsp_name=fn) + ) return 0 From b4aa21ddd116325801d737ea1fa934e325bcb17a Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Fri, 18 Apr 2025 09:19:12 +0200 Subject: [PATCH 15/44] fix(doc): update url Signed-off-by: Frederic Pillon --- README.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/README.md b/README.md index f8b7b0bd73..8f150229d9 100644 --- a/README.md +++ b/README.md @@ -818,7 +818,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d | :green_heart: | STM32F446VE | [RUMBA32](https://github.com/Aus3D/RUMBA32) | *1.5.0* | | | :green_heart: | STM32F401VE | [STEVAL-3DP001V1](https://www.st.com/en/evaluation-tools/steval-3dp001v1.html) | *1.6.0* | | | :green_heart: | STM32F446RE | VAkE v1.0 | *1.6.0* | | -| :green_heart: | STM32F446VE | [FYSETC_S6](https://wiki.fysetc.com/FYSETC_S6/) | *1.9.0* | | +| :green_heart: | STM32F446VE | [FYSETC_S6](https://wiki.fysetc.com/docs/FYSETCS6) | *1.9.0* | | | :green_heart: | STM32G0B1CB | [BTT EBB42 CAN V1.1](https://github.com/bigtreetech/EBB/tree/master) | *2.4.0* | | ### [Blues](https://blues.com/) boards From 5d402d921de02ef67264ba3feea55aadef53935d Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Fri, 18 Apr 2025 09:24:27 +0200 Subject: [PATCH 16/44] ci: schedule url check each day at 11 AM Signed-off-by: Frederic Pillon --- .github/workflows/MarkdwonLinksCheck.yml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/.github/workflows/MarkdwonLinksCheck.yml b/.github/workflows/MarkdwonLinksCheck.yml index 5525a3050d..5f2220b8ad 100644 --- a/.github/workflows/MarkdwonLinksCheck.yml +++ b/.github/workflows/MarkdwonLinksCheck.yml @@ -11,6 +11,9 @@ on: - '**.md' # Allows you to run this workflow manually from the Actions tab workflow_dispatch: + schedule: + # Run every day at 12 AM UTC to check url. + - cron: "0 11 * * *" jobs: linkinator: runs-on: ubuntu-latest From fddfdeb9c7b2e664dad0733265adfdd3850f787c Mon Sep 17 00:00:00 2001 From: Antun Skuric <36178713+askuric@users.noreply.github.com> Date: Tue, 22 Apr 2025 15:35:55 +0200 Subject: [PATCH 17/44] variant(l4): add generic L412RB(I-T)xP and Nucleo L412RB-P Signed-off-by: Antun Skuric <36178713+askuric@users.noreply.github.com> Co-authored-by: Frederic Pillon --- README.md | 2 + boards.txt | 33 +++ .../STM32L4xx/L412RB(I-T)xP/CMakeLists.txt | 1 + variants/STM32L4xx/L412RB(I-T)xP/ldscript.ld | 208 ++++++++++++++++++ .../L412RB(I-T)xP/variant_NUCLEO_L412RB_P.cpp | 162 ++++++++++++++ .../L412RB(I-T)xP/variant_NUCLEO_L412RB_P.h | 155 +++++++++++++ 6 files changed, 561 insertions(+) create mode 100644 variants/STM32L4xx/L412RB(I-T)xP/ldscript.ld create mode 100644 variants/STM32L4xx/L412RB(I-T)xP/variant_NUCLEO_L412RB_P.cpp create mode 100644 variants/STM32L4xx/L412RB(I-T)xP/variant_NUCLEO_L412RB_P.h diff --git a/README.md b/README.md index 8f150229d9..3252271192 100644 --- a/README.md +++ b/README.md @@ -148,6 +148,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d | :green_heart: | STM32L053R8 | [Nucleo L053R8](http://www.st.com/en/evaluation-tools/nucleo-l053r8.html) | *0.1.0* | | | :green_heart: | STM32L073RZ | [Nucleo L073RZ](http://www.st.com/en/evaluation-tools/nucleo-l073rz.html) | *1.4.0* | | | :green_heart: | STM32L152RE | [Nucleo L152RE](http://www.st.com/en/evaluation-tools/nucleo-l152re.html) | *1.0.0* | | +| :yellow_heart: | STM32L412RB-P | [Nucleo L412RC-P](https://www.st.com/en/evaluation-tools/nucleo-l412rb-p.html) | **2.11.0** | | | :green_heart: | STM32L433RC-P | [Nucleo L433RC-P](https://www.st.com/en/evaluation-tools/nucleo-l433rc-p.html) | *1.9.0* | | | :green_heart: | STM32L452RE | [Nucleo L452RE](http://www.st.com/en/evaluation-tools/nucleo-l452re.html) | *1.5.0* | | | :green_heart: | STM32L452RE-P | [Nucleo L452RE-P](http://www.st.com/en/evaluation-tools/nucleo-l452re-p.html) | *1.8.0* | | @@ -704,6 +705,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d | Status | Device(s) | Name | Release | Notes | | :----: | :-------: | ---- | :-----: | :---- | | :green_heart: | STM32L412K8
                                                                                                STM32L412KB
                                                                                                STM32L422KB | Generic Board | *2.0.0* | | +| :yellow_heart: | STM32L412RBIxP
                                                                                                STM32L412RBTxP | Generic Board | **2.11.0** | | | :green_heart: | STM32L431CB
                                                                                                STM32L431CC | Generic Board | *2.8.1* | | | :green_heart: | STM32L431RB
                                                                                                STM32L431RC | Generic Board | *2.3.0* | | | :green_heart: | STM32L432KB
                                                                                                STM32L432KC
                                                                                                STM32L442KC | Generic Board | *2.0.0* | | diff --git a/boards.txt b/boards.txt index aaebef7be9..4f64d3f800 100644 --- a/boards.txt +++ b/boards.txt @@ -758,6 +758,21 @@ Nucleo_64.menu.pnum.NUCLEO_L152RE.build.variant=STM32L1xx/L151RET_L152RET_L162RE Nucleo_64.menu.pnum.NUCLEO_L152RE.openocd.target=stm32l1 Nucleo_64.menu.pnum.NUCLEO_L152RE.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32L1xx/STM32L152.svd +# NUCLEO_L412RB_P board +Nucleo_64.menu.pnum.NUCLEO_L412RB_P=Nucleo L412RB-P +Nucleo_64.menu.pnum.NUCLEO_L412RB_P.node=NODE_L412RB +Nucleo_64.menu.pnum.NUCLEO_L412RB_P.upload.maximum_size=131072 +Nucleo_64.menu.pnum.NUCLEO_L412RB_P.upload.maximum_data_size=40960 +Nucleo_64.menu.pnum.NUCLEO_L412RB_P.build.mcu=cortex-m4 +Nucleo_64.menu.pnum.NUCLEO_L412RB_P.build.fpu=-mfpu=fpv4-sp-d16 +Nucleo_64.menu.pnum.NUCLEO_L412RB_P.build.float-abi=-mfloat-abi=hard +Nucleo_64.menu.pnum.NUCLEO_L412RB_P.build.board=NUCLEO_L412RB_P +Nucleo_64.menu.pnum.NUCLEO_L412RB_P.build.series=STM32L4xx +Nucleo_64.menu.pnum.NUCLEO_L412RB_P.build.product_line=STM32L412xx +Nucleo_64.menu.pnum.NUCLEO_L412RB_P.build.variant=STM32L4xx/L412RB(I-T)xP +Nucleo_64.menu.pnum.NUCLEO_L412RB_P.openocd.target=stm32l4x +Nucleo_64.menu.pnum.NUCLEO_L412RB_P.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32L4xx/STM32L412.svd + # NUCLEO_L433RC_P board Nucleo_64.menu.pnum.NUCLEO_L433RC_P=Nucleo L433RC-P Nucleo_64.menu.pnum.NUCLEO_L433RC_P.node=NODE_L433RC @@ -11471,6 +11486,24 @@ GenL4.menu.pnum.GENERIC_L412KBUX.build.product_line=STM32L412xx GenL4.menu.pnum.GENERIC_L412KBUX.build.variant=STM32L4xx/L412K(8-B)(T-U)_L422KB(T-U) GenL4.menu.pnum.GENERIC_L412KBUX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32L4xx/STM32L412.svd +# Generic L412RBIxP +GenL4.menu.pnum.GENERIC_L412RBIXP=Generic L412RBIxP +GenL4.menu.pnum.GENERIC_L412RBIXP.upload.maximum_size=131072 +GenL4.menu.pnum.GENERIC_L412RBIXP.upload.maximum_data_size=40960 +GenL4.menu.pnum.GENERIC_L412RBIXP.build.board=GENERIC_L412RBIXP +GenL4.menu.pnum.GENERIC_L412RBIXP.build.product_line=STM32L412xx +GenL4.menu.pnum.GENERIC_L412RBIXP.build.variant=STM32L4xx/L412RB(I-T)xP +GenL4.menu.pnum.GENERIC_L412RBIXP.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32L4xx/STM32L412.svd + +# Generic L412RBTxP +GenL4.menu.pnum.GENERIC_L412RBTXP=Generic L412RBTxP +GenL4.menu.pnum.GENERIC_L412RBTXP.upload.maximum_size=131072 +GenL4.menu.pnum.GENERIC_L412RBTXP.upload.maximum_data_size=40960 +GenL4.menu.pnum.GENERIC_L412RBTXP.build.board=GENERIC_L412RBTXP +GenL4.menu.pnum.GENERIC_L412RBTXP.build.product_line=STM32L412xx +GenL4.menu.pnum.GENERIC_L412RBTXP.build.variant=STM32L4xx/L412RB(I-T)xP +GenL4.menu.pnum.GENERIC_L412RBTXP.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32L4xx/STM32L412.svd + # Generic L422KBTx GenL4.menu.pnum.GENERIC_L422KBTX=Generic L422KBTx GenL4.menu.pnum.GENERIC_L422KBTX.upload.maximum_size=131072 diff --git a/variants/STM32L4xx/L412RB(I-T)xP/CMakeLists.txt b/variants/STM32L4xx/L412RB(I-T)xP/CMakeLists.txt index 2a4d55b6b1..3eab75f214 100644 --- a/variants/STM32L4xx/L412RB(I-T)xP/CMakeLists.txt +++ b/variants/STM32L4xx/L412RB(I-T)xP/CMakeLists.txt @@ -22,6 +22,7 @@ add_library(variant_bin STATIC EXCLUDE_FROM_ALL generic_clock.c PeripheralPins.c variant_generic.cpp + variant_NUCLEO_L412RB_P.cpp ) target_link_libraries(variant_bin PUBLIC variant_usage) diff --git a/variants/STM32L4xx/L412RB(I-T)xP/ldscript.ld b/variants/STM32L4xx/L412RB(I-T)xP/ldscript.ld new file mode 100644 index 0000000000..9eb56d5d17 --- /dev/null +++ b/variants/STM32L4xx/L412RB(I-T)xP/ldscript.ld @@ -0,0 +1,208 @@ +/* +****************************************************************************** +** + +** File : LinkerScript.ld +** +** Author : STM32CubeMX +** +** Abstract : Linker script for STM32L412RBTxP series +** 128Kbytes FLASH and 40Kbytes RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** Distribution: The file is distributed “as is,” without any warranty +** of any kind. +** +***************************************************************************** +** @attention +** +**

                                                                                                © COPYRIGHT(c) 2025 STMicroelectronics

                                                                                                +** +** Redistribution and use in source and binary forms, with or without modification, +** are permitted provided that the following conditions are met: +** 1. Redistributions of source code must retain the above copyright notice, +** this list of conditions and the following disclaimer. +** 2. Redistributions in binary form must reproduce the above copyright notice, +** this list of conditions and the following disclaimer in the documentation +** and/or other materials provided with the distribution. +** 3. Neither the name of STMicroelectronics nor the names of its contributors +** may be used to endorse or promote products derived from this software +** without specific prior written permission. +** +** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of RAM */ +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ +RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE +RAM2 (xrw) : ORIGIN = 0x10000000, LENGTH = 8K +FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(8); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(8); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(8); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(8); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data goes into FLASH */ + .rodata : + { + . = ALIGN(8); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(8); + } >FLASH + + .ARM.extab (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(8); + *(.ARM.extab* .gnu.linkonce.armextab.*) + . = ALIGN(8); + } >FLASH + + .ARM (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(8); + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + . = ALIGN(8); + } >FLASH + + .preinit_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(8); + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + . = ALIGN(8); + } >FLASH + + .init_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(8); + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + . = ALIGN(8); + } >FLASH + + .fini_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + + { + . = ALIGN(8); + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + . = ALIGN(8); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : + { + . = ALIGN(8); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + *(.RamFunc) /* .RamFunc sections */ + *(.RamFunc*) /* .RamFunc* sections */ + + . = ALIGN(8); + _edata = .; /* define a global symbol at data end */ + } >RAM AT> FLASH + + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + +} + + diff --git a/variants/STM32L4xx/L412RB(I-T)xP/variant_NUCLEO_L412RB_P.cpp b/variants/STM32L4xx/L412RB(I-T)xP/variant_NUCLEO_L412RB_P.cpp new file mode 100644 index 0000000000..9b79190615 --- /dev/null +++ b/variants/STM32L4xx/L412RB(I-T)xP/variant_NUCLEO_L412RB_P.cpp @@ -0,0 +1,162 @@ +/* + ******************************************************************************* + * Copyright (c) 2021, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_NUCLEO_L412RB_P) +#include "pins_arduino.h" + +// Digital PinName array +const PinName digitalPin[] = { + PA_10, + PA_9, + PA_12, + PB_3, + PB_5, + PA_15, + PB_10, + PC_7, + PB_6, + PA_8, + PA_11, + PB_15, + PB_14, + PB_13, // LED + PB_7, + PB_8, + // ST Morpho + // CN5 Left Side + PC_10, + PC_12, + PB_12, + PA_13, + PA_14, + PC_13, // User Button + PC_14, + PC_15, + PH_0, + PH_1, + PB_4, + PB_9, + // CN5 Right Side + PC_11, + // CN6 Left Side + PC_9, + // CN6 Right Side + PC_8, + PC_6, + PB_0, + PB_11, + PB_2, + PB_1, + PA_7, + PA_6, + PA_5, + PA_4, + PC_4, + PA_3, // STLink Rx + PA_2, // STLink Tx + PA_0, + PA_1, + PC_3, + PC_2, + PC_1, + PC_0, + PH_3 +}; + +// Analog (Ax) pin number array +const uint32_t analogInputPin[] = { + 43, //A0 + 44, //A1 + 45, //A2 + 46, //A3 + 47, //A4 + 48, //A5 + 32, //A6 + 35, //A7 + 36, //A8 + 37, //A9 + 38, //A10 + 39, //A11 + 40 //A12 +}; + + +// ---------------------------------------------------------------------------- + +#ifdef __cplusplus +extern "C" { +#endif + + + +/** + * @brief System Clock Configuration + * @param None + * @retval None + */ +WEAK void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; + RCC_PeriphCLKInitTypeDef PeriphClkInit = {}; + + /* Configure LSE Drive Capability */ + HAL_PWR_EnableBkUpAccess(); + __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW); + /* + * Initializes the RCC Oscillators according to the specified parameters + * in the RCC_OscInitTypeDef structure. + */ + /* MSI is enabled after System reset, activate PLL with MSI as source */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_MSI; + RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; + RCC_OscInitStruct.LSEState = RCC_LSE_ON; + RCC_OscInitStruct.MSIState = RCC_MSI_ON; + RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6; + RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI; + RCC_OscInitStruct.PLL.PLLM = 1; + RCC_OscInitStruct.PLL.PLLN = 40; + RCC_OscInitStruct.PLL.PLLR = RCC_PLLQ_DIV2; + RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { + Error_Handler(); + } + /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 + clocks dividers */ + RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) { + Error_Handler(); + } + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB; + PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) { + Error_Handler(); + } + /* Configure the main internal regulator output voltage */ + if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK) { + Error_Handler(); + } + /* Enable MSI Auto calibration */ + HAL_RCCEx_EnableMSIPLLMode(); +} + + +#ifdef __cplusplus +} +#endif +#endif /* ARDUINO_NUCLEO_L412RB_P */ diff --git a/variants/STM32L4xx/L412RB(I-T)xP/variant_NUCLEO_L412RB_P.h b/variants/STM32L4xx/L412RB(I-T)xP/variant_NUCLEO_L412RB_P.h new file mode 100644 index 0000000000..a3bb945b4a --- /dev/null +++ b/variants/STM32L4xx/L412RB(I-T)xP/variant_NUCLEO_L412RB_P.h @@ -0,0 +1,155 @@ +/* + ******************************************************************************* + * Copyright (c) 2021, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#pragma once + +/*---------------------------------------------------------------------------- + * Pins + *----------------------------------------------------------------------------*/ + +#define PA10 0 // SB33 ON / SB32 OFF +#define PA9 1 // SB35 ON / SB34 OFF +#define PA12 2 +#define PB3 3 +#define PB5 4 +#define PA15 5 +#define PB10 6 +#define PC7 7 +#define PB6 8 +#define PA8 9 +#define PA11 10 +#define PB15 11 +#define PB14 12 +#define PB13 13 // LED +#define PB7 14 +#define PB8 15 +// ST Morpho +// CN5 Left Side +#define PC10 16 +#define PC12 17 +#define PB12 18 +#define PA13 19 +#define PA14 20 +#define PC13 21 // User Button +#define PC14 22 +#define PC15 23 +#define PH0 24 +#define PH1 25 +#define PB4 26 +#define PB9 27 +// CN5 Right Side +#define PC11 28 +// CN6 Left Side +#define PC9 29 +// CN6 Right Side +#define PC8 30 +#define PC6 31 +#define PB0 PIN_A6 +#define PB11 33 +#define PB2 34 +#define PB1 PIN_A7 +#define PA7 PIN_A8 +#define PA6 PIN_A9 +#define PA5 PIN_A10 +#define PA4 PIN_A11 +#define PC4 PIN_A12 +#define PA3 41 // STLink Rx +#define PA2 42 // STLink Tx +#define PA0 PIN_A0 +#define PA1 PIN_A1 +#define PC3 PIN_A2 +#define PC2 PIN_A3 +#define PC1 PIN_A4 +#define PC0 PIN_A5 +#define PH3 49 + +// Alternate pins number +#define PA1_ALT1 (PA1 | ALT1) +#define PA2_ALT1 (PA2 | ALT1) +#define PA3_ALT1 (PA3 | ALT1) +#define PA4_ALT1 (PA4 | ALT1) +#define PA6_ALT1 (PA6 | ALT1) +#define PA15_ALT1 (PA15 | ALT1) +#define PB1_ALT1 (PB1 | ALT1) +#define PB3_ALT1 (PB3 | ALT1) +#define PB4_ALT1 (PB4 | ALT1) +#define PB5_ALT1 (PB5 | ALT1) +#define PB13_ALT1 (PB13 | ALT1) +#define PB14_ALT1 (PB14 | ALT1) +#define PB15_ALT1 (PB15 | ALT1) + +#define NUM_DIGITAL_PINS 50 +#define NUM_ANALOG_INPUTS 13 + +// On-board LED pin number +#ifndef LED_BUILTIN + #define LED_BUILTIN PB13 +#endif +#ifndef LED_GREEN + #define LED_GREEN LED_BUILTIN +#endif + +// On-board user button +#ifndef USER_BTN + #define USER_BTN PC13 +#endif + +// Timer Definitions (optional) +// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin +#ifndef TIMER_TONE + #define TIMER_TONE TIM6 +#endif +#ifndef TIMER_SERVO + #define TIMER_SERVO TIM16 +#endif + +// UART Definitions +// Define here Serial instance number to map on Serial generic name +#define SERIAL_UART_INSTANCE 101 + +// Default pin used for 'Serial' instance (ex: ST-Link) +// Mandatory for Firmata +#ifndef PIN_SERIAL_RX + #define PIN_SERIAL_RX PA3 +#endif +#ifndef PIN_SERIAL_TX + #define PIN_SERIAL_TX PA2 +#endif + +// Enable QSPI +#if !defined(HAL_QSPI_MODULE_DISABLED) + #define HAL_QSPI_MODULE_ENABLED +#endif + +/*---------------------------------------------------------------------------- + * Arduino objects - C++ only + *----------------------------------------------------------------------------*/ + +#ifdef __cplusplus + // These serial port names are intended to allow libraries and architecture-neutral + // sketches to automatically default to the correct port name for a particular type + // of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN, + // the first hardware serial port whose RX/TX pins are not dedicated to another use. + // + // SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor + // + // SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial + // + // SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library + // + // SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins. + // + // SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX + // pins are NOT connected to anything by default. + #define SERIAL_PORT_MONITOR Serial + #define SERIAL_PORT_HARDWARE Serial +#endif From 6a987257c90b5ed21e23715ed083a6e5db3b9519 Mon Sep 17 00:00:00 2001 From: patricklaf Date: Tue, 15 Apr 2025 16:09:56 +0200 Subject: [PATCH 18/44] chore(uart): harden init Signed-off-by: patricklaf --- cores/arduino/HardwareSerial.cpp | 10 +++-- cores/arduino/HardwareSerial.h | 3 +- libraries/SrcWrapper/inc/uart.h | 2 +- libraries/SrcWrapper/src/stm32/uart.c | 54 +++++++++++++++------------ 4 files changed, 41 insertions(+), 28 deletions(-) diff --git a/cores/arduino/HardwareSerial.cpp b/cores/arduino/HardwareSerial.cpp index 4dd8fd02a4..cde5cab7e0 100644 --- a/cores/arduino/HardwareSerial.cpp +++ b/cores/arduino/HardwareSerial.cpp @@ -446,13 +446,17 @@ void HardwareSerial::begin(unsigned long baud, byte config) break; } - uart_init(&_serial, (uint32_t)baud, databits, parity, stopbits, _rx_invert, _tx_invert, _data_invert); - enableHalfDuplexRx(); - uart_attach_rx_callback(&_serial, _rx_complete_irq); + _ready = uart_init(&_serial, (uint32_t)baud, databits, parity, stopbits, _rx_invert, _tx_invert, _data_invert); + if (_ready) { + enableHalfDuplexRx(); + uart_attach_rx_callback(&_serial, _rx_complete_irq); + } } void HardwareSerial::end() { + _ready = false; + // wait for transmission of outgoing data flush(TX_TIMEOUT); diff --git a/cores/arduino/HardwareSerial.h b/cores/arduino/HardwareSerial.h index 3ed29a873d..be670e9540 100644 --- a/cores/arduino/HardwareSerial.h +++ b/cores/arduino/HardwareSerial.h @@ -146,7 +146,7 @@ class HardwareSerial : public Stream { using Print::write; // pull in write(str) from Print operator bool() { - return true; + return _ready; } void setRx(uint32_t _rx); @@ -189,6 +189,7 @@ class HardwareSerial : public Stream { #endif // HAL_UART_MODULE_ENABLED && !HAL_UART_MODULE_ONLY private: + bool _ready; bool _rx_enabled; uint8_t _config; unsigned long _baud; diff --git a/libraries/SrcWrapper/inc/uart.h b/libraries/SrcWrapper/inc/uart.h index 7f99d498e7..5d681407f8 100644 --- a/libraries/SrcWrapper/inc/uart.h +++ b/libraries/SrcWrapper/inc/uart.h @@ -255,7 +255,7 @@ struct serial_s { /* Exported macro ------------------------------------------------------------*/ /* Exported functions ------------------------------------------------------- */ -void uart_init(serial_t *obj, uint32_t baudrate, uint32_t databits, uint32_t parity, uint32_t stopbits, bool rx_invert, bool tx_invert, bool data_invert); +bool uart_init(serial_t *obj, uint32_t baudrate, uint32_t databits, uint32_t parity, uint32_t stopbits, bool rx_invert, bool tx_invert, bool data_invert); void uart_deinit(serial_t *obj); #if defined(HAL_PWR_MODULE_ENABLED) && (defined(UART_IT_WUF) || defined(LPUART1_BASE)) void uart_config_lowpower(serial_t *obj); diff --git a/libraries/SrcWrapper/src/stm32/uart.c b/libraries/SrcWrapper/src/stm32/uart.c index 4aaa3f0e2e..14e431dc09 100644 --- a/libraries/SrcWrapper/src/stm32/uart.c +++ b/libraries/SrcWrapper/src/stm32/uart.c @@ -113,12 +113,12 @@ serial_t *get_serial_obj(UART_HandleTypeDef *huart) /** * @brief Function called to initialize the uart interface * @param obj : pointer to serial_t structure - * @retval None + * @retval boolean status */ -void uart_init(serial_t *obj, uint32_t baudrate, uint32_t databits, uint32_t parity, uint32_t stopbits, bool rx_invert, bool tx_invert, bool data_invert) +bool uart_init(serial_t *obj, uint32_t baudrate, uint32_t databits, uint32_t parity, uint32_t stopbits, bool rx_invert, bool tx_invert, bool data_invert) { if (obj == NULL) { - return; + return false; } UART_HandleTypeDef *huart = &(obj->handle); @@ -143,28 +143,28 @@ void uart_init(serial_t *obj, uint32_t baudrate, uint32_t databits, uint32_t par if (obj != &serial_debug) { core_debug("ERROR: [U(S)ART] Tx pin has no peripheral!\n"); } - return; + return false; } /* Pin Rx must not be NP if not half-duplex */ if ((obj->pin_rx != NC) && (uart_rx == NP) && (uart_rx_swap == NP)) { if (obj != &serial_debug) { core_debug("ERROR: [U(S)ART] Rx pin has no peripheral!\n"); } - return; + return false; } /* Pin RTS must not be NP if flow control is enabled */ if ((obj->pin_rts != NC) && (uart_rts == NP)) { if (obj != &serial_debug) { core_debug("ERROR: [U(S)ART] RTS pin has no peripheral!\n"); } - return; + return false; } /* Pin CTS must not be NP if flow control is enabled */ if ((obj->pin_cts != NC) && (uart_cts == NP)) { if (obj != &serial_debug) { core_debug("ERROR: [U(S)ART] CTS pin has no peripheral!\n"); } - return; + return false; } /* @@ -184,7 +184,7 @@ void uart_init(serial_t *obj, uint32_t baudrate, uint32_t databits, uint32_t par if (obj != &serial_debug) { core_debug("ERROR: [U(S)ART] Rx/Tx/RTS/CTS pins peripherals mismatch!\n"); } - return; + return false; } /* Enable USART clock */ @@ -364,6 +364,12 @@ void uart_init(serial_t *obj, uint32_t baudrate, uint32_t databits, uint32_t par obj->irq = UART12_IRQn; } #endif + else { + if (obj != &serial_debug) { + core_debug("ERROR: [U(S)ART] Peripheral not supported!\n"); + } + return false; + } /* Configure UART GPIO pins */ #if defined(UART_ADVFEATURE_SWAP_INIT) uint32_t pin_swap = UART_ADVFEATURE_SWAP_DISABLE; @@ -468,10 +474,10 @@ void uart_init(serial_t *obj, uint32_t baudrate, uint32_t databits, uint32_t par /* Trying default LPUART clock source */ if ((uart_rx == NP) && (uart_rx_swap == NP)) { if (HAL_HalfDuplex_Init(huart) == HAL_OK) { - return; + return true; } } else if (HAL_UART_Init(huart) == HAL_OK) { - return; + return true; } /* Trying to change LPUART clock source */ /* If baudrate is lower than or equal to 9600 try to change to LSE */ @@ -494,10 +500,10 @@ void uart_init(serial_t *obj, uint32_t baudrate, uint32_t databits, uint32_t par #endif if ((uart_rx == NP) && (uart_rx_swap == NP)) { if (HAL_HalfDuplex_Init(huart) == HAL_OK) { - return; + return true; } } else if (HAL_UART_Init(huart) == HAL_OK) { - return; + return true; } } } @@ -517,10 +523,10 @@ void uart_init(serial_t *obj, uint32_t baudrate, uint32_t databits, uint32_t par #endif if ((uart_rx == NP) && (uart_rx_swap == NP)) { if (HAL_HalfDuplex_Init(huart) == HAL_OK) { - return; + return true; } } else if (HAL_UART_Init(huart) == HAL_OK) { - return; + return true; } } if (obj->uart == LPUART1) { @@ -544,10 +550,10 @@ void uart_init(serial_t *obj, uint32_t baudrate, uint32_t databits, uint32_t par #endif if ((uart_rx == NP) && (uart_rx_swap == NP)) { if (HAL_HalfDuplex_Init(huart) == HAL_OK) { - return; + return true; } } else if (HAL_UART_Init(huart) == HAL_OK) { - return; + return true; } #if defined(RCC_LPUART1CLKSOURCE_SYSCLK) if (obj->uart == LPUART1) { @@ -569,11 +575,12 @@ void uart_init(serial_t *obj, uint32_t baudrate, uint32_t databits, uint32_t par if ((uart_rx == NP) && (uart_rx_swap == NP)) { if (HAL_HalfDuplex_Init(huart) != HAL_OK) { - return; + return false; } } else if (HAL_UART_Init(huart) != HAL_OK) { - return; + return false; } + return true; } /** @@ -821,10 +828,11 @@ void uart_config_lowpower(serial_t *obj) * @note Call only if debug U(S)ART peripheral is not already initialized * by a Serial instance * Default config: 8N1 - * @retval None + * @retval boolean status */ -void uart_debug_init(void) +bool uart_debug_init(void) { + bool status = false; if (DEBUG_UART != NP) { #if defined(DEBUG_PINNAME_TX) serial_debug.pin_tx = DEBUG_PINNAME_TX; @@ -832,8 +840,9 @@ void uart_debug_init(void) serial_debug.pin_tx = pinmap_pin(DEBUG_UART, PinMap_UART_TX); #endif /* serial_debug.pin_rx set by default to NC to configure in half duplex mode */ - uart_init(&serial_debug, DEBUG_UART_BAUDRATE, UART_WORDLENGTH_8B, UART_PARITY_NONE, UART_STOPBITS_1, false, false, false); + status = uart_init(&serial_debug, DEBUG_UART_BAUDRATE, UART_WORDLENGTH_8B, UART_PARITY_NONE, UART_STOPBITS_1, false, false, false); } + return status; } /** @@ -863,8 +872,7 @@ size_t uart_debug_write(uint8_t *data, uint32_t size) if (serial_debug.index >= UART_NUM) { /* DEBUG_UART not initialized */ - uart_debug_init(); - if (serial_debug.index >= UART_NUM) { + if (!uart_debug_init()) { return 0; } } From 61b4df866945c745981eeb434492d45fcb1e6d1f Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Fri, 25 Apr 2025 11:21:18 +0200 Subject: [PATCH 19/44] fix(uart): unused warnings Fixes #2718. Signed-off-by: Frederic Pillon --- libraries/SrcWrapper/src/stm32/uart.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/libraries/SrcWrapper/src/stm32/uart.c b/libraries/SrcWrapper/src/stm32/uart.c index 14e431dc09..d854061655 100644 --- a/libraries/SrcWrapper/src/stm32/uart.c +++ b/libraries/SrcWrapper/src/stm32/uart.c @@ -438,6 +438,10 @@ bool uart_init(serial_t *obj, uint32_t baudrate, uint32_t databits, uint32_t par huart->AdvancedInit.DataInvert = UART_ADVFEATURE_DATAINV_ENABLE; } #endif +#else /* UART_ADVFEATURE_NO_INIT */ + UNUSED(rx_invert); + UNUSED(tx_invert); + UNUSED(data_invert); #endif #ifdef UART_ONE_BIT_SAMPLE_DISABLE huart->Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; From bb565fd657d896242e69c08e7743e7814da45773 Mon Sep 17 00:00:00 2001 From: gospar Date: Fri, 25 Apr 2025 10:17:57 +0200 Subject: [PATCH 20/44] variant(f4): add Nucleo F410RB Signed-off-by: gospar --- README.md | 1 + boards.txt | 15 ++ .../STM32F4xx/F410R(8-B)(I-T)/CMakeLists.txt | 1 + .../F410R(8-B)(I-T)/variant_NUCLEO_F410RB.cpp | 150 ++++++++++++++++++ .../F410R(8-B)(I-T)/variant_NUCLEO_F410RB.h | 140 ++++++++++++++++ 5 files changed, 307 insertions(+) create mode 100644 variants/STM32F4xx/F410R(8-B)(I-T)/variant_NUCLEO_F410RB.cpp create mode 100644 variants/STM32F4xx/F410R(8-B)(I-T)/variant_NUCLEO_F410RB.h diff --git a/README.md b/README.md index 3252271192..70b2e3275a 100644 --- a/README.md +++ b/README.md @@ -136,6 +136,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d | :green_heart: | STM32F302R8 | [Nucleo F302R8](http://www.st.com/en/evaluation-tools/nucleo-f302r8.html) | *1.1.0* | | | :green_heart: | STM32F303RE | [Nucleo F303RE](http://www.st.com/en/evaluation-tools/nucleo-f303re.html) | *0.1.0* | | | :green_heart: | STM32F401RE | [Nucleo F401RE](http://www.st.com/en/evaluation-tools/nucleo-f401re.html) | *0.2.1* | | +| :yellow_heart: | STM32F410RB | [Nucleo F410RB](http://www.st.com/en/evaluation-tools/nucleo-f410rb.html) | **2.11.0** | | | :green_heart: | STM32F411RE | [Nucleo F411RE](http://www.st.com/en/evaluation-tools/nucleo-f411re.html) | *0.2.1* | | | :green_heart: | STM32F446RE | [Nucleo F446RE](http://www.st.com/en/evaluation-tools/nucleo-f446re.html) | *1.1.1* | | | :green_heart: | STM32G070RB | [Nucleo G070RB](https://www.st.com/en/evaluation-tools/nucleo-g070rb.html) | *2.3.0* | | diff --git a/boards.txt b/boards.txt index 4f64d3f800..737597a70c 100644 --- a/boards.txt +++ b/boards.txt @@ -586,6 +586,21 @@ Nucleo_64.menu.pnum.NUCLEO_F401RE.build.variant=STM32F4xx/F401R(B-C-D-E)T Nucleo_64.menu.pnum.NUCLEO_F401RE.openocd.target=stm32f4x Nucleo_64.menu.pnum.NUCLEO_F401RE.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32F4xx/STM32F401.svd +# NUCLEO_F410RB board +Nucleo_64.menu.pnum.NUCLEO_F410RB=Nucleo F410RB +Nucleo_64.menu.pnum.NUCLEO_F410RB.node="NOD_F410RB,NUCLEO" +Nucleo_64.menu.pnum.NUCLEO_F410RB.upload.maximum_size=131072 +Nucleo_64.menu.pnum.NUCLEO_F410RB.upload.maximum_data_size=32768 +Nucleo_64.menu.pnum.NUCLEO_F410RB.build.mcu=cortex-m4 +Nucleo_64.menu.pnum.NUCLEO_F410RB.build.fpu=-mfpu=fpv4-sp-d16 +Nucleo_64.menu.pnum.NUCLEO_F410RB.build.float-abi=-mfloat-abi=hard +Nucleo_64.menu.pnum.NUCLEO_F410RB.build.board=NUCLEO_F410RB +Nucleo_64.menu.pnum.NUCLEO_F410RB.build.series=STM32F4xx +Nucleo_64.menu.pnum.NUCLEO_F410RB.build.product_line=STM32F410Rx +Nucleo_64.menu.pnum.NUCLEO_F410RB.build.variant=STM32F4xx/F410R(8-B)(I-T) +Nucleo_64.menu.pnum.NUCLEO_F410RB.openocd.target=stm32f4x +Nucleo_64.menu.pnum.NUCLEO_F410RB.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32F4xx/STM32F410.svd + # NUCLEO_F411RE board Nucleo_64.menu.pnum.NUCLEO_F411RE=Nucleo F411RE Nucleo_64.menu.pnum.NUCLEO_F411RE.node="NODE_F411RE,NUCLEO" diff --git a/variants/STM32F4xx/F410R(8-B)(I-T)/CMakeLists.txt b/variants/STM32F4xx/F410R(8-B)(I-T)/CMakeLists.txt index 2a4d55b6b1..14f4ef4bc2 100644 --- a/variants/STM32F4xx/F410R(8-B)(I-T)/CMakeLists.txt +++ b/variants/STM32F4xx/F410R(8-B)(I-T)/CMakeLists.txt @@ -22,6 +22,7 @@ add_library(variant_bin STATIC EXCLUDE_FROM_ALL generic_clock.c PeripheralPins.c variant_generic.cpp + variant_NUCLEO_F410RB.cpp ) target_link_libraries(variant_bin PUBLIC variant_usage) diff --git a/variants/STM32F4xx/F410R(8-B)(I-T)/variant_NUCLEO_F410RB.cpp b/variants/STM32F4xx/F410R(8-B)(I-T)/variant_NUCLEO_F410RB.cpp new file mode 100644 index 0000000000..18c8d1d098 --- /dev/null +++ b/variants/STM32F4xx/F410R(8-B)(I-T)/variant_NUCLEO_F410RB.cpp @@ -0,0 +1,150 @@ +/* + ******************************************************************************* + * Copyright (c) 2025, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_NUCLEO_F410RB) +#include "pins_arduino.h" + +// Digital PinName array +const PinName digitalPin[] = { + PA_3, + PA_2, + PA_10, + PB_3, + PB_5, + PB_4, + PB_10, + PA_8, + PA_9, + PC_7, + PB_6, + PA_7, + PA_6, + PA_5, + PB_9, + PB_8, + // ST Morpho + // CN7 Left Side + PC_10, + PC_12, + NC, //D18 - BOOT0 + PA_13, + PA_14, + PA_15, + PB_7, + PC_13, + PC_14, + PC_15, + PH_0, + PH_1, + PC_2, + PC_3, + // CN7 Right Side + PC_11, + PB_11, + // CN10 Left Side + PC_9, + // CN10 Right side + PC_8, + PC_6, + PC_5, + PA_12, + PA_11, + PB_12, + NC, //D39 + PB_2, + PB_1, + PB_15, + PB_14, + PB_13, + PC_4, + PA_0, + PA_1, + PA_4, + PB_0, + PC_1, + PC_0 +}; + +// Analog (Ax) pin number array +const uint32_t analogInputPin[] = { + 46, //A0 + 47, //A1 + 48, //A2 + 49, //A3 + 50, //A4 + 51, //A5 + 11, //A6 + 12, //A7 + 13, //A8 + 28, //A9 + 29, //A10 + 35, //A11 + 41, //A12 + 45, //A13 + 0, //A14 + 1 //A15 +}; + +#ifdef __cplusplus +extern "C" { +#endif +/** + * @brief System Clock Configuration + * SYSCLK = 100MHz for ARDUINO_NUCLEO_F410RB + * @param None + * @retval None + */ +void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; + + /** Configure the main internal regulator output voltage + */ + __HAL_RCC_PWR_CLK_ENABLE(); + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + + /** Initializes the RCC Oscillators according to the specified parameters + * in the RCC_OscInitTypeDef structure. + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLM = 4; + RCC_OscInitStruct.PLL.PLLN = 100; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLQ = 4; + RCC_OscInitStruct.PLL.PLLR = 2; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { + Error_Handler(); + } + + /** Initializes the CPU, AHB and APB buses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK + | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) { + Error_Handler(); + } +} + + +#ifdef __cplusplus +} +#endif +#endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32F4xx/F410R(8-B)(I-T)/variant_NUCLEO_F410RB.h b/variants/STM32F4xx/F410R(8-B)(I-T)/variant_NUCLEO_F410RB.h new file mode 100644 index 0000000000..8e05086ea0 --- /dev/null +++ b/variants/STM32F4xx/F410R(8-B)(I-T)/variant_NUCLEO_F410RB.h @@ -0,0 +1,140 @@ +/* + ******************************************************************************* + * Copyright (c) 2025, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#pragma once + +/*---------------------------------------------------------------------------- + * STM32 pins number + *----------------------------------------------------------------------------*/ +#define PA3 PIN_A14 +#define PA2 PIN_A15 +#define PA10 2 +#define PB3 3 +#define PB5 4 +#define PB4 5 +#define PB10 6 +#define PA8 7 +#define PA9 8 +#define PC7 9 +#define PB6 10 +#define PA7 PIN_A6 +#define PA6 PIN_A7 +#define PA5 PIN_A8 // LD2 +#define PB9 14 +#define PB8 15 +// ST Morpho +// CN7 Left Side +#define PC10 16 +#define PC12 17 +// 18 is NC - BOOT0 +#define PA13 19 // SWD +#define PA14 20 // SWD +#define PA15 21 +#define PB7 22 +#define PC13 23 // USER_BTN +#define PC14 24 +#define PC15 25 +#define PH0 26 +#define PH1 27 +#define PC2 PIN_A9 +#define PC3 PIN_A10 +// CN7 Right Side +#define PC11 30 +#define PB11 31 +// CN10 Left Side +#define PC9 32 +// CN10 Right side +#define PC8 33 +#define PC6 34 +#define PC5 PIN_A11 +#define PA12 36 +#define PA11 37 +#define PB12 38 +// 39 is NC +#define PB2 40 +#define PB1 PIN_A12 +#define PB15 42 +#define PB14 43 +#define PB13 44 +#define PC4 PIN_A13 +#define PA0 PIN_A0 +#define PA1 PIN_A1 +#define PA4 PIN_A2 +#define PB0 PIN_A3 +#define PC1 PIN_A4 +#define PC0 PIN_A5 + +// Alternate pins number +#define PA2_ALT1 = (PA2 | ALT1) +#define PA3_ALT1 = (PA3 | ALT1) +#define PB9_ALT1 = (PB9 | ALT1) + +#define NUM_DIGITAL_PINS 52 +#define NUM_ANALOG_INPUTS 16 + +// On-board LED pin number +#ifndef LED_BUILTIN + #define LED_BUILTIN PA5 +#endif + +// On-board user button +#ifndef USER_BTN + #define USER_BTN PC13 +#endif + + +// Timer Definitions +// Use TIM9/TIM11 when possible as servo and tone don't need GPIO output pin +#ifndef TIMER_TONE + #define TIMER_TONE TIM6 +#endif +#ifndef TIMER_SERVO + #define TIMER_SERVO TIM11 +#endif + +// UART Definitions +#ifndef SERIAL_UART_INSTANCE + #define SERIAL_UART_INSTANCE 2 //Connected to ST-Link +#endif + +// Default pin used for 'Serial' instance (ex: ST-Link) +// Mandatory for Firmata +#ifndef PIN_SERIAL_RX + #define PIN_SERIAL_RX PA3 +#endif +#ifndef PIN_SERIAL_TX + #define PIN_SERIAL_TX PA2 +#endif + +/*---------------------------------------------------------------------------- + * Arduino objects - C++ only + *----------------------------------------------------------------------------*/ + +#ifdef __cplusplus + // These serial port names are intended to allow libraries and architecture-neutral + // sketches to automatically default to the correct port name for a particular type + // of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN, + // the first hardware serial port whose RX/TX pins are not dedicated to another use. + // + // SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor + // + // SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial + // + // SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library + // + // SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins. + // + // SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX + // pins are NOT connected to anything by default. + #define SERIAL_PORT_MONITOR Serial + #define SERIAL_PORT_HARDWARE Serial +#endif From b62c9198fd1ac1a919d93608b2adeb478baa91d6 Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Fri, 25 Apr 2025 14:29:45 +0200 Subject: [PATCH 21/44] chore: update cmake support with new targets Signed-off-by: Frederic Pillon --- cmake/boards_db.cmake | 656 ++++++++++++++++++ .../L552Q(C-E)IxQ_L562QEIxQ/CMakeLists.txt | 2 + 2 files changed, 658 insertions(+) diff --git a/cmake/boards_db.cmake b/cmake/boards_db.cmake index 24a946c9dd..ea28c93087 100644 --- a/cmake/boards_db.cmake +++ b/cmake/boards_db.cmake @@ -93548,6 +93548,170 @@ target_compile_options(GENERIC_L412KBUX_xusb_HSFS INTERFACE "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" ) +# GENERIC_L412RBIXP +# ----------------------------------------------------------------------------- + +set(GENERIC_L412RBIXP_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L412RB(I-T)xP") +set(GENERIC_L412RBIXP_MAXSIZE 131072) +set(GENERIC_L412RBIXP_MAXDATASIZE 40960) +set(GENERIC_L412RBIXP_MCU cortex-m4) +set(GENERIC_L412RBIXP_FPCONF "-") +add_library(GENERIC_L412RBIXP INTERFACE) +target_compile_options(GENERIC_L412RBIXP INTERFACE + "SHELL:-DSTM32L412xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L412RBIXP_MCU} +) +target_compile_definitions(GENERIC_L412RBIXP INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L412RBIXP" + "BOARD_NAME=\"GENERIC_L412RBIXP\"" + "BOARD_ID=GENERIC_L412RBIXP" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L412RBIXP INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L412RBIXP_VARIANT_PATH} +) + +target_link_options(GENERIC_L412RBIXP INTERFACE + "LINKER:--default-script=${GENERIC_L412RBIXP_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=40960" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L412RBIXP_MCU} +) + +add_library(GENERIC_L412RBIXP_serial_disabled INTERFACE) +target_compile_options(GENERIC_L412RBIXP_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L412RBIXP_serial_generic INTERFACE) +target_compile_options(GENERIC_L412RBIXP_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L412RBIXP_serial_none INTERFACE) +target_compile_options(GENERIC_L412RBIXP_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L412RBIXP_usb_CDC INTERFACE) +target_compile_options(GENERIC_L412RBIXP_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L412RBIXP_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L412RBIXP_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L412RBIXP_usb_HID INTERFACE) +target_compile_options(GENERIC_L412RBIXP_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L412RBIXP_usb_none INTERFACE) +target_compile_options(GENERIC_L412RBIXP_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L412RBIXP_xusb_FS INTERFACE) +target_compile_options(GENERIC_L412RBIXP_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L412RBIXP_xusb_HS INTERFACE) +target_compile_options(GENERIC_L412RBIXP_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L412RBIXP_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L412RBIXP_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L412RBTXP +# ----------------------------------------------------------------------------- + +set(GENERIC_L412RBTXP_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L412RB(I-T)xP") +set(GENERIC_L412RBTXP_MAXSIZE 131072) +set(GENERIC_L412RBTXP_MAXDATASIZE 40960) +set(GENERIC_L412RBTXP_MCU cortex-m4) +set(GENERIC_L412RBTXP_FPCONF "-") +add_library(GENERIC_L412RBTXP INTERFACE) +target_compile_options(GENERIC_L412RBTXP INTERFACE + "SHELL:-DSTM32L412xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L412RBTXP_MCU} +) +target_compile_definitions(GENERIC_L412RBTXP INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L412RBTXP" + "BOARD_NAME=\"GENERIC_L412RBTXP\"" + "BOARD_ID=GENERIC_L412RBTXP" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L412RBTXP INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L412RBTXP_VARIANT_PATH} +) + +target_link_options(GENERIC_L412RBTXP INTERFACE + "LINKER:--default-script=${GENERIC_L412RBTXP_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=40960" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L412RBTXP_MCU} +) + +add_library(GENERIC_L412RBTXP_serial_disabled INTERFACE) +target_compile_options(GENERIC_L412RBTXP_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L412RBTXP_serial_generic INTERFACE) +target_compile_options(GENERIC_L412RBTXP_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L412RBTXP_serial_none INTERFACE) +target_compile_options(GENERIC_L412RBTXP_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L412RBTXP_usb_CDC INTERFACE) +target_compile_options(GENERIC_L412RBTXP_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L412RBTXP_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L412RBTXP_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L412RBTXP_usb_HID INTERFACE) +target_compile_options(GENERIC_L412RBTXP_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L412RBTXP_usb_none INTERFACE) +target_compile_options(GENERIC_L412RBTXP_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L412RBTXP_xusb_FS INTERFACE) +target_compile_options(GENERIC_L412RBTXP_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L412RBTXP_xusb_HS INTERFACE) +target_compile_options(GENERIC_L412RBTXP_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L412RBTXP_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L412RBTXP_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + # GENERIC_L422KBTX # ----------------------------------------------------------------------------- @@ -100108,6 +100272,170 @@ target_compile_options(GENERIC_L4S9ZIYX_xusb_HSFS INTERFACE "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" ) +# GENERIC_L552QCIXQ +# ----------------------------------------------------------------------------- + +set(GENERIC_L552QCIXQ_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L5xx/L552Q(C-E)IxQ_L562QEIxQ") +set(GENERIC_L552QCIXQ_MAXSIZE 262144) +set(GENERIC_L552QCIXQ_MAXDATASIZE 262144) +set(GENERIC_L552QCIXQ_MCU cortex-m33) +set(GENERIC_L552QCIXQ_FPCONF "-") +add_library(GENERIC_L552QCIXQ INTERFACE) +target_compile_options(GENERIC_L552QCIXQ INTERFACE + "SHELL:-DSTM32L552xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L552QCIXQ_MCU} +) +target_compile_definitions(GENERIC_L552QCIXQ INTERFACE + "STM32L5xx" + "ARDUINO_GENERIC_L552QCIXQ" + "BOARD_NAME=\"GENERIC_L552QCIXQ\"" + "BOARD_ID=GENERIC_L552QCIXQ" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L552QCIXQ INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L5xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L5xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L5xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L5xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L5xx/Source/Templates/gcc/ + ${GENERIC_L552QCIXQ_VARIANT_PATH} +) + +target_link_options(GENERIC_L552QCIXQ INTERFACE + "LINKER:--default-script=${GENERIC_L552QCIXQ_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=262144" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L552QCIXQ_MCU} +) + +add_library(GENERIC_L552QCIXQ_serial_disabled INTERFACE) +target_compile_options(GENERIC_L552QCIXQ_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L552QCIXQ_serial_generic INTERFACE) +target_compile_options(GENERIC_L552QCIXQ_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L552QCIXQ_serial_none INTERFACE) +target_compile_options(GENERIC_L552QCIXQ_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L552QCIXQ_usb_CDC INTERFACE) +target_compile_options(GENERIC_L552QCIXQ_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L552QCIXQ_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L552QCIXQ_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L552QCIXQ_usb_HID INTERFACE) +target_compile_options(GENERIC_L552QCIXQ_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L552QCIXQ_usb_none INTERFACE) +target_compile_options(GENERIC_L552QCIXQ_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L552QCIXQ_xusb_FS INTERFACE) +target_compile_options(GENERIC_L552QCIXQ_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L552QCIXQ_xusb_HS INTERFACE) +target_compile_options(GENERIC_L552QCIXQ_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L552QCIXQ_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L552QCIXQ_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L552QEIXQ +# ----------------------------------------------------------------------------- + +set(GENERIC_L552QEIXQ_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L5xx/L552Q(C-E)IxQ_L562QEIxQ") +set(GENERIC_L552QEIXQ_MAXSIZE 524288) +set(GENERIC_L552QEIXQ_MAXDATASIZE 262144) +set(GENERIC_L552QEIXQ_MCU cortex-m33) +set(GENERIC_L552QEIXQ_FPCONF "-") +add_library(GENERIC_L552QEIXQ INTERFACE) +target_compile_options(GENERIC_L552QEIXQ INTERFACE + "SHELL:-DSTM32L552xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L552QEIXQ_MCU} +) +target_compile_definitions(GENERIC_L552QEIXQ INTERFACE + "STM32L5xx" + "ARDUINO_GENERIC_L552QEIXQ" + "BOARD_NAME=\"GENERIC_L552QEIXQ\"" + "BOARD_ID=GENERIC_L552QEIXQ" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L552QEIXQ INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L5xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L5xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L5xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L5xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L5xx/Source/Templates/gcc/ + ${GENERIC_L552QEIXQ_VARIANT_PATH} +) + +target_link_options(GENERIC_L552QEIXQ INTERFACE + "LINKER:--default-script=${GENERIC_L552QEIXQ_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=262144" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L552QEIXQ_MCU} +) + +add_library(GENERIC_L552QEIXQ_serial_disabled INTERFACE) +target_compile_options(GENERIC_L552QEIXQ_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L552QEIXQ_serial_generic INTERFACE) +target_compile_options(GENERIC_L552QEIXQ_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L552QEIXQ_serial_none INTERFACE) +target_compile_options(GENERIC_L552QEIXQ_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L552QEIXQ_usb_CDC INTERFACE) +target_compile_options(GENERIC_L552QEIXQ_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L552QEIXQ_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L552QEIXQ_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L552QEIXQ_usb_HID INTERFACE) +target_compile_options(GENERIC_L552QEIXQ_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L552QEIXQ_usb_none INTERFACE) +target_compile_options(GENERIC_L552QEIXQ_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L552QEIXQ_xusb_FS INTERFACE) +target_compile_options(GENERIC_L552QEIXQ_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L552QEIXQ_xusb_HS INTERFACE) +target_compile_options(GENERIC_L552QEIXQ_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L552QEIXQ_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L552QEIXQ_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + # GENERIC_L552ZCTXQ # ----------------------------------------------------------------------------- @@ -100272,6 +100600,88 @@ target_compile_options(GENERIC_L552ZETXQ_xusb_HSFS INTERFACE "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" ) +# GENERIC_L562QEIXQ +# ----------------------------------------------------------------------------- + +set(GENERIC_L562QEIXQ_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L5xx/L552Q(C-E)IxQ_L562QEIxQ") +set(GENERIC_L562QEIXQ_MAXSIZE 524288) +set(GENERIC_L562QEIXQ_MAXDATASIZE 196608) +set(GENERIC_L562QEIXQ_MCU cortex-m33) +set(GENERIC_L562QEIXQ_FPCONF "-") +add_library(GENERIC_L562QEIXQ INTERFACE) +target_compile_options(GENERIC_L562QEIXQ INTERFACE + "SHELL:-DSTM32L562xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L562QEIXQ_MCU} +) +target_compile_definitions(GENERIC_L562QEIXQ INTERFACE + "STM32L5xx" + "ARDUINO_GENERIC_L562QEIXQ" + "BOARD_NAME=\"GENERIC_L562QEIXQ\"" + "BOARD_ID=GENERIC_L562QEIXQ" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L562QEIXQ INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L5xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L5xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L5xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L5xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L5xx/Source/Templates/gcc/ + ${GENERIC_L562QEIXQ_VARIANT_PATH} +) + +target_link_options(GENERIC_L562QEIXQ INTERFACE + "LINKER:--default-script=${GENERIC_L562QEIXQ_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L562QEIXQ_MCU} +) + +add_library(GENERIC_L562QEIXQ_serial_disabled INTERFACE) +target_compile_options(GENERIC_L562QEIXQ_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L562QEIXQ_serial_generic INTERFACE) +target_compile_options(GENERIC_L562QEIXQ_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L562QEIXQ_serial_none INTERFACE) +target_compile_options(GENERIC_L562QEIXQ_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L562QEIXQ_usb_CDC INTERFACE) +target_compile_options(GENERIC_L562QEIXQ_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L562QEIXQ_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L562QEIXQ_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L562QEIXQ_usb_HID INTERFACE) +target_compile_options(GENERIC_L562QEIXQ_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L562QEIXQ_usb_none INTERFACE) +target_compile_options(GENERIC_L562QEIXQ_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L562QEIXQ_xusb_FS INTERFACE) +target_compile_options(GENERIC_L562QEIXQ_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L562QEIXQ_xusb_HS INTERFACE) +target_compile_options(GENERIC_L562QEIXQ_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L562QEIXQ_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L562QEIXQ_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + # GENERIC_L562ZETXQ # ----------------------------------------------------------------------------- @@ -106718,6 +107128,88 @@ target_compile_options(NUCLEO_F401RE_xusb_HSFS INTERFACE "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" ) +# NUCLEO_F410RB +# ----------------------------------------------------------------------------- + +set(NUCLEO_F410RB_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410R(8-B)(I-T)") +set(NUCLEO_F410RB_MAXSIZE 131072) +set(NUCLEO_F410RB_MAXDATASIZE 32768) +set(NUCLEO_F410RB_MCU cortex-m4) +set(NUCLEO_F410RB_FPCONF "fpv4-sp-d16-hard") +add_library(NUCLEO_F410RB INTERFACE) +target_compile_options(NUCLEO_F410RB INTERFACE + "SHELL:-DSTM32F410Rx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_F410RB_MCU} +) +target_compile_definitions(NUCLEO_F410RB INTERFACE + "STM32F4xx" + "ARDUINO_NUCLEO_F410RB" + "BOARD_NAME=\"NUCLEO_F410RB\"" + "BOARD_ID=NUCLEO_F410RB" + "VARIANT_H=\"variant_NUCLEO_F410RB.h\"" +) +target_include_directories(NUCLEO_F410RB INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${NUCLEO_F410RB_VARIANT_PATH} +) + +target_link_options(NUCLEO_F410RB INTERFACE + "LINKER:--default-script=${NUCLEO_F410RB_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_F410RB_MCU} +) + +add_library(NUCLEO_F410RB_serial_disabled INTERFACE) +target_compile_options(NUCLEO_F410RB_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_F410RB_serial_generic INTERFACE) +target_compile_options(NUCLEO_F410RB_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_F410RB_serial_none INTERFACE) +target_compile_options(NUCLEO_F410RB_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_F410RB_usb_CDC INTERFACE) +target_compile_options(NUCLEO_F410RB_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_F410RB_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_F410RB_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_F410RB_usb_HID INTERFACE) +target_compile_options(NUCLEO_F410RB_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_F410RB_usb_none INTERFACE) +target_compile_options(NUCLEO_F410RB_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_F410RB_xusb_FS INTERFACE) +target_compile_options(NUCLEO_F410RB_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_F410RB_xusb_HS INTERFACE) +target_compile_options(NUCLEO_F410RB_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_F410RB_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_F410RB_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + # NUCLEO_F411RE # ----------------------------------------------------------------------------- @@ -109260,6 +109752,88 @@ target_compile_options(NUCLEO_L412KB_xusb_HSFS INTERFACE "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" ) +# NUCLEO_L412RB_P +# ----------------------------------------------------------------------------- + +set(NUCLEO_L412RB_P_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L412RB(I-T)xP") +set(NUCLEO_L412RB_P_MAXSIZE 131072) +set(NUCLEO_L412RB_P_MAXDATASIZE 40960) +set(NUCLEO_L412RB_P_MCU cortex-m4) +set(NUCLEO_L412RB_P_FPCONF "fpv4-sp-d16-hard") +add_library(NUCLEO_L412RB_P INTERFACE) +target_compile_options(NUCLEO_L412RB_P INTERFACE + "SHELL:-DSTM32L412xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_L412RB_P_MCU} +) +target_compile_definitions(NUCLEO_L412RB_P INTERFACE + "STM32L4xx" + "ARDUINO_NUCLEO_L412RB_P" + "BOARD_NAME=\"NUCLEO_L412RB_P\"" + "BOARD_ID=NUCLEO_L412RB_P" + "VARIANT_H=\"variant_NUCLEO_L412RB_P.h\"" +) +target_include_directories(NUCLEO_L412RB_P INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${NUCLEO_L412RB_P_VARIANT_PATH} +) + +target_link_options(NUCLEO_L412RB_P INTERFACE + "LINKER:--default-script=${NUCLEO_L412RB_P_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=40960" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_L412RB_P_MCU} +) + +add_library(NUCLEO_L412RB_P_serial_disabled INTERFACE) +target_compile_options(NUCLEO_L412RB_P_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_L412RB_P_serial_generic INTERFACE) +target_compile_options(NUCLEO_L412RB_P_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_L412RB_P_serial_none INTERFACE) +target_compile_options(NUCLEO_L412RB_P_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_L412RB_P_usb_CDC INTERFACE) +target_compile_options(NUCLEO_L412RB_P_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_L412RB_P_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_L412RB_P_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_L412RB_P_usb_HID INTERFACE) +target_compile_options(NUCLEO_L412RB_P_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_L412RB_P_usb_none INTERFACE) +target_compile_options(NUCLEO_L412RB_P_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_L412RB_P_xusb_FS INTERFACE) +target_compile_options(NUCLEO_L412RB_P_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_L412RB_P_xusb_HS INTERFACE) +target_compile_options(NUCLEO_L412RB_P_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_L412RB_P_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_L412RB_P_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + # NUCLEO_L432KC # ----------------------------------------------------------------------------- @@ -112664,6 +113238,88 @@ target_compile_options(STM32H747I_DISCO_xusb_HSFS INTERFACE "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" ) +# STM32L562E_DK +# ----------------------------------------------------------------------------- + +set(STM32L562E_DK_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L5xx/L552Q(C-E)IxQ_L562QEIxQ") +set(STM32L562E_DK_MAXSIZE 524288) +set(STM32L562E_DK_MAXDATASIZE 196608) +set(STM32L562E_DK_MCU cortex-m33) +set(STM32L562E_DK_FPCONF "fpv4-sp-d16-hard") +add_library(STM32L562E_DK INTERFACE) +target_compile_options(STM32L562E_DK INTERFACE + "SHELL:-DSTM32L562xx " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${STM32L562E_DK_MCU} +) +target_compile_definitions(STM32L562E_DK INTERFACE + "STM32L5xx" + "ARDUINO_STM32L562E_DK" + "BOARD_NAME=\"STM32L562E_DK\"" + "BOARD_ID=STM32L562E_DK" + "VARIANT_H=\"variant_STM32L562E_DK.h\"" +) +target_include_directories(STM32L562E_DK INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L5xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L5xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L5xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L5xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L5xx/Source/Templates/gcc/ + ${STM32L562E_DK_VARIANT_PATH} +) + +target_link_options(STM32L562E_DK INTERFACE + "LINKER:--default-script=${STM32L562E_DK_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${STM32L562E_DK_MCU} +) + +add_library(STM32L562E_DK_serial_disabled INTERFACE) +target_compile_options(STM32L562E_DK_serial_disabled INTERFACE + "SHELL:" +) +add_library(STM32L562E_DK_serial_generic INTERFACE) +target_compile_options(STM32L562E_DK_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(STM32L562E_DK_serial_none INTERFACE) +target_compile_options(STM32L562E_DK_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(STM32L562E_DK_usb_CDC INTERFACE) +target_compile_options(STM32L562E_DK_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(STM32L562E_DK_usb_CDCgen INTERFACE) +target_compile_options(STM32L562E_DK_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(STM32L562E_DK_usb_HID INTERFACE) +target_compile_options(STM32L562E_DK_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(STM32L562E_DK_usb_none INTERFACE) +target_compile_options(STM32L562E_DK_usb_none INTERFACE + "SHELL:" +) +add_library(STM32L562E_DK_xusb_FS INTERFACE) +target_compile_options(STM32L562E_DK_xusb_FS INTERFACE + "SHELL:" +) +add_library(STM32L562E_DK_xusb_HS INTERFACE) +target_compile_options(STM32L562E_DK_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(STM32L562E_DK_xusb_HSFS INTERFACE) +target_compile_options(STM32L562E_DK_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + # STM32MP157A_DK1 # ----------------------------------------------------------------------------- diff --git a/variants/STM32L5xx/L552Q(C-E)IxQ_L562QEIxQ/CMakeLists.txt b/variants/STM32L5xx/L552Q(C-E)IxQ_L562QEIxQ/CMakeLists.txt index 2a4d55b6b1..656acd547b 100644 --- a/variants/STM32L5xx/L552Q(C-E)IxQ_L562QEIxQ/CMakeLists.txt +++ b/variants/STM32L5xx/L552Q(C-E)IxQ_L562QEIxQ/CMakeLists.txt @@ -21,7 +21,9 @@ target_link_libraries(variant INTERFACE variant_usage) add_library(variant_bin STATIC EXCLUDE_FROM_ALL generic_clock.c PeripheralPins.c + PeripheralPins_STM32L562E_DK.c variant_generic.cpp + variant_STM32L562E_DK.cpp ) target_link_libraries(variant_bin PUBLIC variant_usage) From 9154e6e0d3b9cbe8692692380517616fda6c5320 Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Fri, 25 Apr 2025 14:34:51 +0200 Subject: [PATCH 22/44] ci(build): update config Signed-off-by: Frederic Pillon --- CI/build/conf/cores_config.json | 3 +++ CI/build/conf/cores_config_ci.json | 3 +++ 2 files changed, 6 insertions(+) diff --git a/CI/build/conf/cores_config.json b/CI/build/conf/cores_config.json index c47e35a460..7cdc1022ca 100644 --- a/CI/build/conf/cores_config.json +++ b/CI/build/conf/cores_config.json @@ -760,6 +760,7 @@ "GENERIC_L412K8UX", "GENERIC_L412KBTX", "GENERIC_L412KBUX", + "GENERIC_L412RBIXP", "GENERIC_L422KBTX", "GENERIC_L431CBTX", "GENERIC_L431CBUX", @@ -823,6 +824,8 @@ "GENERIC_L4S5VITX", "GENERIC_L4S5ZITX", "GENERIC_L4S5ZIYX", + "GENERIC_L552QCIXQ", + "GENERIC_L552QEIXQ", "GENERIC_L552ZCTXQ", "GENERIC_L552ZETXQ", "GENERIC_MP153AACX", diff --git a/CI/build/conf/cores_config_ci.json b/CI/build/conf/cores_config_ci.json index 8dff66d592..267c32f85c 100644 --- a/CI/build/conf/cores_config_ci.json +++ b/CI/build/conf/cores_config_ci.json @@ -760,6 +760,7 @@ "GENERIC_L412K8UX", "GENERIC_L412KBTX", "GENERIC_L412KBUX", + "GENERIC_L412RBIXP", "GENERIC_L422KBTX", "GENERIC_L431CBTX", "GENERIC_L431CBUX", @@ -823,6 +824,8 @@ "GENERIC_L4S5VITX", "GENERIC_L4S5ZITX", "GENERIC_L4S5ZIYX", + "GENERIC_L552QCIXQ", + "GENERIC_L552QEIXQ", "GENERIC_L552ZCTXQ", "GENERIC_L552ZETXQ", "GENERIC_MP153AACX", From 3c2d468c27ec62007b36881c1a9e65e2df7e702b Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Tue, 29 Apr 2025 10:09:53 +0200 Subject: [PATCH 23/44] fix(g0): USB STM32G0B0xx configuration Fixes #2720. Signed-off-by: Frederic Pillon --- libraries/USBDevice/inc/usbd_conf.h | 2 +- variants/STM32G0xx/G0B0CET/generic_clock.c | 13 ++++++++++--- variants/STM32G0xx/G0B0RET/generic_clock.c | 13 ++++++++++--- variants/STM32G0xx/G0B0VET/generic_clock.c | 13 ++++++++++--- 4 files changed, 31 insertions(+), 10 deletions(-) diff --git a/libraries/USBDevice/inc/usbd_conf.h b/libraries/USBDevice/inc/usbd_conf.h index 14189cff20..a6bac515dd 100644 --- a/libraries/USBDevice/inc/usbd_conf.h +++ b/libraries/USBDevice/inc/usbd_conf.h @@ -71,7 +71,7 @@ extern "C" { #define USB_WKUP_IRQHandler USB_FS_WKUP_IRQHandler #endif #endif -#elif defined(STM32G0xx) +#elif defined(STM32G0B1xx) || defined(STM32G0C1xx) #define USB_IRQn USB_UCPD1_2_IRQn #define USB_IRQHandler USB_UCPD1_2_IRQHandler #elif defined(STM32C0xx) || defined(STM32H5xx) || defined(STM32U0xx) diff --git a/variants/STM32G0xx/G0B0CET/generic_clock.c b/variants/STM32G0xx/G0B0CET/generic_clock.c index 879550021d..6099312c0a 100644 --- a/variants/STM32G0xx/G0B0CET/generic_clock.c +++ b/variants/STM32G0xx/G0B0CET/generic_clock.c @@ -22,6 +22,7 @@ WEAK void SystemClock_Config(void) { RCC_OscInitTypeDef RCC_OscInitStruct = {}; RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; + RCC_PeriphCLKInitTypeDef PeriphClkInit = {}; /** Configure the main internal regulator output voltage */ @@ -37,9 +38,9 @@ WEAK void SystemClock_Config(void) RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV1; - RCC_OscInitStruct.PLL.PLLN = 9; + RCC_OscInitStruct.PLL.PLLN = 12; RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; - RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV3; + RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV4; RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV3; if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { Error_Handler(); @@ -53,7 +54,13 @@ WEAK void SystemClock_Config(void) RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) { + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) { + Error_Handler(); + } + + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB; + PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) { Error_Handler(); } } diff --git a/variants/STM32G0xx/G0B0RET/generic_clock.c b/variants/STM32G0xx/G0B0RET/generic_clock.c index 700dc8bcb4..cbeccfbdbe 100644 --- a/variants/STM32G0xx/G0B0RET/generic_clock.c +++ b/variants/STM32G0xx/G0B0RET/generic_clock.c @@ -22,6 +22,7 @@ WEAK void SystemClock_Config(void) { RCC_OscInitTypeDef RCC_OscInitStruct = {}; RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; + RCC_PeriphCLKInitTypeDef PeriphClkInit = {}; /** Configure the main internal regulator output voltage */ @@ -37,9 +38,9 @@ WEAK void SystemClock_Config(void) RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV1; - RCC_OscInitStruct.PLL.PLLN = 9; + RCC_OscInitStruct.PLL.PLLN = 12; RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; - RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV3; + RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV4; RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV3; if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { Error_Handler(); @@ -53,7 +54,13 @@ WEAK void SystemClock_Config(void) RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) { + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) { + Error_Handler(); + } + + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB; + PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) { Error_Handler(); } } diff --git a/variants/STM32G0xx/G0B0VET/generic_clock.c b/variants/STM32G0xx/G0B0VET/generic_clock.c index 7f53a17a13..742f699b19 100644 --- a/variants/STM32G0xx/G0B0VET/generic_clock.c +++ b/variants/STM32G0xx/G0B0VET/generic_clock.c @@ -22,6 +22,7 @@ WEAK void SystemClock_Config(void) { RCC_OscInitTypeDef RCC_OscInitStruct = {}; RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; + RCC_PeriphCLKInitTypeDef PeriphClkInit = {}; /** Configure the main internal regulator output voltage */ @@ -37,9 +38,9 @@ WEAK void SystemClock_Config(void) RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV1; - RCC_OscInitStruct.PLL.PLLN = 9; + RCC_OscInitStruct.PLL.PLLN = 12; RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; - RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV3; + RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV4; RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV3; if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { Error_Handler(); @@ -53,7 +54,13 @@ WEAK void SystemClock_Config(void) RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) { + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) { + Error_Handler(); + } + + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB; + PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) { Error_Handler(); } } From 439661e4cb4068fe70e10342cbe3da88f9745ec1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jan=20=C5=A0pa=C4=8Dek?= Date: Thu, 15 May 2025 20:25:09 +0200 Subject: [PATCH 24/44] Add C071G(8-B)Ux board variant --- boards.txt | 23 +++ .../STM32C0xx/C071G(8-B)U/generic_clock.c | 39 +++- variants/STM32C0xx/C071G(8-B)U/ldscript.ld | 187 ++++++++++++++++++ 3 files changed, 247 insertions(+), 2 deletions(-) create mode 100644 variants/STM32C0xx/C071G(8-B)U/ldscript.ld diff --git a/boards.txt b/boards.txt index 737597a70c..4949894b0d 100644 --- a/boards.txt +++ b/boards.txt @@ -1782,6 +1782,24 @@ GenC0.menu.pnum.GENERIC_C031F6PX.build.product_line=STM32C031xx GenC0.menu.pnum.GENERIC_C031F6PX.build.variant=STM32C0xx/C031F(4-6)P GenC0.menu.pnum.GENERIC_C031F6PX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C0xx/STM32C031.svd +# Generic C071G8Ux +GenC0.menu.pnum.GENERIC_C071G8UX=Generic C071G8Ux +GenC0.menu.pnum.GENERIC_C071G8UX.upload.maximum_size=65536 +GenC0.menu.pnum.GENERIC_C071G8UX.upload.maximum_data_size=24576 +GenC0.menu.pnum.GENERIC_C071G8UX.build.board=GENERIC_C071G8UX +GenC0.menu.pnum.GENERIC_C071G8UX.build.product_line=STM32C071xx +GenC0.menu.pnum.GENERIC_C071G8UX.build.variant=STM32C0xx/C071G(8-B)U +GenC0.menu.pnum.GENERIC_C071G8UX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C0xx/STM32C071.svd + +# Generic C071GBUx +GenC0.menu.pnum.GENERIC_C071GBUX=Generic C071GBUx +GenC0.menu.pnum.GENERIC_C071GBUX.upload.maximum_size=131072 +GenC0.menu.pnum.GENERIC_C071GBUX.upload.maximum_data_size=24576 +GenC0.menu.pnum.GENERIC_C071GBUX.build.board=GENERIC_C071GBUX +GenC0.menu.pnum.GENERIC_C071GBUX.build.product_line=STM32C071xx +GenC0.menu.pnum.GENERIC_C071GBUX.build.variant=STM32C0xx/C071G(8-B)U +GenC0.menu.pnum.GENERIC_C071GBUX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C0xx/STM32C071.svd + # Generic C071R8Tx GenC0.menu.pnum.GENERIC_C071R8TX=Generic C071R8Tx GenC0.menu.pnum.GENERIC_C071R8TX.upload.maximum_size=65536 @@ -1816,6 +1834,11 @@ GenC0.menu.upload_method.serialMethod.upload.protocol=serial GenC0.menu.upload_method.serialMethod.upload.options=-c {serial.port.file} GenC0.menu.upload_method.serialMethod.upload.tool=stm32CubeProg +GenC0.menu.upload_method.dfuMethod=STM32CubeProgrammer (DFU) +GenC0.menu.upload_method.dfuMethod.upload.protocol=dfu +GenC0.menu.upload_method.dfuMethod.upload.options=-v {upload.vid} -p {upload.pid} +GenC0.menu.upload_method.dfuMethod.upload.tool=stm32CubeProg + GenC0.menu.upload_method.bmpMethod=BMP (Black Magic Probe) GenC0.menu.upload_method.bmpMethod.upload.protocol=gdb_bmp GenC0.menu.upload_method.bmpMethod.upload.tool=bmp_upload diff --git a/variants/STM32C0xx/C071G(8-B)U/generic_clock.c b/variants/STM32C0xx/C071G(8-B)U/generic_clock.c index 2949052fd4..cf5c096a49 100644 --- a/variants/STM32C0xx/C071G(8-B)U/generic_clock.c +++ b/variants/STM32C0xx/C071G(8-B)U/generic_clock.c @@ -12,6 +12,7 @@ */ #if defined(ARDUINO_GENERIC_C071G8UX) || defined(ARDUINO_GENERIC_C071GBUX) #include "pins_arduino.h" +#include "stm32yyxx_ll_utils.h" /** * @brief System Clock Configuration @@ -20,8 +21,42 @@ */ WEAK void SystemClock_Config(void) { - /* SystemClock_Config can be generated by STM32CubeMX */ -#warning "SystemClock_Config() is empty. Default clock at reset is used." + LL_FLASH_SetLatency(LL_FLASH_LATENCY_1); + + /* HSI configuration and activation */ + LL_RCC_HSI_Enable(); + while(LL_RCC_HSI_IsReady() != 1) + { + } + + LL_RCC_HSI_SetCalibTrimming(64); + LL_RCC_SetHSIDiv(LL_RCC_HSI_DIV_1); + LL_RCC_HSI48_Enable(); + + /* Wait till HSI48 is ready */ + while(LL_RCC_HSI48_IsReady() != 1) + { + } + + /* Set AHB prescaler*/ + LL_RCC_SetAHBPrescaler(LL_RCC_HCLK_DIV_1); + + /* Sysclk activation on the HSI */ + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_HSI); + while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_HSI) + { + } + + /* Set APB1 prescaler*/ + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); + /* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */ + LL_SetSystemCoreClock(48000000); + + /* Update the time base */ + if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) + { + Error_Handler(); + } } #endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32C0xx/C071G(8-B)U/ldscript.ld b/variants/STM32C0xx/C071G(8-B)U/ldscript.ld new file mode 100644 index 0000000000..9b17805ade --- /dev/null +++ b/variants/STM32C0xx/C071G(8-B)U/ldscript.ld @@ -0,0 +1,187 @@ +/* +****************************************************************************** +** +** @file : LinkerScript.ld +** +** @author : Auto-generated by STM32CubeIDE +** +** @brief : Linker script for STM32C071G8Ux Device from STM32C0 series +** 64KBytes FLASH +** 24KBytes RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used +** +** Target : STMicroelectronics STM32 +** +** Distribution: The file is distributed as is, without any warranty +** of any kind. +** +****************************************************************************** +** @attention +** +** Copyright (c) 2025 STMicroelectronics. +** All rights reserved. +** +** This software is licensed under terms that can be found in the LICENSE file +** in the root directory of this software component. +** If no LICENSE file comes with this software, it is provided AS-IS. +** +****************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ + +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Memories definition */ +MEMORY +{ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE + FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET +} + +/* Sections */ +SECTIONS +{ + /* The startup code into "FLASH" Rom type memory */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data into "FLASH" Rom type memory */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data into "FLASH" Rom type memory */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + *(.ARM.extab* .gnu.linkonce.armextab.*) + . = ALIGN(4); + } >FLASH + + .ARM (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + . = ALIGN(4); + } >FLASH + + .preinit_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + . = ALIGN(4); + } >FLASH + + .init_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + . = ALIGN(4); + } >FLASH + + .fini_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + . = ALIGN(4); + } >FLASH + + /* Used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections into "RAM" Ram type memory */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + *(.RamFunc) /* .RamFunc sections */ + *(.RamFunc*) /* .RamFunc* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + + } >RAM AT> FLASH + + /* Uninitialized data section into "RAM" Ram type memory */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + /* Remove information from the compiler libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} From 7941620d353d055fb8072ac466dcf5b069850a96 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jan=20=C5=A0pa=C4=8Dek?= Date: Thu, 15 May 2025 20:44:11 +0200 Subject: [PATCH 25/44] Fix {build.enable_usb} missing in GenC0.build.st_extra_flags --- boards.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/boards.txt b/boards.txt index 4949894b0d..5f2842c6ff 100644 --- a/boards.txt +++ b/boards.txt @@ -1659,7 +1659,7 @@ GenC0.build.core=arduino GenC0.build.board=GenC0 GenC0.build.mcu=cortex-m0plus GenC0.build.series=STM32C0xx -GenC0.build.st_extra_flags=-D{build.product_line} {build.xSerial} -D__CORTEX_SC=0 +GenC0.build.st_extra_flags=-D{build.product_line} {build.enable_usb} {build.xSerial} -D__CORTEX_SC=0 GenC0.build.flash_offset=0x0 GenC0.upload.maximum_size=0 GenC0.upload.maximum_data_size=0 From 02d700a96addd500fcf9c40557c39462bf50249c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jan=20=C5=A0pa=C4=8Dek?= Date: Thu, 15 May 2025 20:59:58 +0200 Subject: [PATCH 26/44] Add the C071G(8-B)U variant to the README --- README.md | 1 + 1 file changed, 1 insertion(+) diff --git a/README.md b/README.md index 70b2e3275a..3264f0f33c 100644 --- a/README.md +++ b/README.md @@ -221,6 +221,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d | :green_heart: | STM32C011J4
                                                                                                STM32C011J6 | Generic Board | *2.8.0* | | | :green_heart: | STM32C031C4
                                                                                                STM32C031C6 | Generic Board | *2.5.0* | | | :green_heart: | STM32C031F4
                                                                                                STM32C031F6 | Generic Board | *2.6.0* | | +| :yellow_heart: | STM32C071G8
                                                                                                STM32C071GB | Generic Board | **2.11.0** | | | :green_heart: | STM32C071R8
                                                                                                STM32C071RB | Generic Board | *2.9.0* | | ### Generic STM32F0 boards From 0618372c7c89f584a59a29b524736af4f91e8982 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jan=20=C5=A0pa=C4=8Dek?= Date: Fri, 16 May 2025 06:04:53 +0200 Subject: [PATCH 27/44] Fix astyle errors for C071G(8-B)U variant --- variants/STM32C0xx/C071G(8-B)U/generic_clock.c | 16 ++++++---------- 1 file changed, 6 insertions(+), 10 deletions(-) diff --git a/variants/STM32C0xx/C071G(8-B)U/generic_clock.c b/variants/STM32C0xx/C071G(8-B)U/generic_clock.c index cf5c096a49..c20147de69 100644 --- a/variants/STM32C0xx/C071G(8-B)U/generic_clock.c +++ b/variants/STM32C0xx/C071G(8-B)U/generic_clock.c @@ -25,17 +25,15 @@ WEAK void SystemClock_Config(void) /* HSI configuration and activation */ LL_RCC_HSI_Enable(); - while(LL_RCC_HSI_IsReady() != 1) - { + while (LL_RCC_HSI_IsReady() != 1) { } LL_RCC_HSI_SetCalibTrimming(64); LL_RCC_SetHSIDiv(LL_RCC_HSI_DIV_1); LL_RCC_HSI48_Enable(); - /* Wait till HSI48 is ready */ - while(LL_RCC_HSI48_IsReady() != 1) - { + /* Wait till HSI48 is ready */ + while (LL_RCC_HSI48_IsReady() != 1) { } /* Set AHB prescaler*/ @@ -43,8 +41,7 @@ WEAK void SystemClock_Config(void) /* Sysclk activation on the HSI */ LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_HSI); - while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_HSI) - { + while (LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_HSI) { } /* Set APB1 prescaler*/ @@ -52,9 +49,8 @@ WEAK void SystemClock_Config(void) /* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */ LL_SetSystemCoreClock(48000000); - /* Update the time base */ - if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK) - { + /* Update the time base */ + if (HAL_InitTick(TICK_INT_PRIORITY) != HAL_OK) { Error_Handler(); } } From a137815a874c67fde35d35c46d795b24d4eb25d9 Mon Sep 17 00:00:00 2001 From: patricklaf Date: Tue, 13 May 2025 16:22:33 +0200 Subject: [PATCH 28/44] variant(u5): add generic U595Z(I-J)TxQ, U599Z(I-J)TxQ, U5A5ZJTxQ and U5A9ZJTxQ Signed-off-by: patricklaf Co-authored-by: Frederic Pillon --- README.md | 5 + boards.txt | 54 ++++++ .../CMakeLists.txt | 1 + .../generic_clock.c | 61 ++++++- .../ldscript.ld | 166 ++++++++++++++++++ 5 files changed, 285 insertions(+), 2 deletions(-) create mode 100644 variants/STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ/ldscript.ld diff --git a/README.md b/README.md index 3264f0f33c..7eb887714b 100644 --- a/README.md +++ b/README.md @@ -778,6 +778,11 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d | :green_heart: | STM32U585AIIxQ | Generic Board | *2.1.0* | | | :green_heart: | STM32U585CIx | Generic Board | *2.7.0* | | | :green_heart: | STM32U585ZITxQ | Generic Board | *2.1.0* | | +| :yellow_heart: | STM32U595ZITxQ
                                                                                                STM32U595ZJTxQ | Generic Board | **2.11.0** | | +| :yellow_heart: | STM32U599ZITxQ
                                                                                                STM32U599ZJTxQ | Generic Board | **2.11.0** | | +| :yellow_heart: | STM32U5A5ZJTxQ | Generic Board | **2.11.0** | | +| :yellow_heart: | STM32U5A9ZJTxQ | Generic Board | **2.11.0** | | + ### Generic STM32WB boards diff --git a/boards.txt b/boards.txt index 5f2842c6ff..7f7548ae91 100644 --- a/boards.txt +++ b/boards.txt @@ -12757,6 +12757,60 @@ GenU5.menu.pnum.GENERIC_U585ZITXQ.build.product_line=STM32U585xx GenU5.menu.pnum.GENERIC_U585ZITXQ.build.variant=STM32U5xx/U575Z(G-I)TxQ_U585ZITxQ GenU5.menu.pnum.GENERIC_U585ZITXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U5xx/STM32U585.svd +# Generic U595ZITxQ +GenU5.menu.pnum.GENERIC_U595ZITXQ=Generic U595ZITxQ +GenU5.menu.pnum.GENERIC_U595ZITXQ.upload.maximum_size=2097152 +GenU5.menu.pnum.GENERIC_U595ZITXQ.upload.maximum_data_size=2555904 +GenU5.menu.pnum.GENERIC_U595ZITXQ.build.board=GENERIC_U595ZITXQ +GenU5.menu.pnum.GENERIC_U595ZITXQ.build.product_line=STM32U595xx +GenU5.menu.pnum.GENERIC_U595ZITXQ.build.variant=STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ +GenU5.menu.pnum.GENERIC_U595ZITXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U5xx/STM32U595.svd + +# Generic U595ZJTxQ +GenU5.menu.pnum.GENERIC_U595ZJTXQ=Generic U595ZJTxQ +GenU5.menu.pnum.GENERIC_U595ZJTXQ.upload.maximum_size=4194304 +GenU5.menu.pnum.GENERIC_U595ZJTXQ.upload.maximum_data_size=2555904 +GenU5.menu.pnum.GENERIC_U595ZJTXQ.build.board=GENERIC_U595ZJTXQ +GenU5.menu.pnum.GENERIC_U595ZJTXQ.build.product_line=STM32U595xx +GenU5.menu.pnum.GENERIC_U595ZJTXQ.build.variant=STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ +GenU5.menu.pnum.GENERIC_U595ZJTXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U5xx/STM32U595.svd + +# Generic U599ZITxQ +GenU5.menu.pnum.GENERIC_U599ZITXQ=Generic U599ZITxQ +GenU5.menu.pnum.GENERIC_U599ZITXQ.upload.maximum_size=2097152 +GenU5.menu.pnum.GENERIC_U599ZITXQ.upload.maximum_data_size=2555904 +GenU5.menu.pnum.GENERIC_U599ZITXQ.build.board=GENERIC_U599ZITXQ +GenU5.menu.pnum.GENERIC_U599ZITXQ.build.product_line=STM32U599xx +GenU5.menu.pnum.GENERIC_U599ZITXQ.build.variant=STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ +GenU5.menu.pnum.GENERIC_U599ZITXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U5xx/STM32U599.svd + +# Generic U599ZJTxQ +GenU5.menu.pnum.GENERIC_U599ZJTXQ=Generic U599ZJTxQ +GenU5.menu.pnum.GENERIC_U599ZJTXQ.upload.maximum_size=4194304 +GenU5.menu.pnum.GENERIC_U599ZJTXQ.upload.maximum_data_size=2555904 +GenU5.menu.pnum.GENERIC_U599ZJTXQ.build.board=GENERIC_U599ZJTXQ +GenU5.menu.pnum.GENERIC_U599ZJTXQ.build.product_line=STM32U599xx +GenU5.menu.pnum.GENERIC_U599ZJTXQ.build.variant=STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ +GenU5.menu.pnum.GENERIC_U599ZJTXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U5xx/STM32U599.svd + +# Generic U5A5ZJTxQ +GenU5.menu.pnum.GENERIC_U5A5ZJTXQ=Generic U5A5ZJTxQ +GenU5.menu.pnum.GENERIC_U5A5ZJTXQ.upload.maximum_size=4194304 +GenU5.menu.pnum.GENERIC_U5A5ZJTXQ.upload.maximum_data_size=2555904 +GenU5.menu.pnum.GENERIC_U5A5ZJTXQ.build.board=GENERIC_U5A5ZJTXQ +GenU5.menu.pnum.GENERIC_U5A5ZJTXQ.build.product_line=STM32U5A5xx +GenU5.menu.pnum.GENERIC_U5A5ZJTXQ.build.variant=STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ +GenU5.menu.pnum.GENERIC_U5A5ZJTXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U5xx/STM32U5A5.svd + +# Generic U5A9ZJTxQ +GenU5.menu.pnum.GENERIC_U5A9ZJTXQ=Generic U5A9ZJTxQ +GenU5.menu.pnum.GENERIC_U5A9ZJTXQ.upload.maximum_size=4194304 +GenU5.menu.pnum.GENERIC_U5A9ZJTXQ.upload.maximum_data_size=2555904 +GenU5.menu.pnum.GENERIC_U5A9ZJTXQ.build.board=GENERIC_U5A9ZJTXQ +GenU5.menu.pnum.GENERIC_U5A9ZJTXQ.build.product_line=STM32U5A9xx +GenU5.menu.pnum.GENERIC_U5A9ZJTXQ.build.variant=STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ +GenU5.menu.pnum.GENERIC_U5A9ZJTXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U5xx/STM32U5A9.svd + # Upload menu GenU5.menu.upload_method.swdMethod=STM32CubeProgrammer (SWD) GenU5.menu.upload_method.swdMethod.upload.protocol=swd diff --git a/variants/STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ/CMakeLists.txt b/variants/STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ/CMakeLists.txt index 2a4d55b6b1..18c6280c71 100644 --- a/variants/STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ/CMakeLists.txt +++ b/variants/STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ/CMakeLists.txt @@ -21,6 +21,7 @@ target_link_libraries(variant INTERFACE variant_usage) add_library(variant_bin STATIC EXCLUDE_FROM_ALL generic_clock.c PeripheralPins.c + PeripheralPins_NUCLEO_U5A5ZJ_Q.c variant_generic.cpp ) target_link_libraries(variant_bin PUBLIC variant_usage) diff --git a/variants/STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ/generic_clock.c b/variants/STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ/generic_clock.c index 92586599f3..ea9b2d2688 100644 --- a/variants/STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ/generic_clock.c +++ b/variants/STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ/generic_clock.c @@ -22,8 +22,65 @@ */ WEAK void SystemClock_Config(void) { - /* SystemClock_Config can be generated by STM32CubeMX */ -#warning "SystemClock_Config() is empty. Default clock at reset is used." + RCC_OscInitTypeDef RCC_OscInitStruct = {}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; + RCC_PeriphCLKInitTypeDef PeriphClkInit = {}; + + /** Configure the main internal regulator output voltage + */ + if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK) { + Error_Handler(); + } + + /** Initializes the CPU, AHB and APB buses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSI + | RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_MSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.LSIState = RCC_LSI_ON; + RCC_OscInitStruct.MSIState = RCC_MSI_ON; + RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT; + RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_0; + RCC_OscInitStruct.LSIDiv = RCC_LSI_DIV1; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI; + RCC_OscInitStruct.PLL.PLLMBOOST = RCC_PLLMBOOST_DIV4; + RCC_OscInitStruct.PLL.PLLM = 3; + RCC_OscInitStruct.PLL.PLLN = 10; + RCC_OscInitStruct.PLL.PLLP = 4; + RCC_OscInitStruct.PLL.PLLQ = 2; + RCC_OscInitStruct.PLL.PLLR = 1; + RCC_OscInitStruct.PLL.PLLRGE = RCC_PLLVCIRANGE_1; + RCC_OscInitStruct.PLL.PLLFRACN = 0; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { + Error_Handler(); + } + /** Initializes the CPU, AHB and APB buses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK + | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 + | RCC_CLOCKTYPE_PCLK3; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB3CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) { + Error_Handler(); + } + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADCDAC | RCC_PERIPHCLK_DAC1 + | RCC_PERIPHCLK_CLK48 | RCC_PERIPHCLK_LPUART1; + PeriphClkInit.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_HSI; + PeriphClkInit.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_HSI; + PeriphClkInit.Dac1ClockSelection = RCC_DAC1CLKSOURCE_LSI; + PeriphClkInit.IclkClockSelection = RCC_CLK48CLKSOURCE_HSI48; + + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) { + Error_Handler(); + } } #endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ/ldscript.ld b/variants/STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ/ldscript.ld new file mode 100644 index 0000000000..25ad08b557 --- /dev/null +++ b/variants/STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ/ldscript.ld @@ -0,0 +1,166 @@ +/* +****************************************************************************** +** +** File : LinkerScript.ld +** +** Author : STM32CubeIDE +** +** Abstract : Linker script for STM32U595xI Device from STM32U5 series +** 2048Kbytes FLASH +** 2512Kbytes RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Distribution: The file is distributed as is without any warranty +** of any kind. +** +***************************************************************************** +** @attention +** +** Copyright (c) 2024 STMicroelectronics. +** All rights reserved. +** +** This software is licensed under terms that can be found in the LICENSE file +** in the root directory of this software component. +** If no LICENSE file comes with this software, it is provided AS-IS. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ + +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Memories definition */ +MEMORY +{ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE + SRAM4 (xrw) : ORIGIN = 0x28000000, LENGTH = 16K + FLASH (rx) : ORIGIN = 0x08000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET +} + +/* Sections */ +SECTIONS +{ + /* The startup code into "FLASH" Rom type memory */ + .isr_vector : + { + KEEP(*(.isr_vector)) /* Startup code */ + } >FLASH + + /* The program code and other data into "FLASH" Rom type memory */ + .text : + { + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data into "FLASH" Rom type memory */ + .rodata : + { + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + } >FLASH + + .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } >FLASH + .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + + .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + + .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* Used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections into "RAM" Ram type memory */ + .data : + { + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + *(.RamFunc) /* .RamFunc sections */ + *(.RamFunc*) /* .RamFunc* sections */ + + _edata = .; /* define a global symbol at data end */ + } >RAM AT> FLASH + + /* Uninitialized data section into "RAM" Ram type memory */ + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + /* Remove information from the compiler libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} From 6ffb6962f5f5ccd0d0ad5037b3e54c5c5903cfb0 Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Wed, 14 May 2025 16:30:24 +0200 Subject: [PATCH 29/44] variant(u5): add Nucleo-U5A5ZJ-Q Signed-off-by: patricklaf Co-authored-by: Frederic Pillon --- README.md | 1 + boards.txt | 16 + cmake/boards_db.cmake | 574 +++++++++++++++ .../CMakeLists.txt | 1 + .../PeripheralPins_NUCLEO_U5A5ZJ_Q.c | 675 ++++++++++++++++++ .../variant_NUCLEO_U5A5ZJ_Q.cpp | 270 +++++++ .../variant_NUCLEO_U5A5ZJ_Q.h | 296 ++++++++ 7 files changed, 1833 insertions(+) create mode 100644 variants/STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ/PeripheralPins_NUCLEO_U5A5ZJ_Q.c create mode 100644 variants/STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ/variant_NUCLEO_U5A5ZJ_Q.cpp create mode 100644 variants/STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ/variant_NUCLEO_U5A5ZJ_Q.h diff --git a/README.md b/README.md index 7eb887714b..f65e8c74ed 100644 --- a/README.md +++ b/README.md @@ -121,6 +121,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d | :green_heart: | STM32L4R5ZI-P | [Nucleo L4R5ZI-P](http://www.st.com/en/evaluation-tools/nucleo-l4r5zi-p.html) | *1.4.0* | | | :green_heart: | STM32L552ZE-Q | [Nucleo L552ZE-Q](https://www.st.com/en/evaluation-tools/nucleo-l552ze-q.html) | *2.0.0* | | | :green_heart: | STM32U575ZI-Q | [NUCLEO-U575ZI-Q](https://www.st.com/en/evaluation-tools/nucleo-u575zi-q.html) | *2.1.0* | | +| :yellow_heart: | STM32U5A5ZJ-Q | [NUCLEO-U5A5ZJ-Q](https://www.st.com/en/evaluation-tools/nucleo-u5a5zj-q.html) | **2.11.0** | | ### [Nucleo 64](https://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-eval-tools/stm32-mcu-eval-tools/stm32-nucleo-boards.html) boards diff --git a/boards.txt b/boards.txt index 7f7548ae91..25340dc5d2 100644 --- a/boards.txt +++ b/boards.txt @@ -380,6 +380,22 @@ Nucleo_144.menu.pnum.NUCLEO_U575ZI_Q.build.peripheral_pins=-DCUSTOM_PERIPHERAL_P Nucleo_144.menu.pnum.NUCLEO_U575ZI_Q.openocd.target=stm32u5x Nucleo_144.menu.pnum.NUCLEO_U575ZI_Q.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U5xx/STM32U575.svd +# NUCLEO_U5A5ZJ_Q board +Nucleo_144.menu.pnum.NUCLEO_U5A5ZJ_Q=Nucleo U5A5ZJ-Q +Nucleo_144.menu.pnum.NUCLEO_U5A5ZJ_Q.node=NOD_U5A5ZJ +Nucleo_144.menu.pnum.NUCLEO_U5A5ZJ_Q.upload.maximum_size=4194304 +Nucleo_144.menu.pnum.NUCLEO_U5A5ZJ_Q.upload.maximum_data_size=2555904 +Nucleo_144.menu.pnum.NUCLEO_U5A5ZJ_Q.build.mcu=cortex-m33 +Nucleo_144.menu.pnum.NUCLEO_U5A5ZJ_Q.build.fpu=-mfpu=fpv4-sp-d16 +Nucleo_144.menu.pnum.NUCLEO_U5A5ZJ_Q.build.float-abi=-mfloat-abi=hard +Nucleo_144.menu.pnum.NUCLEO_U5A5ZJ_Q.build.board=NUCLEO_U5A5ZJ_Q +Nucleo_144.menu.pnum.NUCLEO_U5A5ZJ_Q.build.series=STM32U5xx +Nucleo_144.menu.pnum.NUCLEO_U5A5ZJ_Q.build.product_line=STM32U5A5xx +Nucleo_144.menu.pnum.NUCLEO_U5A5ZJ_Q.build.variant=STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ +Nucleo_144.menu.pnum.NUCLEO_U5A5ZJ_Q.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS +Nucleo_144.menu.pnum.NUCLEO_U5A5ZJ_Q.openocd.target=stm32u5x +Nucleo_144.menu.pnum.NUCLEO_U5A5ZJ_Q.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U5xx/STM32U5A5.svd + # Upload menu Nucleo_144.menu.upload_method.MassStorage=Mass Storage Nucleo_144.menu.upload_method.MassStorage.upload.protocol= diff --git a/cmake/boards_db.cmake b/cmake/boards_db.cmake index ea28c93087..89e79e252b 100644 --- a/cmake/boards_db.cmake +++ b/cmake/boards_db.cmake @@ -102828,6 +102828,498 @@ target_compile_options(GENERIC_U585ZITXQ_xusb_HSFS INTERFACE "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" ) +# GENERIC_U595ZITXQ +# ----------------------------------------------------------------------------- + +set(GENERIC_U595ZITXQ_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ") +set(GENERIC_U595ZITXQ_MAXSIZE 2097152) +set(GENERIC_U595ZITXQ_MAXDATASIZE 2555904) +set(GENERIC_U595ZITXQ_MCU cortex-m33) +set(GENERIC_U595ZITXQ_FPCONF "-") +add_library(GENERIC_U595ZITXQ INTERFACE) +target_compile_options(GENERIC_U595ZITXQ INTERFACE + "SHELL:-DSTM32U595xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_U595ZITXQ_MCU} +) +target_compile_definitions(GENERIC_U595ZITXQ INTERFACE + "STM32U5xx" + "ARDUINO_GENERIC_U595ZITXQ" + "BOARD_NAME=\"GENERIC_U595ZITXQ\"" + "BOARD_ID=GENERIC_U595ZITXQ" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_U595ZITXQ INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32U5xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32U5xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32U5xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32U5xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32U5xx/Source/Templates/gcc/ + ${GENERIC_U595ZITXQ_VARIANT_PATH} +) + +target_link_options(GENERIC_U595ZITXQ INTERFACE + "LINKER:--default-script=${GENERIC_U595ZITXQ_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=2555904" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_U595ZITXQ_MCU} +) + +add_library(GENERIC_U595ZITXQ_serial_disabled INTERFACE) +target_compile_options(GENERIC_U595ZITXQ_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_U595ZITXQ_serial_generic INTERFACE) +target_compile_options(GENERIC_U595ZITXQ_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_U595ZITXQ_serial_none INTERFACE) +target_compile_options(GENERIC_U595ZITXQ_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_U595ZITXQ_usb_CDC INTERFACE) +target_compile_options(GENERIC_U595ZITXQ_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_U595ZITXQ_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_U595ZITXQ_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_U595ZITXQ_usb_HID INTERFACE) +target_compile_options(GENERIC_U595ZITXQ_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_U595ZITXQ_usb_none INTERFACE) +target_compile_options(GENERIC_U595ZITXQ_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_U595ZITXQ_xusb_FS INTERFACE) +target_compile_options(GENERIC_U595ZITXQ_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_U595ZITXQ_xusb_HS INTERFACE) +target_compile_options(GENERIC_U595ZITXQ_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_U595ZITXQ_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_U595ZITXQ_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_U595ZJTXQ +# ----------------------------------------------------------------------------- + +set(GENERIC_U595ZJTXQ_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ") +set(GENERIC_U595ZJTXQ_MAXSIZE 4194304) +set(GENERIC_U595ZJTXQ_MAXDATASIZE 2555904) +set(GENERIC_U595ZJTXQ_MCU cortex-m33) +set(GENERIC_U595ZJTXQ_FPCONF "-") +add_library(GENERIC_U595ZJTXQ INTERFACE) +target_compile_options(GENERIC_U595ZJTXQ INTERFACE + "SHELL:-DSTM32U595xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_U595ZJTXQ_MCU} +) +target_compile_definitions(GENERIC_U595ZJTXQ INTERFACE + "STM32U5xx" + "ARDUINO_GENERIC_U595ZJTXQ" + "BOARD_NAME=\"GENERIC_U595ZJTXQ\"" + "BOARD_ID=GENERIC_U595ZJTXQ" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_U595ZJTXQ INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32U5xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32U5xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32U5xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32U5xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32U5xx/Source/Templates/gcc/ + ${GENERIC_U595ZJTXQ_VARIANT_PATH} +) + +target_link_options(GENERIC_U595ZJTXQ INTERFACE + "LINKER:--default-script=${GENERIC_U595ZJTXQ_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x0" + "LINKER:--defsym=LD_MAX_SIZE=4194304" + "LINKER:--defsym=LD_MAX_DATA_SIZE=2555904" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_U595ZJTXQ_MCU} +) + +add_library(GENERIC_U595ZJTXQ_serial_disabled INTERFACE) +target_compile_options(GENERIC_U595ZJTXQ_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_U595ZJTXQ_serial_generic INTERFACE) +target_compile_options(GENERIC_U595ZJTXQ_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_U595ZJTXQ_serial_none INTERFACE) +target_compile_options(GENERIC_U595ZJTXQ_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_U595ZJTXQ_usb_CDC INTERFACE) +target_compile_options(GENERIC_U595ZJTXQ_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_U595ZJTXQ_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_U595ZJTXQ_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_U595ZJTXQ_usb_HID INTERFACE) +target_compile_options(GENERIC_U595ZJTXQ_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_U595ZJTXQ_usb_none INTERFACE) +target_compile_options(GENERIC_U595ZJTXQ_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_U595ZJTXQ_xusb_FS INTERFACE) +target_compile_options(GENERIC_U595ZJTXQ_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_U595ZJTXQ_xusb_HS INTERFACE) +target_compile_options(GENERIC_U595ZJTXQ_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_U595ZJTXQ_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_U595ZJTXQ_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_U599ZITXQ +# ----------------------------------------------------------------------------- + +set(GENERIC_U599ZITXQ_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ") +set(GENERIC_U599ZITXQ_MAXSIZE 2097152) +set(GENERIC_U599ZITXQ_MAXDATASIZE 2555904) +set(GENERIC_U599ZITXQ_MCU cortex-m33) +set(GENERIC_U599ZITXQ_FPCONF "-") +add_library(GENERIC_U599ZITXQ INTERFACE) +target_compile_options(GENERIC_U599ZITXQ INTERFACE + "SHELL:-DSTM32U599xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_U599ZITXQ_MCU} +) +target_compile_definitions(GENERIC_U599ZITXQ INTERFACE + "STM32U5xx" + "ARDUINO_GENERIC_U599ZITXQ" + "BOARD_NAME=\"GENERIC_U599ZITXQ\"" + "BOARD_ID=GENERIC_U599ZITXQ" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_U599ZITXQ INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32U5xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32U5xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32U5xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32U5xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32U5xx/Source/Templates/gcc/ + ${GENERIC_U599ZITXQ_VARIANT_PATH} +) + +target_link_options(GENERIC_U599ZITXQ INTERFACE + "LINKER:--default-script=${GENERIC_U599ZITXQ_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=2555904" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_U599ZITXQ_MCU} +) + +add_library(GENERIC_U599ZITXQ_serial_disabled INTERFACE) +target_compile_options(GENERIC_U599ZITXQ_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_U599ZITXQ_serial_generic INTERFACE) +target_compile_options(GENERIC_U599ZITXQ_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_U599ZITXQ_serial_none INTERFACE) +target_compile_options(GENERIC_U599ZITXQ_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_U599ZITXQ_usb_CDC INTERFACE) +target_compile_options(GENERIC_U599ZITXQ_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_U599ZITXQ_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_U599ZITXQ_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_U599ZITXQ_usb_HID INTERFACE) +target_compile_options(GENERIC_U599ZITXQ_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_U599ZITXQ_usb_none INTERFACE) +target_compile_options(GENERIC_U599ZITXQ_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_U599ZITXQ_xusb_FS INTERFACE) +target_compile_options(GENERIC_U599ZITXQ_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_U599ZITXQ_xusb_HS INTERFACE) +target_compile_options(GENERIC_U599ZITXQ_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_U599ZITXQ_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_U599ZITXQ_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_U599ZJTXQ +# ----------------------------------------------------------------------------- + +set(GENERIC_U599ZJTXQ_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ") +set(GENERIC_U599ZJTXQ_MAXSIZE 4194304) +set(GENERIC_U599ZJTXQ_MAXDATASIZE 2555904) +set(GENERIC_U599ZJTXQ_MCU cortex-m33) +set(GENERIC_U599ZJTXQ_FPCONF "-") +add_library(GENERIC_U599ZJTXQ INTERFACE) +target_compile_options(GENERIC_U599ZJTXQ INTERFACE + "SHELL:-DSTM32U599xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_U599ZJTXQ_MCU} +) +target_compile_definitions(GENERIC_U599ZJTXQ INTERFACE + "STM32U5xx" + "ARDUINO_GENERIC_U599ZJTXQ" + "BOARD_NAME=\"GENERIC_U599ZJTXQ\"" + "BOARD_ID=GENERIC_U599ZJTXQ" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_U599ZJTXQ INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32U5xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32U5xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32U5xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32U5xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32U5xx/Source/Templates/gcc/ + ${GENERIC_U599ZJTXQ_VARIANT_PATH} +) + +target_link_options(GENERIC_U599ZJTXQ INTERFACE + "LINKER:--default-script=${GENERIC_U599ZJTXQ_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x0" + "LINKER:--defsym=LD_MAX_SIZE=4194304" + "LINKER:--defsym=LD_MAX_DATA_SIZE=2555904" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_U599ZJTXQ_MCU} +) + +add_library(GENERIC_U599ZJTXQ_serial_disabled INTERFACE) +target_compile_options(GENERIC_U599ZJTXQ_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_U599ZJTXQ_serial_generic INTERFACE) +target_compile_options(GENERIC_U599ZJTXQ_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_U599ZJTXQ_serial_none INTERFACE) +target_compile_options(GENERIC_U599ZJTXQ_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_U599ZJTXQ_usb_CDC INTERFACE) +target_compile_options(GENERIC_U599ZJTXQ_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_U599ZJTXQ_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_U599ZJTXQ_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_U599ZJTXQ_usb_HID INTERFACE) +target_compile_options(GENERIC_U599ZJTXQ_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_U599ZJTXQ_usb_none INTERFACE) +target_compile_options(GENERIC_U599ZJTXQ_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_U599ZJTXQ_xusb_FS INTERFACE) +target_compile_options(GENERIC_U599ZJTXQ_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_U599ZJTXQ_xusb_HS INTERFACE) +target_compile_options(GENERIC_U599ZJTXQ_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_U599ZJTXQ_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_U599ZJTXQ_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_U5A5ZJTXQ +# ----------------------------------------------------------------------------- + +set(GENERIC_U5A5ZJTXQ_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ") +set(GENERIC_U5A5ZJTXQ_MAXSIZE 4194304) +set(GENERIC_U5A5ZJTXQ_MAXDATASIZE 2555904) +set(GENERIC_U5A5ZJTXQ_MCU cortex-m33) +set(GENERIC_U5A5ZJTXQ_FPCONF "-") +add_library(GENERIC_U5A5ZJTXQ INTERFACE) +target_compile_options(GENERIC_U5A5ZJTXQ INTERFACE + "SHELL:-DSTM32U5A5xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_U5A5ZJTXQ_MCU} +) +target_compile_definitions(GENERIC_U5A5ZJTXQ INTERFACE + "STM32U5xx" + "ARDUINO_GENERIC_U5A5ZJTXQ" + "BOARD_NAME=\"GENERIC_U5A5ZJTXQ\"" + "BOARD_ID=GENERIC_U5A5ZJTXQ" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_U5A5ZJTXQ INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32U5xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32U5xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32U5xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32U5xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32U5xx/Source/Templates/gcc/ + ${GENERIC_U5A5ZJTXQ_VARIANT_PATH} +) + +target_link_options(GENERIC_U5A5ZJTXQ INTERFACE + "LINKER:--default-script=${GENERIC_U5A5ZJTXQ_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x0" + "LINKER:--defsym=LD_MAX_SIZE=4194304" + "LINKER:--defsym=LD_MAX_DATA_SIZE=2555904" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_U5A5ZJTXQ_MCU} +) + +add_library(GENERIC_U5A5ZJTXQ_serial_disabled INTERFACE) +target_compile_options(GENERIC_U5A5ZJTXQ_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_U5A5ZJTXQ_serial_generic INTERFACE) +target_compile_options(GENERIC_U5A5ZJTXQ_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_U5A5ZJTXQ_serial_none INTERFACE) +target_compile_options(GENERIC_U5A5ZJTXQ_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_U5A5ZJTXQ_usb_CDC INTERFACE) +target_compile_options(GENERIC_U5A5ZJTXQ_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_U5A5ZJTXQ_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_U5A5ZJTXQ_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_U5A5ZJTXQ_usb_HID INTERFACE) +target_compile_options(GENERIC_U5A5ZJTXQ_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_U5A5ZJTXQ_usb_none INTERFACE) +target_compile_options(GENERIC_U5A5ZJTXQ_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_U5A5ZJTXQ_xusb_FS INTERFACE) +target_compile_options(GENERIC_U5A5ZJTXQ_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_U5A5ZJTXQ_xusb_HS INTERFACE) +target_compile_options(GENERIC_U5A5ZJTXQ_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_U5A5ZJTXQ_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_U5A5ZJTXQ_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_U5A9ZJTXQ +# ----------------------------------------------------------------------------- + +set(GENERIC_U5A9ZJTXQ_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ") +set(GENERIC_U5A9ZJTXQ_MAXSIZE 4194304) +set(GENERIC_U5A9ZJTXQ_MAXDATASIZE 2555904) +set(GENERIC_U5A9ZJTXQ_MCU cortex-m33) +set(GENERIC_U5A9ZJTXQ_FPCONF "-") +add_library(GENERIC_U5A9ZJTXQ INTERFACE) +target_compile_options(GENERIC_U5A9ZJTXQ INTERFACE + "SHELL:-DSTM32U5A9xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_U5A9ZJTXQ_MCU} +) +target_compile_definitions(GENERIC_U5A9ZJTXQ INTERFACE + "STM32U5xx" + "ARDUINO_GENERIC_U5A9ZJTXQ" + "BOARD_NAME=\"GENERIC_U5A9ZJTXQ\"" + "BOARD_ID=GENERIC_U5A9ZJTXQ" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_U5A9ZJTXQ INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32U5xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32U5xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32U5xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32U5xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32U5xx/Source/Templates/gcc/ + ${GENERIC_U5A9ZJTXQ_VARIANT_PATH} +) + +target_link_options(GENERIC_U5A9ZJTXQ INTERFACE + "LINKER:--default-script=${GENERIC_U5A9ZJTXQ_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x0" + "LINKER:--defsym=LD_MAX_SIZE=4194304" + "LINKER:--defsym=LD_MAX_DATA_SIZE=2555904" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_U5A9ZJTXQ_MCU} +) + +add_library(GENERIC_U5A9ZJTXQ_serial_disabled INTERFACE) +target_compile_options(GENERIC_U5A9ZJTXQ_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_U5A9ZJTXQ_serial_generic INTERFACE) +target_compile_options(GENERIC_U5A9ZJTXQ_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_U5A9ZJTXQ_serial_none INTERFACE) +target_compile_options(GENERIC_U5A9ZJTXQ_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_U5A9ZJTXQ_usb_CDC INTERFACE) +target_compile_options(GENERIC_U5A9ZJTXQ_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_U5A9ZJTXQ_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_U5A9ZJTXQ_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_U5A9ZJTXQ_usb_HID INTERFACE) +target_compile_options(GENERIC_U5A9ZJTXQ_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_U5A9ZJTXQ_usb_none INTERFACE) +target_compile_options(GENERIC_U5A9ZJTXQ_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_U5A9ZJTXQ_xusb_FS INTERFACE) +target_compile_options(GENERIC_U5A9ZJTXQ_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_U5A9ZJTXQ_xusb_HS INTERFACE) +target_compile_options(GENERIC_U5A9ZJTXQ_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_U5A9ZJTXQ_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_U5A9ZJTXQ_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + # GENERIC_WB15CCUX # ----------------------------------------------------------------------------- @@ -110900,6 +111392,88 @@ target_compile_options(NUCLEO_U575ZI_Q_xusb_HSFS INTERFACE "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" ) +# NUCLEO_U5A5ZJ_Q +# ----------------------------------------------------------------------------- + +set(NUCLEO_U5A5ZJ_Q_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ") +set(NUCLEO_U5A5ZJ_Q_MAXSIZE 4194304) +set(NUCLEO_U5A5ZJ_Q_MAXDATASIZE 2555904) +set(NUCLEO_U5A5ZJ_Q_MCU cortex-m33) +set(NUCLEO_U5A5ZJ_Q_FPCONF "fpv4-sp-d16-hard") +add_library(NUCLEO_U5A5ZJ_Q INTERFACE) +target_compile_options(NUCLEO_U5A5ZJ_Q INTERFACE + "SHELL:-DSTM32U5A5xx " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_U5A5ZJ_Q_MCU} +) +target_compile_definitions(NUCLEO_U5A5ZJ_Q INTERFACE + "STM32U5xx" + "ARDUINO_NUCLEO_U5A5ZJ_Q" + "BOARD_NAME=\"NUCLEO_U5A5ZJ_Q\"" + "BOARD_ID=NUCLEO_U5A5ZJ_Q" + "VARIANT_H=\"variant_NUCLEO_U5A5ZJ_Q.h\"" +) +target_include_directories(NUCLEO_U5A5ZJ_Q INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32U5xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32U5xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32U5xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32U5xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32U5xx/Source/Templates/gcc/ + ${NUCLEO_U5A5ZJ_Q_VARIANT_PATH} +) + +target_link_options(NUCLEO_U5A5ZJ_Q INTERFACE + "LINKER:--default-script=${NUCLEO_U5A5ZJ_Q_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x0" + "LINKER:--defsym=LD_MAX_SIZE=4194304" + "LINKER:--defsym=LD_MAX_DATA_SIZE=2555904" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_U5A5ZJ_Q_MCU} +) + +add_library(NUCLEO_U5A5ZJ_Q_serial_disabled INTERFACE) +target_compile_options(NUCLEO_U5A5ZJ_Q_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_U5A5ZJ_Q_serial_generic INTERFACE) +target_compile_options(NUCLEO_U5A5ZJ_Q_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_U5A5ZJ_Q_serial_none INTERFACE) +target_compile_options(NUCLEO_U5A5ZJ_Q_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_U5A5ZJ_Q_usb_CDC INTERFACE) +target_compile_options(NUCLEO_U5A5ZJ_Q_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_U5A5ZJ_Q_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_U5A5ZJ_Q_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_U5A5ZJ_Q_usb_HID INTERFACE) +target_compile_options(NUCLEO_U5A5ZJ_Q_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_U5A5ZJ_Q_usb_none INTERFACE) +target_compile_options(NUCLEO_U5A5ZJ_Q_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_U5A5ZJ_Q_xusb_FS INTERFACE) +target_compile_options(NUCLEO_U5A5ZJ_Q_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_U5A5ZJ_Q_xusb_HS INTERFACE) +target_compile_options(NUCLEO_U5A5ZJ_Q_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_U5A5ZJ_Q_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_U5A5ZJ_Q_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + # NUCLEO_WB15CC # ----------------------------------------------------------------------------- diff --git a/variants/STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ/CMakeLists.txt b/variants/STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ/CMakeLists.txt index 18c6280c71..c91cbe25e0 100644 --- a/variants/STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ/CMakeLists.txt +++ b/variants/STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ/CMakeLists.txt @@ -23,6 +23,7 @@ add_library(variant_bin STATIC EXCLUDE_FROM_ALL PeripheralPins.c PeripheralPins_NUCLEO_U5A5ZJ_Q.c variant_generic.cpp + variant_NUCLEO_U5A5ZJ_Q.cpp ) target_link_libraries(variant_bin PUBLIC variant_usage) diff --git a/variants/STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ/PeripheralPins_NUCLEO_U5A5ZJ_Q.c b/variants/STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ/PeripheralPins_NUCLEO_U5A5ZJ_Q.c new file mode 100644 index 0000000000..602a9e73cd --- /dev/null +++ b/variants/STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ/PeripheralPins_NUCLEO_U5A5ZJ_Q.c @@ -0,0 +1,675 @@ +/* + ******************************************************************************* + * Copyright (c) 2020, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +/* + * Automatically generated from STM32U595ZITxQ.xml, STM32U595ZJTxQ.xml + * STM32U599ZITxQ.xml, STM32U599ZJTxQ.xml + * STM32U5A5ZJTxQ.xml, STM32U5A9ZJTxQ.xml + * CubeMX DB release 6.0.140 + */ +#if defined(ARDUINO_NUCLEO_U5A5ZJ_Q) +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Notes: + * - The pins mentioned Px_y_ALTz are alternative possibilities which use other + * HW peripheral instances. You can use them the same way as any other "normal" + * pin (i.e. analogWrite(PA7_ALT1, 128);). + * + * - Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +WEAK const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_0_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_1_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PA_2_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PA_3_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PA_4_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PA_4_ALT2, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC4_IN9 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PA_5_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {PA_5_ALT2, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC4_IN10 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + {PA_6_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 + {PA_6_ALT2, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC4_IN11 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + {PA_7_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 + {PA_7_ALT2, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 20, 0)}, // ADC4_IN20 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + {PB_0_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15 + {PB_0_ALT2, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 18, 0)}, // ADC4_IN18 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_IN16 + {PB_1_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC2_IN16 + {PB_1_ALT2, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 19, 0)}, // ADC4_IN19 + {PB_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 17, 0)}, // ADC1_IN17 + {PB_2_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 17, 0)}, // ADC2_IN17 + {PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1 + {PC_0_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1 + {PC_0_ALT2, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC4_IN1 + {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 + {PC_1_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2 + {PC_1_ALT2, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC4_IN2 + {PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 + {PC_2_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3 + {PC_2_ALT2, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC4_IN3 + {PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4 + {PC_3_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4 + {PC_3_ALT2, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC4_IN4 + {PD_11, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC4_IN15 + {PD_12, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC4_IN16 + {PD_13, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 17, 0)}, // ADC4_IN17 + {PF_14, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC4_IN5 + {PF_15, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC4_IN6 + {PG_0, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC4_IN7 + {PG_1, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC4_IN8 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +#ifdef HAL_DAC_MODULE_ENABLED +WEAK const PinMap PinMap_DAC[] = { + {PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC1_OUT1 + {PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC1_OUT2 + {NC, NP, 0} +}; +#endif + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SDA[] = { + {PB_3, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_7_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I2C4)}, + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_11_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I2C4)}, + {PB_14, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_1, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PD_0, I2C5, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C5)}, + {PD_0_ALT1, I2C6, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF2_I2C6)}, + {PD_13, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, + {PF_0, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PF_0_ALT1, I2C6, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF2_I2C6)}, + {PF_15, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, + {PG_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PG_13, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SCL[] = { + {PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_6_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I2C4)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_10_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I2C4)}, + {PB_13, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_0, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PD_1, I2C5, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C5)}, + {PD_1_ALT1, I2C6, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF2_I2C6)}, + {PD_12, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, + {PF_1, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PF_1_ALT1, I2C6, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF2_I2C6)}, + {PF_14, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, + {PG_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PG_14, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {NC, NP, 0} +}; +#endif + +//*** No I3C *** + +//*** TIM *** + +#ifdef HAL_TIM_MODULE_ENABLED +WEAK const PinMap PinMap_TIM[] = { + {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_0_ALT1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1 + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1_ALT1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2 + {PA_1_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2_ALT1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3 + {PA_2_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3_ALT1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4 + {PA_3_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_5_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PA_6_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_7_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PA_7_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_7_ALT3, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_0_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PB_0_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_1_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PB_1_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + {PB_2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 1)}, // TIM8_CH4N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PB_6_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N + {PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PB_7_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 1)}, // TIM17_CH1N + {PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PB_8_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PB_9_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PB_13_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_14_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_14_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_15_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + {PB_15_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PC_6_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1 + {PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PC_7_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2 + {PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PC_8_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3 + {PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PC_9_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4 + {PD_0, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 1)}, // TIM8_CH4N + {PD_12, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PD_13, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PD_14, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PD_15, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PE_0, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PE_1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 + {PE_3, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PE_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PE_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PE_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PE_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PE_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PE_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PE_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PE_12, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PE_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PE_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PE_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM1, 4, 1)}, // TIM1_CH4N + {PF_6, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1 + {PF_7, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2 + {PF_8, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3 + {PF_9, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4 + {PF_9_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PF_10, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PG_9, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PG_10, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {NC, NP, 0} +}; +#endif + +//*** UART *** + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_TX[] = { + {PA_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_2_ALT1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_7, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_11, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_3, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)}, + {PC_9, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)}, + {PC_10, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_10_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PD_5, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_8, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PE_1, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)}, + {PF_0, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)}, + {PF_3, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PG_7, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PG_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RX[] = { + {PA_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_3_ALT1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_5, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART2)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_0, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_2, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)}, + {PC_8, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)}, + {PC_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_11_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_2, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PD_6, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_9, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PE_0, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)}, + {PF_1, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)}, + {PF_4, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PG_8, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PG_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_15_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_1_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_2, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_4, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_12, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_15, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)}, + {PE_4, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)}, + {PF_4, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)}, + {PG_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PG_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_CTS[] = { + {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_6_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_5, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PB_7, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_13, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_13_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_0, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)}, + {PD_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_13, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)}, + {PE_3, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)}, + {PF_3, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)}, + {PG_5, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_SPI2)}, + {PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PD_4, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PD_6, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI3)}, + {PE_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PD_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PE_14, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SCLK[] = { + {PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_SPI2)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PD_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PD_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_SPI2)}, + {PE_13, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_2, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_9, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_4_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_0, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PD_0, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PE_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +//*** FDCAN *** + +#ifdef HAL_FDCAN_MODULE_ENABLED +WEAK const PinMap PinMap_CAN_RD[] = { + {PA_11, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_8, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PD_0, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PF_7, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_FDCAN_MODULE_ENABLED +WEAK const PinMap PinMap_CAN_TD[] = { + {PA_12, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_9, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PD_1, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PF_8, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {NC, NP, 0} +}; +#endif + +//*** No ETHERNET *** + +//*** OCTOSPI *** + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA0[] = { + {PB_1, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPIM_P1_IO0 + {PE_12, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPIM_P1_IO0 + {PF_0, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_OCTOSPI2)}, // OCTOSPIM_P2_IO0 + {PF_8, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPIM_P1_IO0 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA1[] = { + {PB_0, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPIM_P1_IO1 + {PE_13, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPIM_P1_IO1 + {PF_1, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_OCTOSPI2)}, // OCTOSPIM_P2_IO1 + {PF_9, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPIM_P1_IO1 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA2[] = { + {PA_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPIM_P1_IO2 + {PE_14, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPIM_P1_IO2 + {PF_2, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_OCTOSPI2)}, // OCTOSPIM_P2_IO2 + {PF_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPIM_P1_IO2 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA3[] = { + {PA_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPIM_P1_IO3 + {PE_15, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPIM_P1_IO3 + {PF_3, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_OCTOSPI2)}, // OCTOSPIM_P2_IO3 + {PF_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPIM_P1_IO3 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA4[] = { + {PC_1, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPIM_P1_IO4 + {PD_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPIM_P1_IO4 + {PG_0, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_OCTOSPI2)}, // OCTOSPIM_P2_IO4 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA5[] = { + {PC_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPIM_P1_IO5 + {PD_5, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPIM_P1_IO5 + {PG_1, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_OCTOSPI2)}, // OCTOSPIM_P2_IO5 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA6[] = { + {PC_3, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPIM_P1_IO6 + {PD_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPIM_P1_IO6 + {PG_9, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_OCTOSPI2)}, // OCTOSPIM_P2_IO6 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA7[] = { + {PC_0, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_OCTOSPI1)}, // OCTOSPIM_P1_IO7 + {PD_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPIM_P1_IO7 + {PG_10, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_OCTOSPI2)}, // OCTOSPIM_P2_IO7 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_SCLK[] = { + {PA_3, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPIM_P1_CLK + {PB_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPIM_P1_CLK + {PE_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPIM_P1_CLK + {PF_4, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_OCTOSPI2)}, // OCTOSPIM_P2_CLK + {PF_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_OCTOSPI1)}, // OCTOSPIM_P1_CLK + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_SSEL[] = { + {PA_0, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI2)}, // OCTOSPIM_P2_NCS + {PA_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPIM_P1_NCS + {PA_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_OCTOSPI1)}, // OCTOSPIM_P1_NCS + {PA_12, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_OCTOSPI2)}, // OCTOSPIM_P2_NCS + {PB_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPIM_P1_NCS + {PC_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_OCTOSPI1)}, // OCTOSPIM_P1_NCS + {PD_3, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI2)}, // OCTOSPIM_P2_NCS + {PE_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPI1)}, // OCTOSPIM_P1_NCS + {PF_6, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_OCTOSPI2)}, // OCTOSPIM_P2_NCS + {PG_12, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_OCTOSPI2)}, // OCTOSPIM_P2_NCS + {NC, NP, 0} +}; +#endif + +//*** USB *** + +#if defined(HAL_PCD_MODULE_ENABLED) || defined(HAL_HCD_MODULE_ENABLED) +WEAK const PinMap PinMap_USB_OTG_HS[] = { +#ifdef USE_USB_HS_IN_FS + // {PA_8, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USB_HS)}, // USB_OTG_HS_SOF + // {PA_9, USB_OTG_HS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_HS_VBUS + // {PA_10, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_USB_HS)}, // USB_OTG_HS_ID + {PA_11, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF_NONE)}, // USB_OTG_HS_DM + {PA_12, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF_NONE)}, // USB_OTG_HS_DP + // {PA_14, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USB_HS)}, // USB_OTG_HS_SOF +#endif /* USE_USB_HS_IN_FS */ + {NC, NP, 0} +}; +#endif + +//*** SD *** + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CMD[] = { + {PA_0, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDMMC2)}, // SDMMC2_CMD + {PD_2, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDMMC1)}, // SDMMC1_CMD + {PD_7, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_SDMMC2)}, // SDMMC2_CMD + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CK[] = { + {PC_1, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDMMC2)}, // SDMMC2_CK + {PC_12, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDMMC1)}, // SDMMC1_CK + {PD_6, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_SDMMC2)}, // SDMMC2_CK + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA0[] = { + {PB_14, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC2)}, // SDMMC2_D0 + {PC_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D0 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA1[] = { + {PB_15, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC2)}, // SDMMC2_D1 + {PC_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D1 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA2[] = { + {PB_3, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC2)}, // SDMMC2_D2 + {PC_10, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D2 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA3[] = { + {PB_4, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC2)}, // SDMMC2_D3 + {PC_11, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D3 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA4[] = { + {PB_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D4 + {PB_8_ALT1, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC2)}, // SDMMC2_D4 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA5[] = { + {PB_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D5 + {PB_9_ALT1, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC2)}, // SDMMC2_D5 + {PC_0, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D5 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA6[] = { + {PC_6, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D6 + {PC_6_ALT1, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC2)}, // SDMMC2_D6 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA7[] = { + {PC_7, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D7 + {PC_7_ALT1, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC2)}, // SDMMC2_D7 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CKIN[] = { + {PB_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_CKIN + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CDIR[] = { + {PB_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_CDIR + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_D0DIR[] = { + {PC_6, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_D0DIR + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_D123DIR[] = { + {PC_7, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_D123DIR + {NC, NP, 0} +}; +#endif + +#endif /* ARDUINO_NUCLEO_U5A5ZJ_Q */ diff --git a/variants/STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ/variant_NUCLEO_U5A5ZJ_Q.cpp b/variants/STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ/variant_NUCLEO_U5A5ZJ_Q.cpp new file mode 100644 index 0000000000..32dad1ca28 --- /dev/null +++ b/variants/STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ/variant_NUCLEO_U5A5ZJ_Q.cpp @@ -0,0 +1,270 @@ +/* + ******************************************************************************* + * Copyright (c) 2021, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_NUCLEO_U5A5ZJ_Q) +#include "pins_arduino.h" + +// Digital PinName array +const PinName digitalPin[] = { + PG_8, // D0 + PG_7, // D1 + PF_15, // D2/A9 + PE_13, // D3 + PF_14, // D4/A10 + PE_11, // D5 + PE_9, // D6 + PF_13, // D7 + PF_12, // D8 + PD_15, // D9 + PD_14, // D10 + PA_7, // D11/A11 + PA_6, // D12/A12 + PA_5, // D13/A13 + PB_9, // D14 + PB_8, // D15 + PC_6, // D16 + PD_11, // D17/A14 + PB_13, // D18 + PD_12, // D19/A15 + PA_4, // D20/A16 + PB_4, // D21 + PB_5, // D22 + PB_3, // D23 + PA_4, // D24 + PB_4, // D25 + PA_2, // D26 + PB_10, // D27 + PE_15, // D28 + PB_0, // D29 + PE_12, // D30 + PE_14, // D31 + PA_0, // D32/A17 + PA_8, // D33 + PE_0, // D34 + PB_11, // D35 + PB_10, // D36 + PE_15, // D37 + PE_14, // D38 + PE_12, // D39 + PE_10, // D40 + PE_7, // D41 + PE_8, // D42 + PC_8, // D43 + PC_9, // D44 + PC_10, // D45 + PC_11, // D46 + PC_12, // D47 + PD_2, // D48 + PF_3, // D49 + PF_5, // D50 + PD_7, // D51 + PD_6, // D52 + PD_5, // D53 + PD_4, // D54 + PD_3, // D55 + PE_2, // D56 + PE_4, // D57 + PE_5, // D58 + PE_6, // D59 + PE_3, // D60 + PF_8, // D61 + PF_7, // D62 + PF_9, // D63 + PG_1, // D64/A18 + PG_0, // D65/A19 + PD_1, // D66 + PD_0, // D67 + PF_0, // D68 + PF_1, // D69 + PF_2, // D70 + PB_6, // D71 + PB_2, // D72/A20 + PA_3, // D73/A0 + PA_2, // D74/A1 + PC_3, // D75/A2 + PB_0, // D76/A3 + PC_1, // D77/A4 + PC_0, // D78/A5 + PB_1, // D79/A6 + PC_2, // D80/A7 + PA_1, // D81/A8 + PA_9, // D82 + PA_10, // D83 + PA_11, // D84 + PA_12, // D85 + PA_13, // D86 + PA_14, // D87 + PA_15, // D88 + PB_7, // D89 + PB_14, // D90 + PB_15, // D91 + PC_7, // D92 + PC_13, // D93 + PC_14, // D94 + PC_15, // D95 + PD_8, // D96 + PD_9, // D97 + PD_10, // D98 + PD_13, // D99/A21 + PE_1, // D100 + PF_4, // D101 + PF_6, // D102 + PF_10, // D103 + PF_11, // D104 + PG_2, // D105 + PG_3, // D106 + PG_4, // D107 + PG_5, // D108 + PG_6, // D109 + PG_9, // D110 + PG_10, // D111 + PG_12, // D112 + PG_13, // D113 + PG_14, // D114 + PG_15, // D115 + PH_0, // D116 + PH_1, // D117 + PH_3 // D118 +}; + +// Analog (Ax) pin number array +const uint32_t analogInputPin[] = { + 73, // A0, PA3 + 74, // A1, PA2 + 75, // A2, PC3 + 76, // A3, PB0 + 77, // A4, PC1 + 78, // A5, PC0 + 79, // A6, PB1 + 80, // A7, PC2 + 81, // A8, PA1 + 2, // A9, PF15 + 4, // A10, PF14 + 11, // A11, PA7 + 12, // A12, PA6 + 13, // A13, PA5 + 17, // A14, PD11 + 19, // A15, PD12 + 20, // A16, PA4 + 32, // A17, PA0 + 64, // A18, PG1 + 65, // A19, PG0 + 72, // A20, PB2 + 99 // A21, PD13 +}; + +// ---------------------------------------------------------------------------- + +#ifdef __cplusplus +extern "C" { +#endif + +/** System Clock Configuration +*/ +WEAK void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; + RCC_CRSInitTypeDef RCC_CRSInitStruct = {}; + RCC_PeriphCLKInitTypeDef PeriphClkInit = {}; + + /* + * Switch to SMPS regulator instead of LDO + */ + if (HAL_PWREx_ConfigSupply(PWR_SMPS_SUPPLY) != HAL_OK) { + Error_Handler(); + } + + /** Configure the main internal regulator output voltage + */ + if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK) { + Error_Handler(); + } + + /** Configure LSE Drive Capability + */ + HAL_PWR_EnableBkUpAccess(); + __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW); + + /** Initializes the CPU, AHB and APB buses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSI + | RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; + RCC_OscInitStruct.LSEState = RCC_LSE_ON; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLMBOOST = RCC_PLLMBOOST_DIV1; + RCC_OscInitStruct.PLL.PLLM = 1; + RCC_OscInitStruct.PLL.PLLN = 20; + RCC_OscInitStruct.PLL.PLLP = 8; + RCC_OscInitStruct.PLL.PLLQ = 2; + RCC_OscInitStruct.PLL.PLLR = 2; + RCC_OscInitStruct.PLL.PLLRGE = RCC_PLLVCIRANGE_1; + RCC_OscInitStruct.PLL.PLLFRACN = 0; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { + Error_Handler(); + } + + /** Initializes the CPU, AHB and APB buses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK + | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 + | RCC_CLOCKTYPE_PCLK3; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB3CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) { + Error_Handler(); + } + + /** Enable the SYSCFG APB clock + */ + __HAL_RCC_CRS_CLK_ENABLE(); + + /** Configures CRS + */ + RCC_CRSInitStruct.Prescaler = RCC_CRS_SYNC_DIV1; + RCC_CRSInitStruct.Source = RCC_CRS_SYNC_SOURCE_LSE; + RCC_CRSInitStruct.Polarity = RCC_CRS_SYNC_POLARITY_RISING; + RCC_CRSInitStruct.ReloadValue = __HAL_RCC_CRS_RELOADVALUE_CALCULATE(48000000, 32768); + RCC_CRSInitStruct.ErrorLimitValue = 34; + RCC_CRSInitStruct.HSI48CalibrationValue = 32; + + HAL_RCCEx_CRSConfig(&RCC_CRSInitStruct); + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADCDAC | RCC_PERIPHCLK_ADCDAC + | RCC_PERIPHCLK_DAC1 | RCC_PERIPHCLK_LPUART1 + | RCC_PERIPHCLK_SDMMC | RCC_PERIPHCLK_CLK48 + | RCC_PERIPHCLK_USBPHY; + PeriphClkInit.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_SYSCLK; + PeriphClkInit.Dac1ClockSelection = RCC_DAC1CLKSOURCE_LSE; + PeriphClkInit.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_HSI; + PeriphClkInit.IclkClockSelection = RCC_CLK48CLKSOURCE_HSI48; + PeriphClkInit.SdmmcClockSelection = RCC_SDMMCCLKSOURCE_CLK48; + PeriphClkInit.UsbPhyClockSelection = RCC_USBPHYCLKSOURCE_HSE; + + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) { + Error_Handler(); + } +} + +#ifdef __cplusplus +} +#endif + +#endif /* ARDUINO_NUCLEO_U5A5ZJ_Q */ diff --git a/variants/STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ/variant_NUCLEO_U5A5ZJ_Q.h b/variants/STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ/variant_NUCLEO_U5A5ZJ_Q.h new file mode 100644 index 0000000000..e6f8bd4f05 --- /dev/null +++ b/variants/STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ/variant_NUCLEO_U5A5ZJ_Q.h @@ -0,0 +1,296 @@ +/* + ******************************************************************************* + * Copyright (c) 2021, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#pragma once + +/*---------------------------------------------------------------------------- + * STM32 pins number + *----------------------------------------------------------------------------*/ +#define PG8 0 +#define PG7 1 +#define PF15 PIN_A9 +#define PE13 3 +#define PF14 PIN_A10 +#define PE11 5 +#define PE9 6 +#define PF13 7 +#define PF12 8 +#define PD15 9 +#define PD14 10 +#define PA7 PIN_A11 +#define PA6 PIN_A12 +#define PA5 PIN_A13 +#define PB9 14 +#define PB8 15 +#define PC6 16 +#define PD11 PIN_A14 +#define PB13 18 +#define PD12 PIN_A15 +#define PA4 PIN_A16 // SB35 ON +#define PB4 21 // SB36 ON +#define PB5 22 // UCPD TCPP +#define PB3 23 +// 24 is PA4 (20) as default SB38 ON +// 25 is PB4 (21) as default SB43 ON +// 26 is PA2 (A1) as default SB57 ON +#define PB10 27 // SB61 ON +#define PE15 28 // SB66 ON +// 29 is PB0 (A3) as default SB63 ON +#define PE12 30 // SB68 ON +#define PE14 31 // SB70 ON +#define PA0 PIN_A17 +#define PA8 33 +#define PE0 34 +#define PB11 35 +// 36 is PB10 (27) as default SB62 ON +// 37 is PE15 (28) as default SB67 ON +// 38 is PE14 (31) as default SB71 ON +// 39 is PE12 (30) as default SB69 ON +#define PE10 40 +#define PE7 41 +#define PE8 42 +#define PC8 43 +#define PC9 44 +#define PC10 45 +#define PC11 46 +#define PC12 47 +#define PD2 48 +#define PF3 49 +#define PF5 50 +#define PD7 51 +#define PD6 52 +#define PD5 53 +#define PD4 54 +#define PD3 55 +#define PE2 56 +#define PE4 57 +#define PE5 58 +#define PE6 59 +#define PE3 60 +#define PF8 61 +#define PF7 62 +#define PF9 63 +#define PG1 PIN_A18 +#define PG0 PIN_A19 +#define PD1 66 +#define PD0 67 +#define PF0 68 +#define PF1 69 +#define PF2 70 +#define PB6 71 +#define PB2 PIN_A20 +#define PA3 PIN_A0 +#define PA2 PIN_A1 // SB57 ON +#define PC3 PIN_A2 +#define PB0 PIN_A3 // SB64 ON +#define PC1 PIN_A4 +#define PC0 PIN_A5 +#define PB1 PIN_A6 +#define PC2 PIN_A7 +#define PA1 PIN_A8 + +#define PA9 82 +#define PA10 83 +#define PA11 84 +#define PA12 85 +#define PA13 86 +#define PA14 87 +#define PA15 88 +#define PB7 89 +#define PB14 90 +#define PB15 91 +#define PC7 92 +#define PC13 93 +#define PC14 94 +#define PC15 95 +#define PD8 96 +#define PD9 97 +#define PD10 98 +#define PD13 PIN_A21 +#define PE1 100 +#define PF4 101 +#define PF6 102 +#define PF10 103 +#define PF11 104 +#define PG2 105 +#define PG3 106 +#define PG4 107 +#define PG5 108 +#define PG6 109 +#define PG9 110 +#define PG10 111 +#define PG12 112 +#define PG13 113 +#define PG14 114 +#define PG15 115 +#define PH0 116 +#define PH1 117 +#define PH3 118 // BOOT0 + +// Alternate pins number +#define PA0_ALT1 (PA0 | ALT1) +#define PA1_ALT1 (PA1 | ALT1) +#define PA1_ALT2 (PA1 | ALT2) +#define PA2_ALT1 (PA2 | ALT1) +#define PA2_ALT2 (PA2 | ALT2) +#define PA3_ALT1 (PA3 | ALT1) +#define PA3_ALT2 (PA3 | ALT2) +#define PA4_ALT1 (PA4 | ALT1) +#define PA5_ALT1 (PA5 | ALT1) +#define PA6_ALT1 (PA6 | ALT1) +#define PA7_ALT1 (PA7 | ALT1) +#define PA7_ALT2 (PA7 | ALT2) +#define PA7_ALT3 (PA7 | ALT3) +#define PA15_ALT1 (PA15 | ALT1) +#define PB0_ALT1 (PB0 | ALT1) +#define PB0_ALT2 (PB0 | ALT2) +#define PB1_ALT1 (PB1 | ALT1) +#define PB1_ALT2 (PB1 | ALT2) +#define PB3_ALT1 (PB3 | ALT1) +#define PB4_ALT1 (PB4 | ALT1) +#define PB5_ALT1 (PB5 | ALT1) +#define PB6_ALT1 (PB6 | ALT1) +#define PB7_ALT1 (PB7 | ALT1) +#define PB8_ALT1 (PB8 | ALT1) +#define PB8_ALT2 (PB8 | ALT2) +#define PB9_ALT1 (PB9 | ALT1) +#define PB9_ALT2 (PB9 | ALT2) +#define PB10_ALT1 (PB10 | ALT1) +#define PB11_ALT1 (PB11 | ALT1) +#define PB13_ALT1 (PB13 | ALT1) +#define PB14_ALT1 (PB14 | ALT1) +#define PB14_ALT2 (PB14 | ALT2) +#define PB15_ALT1 (PB15 | ALT1) +#define PB15_ALT2 (PB15 | ALT2) +#define PC0_ALT1 (PC0 | ALT1) +#define PC1_ALT1 (PC1 | ALT1) +#define PC2_ALT1 (PC2 | ALT1) +#define PC3_ALT1 (PC3 | ALT1) +#define PC6_ALT1 (PC6 | ALT1) +#define PC6_ALT2 (PC6 | ALT2) +#define PC7_ALT1 (PC7 | ALT1) +#define PC7_ALT2 (PC7 | ALT2) +#define PC8_ALT1 (PC8 | ALT1) +#define PC9_ALT1 (PC9 | ALT1) +#define PC10_ALT1 (PC10 | ALT1) +#define PC11_ALT1 (PC11 | ALT1) +#define PF9_ALT1 (PF9 | ALT1) + +#define NUM_DIGITAL_PINS 119 +#define NUM_ANALOG_INPUTS 22 + +// On-board LED pin number +#ifndef LED_LD1 + // SB21 ON/SB23 OFF (default) else PA5 with SB21 OFF/SB23 ON + #define LED_LD1 PC7 +#endif +#define LED_LD2 PB7 +#define LED_LD3 PG2 + +#define LED_GREEN LED_LD1 +#define LED_BLUE LED_LD2 +#define LED_RED LED_LD3 + +#ifndef LED_BUILTIN + #define LED_BUILTIN LED_GREEN +#endif + +// On-board user button +#ifndef B1_USER + // SB58 ON/SB59 OFF (default) else PA0 with SB58 OFF/SB59 ON + #define B1_USER PC13 +#endif +#ifndef USER_BTN + #define USER_BTN B1_USER +#endif + +// Timer Definitions +// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin +#ifndef TIMER_TONE + #define TIMER_TONE TIM6 +#endif +#ifndef TIMER_SERVO + #define TIMER_SERVO TIM7 +#endif + +// UART Definitions +#ifndef SERIAL_UART_INSTANCE + #define SERIAL_UART_INSTANCE 1 +#endif + +// Default pin used for generic 'Serial' instance +// Mandatory for Firmata +#ifndef PIN_SERIAL_RX + #define PIN_SERIAL_RX PA10 +#endif +#ifndef PIN_SERIAL_TX + #define PIN_SERIAL_TX PA9 +#endif + +// Pin UCPD to configure TCPP in default Type-C legacy state (UCPD_DBn for TCPP01) +#define PIN_UCPD_TCPP PB5 + +// Extra HAL modules +#if !defined(HAL_DAC_MODULE_DISABLED) + #define HAL_DAC_MODULE_ENABLED +#endif +#if !defined(HAL_OSPI_MODULE_DISABLED) + #define HAL_OSPI_MODULE_ENABLED +#endif +#if !defined(HAL_SD_MODULE_DISABLED) + #define HAL_SD_MODULE_ENABLED +#endif + +// Alternate SYS_WKUP definition +#define PWR_WAKEUP_PIN1_1 +#define PWR_WAKEUP_PIN1_2 +#define PWR_WAKEUP_PIN2_1 +#define PWR_WAKEUP_PIN2_2 +#define PWR_WAKEUP_PIN3_1 +#define PWR_WAKEUP_PIN3_2 +#define PWR_WAKEUP_PIN4_1 +#define PWR_WAKEUP_PIN4_2 +#define PWR_WAKEUP_PIN5_1 +#define PWR_WAKEUP_PIN6_1 +#define PWR_WAKEUP_PIN6_2 +#define PWR_WAKEUP_PIN7_1 +#define PWR_WAKEUP_PIN7_2 +#define PWR_WAKEUP_PIN8_1 +#define PWR_WAKEUP_PIN8_2 + +/*---------------------------------------------------------------------------- + * Arduino objects - C++ only + *----------------------------------------------------------------------------*/ + +#ifdef __cplusplus + // These serial port names are intended to allow libraries and architecture-neutral + // sketches to automatically default to the correct port name for a particular type + // of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN, + // the first hardware serial port whose RX/TX pins are not dedicated to another use. + // + // SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor + // + // SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial + // + // SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library + // + // SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins. + // + // SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX + // pins are NOT connected to anything by default. + #ifndef SERIAL_PORT_MONITOR + #define SERIAL_PORT_MONITOR Serial + #endif + #ifndef SERIAL_PORT_HARDWARE + #define SERIAL_PORT_HARDWARE Serial + #endif +#endif From 2380458e078de69ada1300d0d50fb7e254af5d7b Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Thu, 22 May 2025 09:40:45 +0200 Subject: [PATCH 30/44] chore(g4): define HSE_VALUE of the Nucleo G431RB Signed-off-by: Frederic Pillon --- .../variant_NUCLEO_G431RB.h | 1 + 1 file changed, 1 insertion(+) diff --git a/variants/STM32G4xx/G431R(6-8)(I-T)_G431RB(I-T)x(Z)_G441RB(I-T)/variant_NUCLEO_G431RB.h b/variants/STM32G4xx/G431R(6-8)(I-T)_G431RB(I-T)x(Z)_G441RB(I-T)/variant_NUCLEO_G431RB.h index f96d84e54e..a5969200c3 100644 --- a/variants/STM32G4xx/G431R(6-8)(I-T)_G431RB(I-T)x(Z)_G441RB(I-T)/variant_NUCLEO_G431RB.h +++ b/variants/STM32G4xx/G431R(6-8)(I-T)_G431RB(I-T)x(Z)_G441RB(I-T)/variant_NUCLEO_G431RB.h @@ -172,6 +172,7 @@ #define HAL_DAC_MODULE_ENABLED #endif +#define HSE_VALUE 24000000 /*---------------------------------------------------------------------------- * Arduino objects - C++ only *----------------------------------------------------------------------------*/ From a1bed6a2c251a320401767a07691cb38d0742629 Mon Sep 17 00:00:00 2001 From: Hugo Woesthuis Date: Thu, 22 May 2025 14:28:11 +0200 Subject: [PATCH 31/44] variant(c0): add generic C092CBT_C092RBT_C092RC(I-T) Co-authored-by: Frederic Pillon Signed-off-by: Hugo <10338882+showengineer@users.noreply.github.com> --- README.md | 3 + boards.txt | 36 ++++ .../generic_clock.c | 30 ++- .../C092CBT_C092RBT_C092RC(I-T)/ldscript.ld | 187 ++++++++++++++++++ 4 files changed, 254 insertions(+), 2 deletions(-) create mode 100644 variants/STM32C0xx/C092CBT_C092RBT_C092RC(I-T)/ldscript.ld diff --git a/README.md b/README.md index f65e8c74ed..8c746ec31c 100644 --- a/README.md +++ b/README.md @@ -224,6 +224,9 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d | :green_heart: | STM32C031F4
                                                                                                STM32C031F6 | Generic Board | *2.6.0* | | | :yellow_heart: | STM32C071G8
                                                                                                STM32C071GB | Generic Board | **2.11.0** | | | :green_heart: | STM32C071R8
                                                                                                STM32C071RB | Generic Board | *2.9.0* | | +| :yellow_heart: | STM32C092CBT | Generic Board | **2.11.0** | | +| :yellow_heart: | STM32C092RBT
                                                                                                STM32C092RCT | Generic Board | **2.11.0** | | +| :yellow_heart: | STM32C092RCI | Generic Board | **2.11.0** | | ### Generic STM32F0 boards diff --git a/boards.txt b/boards.txt index 25340dc5d2..75fc647f80 100644 --- a/boards.txt +++ b/boards.txt @@ -1834,6 +1834,42 @@ GenC0.menu.pnum.GENERIC_C071RBTX.build.product_line=STM32C071xx GenC0.menu.pnum.GENERIC_C071RBTX.build.variant=STM32C0xx/C071R(8-B)T GenC0.menu.pnum.GENERIC_C071RBTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C0xx/STM32C071.svd +# Generic C092CBTx +GenC0.menu.pnum.GENERIC_C092CBTX=Generic C092CBTx +GenC0.menu.pnum.GENERIC_C092CBTX.upload.maximum_size=131072 +GenC0.menu.pnum.GENERIC_C092CBTX.upload.maximum_data_size=30720 +GenC0.menu.pnum.GENERIC_C092CBTX.build.board=GENERIC_C092CBTX +GenC0.menu.pnum.GENERIC_C092CBTX.build.product_line=STM32C092xx +GenC0.menu.pnum.GENERIC_C092CBTX.build.variant=STM32C0xx/C092CBT_C092RBT_C092RC(I-T) +GenC0.menu.pnum.GENERIC_C092CBTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C0xx/STM32C092.svd + +# Generic C092RBTx +GenC0.menu.pnum.GENERIC_C092RBTX=Generic C092RBTx +GenC0.menu.pnum.GENERIC_C092RBTX.upload.maximum_size=131072 +GenC0.menu.pnum.GENERIC_C092RBTX.upload.maximum_data_size=30720 +GenC0.menu.pnum.GENERIC_C092RBTX.build.board=GENERIC_C092RBTX +GenC0.menu.pnum.GENERIC_C092RBTX.build.product_line=STM32C092xx +GenC0.menu.pnum.GENERIC_C092RBTX.build.variant=STM32C0xx/C092CBT_C092RBT_C092RC(I-T) +GenC0.menu.pnum.GENERIC_C092RBTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C0xx/STM32C092.svd + +# Generic C092RCIx +GenC0.menu.pnum.GENERIC_C092RCIX=Generic C092RCIx +GenC0.menu.pnum.GENERIC_C092RCIX.upload.maximum_size=262144 +GenC0.menu.pnum.GENERIC_C092RCIX.upload.maximum_data_size=30720 +GenC0.menu.pnum.GENERIC_C092RCIX.build.board=GENERIC_C092RCIX +GenC0.menu.pnum.GENERIC_C092RCIX.build.product_line=STM32C092xx +GenC0.menu.pnum.GENERIC_C092RCIX.build.variant=STM32C0xx/C092CBT_C092RBT_C092RC(I-T) +GenC0.menu.pnum.GENERIC_C092RCIX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C0xx/STM32C092.svd + +# Generic C092RCTx +GenC0.menu.pnum.GENERIC_C092RCTX=Generic C092RCTx +GenC0.menu.pnum.GENERIC_C092RCTX.upload.maximum_size=262144 +GenC0.menu.pnum.GENERIC_C092RCTX.upload.maximum_data_size=30720 +GenC0.menu.pnum.GENERIC_C092RCTX.build.board=GENERIC_C092RCTX +GenC0.menu.pnum.GENERIC_C092RCTX.build.product_line=STM32C092xx +GenC0.menu.pnum.GENERIC_C092RCTX.build.variant=STM32C0xx/C092CBT_C092RBT_C092RC(I-T) +GenC0.menu.pnum.GENERIC_C092RCTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C0xx/STM32C092.svd + # Upload menu GenC0.menu.upload_method.swdMethod=STM32CubeProgrammer (SWD) GenC0.menu.upload_method.swdMethod.upload.protocol=swd diff --git a/variants/STM32C0xx/C092CBT_C092RBT_C092RC(I-T)/generic_clock.c b/variants/STM32C0xx/C092CBT_C092RBT_C092RC(I-T)/generic_clock.c index e9ca7b29a8..3cf436e56f 100644 --- a/variants/STM32C0xx/C092CBT_C092RBT_C092RC(I-T)/generic_clock.c +++ b/variants/STM32C0xx/C092CBT_C092RBT_C092RC(I-T)/generic_clock.c @@ -21,8 +21,34 @@ */ WEAK void SystemClock_Config(void) { - /* SystemClock_Config can be generated by STM32CubeMX */ -#warning "SystemClock_Config() is empty. Default clock at reset is used." + RCC_OscInitTypeDef RCC_OscInitStruct = {}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; + + __HAL_FLASH_SET_LATENCY(FLASH_LATENCY_1); + + /** Initializes the RCC Oscillators according to the specified parameters + * in the RCC_OscInitTypeDef structure. + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSIDiv = RCC_HSI_DIV1; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { + Error_Handler(); + } + + /** Initializes the CPU, AHB and APB buses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK + | RCC_CLOCKTYPE_PCLK1; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI; + RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) { + Error_Handler(); + } } #endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32C0xx/C092CBT_C092RBT_C092RC(I-T)/ldscript.ld b/variants/STM32C0xx/C092CBT_C092RBT_C092RC(I-T)/ldscript.ld new file mode 100644 index 0000000000..77257d156e --- /dev/null +++ b/variants/STM32C0xx/C092CBT_C092RBT_C092RC(I-T)/ldscript.ld @@ -0,0 +1,187 @@ +/* +****************************************************************************** +** +** @file : LinkerScript.ld +** +** @author : Auto-generated by STM32CubeIDE +** +** Abstract : Linker script for NUCLEO-C092RC Board embedding STM32C092RCTx Device from stm32c0 series +** 256KBytes FLASH +** 30KBytes RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used +** +** Target : STMicroelectronics STM32 +** +** Distribution: The file is distributed as is, without any warranty +** of any kind. +** +****************************************************************************** +** @attention +** +** Copyright (c) 2025 STMicroelectronics. +** All rights reserved. +** +** This software is licensed under terms that can be found in the LICENSE file +** in the root directory of this software component. +** If no LICENSE file comes with this software, it is provided AS-IS. +** +****************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ + +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Memories definition */ +MEMORY +{ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE + FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET +} + +/* Sections */ +SECTIONS +{ + /* The startup code into "FLASH" Rom type memory */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data into "FLASH" Rom type memory */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data into "FLASH" Rom type memory */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + *(.ARM.extab* .gnu.linkonce.armextab.*) + . = ALIGN(4); + } >FLASH + + .ARM (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + . = ALIGN(4); + } >FLASH + + .preinit_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + . = ALIGN(4); + } >FLASH + + .init_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + . = ALIGN(4); + } >FLASH + + .fini_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + . = ALIGN(4); + } >FLASH + + /* Used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections into "RAM" Ram type memory */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + *(.RamFunc) /* .RamFunc sections */ + *(.RamFunc*) /* .RamFunc* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + + } >RAM AT> FLASH + + /* Uninitialized data section into "RAM" Ram type memory */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + /* Remove information from the compiler libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} From c5770085557abc1ef7fe036f1747e42bb70677f4 Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Mon, 26 May 2025 11:05:33 +0200 Subject: [PATCH 32/44] variant(c0): add Nucleo-C092RBT Co-authored-by: Frederic Pillon Signed-off-by: Hugo <10338882+showengineer@users.noreply.github.com> --- README.md | 1 + boards.txt | 14 ++ .../CMakeLists.txt | 2 + .../variant_NUCLEO_C092RC.cpp | 146 +++++++++++++ .../variant_NUCLEO_C092RC.h | 205 ++++++++++++++++++ 5 files changed, 368 insertions(+) create mode 100644 variants/STM32C0xx/C092CBT_C092RBT_C092RC(I-T)/variant_NUCLEO_C092RC.cpp create mode 100644 variants/STM32C0xx/C092CBT_C092RBT_C092RC(I-T)/variant_NUCLEO_C092RC.h diff --git a/README.md b/README.md index 8c746ec31c..0c8e39f106 100644 --- a/README.md +++ b/README.md @@ -129,6 +129,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d | :----: | :-------: | ---- | :-----: | :---- | | :green_heart: | STM32C031C6 | [Nucleo C031C6](https://www.st.com/en/evaluation-tools/nucleo-c031c6.html) | *2.5.0* | | | :green_heart: | STM32C071RB | [Nucleo C071RB](https://www.st.com/en/evaluation-tools/nucleo-c071rb.html) | *2.9.0* | | +| :yellow_heart: | STM32C092RC | [Nucleo C092RC](https://www.st.com/en/evaluation-tools/nucleo-c092rc.html)| **2.11.0** | | | :green_heart: | STM32F030R8 | [Nucleo F030R8](http://www.st.com/en/evaluation-tools/nucleo-f030r8.html) | *0.2.0* | | | :green_heart: | STM32F070RB | [Nucleo F070RB](http://www.st.com/en/evaluation-tools/nucleo-f070rb.html) | *2.0.0* | | | :green_heart: | STM32F072RB | [Nucleo F072RB](http://www.st.com/en/evaluation-tools/nucleo-f072rb.html) | *1.9.0* | | diff --git a/boards.txt b/boards.txt index 75fc647f80..df2d8ed270 100644 --- a/boards.txt +++ b/boards.txt @@ -492,6 +492,20 @@ Nucleo_64.menu.pnum.NUCLEO_C071RB.build.st_extra_flags=-D{build.product_line} {b Nucleo_64.menu.pnum.NUCLEO_C071RB.openocd.target=stm32c0x Nucleo_64.menu.pnum.NUCLEO_C071RB.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C0xx/STM32C071.svd +# NUCLEO_C092RC board +Nucleo_64.menu.pnum.NUCLEO_C092RC=Nucleo C092RC +Nucleo_64.menu.pnum.NUCLEO_C092RC.node="NOD_C092RC" +Nucleo_64.menu.pnum.NUCLEO_C092RC.upload.maximum_size=262144 +Nucleo_64.menu.pnum.NUCLEO_C092RC.upload.maximum_data_size=30720 +Nucleo_64.menu.pnum.NUCLEO_C092RC.build.mcu=cortex-m0plus +Nucleo_64.menu.pnum.NUCLEO_C092RC.build.board=NUCLEO_C092RC +Nucleo_64.menu.pnum.NUCLEO_C092RC.build.series=STM32C0xx +Nucleo_64.menu.pnum.NUCLEO_C092RC.build.product_line=STM32C092xx +Nucleo_64.menu.pnum.NUCLEO_C092RC.build.variant=STM32C0xx/C092CBT_C092RBT_C092RC(I-T) +Nucleo_64.menu.pnum.NUCLEO_C092RC.build.st_extra_flags=-DSTM32C092xx {build.xSerial} -D__CORTEX_SC=0 +Nucleo_64.menu.pnum.NUCLEO_C092RC.openocd.target=stm32c0x +Nucleo_64.menu.pnum.NUCLEO_C092RC.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C0xx/STM32C092.svd + # NUCLEO_F030R8 board Nucleo_64.menu.pnum.NUCLEO_F030R8=Nucleo F030R8 Nucleo_64.menu.pnum.NUCLEO_F030R8.node="NODE_F030R8,NUCLEO" diff --git a/variants/STM32C0xx/C092CBT_C092RBT_C092RC(I-T)/CMakeLists.txt b/variants/STM32C0xx/C092CBT_C092RBT_C092RC(I-T)/CMakeLists.txt index 2a4d55b6b1..96bcad7e7b 100644 --- a/variants/STM32C0xx/C092CBT_C092RBT_C092RC(I-T)/CMakeLists.txt +++ b/variants/STM32C0xx/C092CBT_C092RBT_C092RC(I-T)/CMakeLists.txt @@ -21,7 +21,9 @@ target_link_libraries(variant INTERFACE variant_usage) add_library(variant_bin STATIC EXCLUDE_FROM_ALL generic_clock.c PeripheralPins.c + PeripheralPins_NUCLEO_C092RC.c variant_generic.cpp + variant_NUCLEO_C092RC.cpp ) target_link_libraries(variant_bin PUBLIC variant_usage) diff --git a/variants/STM32C0xx/C092CBT_C092RBT_C092RC(I-T)/variant_NUCLEO_C092RC.cpp b/variants/STM32C0xx/C092CBT_C092RBT_C092RC(I-T)/variant_NUCLEO_C092RC.cpp new file mode 100644 index 0000000000..2df6c32199 --- /dev/null +++ b/variants/STM32C0xx/C092CBT_C092RBT_C092RC(I-T)/variant_NUCLEO_C092RC.cpp @@ -0,0 +1,146 @@ +/* + ******************************************************************************* + * Copyright (c) 2024, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_NUCLEO_C092RC) +#include "pins_arduino.h" +#include "stm32yyxx_ll_utils.h" + +// Digital PinName array +const PinName digitalPin[] = { + PB_7, // D0 + PB_6, // D1 + PA_10, // D2 + PC_7, // D3 + PB_5, // D4 + PB_4, // D5 + PC_8, // D6 + PA_8, // D7/A6 + PA_9, // D8 + PB_3, // D9 + PA_15, // D10 + PA_7, // D11/A7 + PA_6, // D12/A8 + PA_5, // D13/A9 + PB_9, // D14 + PB_8, // D15 + PA_0, // D16/A0 + PA_1, // D17/A1 + PA_4, // D18/A2 + PB_0, // D19/A3 + PC_4, // D20/A4 + PC_5, // D21/A5 + PC_10, // D22 + PC_12, // D23 + PD_4, // D24 + PD_0, // D25 + PD_3, // D26 + PA_13, // D27 + PA_14, // D28 + PC_6, // D29 + PC_2, // D30 + PC_13, // D31 + PC_14, // D32 + PC_15, // D33 + PF_0, // D34 + PF_1, // D35 + PF_3, // D36 + PB_2, // D37/A10 + PB_11, // D38/A11 + PC_11, // D39 + PD_2, // D40 + PD_1, // D41 + PF_2, // D42 + PD_5, // D43 + PC_3, // D44 + PC_9, // D45 + PC_1, // D46 + PA_3, // D47 + PD_6, // D48 + PA_12, // D49 + PA_11, // D50 + PB_12, // D51/A12 + PA_2, // D52 + PC_0, // D53 + PB_1, // D54/A13 + PB_15, // D55 + PB_14, // D56 + PB_13, // D57 + PB_10, // D58/A14 + PD_8, // D59 + PD_9, // D60 + PA_9_R, // D61 + PA_10_R // D62 +}; + +// Analog (Ax) pin number array +const uint32_t analogInputPin[] = { + 16, // A0, PA0 + 17, // A1, PA1 + 18, // A2, PA4 + 19, // A3, PB0 + 20, // A4, PC4 + 21, // A5, PC5 + 7, // A6, PA8 + 11, // A7, PA7 + 12, // A8, PA6 + 13, // A9, PA5 + 37, // A10, PB2 + 38, // A11, PB11 + 51, // A12, PB12 + 54, // A13, PB1 + 58 // A14, PB10 +}; + +// ---------------------------------------------------------------------------- +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; + + __HAL_FLASH_SET_LATENCY(FLASH_LATENCY_1); + + /** Initializes the RCC Oscillators according to the specified parameters + * in the RCC_OscInitTypeDef structure. + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { + Error_Handler(); + } + + /** Initializes the CPU, AHB and APB buses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK + | RCC_CLOCKTYPE_PCLK1; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSE; + RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) { + Error_Handler(); + } +} + + +#ifdef __cplusplus +} +#endif +#endif /* ARDUINO_NUCLEO_C092RC */ diff --git a/variants/STM32C0xx/C092CBT_C092RBT_C092RC(I-T)/variant_NUCLEO_C092RC.h b/variants/STM32C0xx/C092CBT_C092RBT_C092RC(I-T)/variant_NUCLEO_C092RC.h new file mode 100644 index 0000000000..260d254962 --- /dev/null +++ b/variants/STM32C0xx/C092CBT_C092RBT_C092RC(I-T)/variant_NUCLEO_C092RC.h @@ -0,0 +1,205 @@ +/* + ******************************************************************************* + * Copyright (c) 2024, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#pragma once + +/*---------------------------------------------------------------------------- + * STM32 pins number + *----------------------------------------------------------------------------*/ +#define PB7 0 +#define PB6 1 +#define PA10 2 +#define PC7 3 +#define PB5 4 +#define PB4 5 +#define PC8 6 +#define PA8 PIN_A6 +#define PA9 8 +#define PB3 9 +#define PA15 10 +#define PA7 PIN_A7 +#define PA6 PIN_A8 +#define PA5 PIN_A9 // LED1 +#define PB9 14 +#define PB8 15 +#define PA0 PIN_A0 +#define PA1 PIN_A1 +#define PA4 PIN_A2 +#define PB0 PIN_A3 +#define PC4 PIN_A4 +#define PC5 PIN_A5 +// ST Morpho +// CN7 Left Side +#define PC10 22 +#define PC12 23 +#define PD4 24 +#define PD0 25 +#define PD3 26 +#define PA13 27 // SWD +#define PA14 28 // SWD +#define PC6 29 +#define PC2 30 // FDCAN_RX +#define PC13 31 // USER_BTN +#define PC14 32 // OSCX_IN +#define PC15 33 // OSCX_OUT +#define PF0 34 // OSC_IN +#define PF1 35 // OSC_OUT +#define PF3 36 // VBAT +#define PB2 PIN_A10 +#define PB11 PIN_A11 +// CN7 Right Side +#define PC11 39 +#define PD2 40 +#define PD1 41 +#define PF2 42 // NRST +#define PD5 43 +// CN10 Left Side +#define PC3 44 // FDCAN_TX +// CN10 Right side +#define PC9 45 // LED2 +#define PC1 46 +#define PA3 47 // RX +#define PD6 48 +#define PA12 49 +#define PA11 50 +#define PB12 PIN_A12 +#define PA2 52 // TX +#define PC0 53 +#define PB1 PIN_A13 +#define PB15 55 +#define PB14 56 +#define PB13 57 +#define PB10 PIN_A14 +#define PD8 59 +#define PD9 60 +#define PA9_R 61 +#define PA10_R 62 + +// Alternate pins number +#define PA0_ALT1 (PA0 | ALT1) +#define PA0_ALT2 (PA0 | ALT2) +#define PA1_ALT1 (PA1 | ALT1) +#define PA1_ALT2 (PA1 | ALT2) +#define PA2_ALT1 (PA2 | ALT1) +#define PA2_ALT2 (PA2 | ALT2) +#define PA3_ALT1 (PA3 | ALT1) +#define PA3_ALT2 (PA3 | ALT2) +#define PA4_ALT1 (PA4 | ALT1) +#define PA4_ALT2 (PA4 | ALT2) +#define PA5_ALT1 (PA5 | ALT1) +#define PA5_ALT2 (PA5 | ALT2) +#define PA6_ALT1 (PA6 | ALT1) +#define PA7_ALT1 (PA7 | ALT1) +#define PA7_ALT2 (PA7 | ALT2) +#define PA7_ALT3 (PA7 | ALT3) +#define PA8_ALT1 (PA8 | ALT1) +#define PA8_ALT2 (PA8 | ALT2) +#define PA8_ALT3 (PA8 | ALT3) +#define PA8_ALT4 (PA8 | ALT4) +#define PA8_ALT5 (PA8 | ALT5) +#define PA9_ALT1 (PA9 | ALT1) +#define PA10_ALT1 (PA10 | ALT1) +#define PA15_ALT1 (PA15 | ALT1) +#define PB0_ALT1 (PB0 | ALT1) +#define PB1_ALT1 (PB1 | ALT1) +#define PB1_ALT2 (PB1 | ALT2) +#define PB1_ALT3 (PB1 | ALT3) +#define PB3_ALT1 (PB3 | ALT1) +#define PB3_ALT2 (PB3 | ALT2) +#define PB5_ALT1 (PB5 | ALT1) +#define PB6_ALT1 (PB6 | ALT1) +#define PB6_ALT2 (PB6 | ALT2) +#define PB6_ALT3 (PB6 | ALT3) +#define PB6_ALT4 (PB6 | ALT4) +#define PB6_ALT5 (PB6 | ALT5) +#define PB7_ALT1 (PB7 | ALT1) +#define PB7_ALT2 (PB7 | ALT2) +#define PB7_ALT3 (PB7 | ALT3) +#define PB7_ALT4 (PB7 | ALT4) +#define PB8_ALT1 (PB8 | ALT1) +#define PB9_ALT1 (PB9 | ALT1) +#define PC6_ALT1 (PC6 | ALT1) +#define PC7_ALT1 (PC7 | ALT1) +#define PC8_ALT1 (PC8 | ALT1) +#define PC9_ALT1 (PC9 | ALT1) +#define PC14_ALT1 (PC14 | ALT1) + +#define NUM_DIGITAL_PINS 63 +#define NUM_REMAP_PINS 2 +#define NUM_ANALOG_INPUTS 15 + +// On-board LED pin number +#define LED1 PA5 +#define LED2 PC9 +#define LED_GREEN LED1 +#define LED_BLUE LED2 +#ifndef LED_BUILTIN + #define LED_BUILTIN LED_GREEN +#endif + +// On-board user button +#ifndef USER_BTN + #define USER_BTN PC13 +#endif + +// Timer Definitions +// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin +#ifndef TIMER_TONE + #define TIMER_TONE TIM14 +#endif +#ifndef TIMER_SERVO + #define TIMER_SERVO TIM16 +#endif + +// UART Definitions +#ifndef SERIAL_UART_INSTANCE + #define SERIAL_UART_INSTANCE 2 +#endif + +// Default pin used for generic 'Serial' instance +// Mandatory for Firmata +#ifndef PIN_SERIAL_RX + #define PIN_SERIAL_RX PA3 +#endif +#ifndef PIN_SERIAL_TX + #define PIN_SERIAL_TX PA2 +#endif + +#define HSE_VALUE (48000000U) /*!< Value of the External oscillator in Hz */ + +/*---------------------------------------------------------------------------- + * Arduino objects - C++ only + *----------------------------------------------------------------------------*/ + +#ifdef __cplusplus + // These serial port names are intended to allow libraries and architecture-neutral + // sketches to automatically default to the correct port name for a particular type + // of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN, + // the first hardware serial port whose RX/TX pins are not dedicated to another use. + // + // SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor + // + // SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial + // + // SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library + // + // SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins. + // + // SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX + // pins are NOT connected to anything by default. + #ifndef SERIAL_PORT_MONITOR + #define SERIAL_PORT_MONITOR Serial + #endif + #ifndef SERIAL_PORT_HARDWARE + #define SERIAL_PORT_HARDWARE Serial + #endif +#endif From e0147d508225e9ec893a5cfc6527204284251708 Mon Sep 17 00:00:00 2001 From: Hugo Woesthuis Date: Thu, 22 May 2025 14:29:12 +0200 Subject: [PATCH 33/44] chore(c0): support usart3_irqn and usart4_irqn Signed-off-by: Hugo <10338882+showengineer@users.noreply.github.com> --- libraries/SrcWrapper/inc/uart.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/libraries/SrcWrapper/inc/uart.h b/libraries/SrcWrapper/inc/uart.h index 5d681407f8..6c466ebe8c 100644 --- a/libraries/SrcWrapper/inc/uart.h +++ b/libraries/SrcWrapper/inc/uart.h @@ -121,7 +121,7 @@ struct serial_s { #define USART3_IRQn USART3_4_IRQn #define USART3_IRQHandler USART3_4_IRQHandler #endif /* STM32F091xC || STM32F098xx */ -#elif defined(STM32G0xx) +#elif defined(STM32G0xx) || defined(STM32C0xx) #if defined(LPUART2_BASE) #define USART3_IRQn USART3_4_5_6_LPUART1_IRQn #define USART3_IRQHandler USART3_4_5_6_LPUART1_IRQHandler @@ -153,7 +153,7 @@ struct serial_s { #endif /* STM32F091xC || STM32F098xx */ #elif defined(STM32L0xx) #define USART4_IRQn USART4_5_IRQn -#elif defined(STM32G0xx) +#elif defined(STM32G0xx) || defined(STM32C0xx) #if defined(LPUART2_BASE) #define USART4_IRQn USART3_4_5_6_LPUART1_IRQn #elif defined(LPUART1_BASE) From 159f6b970af03fed834e8a1e2f874661e4ff3698 Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Mon, 26 May 2025 14:12:28 +0200 Subject: [PATCH 34/44] fix(c0): GPIO_AF7_USART3 missing Signed-off-by: Frederic Pillon --- libraries/SrcWrapper/inc/stm32_def.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/libraries/SrcWrapper/inc/stm32_def.h b/libraries/SrcWrapper/inc/stm32_def.h index aaf37ad69a..23d2815f22 100644 --- a/libraries/SrcWrapper/inc/stm32_def.h +++ b/libraries/SrcWrapper/inc/stm32_def.h @@ -218,6 +218,11 @@ __STATIC_INLINE void LL_RTC_SetBinMixBCDU(RTC_TypeDef *RTCx, uint32_t BinMixBcdU #define GPIO_AF1_SPI1 STM_PIN_AFNUM_MASK #endif +#if defined(STM32C0xx) && defined(USART3) && !defined(GPIO_AF7_USART3) + #define GPIO_AF7_USART3 ((uint8_t)0x07) +#endif // STM32C0xx && !defined(USART3) + + /** * Libc porting layers */ From fba4da429c8bf6faf9e4bfb22597850a75681464 Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Mon, 26 May 2025 14:26:12 +0200 Subject: [PATCH 35/44] doc: point to the STM32MP1 directory Markdown links reports error 429, try to avoid this. Signed-off-by: Frederic Pillon --- README.md | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/README.md b/README.md index f65e8c74ed..28f3925f38 100644 --- a/README.md +++ b/README.md @@ -210,8 +210,8 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d | Status | Device(s) | Name | Release | Notes | | :----: | :-------: | ---- | :-----: | :---- | -| :green_heart: | STM32MP157A | [STM32MP157A-DK1](https://www.st.com/en/evaluation-tools/stm32mp157a-dk1.html) | *1.8.0* | See [the documentation](https://github.com/stm32duino/Arduino_Core_STM32/tree/main/variants/STM32MP1xx/MP153AAC_MP153CAC_MP153DAC_MP153FAC_MP157AAC_MP157CAC_MP157DAC_MP157FAC/README.md) to use this board| -| :green_heart: | STM32MP157C | [STM32MP157C-DK2](https://www.st.com/en/evaluation-tools/stm32mp157c-dk2.html) | *1.8.0* | See [the documentation](https://github.com/stm32duino/Arduino_Core_STM32/tree/main/variants/STM32MP1xx/MP153AAC_MP153CAC_MP153DAC_MP153FAC_MP157AAC_MP157CAC_MP157DAC_MP157FAC/README.md) to use this board| +| :green_heart: | STM32MP157A | [STM32MP157A-DK1](https://www.st.com/en/evaluation-tools/stm32mp157a-dk1.html) | *1.8.0* | See [the documentation](https://github.com/stm32duino/Arduino_Core_STM32/tree/main/variants/STM32MP1xx/MP153AAC_MP153CAC_MP153DAC_MP153FAC_MP157AAC_MP157CAC_MP157DAC_MP157FAC) to use this board| +| :green_heart: | STM32MP157C | [STM32MP157C-DK2](https://www.st.com/en/evaluation-tools/stm32mp157c-dk2.html) | *1.8.0* | See [the documentation](https://github.com/stm32duino/Arduino_Core_STM32/tree/main/variants/STM32MP1xx/MP153AAC_MP153CAC_MP153DAC_MP153FAC_MP157AAC_MP157CAC_MP157DAC_MP157FAC) to use this board| ### Generic STM32C0 boards From 0284f7250b37aefaec69925c60b19877bc168f30 Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Thu, 22 May 2025 17:41:28 +0200 Subject: [PATCH 36/44] fix(cmake): avoid contiguous spaces Signed-off-by: Frederic Pillon --- cmake/scripts/parse_boards.py | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/cmake/scripts/parse_boards.py b/cmake/scripts/parse_boards.py index c7b0589177..178d6c1893 100644 --- a/cmake/scripts/parse_boards.py +++ b/cmake/scripts/parse_boards.py @@ -45,7 +45,8 @@ def evaluate_entries(self, wrt=None): except KeyError: raise newv = "" - + # remove contiguous space + newv = " ".join(newv.split()) self[k] = newv else: self[k].evaluate_entries(wrt) From 444a3d0aa03c877ddc23aa2cafa7d028efa39d15 Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Mon, 26 May 2025 16:42:39 +0200 Subject: [PATCH 37/44] chore(cmake): update boards database Signed-off-by: Frederic Pillon --- cmake/boards_db.cmake | 11014 ++++++++++++++++++++-------------------- 1 file changed, 5577 insertions(+), 5437 deletions(-) diff --git a/cmake/boards_db.cmake b/cmake/boards_db.cmake index 89e79e252b..0ea33492d1 100644 --- a/cmake/boards_db.cmake +++ b/cmake/boards_db.cmake @@ -8,7 +8,7 @@ set(ACSIP_S76S_MCU cortex-m0plus) set(ACSIP_S76S_FPCONF "-") add_library(ACSIP_S76S INTERFACE) target_compile_options(ACSIP_S76S INTERFACE - "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL: " @@ -62,7 +62,7 @@ set(AFROFLIGHT_F103CB_MCU cortex-m3) set(AFROFLIGHT_F103CB_FPCONF "-") add_library(AFROFLIGHT_F103CB INTERFACE) target_compile_options(AFROFLIGHT_F103CB INTERFACE - "SHELL:-DSTM32F103xB " + "SHELL:-DSTM32F103xB" "SHELL:" "SHELL:" "SHELL: " @@ -107,15 +107,15 @@ target_compile_options(AFROFLIGHT_F103CB_serial_none INTERFACE ) add_library(AFROFLIGHT_F103CB_usb_CDC INTERFACE) target_compile_options(AFROFLIGHT_F103CB_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(AFROFLIGHT_F103CB_usb_CDCgen INTERFACE) target_compile_options(AFROFLIGHT_F103CB_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(AFROFLIGHT_F103CB_usb_HID INTERFACE) target_compile_options(AFROFLIGHT_F103CB_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(AFROFLIGHT_F103CB_usb_none INTERFACE) target_compile_options(AFROFLIGHT_F103CB_usb_none INTERFACE @@ -144,7 +144,7 @@ set(AFROFLIGHT_F103CB_12M_MCU cortex-m3) set(AFROFLIGHT_F103CB_12M_FPCONF "-") add_library(AFROFLIGHT_F103CB_12M INTERFACE) target_compile_options(AFROFLIGHT_F103CB_12M INTERFACE - "SHELL:-DSTM32F103xB " + "SHELL:-DSTM32F103xB" "SHELL:" "SHELL:" "SHELL: " @@ -189,15 +189,15 @@ target_compile_options(AFROFLIGHT_F103CB_12M_serial_none INTERFACE ) add_library(AFROFLIGHT_F103CB_12M_usb_CDC INTERFACE) target_compile_options(AFROFLIGHT_F103CB_12M_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(AFROFLIGHT_F103CB_12M_usb_CDCgen INTERFACE) target_compile_options(AFROFLIGHT_F103CB_12M_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(AFROFLIGHT_F103CB_12M_usb_HID INTERFACE) target_compile_options(AFROFLIGHT_F103CB_12M_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(AFROFLIGHT_F103CB_12M_usb_none INTERFACE) target_compile_options(AFROFLIGHT_F103CB_12M_usb_none INTERFACE @@ -226,7 +226,7 @@ set(AFROFLIGHT_F103CB_12M_dfu2_MCU cortex-m3) set(AFROFLIGHT_F103CB_12M_dfu2_FPCONF "-") add_library(AFROFLIGHT_F103CB_12M_dfu2 INTERFACE) target_compile_options(AFROFLIGHT_F103CB_12M_dfu2 INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -268,7 +268,7 @@ set(AFROFLIGHT_F103CB_12M_dfuo_MCU cortex-m3) set(AFROFLIGHT_F103CB_12M_dfuo_FPCONF "-") add_library(AFROFLIGHT_F103CB_12M_dfuo INTERFACE) target_compile_options(AFROFLIGHT_F103CB_12M_dfuo INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -310,7 +310,7 @@ set(AFROFLIGHT_F103CB_12M_hid_MCU cortex-m3) set(AFROFLIGHT_F103CB_12M_hid_FPCONF "-") add_library(AFROFLIGHT_F103CB_12M_hid INTERFACE) target_compile_options(AFROFLIGHT_F103CB_12M_hid INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -352,7 +352,7 @@ set(AFROFLIGHT_F103CB_dfu2_MCU cortex-m3) set(AFROFLIGHT_F103CB_dfu2_FPCONF "-") add_library(AFROFLIGHT_F103CB_dfu2 INTERFACE) target_compile_options(AFROFLIGHT_F103CB_dfu2 INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -394,7 +394,7 @@ set(AFROFLIGHT_F103CB_dfuo_MCU cortex-m3) set(AFROFLIGHT_F103CB_dfuo_FPCONF "-") add_library(AFROFLIGHT_F103CB_dfuo INTERFACE) target_compile_options(AFROFLIGHT_F103CB_dfuo INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -436,7 +436,7 @@ set(AFROFLIGHT_F103CB_hid_MCU cortex-m3) set(AFROFLIGHT_F103CB_hid_FPCONF "-") add_library(AFROFLIGHT_F103CB_hid INTERFACE) target_compile_options(AFROFLIGHT_F103CB_hid INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -478,7 +478,7 @@ set(AGAFIA_SG0_MCU cortex-m0plus) set(AGAFIA_SG0_FPCONF "-") add_library(AGAFIA_SG0 INTERFACE) target_compile_options(AGAFIA_SG0 INTERFACE - "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -523,15 +523,15 @@ target_compile_options(AGAFIA_SG0_serial_none INTERFACE ) add_library(AGAFIA_SG0_usb_CDC INTERFACE) target_compile_options(AGAFIA_SG0_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(AGAFIA_SG0_usb_CDCgen INTERFACE) target_compile_options(AGAFIA_SG0_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(AGAFIA_SG0_usb_HID INTERFACE) target_compile_options(AGAFIA_SG0_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(AGAFIA_SG0_usb_none INTERFACE) target_compile_options(AGAFIA_SG0_usb_none INTERFACE @@ -548,7 +548,7 @@ set(ARMED_V1_MCU cortex-m4) set(ARMED_V1_FPCONF "fpv4-sp-d16-hard") add_library(ARMED_V1 INTERFACE) target_compile_options(ARMED_V1 INTERFACE - "SHELL:-DSTM32F407xx " + "SHELL:-DSTM32F407xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -593,11 +593,11 @@ target_compile_options(ARMED_V1_serial_none INTERFACE ) add_library(ARMED_V1_usb_CDC INTERFACE) target_compile_options(ARMED_V1_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(ARMED_V1_usb_CDCgen INTERFACE) target_compile_options(ARMED_V1_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(ARMED_V1_usb_none INTERFACE) target_compile_options(ARMED_V1_usb_none INTERFACE @@ -626,7 +626,7 @@ set(AURORA_ONE_MCU cortex-m0plus) set(AURORA_ONE_FPCONF "-") add_library(AURORA_ONE INTERFACE) target_compile_options(AURORA_ONE INTERFACE - "SHELL:-DSTM32G030xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G030xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -671,15 +671,15 @@ target_compile_options(AURORA_ONE_serial_none INTERFACE ) add_library(AURORA_ONE_usb_CDC INTERFACE) target_compile_options(AURORA_ONE_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(AURORA_ONE_usb_CDCgen INTERFACE) target_compile_options(AURORA_ONE_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(AURORA_ONE_usb_HID INTERFACE) target_compile_options(AURORA_ONE_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(AURORA_ONE_usb_none INTERFACE) target_compile_options(AURORA_ONE_usb_none INTERFACE @@ -696,7 +696,7 @@ set(B_G431B_ESC1_MCU cortex-m4) set(B_G431B_ESC1_FPCONF "fpv4-sp-d16-hard") add_library(B_G431B_ESC1 INTERFACE) target_compile_options(B_G431B_ESC1 INTERFACE - "SHELL:-DSTM32G431xx " + "SHELL:-DSTM32G431xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -741,15 +741,15 @@ target_compile_options(B_G431B_ESC1_serial_none INTERFACE ) add_library(B_G431B_ESC1_usb_CDC INTERFACE) target_compile_options(B_G431B_ESC1_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(B_G431B_ESC1_usb_CDCgen INTERFACE) target_compile_options(B_G431B_ESC1_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(B_G431B_ESC1_usb_HID INTERFACE) target_compile_options(B_G431B_ESC1_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(B_G431B_ESC1_usb_none INTERFACE) target_compile_options(B_G431B_ESC1_usb_none INTERFACE @@ -778,7 +778,7 @@ set(B_L072Z_LRWAN1_MCU cortex-m0plus) set(B_L072Z_LRWAN1_FPCONF "-") add_library(B_L072Z_LRWAN1 INTERFACE) target_compile_options(B_L072Z_LRWAN1 INTERFACE - "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL: " @@ -823,15 +823,15 @@ target_compile_options(B_L072Z_LRWAN1_serial_none INTERFACE ) add_library(B_L072Z_LRWAN1_usb_CDC INTERFACE) target_compile_options(B_L072Z_LRWAN1_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(B_L072Z_LRWAN1_usb_CDCgen INTERFACE) target_compile_options(B_L072Z_LRWAN1_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(B_L072Z_LRWAN1_usb_HID INTERFACE) target_compile_options(B_L072Z_LRWAN1_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(B_L072Z_LRWAN1_usb_none INTERFACE) target_compile_options(B_L072Z_LRWAN1_usb_none INTERFACE @@ -860,7 +860,7 @@ set(B_L475E_IOT01A_MCU cortex-m4) set(B_L475E_IOT01A_FPCONF "fpv4-sp-d16-hard") add_library(B_L475E_IOT01A INTERFACE) target_compile_options(B_L475E_IOT01A INTERFACE - "SHELL:-DSTM32L475xx " + "SHELL:-DSTM32L475xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -905,15 +905,15 @@ target_compile_options(B_L475E_IOT01A_serial_none INTERFACE ) add_library(B_L475E_IOT01A_usb_CDC INTERFACE) target_compile_options(B_L475E_IOT01A_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(B_L475E_IOT01A_usb_CDCgen INTERFACE) target_compile_options(B_L475E_IOT01A_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(B_L475E_IOT01A_usb_HID INTERFACE) target_compile_options(B_L475E_IOT01A_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(B_L475E_IOT01A_usb_none INTERFACE) target_compile_options(B_L475E_IOT01A_usb_none INTERFACE @@ -942,7 +942,7 @@ set(B_L4S5I_IOT01A_MCU cortex-m4) set(B_L4S5I_IOT01A_FPCONF "fpv4-sp-d16-hard") add_library(B_L4S5I_IOT01A INTERFACE) target_compile_options(B_L4S5I_IOT01A INTERFACE - "SHELL:-DSTM32L4S5xx " + "SHELL:-DSTM32L4S5xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -987,15 +987,15 @@ target_compile_options(B_L4S5I_IOT01A_serial_none INTERFACE ) add_library(B_L4S5I_IOT01A_usb_CDC INTERFACE) target_compile_options(B_L4S5I_IOT01A_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(B_L4S5I_IOT01A_usb_CDCgen INTERFACE) target_compile_options(B_L4S5I_IOT01A_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(B_L4S5I_IOT01A_usb_HID INTERFACE) target_compile_options(B_L4S5I_IOT01A_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(B_L4S5I_IOT01A_usb_none INTERFACE) target_compile_options(B_L4S5I_IOT01A_usb_none INTERFACE @@ -1024,7 +1024,7 @@ set(B_U585I_IOT02A_MCU cortex-m33) set(B_U585I_IOT02A_FPCONF "fpv4-sp-d16-hard") add_library(B_U585I_IOT02A INTERFACE) target_compile_options(B_U585I_IOT02A INTERFACE - "SHELL:-DSTM32U585xx " + "SHELL:-DSTM32U585xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -1069,15 +1069,15 @@ target_compile_options(B_U585I_IOT02A_serial_none INTERFACE ) add_library(B_U585I_IOT02A_usb_CDC INTERFACE) target_compile_options(B_U585I_IOT02A_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(B_U585I_IOT02A_usb_CDCgen INTERFACE) target_compile_options(B_U585I_IOT02A_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(B_U585I_IOT02A_usb_HID INTERFACE) target_compile_options(B_U585I_IOT02A_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(B_U585I_IOT02A_usb_none INTERFACE) target_compile_options(B_U585I_IOT02A_usb_none INTERFACE @@ -1106,7 +1106,7 @@ set(BLACK_F407VE_MCU cortex-m4) set(BLACK_F407VE_FPCONF "-") add_library(BLACK_F407VE INTERFACE) target_compile_options(BLACK_F407VE INTERFACE - "SHELL:-DSTM32F407xx " + "SHELL:-DSTM32F407xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -1151,15 +1151,15 @@ target_compile_options(BLACK_F407VE_serial_none INTERFACE ) add_library(BLACK_F407VE_usb_CDC INTERFACE) target_compile_options(BLACK_F407VE_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(BLACK_F407VE_usb_CDCgen INTERFACE) target_compile_options(BLACK_F407VE_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(BLACK_F407VE_usb_HID INTERFACE) target_compile_options(BLACK_F407VE_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(BLACK_F407VE_usb_none INTERFACE) target_compile_options(BLACK_F407VE_usb_none INTERFACE @@ -1188,7 +1188,7 @@ set(BLACK_F407VE_hid_MCU cortex-m4) set(BLACK_F407VE_hid_FPCONF "-") add_library(BLACK_F407VE_hid INTERFACE) target_compile_options(BLACK_F407VE_hid INTERFACE - "SHELL:-DSTM32F407xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F407xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -1230,7 +1230,7 @@ set(BLACK_F407VG_MCU cortex-m4) set(BLACK_F407VG_FPCONF "-") add_library(BLACK_F407VG INTERFACE) target_compile_options(BLACK_F407VG INTERFACE - "SHELL:-DSTM32F407xx " + "SHELL:-DSTM32F407xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -1275,15 +1275,15 @@ target_compile_options(BLACK_F407VG_serial_none INTERFACE ) add_library(BLACK_F407VG_usb_CDC INTERFACE) target_compile_options(BLACK_F407VG_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(BLACK_F407VG_usb_CDCgen INTERFACE) target_compile_options(BLACK_F407VG_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(BLACK_F407VG_usb_HID INTERFACE) target_compile_options(BLACK_F407VG_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(BLACK_F407VG_usb_none INTERFACE) target_compile_options(BLACK_F407VG_usb_none INTERFACE @@ -1312,7 +1312,7 @@ set(BLACK_F407VG_hid_MCU cortex-m4) set(BLACK_F407VG_hid_FPCONF "-") add_library(BLACK_F407VG_hid INTERFACE) target_compile_options(BLACK_F407VG_hid INTERFACE - "SHELL:-DSTM32F407xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F407xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -1354,7 +1354,7 @@ set(BLACK_F407ZE_MCU cortex-m4) set(BLACK_F407ZE_FPCONF "-") add_library(BLACK_F407ZE INTERFACE) target_compile_options(BLACK_F407ZE INTERFACE - "SHELL:-DSTM32F407xx " + "SHELL:-DSTM32F407xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -1399,15 +1399,15 @@ target_compile_options(BLACK_F407ZE_serial_none INTERFACE ) add_library(BLACK_F407ZE_usb_CDC INTERFACE) target_compile_options(BLACK_F407ZE_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(BLACK_F407ZE_usb_CDCgen INTERFACE) target_compile_options(BLACK_F407ZE_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(BLACK_F407ZE_usb_HID INTERFACE) target_compile_options(BLACK_F407ZE_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(BLACK_F407ZE_usb_none INTERFACE) target_compile_options(BLACK_F407ZE_usb_none INTERFACE @@ -1436,7 +1436,7 @@ set(BLACK_F407ZE_hid_MCU cortex-m4) set(BLACK_F407ZE_hid_FPCONF "-") add_library(BLACK_F407ZE_hid INTERFACE) target_compile_options(BLACK_F407ZE_hid INTERFACE - "SHELL:-DSTM32F407xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F407xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -1478,7 +1478,7 @@ set(BLACK_F407ZG_MCU cortex-m4) set(BLACK_F407ZG_FPCONF "-") add_library(BLACK_F407ZG INTERFACE) target_compile_options(BLACK_F407ZG INTERFACE - "SHELL:-DSTM32F407xx " + "SHELL:-DSTM32F407xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -1523,15 +1523,15 @@ target_compile_options(BLACK_F407ZG_serial_none INTERFACE ) add_library(BLACK_F407ZG_usb_CDC INTERFACE) target_compile_options(BLACK_F407ZG_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(BLACK_F407ZG_usb_CDCgen INTERFACE) target_compile_options(BLACK_F407ZG_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(BLACK_F407ZG_usb_HID INTERFACE) target_compile_options(BLACK_F407ZG_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(BLACK_F407ZG_usb_none INTERFACE) target_compile_options(BLACK_F407ZG_usb_none INTERFACE @@ -1560,7 +1560,7 @@ set(BLACK_F407ZG_hid_MCU cortex-m4) set(BLACK_F407ZG_hid_FPCONF "-") add_library(BLACK_F407ZG_hid INTERFACE) target_compile_options(BLACK_F407ZG_hid INTERFACE - "SHELL:-DSTM32F407xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F407xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -1602,7 +1602,7 @@ set(BLACKPILL_F103C8_MCU cortex-m3) set(BLACKPILL_F103C8_FPCONF "-") add_library(BLACKPILL_F103C8 INTERFACE) target_compile_options(BLACKPILL_F103C8 INTERFACE - "SHELL:-DSTM32F103xB " + "SHELL:-DSTM32F103xB" "SHELL:" "SHELL:" "SHELL: " @@ -1647,15 +1647,15 @@ target_compile_options(BLACKPILL_F103C8_serial_none INTERFACE ) add_library(BLACKPILL_F103C8_usb_CDC INTERFACE) target_compile_options(BLACKPILL_F103C8_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(BLACKPILL_F103C8_usb_CDCgen INTERFACE) target_compile_options(BLACKPILL_F103C8_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(BLACKPILL_F103C8_usb_HID INTERFACE) target_compile_options(BLACKPILL_F103C8_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(BLACKPILL_F103C8_usb_none INTERFACE) target_compile_options(BLACKPILL_F103C8_usb_none INTERFACE @@ -1684,7 +1684,7 @@ set(BLACKPILL_F103C8_dfu2_MCU cortex-m3) set(BLACKPILL_F103C8_dfu2_FPCONF "-") add_library(BLACKPILL_F103C8_dfu2 INTERFACE) target_compile_options(BLACKPILL_F103C8_dfu2 INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -1726,7 +1726,7 @@ set(BLACKPILL_F103C8_dfuo_MCU cortex-m3) set(BLACKPILL_F103C8_dfuo_FPCONF "-") add_library(BLACKPILL_F103C8_dfuo INTERFACE) target_compile_options(BLACKPILL_F103C8_dfuo INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -1768,7 +1768,7 @@ set(BLACKPILL_F103C8_hid_MCU cortex-m3) set(BLACKPILL_F103C8_hid_FPCONF "-") add_library(BLACKPILL_F103C8_hid INTERFACE) target_compile_options(BLACKPILL_F103C8_hid INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -1810,7 +1810,7 @@ set(BLACKPILL_F103CB_MCU cortex-m3) set(BLACKPILL_F103CB_FPCONF "-") add_library(BLACKPILL_F103CB INTERFACE) target_compile_options(BLACKPILL_F103CB INTERFACE - "SHELL:-DSTM32F103xB " + "SHELL:-DSTM32F103xB" "SHELL:" "SHELL:" "SHELL: " @@ -1855,15 +1855,15 @@ target_compile_options(BLACKPILL_F103CB_serial_none INTERFACE ) add_library(BLACKPILL_F103CB_usb_CDC INTERFACE) target_compile_options(BLACKPILL_F103CB_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(BLACKPILL_F103CB_usb_CDCgen INTERFACE) target_compile_options(BLACKPILL_F103CB_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(BLACKPILL_F103CB_usb_HID INTERFACE) target_compile_options(BLACKPILL_F103CB_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(BLACKPILL_F103CB_usb_none INTERFACE) target_compile_options(BLACKPILL_F103CB_usb_none INTERFACE @@ -1892,7 +1892,7 @@ set(BLACKPILL_F103CB_dfu2_MCU cortex-m3) set(BLACKPILL_F103CB_dfu2_FPCONF "-") add_library(BLACKPILL_F103CB_dfu2 INTERFACE) target_compile_options(BLACKPILL_F103CB_dfu2 INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -1934,7 +1934,7 @@ set(BLACKPILL_F103CB_dfuo_MCU cortex-m3) set(BLACKPILL_F103CB_dfuo_FPCONF "-") add_library(BLACKPILL_F103CB_dfuo INTERFACE) target_compile_options(BLACKPILL_F103CB_dfuo INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -1976,7 +1976,7 @@ set(BLACKPILL_F103CB_hid_MCU cortex-m3) set(BLACKPILL_F103CB_hid_FPCONF "-") add_library(BLACKPILL_F103CB_hid INTERFACE) target_compile_options(BLACKPILL_F103CB_hid INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -2018,7 +2018,7 @@ set(BLACKPILL_F303CC_MCU cortex-m4) set(BLACKPILL_F303CC_FPCONF "-") add_library(BLACKPILL_F303CC INTERFACE) target_compile_options(BLACKPILL_F303CC INTERFACE - "SHELL:-DSTM32F303xC " + "SHELL:-DSTM32F303xC" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -2063,15 +2063,15 @@ target_compile_options(BLACKPILL_F303CC_serial_none INTERFACE ) add_library(BLACKPILL_F303CC_usb_CDC INTERFACE) target_compile_options(BLACKPILL_F303CC_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(BLACKPILL_F303CC_usb_CDCgen INTERFACE) target_compile_options(BLACKPILL_F303CC_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(BLACKPILL_F303CC_usb_HID INTERFACE) target_compile_options(BLACKPILL_F303CC_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(BLACKPILL_F303CC_usb_none INTERFACE) target_compile_options(BLACKPILL_F303CC_usb_none INTERFACE @@ -2100,7 +2100,7 @@ set(BLACKPILL_F401CC_MCU cortex-m4) set(BLACKPILL_F401CC_FPCONF "-") add_library(BLACKPILL_F401CC INTERFACE) target_compile_options(BLACKPILL_F401CC INTERFACE - "SHELL:-DSTM32F401xC " + "SHELL:-DSTM32F401xC" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -2145,15 +2145,15 @@ target_compile_options(BLACKPILL_F401CC_serial_none INTERFACE ) add_library(BLACKPILL_F401CC_usb_CDC INTERFACE) target_compile_options(BLACKPILL_F401CC_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(BLACKPILL_F401CC_usb_CDCgen INTERFACE) target_compile_options(BLACKPILL_F401CC_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(BLACKPILL_F401CC_usb_HID INTERFACE) target_compile_options(BLACKPILL_F401CC_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(BLACKPILL_F401CC_usb_none INTERFACE) target_compile_options(BLACKPILL_F401CC_usb_none INTERFACE @@ -2182,7 +2182,7 @@ set(BLACKPILL_F401CC_hid_MCU cortex-m4) set(BLACKPILL_F401CC_hid_FPCONF "-") add_library(BLACKPILL_F401CC_hid INTERFACE) target_compile_options(BLACKPILL_F401CC_hid INTERFACE - "SHELL:-DSTM32F401xC -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F401xC -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -2224,7 +2224,7 @@ set(BLACKPILL_F401CE_MCU cortex-m4) set(BLACKPILL_F401CE_FPCONF "-") add_library(BLACKPILL_F401CE INTERFACE) target_compile_options(BLACKPILL_F401CE INTERFACE - "SHELL:-DSTM32F401xE " + "SHELL:-DSTM32F401xE" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -2269,15 +2269,15 @@ target_compile_options(BLACKPILL_F401CE_serial_none INTERFACE ) add_library(BLACKPILL_F401CE_usb_CDC INTERFACE) target_compile_options(BLACKPILL_F401CE_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(BLACKPILL_F401CE_usb_CDCgen INTERFACE) target_compile_options(BLACKPILL_F401CE_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(BLACKPILL_F401CE_usb_HID INTERFACE) target_compile_options(BLACKPILL_F401CE_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(BLACKPILL_F401CE_usb_none INTERFACE) target_compile_options(BLACKPILL_F401CE_usb_none INTERFACE @@ -2306,7 +2306,7 @@ set(BLACKPILL_F401CE_hid_MCU cortex-m4) set(BLACKPILL_F401CE_hid_FPCONF "-") add_library(BLACKPILL_F401CE_hid INTERFACE) target_compile_options(BLACKPILL_F401CE_hid INTERFACE - "SHELL:-DSTM32F401xE -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F401xE -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -2348,7 +2348,7 @@ set(BLACKPILL_F411CE_MCU cortex-m4) set(BLACKPILL_F411CE_FPCONF "-") add_library(BLACKPILL_F411CE INTERFACE) target_compile_options(BLACKPILL_F411CE INTERFACE - "SHELL:-DSTM32F411xE " + "SHELL:-DSTM32F411xE" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -2393,15 +2393,15 @@ target_compile_options(BLACKPILL_F411CE_serial_none INTERFACE ) add_library(BLACKPILL_F411CE_usb_CDC INTERFACE) target_compile_options(BLACKPILL_F411CE_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(BLACKPILL_F411CE_usb_CDCgen INTERFACE) target_compile_options(BLACKPILL_F411CE_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(BLACKPILL_F411CE_usb_HID INTERFACE) target_compile_options(BLACKPILL_F411CE_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(BLACKPILL_F411CE_usb_none INTERFACE) target_compile_options(BLACKPILL_F411CE_usb_none INTERFACE @@ -2430,7 +2430,7 @@ set(BLACKPILL_F411CE_hid_MCU cortex-m4) set(BLACKPILL_F411CE_hid_FPCONF "-") add_library(BLACKPILL_F411CE_hid INTERFACE) target_compile_options(BLACKPILL_F411CE_hid INTERFACE - "SHELL:-DSTM32F411xE -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F411xE -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -2472,7 +2472,7 @@ set(BLUE_F407VE_MINI_MCU cortex-m4) set(BLUE_F407VE_MINI_FPCONF "-") add_library(BLUE_F407VE_MINI INTERFACE) target_compile_options(BLUE_F407VE_MINI INTERFACE - "SHELL:-DSTM32F407xx " + "SHELL:-DSTM32F407xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -2517,15 +2517,15 @@ target_compile_options(BLUE_F407VE_MINI_serial_none INTERFACE ) add_library(BLUE_F407VE_MINI_usb_CDC INTERFACE) target_compile_options(BLUE_F407VE_MINI_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(BLUE_F407VE_MINI_usb_CDCgen INTERFACE) target_compile_options(BLUE_F407VE_MINI_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(BLUE_F407VE_MINI_usb_HID INTERFACE) target_compile_options(BLUE_F407VE_MINI_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(BLUE_F407VE_MINI_usb_none INTERFACE) target_compile_options(BLUE_F407VE_MINI_usb_none INTERFACE @@ -2554,7 +2554,7 @@ set(BLUE_F407VE_MINI_hid_MCU cortex-m4) set(BLUE_F407VE_MINI_hid_FPCONF "-") add_library(BLUE_F407VE_MINI_hid INTERFACE) target_compile_options(BLUE_F407VE_MINI_hid INTERFACE - "SHELL:-DSTM32F407xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F407xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -2596,7 +2596,7 @@ set(BLUEBUTTON_F103R8T_MCU cortex-m3) set(BLUEBUTTON_F103R8T_FPCONF "-") add_library(BLUEBUTTON_F103R8T INTERFACE) target_compile_options(BLUEBUTTON_F103R8T INTERFACE - "SHELL:-DSTM32F103xB " + "SHELL:-DSTM32F103xB" "SHELL:" "SHELL:" "SHELL: " @@ -2641,15 +2641,15 @@ target_compile_options(BLUEBUTTON_F103R8T_serial_none INTERFACE ) add_library(BLUEBUTTON_F103R8T_usb_CDC INTERFACE) target_compile_options(BLUEBUTTON_F103R8T_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(BLUEBUTTON_F103R8T_usb_CDCgen INTERFACE) target_compile_options(BLUEBUTTON_F103R8T_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(BLUEBUTTON_F103R8T_usb_HID INTERFACE) target_compile_options(BLUEBUTTON_F103R8T_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(BLUEBUTTON_F103R8T_usb_none INTERFACE) target_compile_options(BLUEBUTTON_F103R8T_usb_none INTERFACE @@ -2678,7 +2678,7 @@ set(BLUEBUTTON_F103R8T_dfu2_MCU cortex-m3) set(BLUEBUTTON_F103R8T_dfu2_FPCONF "-") add_library(BLUEBUTTON_F103R8T_dfu2 INTERFACE) target_compile_options(BLUEBUTTON_F103R8T_dfu2 INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -2720,7 +2720,7 @@ set(BLUEBUTTON_F103R8T_dfuo_MCU cortex-m3) set(BLUEBUTTON_F103R8T_dfuo_FPCONF "-") add_library(BLUEBUTTON_F103R8T_dfuo INTERFACE) target_compile_options(BLUEBUTTON_F103R8T_dfuo INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -2762,7 +2762,7 @@ set(BLUEBUTTON_F103R8T_hid_MCU cortex-m3) set(BLUEBUTTON_F103R8T_hid_FPCONF "-") add_library(BLUEBUTTON_F103R8T_hid INTERFACE) target_compile_options(BLUEBUTTON_F103R8T_hid INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -2804,7 +2804,7 @@ set(BLUEBUTTON_F103RBT_MCU cortex-m3) set(BLUEBUTTON_F103RBT_FPCONF "-") add_library(BLUEBUTTON_F103RBT INTERFACE) target_compile_options(BLUEBUTTON_F103RBT INTERFACE - "SHELL:-DSTM32F103xB " + "SHELL:-DSTM32F103xB" "SHELL:" "SHELL:" "SHELL: " @@ -2849,15 +2849,15 @@ target_compile_options(BLUEBUTTON_F103RBT_serial_none INTERFACE ) add_library(BLUEBUTTON_F103RBT_usb_CDC INTERFACE) target_compile_options(BLUEBUTTON_F103RBT_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(BLUEBUTTON_F103RBT_usb_CDCgen INTERFACE) target_compile_options(BLUEBUTTON_F103RBT_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(BLUEBUTTON_F103RBT_usb_HID INTERFACE) target_compile_options(BLUEBUTTON_F103RBT_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(BLUEBUTTON_F103RBT_usb_none INTERFACE) target_compile_options(BLUEBUTTON_F103RBT_usb_none INTERFACE @@ -2886,7 +2886,7 @@ set(BLUEBUTTON_F103RBT_dfu2_MCU cortex-m3) set(BLUEBUTTON_F103RBT_dfu2_FPCONF "-") add_library(BLUEBUTTON_F103RBT_dfu2 INTERFACE) target_compile_options(BLUEBUTTON_F103RBT_dfu2 INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -2928,7 +2928,7 @@ set(BLUEBUTTON_F103RBT_dfuo_MCU cortex-m3) set(BLUEBUTTON_F103RBT_dfuo_FPCONF "-") add_library(BLUEBUTTON_F103RBT_dfuo INTERFACE) target_compile_options(BLUEBUTTON_F103RBT_dfuo INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -2970,7 +2970,7 @@ set(BLUEBUTTON_F103RBT_hid_MCU cortex-m3) set(BLUEBUTTON_F103RBT_hid_FPCONF "-") add_library(BLUEBUTTON_F103RBT_hid INTERFACE) target_compile_options(BLUEBUTTON_F103RBT_hid INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -3012,7 +3012,7 @@ set(BLUEBUTTON_F103RCT_MCU cortex-m3) set(BLUEBUTTON_F103RCT_FPCONF "-") add_library(BLUEBUTTON_F103RCT INTERFACE) target_compile_options(BLUEBUTTON_F103RCT INTERFACE - "SHELL:-DSTM32F103xE " + "SHELL:-DSTM32F103xE" "SHELL:" "SHELL:" "SHELL: " @@ -3057,15 +3057,15 @@ target_compile_options(BLUEBUTTON_F103RCT_serial_none INTERFACE ) add_library(BLUEBUTTON_F103RCT_usb_CDC INTERFACE) target_compile_options(BLUEBUTTON_F103RCT_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(BLUEBUTTON_F103RCT_usb_CDCgen INTERFACE) target_compile_options(BLUEBUTTON_F103RCT_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(BLUEBUTTON_F103RCT_usb_HID INTERFACE) target_compile_options(BLUEBUTTON_F103RCT_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(BLUEBUTTON_F103RCT_usb_none INTERFACE) target_compile_options(BLUEBUTTON_F103RCT_usb_none INTERFACE @@ -3094,7 +3094,7 @@ set(BLUEBUTTON_F103RCT_dfu2_MCU cortex-m3) set(BLUEBUTTON_F103RCT_dfu2_FPCONF "-") add_library(BLUEBUTTON_F103RCT_dfu2 INTERFACE) target_compile_options(BLUEBUTTON_F103RCT_dfu2 INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -3136,7 +3136,7 @@ set(BLUEBUTTON_F103RCT_dfuo_MCU cortex-m3) set(BLUEBUTTON_F103RCT_dfuo_FPCONF "-") add_library(BLUEBUTTON_F103RCT_dfuo INTERFACE) target_compile_options(BLUEBUTTON_F103RCT_dfuo INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -3178,7 +3178,7 @@ set(BLUEBUTTON_F103RCT_hid_MCU cortex-m3) set(BLUEBUTTON_F103RCT_hid_FPCONF "-") add_library(BLUEBUTTON_F103RCT_hid INTERFACE) target_compile_options(BLUEBUTTON_F103RCT_hid INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -3220,7 +3220,7 @@ set(BLUEBUTTON_F103RET_MCU cortex-m3) set(BLUEBUTTON_F103RET_FPCONF "-") add_library(BLUEBUTTON_F103RET INTERFACE) target_compile_options(BLUEBUTTON_F103RET INTERFACE - "SHELL:-DSTM32F103xE " + "SHELL:-DSTM32F103xE" "SHELL:" "SHELL:" "SHELL: " @@ -3265,15 +3265,15 @@ target_compile_options(BLUEBUTTON_F103RET_serial_none INTERFACE ) add_library(BLUEBUTTON_F103RET_usb_CDC INTERFACE) target_compile_options(BLUEBUTTON_F103RET_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(BLUEBUTTON_F103RET_usb_CDCgen INTERFACE) target_compile_options(BLUEBUTTON_F103RET_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(BLUEBUTTON_F103RET_usb_HID INTERFACE) target_compile_options(BLUEBUTTON_F103RET_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(BLUEBUTTON_F103RET_usb_none INTERFACE) target_compile_options(BLUEBUTTON_F103RET_usb_none INTERFACE @@ -3302,7 +3302,7 @@ set(BLUEBUTTON_F103RET_dfu2_MCU cortex-m3) set(BLUEBUTTON_F103RET_dfu2_FPCONF "-") add_library(BLUEBUTTON_F103RET_dfu2 INTERFACE) target_compile_options(BLUEBUTTON_F103RET_dfu2 INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -3344,7 +3344,7 @@ set(BLUEBUTTON_F103RET_dfuo_MCU cortex-m3) set(BLUEBUTTON_F103RET_dfuo_FPCONF "-") add_library(BLUEBUTTON_F103RET_dfuo INTERFACE) target_compile_options(BLUEBUTTON_F103RET_dfuo INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -3386,7 +3386,7 @@ set(BLUEBUTTON_F103RET_hid_MCU cortex-m3) set(BLUEBUTTON_F103RET_hid_FPCONF "-") add_library(BLUEBUTTON_F103RET_hid INTERFACE) target_compile_options(BLUEBUTTON_F103RET_hid INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -3428,7 +3428,7 @@ set(BLUEPILL_F103C6_MCU cortex-m3) set(BLUEPILL_F103C6_FPCONF "-") add_library(BLUEPILL_F103C6 INTERFACE) target_compile_options(BLUEPILL_F103C6 INTERFACE - "SHELL:-DSTM32F103x6 " + "SHELL:-DSTM32F103x6" "SHELL:" "SHELL:" "SHELL: " @@ -3473,15 +3473,15 @@ target_compile_options(BLUEPILL_F103C6_serial_none INTERFACE ) add_library(BLUEPILL_F103C6_usb_CDC INTERFACE) target_compile_options(BLUEPILL_F103C6_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(BLUEPILL_F103C6_usb_CDCgen INTERFACE) target_compile_options(BLUEPILL_F103C6_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(BLUEPILL_F103C6_usb_HID INTERFACE) target_compile_options(BLUEPILL_F103C6_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(BLUEPILL_F103C6_usb_none INTERFACE) target_compile_options(BLUEPILL_F103C6_usb_none INTERFACE @@ -3510,7 +3510,7 @@ set(BLUEPILL_F103C6_dfu2_MCU cortex-m3) set(BLUEPILL_F103C6_dfu2_FPCONF "-") add_library(BLUEPILL_F103C6_dfu2 INTERFACE) target_compile_options(BLUEPILL_F103C6_dfu2 INTERFACE - "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -3552,7 +3552,7 @@ set(BLUEPILL_F103C6_dfuo_MCU cortex-m3) set(BLUEPILL_F103C6_dfuo_FPCONF "-") add_library(BLUEPILL_F103C6_dfuo INTERFACE) target_compile_options(BLUEPILL_F103C6_dfuo INTERFACE - "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -3594,7 +3594,7 @@ set(BLUEPILL_F103C6_hid_MCU cortex-m3) set(BLUEPILL_F103C6_hid_FPCONF "-") add_library(BLUEPILL_F103C6_hid INTERFACE) target_compile_options(BLUEPILL_F103C6_hid INTERFACE - "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -3636,7 +3636,7 @@ set(BLUEPILL_F103C8_MCU cortex-m3) set(BLUEPILL_F103C8_FPCONF "-") add_library(BLUEPILL_F103C8 INTERFACE) target_compile_options(BLUEPILL_F103C8 INTERFACE - "SHELL:-DSTM32F103xB " + "SHELL:-DSTM32F103xB" "SHELL:" "SHELL:" "SHELL: " @@ -3681,15 +3681,15 @@ target_compile_options(BLUEPILL_F103C8_serial_none INTERFACE ) add_library(BLUEPILL_F103C8_usb_CDC INTERFACE) target_compile_options(BLUEPILL_F103C8_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(BLUEPILL_F103C8_usb_CDCgen INTERFACE) target_compile_options(BLUEPILL_F103C8_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(BLUEPILL_F103C8_usb_HID INTERFACE) target_compile_options(BLUEPILL_F103C8_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(BLUEPILL_F103C8_usb_none INTERFACE) target_compile_options(BLUEPILL_F103C8_usb_none INTERFACE @@ -3718,7 +3718,7 @@ set(BLUEPILL_F103C8_dfu2_MCU cortex-m3) set(BLUEPILL_F103C8_dfu2_FPCONF "-") add_library(BLUEPILL_F103C8_dfu2 INTERFACE) target_compile_options(BLUEPILL_F103C8_dfu2 INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -3760,7 +3760,7 @@ set(BLUEPILL_F103C8_dfuo_MCU cortex-m3) set(BLUEPILL_F103C8_dfuo_FPCONF "-") add_library(BLUEPILL_F103C8_dfuo INTERFACE) target_compile_options(BLUEPILL_F103C8_dfuo INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -3802,7 +3802,7 @@ set(BLUEPILL_F103C8_hid_MCU cortex-m3) set(BLUEPILL_F103C8_hid_FPCONF "-") add_library(BLUEPILL_F103C8_hid INTERFACE) target_compile_options(BLUEPILL_F103C8_hid INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -3844,7 +3844,7 @@ set(BLUEPILL_F103CB_MCU cortex-m3) set(BLUEPILL_F103CB_FPCONF "-") add_library(BLUEPILL_F103CB INTERFACE) target_compile_options(BLUEPILL_F103CB INTERFACE - "SHELL:-DSTM32F103xB " + "SHELL:-DSTM32F103xB" "SHELL:" "SHELL:" "SHELL: " @@ -3889,15 +3889,15 @@ target_compile_options(BLUEPILL_F103CB_serial_none INTERFACE ) add_library(BLUEPILL_F103CB_usb_CDC INTERFACE) target_compile_options(BLUEPILL_F103CB_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(BLUEPILL_F103CB_usb_CDCgen INTERFACE) target_compile_options(BLUEPILL_F103CB_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(BLUEPILL_F103CB_usb_HID INTERFACE) target_compile_options(BLUEPILL_F103CB_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(BLUEPILL_F103CB_usb_none INTERFACE) target_compile_options(BLUEPILL_F103CB_usb_none INTERFACE @@ -3926,7 +3926,7 @@ set(BLUEPILL_F103CB_dfu2_MCU cortex-m3) set(BLUEPILL_F103CB_dfu2_FPCONF "-") add_library(BLUEPILL_F103CB_dfu2 INTERFACE) target_compile_options(BLUEPILL_F103CB_dfu2 INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -3968,7 +3968,7 @@ set(BLUEPILL_F103CB_dfuo_MCU cortex-m3) set(BLUEPILL_F103CB_dfuo_FPCONF "-") add_library(BLUEPILL_F103CB_dfuo INTERFACE) target_compile_options(BLUEPILL_F103CB_dfuo INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -4010,7 +4010,7 @@ set(BLUEPILL_F103CB_hid_MCU cortex-m3) set(BLUEPILL_F103CB_hid_FPCONF "-") add_library(BLUEPILL_F103CB_hid INTERFACE) target_compile_options(BLUEPILL_F103CB_hid INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -4052,7 +4052,7 @@ set(CoreBoard_F401RC_MCU cortex-m4) set(CoreBoard_F401RC_FPCONF "-") add_library(CoreBoard_F401RC INTERFACE) target_compile_options(CoreBoard_F401RC INTERFACE - "SHELL:-DSTM32F401xC " + "SHELL:-DSTM32F401xC" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -4097,15 +4097,15 @@ target_compile_options(CoreBoard_F401RC_serial_none INTERFACE ) add_library(CoreBoard_F401RC_usb_CDC INTERFACE) target_compile_options(CoreBoard_F401RC_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(CoreBoard_F401RC_usb_CDCgen INTERFACE) target_compile_options(CoreBoard_F401RC_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(CoreBoard_F401RC_usb_HID INTERFACE) target_compile_options(CoreBoard_F401RC_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(CoreBoard_F401RC_usb_none INTERFACE) target_compile_options(CoreBoard_F401RC_usb_none INTERFACE @@ -4134,7 +4134,7 @@ set(CoreBoard_F401RC_hid_MCU cortex-m4) set(CoreBoard_F401RC_hid_FPCONF "-") add_library(CoreBoard_F401RC_hid INTERFACE) target_compile_options(CoreBoard_F401RC_hid INTERFACE - "SHELL:-DSTM32F401xC -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F401xC -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -4176,7 +4176,7 @@ set(CYGNET_MCU cortex-m4) set(CYGNET_FPCONF "fpv4-sp-d16-hard") add_library(CYGNET INTERFACE) target_compile_options(CYGNET INTERFACE - "SHELL:-DSTM32L433xx " + "SHELL:-DSTM32L433xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -4221,15 +4221,15 @@ target_compile_options(CYGNET_serial_none INTERFACE ) add_library(CYGNET_usb_CDC INTERFACE) target_compile_options(CYGNET_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x30A4 -DUSBD_PID=0x0003 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x30A4 -DUSBD_PID=0x0003 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(CYGNET_usb_CDCgen INTERFACE) target_compile_options(CYGNET_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x30A4 -DUSBD_PID=0x0003 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x30A4 -DUSBD_PID=0x0003 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(CYGNET_usb_HID INTERFACE) target_compile_options(CYGNET_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x30A4 -DUSBD_PID=0x0003 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x30A4 -DUSBD_PID=0x0003 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(CYGNET_usb_none INTERFACE) target_compile_options(CYGNET_usb_none INTERFACE @@ -4258,7 +4258,7 @@ set(DAISY_PATCH_SM_MCU cortex-m7) set(DAISY_PATCH_SM_FPCONF "-") add_library(DAISY_PATCH_SM INTERFACE) target_compile_options(DAISY_PATCH_SM INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H750xx " + "SHELL:-DCORE_CM7 -DSTM32H750xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -4303,15 +4303,15 @@ target_compile_options(DAISY_PATCH_SM_serial_none INTERFACE ) add_library(DAISY_PATCH_SM_usb_CDC INTERFACE) target_compile_options(DAISY_PATCH_SM_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(DAISY_PATCH_SM_usb_CDCgen INTERFACE) target_compile_options(DAISY_PATCH_SM_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(DAISY_PATCH_SM_usb_HID INTERFACE) target_compile_options(DAISY_PATCH_SM_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(DAISY_PATCH_SM_usb_none INTERFACE) target_compile_options(DAISY_PATCH_SM_usb_none INTERFACE @@ -4340,7 +4340,7 @@ set(DAISY_PETAL_SM_MCU cortex-m7) set(DAISY_PETAL_SM_FPCONF "-") add_library(DAISY_PETAL_SM INTERFACE) target_compile_options(DAISY_PETAL_SM INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H750xx " + "SHELL:-DCORE_CM7 -DSTM32H750xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -4385,15 +4385,15 @@ target_compile_options(DAISY_PETAL_SM_serial_none INTERFACE ) add_library(DAISY_PETAL_SM_usb_CDC INTERFACE) target_compile_options(DAISY_PETAL_SM_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(DAISY_PETAL_SM_usb_CDCgen INTERFACE) target_compile_options(DAISY_PETAL_SM_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(DAISY_PETAL_SM_usb_HID INTERFACE) target_compile_options(DAISY_PETAL_SM_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(DAISY_PETAL_SM_usb_none INTERFACE) target_compile_options(DAISY_PETAL_SM_usb_none INTERFACE @@ -4422,7 +4422,7 @@ set(DAISY_SEED_MCU cortex-m7) set(DAISY_SEED_FPCONF "-") add_library(DAISY_SEED INTERFACE) target_compile_options(DAISY_SEED INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H750xx " + "SHELL:-DCORE_CM7 -DSTM32H750xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -4467,15 +4467,15 @@ target_compile_options(DAISY_SEED_serial_none INTERFACE ) add_library(DAISY_SEED_usb_CDC INTERFACE) target_compile_options(DAISY_SEED_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(DAISY_SEED_usb_CDCgen INTERFACE) target_compile_options(DAISY_SEED_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(DAISY_SEED_usb_HID INTERFACE) target_compile_options(DAISY_SEED_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(DAISY_SEED_usb_none INTERFACE) target_compile_options(DAISY_SEED_usb_none INTERFACE @@ -4504,7 +4504,7 @@ set(DEMO_F030F4_MCU cortex-m0) set(DEMO_F030F4_FPCONF "-") add_library(DEMO_F030F4 INTERFACE) target_compile_options(DEMO_F030F4 INTERFACE - "SHELL:-DSTM32F030x6 " + "SHELL:-DSTM32F030x6" "SHELL:" "SHELL:" "SHELL: " @@ -4549,15 +4549,15 @@ target_compile_options(DEMO_F030F4_serial_none INTERFACE ) add_library(DEMO_F030F4_usb_CDC INTERFACE) target_compile_options(DEMO_F030F4_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(DEMO_F030F4_usb_CDCgen INTERFACE) target_compile_options(DEMO_F030F4_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(DEMO_F030F4_usb_HID INTERFACE) target_compile_options(DEMO_F030F4_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(DEMO_F030F4_usb_none INTERFACE) target_compile_options(DEMO_F030F4_usb_none INTERFACE @@ -4574,7 +4574,7 @@ set(DEMO_F030F4_16M_MCU cortex-m0) set(DEMO_F030F4_16M_FPCONF "-") add_library(DEMO_F030F4_16M INTERFACE) target_compile_options(DEMO_F030F4_16M INTERFACE - "SHELL:-DSTM32F030x6 " + "SHELL:-DSTM32F030x6" "SHELL:" "SHELL:" "SHELL: " @@ -4619,15 +4619,15 @@ target_compile_options(DEMO_F030F4_16M_serial_none INTERFACE ) add_library(DEMO_F030F4_16M_usb_CDC INTERFACE) target_compile_options(DEMO_F030F4_16M_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(DEMO_F030F4_16M_usb_CDCgen INTERFACE) target_compile_options(DEMO_F030F4_16M_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(DEMO_F030F4_16M_usb_HID INTERFACE) target_compile_options(DEMO_F030F4_16M_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(DEMO_F030F4_16M_usb_none INTERFACE) target_compile_options(DEMO_F030F4_16M_usb_none INTERFACE @@ -4644,7 +4644,7 @@ set(DEMO_F030F4_HSI_MCU cortex-m0) set(DEMO_F030F4_HSI_FPCONF "-") add_library(DEMO_F030F4_HSI INTERFACE) target_compile_options(DEMO_F030F4_HSI INTERFACE - "SHELL:-DSTM32F030x6 " + "SHELL:-DSTM32F030x6" "SHELL:" "SHELL:" "SHELL: " @@ -4689,15 +4689,15 @@ target_compile_options(DEMO_F030F4_HSI_serial_none INTERFACE ) add_library(DEMO_F030F4_HSI_usb_CDC INTERFACE) target_compile_options(DEMO_F030F4_HSI_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(DEMO_F030F4_HSI_usb_CDCgen INTERFACE) target_compile_options(DEMO_F030F4_HSI_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(DEMO_F030F4_HSI_usb_HID INTERFACE) target_compile_options(DEMO_F030F4_HSI_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(DEMO_F030F4_HSI_usb_none INTERFACE) target_compile_options(DEMO_F030F4_HSI_usb_none INTERFACE @@ -4714,7 +4714,7 @@ set(DevEBoxH743VITX_MCU cortex-m7) set(DevEBoxH743VITX_FPCONF "-") add_library(DevEBoxH743VITX INTERFACE) target_compile_options(DevEBoxH743VITX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H743xx " + "SHELL:-DCORE_CM7 -DSTM32H743xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -4759,15 +4759,15 @@ target_compile_options(DevEBoxH743VITX_serial_none INTERFACE ) add_library(DevEBoxH743VITX_usb_CDC INTERFACE) target_compile_options(DevEBoxH743VITX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(DevEBoxH743VITX_usb_CDCgen INTERFACE) target_compile_options(DevEBoxH743VITX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(DevEBoxH743VITX_usb_HID INTERFACE) target_compile_options(DevEBoxH743VITX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(DevEBoxH743VITX_usb_none INTERFACE) target_compile_options(DevEBoxH743VITX_usb_none INTERFACE @@ -4796,7 +4796,7 @@ set(DevEBoxH750VBTX_MCU cortex-m7) set(DevEBoxH750VBTX_FPCONF "-") add_library(DevEBoxH750VBTX INTERFACE) target_compile_options(DevEBoxH750VBTX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H750xx " + "SHELL:-DCORE_CM7 -DSTM32H750xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -4841,15 +4841,15 @@ target_compile_options(DevEBoxH750VBTX_serial_none INTERFACE ) add_library(DevEBoxH750VBTX_usb_CDC INTERFACE) target_compile_options(DevEBoxH750VBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(DevEBoxH750VBTX_usb_CDCgen INTERFACE) target_compile_options(DevEBoxH750VBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(DevEBoxH750VBTX_usb_HID INTERFACE) target_compile_options(DevEBoxH750VBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(DevEBoxH750VBTX_usb_none INTERFACE) target_compile_options(DevEBoxH750VBTX_usb_none INTERFACE @@ -4878,7 +4878,7 @@ set(DEVKIT_IOT_CONTINUUM_MCU cortex-m33) set(DEVKIT_IOT_CONTINUUM_FPCONF "fpv4-sp-d16-hard") add_library(DEVKIT_IOT_CONTINUUM INTERFACE) target_compile_options(DEVKIT_IOT_CONTINUUM INTERFACE - "SHELL:-DSTM32U585xx " + "SHELL:-DSTM32U585xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -4932,7 +4932,7 @@ set(DISCO_F030R8_MCU cortex-m0) set(DISCO_F030R8_FPCONF "-") add_library(DISCO_F030R8 INTERFACE) target_compile_options(DISCO_F030R8 INTERFACE - "SHELL:-DSTM32F030x8 " + "SHELL:-DSTM32F030x8" "SHELL:" "SHELL:" "SHELL: " @@ -4977,15 +4977,15 @@ target_compile_options(DISCO_F030R8_serial_none INTERFACE ) add_library(DISCO_F030R8_usb_CDC INTERFACE) target_compile_options(DISCO_F030R8_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(DISCO_F030R8_usb_CDCgen INTERFACE) target_compile_options(DISCO_F030R8_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(DISCO_F030R8_usb_HID INTERFACE) target_compile_options(DISCO_F030R8_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(DISCO_F030R8_usb_none INTERFACE) target_compile_options(DISCO_F030R8_usb_none INTERFACE @@ -5014,7 +5014,7 @@ set(DISCO_F072RB_MCU cortex-m0) set(DISCO_F072RB_FPCONF "-") add_library(DISCO_F072RB INTERFACE) target_compile_options(DISCO_F072RB INTERFACE - "SHELL:-DSTM32F072xB " + "SHELL:-DSTM32F072xB" "SHELL:" "SHELL:" "SHELL: " @@ -5059,15 +5059,15 @@ target_compile_options(DISCO_F072RB_serial_none INTERFACE ) add_library(DISCO_F072RB_usb_CDC INTERFACE) target_compile_options(DISCO_F072RB_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(DISCO_F072RB_usb_CDCgen INTERFACE) target_compile_options(DISCO_F072RB_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(DISCO_F072RB_usb_HID INTERFACE) target_compile_options(DISCO_F072RB_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(DISCO_F072RB_usb_none INTERFACE) target_compile_options(DISCO_F072RB_usb_none INTERFACE @@ -5096,7 +5096,7 @@ set(DISCO_F100RB_MCU cortex-m3) set(DISCO_F100RB_FPCONF "-") add_library(DISCO_F100RB INTERFACE) target_compile_options(DISCO_F100RB INTERFACE - "SHELL:-DSTM32F100xB " + "SHELL:-DSTM32F100xB" "SHELL:" "SHELL:" "SHELL: " @@ -5141,15 +5141,15 @@ target_compile_options(DISCO_F100RB_serial_none INTERFACE ) add_library(DISCO_F100RB_usb_CDC INTERFACE) target_compile_options(DISCO_F100RB_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(DISCO_F100RB_usb_CDCgen INTERFACE) target_compile_options(DISCO_F100RB_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(DISCO_F100RB_usb_HID INTERFACE) target_compile_options(DISCO_F100RB_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(DISCO_F100RB_usb_none INTERFACE) target_compile_options(DISCO_F100RB_usb_none INTERFACE @@ -5178,7 +5178,7 @@ set(DISCO_F303VC_MCU cortex-m4) set(DISCO_F303VC_FPCONF "fpv4-sp-d16-hard") add_library(DISCO_F303VC INTERFACE) target_compile_options(DISCO_F303VC INTERFACE - "SHELL:-DSTM32F303xC " + "SHELL:-DSTM32F303xC" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -5223,15 +5223,15 @@ target_compile_options(DISCO_F303VC_serial_none INTERFACE ) add_library(DISCO_F303VC_usb_CDC INTERFACE) target_compile_options(DISCO_F303VC_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(DISCO_F303VC_usb_CDCgen INTERFACE) target_compile_options(DISCO_F303VC_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(DISCO_F303VC_usb_HID INTERFACE) target_compile_options(DISCO_F303VC_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(DISCO_F303VC_usb_none INTERFACE) target_compile_options(DISCO_F303VC_usb_none INTERFACE @@ -5260,7 +5260,7 @@ set(DISCO_F407VG_MCU cortex-m4) set(DISCO_F407VG_FPCONF "fpv4-sp-d16-hard") add_library(DISCO_F407VG INTERFACE) target_compile_options(DISCO_F407VG INTERFACE - "SHELL:-DSTM32F407xx " + "SHELL:-DSTM32F407xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -5305,15 +5305,15 @@ target_compile_options(DISCO_F407VG_serial_none INTERFACE ) add_library(DISCO_F407VG_usb_CDC INTERFACE) target_compile_options(DISCO_F407VG_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(DISCO_F407VG_usb_CDCgen INTERFACE) target_compile_options(DISCO_F407VG_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(DISCO_F407VG_usb_HID INTERFACE) target_compile_options(DISCO_F407VG_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(DISCO_F407VG_usb_none INTERFACE) target_compile_options(DISCO_F407VG_usb_none INTERFACE @@ -5342,7 +5342,7 @@ set(DISCO_F413ZH_MCU cortex-m4) set(DISCO_F413ZH_FPCONF "fpv4-sp-d16-hard") add_library(DISCO_F413ZH INTERFACE) target_compile_options(DISCO_F413ZH INTERFACE - "SHELL:-DSTM32F413xx " + "SHELL:-DSTM32F413xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -5387,15 +5387,15 @@ target_compile_options(DISCO_F413ZH_serial_none INTERFACE ) add_library(DISCO_F413ZH_usb_CDC INTERFACE) target_compile_options(DISCO_F413ZH_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(DISCO_F413ZH_usb_CDCgen INTERFACE) target_compile_options(DISCO_F413ZH_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(DISCO_F413ZH_usb_HID INTERFACE) target_compile_options(DISCO_F413ZH_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(DISCO_F413ZH_usb_none INTERFACE) target_compile_options(DISCO_F413ZH_usb_none INTERFACE @@ -5424,7 +5424,7 @@ set(DISCO_F746NG_MCU cortex-m7) set(DISCO_F746NG_FPCONF "fpv4-sp-d16-hard") add_library(DISCO_F746NG INTERFACE) target_compile_options(DISCO_F746NG INTERFACE - "SHELL:-DSTM32F746xx " + "SHELL:-DSTM32F746xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -5469,15 +5469,15 @@ target_compile_options(DISCO_F746NG_serial_none INTERFACE ) add_library(DISCO_F746NG_usb_CDC INTERFACE) target_compile_options(DISCO_F746NG_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(DISCO_F746NG_usb_CDCgen INTERFACE) target_compile_options(DISCO_F746NG_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(DISCO_F746NG_usb_HID INTERFACE) target_compile_options(DISCO_F746NG_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(DISCO_F746NG_usb_none INTERFACE) target_compile_options(DISCO_F746NG_usb_none INTERFACE @@ -5506,7 +5506,7 @@ set(DISCO_G0316_MCU cortex-m0plus) set(DISCO_G0316_FPCONF "-") add_library(DISCO_G0316 INTERFACE) target_compile_options(DISCO_G0316 INTERFACE - "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -5551,15 +5551,15 @@ target_compile_options(DISCO_G0316_serial_none INTERFACE ) add_library(DISCO_G0316_usb_CDC INTERFACE) target_compile_options(DISCO_G0316_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(DISCO_G0316_usb_CDCgen INTERFACE) target_compile_options(DISCO_G0316_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(DISCO_G0316_usb_HID INTERFACE) target_compile_options(DISCO_G0316_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(DISCO_G0316_usb_none INTERFACE) target_compile_options(DISCO_G0316_usb_none INTERFACE @@ -5588,7 +5588,7 @@ set(DIYMORE_F407VGT_MCU cortex-m4) set(DIYMORE_F407VGT_FPCONF "-") add_library(DIYMORE_F407VGT INTERFACE) target_compile_options(DIYMORE_F407VGT INTERFACE - "SHELL:-DSTM32F407xx " + "SHELL:-DSTM32F407xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -5633,15 +5633,15 @@ target_compile_options(DIYMORE_F407VGT_serial_none INTERFACE ) add_library(DIYMORE_F407VGT_usb_CDC INTERFACE) target_compile_options(DIYMORE_F407VGT_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(DIYMORE_F407VGT_usb_CDCgen INTERFACE) target_compile_options(DIYMORE_F407VGT_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(DIYMORE_F407VGT_usb_HID INTERFACE) target_compile_options(DIYMORE_F407VGT_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(DIYMORE_F407VGT_usb_none INTERFACE) target_compile_options(DIYMORE_F407VGT_usb_none INTERFACE @@ -5670,7 +5670,7 @@ set(DIYMORE_F407VGT_hid_MCU cortex-m4) set(DIYMORE_F407VGT_hid_FPCONF "-") add_library(DIYMORE_F407VGT_hid INTERFACE) target_compile_options(DIYMORE_F407VGT_hid INTERFACE - "SHELL:-DSTM32F407xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F407xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -5712,7 +5712,7 @@ set(EBB42_V1_1_MCU cortex-m0plus) set(EBB42_V1_1_FPCONF "-") add_library(EBB42_V1_1 INTERFACE) target_compile_options(EBB42_V1_1 INTERFACE - "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -5757,11 +5757,11 @@ target_compile_options(EBB42_V1_1_serial_none INTERFACE ) add_library(EBB42_V1_1_usb_CDC INTERFACE) target_compile_options(EBB42_V1_1_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(EBB42_V1_1_usb_CDCgen INTERFACE) target_compile_options(EBB42_V1_1_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(EBB42_V1_1_usb_none INTERFACE) target_compile_options(EBB42_V1_1_usb_none INTERFACE @@ -5790,7 +5790,7 @@ set(EEXTR_F030_V1_MCU cortex-m0) set(EEXTR_F030_V1_FPCONF "-") add_library(EEXTR_F030_V1 INTERFACE) target_compile_options(EEXTR_F030_V1 INTERFACE - "SHELL:-DSTM32F030x8 " + "SHELL:-DSTM32F030x8" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL: " @@ -5835,11 +5835,11 @@ target_compile_options(EEXTR_F030_V1_serial_none INTERFACE ) add_library(EEXTR_F030_V1_usb_CDC INTERFACE) target_compile_options(EEXTR_F030_V1_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(EEXTR_F030_V1_usb_CDCgen INTERFACE) target_compile_options(EEXTR_F030_V1_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(EEXTR_F030_V1_usb_none INTERFACE) target_compile_options(EEXTR_F030_V1_usb_none INTERFACE @@ -5868,7 +5868,7 @@ set(ELEKTOR_F072C8_MCU cortex-m0) set(ELEKTOR_F072C8_FPCONF "-") add_library(ELEKTOR_F072C8 INTERFACE) target_compile_options(ELEKTOR_F072C8 INTERFACE - "SHELL:-DSTM32F072xB " + "SHELL:-DSTM32F072xB" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL: " @@ -5922,7 +5922,7 @@ set(ELEKTOR_F072CB_MCU cortex-m0) set(ELEKTOR_F072CB_FPCONF "-") add_library(ELEKTOR_F072CB INTERFACE) target_compile_options(ELEKTOR_F072CB INTERFACE - "SHELL:-DSTM32F072xB " + "SHELL:-DSTM32F072xB" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL: " @@ -5976,7 +5976,7 @@ set(ELV_BM_TRX1_MCU cortex-m4) set(ELV_BM_TRX1_FPCONF "-") add_library(ELV_BM_TRX1 INTERFACE) target_compile_options(ELV_BM_TRX1 INTERFACE - "SHELL:-DSTM32WLE5xx -DUSE_CM4_STARTUP_FILE " + "SHELL:-DSTM32WLE5xx -DUSE_CM4_STARTUP_FILE" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL: " @@ -6030,7 +6030,7 @@ set(ETHERCAT_DUINO_MCU cortex-m7) set(ETHERCAT_DUINO_FPCONF "fpv4-sp-d16-hard") add_library(ETHERCAT_DUINO INTERFACE) target_compile_options(ETHERCAT_DUINO INTERFACE - "SHELL:-DSTM32F746xx " + "SHELL:-DSTM32F746xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -6075,15 +6075,15 @@ target_compile_options(ETHERCAT_DUINO_serial_none INTERFACE ) add_library(ETHERCAT_DUINO_usb_CDC INTERFACE) target_compile_options(ETHERCAT_DUINO_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(ETHERCAT_DUINO_usb_CDCgen INTERFACE) target_compile_options(ETHERCAT_DUINO_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(ETHERCAT_DUINO_usb_HID INTERFACE) target_compile_options(ETHERCAT_DUINO_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(ETHERCAT_DUINO_usb_none INTERFACE) target_compile_options(ETHERCAT_DUINO_usb_none INTERFACE @@ -6112,7 +6112,7 @@ set(FEATHER_F405_MCU cortex-m4) set(FEATHER_F405_FPCONF "-") add_library(FEATHER_F405 INTERFACE) target_compile_options(FEATHER_F405 INTERFACE - "SHELL:-DSTM32F405xx " + "SHELL:-DSTM32F405xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -6157,15 +6157,15 @@ target_compile_options(FEATHER_F405_serial_none INTERFACE ) add_library(FEATHER_F405_usb_CDC INTERFACE) target_compile_options(FEATHER_F405_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(FEATHER_F405_usb_CDCgen INTERFACE) target_compile_options(FEATHER_F405_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(FEATHER_F405_usb_HID INTERFACE) target_compile_options(FEATHER_F405_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(FEATHER_F405_usb_none INTERFACE) target_compile_options(FEATHER_F405_usb_none INTERFACE @@ -6194,7 +6194,7 @@ set(FEATHER_F405_hid_MCU cortex-m4) set(FEATHER_F405_hid_FPCONF "-") add_library(FEATHER_F405_hid INTERFACE) target_compile_options(FEATHER_F405_hid INTERFACE - "SHELL:-DSTM32F405xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F405xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -6236,7 +6236,7 @@ set(FK407M1_MCU cortex-m4) set(FK407M1_FPCONF "-") add_library(FK407M1 INTERFACE) target_compile_options(FK407M1 INTERFACE - "SHELL:-DSTM32F407xx " + "SHELL:-DSTM32F407xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -6281,15 +6281,15 @@ target_compile_options(FK407M1_serial_none INTERFACE ) add_library(FK407M1_usb_CDC INTERFACE) target_compile_options(FK407M1_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(FK407M1_usb_CDCgen INTERFACE) target_compile_options(FK407M1_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(FK407M1_usb_HID INTERFACE) target_compile_options(FK407M1_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(FK407M1_usb_none INTERFACE) target_compile_options(FK407M1_usb_none INTERFACE @@ -6318,7 +6318,7 @@ set(FK407M1_hid_MCU cortex-m4) set(FK407M1_hid_FPCONF "-") add_library(FK407M1_hid INTERFACE) target_compile_options(FK407M1_hid INTERFACE - "SHELL:-DSTM32F407xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F407xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -6360,7 +6360,7 @@ set(FYSETC_S6_MCU cortex-m4) set(FYSETC_S6_FPCONF "fpv4-sp-d16-hard") add_library(FYSETC_S6 INTERFACE) target_compile_options(FYSETC_S6 INTERFACE - "SHELL:-DSTM32F446xx " + "SHELL:-DSTM32F446xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -6405,11 +6405,11 @@ target_compile_options(FYSETC_S6_serial_none INTERFACE ) add_library(FYSETC_S6_usb_CDC INTERFACE) target_compile_options(FYSETC_S6_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(FYSETC_S6_usb_CDCgen INTERFACE) target_compile_options(FYSETC_S6_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(FYSETC_S6_usb_none INTERFACE) target_compile_options(FYSETC_S6_usb_none INTERFACE @@ -6438,7 +6438,7 @@ set(GENERIC_C011D6YX_MCU cortex-m0plus) set(GENERIC_C011D6YX_FPCONF "-") add_library(GENERIC_C011D6YX INTERFACE) target_compile_options(GENERIC_C011D6YX INTERFACE - "SHELL:-DSTM32C011xx -D__CORTEX_SC=0" + "SHELL:-DSTM32C011xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -6483,15 +6483,15 @@ target_compile_options(GENERIC_C011D6YX_serial_none INTERFACE ) add_library(GENERIC_C011D6YX_usb_CDC INTERFACE) target_compile_options(GENERIC_C011D6YX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_C011D6YX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_C011D6YX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_C011D6YX_usb_HID INTERFACE) target_compile_options(GENERIC_C011D6YX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_C011D6YX_usb_none INTERFACE) target_compile_options(GENERIC_C011D6YX_usb_none INTERFACE @@ -6508,7 +6508,7 @@ set(GENERIC_C011F4PX_MCU cortex-m0plus) set(GENERIC_C011F4PX_FPCONF "-") add_library(GENERIC_C011F4PX INTERFACE) target_compile_options(GENERIC_C011F4PX INTERFACE - "SHELL:-DSTM32C011xx -D__CORTEX_SC=0" + "SHELL:-DSTM32C011xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -6553,15 +6553,15 @@ target_compile_options(GENERIC_C011F4PX_serial_none INTERFACE ) add_library(GENERIC_C011F4PX_usb_CDC INTERFACE) target_compile_options(GENERIC_C011F4PX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_C011F4PX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_C011F4PX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_C011F4PX_usb_HID INTERFACE) target_compile_options(GENERIC_C011F4PX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_C011F4PX_usb_none INTERFACE) target_compile_options(GENERIC_C011F4PX_usb_none INTERFACE @@ -6578,7 +6578,7 @@ set(GENERIC_C011F4UX_MCU cortex-m0plus) set(GENERIC_C011F4UX_FPCONF "-") add_library(GENERIC_C011F4UX INTERFACE) target_compile_options(GENERIC_C011F4UX INTERFACE - "SHELL:-DSTM32C011xx -D__CORTEX_SC=0" + "SHELL:-DSTM32C011xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -6623,15 +6623,15 @@ target_compile_options(GENERIC_C011F4UX_serial_none INTERFACE ) add_library(GENERIC_C011F4UX_usb_CDC INTERFACE) target_compile_options(GENERIC_C011F4UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_C011F4UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_C011F4UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_C011F4UX_usb_HID INTERFACE) target_compile_options(GENERIC_C011F4UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_C011F4UX_usb_none INTERFACE) target_compile_options(GENERIC_C011F4UX_usb_none INTERFACE @@ -6648,7 +6648,7 @@ set(GENERIC_C011F6PX_MCU cortex-m0plus) set(GENERIC_C011F6PX_FPCONF "-") add_library(GENERIC_C011F6PX INTERFACE) target_compile_options(GENERIC_C011F6PX INTERFACE - "SHELL:-DSTM32C011xx -D__CORTEX_SC=0" + "SHELL:-DSTM32C011xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -6693,15 +6693,15 @@ target_compile_options(GENERIC_C011F6PX_serial_none INTERFACE ) add_library(GENERIC_C011F6PX_usb_CDC INTERFACE) target_compile_options(GENERIC_C011F6PX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_C011F6PX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_C011F6PX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_C011F6PX_usb_HID INTERFACE) target_compile_options(GENERIC_C011F6PX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_C011F6PX_usb_none INTERFACE) target_compile_options(GENERIC_C011F6PX_usb_none INTERFACE @@ -6718,7 +6718,7 @@ set(GENERIC_C011F6UX_MCU cortex-m0plus) set(GENERIC_C011F6UX_FPCONF "-") add_library(GENERIC_C011F6UX INTERFACE) target_compile_options(GENERIC_C011F6UX INTERFACE - "SHELL:-DSTM32C011xx -D__CORTEX_SC=0" + "SHELL:-DSTM32C011xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -6763,15 +6763,15 @@ target_compile_options(GENERIC_C011F6UX_serial_none INTERFACE ) add_library(GENERIC_C011F6UX_usb_CDC INTERFACE) target_compile_options(GENERIC_C011F6UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_C011F6UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_C011F6UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_C011F6UX_usb_HID INTERFACE) target_compile_options(GENERIC_C011F6UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_C011F6UX_usb_none INTERFACE) target_compile_options(GENERIC_C011F6UX_usb_none INTERFACE @@ -6788,7 +6788,7 @@ set(GENERIC_C011J4MX_MCU cortex-m0plus) set(GENERIC_C011J4MX_FPCONF "-") add_library(GENERIC_C011J4MX INTERFACE) target_compile_options(GENERIC_C011J4MX INTERFACE - "SHELL:-DSTM32C011xx -D__CORTEX_SC=0" + "SHELL:-DSTM32C011xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -6833,15 +6833,15 @@ target_compile_options(GENERIC_C011J4MX_serial_none INTERFACE ) add_library(GENERIC_C011J4MX_usb_CDC INTERFACE) target_compile_options(GENERIC_C011J4MX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_C011J4MX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_C011J4MX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_C011J4MX_usb_HID INTERFACE) target_compile_options(GENERIC_C011J4MX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_C011J4MX_usb_none INTERFACE) target_compile_options(GENERIC_C011J4MX_usb_none INTERFACE @@ -6858,7 +6858,7 @@ set(GENERIC_C011J6MX_MCU cortex-m0plus) set(GENERIC_C011J6MX_FPCONF "-") add_library(GENERIC_C011J6MX INTERFACE) target_compile_options(GENERIC_C011J6MX INTERFACE - "SHELL:-DSTM32C011xx -D__CORTEX_SC=0" + "SHELL:-DSTM32C011xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -6903,15 +6903,15 @@ target_compile_options(GENERIC_C011J6MX_serial_none INTERFACE ) add_library(GENERIC_C011J6MX_usb_CDC INTERFACE) target_compile_options(GENERIC_C011J6MX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_C011J6MX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_C011J6MX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_C011J6MX_usb_HID INTERFACE) target_compile_options(GENERIC_C011J6MX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_C011J6MX_usb_none INTERFACE) target_compile_options(GENERIC_C011J6MX_usb_none INTERFACE @@ -6928,7 +6928,7 @@ set(GENERIC_C031C4TX_MCU cortex-m0plus) set(GENERIC_C031C4TX_FPCONF "-") add_library(GENERIC_C031C4TX INTERFACE) target_compile_options(GENERIC_C031C4TX INTERFACE - "SHELL:-DSTM32C031xx -D__CORTEX_SC=0" + "SHELL:-DSTM32C031xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -6973,15 +6973,15 @@ target_compile_options(GENERIC_C031C4TX_serial_none INTERFACE ) add_library(GENERIC_C031C4TX_usb_CDC INTERFACE) target_compile_options(GENERIC_C031C4TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_C031C4TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_C031C4TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_C031C4TX_usb_HID INTERFACE) target_compile_options(GENERIC_C031C4TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_C031C4TX_usb_none INTERFACE) target_compile_options(GENERIC_C031C4TX_usb_none INTERFACE @@ -6998,7 +6998,7 @@ set(GENERIC_C031C4UX_MCU cortex-m0plus) set(GENERIC_C031C4UX_FPCONF "-") add_library(GENERIC_C031C4UX INTERFACE) target_compile_options(GENERIC_C031C4UX INTERFACE - "SHELL:-DSTM32C031xx -D__CORTEX_SC=0" + "SHELL:-DSTM32C031xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -7043,15 +7043,15 @@ target_compile_options(GENERIC_C031C4UX_serial_none INTERFACE ) add_library(GENERIC_C031C4UX_usb_CDC INTERFACE) target_compile_options(GENERIC_C031C4UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_C031C4UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_C031C4UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_C031C4UX_usb_HID INTERFACE) target_compile_options(GENERIC_C031C4UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_C031C4UX_usb_none INTERFACE) target_compile_options(GENERIC_C031C4UX_usb_none INTERFACE @@ -7068,7 +7068,7 @@ set(GENERIC_C031C6TX_MCU cortex-m0plus) set(GENERIC_C031C6TX_FPCONF "-") add_library(GENERIC_C031C6TX INTERFACE) target_compile_options(GENERIC_C031C6TX INTERFACE - "SHELL:-DSTM32C031xx -D__CORTEX_SC=0" + "SHELL:-DSTM32C031xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -7113,15 +7113,15 @@ target_compile_options(GENERIC_C031C6TX_serial_none INTERFACE ) add_library(GENERIC_C031C6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_C031C6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_C031C6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_C031C6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_C031C6TX_usb_HID INTERFACE) target_compile_options(GENERIC_C031C6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_C031C6TX_usb_none INTERFACE) target_compile_options(GENERIC_C031C6TX_usb_none INTERFACE @@ -7138,7 +7138,7 @@ set(GENERIC_C031C6UX_MCU cortex-m0plus) set(GENERIC_C031C6UX_FPCONF "-") add_library(GENERIC_C031C6UX INTERFACE) target_compile_options(GENERIC_C031C6UX INTERFACE - "SHELL:-DSTM32C031xx -D__CORTEX_SC=0" + "SHELL:-DSTM32C031xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -7183,15 +7183,15 @@ target_compile_options(GENERIC_C031C6UX_serial_none INTERFACE ) add_library(GENERIC_C031C6UX_usb_CDC INTERFACE) target_compile_options(GENERIC_C031C6UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_C031C6UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_C031C6UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_C031C6UX_usb_HID INTERFACE) target_compile_options(GENERIC_C031C6UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_C031C6UX_usb_none INTERFACE) target_compile_options(GENERIC_C031C6UX_usb_none INTERFACE @@ -7208,7 +7208,7 @@ set(GENERIC_C031F4PX_MCU cortex-m0plus) set(GENERIC_C031F4PX_FPCONF "-") add_library(GENERIC_C031F4PX INTERFACE) target_compile_options(GENERIC_C031F4PX INTERFACE - "SHELL:-DSTM32C031xx -D__CORTEX_SC=0" + "SHELL:-DSTM32C031xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -7253,15 +7253,15 @@ target_compile_options(GENERIC_C031F4PX_serial_none INTERFACE ) add_library(GENERIC_C031F4PX_usb_CDC INTERFACE) target_compile_options(GENERIC_C031F4PX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_C031F4PX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_C031F4PX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_C031F4PX_usb_HID INTERFACE) target_compile_options(GENERIC_C031F4PX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_C031F4PX_usb_none INTERFACE) target_compile_options(GENERIC_C031F4PX_usb_none INTERFACE @@ -7278,7 +7278,7 @@ set(GENERIC_C031F6PX_MCU cortex-m0plus) set(GENERIC_C031F6PX_FPCONF "-") add_library(GENERIC_C031F6PX INTERFACE) target_compile_options(GENERIC_C031F6PX INTERFACE - "SHELL:-DSTM32C031xx -D__CORTEX_SC=0" + "SHELL:-DSTM32C031xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -7323,21 +7323,161 @@ target_compile_options(GENERIC_C031F6PX_serial_none INTERFACE ) add_library(GENERIC_C031F6PX_usb_CDC INTERFACE) target_compile_options(GENERIC_C031F6PX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_C031F6PX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_C031F6PX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_C031F6PX_usb_HID INTERFACE) target_compile_options(GENERIC_C031F6PX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_C031F6PX_usb_none INTERFACE) target_compile_options(GENERIC_C031F6PX_usb_none INTERFACE "SHELL:" ) +# GENERIC_C071G8UX +# ----------------------------------------------------------------------------- + +set(GENERIC_C071G8UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32C0xx/C071G(8-B)U") +set(GENERIC_C071G8UX_MAXSIZE 65536) +set(GENERIC_C071G8UX_MAXDATASIZE 24576) +set(GENERIC_C071G8UX_MCU cortex-m0plus) +set(GENERIC_C071G8UX_FPCONF "-") +add_library(GENERIC_C071G8UX INTERFACE) +target_compile_options(GENERIC_C071G8UX INTERFACE + "SHELL:-DSTM32C071xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_C071G8UX_MCU} +) +target_compile_definitions(GENERIC_C071G8UX INTERFACE + "STM32C0xx" + "ARDUINO_GENERIC_C071G8UX" + "BOARD_NAME=\"GENERIC_C071G8UX\"" + "BOARD_ID=GENERIC_C071G8UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_C071G8UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32C0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32C0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32C0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C0xx/Source/Templates/gcc/ + ${GENERIC_C071G8UX_VARIANT_PATH} +) + +target_link_options(GENERIC_C071G8UX INTERFACE + "LINKER:--default-script=${GENERIC_C071G8UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=24576" + "SHELL: " + -mcpu=${GENERIC_C071G8UX_MCU} +) + +add_library(GENERIC_C071G8UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_C071G8UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_C071G8UX_serial_generic INTERFACE) +target_compile_options(GENERIC_C071G8UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_C071G8UX_serial_none INTERFACE) +target_compile_options(GENERIC_C071G8UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_C071G8UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_C071G8UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_C071G8UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_C071G8UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_C071G8UX_usb_HID INTERFACE) +target_compile_options(GENERIC_C071G8UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_C071G8UX_usb_none INTERFACE) +target_compile_options(GENERIC_C071G8UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_C071GBUX +# ----------------------------------------------------------------------------- + +set(GENERIC_C071GBUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32C0xx/C071G(8-B)U") +set(GENERIC_C071GBUX_MAXSIZE 131072) +set(GENERIC_C071GBUX_MAXDATASIZE 24576) +set(GENERIC_C071GBUX_MCU cortex-m0plus) +set(GENERIC_C071GBUX_FPCONF "-") +add_library(GENERIC_C071GBUX INTERFACE) +target_compile_options(GENERIC_C071GBUX INTERFACE + "SHELL:-DSTM32C071xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_C071GBUX_MCU} +) +target_compile_definitions(GENERIC_C071GBUX INTERFACE + "STM32C0xx" + "ARDUINO_GENERIC_C071GBUX" + "BOARD_NAME=\"GENERIC_C071GBUX\"" + "BOARD_ID=GENERIC_C071GBUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_C071GBUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32C0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32C0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32C0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C0xx/Source/Templates/gcc/ + ${GENERIC_C071GBUX_VARIANT_PATH} +) + +target_link_options(GENERIC_C071GBUX INTERFACE + "LINKER:--default-script=${GENERIC_C071GBUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=24576" + "SHELL: " + -mcpu=${GENERIC_C071GBUX_MCU} +) + +add_library(GENERIC_C071GBUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_C071GBUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_C071GBUX_serial_generic INTERFACE) +target_compile_options(GENERIC_C071GBUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_C071GBUX_serial_none INTERFACE) +target_compile_options(GENERIC_C071GBUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_C071GBUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_C071GBUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_C071GBUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_C071GBUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_C071GBUX_usb_HID INTERFACE) +target_compile_options(GENERIC_C071GBUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_C071GBUX_usb_none INTERFACE) +target_compile_options(GENERIC_C071GBUX_usb_none INTERFACE + "SHELL:" +) + # GENERIC_C071R8TX # ----------------------------------------------------------------------------- @@ -7348,7 +7488,7 @@ set(GENERIC_C071R8TX_MCU cortex-m0plus) set(GENERIC_C071R8TX_FPCONF "-") add_library(GENERIC_C071R8TX INTERFACE) target_compile_options(GENERIC_C071R8TX INTERFACE - "SHELL:-DSTM32C071xx -D__CORTEX_SC=0" + "SHELL:-DSTM32C071xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -7393,15 +7533,15 @@ target_compile_options(GENERIC_C071R8TX_serial_none INTERFACE ) add_library(GENERIC_C071R8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_C071R8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_C071R8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_C071R8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_C071R8TX_usb_HID INTERFACE) target_compile_options(GENERIC_C071R8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_C071R8TX_usb_none INTERFACE) target_compile_options(GENERIC_C071R8TX_usb_none INTERFACE @@ -7418,7 +7558,7 @@ set(GENERIC_C071RBTX_MCU cortex-m0plus) set(GENERIC_C071RBTX_FPCONF "-") add_library(GENERIC_C071RBTX INTERFACE) target_compile_options(GENERIC_C071RBTX INTERFACE - "SHELL:-DSTM32C071xx -D__CORTEX_SC=0" + "SHELL:-DSTM32C071xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -7463,15 +7603,15 @@ target_compile_options(GENERIC_C071RBTX_serial_none INTERFACE ) add_library(GENERIC_C071RBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_C071RBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_C071RBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_C071RBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_C071RBTX_usb_HID INTERFACE) target_compile_options(GENERIC_C071RBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_C071RBTX_usb_none INTERFACE) target_compile_options(GENERIC_C071RBTX_usb_none INTERFACE @@ -7488,7 +7628,7 @@ set(GENERIC_F030C6TX_MCU cortex-m0) set(GENERIC_F030C6TX_FPCONF "-") add_library(GENERIC_F030C6TX INTERFACE) target_compile_options(GENERIC_F030C6TX INTERFACE - "SHELL:-DSTM32F030x6 " + "SHELL:-DSTM32F030x6" "SHELL:" "SHELL:" "SHELL: " @@ -7533,15 +7673,15 @@ target_compile_options(GENERIC_F030C6TX_serial_none INTERFACE ) add_library(GENERIC_F030C6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F030C6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F030C6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F030C6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F030C6TX_usb_HID INTERFACE) target_compile_options(GENERIC_F030C6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F030C6TX_usb_none INTERFACE) target_compile_options(GENERIC_F030C6TX_usb_none INTERFACE @@ -7558,7 +7698,7 @@ set(GENERIC_F030C8TX_MCU cortex-m0) set(GENERIC_F030C8TX_FPCONF "-") add_library(GENERIC_F030C8TX INTERFACE) target_compile_options(GENERIC_F030C8TX INTERFACE - "SHELL:-DSTM32F030x8 " + "SHELL:-DSTM32F030x8" "SHELL:" "SHELL:" "SHELL: " @@ -7603,15 +7743,15 @@ target_compile_options(GENERIC_F030C8TX_serial_none INTERFACE ) add_library(GENERIC_F030C8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F030C8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F030C8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F030C8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F030C8TX_usb_HID INTERFACE) target_compile_options(GENERIC_F030C8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F030C8TX_usb_none INTERFACE) target_compile_options(GENERIC_F030C8TX_usb_none INTERFACE @@ -7628,7 +7768,7 @@ set(GENERIC_F030F4PX_MCU cortex-m0) set(GENERIC_F030F4PX_FPCONF "-") add_library(GENERIC_F030F4PX INTERFACE) target_compile_options(GENERIC_F030F4PX INTERFACE - "SHELL:-DSTM32F030x6 " + "SHELL:-DSTM32F030x6" "SHELL:" "SHELL:" "SHELL: " @@ -7673,15 +7813,15 @@ target_compile_options(GENERIC_F030F4PX_serial_none INTERFACE ) add_library(GENERIC_F030F4PX_usb_CDC INTERFACE) target_compile_options(GENERIC_F030F4PX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F030F4PX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F030F4PX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F030F4PX_usb_HID INTERFACE) target_compile_options(GENERIC_F030F4PX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F030F4PX_usb_none INTERFACE) target_compile_options(GENERIC_F030F4PX_usb_none INTERFACE @@ -7698,7 +7838,7 @@ set(GENERIC_F030K6TX_MCU cortex-m0) set(GENERIC_F030K6TX_FPCONF "-") add_library(GENERIC_F030K6TX INTERFACE) target_compile_options(GENERIC_F030K6TX INTERFACE - "SHELL:-DSTM32F030x6 " + "SHELL:-DSTM32F030x6" "SHELL:" "SHELL:" "SHELL: " @@ -7743,15 +7883,15 @@ target_compile_options(GENERIC_F030K6TX_serial_none INTERFACE ) add_library(GENERIC_F030K6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F030K6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F030K6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F030K6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F030K6TX_usb_HID INTERFACE) target_compile_options(GENERIC_F030K6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F030K6TX_usb_none INTERFACE) target_compile_options(GENERIC_F030K6TX_usb_none INTERFACE @@ -7768,7 +7908,7 @@ set(GENERIC_F030R8TX_MCU cortex-m0) set(GENERIC_F030R8TX_FPCONF "-") add_library(GENERIC_F030R8TX INTERFACE) target_compile_options(GENERIC_F030R8TX INTERFACE - "SHELL:-DSTM32F030x8 " + "SHELL:-DSTM32F030x8" "SHELL:" "SHELL:" "SHELL: " @@ -7813,15 +7953,15 @@ target_compile_options(GENERIC_F030R8TX_serial_none INTERFACE ) add_library(GENERIC_F030R8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F030R8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F030R8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F030R8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F030R8TX_usb_HID INTERFACE) target_compile_options(GENERIC_F030R8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F030R8TX_usb_none INTERFACE) target_compile_options(GENERIC_F030R8TX_usb_none INTERFACE @@ -7838,7 +7978,7 @@ set(GENERIC_F031C4TX_MCU cortex-m0) set(GENERIC_F031C4TX_FPCONF "-") add_library(GENERIC_F031C4TX INTERFACE) target_compile_options(GENERIC_F031C4TX INTERFACE - "SHELL:-DSTM32F031x6 " + "SHELL:-DSTM32F031x6" "SHELL:" "SHELL:" "SHELL: " @@ -7883,15 +8023,15 @@ target_compile_options(GENERIC_F031C4TX_serial_none INTERFACE ) add_library(GENERIC_F031C4TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F031C4TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F031C4TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F031C4TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F031C4TX_usb_HID INTERFACE) target_compile_options(GENERIC_F031C4TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F031C4TX_usb_none INTERFACE) target_compile_options(GENERIC_F031C4TX_usb_none INTERFACE @@ -7908,7 +8048,7 @@ set(GENERIC_F031C6TX_MCU cortex-m0) set(GENERIC_F031C6TX_FPCONF "-") add_library(GENERIC_F031C6TX INTERFACE) target_compile_options(GENERIC_F031C6TX INTERFACE - "SHELL:-DSTM32F031x6 " + "SHELL:-DSTM32F031x6" "SHELL:" "SHELL:" "SHELL: " @@ -7953,15 +8093,15 @@ target_compile_options(GENERIC_F031C6TX_serial_none INTERFACE ) add_library(GENERIC_F031C6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F031C6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F031C6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F031C6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F031C6TX_usb_HID INTERFACE) target_compile_options(GENERIC_F031C6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F031C6TX_usb_none INTERFACE) target_compile_options(GENERIC_F031C6TX_usb_none INTERFACE @@ -7978,7 +8118,7 @@ set(GENERIC_F031E6YX_MCU cortex-m0) set(GENERIC_F031E6YX_FPCONF "-") add_library(GENERIC_F031E6YX INTERFACE) target_compile_options(GENERIC_F031E6YX INTERFACE - "SHELL:-DSTM32F031x6 " + "SHELL:-DSTM32F031x6" "SHELL:" "SHELL:" "SHELL: " @@ -8023,15 +8163,15 @@ target_compile_options(GENERIC_F031E6YX_serial_none INTERFACE ) add_library(GENERIC_F031E6YX_usb_CDC INTERFACE) target_compile_options(GENERIC_F031E6YX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F031E6YX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F031E6YX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F031E6YX_usb_HID INTERFACE) target_compile_options(GENERIC_F031E6YX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F031E6YX_usb_none INTERFACE) target_compile_options(GENERIC_F031E6YX_usb_none INTERFACE @@ -8048,7 +8188,7 @@ set(GENERIC_F031F4PX_MCU cortex-m0) set(GENERIC_F031F4PX_FPCONF "-") add_library(GENERIC_F031F4PX INTERFACE) target_compile_options(GENERIC_F031F4PX INTERFACE - "SHELL:-DSTM32F031x6 " + "SHELL:-DSTM32F031x6" "SHELL:" "SHELL:" "SHELL: " @@ -8093,15 +8233,15 @@ target_compile_options(GENERIC_F031F4PX_serial_none INTERFACE ) add_library(GENERIC_F031F4PX_usb_CDC INTERFACE) target_compile_options(GENERIC_F031F4PX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F031F4PX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F031F4PX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F031F4PX_usb_HID INTERFACE) target_compile_options(GENERIC_F031F4PX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F031F4PX_usb_none INTERFACE) target_compile_options(GENERIC_F031F4PX_usb_none INTERFACE @@ -8118,7 +8258,7 @@ set(GENERIC_F031F6PX_MCU cortex-m0) set(GENERIC_F031F6PX_FPCONF "-") add_library(GENERIC_F031F6PX INTERFACE) target_compile_options(GENERIC_F031F6PX INTERFACE - "SHELL:-DSTM32F031x6 " + "SHELL:-DSTM32F031x6" "SHELL:" "SHELL:" "SHELL: " @@ -8163,15 +8303,15 @@ target_compile_options(GENERIC_F031F6PX_serial_none INTERFACE ) add_library(GENERIC_F031F6PX_usb_CDC INTERFACE) target_compile_options(GENERIC_F031F6PX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F031F6PX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F031F6PX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F031F6PX_usb_HID INTERFACE) target_compile_options(GENERIC_F031F6PX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F031F6PX_usb_none INTERFACE) target_compile_options(GENERIC_F031F6PX_usb_none INTERFACE @@ -8188,7 +8328,7 @@ set(GENERIC_F031G4UX_MCU cortex-m0) set(GENERIC_F031G4UX_FPCONF "-") add_library(GENERIC_F031G4UX INTERFACE) target_compile_options(GENERIC_F031G4UX INTERFACE - "SHELL:-DSTM32F031x6 " + "SHELL:-DSTM32F031x6" "SHELL:" "SHELL:" "SHELL: " @@ -8233,15 +8373,15 @@ target_compile_options(GENERIC_F031G4UX_serial_none INTERFACE ) add_library(GENERIC_F031G4UX_usb_CDC INTERFACE) target_compile_options(GENERIC_F031G4UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F031G4UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F031G4UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F031G4UX_usb_HID INTERFACE) target_compile_options(GENERIC_F031G4UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F031G4UX_usb_none INTERFACE) target_compile_options(GENERIC_F031G4UX_usb_none INTERFACE @@ -8258,7 +8398,7 @@ set(GENERIC_F031G6UX_MCU cortex-m0) set(GENERIC_F031G6UX_FPCONF "-") add_library(GENERIC_F031G6UX INTERFACE) target_compile_options(GENERIC_F031G6UX INTERFACE - "SHELL:-DSTM32F031x6 " + "SHELL:-DSTM32F031x6" "SHELL:" "SHELL:" "SHELL: " @@ -8303,15 +8443,15 @@ target_compile_options(GENERIC_F031G6UX_serial_none INTERFACE ) add_library(GENERIC_F031G6UX_usb_CDC INTERFACE) target_compile_options(GENERIC_F031G6UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F031G6UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F031G6UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F031G6UX_usb_HID INTERFACE) target_compile_options(GENERIC_F031G6UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F031G6UX_usb_none INTERFACE) target_compile_options(GENERIC_F031G6UX_usb_none INTERFACE @@ -8328,7 +8468,7 @@ set(GENERIC_F031K4UX_MCU cortex-m0) set(GENERIC_F031K4UX_FPCONF "-") add_library(GENERIC_F031K4UX INTERFACE) target_compile_options(GENERIC_F031K4UX INTERFACE - "SHELL:-DSTM32F031x6 " + "SHELL:-DSTM32F031x6" "SHELL:" "SHELL:" "SHELL: " @@ -8373,15 +8513,15 @@ target_compile_options(GENERIC_F031K4UX_serial_none INTERFACE ) add_library(GENERIC_F031K4UX_usb_CDC INTERFACE) target_compile_options(GENERIC_F031K4UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F031K4UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F031K4UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F031K4UX_usb_HID INTERFACE) target_compile_options(GENERIC_F031K4UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F031K4UX_usb_none INTERFACE) target_compile_options(GENERIC_F031K4UX_usb_none INTERFACE @@ -8398,7 +8538,7 @@ set(GENERIC_F031K6TX_MCU cortex-m0) set(GENERIC_F031K6TX_FPCONF "-") add_library(GENERIC_F031K6TX INTERFACE) target_compile_options(GENERIC_F031K6TX INTERFACE - "SHELL:-DSTM32F031x6 " + "SHELL:-DSTM32F031x6" "SHELL:" "SHELL:" "SHELL: " @@ -8443,15 +8583,15 @@ target_compile_options(GENERIC_F031K6TX_serial_none INTERFACE ) add_library(GENERIC_F031K6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F031K6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F031K6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F031K6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F031K6TX_usb_HID INTERFACE) target_compile_options(GENERIC_F031K6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F031K6TX_usb_none INTERFACE) target_compile_options(GENERIC_F031K6TX_usb_none INTERFACE @@ -8468,7 +8608,7 @@ set(GENERIC_F031K6UX_MCU cortex-m0) set(GENERIC_F031K6UX_FPCONF "-") add_library(GENERIC_F031K6UX INTERFACE) target_compile_options(GENERIC_F031K6UX INTERFACE - "SHELL:-DSTM32F031x6 " + "SHELL:-DSTM32F031x6" "SHELL:" "SHELL:" "SHELL: " @@ -8513,15 +8653,15 @@ target_compile_options(GENERIC_F031K6UX_serial_none INTERFACE ) add_library(GENERIC_F031K6UX_usb_CDC INTERFACE) target_compile_options(GENERIC_F031K6UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F031K6UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F031K6UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F031K6UX_usb_HID INTERFACE) target_compile_options(GENERIC_F031K6UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F031K6UX_usb_none INTERFACE) target_compile_options(GENERIC_F031K6UX_usb_none INTERFACE @@ -8538,7 +8678,7 @@ set(GENERIC_F038C6TX_MCU cortex-m0) set(GENERIC_F038C6TX_FPCONF "-") add_library(GENERIC_F038C6TX INTERFACE) target_compile_options(GENERIC_F038C6TX INTERFACE - "SHELL:-DSTM32F038xx " + "SHELL:-DSTM32F038xx" "SHELL:" "SHELL:" "SHELL: " @@ -8583,15 +8723,15 @@ target_compile_options(GENERIC_F038C6TX_serial_none INTERFACE ) add_library(GENERIC_F038C6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F038C6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F038C6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F038C6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F038C6TX_usb_HID INTERFACE) target_compile_options(GENERIC_F038C6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F038C6TX_usb_none INTERFACE) target_compile_options(GENERIC_F038C6TX_usb_none INTERFACE @@ -8608,7 +8748,7 @@ set(GENERIC_F038E6YX_MCU cortex-m0) set(GENERIC_F038E6YX_FPCONF "-") add_library(GENERIC_F038E6YX INTERFACE) target_compile_options(GENERIC_F038E6YX INTERFACE - "SHELL:-DSTM32F038xx " + "SHELL:-DSTM32F038xx" "SHELL:" "SHELL:" "SHELL: " @@ -8653,15 +8793,15 @@ target_compile_options(GENERIC_F038E6YX_serial_none INTERFACE ) add_library(GENERIC_F038E6YX_usb_CDC INTERFACE) target_compile_options(GENERIC_F038E6YX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F038E6YX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F038E6YX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F038E6YX_usb_HID INTERFACE) target_compile_options(GENERIC_F038E6YX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F038E6YX_usb_none INTERFACE) target_compile_options(GENERIC_F038E6YX_usb_none INTERFACE @@ -8678,7 +8818,7 @@ set(GENERIC_F038F6PX_MCU cortex-m0) set(GENERIC_F038F6PX_FPCONF "-") add_library(GENERIC_F038F6PX INTERFACE) target_compile_options(GENERIC_F038F6PX INTERFACE - "SHELL:-DSTM32F038xx " + "SHELL:-DSTM32F038xx" "SHELL:" "SHELL:" "SHELL: " @@ -8723,15 +8863,15 @@ target_compile_options(GENERIC_F038F6PX_serial_none INTERFACE ) add_library(GENERIC_F038F6PX_usb_CDC INTERFACE) target_compile_options(GENERIC_F038F6PX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F038F6PX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F038F6PX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F038F6PX_usb_HID INTERFACE) target_compile_options(GENERIC_F038F6PX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F038F6PX_usb_none INTERFACE) target_compile_options(GENERIC_F038F6PX_usb_none INTERFACE @@ -8748,7 +8888,7 @@ set(GENERIC_F038G6UX_MCU cortex-m0) set(GENERIC_F038G6UX_FPCONF "-") add_library(GENERIC_F038G6UX INTERFACE) target_compile_options(GENERIC_F038G6UX INTERFACE - "SHELL:-DSTM32F038xx " + "SHELL:-DSTM32F038xx" "SHELL:" "SHELL:" "SHELL: " @@ -8793,15 +8933,15 @@ target_compile_options(GENERIC_F038G6UX_serial_none INTERFACE ) add_library(GENERIC_F038G6UX_usb_CDC INTERFACE) target_compile_options(GENERIC_F038G6UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F038G6UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F038G6UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F038G6UX_usb_HID INTERFACE) target_compile_options(GENERIC_F038G6UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F038G6UX_usb_none INTERFACE) target_compile_options(GENERIC_F038G6UX_usb_none INTERFACE @@ -8818,7 +8958,7 @@ set(GENERIC_F038K6UX_MCU cortex-m0) set(GENERIC_F038K6UX_FPCONF "-") add_library(GENERIC_F038K6UX INTERFACE) target_compile_options(GENERIC_F038K6UX INTERFACE - "SHELL:-DSTM32F038xx " + "SHELL:-DSTM32F038xx" "SHELL:" "SHELL:" "SHELL: " @@ -8863,15 +9003,15 @@ target_compile_options(GENERIC_F038K6UX_serial_none INTERFACE ) add_library(GENERIC_F038K6UX_usb_CDC INTERFACE) target_compile_options(GENERIC_F038K6UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F038K6UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F038K6UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F038K6UX_usb_HID INTERFACE) target_compile_options(GENERIC_F038K6UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F038K6UX_usb_none INTERFACE) target_compile_options(GENERIC_F038K6UX_usb_none INTERFACE @@ -8888,7 +9028,7 @@ set(GENERIC_F042C4TX_MCU cortex-m0) set(GENERIC_F042C4TX_FPCONF "-") add_library(GENERIC_F042C4TX INTERFACE) target_compile_options(GENERIC_F042C4TX INTERFACE - "SHELL:-DSTM32F042x6 " + "SHELL:-DSTM32F042x6" "SHELL:" "SHELL:" "SHELL: " @@ -8933,15 +9073,15 @@ target_compile_options(GENERIC_F042C4TX_serial_none INTERFACE ) add_library(GENERIC_F042C4TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F042C4TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F042C4TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F042C4TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F042C4TX_usb_HID INTERFACE) target_compile_options(GENERIC_F042C4TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F042C4TX_usb_none INTERFACE) target_compile_options(GENERIC_F042C4TX_usb_none INTERFACE @@ -8958,7 +9098,7 @@ set(GENERIC_F042C4UX_MCU cortex-m0) set(GENERIC_F042C4UX_FPCONF "-") add_library(GENERIC_F042C4UX INTERFACE) target_compile_options(GENERIC_F042C4UX INTERFACE - "SHELL:-DSTM32F042x6 " + "SHELL:-DSTM32F042x6" "SHELL:" "SHELL:" "SHELL: " @@ -9003,15 +9143,15 @@ target_compile_options(GENERIC_F042C4UX_serial_none INTERFACE ) add_library(GENERIC_F042C4UX_usb_CDC INTERFACE) target_compile_options(GENERIC_F042C4UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F042C4UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F042C4UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F042C4UX_usb_HID INTERFACE) target_compile_options(GENERIC_F042C4UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F042C4UX_usb_none INTERFACE) target_compile_options(GENERIC_F042C4UX_usb_none INTERFACE @@ -9028,7 +9168,7 @@ set(GENERIC_F042C6TX_MCU cortex-m0) set(GENERIC_F042C6TX_FPCONF "-") add_library(GENERIC_F042C6TX INTERFACE) target_compile_options(GENERIC_F042C6TX INTERFACE - "SHELL:-DSTM32F042x6 " + "SHELL:-DSTM32F042x6" "SHELL:" "SHELL:" "SHELL: " @@ -9073,15 +9213,15 @@ target_compile_options(GENERIC_F042C6TX_serial_none INTERFACE ) add_library(GENERIC_F042C6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F042C6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F042C6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F042C6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F042C6TX_usb_HID INTERFACE) target_compile_options(GENERIC_F042C6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F042C6TX_usb_none INTERFACE) target_compile_options(GENERIC_F042C6TX_usb_none INTERFACE @@ -9098,7 +9238,7 @@ set(GENERIC_F042C6UX_MCU cortex-m0) set(GENERIC_F042C6UX_FPCONF "-") add_library(GENERIC_F042C6UX INTERFACE) target_compile_options(GENERIC_F042C6UX INTERFACE - "SHELL:-DSTM32F042x6 " + "SHELL:-DSTM32F042x6" "SHELL:" "SHELL:" "SHELL: " @@ -9143,15 +9283,15 @@ target_compile_options(GENERIC_F042C6UX_serial_none INTERFACE ) add_library(GENERIC_F042C6UX_usb_CDC INTERFACE) target_compile_options(GENERIC_F042C6UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F042C6UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F042C6UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F042C6UX_usb_HID INTERFACE) target_compile_options(GENERIC_F042C6UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F042C6UX_usb_none INTERFACE) target_compile_options(GENERIC_F042C6UX_usb_none INTERFACE @@ -9168,7 +9308,7 @@ set(GENERIC_F042F4PX_MCU cortex-m0) set(GENERIC_F042F4PX_FPCONF "-") add_library(GENERIC_F042F4PX INTERFACE) target_compile_options(GENERIC_F042F4PX INTERFACE - "SHELL:-DSTM32F042x6 " + "SHELL:-DSTM32F042x6" "SHELL:" "SHELL:" "SHELL: " @@ -9213,15 +9353,15 @@ target_compile_options(GENERIC_F042F4PX_serial_none INTERFACE ) add_library(GENERIC_F042F4PX_usb_CDC INTERFACE) target_compile_options(GENERIC_F042F4PX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F042F4PX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F042F4PX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F042F4PX_usb_HID INTERFACE) target_compile_options(GENERIC_F042F4PX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F042F4PX_usb_none INTERFACE) target_compile_options(GENERIC_F042F4PX_usb_none INTERFACE @@ -9238,7 +9378,7 @@ set(GENERIC_F042F6PX_MCU cortex-m0) set(GENERIC_F042F6PX_FPCONF "-") add_library(GENERIC_F042F6PX INTERFACE) target_compile_options(GENERIC_F042F6PX INTERFACE - "SHELL:-DSTM32F042x6 " + "SHELL:-DSTM32F042x6" "SHELL:" "SHELL:" "SHELL: " @@ -9283,15 +9423,15 @@ target_compile_options(GENERIC_F042F6PX_serial_none INTERFACE ) add_library(GENERIC_F042F6PX_usb_CDC INTERFACE) target_compile_options(GENERIC_F042F6PX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F042F6PX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F042F6PX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F042F6PX_usb_HID INTERFACE) target_compile_options(GENERIC_F042F6PX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F042F6PX_usb_none INTERFACE) target_compile_options(GENERIC_F042F6PX_usb_none INTERFACE @@ -9308,7 +9448,7 @@ set(GENERIC_F042G4UX_MCU cortex-m0) set(GENERIC_F042G4UX_FPCONF "-") add_library(GENERIC_F042G4UX INTERFACE) target_compile_options(GENERIC_F042G4UX INTERFACE - "SHELL:-DSTM32F042x6 " + "SHELL:-DSTM32F042x6" "SHELL:" "SHELL:" "SHELL: " @@ -9353,15 +9493,15 @@ target_compile_options(GENERIC_F042G4UX_serial_none INTERFACE ) add_library(GENERIC_F042G4UX_usb_CDC INTERFACE) target_compile_options(GENERIC_F042G4UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F042G4UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F042G4UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F042G4UX_usb_HID INTERFACE) target_compile_options(GENERIC_F042G4UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F042G4UX_usb_none INTERFACE) target_compile_options(GENERIC_F042G4UX_usb_none INTERFACE @@ -9378,7 +9518,7 @@ set(GENERIC_F042G6UX_MCU cortex-m0) set(GENERIC_F042G6UX_FPCONF "-") add_library(GENERIC_F042G6UX INTERFACE) target_compile_options(GENERIC_F042G6UX INTERFACE - "SHELL:-DSTM32F042x6 " + "SHELL:-DSTM32F042x6" "SHELL:" "SHELL:" "SHELL: " @@ -9423,15 +9563,15 @@ target_compile_options(GENERIC_F042G6UX_serial_none INTERFACE ) add_library(GENERIC_F042G6UX_usb_CDC INTERFACE) target_compile_options(GENERIC_F042G6UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F042G6UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F042G6UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F042G6UX_usb_HID INTERFACE) target_compile_options(GENERIC_F042G6UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F042G6UX_usb_none INTERFACE) target_compile_options(GENERIC_F042G6UX_usb_none INTERFACE @@ -9448,7 +9588,7 @@ set(GENERIC_F042K4TX_MCU cortex-m0) set(GENERIC_F042K4TX_FPCONF "-") add_library(GENERIC_F042K4TX INTERFACE) target_compile_options(GENERIC_F042K4TX INTERFACE - "SHELL:-DSTM32F042x6 " + "SHELL:-DSTM32F042x6" "SHELL:" "SHELL:" "SHELL: " @@ -9493,15 +9633,15 @@ target_compile_options(GENERIC_F042K4TX_serial_none INTERFACE ) add_library(GENERIC_F042K4TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F042K4TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F042K4TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F042K4TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F042K4TX_usb_HID INTERFACE) target_compile_options(GENERIC_F042K4TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F042K4TX_usb_none INTERFACE) target_compile_options(GENERIC_F042K4TX_usb_none INTERFACE @@ -9518,7 +9658,7 @@ set(GENERIC_F042K4UX_MCU cortex-m0) set(GENERIC_F042K4UX_FPCONF "-") add_library(GENERIC_F042K4UX INTERFACE) target_compile_options(GENERIC_F042K4UX INTERFACE - "SHELL:-DSTM32F042x6 " + "SHELL:-DSTM32F042x6" "SHELL:" "SHELL:" "SHELL: " @@ -9563,15 +9703,15 @@ target_compile_options(GENERIC_F042K4UX_serial_none INTERFACE ) add_library(GENERIC_F042K4UX_usb_CDC INTERFACE) target_compile_options(GENERIC_F042K4UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F042K4UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F042K4UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F042K4UX_usb_HID INTERFACE) target_compile_options(GENERIC_F042K4UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F042K4UX_usb_none INTERFACE) target_compile_options(GENERIC_F042K4UX_usb_none INTERFACE @@ -9588,7 +9728,7 @@ set(GENERIC_F042K6TX_MCU cortex-m0) set(GENERIC_F042K6TX_FPCONF "-") add_library(GENERIC_F042K6TX INTERFACE) target_compile_options(GENERIC_F042K6TX INTERFACE - "SHELL:-DSTM32F042x6 " + "SHELL:-DSTM32F042x6" "SHELL:" "SHELL:" "SHELL: " @@ -9633,15 +9773,15 @@ target_compile_options(GENERIC_F042K6TX_serial_none INTERFACE ) add_library(GENERIC_F042K6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F042K6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F042K6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F042K6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F042K6TX_usb_HID INTERFACE) target_compile_options(GENERIC_F042K6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F042K6TX_usb_none INTERFACE) target_compile_options(GENERIC_F042K6TX_usb_none INTERFACE @@ -9658,7 +9798,7 @@ set(GENERIC_F042K6UX_MCU cortex-m0) set(GENERIC_F042K6UX_FPCONF "-") add_library(GENERIC_F042K6UX INTERFACE) target_compile_options(GENERIC_F042K6UX INTERFACE - "SHELL:-DSTM32F042x6 " + "SHELL:-DSTM32F042x6" "SHELL:" "SHELL:" "SHELL: " @@ -9703,15 +9843,15 @@ target_compile_options(GENERIC_F042K6UX_serial_none INTERFACE ) add_library(GENERIC_F042K6UX_usb_CDC INTERFACE) target_compile_options(GENERIC_F042K6UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F042K6UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F042K6UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F042K6UX_usb_HID INTERFACE) target_compile_options(GENERIC_F042K6UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F042K6UX_usb_none INTERFACE) target_compile_options(GENERIC_F042K6UX_usb_none INTERFACE @@ -9728,7 +9868,7 @@ set(GENERIC_F042T6YX_MCU cortex-m0) set(GENERIC_F042T6YX_FPCONF "-") add_library(GENERIC_F042T6YX INTERFACE) target_compile_options(GENERIC_F042T6YX INTERFACE - "SHELL:-DSTM32F042x6 " + "SHELL:-DSTM32F042x6" "SHELL:" "SHELL:" "SHELL: " @@ -9773,15 +9913,15 @@ target_compile_options(GENERIC_F042T6YX_serial_none INTERFACE ) add_library(GENERIC_F042T6YX_usb_CDC INTERFACE) target_compile_options(GENERIC_F042T6YX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F042T6YX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F042T6YX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F042T6YX_usb_HID INTERFACE) target_compile_options(GENERIC_F042T6YX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F042T6YX_usb_none INTERFACE) target_compile_options(GENERIC_F042T6YX_usb_none INTERFACE @@ -9798,7 +9938,7 @@ set(GENERIC_F048G6UX_MCU cortex-m0) set(GENERIC_F048G6UX_FPCONF "-") add_library(GENERIC_F048G6UX INTERFACE) target_compile_options(GENERIC_F048G6UX INTERFACE - "SHELL:-DSTM32F048xx " + "SHELL:-DSTM32F048xx" "SHELL:" "SHELL:" "SHELL: " @@ -9843,15 +9983,15 @@ target_compile_options(GENERIC_F048G6UX_serial_none INTERFACE ) add_library(GENERIC_F048G6UX_usb_CDC INTERFACE) target_compile_options(GENERIC_F048G6UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F048G6UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F048G6UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F048G6UX_usb_HID INTERFACE) target_compile_options(GENERIC_F048G6UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F048G6UX_usb_none INTERFACE) target_compile_options(GENERIC_F048G6UX_usb_none INTERFACE @@ -9868,7 +10008,7 @@ set(GENERIC_F048T6YX_MCU cortex-m0) set(GENERIC_F048T6YX_FPCONF "-") add_library(GENERIC_F048T6YX INTERFACE) target_compile_options(GENERIC_F048T6YX INTERFACE - "SHELL:-DSTM32F048xx " + "SHELL:-DSTM32F048xx" "SHELL:" "SHELL:" "SHELL: " @@ -9913,15 +10053,15 @@ target_compile_options(GENERIC_F048T6YX_serial_none INTERFACE ) add_library(GENERIC_F048T6YX_usb_CDC INTERFACE) target_compile_options(GENERIC_F048T6YX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F048T6YX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F048T6YX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F048T6YX_usb_HID INTERFACE) target_compile_options(GENERIC_F048T6YX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F048T6YX_usb_none INTERFACE) target_compile_options(GENERIC_F048T6YX_usb_none INTERFACE @@ -9938,7 +10078,7 @@ set(GENERIC_F051C4TX_MCU cortex-m0) set(GENERIC_F051C4TX_FPCONF "-") add_library(GENERIC_F051C4TX INTERFACE) target_compile_options(GENERIC_F051C4TX INTERFACE - "SHELL:-DSTM32F051x8 " + "SHELL:-DSTM32F051x8" "SHELL:" "SHELL:" "SHELL: " @@ -9983,15 +10123,15 @@ target_compile_options(GENERIC_F051C4TX_serial_none INTERFACE ) add_library(GENERIC_F051C4TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F051C4TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F051C4TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F051C4TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F051C4TX_usb_HID INTERFACE) target_compile_options(GENERIC_F051C4TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F051C4TX_usb_none INTERFACE) target_compile_options(GENERIC_F051C4TX_usb_none INTERFACE @@ -10008,7 +10148,7 @@ set(GENERIC_F051C4UX_MCU cortex-m0) set(GENERIC_F051C4UX_FPCONF "-") add_library(GENERIC_F051C4UX INTERFACE) target_compile_options(GENERIC_F051C4UX INTERFACE - "SHELL:-DSTM32F051x8 " + "SHELL:-DSTM32F051x8" "SHELL:" "SHELL:" "SHELL: " @@ -10053,15 +10193,15 @@ target_compile_options(GENERIC_F051C4UX_serial_none INTERFACE ) add_library(GENERIC_F051C4UX_usb_CDC INTERFACE) target_compile_options(GENERIC_F051C4UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F051C4UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F051C4UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F051C4UX_usb_HID INTERFACE) target_compile_options(GENERIC_F051C4UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F051C4UX_usb_none INTERFACE) target_compile_options(GENERIC_F051C4UX_usb_none INTERFACE @@ -10078,7 +10218,7 @@ set(GENERIC_F051K4TX_MCU cortex-m0) set(GENERIC_F051K4TX_FPCONF "-") add_library(GENERIC_F051K4TX INTERFACE) target_compile_options(GENERIC_F051K4TX INTERFACE - "SHELL:-DSTM32F051x8 " + "SHELL:-DSTM32F051x8" "SHELL:" "SHELL:" "SHELL: " @@ -10123,15 +10263,15 @@ target_compile_options(GENERIC_F051K4TX_serial_none INTERFACE ) add_library(GENERIC_F051K4TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F051K4TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F051K4TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F051K4TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F051K4TX_usb_HID INTERFACE) target_compile_options(GENERIC_F051K4TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F051K4TX_usb_none INTERFACE) target_compile_options(GENERIC_F051K4TX_usb_none INTERFACE @@ -10148,7 +10288,7 @@ set(GENERIC_F051K6UX_MCU cortex-m0) set(GENERIC_F051K6UX_FPCONF "-") add_library(GENERIC_F051K6UX INTERFACE) target_compile_options(GENERIC_F051K6UX INTERFACE - "SHELL:-DSTM32F051x8 " + "SHELL:-DSTM32F051x8" "SHELL:" "SHELL:" "SHELL: " @@ -10193,15 +10333,15 @@ target_compile_options(GENERIC_F051K6UX_serial_none INTERFACE ) add_library(GENERIC_F051K6UX_usb_CDC INTERFACE) target_compile_options(GENERIC_F051K6UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F051K6UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F051K6UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F051K6UX_usb_HID INTERFACE) target_compile_options(GENERIC_F051K6UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F051K6UX_usb_none INTERFACE) target_compile_options(GENERIC_F051K6UX_usb_none INTERFACE @@ -10218,7 +10358,7 @@ set(GENERIC_F051K8UX_MCU cortex-m0) set(GENERIC_F051K8UX_FPCONF "-") add_library(GENERIC_F051K8UX INTERFACE) target_compile_options(GENERIC_F051K8UX INTERFACE - "SHELL:-DSTM32F051x8 " + "SHELL:-DSTM32F051x8" "SHELL:" "SHELL:" "SHELL: " @@ -10263,15 +10403,15 @@ target_compile_options(GENERIC_F051K8UX_serial_none INTERFACE ) add_library(GENERIC_F051K8UX_usb_CDC INTERFACE) target_compile_options(GENERIC_F051K8UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F051K8UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F051K8UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F051K8UX_usb_HID INTERFACE) target_compile_options(GENERIC_F051K8UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F051K8UX_usb_none INTERFACE) target_compile_options(GENERIC_F051K8UX_usb_none INTERFACE @@ -10288,7 +10428,7 @@ set(GENERIC_F051R4TX_MCU cortex-m0) set(GENERIC_F051R4TX_FPCONF "-") add_library(GENERIC_F051R4TX INTERFACE) target_compile_options(GENERIC_F051R4TX INTERFACE - "SHELL:-DSTM32F051x8 " + "SHELL:-DSTM32F051x8" "SHELL:" "SHELL:" "SHELL: " @@ -10333,15 +10473,15 @@ target_compile_options(GENERIC_F051R4TX_serial_none INTERFACE ) add_library(GENERIC_F051R4TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F051R4TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F051R4TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F051R4TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F051R4TX_usb_HID INTERFACE) target_compile_options(GENERIC_F051R4TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F051R4TX_usb_none INTERFACE) target_compile_options(GENERIC_F051R4TX_usb_none INTERFACE @@ -10358,7 +10498,7 @@ set(GENERIC_F051T8YX_MCU cortex-m0) set(GENERIC_F051T8YX_FPCONF "-") add_library(GENERIC_F051T8YX INTERFACE) target_compile_options(GENERIC_F051T8YX INTERFACE - "SHELL:-DSTM32F051x8 " + "SHELL:-DSTM32F051x8" "SHELL:" "SHELL:" "SHELL: " @@ -10403,15 +10543,15 @@ target_compile_options(GENERIC_F051T8YX_serial_none INTERFACE ) add_library(GENERIC_F051T8YX_usb_CDC INTERFACE) target_compile_options(GENERIC_F051T8YX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F051T8YX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F051T8YX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F051T8YX_usb_HID INTERFACE) target_compile_options(GENERIC_F051T8YX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F051T8YX_usb_none INTERFACE) target_compile_options(GENERIC_F051T8YX_usb_none INTERFACE @@ -10428,7 +10568,7 @@ set(GENERIC_F058C8UX_MCU cortex-m0) set(GENERIC_F058C8UX_FPCONF "-") add_library(GENERIC_F058C8UX INTERFACE) target_compile_options(GENERIC_F058C8UX INTERFACE - "SHELL:-DSTM32F058xx " + "SHELL:-DSTM32F058xx" "SHELL:" "SHELL:" "SHELL: " @@ -10473,15 +10613,15 @@ target_compile_options(GENERIC_F058C8UX_serial_none INTERFACE ) add_library(GENERIC_F058C8UX_usb_CDC INTERFACE) target_compile_options(GENERIC_F058C8UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F058C8UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F058C8UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F058C8UX_usb_HID INTERFACE) target_compile_options(GENERIC_F058C8UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F058C8UX_usb_none INTERFACE) target_compile_options(GENERIC_F058C8UX_usb_none INTERFACE @@ -10498,7 +10638,7 @@ set(GENERIC_F058R8HX_MCU cortex-m0) set(GENERIC_F058R8HX_FPCONF "-") add_library(GENERIC_F058R8HX INTERFACE) target_compile_options(GENERIC_F058R8HX INTERFACE - "SHELL:-DSTM32F058xx " + "SHELL:-DSTM32F058xx" "SHELL:" "SHELL:" "SHELL: " @@ -10543,15 +10683,15 @@ target_compile_options(GENERIC_F058R8HX_serial_none INTERFACE ) add_library(GENERIC_F058R8HX_usb_CDC INTERFACE) target_compile_options(GENERIC_F058R8HX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F058R8HX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F058R8HX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F058R8HX_usb_HID INTERFACE) target_compile_options(GENERIC_F058R8HX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F058R8HX_usb_none INTERFACE) target_compile_options(GENERIC_F058R8HX_usb_none INTERFACE @@ -10568,7 +10708,7 @@ set(GENERIC_F058R8TX_MCU cortex-m0) set(GENERIC_F058R8TX_FPCONF "-") add_library(GENERIC_F058R8TX INTERFACE) target_compile_options(GENERIC_F058R8TX INTERFACE - "SHELL:-DSTM32F058xx " + "SHELL:-DSTM32F058xx" "SHELL:" "SHELL:" "SHELL: " @@ -10613,15 +10753,15 @@ target_compile_options(GENERIC_F058R8TX_serial_none INTERFACE ) add_library(GENERIC_F058R8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F058R8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F058R8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F058R8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F058R8TX_usb_HID INTERFACE) target_compile_options(GENERIC_F058R8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F058R8TX_usb_none INTERFACE) target_compile_options(GENERIC_F058R8TX_usb_none INTERFACE @@ -10638,7 +10778,7 @@ set(GENERIC_F058T8YX_MCU cortex-m0) set(GENERIC_F058T8YX_FPCONF "-") add_library(GENERIC_F058T8YX INTERFACE) target_compile_options(GENERIC_F058T8YX INTERFACE - "SHELL:-DSTM32F058xx " + "SHELL:-DSTM32F058xx" "SHELL:" "SHELL:" "SHELL: " @@ -10683,15 +10823,15 @@ target_compile_options(GENERIC_F058T8YX_serial_none INTERFACE ) add_library(GENERIC_F058T8YX_usb_CDC INTERFACE) target_compile_options(GENERIC_F058T8YX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F058T8YX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F058T8YX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F058T8YX_usb_HID INTERFACE) target_compile_options(GENERIC_F058T8YX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F058T8YX_usb_none INTERFACE) target_compile_options(GENERIC_F058T8YX_usb_none INTERFACE @@ -10708,7 +10848,7 @@ set(GENERIC_F070CBTX_MCU cortex-m0) set(GENERIC_F070CBTX_FPCONF "-") add_library(GENERIC_F070CBTX INTERFACE) target_compile_options(GENERIC_F070CBTX INTERFACE - "SHELL:-DSTM32F070xB " + "SHELL:-DSTM32F070xB" "SHELL:" "SHELL:" "SHELL: " @@ -10753,15 +10893,15 @@ target_compile_options(GENERIC_F070CBTX_serial_none INTERFACE ) add_library(GENERIC_F070CBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F070CBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F070CBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F070CBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F070CBTX_usb_HID INTERFACE) target_compile_options(GENERIC_F070CBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F070CBTX_usb_none INTERFACE) target_compile_options(GENERIC_F070CBTX_usb_none INTERFACE @@ -10778,7 +10918,7 @@ set(GENERIC_F070RBTX_MCU cortex-m0) set(GENERIC_F070RBTX_FPCONF "-") add_library(GENERIC_F070RBTX INTERFACE) target_compile_options(GENERIC_F070RBTX INTERFACE - "SHELL:-DSTM32F070xB " + "SHELL:-DSTM32F070xB" "SHELL:" "SHELL:" "SHELL: " @@ -10823,15 +10963,15 @@ target_compile_options(GENERIC_F070RBTX_serial_none INTERFACE ) add_library(GENERIC_F070RBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F070RBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F070RBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F070RBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F070RBTX_usb_HID INTERFACE) target_compile_options(GENERIC_F070RBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F070RBTX_usb_none INTERFACE) target_compile_options(GENERIC_F070RBTX_usb_none INTERFACE @@ -10848,7 +10988,7 @@ set(GENERIC_F071C8TX_MCU cortex-m0) set(GENERIC_F071C8TX_FPCONF "-") add_library(GENERIC_F071C8TX INTERFACE) target_compile_options(GENERIC_F071C8TX INTERFACE - "SHELL:-DSTM32F071xB " + "SHELL:-DSTM32F071xB" "SHELL:" "SHELL:" "SHELL: " @@ -10893,15 +11033,15 @@ target_compile_options(GENERIC_F071C8TX_serial_none INTERFACE ) add_library(GENERIC_F071C8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F071C8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F071C8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F071C8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F071C8TX_usb_HID INTERFACE) target_compile_options(GENERIC_F071C8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F071C8TX_usb_none INTERFACE) target_compile_options(GENERIC_F071C8TX_usb_none INTERFACE @@ -10918,7 +11058,7 @@ set(GENERIC_F071C8UX_MCU cortex-m0) set(GENERIC_F071C8UX_FPCONF "-") add_library(GENERIC_F071C8UX INTERFACE) target_compile_options(GENERIC_F071C8UX INTERFACE - "SHELL:-DSTM32F071xB " + "SHELL:-DSTM32F071xB" "SHELL:" "SHELL:" "SHELL: " @@ -10963,15 +11103,15 @@ target_compile_options(GENERIC_F071C8UX_serial_none INTERFACE ) add_library(GENERIC_F071C8UX_usb_CDC INTERFACE) target_compile_options(GENERIC_F071C8UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F071C8UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F071C8UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F071C8UX_usb_HID INTERFACE) target_compile_options(GENERIC_F071C8UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F071C8UX_usb_none INTERFACE) target_compile_options(GENERIC_F071C8UX_usb_none INTERFACE @@ -10988,7 +11128,7 @@ set(GENERIC_F071CBTX_MCU cortex-m0) set(GENERIC_F071CBTX_FPCONF "-") add_library(GENERIC_F071CBTX INTERFACE) target_compile_options(GENERIC_F071CBTX INTERFACE - "SHELL:-DSTM32F071xB " + "SHELL:-DSTM32F071xB" "SHELL:" "SHELL:" "SHELL: " @@ -11033,15 +11173,15 @@ target_compile_options(GENERIC_F071CBTX_serial_none INTERFACE ) add_library(GENERIC_F071CBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F071CBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F071CBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F071CBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F071CBTX_usb_HID INTERFACE) target_compile_options(GENERIC_F071CBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F071CBTX_usb_none INTERFACE) target_compile_options(GENERIC_F071CBTX_usb_none INTERFACE @@ -11058,7 +11198,7 @@ set(GENERIC_F071CBUX_MCU cortex-m0) set(GENERIC_F071CBUX_FPCONF "-") add_library(GENERIC_F071CBUX INTERFACE) target_compile_options(GENERIC_F071CBUX INTERFACE - "SHELL:-DSTM32F071xB " + "SHELL:-DSTM32F071xB" "SHELL:" "SHELL:" "SHELL: " @@ -11103,15 +11243,15 @@ target_compile_options(GENERIC_F071CBUX_serial_none INTERFACE ) add_library(GENERIC_F071CBUX_usb_CDC INTERFACE) target_compile_options(GENERIC_F071CBUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F071CBUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F071CBUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F071CBUX_usb_HID INTERFACE) target_compile_options(GENERIC_F071CBUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F071CBUX_usb_none INTERFACE) target_compile_options(GENERIC_F071CBUX_usb_none INTERFACE @@ -11128,7 +11268,7 @@ set(GENERIC_F071CBYX_MCU cortex-m0) set(GENERIC_F071CBYX_FPCONF "-") add_library(GENERIC_F071CBYX INTERFACE) target_compile_options(GENERIC_F071CBYX INTERFACE - "SHELL:-DSTM32F071xB " + "SHELL:-DSTM32F071xB" "SHELL:" "SHELL:" "SHELL: " @@ -11173,15 +11313,15 @@ target_compile_options(GENERIC_F071CBYX_serial_none INTERFACE ) add_library(GENERIC_F071CBYX_usb_CDC INTERFACE) target_compile_options(GENERIC_F071CBYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F071CBYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F071CBYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F071CBYX_usb_HID INTERFACE) target_compile_options(GENERIC_F071CBYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F071CBYX_usb_none INTERFACE) target_compile_options(GENERIC_F071CBYX_usb_none INTERFACE @@ -11198,7 +11338,7 @@ set(GENERIC_F071RBTX_MCU cortex-m0) set(GENERIC_F071RBTX_FPCONF "-") add_library(GENERIC_F071RBTX INTERFACE) target_compile_options(GENERIC_F071RBTX INTERFACE - "SHELL:-DSTM32F071xB " + "SHELL:-DSTM32F071xB" "SHELL:" "SHELL:" "SHELL: " @@ -11243,15 +11383,15 @@ target_compile_options(GENERIC_F071RBTX_serial_none INTERFACE ) add_library(GENERIC_F071RBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F071RBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F071RBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F071RBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F071RBTX_usb_HID INTERFACE) target_compile_options(GENERIC_F071RBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F071RBTX_usb_none INTERFACE) target_compile_options(GENERIC_F071RBTX_usb_none INTERFACE @@ -11268,7 +11408,7 @@ set(GENERIC_F071V8HX_MCU cortex-m0) set(GENERIC_F071V8HX_FPCONF "-") add_library(GENERIC_F071V8HX INTERFACE) target_compile_options(GENERIC_F071V8HX INTERFACE - "SHELL:-DSTM32F071xB " + "SHELL:-DSTM32F071xB" "SHELL:" "SHELL:" "SHELL: " @@ -11313,15 +11453,15 @@ target_compile_options(GENERIC_F071V8HX_serial_none INTERFACE ) add_library(GENERIC_F071V8HX_usb_CDC INTERFACE) target_compile_options(GENERIC_F071V8HX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F071V8HX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F071V8HX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F071V8HX_usb_HID INTERFACE) target_compile_options(GENERIC_F071V8HX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F071V8HX_usb_none INTERFACE) target_compile_options(GENERIC_F071V8HX_usb_none INTERFACE @@ -11338,7 +11478,7 @@ set(GENERIC_F071V8TX_MCU cortex-m0) set(GENERIC_F071V8TX_FPCONF "-") add_library(GENERIC_F071V8TX INTERFACE) target_compile_options(GENERIC_F071V8TX INTERFACE - "SHELL:-DSTM32F071xB " + "SHELL:-DSTM32F071xB" "SHELL:" "SHELL:" "SHELL: " @@ -11383,15 +11523,15 @@ target_compile_options(GENERIC_F071V8TX_serial_none INTERFACE ) add_library(GENERIC_F071V8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F071V8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F071V8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F071V8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F071V8TX_usb_HID INTERFACE) target_compile_options(GENERIC_F071V8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F071V8TX_usb_none INTERFACE) target_compile_options(GENERIC_F071V8TX_usb_none INTERFACE @@ -11408,7 +11548,7 @@ set(GENERIC_F071VBHX_MCU cortex-m0) set(GENERIC_F071VBHX_FPCONF "-") add_library(GENERIC_F071VBHX INTERFACE) target_compile_options(GENERIC_F071VBHX INTERFACE - "SHELL:-DSTM32F071xB " + "SHELL:-DSTM32F071xB" "SHELL:" "SHELL:" "SHELL: " @@ -11453,15 +11593,15 @@ target_compile_options(GENERIC_F071VBHX_serial_none INTERFACE ) add_library(GENERIC_F071VBHX_usb_CDC INTERFACE) target_compile_options(GENERIC_F071VBHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F071VBHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F071VBHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F071VBHX_usb_HID INTERFACE) target_compile_options(GENERIC_F071VBHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F071VBHX_usb_none INTERFACE) target_compile_options(GENERIC_F071VBHX_usb_none INTERFACE @@ -11478,7 +11618,7 @@ set(GENERIC_F071VBTX_MCU cortex-m0) set(GENERIC_F071VBTX_FPCONF "-") add_library(GENERIC_F071VBTX INTERFACE) target_compile_options(GENERIC_F071VBTX INTERFACE - "SHELL:-DSTM32F071xB " + "SHELL:-DSTM32F071xB" "SHELL:" "SHELL:" "SHELL: " @@ -11523,15 +11663,15 @@ target_compile_options(GENERIC_F071VBTX_serial_none INTERFACE ) add_library(GENERIC_F071VBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F071VBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F071VBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F071VBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F071VBTX_usb_HID INTERFACE) target_compile_options(GENERIC_F071VBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F071VBTX_usb_none INTERFACE) target_compile_options(GENERIC_F071VBTX_usb_none INTERFACE @@ -11548,7 +11688,7 @@ set(GENERIC_F072C8TX_MCU cortex-m0) set(GENERIC_F072C8TX_FPCONF "-") add_library(GENERIC_F072C8TX INTERFACE) target_compile_options(GENERIC_F072C8TX INTERFACE - "SHELL:-DSTM32F072xB " + "SHELL:-DSTM32F072xB" "SHELL:" "SHELL:" "SHELL: " @@ -11593,15 +11733,15 @@ target_compile_options(GENERIC_F072C8TX_serial_none INTERFACE ) add_library(GENERIC_F072C8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F072C8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F072C8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F072C8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F072C8TX_usb_HID INTERFACE) target_compile_options(GENERIC_F072C8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F072C8TX_usb_none INTERFACE) target_compile_options(GENERIC_F072C8TX_usb_none INTERFACE @@ -11618,7 +11758,7 @@ set(GENERIC_F072C8UX_MCU cortex-m0) set(GENERIC_F072C8UX_FPCONF "-") add_library(GENERIC_F072C8UX INTERFACE) target_compile_options(GENERIC_F072C8UX INTERFACE - "SHELL:-DSTM32F072xB " + "SHELL:-DSTM32F072xB" "SHELL:" "SHELL:" "SHELL: " @@ -11663,15 +11803,15 @@ target_compile_options(GENERIC_F072C8UX_serial_none INTERFACE ) add_library(GENERIC_F072C8UX_usb_CDC INTERFACE) target_compile_options(GENERIC_F072C8UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F072C8UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F072C8UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F072C8UX_usb_HID INTERFACE) target_compile_options(GENERIC_F072C8UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F072C8UX_usb_none INTERFACE) target_compile_options(GENERIC_F072C8UX_usb_none INTERFACE @@ -11688,7 +11828,7 @@ set(GENERIC_F072CBTX_MCU cortex-m0) set(GENERIC_F072CBTX_FPCONF "-") add_library(GENERIC_F072CBTX INTERFACE) target_compile_options(GENERIC_F072CBTX INTERFACE - "SHELL:-DSTM32F072xB " + "SHELL:-DSTM32F072xB" "SHELL:" "SHELL:" "SHELL: " @@ -11733,15 +11873,15 @@ target_compile_options(GENERIC_F072CBTX_serial_none INTERFACE ) add_library(GENERIC_F072CBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F072CBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F072CBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F072CBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F072CBTX_usb_HID INTERFACE) target_compile_options(GENERIC_F072CBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F072CBTX_usb_none INTERFACE) target_compile_options(GENERIC_F072CBTX_usb_none INTERFACE @@ -11758,7 +11898,7 @@ set(GENERIC_F072CBUX_MCU cortex-m0) set(GENERIC_F072CBUX_FPCONF "-") add_library(GENERIC_F072CBUX INTERFACE) target_compile_options(GENERIC_F072CBUX INTERFACE - "SHELL:-DSTM32F072xB " + "SHELL:-DSTM32F072xB" "SHELL:" "SHELL:" "SHELL: " @@ -11803,15 +11943,15 @@ target_compile_options(GENERIC_F072CBUX_serial_none INTERFACE ) add_library(GENERIC_F072CBUX_usb_CDC INTERFACE) target_compile_options(GENERIC_F072CBUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F072CBUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F072CBUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F072CBUX_usb_HID INTERFACE) target_compile_options(GENERIC_F072CBUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F072CBUX_usb_none INTERFACE) target_compile_options(GENERIC_F072CBUX_usb_none INTERFACE @@ -11828,7 +11968,7 @@ set(GENERIC_F072CBYX_MCU cortex-m0) set(GENERIC_F072CBYX_FPCONF "-") add_library(GENERIC_F072CBYX INTERFACE) target_compile_options(GENERIC_F072CBYX INTERFACE - "SHELL:-DSTM32F072xB " + "SHELL:-DSTM32F072xB" "SHELL:" "SHELL:" "SHELL: " @@ -11873,15 +12013,15 @@ target_compile_options(GENERIC_F072CBYX_serial_none INTERFACE ) add_library(GENERIC_F072CBYX_usb_CDC INTERFACE) target_compile_options(GENERIC_F072CBYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F072CBYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F072CBYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F072CBYX_usb_HID INTERFACE) target_compile_options(GENERIC_F072CBYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F072CBYX_usb_none INTERFACE) target_compile_options(GENERIC_F072CBYX_usb_none INTERFACE @@ -11898,7 +12038,7 @@ set(GENERIC_F072R8TX_MCU cortex-m0) set(GENERIC_F072R8TX_FPCONF "-") add_library(GENERIC_F072R8TX INTERFACE) target_compile_options(GENERIC_F072R8TX INTERFACE - "SHELL:-DSTM32F072xB " + "SHELL:-DSTM32F072xB" "SHELL:" "SHELL:" "SHELL: " @@ -11943,15 +12083,15 @@ target_compile_options(GENERIC_F072R8TX_serial_none INTERFACE ) add_library(GENERIC_F072R8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F072R8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F072R8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F072R8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F072R8TX_usb_HID INTERFACE) target_compile_options(GENERIC_F072R8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F072R8TX_usb_none INTERFACE) target_compile_options(GENERIC_F072R8TX_usb_none INTERFACE @@ -11968,7 +12108,7 @@ set(GENERIC_F072RBHX_MCU cortex-m0) set(GENERIC_F072RBHX_FPCONF "-") add_library(GENERIC_F072RBHX INTERFACE) target_compile_options(GENERIC_F072RBHX INTERFACE - "SHELL:-DSTM32F072xB " + "SHELL:-DSTM32F072xB" "SHELL:" "SHELL:" "SHELL: " @@ -12013,15 +12153,15 @@ target_compile_options(GENERIC_F072RBHX_serial_none INTERFACE ) add_library(GENERIC_F072RBHX_usb_CDC INTERFACE) target_compile_options(GENERIC_F072RBHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F072RBHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F072RBHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F072RBHX_usb_HID INTERFACE) target_compile_options(GENERIC_F072RBHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F072RBHX_usb_none INTERFACE) target_compile_options(GENERIC_F072RBHX_usb_none INTERFACE @@ -12038,7 +12178,7 @@ set(GENERIC_F072RBIX_MCU cortex-m0) set(GENERIC_F072RBIX_FPCONF "-") add_library(GENERIC_F072RBIX INTERFACE) target_compile_options(GENERIC_F072RBIX INTERFACE - "SHELL:-DSTM32F072xB " + "SHELL:-DSTM32F072xB" "SHELL:" "SHELL:" "SHELL: " @@ -12083,15 +12223,15 @@ target_compile_options(GENERIC_F072RBIX_serial_none INTERFACE ) add_library(GENERIC_F072RBIX_usb_CDC INTERFACE) target_compile_options(GENERIC_F072RBIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F072RBIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F072RBIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F072RBIX_usb_HID INTERFACE) target_compile_options(GENERIC_F072RBIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F072RBIX_usb_none INTERFACE) target_compile_options(GENERIC_F072RBIX_usb_none INTERFACE @@ -12108,7 +12248,7 @@ set(GENERIC_F072RBTX_MCU cortex-m0) set(GENERIC_F072RBTX_FPCONF "-") add_library(GENERIC_F072RBTX INTERFACE) target_compile_options(GENERIC_F072RBTX INTERFACE - "SHELL:-DSTM32F072xB " + "SHELL:-DSTM32F072xB" "SHELL:" "SHELL:" "SHELL: " @@ -12153,15 +12293,15 @@ target_compile_options(GENERIC_F072RBTX_serial_none INTERFACE ) add_library(GENERIC_F072RBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F072RBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F072RBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F072RBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F072RBTX_usb_HID INTERFACE) target_compile_options(GENERIC_F072RBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F072RBTX_usb_none INTERFACE) target_compile_options(GENERIC_F072RBTX_usb_none INTERFACE @@ -12178,7 +12318,7 @@ set(GENERIC_F072V8HX_MCU cortex-m0) set(GENERIC_F072V8HX_FPCONF "-") add_library(GENERIC_F072V8HX INTERFACE) target_compile_options(GENERIC_F072V8HX INTERFACE - "SHELL:-DSTM32F072xB " + "SHELL:-DSTM32F072xB" "SHELL:" "SHELL:" "SHELL: " @@ -12223,15 +12363,15 @@ target_compile_options(GENERIC_F072V8HX_serial_none INTERFACE ) add_library(GENERIC_F072V8HX_usb_CDC INTERFACE) target_compile_options(GENERIC_F072V8HX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F072V8HX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F072V8HX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F072V8HX_usb_HID INTERFACE) target_compile_options(GENERIC_F072V8HX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F072V8HX_usb_none INTERFACE) target_compile_options(GENERIC_F072V8HX_usb_none INTERFACE @@ -12248,7 +12388,7 @@ set(GENERIC_F072V8TX_MCU cortex-m0) set(GENERIC_F072V8TX_FPCONF "-") add_library(GENERIC_F072V8TX INTERFACE) target_compile_options(GENERIC_F072V8TX INTERFACE - "SHELL:-DSTM32F072xB " + "SHELL:-DSTM32F072xB" "SHELL:" "SHELL:" "SHELL: " @@ -12293,15 +12433,15 @@ target_compile_options(GENERIC_F072V8TX_serial_none INTERFACE ) add_library(GENERIC_F072V8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F072V8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F072V8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F072V8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F072V8TX_usb_HID INTERFACE) target_compile_options(GENERIC_F072V8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F072V8TX_usb_none INTERFACE) target_compile_options(GENERIC_F072V8TX_usb_none INTERFACE @@ -12318,7 +12458,7 @@ set(GENERIC_F072VBHX_MCU cortex-m0) set(GENERIC_F072VBHX_FPCONF "-") add_library(GENERIC_F072VBHX INTERFACE) target_compile_options(GENERIC_F072VBHX INTERFACE - "SHELL:-DSTM32F072xB " + "SHELL:-DSTM32F072xB" "SHELL:" "SHELL:" "SHELL: " @@ -12363,15 +12503,15 @@ target_compile_options(GENERIC_F072VBHX_serial_none INTERFACE ) add_library(GENERIC_F072VBHX_usb_CDC INTERFACE) target_compile_options(GENERIC_F072VBHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F072VBHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F072VBHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F072VBHX_usb_HID INTERFACE) target_compile_options(GENERIC_F072VBHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F072VBHX_usb_none INTERFACE) target_compile_options(GENERIC_F072VBHX_usb_none INTERFACE @@ -12388,7 +12528,7 @@ set(GENERIC_F072VBTX_MCU cortex-m0) set(GENERIC_F072VBTX_FPCONF "-") add_library(GENERIC_F072VBTX INTERFACE) target_compile_options(GENERIC_F072VBTX INTERFACE - "SHELL:-DSTM32F072xB " + "SHELL:-DSTM32F072xB" "SHELL:" "SHELL:" "SHELL: " @@ -12433,15 +12573,15 @@ target_compile_options(GENERIC_F072VBTX_serial_none INTERFACE ) add_library(GENERIC_F072VBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F072VBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F072VBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F072VBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F072VBTX_usb_HID INTERFACE) target_compile_options(GENERIC_F072VBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F072VBTX_usb_none INTERFACE) target_compile_options(GENERIC_F072VBTX_usb_none INTERFACE @@ -12458,7 +12598,7 @@ set(GENERIC_F078CBTX_MCU cortex-m0) set(GENERIC_F078CBTX_FPCONF "-") add_library(GENERIC_F078CBTX INTERFACE) target_compile_options(GENERIC_F078CBTX INTERFACE - "SHELL:-DSTM32F078xx " + "SHELL:-DSTM32F078xx" "SHELL:" "SHELL:" "SHELL: " @@ -12503,15 +12643,15 @@ target_compile_options(GENERIC_F078CBTX_serial_none INTERFACE ) add_library(GENERIC_F078CBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F078CBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F078CBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F078CBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F078CBTX_usb_HID INTERFACE) target_compile_options(GENERIC_F078CBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F078CBTX_usb_none INTERFACE) target_compile_options(GENERIC_F078CBTX_usb_none INTERFACE @@ -12528,7 +12668,7 @@ set(GENERIC_F078CBUX_MCU cortex-m0) set(GENERIC_F078CBUX_FPCONF "-") add_library(GENERIC_F078CBUX INTERFACE) target_compile_options(GENERIC_F078CBUX INTERFACE - "SHELL:-DSTM32F078xx " + "SHELL:-DSTM32F078xx" "SHELL:" "SHELL:" "SHELL: " @@ -12573,15 +12713,15 @@ target_compile_options(GENERIC_F078CBUX_serial_none INTERFACE ) add_library(GENERIC_F078CBUX_usb_CDC INTERFACE) target_compile_options(GENERIC_F078CBUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F078CBUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F078CBUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F078CBUX_usb_HID INTERFACE) target_compile_options(GENERIC_F078CBUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F078CBUX_usb_none INTERFACE) target_compile_options(GENERIC_F078CBUX_usb_none INTERFACE @@ -12598,7 +12738,7 @@ set(GENERIC_F078CBYX_MCU cortex-m0) set(GENERIC_F078CBYX_FPCONF "-") add_library(GENERIC_F078CBYX INTERFACE) target_compile_options(GENERIC_F078CBYX INTERFACE - "SHELL:-DSTM32F078xx " + "SHELL:-DSTM32F078xx" "SHELL:" "SHELL:" "SHELL: " @@ -12643,15 +12783,15 @@ target_compile_options(GENERIC_F078CBYX_serial_none INTERFACE ) add_library(GENERIC_F078CBYX_usb_CDC INTERFACE) target_compile_options(GENERIC_F078CBYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F078CBYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F078CBYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F078CBYX_usb_HID INTERFACE) target_compile_options(GENERIC_F078CBYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F078CBYX_usb_none INTERFACE) target_compile_options(GENERIC_F078CBYX_usb_none INTERFACE @@ -12668,7 +12808,7 @@ set(GENERIC_F078RBHX_MCU cortex-m0) set(GENERIC_F078RBHX_FPCONF "-") add_library(GENERIC_F078RBHX INTERFACE) target_compile_options(GENERIC_F078RBHX INTERFACE - "SHELL:-DSTM32F078xx " + "SHELL:-DSTM32F078xx" "SHELL:" "SHELL:" "SHELL: " @@ -12713,15 +12853,15 @@ target_compile_options(GENERIC_F078RBHX_serial_none INTERFACE ) add_library(GENERIC_F078RBHX_usb_CDC INTERFACE) target_compile_options(GENERIC_F078RBHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F078RBHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F078RBHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F078RBHX_usb_HID INTERFACE) target_compile_options(GENERIC_F078RBHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F078RBHX_usb_none INTERFACE) target_compile_options(GENERIC_F078RBHX_usb_none INTERFACE @@ -12738,7 +12878,7 @@ set(GENERIC_F078RBTX_MCU cortex-m0) set(GENERIC_F078RBTX_FPCONF "-") add_library(GENERIC_F078RBTX INTERFACE) target_compile_options(GENERIC_F078RBTX INTERFACE - "SHELL:-DSTM32F078xx " + "SHELL:-DSTM32F078xx" "SHELL:" "SHELL:" "SHELL: " @@ -12783,15 +12923,15 @@ target_compile_options(GENERIC_F078RBTX_serial_none INTERFACE ) add_library(GENERIC_F078RBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F078RBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F078RBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F078RBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F078RBTX_usb_HID INTERFACE) target_compile_options(GENERIC_F078RBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F078RBTX_usb_none INTERFACE) target_compile_options(GENERIC_F078RBTX_usb_none INTERFACE @@ -12808,7 +12948,7 @@ set(GENERIC_F078VBHX_MCU cortex-m0) set(GENERIC_F078VBHX_FPCONF "-") add_library(GENERIC_F078VBHX INTERFACE) target_compile_options(GENERIC_F078VBHX INTERFACE - "SHELL:-DSTM32F078xx " + "SHELL:-DSTM32F078xx" "SHELL:" "SHELL:" "SHELL: " @@ -12853,15 +12993,15 @@ target_compile_options(GENERIC_F078VBHX_serial_none INTERFACE ) add_library(GENERIC_F078VBHX_usb_CDC INTERFACE) target_compile_options(GENERIC_F078VBHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F078VBHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F078VBHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F078VBHX_usb_HID INTERFACE) target_compile_options(GENERIC_F078VBHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F078VBHX_usb_none INTERFACE) target_compile_options(GENERIC_F078VBHX_usb_none INTERFACE @@ -12878,7 +13018,7 @@ set(GENERIC_F078VBTX_MCU cortex-m0) set(GENERIC_F078VBTX_FPCONF "-") add_library(GENERIC_F078VBTX INTERFACE) target_compile_options(GENERIC_F078VBTX INTERFACE - "SHELL:-DSTM32F078xx " + "SHELL:-DSTM32F078xx" "SHELL:" "SHELL:" "SHELL: " @@ -12923,15 +13063,15 @@ target_compile_options(GENERIC_F078VBTX_serial_none INTERFACE ) add_library(GENERIC_F078VBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F078VBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F078VBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F078VBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F078VBTX_usb_HID INTERFACE) target_compile_options(GENERIC_F078VBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F078VBTX_usb_none INTERFACE) target_compile_options(GENERIC_F078VBTX_usb_none INTERFACE @@ -12948,7 +13088,7 @@ set(GENERIC_F091CBTX_MCU cortex-m0) set(GENERIC_F091CBTX_FPCONF "-") add_library(GENERIC_F091CBTX INTERFACE) target_compile_options(GENERIC_F091CBTX INTERFACE - "SHELL:-DSTM32F091xC " + "SHELL:-DSTM32F091xC" "SHELL:" "SHELL:" "SHELL: " @@ -12993,15 +13133,15 @@ target_compile_options(GENERIC_F091CBTX_serial_none INTERFACE ) add_library(GENERIC_F091CBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F091CBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F091CBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F091CBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F091CBTX_usb_HID INTERFACE) target_compile_options(GENERIC_F091CBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F091CBTX_usb_none INTERFACE) target_compile_options(GENERIC_F091CBTX_usb_none INTERFACE @@ -13018,7 +13158,7 @@ set(GENERIC_F091CBUX_MCU cortex-m0) set(GENERIC_F091CBUX_FPCONF "-") add_library(GENERIC_F091CBUX INTERFACE) target_compile_options(GENERIC_F091CBUX INTERFACE - "SHELL:-DSTM32F091xC " + "SHELL:-DSTM32F091xC" "SHELL:" "SHELL:" "SHELL: " @@ -13063,15 +13203,15 @@ target_compile_options(GENERIC_F091CBUX_serial_none INTERFACE ) add_library(GENERIC_F091CBUX_usb_CDC INTERFACE) target_compile_options(GENERIC_F091CBUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F091CBUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F091CBUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F091CBUX_usb_HID INTERFACE) target_compile_options(GENERIC_F091CBUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F091CBUX_usb_none INTERFACE) target_compile_options(GENERIC_F091CBUX_usb_none INTERFACE @@ -13088,7 +13228,7 @@ set(GENERIC_F091CCTX_MCU cortex-m0) set(GENERIC_F091CCTX_FPCONF "-") add_library(GENERIC_F091CCTX INTERFACE) target_compile_options(GENERIC_F091CCTX INTERFACE - "SHELL:-DSTM32F091xC " + "SHELL:-DSTM32F091xC" "SHELL:" "SHELL:" "SHELL: " @@ -13133,15 +13273,15 @@ target_compile_options(GENERIC_F091CCTX_serial_none INTERFACE ) add_library(GENERIC_F091CCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F091CCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F091CCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F091CCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F091CCTX_usb_HID INTERFACE) target_compile_options(GENERIC_F091CCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F091CCTX_usb_none INTERFACE) target_compile_options(GENERIC_F091CCTX_usb_none INTERFACE @@ -13158,7 +13298,7 @@ set(GENERIC_F091CCUX_MCU cortex-m0) set(GENERIC_F091CCUX_FPCONF "-") add_library(GENERIC_F091CCUX INTERFACE) target_compile_options(GENERIC_F091CCUX INTERFACE - "SHELL:-DSTM32F091xC " + "SHELL:-DSTM32F091xC" "SHELL:" "SHELL:" "SHELL: " @@ -13203,15 +13343,15 @@ target_compile_options(GENERIC_F091CCUX_serial_none INTERFACE ) add_library(GENERIC_F091CCUX_usb_CDC INTERFACE) target_compile_options(GENERIC_F091CCUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F091CCUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F091CCUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F091CCUX_usb_HID INTERFACE) target_compile_options(GENERIC_F091CCUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F091CCUX_usb_none INTERFACE) target_compile_options(GENERIC_F091CCUX_usb_none INTERFACE @@ -13228,7 +13368,7 @@ set(GENERIC_F091RBTX_MCU cortex-m0) set(GENERIC_F091RBTX_FPCONF "-") add_library(GENERIC_F091RBTX INTERFACE) target_compile_options(GENERIC_F091RBTX INTERFACE - "SHELL:-DSTM32F091xC " + "SHELL:-DSTM32F091xC" "SHELL:" "SHELL:" "SHELL: " @@ -13273,15 +13413,15 @@ target_compile_options(GENERIC_F091RBTX_serial_none INTERFACE ) add_library(GENERIC_F091RBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F091RBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F091RBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F091RBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F091RBTX_usb_HID INTERFACE) target_compile_options(GENERIC_F091RBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F091RBTX_usb_none INTERFACE) target_compile_options(GENERIC_F091RBTX_usb_none INTERFACE @@ -13298,7 +13438,7 @@ set(GENERIC_F091RCHX_MCU cortex-m0) set(GENERIC_F091RCHX_FPCONF "-") add_library(GENERIC_F091RCHX INTERFACE) target_compile_options(GENERIC_F091RCHX INTERFACE - "SHELL:-DSTM32F091xC " + "SHELL:-DSTM32F091xC" "SHELL:" "SHELL:" "SHELL: " @@ -13343,15 +13483,15 @@ target_compile_options(GENERIC_F091RCHX_serial_none INTERFACE ) add_library(GENERIC_F091RCHX_usb_CDC INTERFACE) target_compile_options(GENERIC_F091RCHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F091RCHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F091RCHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F091RCHX_usb_HID INTERFACE) target_compile_options(GENERIC_F091RCHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F091RCHX_usb_none INTERFACE) target_compile_options(GENERIC_F091RCHX_usb_none INTERFACE @@ -13368,7 +13508,7 @@ set(GENERIC_F091RCTX_MCU cortex-m0) set(GENERIC_F091RCTX_FPCONF "-") add_library(GENERIC_F091RCTX INTERFACE) target_compile_options(GENERIC_F091RCTX INTERFACE - "SHELL:-DSTM32F091xC " + "SHELL:-DSTM32F091xC" "SHELL:" "SHELL:" "SHELL: " @@ -13413,15 +13553,15 @@ target_compile_options(GENERIC_F091RCTX_serial_none INTERFACE ) add_library(GENERIC_F091RCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F091RCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F091RCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F091RCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F091RCTX_usb_HID INTERFACE) target_compile_options(GENERIC_F091RCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F091RCTX_usb_none INTERFACE) target_compile_options(GENERIC_F091RCTX_usb_none INTERFACE @@ -13438,7 +13578,7 @@ set(GENERIC_F091RCYX_MCU cortex-m0) set(GENERIC_F091RCYX_FPCONF "-") add_library(GENERIC_F091RCYX INTERFACE) target_compile_options(GENERIC_F091RCYX INTERFACE - "SHELL:-DSTM32F091xC " + "SHELL:-DSTM32F091xC" "SHELL:" "SHELL:" "SHELL: " @@ -13483,15 +13623,15 @@ target_compile_options(GENERIC_F091RCYX_serial_none INTERFACE ) add_library(GENERIC_F091RCYX_usb_CDC INTERFACE) target_compile_options(GENERIC_F091RCYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F091RCYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F091RCYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F091RCYX_usb_HID INTERFACE) target_compile_options(GENERIC_F091RCYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F091RCYX_usb_none INTERFACE) target_compile_options(GENERIC_F091RCYX_usb_none INTERFACE @@ -13508,7 +13648,7 @@ set(GENERIC_F091VBTX_MCU cortex-m0) set(GENERIC_F091VBTX_FPCONF "-") add_library(GENERIC_F091VBTX INTERFACE) target_compile_options(GENERIC_F091VBTX INTERFACE - "SHELL:-DSTM32F091xC " + "SHELL:-DSTM32F091xC" "SHELL:" "SHELL:" "SHELL: " @@ -13553,15 +13693,15 @@ target_compile_options(GENERIC_F091VBTX_serial_none INTERFACE ) add_library(GENERIC_F091VBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F091VBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F091VBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F091VBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F091VBTX_usb_HID INTERFACE) target_compile_options(GENERIC_F091VBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F091VBTX_usb_none INTERFACE) target_compile_options(GENERIC_F091VBTX_usb_none INTERFACE @@ -13578,7 +13718,7 @@ set(GENERIC_F091VCHX_MCU cortex-m0) set(GENERIC_F091VCHX_FPCONF "-") add_library(GENERIC_F091VCHX INTERFACE) target_compile_options(GENERIC_F091VCHX INTERFACE - "SHELL:-DSTM32F091xC " + "SHELL:-DSTM32F091xC" "SHELL:" "SHELL:" "SHELL: " @@ -13623,15 +13763,15 @@ target_compile_options(GENERIC_F091VCHX_serial_none INTERFACE ) add_library(GENERIC_F091VCHX_usb_CDC INTERFACE) target_compile_options(GENERIC_F091VCHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F091VCHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F091VCHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F091VCHX_usb_HID INTERFACE) target_compile_options(GENERIC_F091VCHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F091VCHX_usb_none INTERFACE) target_compile_options(GENERIC_F091VCHX_usb_none INTERFACE @@ -13648,7 +13788,7 @@ set(GENERIC_F091VCTX_MCU cortex-m0) set(GENERIC_F091VCTX_FPCONF "-") add_library(GENERIC_F091VCTX INTERFACE) target_compile_options(GENERIC_F091VCTX INTERFACE - "SHELL:-DSTM32F091xC " + "SHELL:-DSTM32F091xC" "SHELL:" "SHELL:" "SHELL: " @@ -13693,15 +13833,15 @@ target_compile_options(GENERIC_F091VCTX_serial_none INTERFACE ) add_library(GENERIC_F091VCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F091VCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F091VCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F091VCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F091VCTX_usb_HID INTERFACE) target_compile_options(GENERIC_F091VCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F091VCTX_usb_none INTERFACE) target_compile_options(GENERIC_F091VCTX_usb_none INTERFACE @@ -13718,7 +13858,7 @@ set(GENERIC_F098CCTX_MCU cortex-m0) set(GENERIC_F098CCTX_FPCONF "-") add_library(GENERIC_F098CCTX INTERFACE) target_compile_options(GENERIC_F098CCTX INTERFACE - "SHELL:-DSTM32F098xx " + "SHELL:-DSTM32F098xx" "SHELL:" "SHELL:" "SHELL: " @@ -13763,15 +13903,15 @@ target_compile_options(GENERIC_F098CCTX_serial_none INTERFACE ) add_library(GENERIC_F098CCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F098CCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F098CCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F098CCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F098CCTX_usb_HID INTERFACE) target_compile_options(GENERIC_F098CCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F098CCTX_usb_none INTERFACE) target_compile_options(GENERIC_F098CCTX_usb_none INTERFACE @@ -13788,7 +13928,7 @@ set(GENERIC_F098CCUX_MCU cortex-m0) set(GENERIC_F098CCUX_FPCONF "-") add_library(GENERIC_F098CCUX INTERFACE) target_compile_options(GENERIC_F098CCUX INTERFACE - "SHELL:-DSTM32F098xx " + "SHELL:-DSTM32F098xx" "SHELL:" "SHELL:" "SHELL: " @@ -13833,15 +13973,15 @@ target_compile_options(GENERIC_F098CCUX_serial_none INTERFACE ) add_library(GENERIC_F098CCUX_usb_CDC INTERFACE) target_compile_options(GENERIC_F098CCUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F098CCUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F098CCUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F098CCUX_usb_HID INTERFACE) target_compile_options(GENERIC_F098CCUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F098CCUX_usb_none INTERFACE) target_compile_options(GENERIC_F098CCUX_usb_none INTERFACE @@ -13858,7 +13998,7 @@ set(GENERIC_F098RCHX_MCU cortex-m0) set(GENERIC_F098RCHX_FPCONF "-") add_library(GENERIC_F098RCHX INTERFACE) target_compile_options(GENERIC_F098RCHX INTERFACE - "SHELL:-DSTM32F098xx " + "SHELL:-DSTM32F098xx" "SHELL:" "SHELL:" "SHELL: " @@ -13903,15 +14043,15 @@ target_compile_options(GENERIC_F098RCHX_serial_none INTERFACE ) add_library(GENERIC_F098RCHX_usb_CDC INTERFACE) target_compile_options(GENERIC_F098RCHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F098RCHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F098RCHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F098RCHX_usb_HID INTERFACE) target_compile_options(GENERIC_F098RCHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F098RCHX_usb_none INTERFACE) target_compile_options(GENERIC_F098RCHX_usb_none INTERFACE @@ -13928,7 +14068,7 @@ set(GENERIC_F098RCTX_MCU cortex-m0) set(GENERIC_F098RCTX_FPCONF "-") add_library(GENERIC_F098RCTX INTERFACE) target_compile_options(GENERIC_F098RCTX INTERFACE - "SHELL:-DSTM32F098xx " + "SHELL:-DSTM32F098xx" "SHELL:" "SHELL:" "SHELL: " @@ -13973,15 +14113,15 @@ target_compile_options(GENERIC_F098RCTX_serial_none INTERFACE ) add_library(GENERIC_F098RCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F098RCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F098RCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F098RCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F098RCTX_usb_HID INTERFACE) target_compile_options(GENERIC_F098RCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F098RCTX_usb_none INTERFACE) target_compile_options(GENERIC_F098RCTX_usb_none INTERFACE @@ -13998,7 +14138,7 @@ set(GENERIC_F098RCYX_MCU cortex-m0) set(GENERIC_F098RCYX_FPCONF "-") add_library(GENERIC_F098RCYX INTERFACE) target_compile_options(GENERIC_F098RCYX INTERFACE - "SHELL:-DSTM32F098xx " + "SHELL:-DSTM32F098xx" "SHELL:" "SHELL:" "SHELL: " @@ -14043,15 +14183,15 @@ target_compile_options(GENERIC_F098RCYX_serial_none INTERFACE ) add_library(GENERIC_F098RCYX_usb_CDC INTERFACE) target_compile_options(GENERIC_F098RCYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F098RCYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F098RCYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F098RCYX_usb_HID INTERFACE) target_compile_options(GENERIC_F098RCYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F098RCYX_usb_none INTERFACE) target_compile_options(GENERIC_F098RCYX_usb_none INTERFACE @@ -14068,7 +14208,7 @@ set(GENERIC_F098VCHX_MCU cortex-m0) set(GENERIC_F098VCHX_FPCONF "-") add_library(GENERIC_F098VCHX INTERFACE) target_compile_options(GENERIC_F098VCHX INTERFACE - "SHELL:-DSTM32F098xx " + "SHELL:-DSTM32F098xx" "SHELL:" "SHELL:" "SHELL: " @@ -14113,15 +14253,15 @@ target_compile_options(GENERIC_F098VCHX_serial_none INTERFACE ) add_library(GENERIC_F098VCHX_usb_CDC INTERFACE) target_compile_options(GENERIC_F098VCHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F098VCHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F098VCHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F098VCHX_usb_HID INTERFACE) target_compile_options(GENERIC_F098VCHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F098VCHX_usb_none INTERFACE) target_compile_options(GENERIC_F098VCHX_usb_none INTERFACE @@ -14138,7 +14278,7 @@ set(GENERIC_F098VCTX_MCU cortex-m0) set(GENERIC_F098VCTX_FPCONF "-") add_library(GENERIC_F098VCTX INTERFACE) target_compile_options(GENERIC_F098VCTX INTERFACE - "SHELL:-DSTM32F098xx " + "SHELL:-DSTM32F098xx" "SHELL:" "SHELL:" "SHELL: " @@ -14183,15 +14323,15 @@ target_compile_options(GENERIC_F098VCTX_serial_none INTERFACE ) add_library(GENERIC_F098VCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F098VCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F098VCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F098VCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F098VCTX_usb_HID INTERFACE) target_compile_options(GENERIC_F098VCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F098VCTX_usb_none INTERFACE) target_compile_options(GENERIC_F098VCTX_usb_none INTERFACE @@ -14208,7 +14348,7 @@ set(GENERIC_F100C4TX_MCU cortex-m3) set(GENERIC_F100C4TX_FPCONF "-") add_library(GENERIC_F100C4TX INTERFACE) target_compile_options(GENERIC_F100C4TX INTERFACE - "SHELL:-DSTM32F100xB " + "SHELL:-DSTM32F100xB" "SHELL:" "SHELL:" "SHELL: " @@ -14253,15 +14393,15 @@ target_compile_options(GENERIC_F100C4TX_serial_none INTERFACE ) add_library(GENERIC_F100C4TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F100C4TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F100C4TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F100C4TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F100C4TX_usb_HID INTERFACE) target_compile_options(GENERIC_F100C4TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F100C4TX_usb_none INTERFACE) target_compile_options(GENERIC_F100C4TX_usb_none INTERFACE @@ -14290,7 +14430,7 @@ set(GENERIC_F100C4TX_dfu2_MCU cortex-m3) set(GENERIC_F100C4TX_dfu2_FPCONF "-") add_library(GENERIC_F100C4TX_dfu2 INTERFACE) target_compile_options(GENERIC_F100C4TX_dfu2 INTERFACE - "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -14332,7 +14472,7 @@ set(GENERIC_F100C4TX_dfuo_MCU cortex-m3) set(GENERIC_F100C4TX_dfuo_FPCONF "-") add_library(GENERIC_F100C4TX_dfuo INTERFACE) target_compile_options(GENERIC_F100C4TX_dfuo INTERFACE - "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -14374,7 +14514,7 @@ set(GENERIC_F100C4TX_hid_MCU cortex-m3) set(GENERIC_F100C4TX_hid_FPCONF "-") add_library(GENERIC_F100C4TX_hid INTERFACE) target_compile_options(GENERIC_F100C4TX_hid INTERFACE - "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -14416,7 +14556,7 @@ set(GENERIC_F100C6TX_MCU cortex-m3) set(GENERIC_F100C6TX_FPCONF "-") add_library(GENERIC_F100C6TX INTERFACE) target_compile_options(GENERIC_F100C6TX INTERFACE - "SHELL:-DSTM32F100xB " + "SHELL:-DSTM32F100xB" "SHELL:" "SHELL:" "SHELL: " @@ -14461,15 +14601,15 @@ target_compile_options(GENERIC_F100C6TX_serial_none INTERFACE ) add_library(GENERIC_F100C6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F100C6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F100C6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F100C6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F100C6TX_usb_HID INTERFACE) target_compile_options(GENERIC_F100C6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F100C6TX_usb_none INTERFACE) target_compile_options(GENERIC_F100C6TX_usb_none INTERFACE @@ -14498,7 +14638,7 @@ set(GENERIC_F100C6TX_dfu2_MCU cortex-m3) set(GENERIC_F100C6TX_dfu2_FPCONF "-") add_library(GENERIC_F100C6TX_dfu2 INTERFACE) target_compile_options(GENERIC_F100C6TX_dfu2 INTERFACE - "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -14540,7 +14680,7 @@ set(GENERIC_F100C6TX_dfuo_MCU cortex-m3) set(GENERIC_F100C6TX_dfuo_FPCONF "-") add_library(GENERIC_F100C6TX_dfuo INTERFACE) target_compile_options(GENERIC_F100C6TX_dfuo INTERFACE - "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -14582,7 +14722,7 @@ set(GENERIC_F100C6TX_hid_MCU cortex-m3) set(GENERIC_F100C6TX_hid_FPCONF "-") add_library(GENERIC_F100C6TX_hid INTERFACE) target_compile_options(GENERIC_F100C6TX_hid INTERFACE - "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -14624,7 +14764,7 @@ set(GENERIC_F100C8TX_MCU cortex-m3) set(GENERIC_F100C8TX_FPCONF "-") add_library(GENERIC_F100C8TX INTERFACE) target_compile_options(GENERIC_F100C8TX INTERFACE - "SHELL:-DSTM32F100xB " + "SHELL:-DSTM32F100xB" "SHELL:" "SHELL:" "SHELL: " @@ -14669,15 +14809,15 @@ target_compile_options(GENERIC_F100C8TX_serial_none INTERFACE ) add_library(GENERIC_F100C8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F100C8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F100C8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F100C8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F100C8TX_usb_HID INTERFACE) target_compile_options(GENERIC_F100C8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F100C8TX_usb_none INTERFACE) target_compile_options(GENERIC_F100C8TX_usb_none INTERFACE @@ -14706,7 +14846,7 @@ set(GENERIC_F100C8TX_dfu2_MCU cortex-m3) set(GENERIC_F100C8TX_dfu2_FPCONF "-") add_library(GENERIC_F100C8TX_dfu2 INTERFACE) target_compile_options(GENERIC_F100C8TX_dfu2 INTERFACE - "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -14748,7 +14888,7 @@ set(GENERIC_F100C8TX_dfuo_MCU cortex-m3) set(GENERIC_F100C8TX_dfuo_FPCONF "-") add_library(GENERIC_F100C8TX_dfuo INTERFACE) target_compile_options(GENERIC_F100C8TX_dfuo INTERFACE - "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -14790,7 +14930,7 @@ set(GENERIC_F100C8TX_hid_MCU cortex-m3) set(GENERIC_F100C8TX_hid_FPCONF "-") add_library(GENERIC_F100C8TX_hid INTERFACE) target_compile_options(GENERIC_F100C8TX_hid INTERFACE - "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -14832,7 +14972,7 @@ set(GENERIC_F100CBTX_MCU cortex-m3) set(GENERIC_F100CBTX_FPCONF "-") add_library(GENERIC_F100CBTX INTERFACE) target_compile_options(GENERIC_F100CBTX INTERFACE - "SHELL:-DSTM32F100xB " + "SHELL:-DSTM32F100xB" "SHELL:" "SHELL:" "SHELL: " @@ -14877,15 +15017,15 @@ target_compile_options(GENERIC_F100CBTX_serial_none INTERFACE ) add_library(GENERIC_F100CBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F100CBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F100CBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F100CBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F100CBTX_usb_HID INTERFACE) target_compile_options(GENERIC_F100CBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F100CBTX_usb_none INTERFACE) target_compile_options(GENERIC_F100CBTX_usb_none INTERFACE @@ -14914,7 +15054,7 @@ set(GENERIC_F100CBTX_dfu2_MCU cortex-m3) set(GENERIC_F100CBTX_dfu2_FPCONF "-") add_library(GENERIC_F100CBTX_dfu2 INTERFACE) target_compile_options(GENERIC_F100CBTX_dfu2 INTERFACE - "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -14956,7 +15096,7 @@ set(GENERIC_F100CBTX_dfuo_MCU cortex-m3) set(GENERIC_F100CBTX_dfuo_FPCONF "-") add_library(GENERIC_F100CBTX_dfuo INTERFACE) target_compile_options(GENERIC_F100CBTX_dfuo INTERFACE - "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -14998,7 +15138,7 @@ set(GENERIC_F100CBTX_hid_MCU cortex-m3) set(GENERIC_F100CBTX_hid_FPCONF "-") add_library(GENERIC_F100CBTX_hid INTERFACE) target_compile_options(GENERIC_F100CBTX_hid INTERFACE - "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -15040,7 +15180,7 @@ set(GENERIC_F100R4HX_MCU cortex-m3) set(GENERIC_F100R4HX_FPCONF "-") add_library(GENERIC_F100R4HX INTERFACE) target_compile_options(GENERIC_F100R4HX INTERFACE - "SHELL:-DSTM32F100xB " + "SHELL:-DSTM32F100xB" "SHELL:" "SHELL:" "SHELL: " @@ -15085,15 +15225,15 @@ target_compile_options(GENERIC_F100R4HX_serial_none INTERFACE ) add_library(GENERIC_F100R4HX_usb_CDC INTERFACE) target_compile_options(GENERIC_F100R4HX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F100R4HX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F100R4HX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F100R4HX_usb_HID INTERFACE) target_compile_options(GENERIC_F100R4HX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F100R4HX_usb_none INTERFACE) target_compile_options(GENERIC_F100R4HX_usb_none INTERFACE @@ -15122,7 +15262,7 @@ set(GENERIC_F100R4HX_dfu2_MCU cortex-m3) set(GENERIC_F100R4HX_dfu2_FPCONF "-") add_library(GENERIC_F100R4HX_dfu2 INTERFACE) target_compile_options(GENERIC_F100R4HX_dfu2 INTERFACE - "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -15164,7 +15304,7 @@ set(GENERIC_F100R4HX_dfuo_MCU cortex-m3) set(GENERIC_F100R4HX_dfuo_FPCONF "-") add_library(GENERIC_F100R4HX_dfuo INTERFACE) target_compile_options(GENERIC_F100R4HX_dfuo INTERFACE - "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -15206,7 +15346,7 @@ set(GENERIC_F100R4HX_hid_MCU cortex-m3) set(GENERIC_F100R4HX_hid_FPCONF "-") add_library(GENERIC_F100R4HX_hid INTERFACE) target_compile_options(GENERIC_F100R4HX_hid INTERFACE - "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -15248,7 +15388,7 @@ set(GENERIC_F100R6HX_MCU cortex-m3) set(GENERIC_F100R6HX_FPCONF "-") add_library(GENERIC_F100R6HX INTERFACE) target_compile_options(GENERIC_F100R6HX INTERFACE - "SHELL:-DSTM32F100xB " + "SHELL:-DSTM32F100xB" "SHELL:" "SHELL:" "SHELL: " @@ -15293,15 +15433,15 @@ target_compile_options(GENERIC_F100R6HX_serial_none INTERFACE ) add_library(GENERIC_F100R6HX_usb_CDC INTERFACE) target_compile_options(GENERIC_F100R6HX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F100R6HX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F100R6HX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F100R6HX_usb_HID INTERFACE) target_compile_options(GENERIC_F100R6HX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F100R6HX_usb_none INTERFACE) target_compile_options(GENERIC_F100R6HX_usb_none INTERFACE @@ -15330,7 +15470,7 @@ set(GENERIC_F100R6HX_dfu2_MCU cortex-m3) set(GENERIC_F100R6HX_dfu2_FPCONF "-") add_library(GENERIC_F100R6HX_dfu2 INTERFACE) target_compile_options(GENERIC_F100R6HX_dfu2 INTERFACE - "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -15372,7 +15512,7 @@ set(GENERIC_F100R6HX_dfuo_MCU cortex-m3) set(GENERIC_F100R6HX_dfuo_FPCONF "-") add_library(GENERIC_F100R6HX_dfuo INTERFACE) target_compile_options(GENERIC_F100R6HX_dfuo INTERFACE - "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -15414,7 +15554,7 @@ set(GENERIC_F100R6HX_hid_MCU cortex-m3) set(GENERIC_F100R6HX_hid_FPCONF "-") add_library(GENERIC_F100R6HX_hid INTERFACE) target_compile_options(GENERIC_F100R6HX_hid INTERFACE - "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -15456,7 +15596,7 @@ set(GENERIC_F100R8TX_MCU cortex-m3) set(GENERIC_F100R8TX_FPCONF "-") add_library(GENERIC_F100R8TX INTERFACE) target_compile_options(GENERIC_F100R8TX INTERFACE - "SHELL:-DSTM32F100xB " + "SHELL:-DSTM32F100xB" "SHELL:" "SHELL:" "SHELL: " @@ -15501,15 +15641,15 @@ target_compile_options(GENERIC_F100R8TX_serial_none INTERFACE ) add_library(GENERIC_F100R8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F100R8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F100R8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F100R8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F100R8TX_usb_HID INTERFACE) target_compile_options(GENERIC_F100R8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F100R8TX_usb_none INTERFACE) target_compile_options(GENERIC_F100R8TX_usb_none INTERFACE @@ -15538,7 +15678,7 @@ set(GENERIC_F100R8TX_dfu2_MCU cortex-m3) set(GENERIC_F100R8TX_dfu2_FPCONF "-") add_library(GENERIC_F100R8TX_dfu2 INTERFACE) target_compile_options(GENERIC_F100R8TX_dfu2 INTERFACE - "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -15580,7 +15720,7 @@ set(GENERIC_F100R8TX_dfuo_MCU cortex-m3) set(GENERIC_F100R8TX_dfuo_FPCONF "-") add_library(GENERIC_F100R8TX_dfuo INTERFACE) target_compile_options(GENERIC_F100R8TX_dfuo INTERFACE - "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -15622,7 +15762,7 @@ set(GENERIC_F100R8TX_hid_MCU cortex-m3) set(GENERIC_F100R8TX_hid_FPCONF "-") add_library(GENERIC_F100R8TX_hid INTERFACE) target_compile_options(GENERIC_F100R8TX_hid INTERFACE - "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -15664,7 +15804,7 @@ set(GENERIC_F100RBTX_MCU cortex-m3) set(GENERIC_F100RBTX_FPCONF "-") add_library(GENERIC_F100RBTX INTERFACE) target_compile_options(GENERIC_F100RBTX INTERFACE - "SHELL:-DSTM32F100xB " + "SHELL:-DSTM32F100xB" "SHELL:" "SHELL:" "SHELL: " @@ -15709,15 +15849,15 @@ target_compile_options(GENERIC_F100RBTX_serial_none INTERFACE ) add_library(GENERIC_F100RBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F100RBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F100RBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F100RBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F100RBTX_usb_HID INTERFACE) target_compile_options(GENERIC_F100RBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F100RBTX_usb_none INTERFACE) target_compile_options(GENERIC_F100RBTX_usb_none INTERFACE @@ -15746,7 +15886,7 @@ set(GENERIC_F100RBTX_dfu2_MCU cortex-m3) set(GENERIC_F100RBTX_dfu2_FPCONF "-") add_library(GENERIC_F100RBTX_dfu2 INTERFACE) target_compile_options(GENERIC_F100RBTX_dfu2 INTERFACE - "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -15788,7 +15928,7 @@ set(GENERIC_F100RBTX_dfuo_MCU cortex-m3) set(GENERIC_F100RBTX_dfuo_FPCONF "-") add_library(GENERIC_F100RBTX_dfuo INTERFACE) target_compile_options(GENERIC_F100RBTX_dfuo INTERFACE - "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -15830,7 +15970,7 @@ set(GENERIC_F100RBTX_hid_MCU cortex-m3) set(GENERIC_F100RBTX_hid_FPCONF "-") add_library(GENERIC_F100RBTX_hid INTERFACE) target_compile_options(GENERIC_F100RBTX_hid INTERFACE - "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -15872,7 +16012,7 @@ set(GENERIC_F100V8TX_MCU cortex-m3) set(GENERIC_F100V8TX_FPCONF "-") add_library(GENERIC_F100V8TX INTERFACE) target_compile_options(GENERIC_F100V8TX INTERFACE - "SHELL:-DSTM32F100xB " + "SHELL:-DSTM32F100xB" "SHELL:" "SHELL:" "SHELL: " @@ -15917,15 +16057,15 @@ target_compile_options(GENERIC_F100V8TX_serial_none INTERFACE ) add_library(GENERIC_F100V8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F100V8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F100V8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F100V8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F100V8TX_usb_HID INTERFACE) target_compile_options(GENERIC_F100V8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F100V8TX_usb_none INTERFACE) target_compile_options(GENERIC_F100V8TX_usb_none INTERFACE @@ -15954,7 +16094,7 @@ set(GENERIC_F100V8TX_dfu2_MCU cortex-m3) set(GENERIC_F100V8TX_dfu2_FPCONF "-") add_library(GENERIC_F100V8TX_dfu2 INTERFACE) target_compile_options(GENERIC_F100V8TX_dfu2 INTERFACE - "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -15996,7 +16136,7 @@ set(GENERIC_F100V8TX_dfuo_MCU cortex-m3) set(GENERIC_F100V8TX_dfuo_FPCONF "-") add_library(GENERIC_F100V8TX_dfuo INTERFACE) target_compile_options(GENERIC_F100V8TX_dfuo INTERFACE - "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -16038,7 +16178,7 @@ set(GENERIC_F100V8TX_hid_MCU cortex-m3) set(GENERIC_F100V8TX_hid_FPCONF "-") add_library(GENERIC_F100V8TX_hid INTERFACE) target_compile_options(GENERIC_F100V8TX_hid INTERFACE - "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -16080,7 +16220,7 @@ set(GENERIC_F100VBTX_MCU cortex-m3) set(GENERIC_F100VBTX_FPCONF "-") add_library(GENERIC_F100VBTX INTERFACE) target_compile_options(GENERIC_F100VBTX INTERFACE - "SHELL:-DSTM32F100xB " + "SHELL:-DSTM32F100xB" "SHELL:" "SHELL:" "SHELL: " @@ -16125,15 +16265,15 @@ target_compile_options(GENERIC_F100VBTX_serial_none INTERFACE ) add_library(GENERIC_F100VBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F100VBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F100VBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F100VBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F100VBTX_usb_HID INTERFACE) target_compile_options(GENERIC_F100VBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F100VBTX_usb_none INTERFACE) target_compile_options(GENERIC_F100VBTX_usb_none INTERFACE @@ -16162,7 +16302,7 @@ set(GENERIC_F100VBTX_dfu2_MCU cortex-m3) set(GENERIC_F100VBTX_dfu2_FPCONF "-") add_library(GENERIC_F100VBTX_dfu2 INTERFACE) target_compile_options(GENERIC_F100VBTX_dfu2 INTERFACE - "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -16204,7 +16344,7 @@ set(GENERIC_F100VBTX_dfuo_MCU cortex-m3) set(GENERIC_F100VBTX_dfuo_FPCONF "-") add_library(GENERIC_F100VBTX_dfuo INTERFACE) target_compile_options(GENERIC_F100VBTX_dfuo INTERFACE - "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -16246,7 +16386,7 @@ set(GENERIC_F100VBTX_hid_MCU cortex-m3) set(GENERIC_F100VBTX_hid_FPCONF "-") add_library(GENERIC_F100VBTX_hid INTERFACE) target_compile_options(GENERIC_F100VBTX_hid INTERFACE - "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -16288,7 +16428,7 @@ set(GENERIC_F100ZCTX_MCU cortex-m3) set(GENERIC_F100ZCTX_FPCONF "-") add_library(GENERIC_F100ZCTX INTERFACE) target_compile_options(GENERIC_F100ZCTX INTERFACE - "SHELL:-DSTM32F100xE " + "SHELL:-DSTM32F100xE" "SHELL:" "SHELL:" "SHELL: " @@ -16333,15 +16473,15 @@ target_compile_options(GENERIC_F100ZCTX_serial_none INTERFACE ) add_library(GENERIC_F100ZCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F100ZCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F100ZCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F100ZCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F100ZCTX_usb_HID INTERFACE) target_compile_options(GENERIC_F100ZCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F100ZCTX_usb_none INTERFACE) target_compile_options(GENERIC_F100ZCTX_usb_none INTERFACE @@ -16370,7 +16510,7 @@ set(GENERIC_F100ZCTX_dfu2_MCU cortex-m3) set(GENERIC_F100ZCTX_dfu2_FPCONF "-") add_library(GENERIC_F100ZCTX_dfu2 INTERFACE) target_compile_options(GENERIC_F100ZCTX_dfu2 INTERFACE - "SHELL:-DSTM32F100xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F100xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -16412,7 +16552,7 @@ set(GENERIC_F100ZCTX_dfuo_MCU cortex-m3) set(GENERIC_F100ZCTX_dfuo_FPCONF "-") add_library(GENERIC_F100ZCTX_dfuo INTERFACE) target_compile_options(GENERIC_F100ZCTX_dfuo INTERFACE - "SHELL:-DSTM32F100xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F100xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -16454,7 +16594,7 @@ set(GENERIC_F100ZCTX_hid_MCU cortex-m3) set(GENERIC_F100ZCTX_hid_FPCONF "-") add_library(GENERIC_F100ZCTX_hid INTERFACE) target_compile_options(GENERIC_F100ZCTX_hid INTERFACE - "SHELL:-DSTM32F100xE -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F100xE -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -16496,7 +16636,7 @@ set(GENERIC_F100ZDTX_MCU cortex-m3) set(GENERIC_F100ZDTX_FPCONF "-") add_library(GENERIC_F100ZDTX INTERFACE) target_compile_options(GENERIC_F100ZDTX INTERFACE - "SHELL:-DSTM32F100xE " + "SHELL:-DSTM32F100xE" "SHELL:" "SHELL:" "SHELL: " @@ -16541,15 +16681,15 @@ target_compile_options(GENERIC_F100ZDTX_serial_none INTERFACE ) add_library(GENERIC_F100ZDTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F100ZDTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F100ZDTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F100ZDTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F100ZDTX_usb_HID INTERFACE) target_compile_options(GENERIC_F100ZDTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F100ZDTX_usb_none INTERFACE) target_compile_options(GENERIC_F100ZDTX_usb_none INTERFACE @@ -16578,7 +16718,7 @@ set(GENERIC_F100ZDTX_dfu2_MCU cortex-m3) set(GENERIC_F100ZDTX_dfu2_FPCONF "-") add_library(GENERIC_F100ZDTX_dfu2 INTERFACE) target_compile_options(GENERIC_F100ZDTX_dfu2 INTERFACE - "SHELL:-DSTM32F100xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F100xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -16620,7 +16760,7 @@ set(GENERIC_F100ZDTX_dfuo_MCU cortex-m3) set(GENERIC_F100ZDTX_dfuo_FPCONF "-") add_library(GENERIC_F100ZDTX_dfuo INTERFACE) target_compile_options(GENERIC_F100ZDTX_dfuo INTERFACE - "SHELL:-DSTM32F100xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F100xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -16662,7 +16802,7 @@ set(GENERIC_F100ZDTX_hid_MCU cortex-m3) set(GENERIC_F100ZDTX_hid_FPCONF "-") add_library(GENERIC_F100ZDTX_hid INTERFACE) target_compile_options(GENERIC_F100ZDTX_hid INTERFACE - "SHELL:-DSTM32F100xE -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F100xE -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -16704,7 +16844,7 @@ set(GENERIC_F100ZETX_MCU cortex-m3) set(GENERIC_F100ZETX_FPCONF "-") add_library(GENERIC_F100ZETX INTERFACE) target_compile_options(GENERIC_F100ZETX INTERFACE - "SHELL:-DSTM32F100xE " + "SHELL:-DSTM32F100xE" "SHELL:" "SHELL:" "SHELL: " @@ -16749,15 +16889,15 @@ target_compile_options(GENERIC_F100ZETX_serial_none INTERFACE ) add_library(GENERIC_F100ZETX_usb_CDC INTERFACE) target_compile_options(GENERIC_F100ZETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F100ZETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F100ZETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F100ZETX_usb_HID INTERFACE) target_compile_options(GENERIC_F100ZETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F100ZETX_usb_none INTERFACE) target_compile_options(GENERIC_F100ZETX_usb_none INTERFACE @@ -16786,7 +16926,7 @@ set(GENERIC_F100ZETX_dfu2_MCU cortex-m3) set(GENERIC_F100ZETX_dfu2_FPCONF "-") add_library(GENERIC_F100ZETX_dfu2 INTERFACE) target_compile_options(GENERIC_F100ZETX_dfu2 INTERFACE - "SHELL:-DSTM32F100xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F100xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -16828,7 +16968,7 @@ set(GENERIC_F100ZETX_dfuo_MCU cortex-m3) set(GENERIC_F100ZETX_dfuo_FPCONF "-") add_library(GENERIC_F100ZETX_dfuo INTERFACE) target_compile_options(GENERIC_F100ZETX_dfuo INTERFACE - "SHELL:-DSTM32F100xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F100xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -16870,7 +17010,7 @@ set(GENERIC_F100ZETX_hid_MCU cortex-m3) set(GENERIC_F100ZETX_hid_FPCONF "-") add_library(GENERIC_F100ZETX_hid INTERFACE) target_compile_options(GENERIC_F100ZETX_hid INTERFACE - "SHELL:-DSTM32F100xE -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F100xE -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -16912,7 +17052,7 @@ set(GENERIC_F101C4TX_MCU cortex-m3) set(GENERIC_F101C4TX_FPCONF "-") add_library(GENERIC_F101C4TX INTERFACE) target_compile_options(GENERIC_F101C4TX INTERFACE - "SHELL:-DSTM32F101x6 " + "SHELL:-DSTM32F101x6" "SHELL:" "SHELL:" "SHELL: " @@ -16957,15 +17097,15 @@ target_compile_options(GENERIC_F101C4TX_serial_none INTERFACE ) add_library(GENERIC_F101C4TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F101C4TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F101C4TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F101C4TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F101C4TX_usb_HID INTERFACE) target_compile_options(GENERIC_F101C4TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F101C4TX_usb_none INTERFACE) target_compile_options(GENERIC_F101C4TX_usb_none INTERFACE @@ -16994,7 +17134,7 @@ set(GENERIC_F101C4TX_dfu2_MCU cortex-m3) set(GENERIC_F101C4TX_dfu2_FPCONF "-") add_library(GENERIC_F101C4TX_dfu2 INTERFACE) target_compile_options(GENERIC_F101C4TX_dfu2 INTERFACE - "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -17036,7 +17176,7 @@ set(GENERIC_F101C4TX_dfuo_MCU cortex-m3) set(GENERIC_F101C4TX_dfuo_FPCONF "-") add_library(GENERIC_F101C4TX_dfuo INTERFACE) target_compile_options(GENERIC_F101C4TX_dfuo INTERFACE - "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -17078,7 +17218,7 @@ set(GENERIC_F101C4TX_hid_MCU cortex-m3) set(GENERIC_F101C4TX_hid_FPCONF "-") add_library(GENERIC_F101C4TX_hid INTERFACE) target_compile_options(GENERIC_F101C4TX_hid INTERFACE - "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -17120,7 +17260,7 @@ set(GENERIC_F101C6TX_MCU cortex-m3) set(GENERIC_F101C6TX_FPCONF "-") add_library(GENERIC_F101C6TX INTERFACE) target_compile_options(GENERIC_F101C6TX INTERFACE - "SHELL:-DSTM32F101x6 " + "SHELL:-DSTM32F101x6" "SHELL:" "SHELL:" "SHELL: " @@ -17165,15 +17305,15 @@ target_compile_options(GENERIC_F101C6TX_serial_none INTERFACE ) add_library(GENERIC_F101C6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F101C6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F101C6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F101C6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F101C6TX_usb_HID INTERFACE) target_compile_options(GENERIC_F101C6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F101C6TX_usb_none INTERFACE) target_compile_options(GENERIC_F101C6TX_usb_none INTERFACE @@ -17202,7 +17342,7 @@ set(GENERIC_F101C6TX_dfu2_MCU cortex-m3) set(GENERIC_F101C6TX_dfu2_FPCONF "-") add_library(GENERIC_F101C6TX_dfu2 INTERFACE) target_compile_options(GENERIC_F101C6TX_dfu2 INTERFACE - "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -17244,7 +17384,7 @@ set(GENERIC_F101C6TX_dfuo_MCU cortex-m3) set(GENERIC_F101C6TX_dfuo_FPCONF "-") add_library(GENERIC_F101C6TX_dfuo INTERFACE) target_compile_options(GENERIC_F101C6TX_dfuo INTERFACE - "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -17286,7 +17426,7 @@ set(GENERIC_F101C6TX_hid_MCU cortex-m3) set(GENERIC_F101C6TX_hid_FPCONF "-") add_library(GENERIC_F101C6TX_hid INTERFACE) target_compile_options(GENERIC_F101C6TX_hid INTERFACE - "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -17328,7 +17468,7 @@ set(GENERIC_F101R4TX_MCU cortex-m3) set(GENERIC_F101R4TX_FPCONF "-") add_library(GENERIC_F101R4TX INTERFACE) target_compile_options(GENERIC_F101R4TX INTERFACE - "SHELL:-DSTM32F101x6 " + "SHELL:-DSTM32F101x6" "SHELL:" "SHELL:" "SHELL: " @@ -17373,15 +17513,15 @@ target_compile_options(GENERIC_F101R4TX_serial_none INTERFACE ) add_library(GENERIC_F101R4TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F101R4TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F101R4TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F101R4TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F101R4TX_usb_HID INTERFACE) target_compile_options(GENERIC_F101R4TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F101R4TX_usb_none INTERFACE) target_compile_options(GENERIC_F101R4TX_usb_none INTERFACE @@ -17410,7 +17550,7 @@ set(GENERIC_F101R4TX_dfu2_MCU cortex-m3) set(GENERIC_F101R4TX_dfu2_FPCONF "-") add_library(GENERIC_F101R4TX_dfu2 INTERFACE) target_compile_options(GENERIC_F101R4TX_dfu2 INTERFACE - "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -17452,7 +17592,7 @@ set(GENERIC_F101R4TX_dfuo_MCU cortex-m3) set(GENERIC_F101R4TX_dfuo_FPCONF "-") add_library(GENERIC_F101R4TX_dfuo INTERFACE) target_compile_options(GENERIC_F101R4TX_dfuo INTERFACE - "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -17494,7 +17634,7 @@ set(GENERIC_F101R4TX_hid_MCU cortex-m3) set(GENERIC_F101R4TX_hid_FPCONF "-") add_library(GENERIC_F101R4TX_hid INTERFACE) target_compile_options(GENERIC_F101R4TX_hid INTERFACE - "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -17536,7 +17676,7 @@ set(GENERIC_F101R6TX_MCU cortex-m3) set(GENERIC_F101R6TX_FPCONF "-") add_library(GENERIC_F101R6TX INTERFACE) target_compile_options(GENERIC_F101R6TX INTERFACE - "SHELL:-DSTM32F101x6 " + "SHELL:-DSTM32F101x6" "SHELL:" "SHELL:" "SHELL: " @@ -17581,15 +17721,15 @@ target_compile_options(GENERIC_F101R6TX_serial_none INTERFACE ) add_library(GENERIC_F101R6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F101R6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F101R6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F101R6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F101R6TX_usb_HID INTERFACE) target_compile_options(GENERIC_F101R6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F101R6TX_usb_none INTERFACE) target_compile_options(GENERIC_F101R6TX_usb_none INTERFACE @@ -17618,7 +17758,7 @@ set(GENERIC_F101R6TX_dfu2_MCU cortex-m3) set(GENERIC_F101R6TX_dfu2_FPCONF "-") add_library(GENERIC_F101R6TX_dfu2 INTERFACE) target_compile_options(GENERIC_F101R6TX_dfu2 INTERFACE - "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -17660,7 +17800,7 @@ set(GENERIC_F101R6TX_dfuo_MCU cortex-m3) set(GENERIC_F101R6TX_dfuo_FPCONF "-") add_library(GENERIC_F101R6TX_dfuo INTERFACE) target_compile_options(GENERIC_F101R6TX_dfuo INTERFACE - "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -17702,7 +17842,7 @@ set(GENERIC_F101R6TX_hid_MCU cortex-m3) set(GENERIC_F101R6TX_hid_FPCONF "-") add_library(GENERIC_F101R6TX_hid INTERFACE) target_compile_options(GENERIC_F101R6TX_hid INTERFACE - "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -17744,7 +17884,7 @@ set(GENERIC_F101T4UX_MCU cortex-m3) set(GENERIC_F101T4UX_FPCONF "-") add_library(GENERIC_F101T4UX INTERFACE) target_compile_options(GENERIC_F101T4UX INTERFACE - "SHELL:-DSTM32F101x6 " + "SHELL:-DSTM32F101x6" "SHELL:" "SHELL:" "SHELL: " @@ -17789,15 +17929,15 @@ target_compile_options(GENERIC_F101T4UX_serial_none INTERFACE ) add_library(GENERIC_F101T4UX_usb_CDC INTERFACE) target_compile_options(GENERIC_F101T4UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F101T4UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F101T4UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F101T4UX_usb_HID INTERFACE) target_compile_options(GENERIC_F101T4UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F101T4UX_usb_none INTERFACE) target_compile_options(GENERIC_F101T4UX_usb_none INTERFACE @@ -17826,7 +17966,7 @@ set(GENERIC_F101T4UX_dfu2_MCU cortex-m3) set(GENERIC_F101T4UX_dfu2_FPCONF "-") add_library(GENERIC_F101T4UX_dfu2 INTERFACE) target_compile_options(GENERIC_F101T4UX_dfu2 INTERFACE - "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -17868,7 +18008,7 @@ set(GENERIC_F101T4UX_dfuo_MCU cortex-m3) set(GENERIC_F101T4UX_dfuo_FPCONF "-") add_library(GENERIC_F101T4UX_dfuo INTERFACE) target_compile_options(GENERIC_F101T4UX_dfuo INTERFACE - "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -17910,7 +18050,7 @@ set(GENERIC_F101T4UX_hid_MCU cortex-m3) set(GENERIC_F101T4UX_hid_FPCONF "-") add_library(GENERIC_F101T4UX_hid INTERFACE) target_compile_options(GENERIC_F101T4UX_hid INTERFACE - "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -17952,7 +18092,7 @@ set(GENERIC_F101T6UX_MCU cortex-m3) set(GENERIC_F101T6UX_FPCONF "-") add_library(GENERIC_F101T6UX INTERFACE) target_compile_options(GENERIC_F101T6UX INTERFACE - "SHELL:-DSTM32F101x6 " + "SHELL:-DSTM32F101x6" "SHELL:" "SHELL:" "SHELL: " @@ -17997,15 +18137,15 @@ target_compile_options(GENERIC_F101T6UX_serial_none INTERFACE ) add_library(GENERIC_F101T6UX_usb_CDC INTERFACE) target_compile_options(GENERIC_F101T6UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F101T6UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F101T6UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F101T6UX_usb_HID INTERFACE) target_compile_options(GENERIC_F101T6UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F101T6UX_usb_none INTERFACE) target_compile_options(GENERIC_F101T6UX_usb_none INTERFACE @@ -18034,7 +18174,7 @@ set(GENERIC_F101T6UX_dfu2_MCU cortex-m3) set(GENERIC_F101T6UX_dfu2_FPCONF "-") add_library(GENERIC_F101T6UX_dfu2 INTERFACE) target_compile_options(GENERIC_F101T6UX_dfu2 INTERFACE - "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -18076,7 +18216,7 @@ set(GENERIC_F101T6UX_dfuo_MCU cortex-m3) set(GENERIC_F101T6UX_dfuo_FPCONF "-") add_library(GENERIC_F101T6UX_dfuo INTERFACE) target_compile_options(GENERIC_F101T6UX_dfuo INTERFACE - "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -18118,7 +18258,7 @@ set(GENERIC_F101T6UX_hid_MCU cortex-m3) set(GENERIC_F101T6UX_hid_FPCONF "-") add_library(GENERIC_F101T6UX_hid INTERFACE) target_compile_options(GENERIC_F101T6UX_hid INTERFACE - "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -18160,7 +18300,7 @@ set(GENERIC_F101V8TX_MCU cortex-m3) set(GENERIC_F101V8TX_FPCONF "-") add_library(GENERIC_F101V8TX INTERFACE) target_compile_options(GENERIC_F101V8TX INTERFACE - "SHELL:-DSTM32F101xB " + "SHELL:-DSTM32F101xB" "SHELL:" "SHELL:" "SHELL: " @@ -18205,15 +18345,15 @@ target_compile_options(GENERIC_F101V8TX_serial_none INTERFACE ) add_library(GENERIC_F101V8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F101V8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F101V8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F101V8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F101V8TX_usb_HID INTERFACE) target_compile_options(GENERIC_F101V8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F101V8TX_usb_none INTERFACE) target_compile_options(GENERIC_F101V8TX_usb_none INTERFACE @@ -18242,7 +18382,7 @@ set(GENERIC_F101V8TX_dfu2_MCU cortex-m3) set(GENERIC_F101V8TX_dfu2_FPCONF "-") add_library(GENERIC_F101V8TX_dfu2 INTERFACE) target_compile_options(GENERIC_F101V8TX_dfu2 INTERFACE - "SHELL:-DSTM32F101xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F101xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -18284,7 +18424,7 @@ set(GENERIC_F101V8TX_dfuo_MCU cortex-m3) set(GENERIC_F101V8TX_dfuo_FPCONF "-") add_library(GENERIC_F101V8TX_dfuo INTERFACE) target_compile_options(GENERIC_F101V8TX_dfuo INTERFACE - "SHELL:-DSTM32F101xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F101xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -18326,7 +18466,7 @@ set(GENERIC_F101V8TX_hid_MCU cortex-m3) set(GENERIC_F101V8TX_hid_FPCONF "-") add_library(GENERIC_F101V8TX_hid INTERFACE) target_compile_options(GENERIC_F101V8TX_hid INTERFACE - "SHELL:-DSTM32F101xB -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F101xB -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -18368,7 +18508,7 @@ set(GENERIC_F101VBTX_MCU cortex-m3) set(GENERIC_F101VBTX_FPCONF "-") add_library(GENERIC_F101VBTX INTERFACE) target_compile_options(GENERIC_F101VBTX INTERFACE - "SHELL:-DSTM32F101xB " + "SHELL:-DSTM32F101xB" "SHELL:" "SHELL:" "SHELL: " @@ -18413,15 +18553,15 @@ target_compile_options(GENERIC_F101VBTX_serial_none INTERFACE ) add_library(GENERIC_F101VBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F101VBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F101VBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F101VBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F101VBTX_usb_HID INTERFACE) target_compile_options(GENERIC_F101VBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F101VBTX_usb_none INTERFACE) target_compile_options(GENERIC_F101VBTX_usb_none INTERFACE @@ -18450,7 +18590,7 @@ set(GENERIC_F101VBTX_dfu2_MCU cortex-m3) set(GENERIC_F101VBTX_dfu2_FPCONF "-") add_library(GENERIC_F101VBTX_dfu2 INTERFACE) target_compile_options(GENERIC_F101VBTX_dfu2 INTERFACE - "SHELL:-DSTM32F101xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F101xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -18492,7 +18632,7 @@ set(GENERIC_F101VBTX_dfuo_MCU cortex-m3) set(GENERIC_F101VBTX_dfuo_FPCONF "-") add_library(GENERIC_F101VBTX_dfuo INTERFACE) target_compile_options(GENERIC_F101VBTX_dfuo INTERFACE - "SHELL:-DSTM32F101xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F101xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -18534,7 +18674,7 @@ set(GENERIC_F101VBTX_hid_MCU cortex-m3) set(GENERIC_F101VBTX_hid_FPCONF "-") add_library(GENERIC_F101VBTX_hid INTERFACE) target_compile_options(GENERIC_F101VBTX_hid INTERFACE - "SHELL:-DSTM32F101xB -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F101xB -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -18576,7 +18716,7 @@ set(GENERIC_F101ZCTX_MCU cortex-m3) set(GENERIC_F101ZCTX_FPCONF "-") add_library(GENERIC_F101ZCTX INTERFACE) target_compile_options(GENERIC_F101ZCTX INTERFACE - "SHELL:-DSTM32F101xE " + "SHELL:-DSTM32F101xE" "SHELL:" "SHELL:" "SHELL: " @@ -18621,15 +18761,15 @@ target_compile_options(GENERIC_F101ZCTX_serial_none INTERFACE ) add_library(GENERIC_F101ZCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F101ZCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F101ZCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F101ZCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F101ZCTX_usb_HID INTERFACE) target_compile_options(GENERIC_F101ZCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F101ZCTX_usb_none INTERFACE) target_compile_options(GENERIC_F101ZCTX_usb_none INTERFACE @@ -18658,7 +18798,7 @@ set(GENERIC_F101ZCTX_dfu2_MCU cortex-m3) set(GENERIC_F101ZCTX_dfu2_FPCONF "-") add_library(GENERIC_F101ZCTX_dfu2 INTERFACE) target_compile_options(GENERIC_F101ZCTX_dfu2 INTERFACE - "SHELL:-DSTM32F101xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F101xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -18700,7 +18840,7 @@ set(GENERIC_F101ZCTX_dfuo_MCU cortex-m3) set(GENERIC_F101ZCTX_dfuo_FPCONF "-") add_library(GENERIC_F101ZCTX_dfuo INTERFACE) target_compile_options(GENERIC_F101ZCTX_dfuo INTERFACE - "SHELL:-DSTM32F101xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F101xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -18742,7 +18882,7 @@ set(GENERIC_F101ZCTX_hid_MCU cortex-m3) set(GENERIC_F101ZCTX_hid_FPCONF "-") add_library(GENERIC_F101ZCTX_hid INTERFACE) target_compile_options(GENERIC_F101ZCTX_hid INTERFACE - "SHELL:-DSTM32F101xE -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F101xE -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -18784,7 +18924,7 @@ set(GENERIC_F101ZDTX_MCU cortex-m3) set(GENERIC_F101ZDTX_FPCONF "-") add_library(GENERIC_F101ZDTX INTERFACE) target_compile_options(GENERIC_F101ZDTX INTERFACE - "SHELL:-DSTM32F101xE " + "SHELL:-DSTM32F101xE" "SHELL:" "SHELL:" "SHELL: " @@ -18829,15 +18969,15 @@ target_compile_options(GENERIC_F101ZDTX_serial_none INTERFACE ) add_library(GENERIC_F101ZDTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F101ZDTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F101ZDTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F101ZDTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F101ZDTX_usb_HID INTERFACE) target_compile_options(GENERIC_F101ZDTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F101ZDTX_usb_none INTERFACE) target_compile_options(GENERIC_F101ZDTX_usb_none INTERFACE @@ -18866,7 +19006,7 @@ set(GENERIC_F101ZDTX_dfu2_MCU cortex-m3) set(GENERIC_F101ZDTX_dfu2_FPCONF "-") add_library(GENERIC_F101ZDTX_dfu2 INTERFACE) target_compile_options(GENERIC_F101ZDTX_dfu2 INTERFACE - "SHELL:-DSTM32F101xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F101xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -18908,7 +19048,7 @@ set(GENERIC_F101ZDTX_dfuo_MCU cortex-m3) set(GENERIC_F101ZDTX_dfuo_FPCONF "-") add_library(GENERIC_F101ZDTX_dfuo INTERFACE) target_compile_options(GENERIC_F101ZDTX_dfuo INTERFACE - "SHELL:-DSTM32F101xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F101xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -18950,7 +19090,7 @@ set(GENERIC_F101ZDTX_hid_MCU cortex-m3) set(GENERIC_F101ZDTX_hid_FPCONF "-") add_library(GENERIC_F101ZDTX_hid INTERFACE) target_compile_options(GENERIC_F101ZDTX_hid INTERFACE - "SHELL:-DSTM32F101xE -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F101xE -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -18992,7 +19132,7 @@ set(GENERIC_F101ZETX_MCU cortex-m3) set(GENERIC_F101ZETX_FPCONF "-") add_library(GENERIC_F101ZETX INTERFACE) target_compile_options(GENERIC_F101ZETX INTERFACE - "SHELL:-DSTM32F101xE " + "SHELL:-DSTM32F101xE" "SHELL:" "SHELL:" "SHELL: " @@ -19037,15 +19177,15 @@ target_compile_options(GENERIC_F101ZETX_serial_none INTERFACE ) add_library(GENERIC_F101ZETX_usb_CDC INTERFACE) target_compile_options(GENERIC_F101ZETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F101ZETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F101ZETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F101ZETX_usb_HID INTERFACE) target_compile_options(GENERIC_F101ZETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F101ZETX_usb_none INTERFACE) target_compile_options(GENERIC_F101ZETX_usb_none INTERFACE @@ -19074,7 +19214,7 @@ set(GENERIC_F101ZETX_dfu2_MCU cortex-m3) set(GENERIC_F101ZETX_dfu2_FPCONF "-") add_library(GENERIC_F101ZETX_dfu2 INTERFACE) target_compile_options(GENERIC_F101ZETX_dfu2 INTERFACE - "SHELL:-DSTM32F101xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F101xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -19116,7 +19256,7 @@ set(GENERIC_F101ZETX_dfuo_MCU cortex-m3) set(GENERIC_F101ZETX_dfuo_FPCONF "-") add_library(GENERIC_F101ZETX_dfuo INTERFACE) target_compile_options(GENERIC_F101ZETX_dfuo INTERFACE - "SHELL:-DSTM32F101xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F101xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -19158,7 +19298,7 @@ set(GENERIC_F101ZETX_hid_MCU cortex-m3) set(GENERIC_F101ZETX_hid_FPCONF "-") add_library(GENERIC_F101ZETX_hid INTERFACE) target_compile_options(GENERIC_F101ZETX_hid INTERFACE - "SHELL:-DSTM32F101xE -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F101xE -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -19200,7 +19340,7 @@ set(GENERIC_F103C4TX_MCU cortex-m3) set(GENERIC_F103C4TX_FPCONF "-") add_library(GENERIC_F103C4TX INTERFACE) target_compile_options(GENERIC_F103C4TX INTERFACE - "SHELL:-DSTM32F103x6 " + "SHELL:-DSTM32F103x6" "SHELL:" "SHELL:" "SHELL: " @@ -19245,15 +19385,15 @@ target_compile_options(GENERIC_F103C4TX_serial_none INTERFACE ) add_library(GENERIC_F103C4TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F103C4TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F103C4TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F103C4TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F103C4TX_usb_HID INTERFACE) target_compile_options(GENERIC_F103C4TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F103C4TX_usb_none INTERFACE) target_compile_options(GENERIC_F103C4TX_usb_none INTERFACE @@ -19282,7 +19422,7 @@ set(GENERIC_F103C4TX_dfu2_MCU cortex-m3) set(GENERIC_F103C4TX_dfu2_FPCONF "-") add_library(GENERIC_F103C4TX_dfu2 INTERFACE) target_compile_options(GENERIC_F103C4TX_dfu2 INTERFACE - "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -19324,7 +19464,7 @@ set(GENERIC_F103C4TX_dfuo_MCU cortex-m3) set(GENERIC_F103C4TX_dfuo_FPCONF "-") add_library(GENERIC_F103C4TX_dfuo INTERFACE) target_compile_options(GENERIC_F103C4TX_dfuo INTERFACE - "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -19366,7 +19506,7 @@ set(GENERIC_F103C4TX_hid_MCU cortex-m3) set(GENERIC_F103C4TX_hid_FPCONF "-") add_library(GENERIC_F103C4TX_hid INTERFACE) target_compile_options(GENERIC_F103C4TX_hid INTERFACE - "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -19408,7 +19548,7 @@ set(GENERIC_F103C6TX_MCU cortex-m3) set(GENERIC_F103C6TX_FPCONF "-") add_library(GENERIC_F103C6TX INTERFACE) target_compile_options(GENERIC_F103C6TX INTERFACE - "SHELL:-DSTM32F103x6 " + "SHELL:-DSTM32F103x6" "SHELL:" "SHELL:" "SHELL: " @@ -19453,15 +19593,15 @@ target_compile_options(GENERIC_F103C6TX_serial_none INTERFACE ) add_library(GENERIC_F103C6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F103C6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F103C6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F103C6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F103C6TX_usb_HID INTERFACE) target_compile_options(GENERIC_F103C6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F103C6TX_usb_none INTERFACE) target_compile_options(GENERIC_F103C6TX_usb_none INTERFACE @@ -19490,7 +19630,7 @@ set(GENERIC_F103C6TX_dfu2_MCU cortex-m3) set(GENERIC_F103C6TX_dfu2_FPCONF "-") add_library(GENERIC_F103C6TX_dfu2 INTERFACE) target_compile_options(GENERIC_F103C6TX_dfu2 INTERFACE - "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -19532,7 +19672,7 @@ set(GENERIC_F103C6TX_dfuo_MCU cortex-m3) set(GENERIC_F103C6TX_dfuo_FPCONF "-") add_library(GENERIC_F103C6TX_dfuo INTERFACE) target_compile_options(GENERIC_F103C6TX_dfuo INTERFACE - "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -19574,7 +19714,7 @@ set(GENERIC_F103C6TX_hid_MCU cortex-m3) set(GENERIC_F103C6TX_hid_FPCONF "-") add_library(GENERIC_F103C6TX_hid INTERFACE) target_compile_options(GENERIC_F103C6TX_hid INTERFACE - "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -19616,7 +19756,7 @@ set(GENERIC_F103C6UX_MCU cortex-m3) set(GENERIC_F103C6UX_FPCONF "-") add_library(GENERIC_F103C6UX INTERFACE) target_compile_options(GENERIC_F103C6UX INTERFACE - "SHELL:-DSTM32F103x6 " + "SHELL:-DSTM32F103x6" "SHELL:" "SHELL:" "SHELL: " @@ -19661,15 +19801,15 @@ target_compile_options(GENERIC_F103C6UX_serial_none INTERFACE ) add_library(GENERIC_F103C6UX_usb_CDC INTERFACE) target_compile_options(GENERIC_F103C6UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F103C6UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F103C6UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F103C6UX_usb_HID INTERFACE) target_compile_options(GENERIC_F103C6UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F103C6UX_usb_none INTERFACE) target_compile_options(GENERIC_F103C6UX_usb_none INTERFACE @@ -19698,7 +19838,7 @@ set(GENERIC_F103C6UX_dfu2_MCU cortex-m3) set(GENERIC_F103C6UX_dfu2_FPCONF "-") add_library(GENERIC_F103C6UX_dfu2 INTERFACE) target_compile_options(GENERIC_F103C6UX_dfu2 INTERFACE - "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -19740,7 +19880,7 @@ set(GENERIC_F103C6UX_dfuo_MCU cortex-m3) set(GENERIC_F103C6UX_dfuo_FPCONF "-") add_library(GENERIC_F103C6UX_dfuo INTERFACE) target_compile_options(GENERIC_F103C6UX_dfuo INTERFACE - "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -19782,7 +19922,7 @@ set(GENERIC_F103C6UX_hid_MCU cortex-m3) set(GENERIC_F103C6UX_hid_FPCONF "-") add_library(GENERIC_F103C6UX_hid INTERFACE) target_compile_options(GENERIC_F103C6UX_hid INTERFACE - "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -19824,7 +19964,7 @@ set(GENERIC_F103C8TX_MCU cortex-m3) set(GENERIC_F103C8TX_FPCONF "-") add_library(GENERIC_F103C8TX INTERFACE) target_compile_options(GENERIC_F103C8TX INTERFACE - "SHELL:-DSTM32F103xB " + "SHELL:-DSTM32F103xB" "SHELL:" "SHELL:" "SHELL: " @@ -19869,15 +20009,15 @@ target_compile_options(GENERIC_F103C8TX_serial_none INTERFACE ) add_library(GENERIC_F103C8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F103C8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F103C8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F103C8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F103C8TX_usb_HID INTERFACE) target_compile_options(GENERIC_F103C8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F103C8TX_usb_none INTERFACE) target_compile_options(GENERIC_F103C8TX_usb_none INTERFACE @@ -19906,7 +20046,7 @@ set(GENERIC_F103C8TX_dfu2_MCU cortex-m3) set(GENERIC_F103C8TX_dfu2_FPCONF "-") add_library(GENERIC_F103C8TX_dfu2 INTERFACE) target_compile_options(GENERIC_F103C8TX_dfu2 INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -19948,7 +20088,7 @@ set(GENERIC_F103C8TX_dfuo_MCU cortex-m3) set(GENERIC_F103C8TX_dfuo_FPCONF "-") add_library(GENERIC_F103C8TX_dfuo INTERFACE) target_compile_options(GENERIC_F103C8TX_dfuo INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -19990,7 +20130,7 @@ set(GENERIC_F103C8TX_hid_MCU cortex-m3) set(GENERIC_F103C8TX_hid_FPCONF "-") add_library(GENERIC_F103C8TX_hid INTERFACE) target_compile_options(GENERIC_F103C8TX_hid INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -20032,7 +20172,7 @@ set(GENERIC_F103CBTX_MCU cortex-m3) set(GENERIC_F103CBTX_FPCONF "-") add_library(GENERIC_F103CBTX INTERFACE) target_compile_options(GENERIC_F103CBTX INTERFACE - "SHELL:-DSTM32F103xB " + "SHELL:-DSTM32F103xB" "SHELL:" "SHELL:" "SHELL: " @@ -20077,15 +20217,15 @@ target_compile_options(GENERIC_F103CBTX_serial_none INTERFACE ) add_library(GENERIC_F103CBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F103CBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F103CBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F103CBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F103CBTX_usb_HID INTERFACE) target_compile_options(GENERIC_F103CBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F103CBTX_usb_none INTERFACE) target_compile_options(GENERIC_F103CBTX_usb_none INTERFACE @@ -20114,7 +20254,7 @@ set(GENERIC_F103CBTX_dfu2_MCU cortex-m3) set(GENERIC_F103CBTX_dfu2_FPCONF "-") add_library(GENERIC_F103CBTX_dfu2 INTERFACE) target_compile_options(GENERIC_F103CBTX_dfu2 INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -20156,7 +20296,7 @@ set(GENERIC_F103CBTX_dfuo_MCU cortex-m3) set(GENERIC_F103CBTX_dfuo_FPCONF "-") add_library(GENERIC_F103CBTX_dfuo INTERFACE) target_compile_options(GENERIC_F103CBTX_dfuo INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -20198,7 +20338,7 @@ set(GENERIC_F103CBTX_hid_MCU cortex-m3) set(GENERIC_F103CBTX_hid_FPCONF "-") add_library(GENERIC_F103CBTX_hid INTERFACE) target_compile_options(GENERIC_F103CBTX_hid INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -20240,7 +20380,7 @@ set(GENERIC_F103CBUX_MCU cortex-m3) set(GENERIC_F103CBUX_FPCONF "-") add_library(GENERIC_F103CBUX INTERFACE) target_compile_options(GENERIC_F103CBUX INTERFACE - "SHELL:-DSTM32F103xB " + "SHELL:-DSTM32F103xB" "SHELL:" "SHELL:" "SHELL: " @@ -20285,15 +20425,15 @@ target_compile_options(GENERIC_F103CBUX_serial_none INTERFACE ) add_library(GENERIC_F103CBUX_usb_CDC INTERFACE) target_compile_options(GENERIC_F103CBUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F103CBUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F103CBUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F103CBUX_usb_HID INTERFACE) target_compile_options(GENERIC_F103CBUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F103CBUX_usb_none INTERFACE) target_compile_options(GENERIC_F103CBUX_usb_none INTERFACE @@ -20322,7 +20462,7 @@ set(GENERIC_F103CBUX_dfu2_MCU cortex-m3) set(GENERIC_F103CBUX_dfu2_FPCONF "-") add_library(GENERIC_F103CBUX_dfu2 INTERFACE) target_compile_options(GENERIC_F103CBUX_dfu2 INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -20364,7 +20504,7 @@ set(GENERIC_F103CBUX_dfuo_MCU cortex-m3) set(GENERIC_F103CBUX_dfuo_FPCONF "-") add_library(GENERIC_F103CBUX_dfuo INTERFACE) target_compile_options(GENERIC_F103CBUX_dfuo INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -20406,7 +20546,7 @@ set(GENERIC_F103CBUX_hid_MCU cortex-m3) set(GENERIC_F103CBUX_hid_FPCONF "-") add_library(GENERIC_F103CBUX_hid INTERFACE) target_compile_options(GENERIC_F103CBUX_hid INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -20448,7 +20588,7 @@ set(GENERIC_F103R4HX_MCU cortex-m3) set(GENERIC_F103R4HX_FPCONF "-") add_library(GENERIC_F103R4HX INTERFACE) target_compile_options(GENERIC_F103R4HX INTERFACE - "SHELL:-DSTM32F103x6 " + "SHELL:-DSTM32F103x6" "SHELL:" "SHELL:" "SHELL: " @@ -20493,15 +20633,15 @@ target_compile_options(GENERIC_F103R4HX_serial_none INTERFACE ) add_library(GENERIC_F103R4HX_usb_CDC INTERFACE) target_compile_options(GENERIC_F103R4HX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F103R4HX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F103R4HX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F103R4HX_usb_HID INTERFACE) target_compile_options(GENERIC_F103R4HX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F103R4HX_usb_none INTERFACE) target_compile_options(GENERIC_F103R4HX_usb_none INTERFACE @@ -20530,7 +20670,7 @@ set(GENERIC_F103R4HX_dfu2_MCU cortex-m3) set(GENERIC_F103R4HX_dfu2_FPCONF "-") add_library(GENERIC_F103R4HX_dfu2 INTERFACE) target_compile_options(GENERIC_F103R4HX_dfu2 INTERFACE - "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -20572,7 +20712,7 @@ set(GENERIC_F103R4HX_dfuo_MCU cortex-m3) set(GENERIC_F103R4HX_dfuo_FPCONF "-") add_library(GENERIC_F103R4HX_dfuo INTERFACE) target_compile_options(GENERIC_F103R4HX_dfuo INTERFACE - "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -20614,7 +20754,7 @@ set(GENERIC_F103R4HX_hid_MCU cortex-m3) set(GENERIC_F103R4HX_hid_FPCONF "-") add_library(GENERIC_F103R4HX_hid INTERFACE) target_compile_options(GENERIC_F103R4HX_hid INTERFACE - "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -20656,7 +20796,7 @@ set(GENERIC_F103R4TX_MCU cortex-m3) set(GENERIC_F103R4TX_FPCONF "-") add_library(GENERIC_F103R4TX INTERFACE) target_compile_options(GENERIC_F103R4TX INTERFACE - "SHELL:-DSTM32F103x6 " + "SHELL:-DSTM32F103x6" "SHELL:" "SHELL:" "SHELL: " @@ -20701,15 +20841,15 @@ target_compile_options(GENERIC_F103R4TX_serial_none INTERFACE ) add_library(GENERIC_F103R4TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F103R4TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F103R4TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F103R4TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F103R4TX_usb_HID INTERFACE) target_compile_options(GENERIC_F103R4TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F103R4TX_usb_none INTERFACE) target_compile_options(GENERIC_F103R4TX_usb_none INTERFACE @@ -20738,7 +20878,7 @@ set(GENERIC_F103R4TX_dfu2_MCU cortex-m3) set(GENERIC_F103R4TX_dfu2_FPCONF "-") add_library(GENERIC_F103R4TX_dfu2 INTERFACE) target_compile_options(GENERIC_F103R4TX_dfu2 INTERFACE - "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -20780,7 +20920,7 @@ set(GENERIC_F103R4TX_dfuo_MCU cortex-m3) set(GENERIC_F103R4TX_dfuo_FPCONF "-") add_library(GENERIC_F103R4TX_dfuo INTERFACE) target_compile_options(GENERIC_F103R4TX_dfuo INTERFACE - "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -20822,7 +20962,7 @@ set(GENERIC_F103R4TX_hid_MCU cortex-m3) set(GENERIC_F103R4TX_hid_FPCONF "-") add_library(GENERIC_F103R4TX_hid INTERFACE) target_compile_options(GENERIC_F103R4TX_hid INTERFACE - "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -20864,7 +21004,7 @@ set(GENERIC_F103R6HX_MCU cortex-m3) set(GENERIC_F103R6HX_FPCONF "-") add_library(GENERIC_F103R6HX INTERFACE) target_compile_options(GENERIC_F103R6HX INTERFACE - "SHELL:-DSTM32F103x6 " + "SHELL:-DSTM32F103x6" "SHELL:" "SHELL:" "SHELL: " @@ -20909,15 +21049,15 @@ target_compile_options(GENERIC_F103R6HX_serial_none INTERFACE ) add_library(GENERIC_F103R6HX_usb_CDC INTERFACE) target_compile_options(GENERIC_F103R6HX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F103R6HX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F103R6HX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F103R6HX_usb_HID INTERFACE) target_compile_options(GENERIC_F103R6HX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F103R6HX_usb_none INTERFACE) target_compile_options(GENERIC_F103R6HX_usb_none INTERFACE @@ -20946,7 +21086,7 @@ set(GENERIC_F103R6HX_dfu2_MCU cortex-m3) set(GENERIC_F103R6HX_dfu2_FPCONF "-") add_library(GENERIC_F103R6HX_dfu2 INTERFACE) target_compile_options(GENERIC_F103R6HX_dfu2 INTERFACE - "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -20988,7 +21128,7 @@ set(GENERIC_F103R6HX_dfuo_MCU cortex-m3) set(GENERIC_F103R6HX_dfuo_FPCONF "-") add_library(GENERIC_F103R6HX_dfuo INTERFACE) target_compile_options(GENERIC_F103R6HX_dfuo INTERFACE - "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -21030,7 +21170,7 @@ set(GENERIC_F103R6HX_hid_MCU cortex-m3) set(GENERIC_F103R6HX_hid_FPCONF "-") add_library(GENERIC_F103R6HX_hid INTERFACE) target_compile_options(GENERIC_F103R6HX_hid INTERFACE - "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -21072,7 +21212,7 @@ set(GENERIC_F103R6TX_MCU cortex-m3) set(GENERIC_F103R6TX_FPCONF "-") add_library(GENERIC_F103R6TX INTERFACE) target_compile_options(GENERIC_F103R6TX INTERFACE - "SHELL:-DSTM32F103x6 " + "SHELL:-DSTM32F103x6" "SHELL:" "SHELL:" "SHELL: " @@ -21117,15 +21257,15 @@ target_compile_options(GENERIC_F103R6TX_serial_none INTERFACE ) add_library(GENERIC_F103R6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F103R6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F103R6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F103R6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F103R6TX_usb_HID INTERFACE) target_compile_options(GENERIC_F103R6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F103R6TX_usb_none INTERFACE) target_compile_options(GENERIC_F103R6TX_usb_none INTERFACE @@ -21154,7 +21294,7 @@ set(GENERIC_F103R6TX_dfu2_MCU cortex-m3) set(GENERIC_F103R6TX_dfu2_FPCONF "-") add_library(GENERIC_F103R6TX_dfu2 INTERFACE) target_compile_options(GENERIC_F103R6TX_dfu2 INTERFACE - "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -21196,7 +21336,7 @@ set(GENERIC_F103R6TX_dfuo_MCU cortex-m3) set(GENERIC_F103R6TX_dfuo_FPCONF "-") add_library(GENERIC_F103R6TX_dfuo INTERFACE) target_compile_options(GENERIC_F103R6TX_dfuo INTERFACE - "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -21238,7 +21378,7 @@ set(GENERIC_F103R6TX_hid_MCU cortex-m3) set(GENERIC_F103R6TX_hid_FPCONF "-") add_library(GENERIC_F103R6TX_hid INTERFACE) target_compile_options(GENERIC_F103R6TX_hid INTERFACE - "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -21280,7 +21420,7 @@ set(GENERIC_F103R8HX_MCU cortex-m3) set(GENERIC_F103R8HX_FPCONF "-") add_library(GENERIC_F103R8HX INTERFACE) target_compile_options(GENERIC_F103R8HX INTERFACE - "SHELL:-DSTM32F103xB " + "SHELL:-DSTM32F103xB" "SHELL:" "SHELL:" "SHELL: " @@ -21325,15 +21465,15 @@ target_compile_options(GENERIC_F103R8HX_serial_none INTERFACE ) add_library(GENERIC_F103R8HX_usb_CDC INTERFACE) target_compile_options(GENERIC_F103R8HX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F103R8HX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F103R8HX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F103R8HX_usb_HID INTERFACE) target_compile_options(GENERIC_F103R8HX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F103R8HX_usb_none INTERFACE) target_compile_options(GENERIC_F103R8HX_usb_none INTERFACE @@ -21362,7 +21502,7 @@ set(GENERIC_F103R8HX_dfu2_MCU cortex-m3) set(GENERIC_F103R8HX_dfu2_FPCONF "-") add_library(GENERIC_F103R8HX_dfu2 INTERFACE) target_compile_options(GENERIC_F103R8HX_dfu2 INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -21404,7 +21544,7 @@ set(GENERIC_F103R8HX_dfuo_MCU cortex-m3) set(GENERIC_F103R8HX_dfuo_FPCONF "-") add_library(GENERIC_F103R8HX_dfuo INTERFACE) target_compile_options(GENERIC_F103R8HX_dfuo INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -21446,7 +21586,7 @@ set(GENERIC_F103R8HX_hid_MCU cortex-m3) set(GENERIC_F103R8HX_hid_FPCONF "-") add_library(GENERIC_F103R8HX_hid INTERFACE) target_compile_options(GENERIC_F103R8HX_hid INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -21488,7 +21628,7 @@ set(GENERIC_F103R8TX_MCU cortex-m3) set(GENERIC_F103R8TX_FPCONF "-") add_library(GENERIC_F103R8TX INTERFACE) target_compile_options(GENERIC_F103R8TX INTERFACE - "SHELL:-DSTM32F103xB " + "SHELL:-DSTM32F103xB" "SHELL:" "SHELL:" "SHELL: " @@ -21533,15 +21673,15 @@ target_compile_options(GENERIC_F103R8TX_serial_none INTERFACE ) add_library(GENERIC_F103R8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F103R8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F103R8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F103R8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F103R8TX_usb_HID INTERFACE) target_compile_options(GENERIC_F103R8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F103R8TX_usb_none INTERFACE) target_compile_options(GENERIC_F103R8TX_usb_none INTERFACE @@ -21570,7 +21710,7 @@ set(GENERIC_F103R8TX_dfu2_MCU cortex-m3) set(GENERIC_F103R8TX_dfu2_FPCONF "-") add_library(GENERIC_F103R8TX_dfu2 INTERFACE) target_compile_options(GENERIC_F103R8TX_dfu2 INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -21612,7 +21752,7 @@ set(GENERIC_F103R8TX_dfuo_MCU cortex-m3) set(GENERIC_F103R8TX_dfuo_FPCONF "-") add_library(GENERIC_F103R8TX_dfuo INTERFACE) target_compile_options(GENERIC_F103R8TX_dfuo INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -21654,7 +21794,7 @@ set(GENERIC_F103R8TX_hid_MCU cortex-m3) set(GENERIC_F103R8TX_hid_FPCONF "-") add_library(GENERIC_F103R8TX_hid INTERFACE) target_compile_options(GENERIC_F103R8TX_hid INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -21696,7 +21836,7 @@ set(GENERIC_F103RBHX_MCU cortex-m3) set(GENERIC_F103RBHX_FPCONF "-") add_library(GENERIC_F103RBHX INTERFACE) target_compile_options(GENERIC_F103RBHX INTERFACE - "SHELL:-DSTM32F103xB " + "SHELL:-DSTM32F103xB" "SHELL:" "SHELL:" "SHELL: " @@ -21741,15 +21881,15 @@ target_compile_options(GENERIC_F103RBHX_serial_none INTERFACE ) add_library(GENERIC_F103RBHX_usb_CDC INTERFACE) target_compile_options(GENERIC_F103RBHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F103RBHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F103RBHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F103RBHX_usb_HID INTERFACE) target_compile_options(GENERIC_F103RBHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F103RBHX_usb_none INTERFACE) target_compile_options(GENERIC_F103RBHX_usb_none INTERFACE @@ -21778,7 +21918,7 @@ set(GENERIC_F103RBHX_dfu2_MCU cortex-m3) set(GENERIC_F103RBHX_dfu2_FPCONF "-") add_library(GENERIC_F103RBHX_dfu2 INTERFACE) target_compile_options(GENERIC_F103RBHX_dfu2 INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -21820,7 +21960,7 @@ set(GENERIC_F103RBHX_dfuo_MCU cortex-m3) set(GENERIC_F103RBHX_dfuo_FPCONF "-") add_library(GENERIC_F103RBHX_dfuo INTERFACE) target_compile_options(GENERIC_F103RBHX_dfuo INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -21862,7 +22002,7 @@ set(GENERIC_F103RBHX_hid_MCU cortex-m3) set(GENERIC_F103RBHX_hid_FPCONF "-") add_library(GENERIC_F103RBHX_hid INTERFACE) target_compile_options(GENERIC_F103RBHX_hid INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -21904,7 +22044,7 @@ set(GENERIC_F103RBTX_MCU cortex-m3) set(GENERIC_F103RBTX_FPCONF "-") add_library(GENERIC_F103RBTX INTERFACE) target_compile_options(GENERIC_F103RBTX INTERFACE - "SHELL:-DSTM32F103xB " + "SHELL:-DSTM32F103xB" "SHELL:" "SHELL:" "SHELL: " @@ -21949,15 +22089,15 @@ target_compile_options(GENERIC_F103RBTX_serial_none INTERFACE ) add_library(GENERIC_F103RBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F103RBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F103RBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F103RBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F103RBTX_usb_HID INTERFACE) target_compile_options(GENERIC_F103RBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F103RBTX_usb_none INTERFACE) target_compile_options(GENERIC_F103RBTX_usb_none INTERFACE @@ -21986,7 +22126,7 @@ set(GENERIC_F103RBTX_dfu2_MCU cortex-m3) set(GENERIC_F103RBTX_dfu2_FPCONF "-") add_library(GENERIC_F103RBTX_dfu2 INTERFACE) target_compile_options(GENERIC_F103RBTX_dfu2 INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -22028,7 +22168,7 @@ set(GENERIC_F103RBTX_dfuo_MCU cortex-m3) set(GENERIC_F103RBTX_dfuo_FPCONF "-") add_library(GENERIC_F103RBTX_dfuo INTERFACE) target_compile_options(GENERIC_F103RBTX_dfuo INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -22070,7 +22210,7 @@ set(GENERIC_F103RBTX_hid_MCU cortex-m3) set(GENERIC_F103RBTX_hid_FPCONF "-") add_library(GENERIC_F103RBTX_hid INTERFACE) target_compile_options(GENERIC_F103RBTX_hid INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -22112,7 +22252,7 @@ set(GENERIC_F103RCTX_MCU cortex-m3) set(GENERIC_F103RCTX_FPCONF "-") add_library(GENERIC_F103RCTX INTERFACE) target_compile_options(GENERIC_F103RCTX INTERFACE - "SHELL:-DSTM32F103xE " + "SHELL:-DSTM32F103xE" "SHELL:" "SHELL:" "SHELL: " @@ -22157,15 +22297,15 @@ target_compile_options(GENERIC_F103RCTX_serial_none INTERFACE ) add_library(GENERIC_F103RCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F103RCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F103RCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F103RCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F103RCTX_usb_HID INTERFACE) target_compile_options(GENERIC_F103RCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F103RCTX_usb_none INTERFACE) target_compile_options(GENERIC_F103RCTX_usb_none INTERFACE @@ -22194,7 +22334,7 @@ set(GENERIC_F103RCTX_dfu2_MCU cortex-m3) set(GENERIC_F103RCTX_dfu2_FPCONF "-") add_library(GENERIC_F103RCTX_dfu2 INTERFACE) target_compile_options(GENERIC_F103RCTX_dfu2 INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -22236,7 +22376,7 @@ set(GENERIC_F103RCTX_dfuo_MCU cortex-m3) set(GENERIC_F103RCTX_dfuo_FPCONF "-") add_library(GENERIC_F103RCTX_dfuo INTERFACE) target_compile_options(GENERIC_F103RCTX_dfuo INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -22278,7 +22418,7 @@ set(GENERIC_F103RCTX_hid_MCU cortex-m3) set(GENERIC_F103RCTX_hid_FPCONF "-") add_library(GENERIC_F103RCTX_hid INTERFACE) target_compile_options(GENERIC_F103RCTX_hid INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -22320,7 +22460,7 @@ set(GENERIC_F103RCYX_MCU cortex-m3) set(GENERIC_F103RCYX_FPCONF "-") add_library(GENERIC_F103RCYX INTERFACE) target_compile_options(GENERIC_F103RCYX INTERFACE - "SHELL:-DSTM32F103xE " + "SHELL:-DSTM32F103xE" "SHELL:" "SHELL:" "SHELL: " @@ -22365,15 +22505,15 @@ target_compile_options(GENERIC_F103RCYX_serial_none INTERFACE ) add_library(GENERIC_F103RCYX_usb_CDC INTERFACE) target_compile_options(GENERIC_F103RCYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F103RCYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F103RCYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F103RCYX_usb_HID INTERFACE) target_compile_options(GENERIC_F103RCYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F103RCYX_usb_none INTERFACE) target_compile_options(GENERIC_F103RCYX_usb_none INTERFACE @@ -22402,7 +22542,7 @@ set(GENERIC_F103RCYX_dfu2_MCU cortex-m3) set(GENERIC_F103RCYX_dfu2_FPCONF "-") add_library(GENERIC_F103RCYX_dfu2 INTERFACE) target_compile_options(GENERIC_F103RCYX_dfu2 INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -22444,7 +22584,7 @@ set(GENERIC_F103RCYX_dfuo_MCU cortex-m3) set(GENERIC_F103RCYX_dfuo_FPCONF "-") add_library(GENERIC_F103RCYX_dfuo INTERFACE) target_compile_options(GENERIC_F103RCYX_dfuo INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -22486,7 +22626,7 @@ set(GENERIC_F103RCYX_hid_MCU cortex-m3) set(GENERIC_F103RCYX_hid_FPCONF "-") add_library(GENERIC_F103RCYX_hid INTERFACE) target_compile_options(GENERIC_F103RCYX_hid INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -22528,7 +22668,7 @@ set(GENERIC_F103RDTX_MCU cortex-m3) set(GENERIC_F103RDTX_FPCONF "-") add_library(GENERIC_F103RDTX INTERFACE) target_compile_options(GENERIC_F103RDTX INTERFACE - "SHELL:-DSTM32F103xE " + "SHELL:-DSTM32F103xE" "SHELL:" "SHELL:" "SHELL: " @@ -22573,15 +22713,15 @@ target_compile_options(GENERIC_F103RDTX_serial_none INTERFACE ) add_library(GENERIC_F103RDTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F103RDTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F103RDTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F103RDTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F103RDTX_usb_HID INTERFACE) target_compile_options(GENERIC_F103RDTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F103RDTX_usb_none INTERFACE) target_compile_options(GENERIC_F103RDTX_usb_none INTERFACE @@ -22610,7 +22750,7 @@ set(GENERIC_F103RDTX_dfu2_MCU cortex-m3) set(GENERIC_F103RDTX_dfu2_FPCONF "-") add_library(GENERIC_F103RDTX_dfu2 INTERFACE) target_compile_options(GENERIC_F103RDTX_dfu2 INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -22652,7 +22792,7 @@ set(GENERIC_F103RDTX_dfuo_MCU cortex-m3) set(GENERIC_F103RDTX_dfuo_FPCONF "-") add_library(GENERIC_F103RDTX_dfuo INTERFACE) target_compile_options(GENERIC_F103RDTX_dfuo INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -22694,7 +22834,7 @@ set(GENERIC_F103RDTX_hid_MCU cortex-m3) set(GENERIC_F103RDTX_hid_FPCONF "-") add_library(GENERIC_F103RDTX_hid INTERFACE) target_compile_options(GENERIC_F103RDTX_hid INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -22736,7 +22876,7 @@ set(GENERIC_F103RDYX_MCU cortex-m3) set(GENERIC_F103RDYX_FPCONF "-") add_library(GENERIC_F103RDYX INTERFACE) target_compile_options(GENERIC_F103RDYX INTERFACE - "SHELL:-DSTM32F103xE " + "SHELL:-DSTM32F103xE" "SHELL:" "SHELL:" "SHELL: " @@ -22781,15 +22921,15 @@ target_compile_options(GENERIC_F103RDYX_serial_none INTERFACE ) add_library(GENERIC_F103RDYX_usb_CDC INTERFACE) target_compile_options(GENERIC_F103RDYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F103RDYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F103RDYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F103RDYX_usb_HID INTERFACE) target_compile_options(GENERIC_F103RDYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F103RDYX_usb_none INTERFACE) target_compile_options(GENERIC_F103RDYX_usb_none INTERFACE @@ -22818,7 +22958,7 @@ set(GENERIC_F103RDYX_dfu2_MCU cortex-m3) set(GENERIC_F103RDYX_dfu2_FPCONF "-") add_library(GENERIC_F103RDYX_dfu2 INTERFACE) target_compile_options(GENERIC_F103RDYX_dfu2 INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -22860,7 +23000,7 @@ set(GENERIC_F103RDYX_dfuo_MCU cortex-m3) set(GENERIC_F103RDYX_dfuo_FPCONF "-") add_library(GENERIC_F103RDYX_dfuo INTERFACE) target_compile_options(GENERIC_F103RDYX_dfuo INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -22902,7 +23042,7 @@ set(GENERIC_F103RDYX_hid_MCU cortex-m3) set(GENERIC_F103RDYX_hid_FPCONF "-") add_library(GENERIC_F103RDYX_hid INTERFACE) target_compile_options(GENERIC_F103RDYX_hid INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -22944,7 +23084,7 @@ set(GENERIC_F103RETX_MCU cortex-m3) set(GENERIC_F103RETX_FPCONF "-") add_library(GENERIC_F103RETX INTERFACE) target_compile_options(GENERIC_F103RETX INTERFACE - "SHELL:-DSTM32F103xE " + "SHELL:-DSTM32F103xE" "SHELL:" "SHELL:" "SHELL: " @@ -22989,15 +23129,15 @@ target_compile_options(GENERIC_F103RETX_serial_none INTERFACE ) add_library(GENERIC_F103RETX_usb_CDC INTERFACE) target_compile_options(GENERIC_F103RETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F103RETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F103RETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F103RETX_usb_HID INTERFACE) target_compile_options(GENERIC_F103RETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F103RETX_usb_none INTERFACE) target_compile_options(GENERIC_F103RETX_usb_none INTERFACE @@ -23026,7 +23166,7 @@ set(GENERIC_F103RETX_dfu2_MCU cortex-m3) set(GENERIC_F103RETX_dfu2_FPCONF "-") add_library(GENERIC_F103RETX_dfu2 INTERFACE) target_compile_options(GENERIC_F103RETX_dfu2 INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -23068,7 +23208,7 @@ set(GENERIC_F103RETX_dfuo_MCU cortex-m3) set(GENERIC_F103RETX_dfuo_FPCONF "-") add_library(GENERIC_F103RETX_dfuo INTERFACE) target_compile_options(GENERIC_F103RETX_dfuo INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -23110,7 +23250,7 @@ set(GENERIC_F103RETX_hid_MCU cortex-m3) set(GENERIC_F103RETX_hid_FPCONF "-") add_library(GENERIC_F103RETX_hid INTERFACE) target_compile_options(GENERIC_F103RETX_hid INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -23152,7 +23292,7 @@ set(GENERIC_F103REYX_MCU cortex-m3) set(GENERIC_F103REYX_FPCONF "-") add_library(GENERIC_F103REYX INTERFACE) target_compile_options(GENERIC_F103REYX INTERFACE - "SHELL:-DSTM32F103xE " + "SHELL:-DSTM32F103xE" "SHELL:" "SHELL:" "SHELL: " @@ -23197,15 +23337,15 @@ target_compile_options(GENERIC_F103REYX_serial_none INTERFACE ) add_library(GENERIC_F103REYX_usb_CDC INTERFACE) target_compile_options(GENERIC_F103REYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F103REYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F103REYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F103REYX_usb_HID INTERFACE) target_compile_options(GENERIC_F103REYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F103REYX_usb_none INTERFACE) target_compile_options(GENERIC_F103REYX_usb_none INTERFACE @@ -23234,7 +23374,7 @@ set(GENERIC_F103REYX_dfu2_MCU cortex-m3) set(GENERIC_F103REYX_dfu2_FPCONF "-") add_library(GENERIC_F103REYX_dfu2 INTERFACE) target_compile_options(GENERIC_F103REYX_dfu2 INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -23276,7 +23416,7 @@ set(GENERIC_F103REYX_dfuo_MCU cortex-m3) set(GENERIC_F103REYX_dfuo_FPCONF "-") add_library(GENERIC_F103REYX_dfuo INTERFACE) target_compile_options(GENERIC_F103REYX_dfuo INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -23318,7 +23458,7 @@ set(GENERIC_F103REYX_hid_MCU cortex-m3) set(GENERIC_F103REYX_hid_FPCONF "-") add_library(GENERIC_F103REYX_hid INTERFACE) target_compile_options(GENERIC_F103REYX_hid INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -23360,7 +23500,7 @@ set(GENERIC_F103RFTX_MCU cortex-m3) set(GENERIC_F103RFTX_FPCONF "-") add_library(GENERIC_F103RFTX INTERFACE) target_compile_options(GENERIC_F103RFTX INTERFACE - "SHELL:-DSTM32F103xG " + "SHELL:-DSTM32F103xG" "SHELL:" "SHELL:" "SHELL: " @@ -23405,15 +23545,15 @@ target_compile_options(GENERIC_F103RFTX_serial_none INTERFACE ) add_library(GENERIC_F103RFTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F103RFTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F103RFTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F103RFTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F103RFTX_usb_HID INTERFACE) target_compile_options(GENERIC_F103RFTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F103RFTX_usb_none INTERFACE) target_compile_options(GENERIC_F103RFTX_usb_none INTERFACE @@ -23442,7 +23582,7 @@ set(GENERIC_F103RFTX_dfu2_MCU cortex-m3) set(GENERIC_F103RFTX_dfu2_FPCONF "-") add_library(GENERIC_F103RFTX_dfu2 INTERFACE) target_compile_options(GENERIC_F103RFTX_dfu2 INTERFACE - "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -23484,7 +23624,7 @@ set(GENERIC_F103RFTX_dfuo_MCU cortex-m3) set(GENERIC_F103RFTX_dfuo_FPCONF "-") add_library(GENERIC_F103RFTX_dfuo INTERFACE) target_compile_options(GENERIC_F103RFTX_dfuo INTERFACE - "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -23526,7 +23666,7 @@ set(GENERIC_F103RFTX_hid_MCU cortex-m3) set(GENERIC_F103RFTX_hid_FPCONF "-") add_library(GENERIC_F103RFTX_hid INTERFACE) target_compile_options(GENERIC_F103RFTX_hid INTERFACE - "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -23568,7 +23708,7 @@ set(GENERIC_F103RGTX_MCU cortex-m3) set(GENERIC_F103RGTX_FPCONF "-") add_library(GENERIC_F103RGTX INTERFACE) target_compile_options(GENERIC_F103RGTX INTERFACE - "SHELL:-DSTM32F103xG " + "SHELL:-DSTM32F103xG" "SHELL:" "SHELL:" "SHELL: " @@ -23613,15 +23753,15 @@ target_compile_options(GENERIC_F103RGTX_serial_none INTERFACE ) add_library(GENERIC_F103RGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F103RGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F103RGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F103RGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F103RGTX_usb_HID INTERFACE) target_compile_options(GENERIC_F103RGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F103RGTX_usb_none INTERFACE) target_compile_options(GENERIC_F103RGTX_usb_none INTERFACE @@ -23650,7 +23790,7 @@ set(GENERIC_F103RGTX_dfu2_MCU cortex-m3) set(GENERIC_F103RGTX_dfu2_FPCONF "-") add_library(GENERIC_F103RGTX_dfu2 INTERFACE) target_compile_options(GENERIC_F103RGTX_dfu2 INTERFACE - "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -23692,7 +23832,7 @@ set(GENERIC_F103RGTX_dfuo_MCU cortex-m3) set(GENERIC_F103RGTX_dfuo_FPCONF "-") add_library(GENERIC_F103RGTX_dfuo INTERFACE) target_compile_options(GENERIC_F103RGTX_dfuo INTERFACE - "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -23734,7 +23874,7 @@ set(GENERIC_F103RGTX_hid_MCU cortex-m3) set(GENERIC_F103RGTX_hid_FPCONF "-") add_library(GENERIC_F103RGTX_hid INTERFACE) target_compile_options(GENERIC_F103RGTX_hid INTERFACE - "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -23776,7 +23916,7 @@ set(GENERIC_F103T4UX_MCU cortex-m3) set(GENERIC_F103T4UX_FPCONF "-") add_library(GENERIC_F103T4UX INTERFACE) target_compile_options(GENERIC_F103T4UX INTERFACE - "SHELL:-DSTM32F103x6 " + "SHELL:-DSTM32F103x6" "SHELL:" "SHELL:" "SHELL: " @@ -23821,15 +23961,15 @@ target_compile_options(GENERIC_F103T4UX_serial_none INTERFACE ) add_library(GENERIC_F103T4UX_usb_CDC INTERFACE) target_compile_options(GENERIC_F103T4UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F103T4UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F103T4UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F103T4UX_usb_HID INTERFACE) target_compile_options(GENERIC_F103T4UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F103T4UX_usb_none INTERFACE) target_compile_options(GENERIC_F103T4UX_usb_none INTERFACE @@ -23858,7 +23998,7 @@ set(GENERIC_F103T4UX_dfu2_MCU cortex-m3) set(GENERIC_F103T4UX_dfu2_FPCONF "-") add_library(GENERIC_F103T4UX_dfu2 INTERFACE) target_compile_options(GENERIC_F103T4UX_dfu2 INTERFACE - "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -23900,7 +24040,7 @@ set(GENERIC_F103T4UX_dfuo_MCU cortex-m3) set(GENERIC_F103T4UX_dfuo_FPCONF "-") add_library(GENERIC_F103T4UX_dfuo INTERFACE) target_compile_options(GENERIC_F103T4UX_dfuo INTERFACE - "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -23942,7 +24082,7 @@ set(GENERIC_F103T4UX_hid_MCU cortex-m3) set(GENERIC_F103T4UX_hid_FPCONF "-") add_library(GENERIC_F103T4UX_hid INTERFACE) target_compile_options(GENERIC_F103T4UX_hid INTERFACE - "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -23984,7 +24124,7 @@ set(GENERIC_F103T6UX_MCU cortex-m3) set(GENERIC_F103T6UX_FPCONF "-") add_library(GENERIC_F103T6UX INTERFACE) target_compile_options(GENERIC_F103T6UX INTERFACE - "SHELL:-DSTM32F103x6 " + "SHELL:-DSTM32F103x6" "SHELL:" "SHELL:" "SHELL: " @@ -24029,15 +24169,15 @@ target_compile_options(GENERIC_F103T6UX_serial_none INTERFACE ) add_library(GENERIC_F103T6UX_usb_CDC INTERFACE) target_compile_options(GENERIC_F103T6UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F103T6UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F103T6UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F103T6UX_usb_HID INTERFACE) target_compile_options(GENERIC_F103T6UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F103T6UX_usb_none INTERFACE) target_compile_options(GENERIC_F103T6UX_usb_none INTERFACE @@ -24066,7 +24206,7 @@ set(GENERIC_F103T6UX_dfu2_MCU cortex-m3) set(GENERIC_F103T6UX_dfu2_FPCONF "-") add_library(GENERIC_F103T6UX_dfu2 INTERFACE) target_compile_options(GENERIC_F103T6UX_dfu2 INTERFACE - "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -24108,7 +24248,7 @@ set(GENERIC_F103T6UX_dfuo_MCU cortex-m3) set(GENERIC_F103T6UX_dfuo_FPCONF "-") add_library(GENERIC_F103T6UX_dfuo INTERFACE) target_compile_options(GENERIC_F103T6UX_dfuo INTERFACE - "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -24150,7 +24290,7 @@ set(GENERIC_F103T6UX_hid_MCU cortex-m3) set(GENERIC_F103T6UX_hid_FPCONF "-") add_library(GENERIC_F103T6UX_hid INTERFACE) target_compile_options(GENERIC_F103T6UX_hid INTERFACE - "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -24192,7 +24332,7 @@ set(GENERIC_F103T8UX_MCU cortex-m3) set(GENERIC_F103T8UX_FPCONF "-") add_library(GENERIC_F103T8UX INTERFACE) target_compile_options(GENERIC_F103T8UX INTERFACE - "SHELL:-DSTM32F103xB " + "SHELL:-DSTM32F103xB" "SHELL:" "SHELL:" "SHELL: " @@ -24237,15 +24377,15 @@ target_compile_options(GENERIC_F103T8UX_serial_none INTERFACE ) add_library(GENERIC_F103T8UX_usb_CDC INTERFACE) target_compile_options(GENERIC_F103T8UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F103T8UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F103T8UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F103T8UX_usb_HID INTERFACE) target_compile_options(GENERIC_F103T8UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F103T8UX_usb_none INTERFACE) target_compile_options(GENERIC_F103T8UX_usb_none INTERFACE @@ -24274,7 +24414,7 @@ set(GENERIC_F103T8UX_dfu2_MCU cortex-m3) set(GENERIC_F103T8UX_dfu2_FPCONF "-") add_library(GENERIC_F103T8UX_dfu2 INTERFACE) target_compile_options(GENERIC_F103T8UX_dfu2 INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -24316,7 +24456,7 @@ set(GENERIC_F103T8UX_dfuo_MCU cortex-m3) set(GENERIC_F103T8UX_dfuo_FPCONF "-") add_library(GENERIC_F103T8UX_dfuo INTERFACE) target_compile_options(GENERIC_F103T8UX_dfuo INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -24358,7 +24498,7 @@ set(GENERIC_F103T8UX_hid_MCU cortex-m3) set(GENERIC_F103T8UX_hid_FPCONF "-") add_library(GENERIC_F103T8UX_hid INTERFACE) target_compile_options(GENERIC_F103T8UX_hid INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -24400,7 +24540,7 @@ set(GENERIC_F103TBUX_MCU cortex-m3) set(GENERIC_F103TBUX_FPCONF "-") add_library(GENERIC_F103TBUX INTERFACE) target_compile_options(GENERIC_F103TBUX INTERFACE - "SHELL:-DSTM32F103xB " + "SHELL:-DSTM32F103xB" "SHELL:" "SHELL:" "SHELL: " @@ -24445,15 +24585,15 @@ target_compile_options(GENERIC_F103TBUX_serial_none INTERFACE ) add_library(GENERIC_F103TBUX_usb_CDC INTERFACE) target_compile_options(GENERIC_F103TBUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F103TBUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F103TBUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F103TBUX_usb_HID INTERFACE) target_compile_options(GENERIC_F103TBUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F103TBUX_usb_none INTERFACE) target_compile_options(GENERIC_F103TBUX_usb_none INTERFACE @@ -24482,7 +24622,7 @@ set(GENERIC_F103TBUX_dfu2_MCU cortex-m3) set(GENERIC_F103TBUX_dfu2_FPCONF "-") add_library(GENERIC_F103TBUX_dfu2 INTERFACE) target_compile_options(GENERIC_F103TBUX_dfu2 INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -24524,7 +24664,7 @@ set(GENERIC_F103TBUX_dfuo_MCU cortex-m3) set(GENERIC_F103TBUX_dfuo_FPCONF "-") add_library(GENERIC_F103TBUX_dfuo INTERFACE) target_compile_options(GENERIC_F103TBUX_dfuo INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -24566,7 +24706,7 @@ set(GENERIC_F103TBUX_hid_MCU cortex-m3) set(GENERIC_F103TBUX_hid_FPCONF "-") add_library(GENERIC_F103TBUX_hid INTERFACE) target_compile_options(GENERIC_F103TBUX_hid INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -24608,7 +24748,7 @@ set(GENERIC_F103V8HX_MCU cortex-m3) set(GENERIC_F103V8HX_FPCONF "-") add_library(GENERIC_F103V8HX INTERFACE) target_compile_options(GENERIC_F103V8HX INTERFACE - "SHELL:-DSTM32F103xB " + "SHELL:-DSTM32F103xB" "SHELL:" "SHELL:" "SHELL: " @@ -24653,15 +24793,15 @@ target_compile_options(GENERIC_F103V8HX_serial_none INTERFACE ) add_library(GENERIC_F103V8HX_usb_CDC INTERFACE) target_compile_options(GENERIC_F103V8HX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F103V8HX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F103V8HX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F103V8HX_usb_HID INTERFACE) target_compile_options(GENERIC_F103V8HX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F103V8HX_usb_none INTERFACE) target_compile_options(GENERIC_F103V8HX_usb_none INTERFACE @@ -24690,7 +24830,7 @@ set(GENERIC_F103V8HX_dfu2_MCU cortex-m3) set(GENERIC_F103V8HX_dfu2_FPCONF "-") add_library(GENERIC_F103V8HX_dfu2 INTERFACE) target_compile_options(GENERIC_F103V8HX_dfu2 INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -24732,7 +24872,7 @@ set(GENERIC_F103V8HX_dfuo_MCU cortex-m3) set(GENERIC_F103V8HX_dfuo_FPCONF "-") add_library(GENERIC_F103V8HX_dfuo INTERFACE) target_compile_options(GENERIC_F103V8HX_dfuo INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -24774,7 +24914,7 @@ set(GENERIC_F103V8HX_hid_MCU cortex-m3) set(GENERIC_F103V8HX_hid_FPCONF "-") add_library(GENERIC_F103V8HX_hid INTERFACE) target_compile_options(GENERIC_F103V8HX_hid INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -24816,7 +24956,7 @@ set(GENERIC_F103V8TX_MCU cortex-m3) set(GENERIC_F103V8TX_FPCONF "-") add_library(GENERIC_F103V8TX INTERFACE) target_compile_options(GENERIC_F103V8TX INTERFACE - "SHELL:-DSTM32F103xB " + "SHELL:-DSTM32F103xB" "SHELL:" "SHELL:" "SHELL: " @@ -24861,15 +25001,15 @@ target_compile_options(GENERIC_F103V8TX_serial_none INTERFACE ) add_library(GENERIC_F103V8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F103V8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F103V8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F103V8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F103V8TX_usb_HID INTERFACE) target_compile_options(GENERIC_F103V8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F103V8TX_usb_none INTERFACE) target_compile_options(GENERIC_F103V8TX_usb_none INTERFACE @@ -24898,7 +25038,7 @@ set(GENERIC_F103V8TX_dfu2_MCU cortex-m3) set(GENERIC_F103V8TX_dfu2_FPCONF "-") add_library(GENERIC_F103V8TX_dfu2 INTERFACE) target_compile_options(GENERIC_F103V8TX_dfu2 INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -24940,7 +25080,7 @@ set(GENERIC_F103V8TX_dfuo_MCU cortex-m3) set(GENERIC_F103V8TX_dfuo_FPCONF "-") add_library(GENERIC_F103V8TX_dfuo INTERFACE) target_compile_options(GENERIC_F103V8TX_dfuo INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -24982,7 +25122,7 @@ set(GENERIC_F103V8TX_hid_MCU cortex-m3) set(GENERIC_F103V8TX_hid_FPCONF "-") add_library(GENERIC_F103V8TX_hid INTERFACE) target_compile_options(GENERIC_F103V8TX_hid INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -25024,7 +25164,7 @@ set(GENERIC_F103VBHX_MCU cortex-m3) set(GENERIC_F103VBHX_FPCONF "-") add_library(GENERIC_F103VBHX INTERFACE) target_compile_options(GENERIC_F103VBHX INTERFACE - "SHELL:-DSTM32F103xB " + "SHELL:-DSTM32F103xB" "SHELL:" "SHELL:" "SHELL: " @@ -25069,15 +25209,15 @@ target_compile_options(GENERIC_F103VBHX_serial_none INTERFACE ) add_library(GENERIC_F103VBHX_usb_CDC INTERFACE) target_compile_options(GENERIC_F103VBHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F103VBHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F103VBHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F103VBHX_usb_HID INTERFACE) target_compile_options(GENERIC_F103VBHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F103VBHX_usb_none INTERFACE) target_compile_options(GENERIC_F103VBHX_usb_none INTERFACE @@ -25106,7 +25246,7 @@ set(GENERIC_F103VBHX_dfu2_MCU cortex-m3) set(GENERIC_F103VBHX_dfu2_FPCONF "-") add_library(GENERIC_F103VBHX_dfu2 INTERFACE) target_compile_options(GENERIC_F103VBHX_dfu2 INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -25148,7 +25288,7 @@ set(GENERIC_F103VBHX_dfuo_MCU cortex-m3) set(GENERIC_F103VBHX_dfuo_FPCONF "-") add_library(GENERIC_F103VBHX_dfuo INTERFACE) target_compile_options(GENERIC_F103VBHX_dfuo INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -25190,7 +25330,7 @@ set(GENERIC_F103VBHX_hid_MCU cortex-m3) set(GENERIC_F103VBHX_hid_FPCONF "-") add_library(GENERIC_F103VBHX_hid INTERFACE) target_compile_options(GENERIC_F103VBHX_hid INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -25232,7 +25372,7 @@ set(GENERIC_F103VBIX_MCU cortex-m3) set(GENERIC_F103VBIX_FPCONF "-") add_library(GENERIC_F103VBIX INTERFACE) target_compile_options(GENERIC_F103VBIX INTERFACE - "SHELL:-DSTM32F103xB " + "SHELL:-DSTM32F103xB" "SHELL:" "SHELL:" "SHELL: " @@ -25277,15 +25417,15 @@ target_compile_options(GENERIC_F103VBIX_serial_none INTERFACE ) add_library(GENERIC_F103VBIX_usb_CDC INTERFACE) target_compile_options(GENERIC_F103VBIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F103VBIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F103VBIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F103VBIX_usb_HID INTERFACE) target_compile_options(GENERIC_F103VBIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F103VBIX_usb_none INTERFACE) target_compile_options(GENERIC_F103VBIX_usb_none INTERFACE @@ -25314,7 +25454,7 @@ set(GENERIC_F103VBIX_dfu2_MCU cortex-m3) set(GENERIC_F103VBIX_dfu2_FPCONF "-") add_library(GENERIC_F103VBIX_dfu2 INTERFACE) target_compile_options(GENERIC_F103VBIX_dfu2 INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -25356,7 +25496,7 @@ set(GENERIC_F103VBIX_dfuo_MCU cortex-m3) set(GENERIC_F103VBIX_dfuo_FPCONF "-") add_library(GENERIC_F103VBIX_dfuo INTERFACE) target_compile_options(GENERIC_F103VBIX_dfuo INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -25398,7 +25538,7 @@ set(GENERIC_F103VBIX_hid_MCU cortex-m3) set(GENERIC_F103VBIX_hid_FPCONF "-") add_library(GENERIC_F103VBIX_hid INTERFACE) target_compile_options(GENERIC_F103VBIX_hid INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -25440,7 +25580,7 @@ set(GENERIC_F103VBTX_MCU cortex-m3) set(GENERIC_F103VBTX_FPCONF "-") add_library(GENERIC_F103VBTX INTERFACE) target_compile_options(GENERIC_F103VBTX INTERFACE - "SHELL:-DSTM32F103xB " + "SHELL:-DSTM32F103xB" "SHELL:" "SHELL:" "SHELL: " @@ -25485,15 +25625,15 @@ target_compile_options(GENERIC_F103VBTX_serial_none INTERFACE ) add_library(GENERIC_F103VBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F103VBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F103VBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F103VBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F103VBTX_usb_HID INTERFACE) target_compile_options(GENERIC_F103VBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F103VBTX_usb_none INTERFACE) target_compile_options(GENERIC_F103VBTX_usb_none INTERFACE @@ -25522,7 +25662,7 @@ set(GENERIC_F103VBTX_dfu2_MCU cortex-m3) set(GENERIC_F103VBTX_dfu2_FPCONF "-") add_library(GENERIC_F103VBTX_dfu2 INTERFACE) target_compile_options(GENERIC_F103VBTX_dfu2 INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -25564,7 +25704,7 @@ set(GENERIC_F103VBTX_dfuo_MCU cortex-m3) set(GENERIC_F103VBTX_dfuo_FPCONF "-") add_library(GENERIC_F103VBTX_dfuo INTERFACE) target_compile_options(GENERIC_F103VBTX_dfuo INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -25606,7 +25746,7 @@ set(GENERIC_F103VBTX_hid_MCU cortex-m3) set(GENERIC_F103VBTX_hid_FPCONF "-") add_library(GENERIC_F103VBTX_hid INTERFACE) target_compile_options(GENERIC_F103VBTX_hid INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -25648,7 +25788,7 @@ set(GENERIC_F103VCHX_MCU cortex-m3) set(GENERIC_F103VCHX_FPCONF "-") add_library(GENERIC_F103VCHX INTERFACE) target_compile_options(GENERIC_F103VCHX INTERFACE - "SHELL:-DSTM32F103xE " + "SHELL:-DSTM32F103xE" "SHELL:" "SHELL:" "SHELL: " @@ -25693,15 +25833,15 @@ target_compile_options(GENERIC_F103VCHX_serial_none INTERFACE ) add_library(GENERIC_F103VCHX_usb_CDC INTERFACE) target_compile_options(GENERIC_F103VCHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F103VCHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F103VCHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F103VCHX_usb_HID INTERFACE) target_compile_options(GENERIC_F103VCHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F103VCHX_usb_none INTERFACE) target_compile_options(GENERIC_F103VCHX_usb_none INTERFACE @@ -25730,7 +25870,7 @@ set(GENERIC_F103VCHX_dfu2_MCU cortex-m3) set(GENERIC_F103VCHX_dfu2_FPCONF "-") add_library(GENERIC_F103VCHX_dfu2 INTERFACE) target_compile_options(GENERIC_F103VCHX_dfu2 INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -25772,7 +25912,7 @@ set(GENERIC_F103VCHX_dfuo_MCU cortex-m3) set(GENERIC_F103VCHX_dfuo_FPCONF "-") add_library(GENERIC_F103VCHX_dfuo INTERFACE) target_compile_options(GENERIC_F103VCHX_dfuo INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -25814,7 +25954,7 @@ set(GENERIC_F103VCHX_hid_MCU cortex-m3) set(GENERIC_F103VCHX_hid_FPCONF "-") add_library(GENERIC_F103VCHX_hid INTERFACE) target_compile_options(GENERIC_F103VCHX_hid INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -25856,7 +25996,7 @@ set(GENERIC_F103VCTX_MCU cortex-m3) set(GENERIC_F103VCTX_FPCONF "-") add_library(GENERIC_F103VCTX INTERFACE) target_compile_options(GENERIC_F103VCTX INTERFACE - "SHELL:-DSTM32F103xE " + "SHELL:-DSTM32F103xE" "SHELL:" "SHELL:" "SHELL: " @@ -25901,15 +26041,15 @@ target_compile_options(GENERIC_F103VCTX_serial_none INTERFACE ) add_library(GENERIC_F103VCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F103VCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F103VCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F103VCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F103VCTX_usb_HID INTERFACE) target_compile_options(GENERIC_F103VCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F103VCTX_usb_none INTERFACE) target_compile_options(GENERIC_F103VCTX_usb_none INTERFACE @@ -25938,7 +26078,7 @@ set(GENERIC_F103VCTX_dfu2_MCU cortex-m3) set(GENERIC_F103VCTX_dfu2_FPCONF "-") add_library(GENERIC_F103VCTX_dfu2 INTERFACE) target_compile_options(GENERIC_F103VCTX_dfu2 INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -25980,7 +26120,7 @@ set(GENERIC_F103VCTX_dfuo_MCU cortex-m3) set(GENERIC_F103VCTX_dfuo_FPCONF "-") add_library(GENERIC_F103VCTX_dfuo INTERFACE) target_compile_options(GENERIC_F103VCTX_dfuo INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -26022,7 +26162,7 @@ set(GENERIC_F103VCTX_hid_MCU cortex-m3) set(GENERIC_F103VCTX_hid_FPCONF "-") add_library(GENERIC_F103VCTX_hid INTERFACE) target_compile_options(GENERIC_F103VCTX_hid INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -26064,7 +26204,7 @@ set(GENERIC_F103VDHX_MCU cortex-m3) set(GENERIC_F103VDHX_FPCONF "-") add_library(GENERIC_F103VDHX INTERFACE) target_compile_options(GENERIC_F103VDHX INTERFACE - "SHELL:-DSTM32F103xE " + "SHELL:-DSTM32F103xE" "SHELL:" "SHELL:" "SHELL: " @@ -26109,15 +26249,15 @@ target_compile_options(GENERIC_F103VDHX_serial_none INTERFACE ) add_library(GENERIC_F103VDHX_usb_CDC INTERFACE) target_compile_options(GENERIC_F103VDHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F103VDHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F103VDHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F103VDHX_usb_HID INTERFACE) target_compile_options(GENERIC_F103VDHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F103VDHX_usb_none INTERFACE) target_compile_options(GENERIC_F103VDHX_usb_none INTERFACE @@ -26146,7 +26286,7 @@ set(GENERIC_F103VDHX_dfu2_MCU cortex-m3) set(GENERIC_F103VDHX_dfu2_FPCONF "-") add_library(GENERIC_F103VDHX_dfu2 INTERFACE) target_compile_options(GENERIC_F103VDHX_dfu2 INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -26188,7 +26328,7 @@ set(GENERIC_F103VDHX_dfuo_MCU cortex-m3) set(GENERIC_F103VDHX_dfuo_FPCONF "-") add_library(GENERIC_F103VDHX_dfuo INTERFACE) target_compile_options(GENERIC_F103VDHX_dfuo INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -26230,7 +26370,7 @@ set(GENERIC_F103VDHX_hid_MCU cortex-m3) set(GENERIC_F103VDHX_hid_FPCONF "-") add_library(GENERIC_F103VDHX_hid INTERFACE) target_compile_options(GENERIC_F103VDHX_hid INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -26272,7 +26412,7 @@ set(GENERIC_F103VDTX_MCU cortex-m3) set(GENERIC_F103VDTX_FPCONF "-") add_library(GENERIC_F103VDTX INTERFACE) target_compile_options(GENERIC_F103VDTX INTERFACE - "SHELL:-DSTM32F103xE " + "SHELL:-DSTM32F103xE" "SHELL:" "SHELL:" "SHELL: " @@ -26317,15 +26457,15 @@ target_compile_options(GENERIC_F103VDTX_serial_none INTERFACE ) add_library(GENERIC_F103VDTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F103VDTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F103VDTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F103VDTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F103VDTX_usb_HID INTERFACE) target_compile_options(GENERIC_F103VDTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F103VDTX_usb_none INTERFACE) target_compile_options(GENERIC_F103VDTX_usb_none INTERFACE @@ -26354,7 +26494,7 @@ set(GENERIC_F103VDTX_dfu2_MCU cortex-m3) set(GENERIC_F103VDTX_dfu2_FPCONF "-") add_library(GENERIC_F103VDTX_dfu2 INTERFACE) target_compile_options(GENERIC_F103VDTX_dfu2 INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -26396,7 +26536,7 @@ set(GENERIC_F103VDTX_dfuo_MCU cortex-m3) set(GENERIC_F103VDTX_dfuo_FPCONF "-") add_library(GENERIC_F103VDTX_dfuo INTERFACE) target_compile_options(GENERIC_F103VDTX_dfuo INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -26438,7 +26578,7 @@ set(GENERIC_F103VDTX_hid_MCU cortex-m3) set(GENERIC_F103VDTX_hid_FPCONF "-") add_library(GENERIC_F103VDTX_hid INTERFACE) target_compile_options(GENERIC_F103VDTX_hid INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -26480,7 +26620,7 @@ set(GENERIC_F103VEHX_MCU cortex-m3) set(GENERIC_F103VEHX_FPCONF "-") add_library(GENERIC_F103VEHX INTERFACE) target_compile_options(GENERIC_F103VEHX INTERFACE - "SHELL:-DSTM32F103xE " + "SHELL:-DSTM32F103xE" "SHELL:" "SHELL:" "SHELL: " @@ -26525,15 +26665,15 @@ target_compile_options(GENERIC_F103VEHX_serial_none INTERFACE ) add_library(GENERIC_F103VEHX_usb_CDC INTERFACE) target_compile_options(GENERIC_F103VEHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F103VEHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F103VEHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F103VEHX_usb_HID INTERFACE) target_compile_options(GENERIC_F103VEHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F103VEHX_usb_none INTERFACE) target_compile_options(GENERIC_F103VEHX_usb_none INTERFACE @@ -26562,7 +26702,7 @@ set(GENERIC_F103VEHX_dfu2_MCU cortex-m3) set(GENERIC_F103VEHX_dfu2_FPCONF "-") add_library(GENERIC_F103VEHX_dfu2 INTERFACE) target_compile_options(GENERIC_F103VEHX_dfu2 INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -26604,7 +26744,7 @@ set(GENERIC_F103VEHX_dfuo_MCU cortex-m3) set(GENERIC_F103VEHX_dfuo_FPCONF "-") add_library(GENERIC_F103VEHX_dfuo INTERFACE) target_compile_options(GENERIC_F103VEHX_dfuo INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -26646,7 +26786,7 @@ set(GENERIC_F103VEHX_hid_MCU cortex-m3) set(GENERIC_F103VEHX_hid_FPCONF "-") add_library(GENERIC_F103VEHX_hid INTERFACE) target_compile_options(GENERIC_F103VEHX_hid INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -26688,7 +26828,7 @@ set(GENERIC_F103VETX_MCU cortex-m3) set(GENERIC_F103VETX_FPCONF "-") add_library(GENERIC_F103VETX INTERFACE) target_compile_options(GENERIC_F103VETX INTERFACE - "SHELL:-DSTM32F103xE " + "SHELL:-DSTM32F103xE" "SHELL:" "SHELL:" "SHELL: " @@ -26733,15 +26873,15 @@ target_compile_options(GENERIC_F103VETX_serial_none INTERFACE ) add_library(GENERIC_F103VETX_usb_CDC INTERFACE) target_compile_options(GENERIC_F103VETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F103VETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F103VETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F103VETX_usb_HID INTERFACE) target_compile_options(GENERIC_F103VETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F103VETX_usb_none INTERFACE) target_compile_options(GENERIC_F103VETX_usb_none INTERFACE @@ -26770,7 +26910,7 @@ set(GENERIC_F103VETX_dfu2_MCU cortex-m3) set(GENERIC_F103VETX_dfu2_FPCONF "-") add_library(GENERIC_F103VETX_dfu2 INTERFACE) target_compile_options(GENERIC_F103VETX_dfu2 INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -26812,7 +26952,7 @@ set(GENERIC_F103VETX_dfuo_MCU cortex-m3) set(GENERIC_F103VETX_dfuo_FPCONF "-") add_library(GENERIC_F103VETX_dfuo INTERFACE) target_compile_options(GENERIC_F103VETX_dfuo INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -26854,7 +26994,7 @@ set(GENERIC_F103VETX_hid_MCU cortex-m3) set(GENERIC_F103VETX_hid_FPCONF "-") add_library(GENERIC_F103VETX_hid INTERFACE) target_compile_options(GENERIC_F103VETX_hid INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -26896,7 +27036,7 @@ set(GENERIC_F103VFTX_MCU cortex-m3) set(GENERIC_F103VFTX_FPCONF "-") add_library(GENERIC_F103VFTX INTERFACE) target_compile_options(GENERIC_F103VFTX INTERFACE - "SHELL:-DSTM32F103xG " + "SHELL:-DSTM32F103xG" "SHELL:" "SHELL:" "SHELL: " @@ -26941,15 +27081,15 @@ target_compile_options(GENERIC_F103VFTX_serial_none INTERFACE ) add_library(GENERIC_F103VFTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F103VFTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F103VFTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F103VFTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F103VFTX_usb_HID INTERFACE) target_compile_options(GENERIC_F103VFTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F103VFTX_usb_none INTERFACE) target_compile_options(GENERIC_F103VFTX_usb_none INTERFACE @@ -26978,7 +27118,7 @@ set(GENERIC_F103VFTX_dfu2_MCU cortex-m3) set(GENERIC_F103VFTX_dfu2_FPCONF "-") add_library(GENERIC_F103VFTX_dfu2 INTERFACE) target_compile_options(GENERIC_F103VFTX_dfu2 INTERFACE - "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -27020,7 +27160,7 @@ set(GENERIC_F103VFTX_dfuo_MCU cortex-m3) set(GENERIC_F103VFTX_dfuo_FPCONF "-") add_library(GENERIC_F103VFTX_dfuo INTERFACE) target_compile_options(GENERIC_F103VFTX_dfuo INTERFACE - "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -27062,7 +27202,7 @@ set(GENERIC_F103VFTX_hid_MCU cortex-m3) set(GENERIC_F103VFTX_hid_FPCONF "-") add_library(GENERIC_F103VFTX_hid INTERFACE) target_compile_options(GENERIC_F103VFTX_hid INTERFACE - "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -27104,7 +27244,7 @@ set(GENERIC_F103VGTX_MCU cortex-m3) set(GENERIC_F103VGTX_FPCONF "-") add_library(GENERIC_F103VGTX INTERFACE) target_compile_options(GENERIC_F103VGTX INTERFACE - "SHELL:-DSTM32F103xG " + "SHELL:-DSTM32F103xG" "SHELL:" "SHELL:" "SHELL: " @@ -27149,15 +27289,15 @@ target_compile_options(GENERIC_F103VGTX_serial_none INTERFACE ) add_library(GENERIC_F103VGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F103VGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F103VGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F103VGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F103VGTX_usb_HID INTERFACE) target_compile_options(GENERIC_F103VGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F103VGTX_usb_none INTERFACE) target_compile_options(GENERIC_F103VGTX_usb_none INTERFACE @@ -27186,7 +27326,7 @@ set(GENERIC_F103VGTX_dfu2_MCU cortex-m3) set(GENERIC_F103VGTX_dfu2_FPCONF "-") add_library(GENERIC_F103VGTX_dfu2 INTERFACE) target_compile_options(GENERIC_F103VGTX_dfu2 INTERFACE - "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -27228,7 +27368,7 @@ set(GENERIC_F103VGTX_dfuo_MCU cortex-m3) set(GENERIC_F103VGTX_dfuo_FPCONF "-") add_library(GENERIC_F103VGTX_dfuo INTERFACE) target_compile_options(GENERIC_F103VGTX_dfuo INTERFACE - "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -27270,7 +27410,7 @@ set(GENERIC_F103VGTX_hid_MCU cortex-m3) set(GENERIC_F103VGTX_hid_FPCONF "-") add_library(GENERIC_F103VGTX_hid INTERFACE) target_compile_options(GENERIC_F103VGTX_hid INTERFACE - "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -27312,7 +27452,7 @@ set(GENERIC_F103ZCHX_MCU cortex-m3) set(GENERIC_F103ZCHX_FPCONF "-") add_library(GENERIC_F103ZCHX INTERFACE) target_compile_options(GENERIC_F103ZCHX INTERFACE - "SHELL:-DSTM32F103xE " + "SHELL:-DSTM32F103xE" "SHELL:" "SHELL:" "SHELL: " @@ -27357,15 +27497,15 @@ target_compile_options(GENERIC_F103ZCHX_serial_none INTERFACE ) add_library(GENERIC_F103ZCHX_usb_CDC INTERFACE) target_compile_options(GENERIC_F103ZCHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F103ZCHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F103ZCHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F103ZCHX_usb_HID INTERFACE) target_compile_options(GENERIC_F103ZCHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F103ZCHX_usb_none INTERFACE) target_compile_options(GENERIC_F103ZCHX_usb_none INTERFACE @@ -27394,7 +27534,7 @@ set(GENERIC_F103ZCHX_dfu2_MCU cortex-m3) set(GENERIC_F103ZCHX_dfu2_FPCONF "-") add_library(GENERIC_F103ZCHX_dfu2 INTERFACE) target_compile_options(GENERIC_F103ZCHX_dfu2 INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -27436,7 +27576,7 @@ set(GENERIC_F103ZCHX_dfuo_MCU cortex-m3) set(GENERIC_F103ZCHX_dfuo_FPCONF "-") add_library(GENERIC_F103ZCHX_dfuo INTERFACE) target_compile_options(GENERIC_F103ZCHX_dfuo INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -27478,7 +27618,7 @@ set(GENERIC_F103ZCHX_hid_MCU cortex-m3) set(GENERIC_F103ZCHX_hid_FPCONF "-") add_library(GENERIC_F103ZCHX_hid INTERFACE) target_compile_options(GENERIC_F103ZCHX_hid INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -27520,7 +27660,7 @@ set(GENERIC_F103ZCTX_MCU cortex-m3) set(GENERIC_F103ZCTX_FPCONF "-") add_library(GENERIC_F103ZCTX INTERFACE) target_compile_options(GENERIC_F103ZCTX INTERFACE - "SHELL:-DSTM32F103xE " + "SHELL:-DSTM32F103xE" "SHELL:" "SHELL:" "SHELL: " @@ -27565,15 +27705,15 @@ target_compile_options(GENERIC_F103ZCTX_serial_none INTERFACE ) add_library(GENERIC_F103ZCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F103ZCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F103ZCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F103ZCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F103ZCTX_usb_HID INTERFACE) target_compile_options(GENERIC_F103ZCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F103ZCTX_usb_none INTERFACE) target_compile_options(GENERIC_F103ZCTX_usb_none INTERFACE @@ -27602,7 +27742,7 @@ set(GENERIC_F103ZCTX_dfu2_MCU cortex-m3) set(GENERIC_F103ZCTX_dfu2_FPCONF "-") add_library(GENERIC_F103ZCTX_dfu2 INTERFACE) target_compile_options(GENERIC_F103ZCTX_dfu2 INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -27644,7 +27784,7 @@ set(GENERIC_F103ZCTX_dfuo_MCU cortex-m3) set(GENERIC_F103ZCTX_dfuo_FPCONF "-") add_library(GENERIC_F103ZCTX_dfuo INTERFACE) target_compile_options(GENERIC_F103ZCTX_dfuo INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -27686,7 +27826,7 @@ set(GENERIC_F103ZCTX_hid_MCU cortex-m3) set(GENERIC_F103ZCTX_hid_FPCONF "-") add_library(GENERIC_F103ZCTX_hid INTERFACE) target_compile_options(GENERIC_F103ZCTX_hid INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -27728,7 +27868,7 @@ set(GENERIC_F103ZDHX_MCU cortex-m3) set(GENERIC_F103ZDHX_FPCONF "-") add_library(GENERIC_F103ZDHX INTERFACE) target_compile_options(GENERIC_F103ZDHX INTERFACE - "SHELL:-DSTM32F103xE " + "SHELL:-DSTM32F103xE" "SHELL:" "SHELL:" "SHELL: " @@ -27773,15 +27913,15 @@ target_compile_options(GENERIC_F103ZDHX_serial_none INTERFACE ) add_library(GENERIC_F103ZDHX_usb_CDC INTERFACE) target_compile_options(GENERIC_F103ZDHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F103ZDHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F103ZDHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F103ZDHX_usb_HID INTERFACE) target_compile_options(GENERIC_F103ZDHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F103ZDHX_usb_none INTERFACE) target_compile_options(GENERIC_F103ZDHX_usb_none INTERFACE @@ -27810,7 +27950,7 @@ set(GENERIC_F103ZDHX_dfu2_MCU cortex-m3) set(GENERIC_F103ZDHX_dfu2_FPCONF "-") add_library(GENERIC_F103ZDHX_dfu2 INTERFACE) target_compile_options(GENERIC_F103ZDHX_dfu2 INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -27852,7 +27992,7 @@ set(GENERIC_F103ZDHX_dfuo_MCU cortex-m3) set(GENERIC_F103ZDHX_dfuo_FPCONF "-") add_library(GENERIC_F103ZDHX_dfuo INTERFACE) target_compile_options(GENERIC_F103ZDHX_dfuo INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -27894,7 +28034,7 @@ set(GENERIC_F103ZDHX_hid_MCU cortex-m3) set(GENERIC_F103ZDHX_hid_FPCONF "-") add_library(GENERIC_F103ZDHX_hid INTERFACE) target_compile_options(GENERIC_F103ZDHX_hid INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -27936,7 +28076,7 @@ set(GENERIC_F103ZDTX_MCU cortex-m3) set(GENERIC_F103ZDTX_FPCONF "-") add_library(GENERIC_F103ZDTX INTERFACE) target_compile_options(GENERIC_F103ZDTX INTERFACE - "SHELL:-DSTM32F103xE " + "SHELL:-DSTM32F103xE" "SHELL:" "SHELL:" "SHELL: " @@ -27981,15 +28121,15 @@ target_compile_options(GENERIC_F103ZDTX_serial_none INTERFACE ) add_library(GENERIC_F103ZDTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F103ZDTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F103ZDTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F103ZDTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F103ZDTX_usb_HID INTERFACE) target_compile_options(GENERIC_F103ZDTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F103ZDTX_usb_none INTERFACE) target_compile_options(GENERIC_F103ZDTX_usb_none INTERFACE @@ -28018,7 +28158,7 @@ set(GENERIC_F103ZDTX_dfu2_MCU cortex-m3) set(GENERIC_F103ZDTX_dfu2_FPCONF "-") add_library(GENERIC_F103ZDTX_dfu2 INTERFACE) target_compile_options(GENERIC_F103ZDTX_dfu2 INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -28060,7 +28200,7 @@ set(GENERIC_F103ZDTX_dfuo_MCU cortex-m3) set(GENERIC_F103ZDTX_dfuo_FPCONF "-") add_library(GENERIC_F103ZDTX_dfuo INTERFACE) target_compile_options(GENERIC_F103ZDTX_dfuo INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -28102,7 +28242,7 @@ set(GENERIC_F103ZDTX_hid_MCU cortex-m3) set(GENERIC_F103ZDTX_hid_FPCONF "-") add_library(GENERIC_F103ZDTX_hid INTERFACE) target_compile_options(GENERIC_F103ZDTX_hid INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -28144,7 +28284,7 @@ set(GENERIC_F103ZEHX_MCU cortex-m3) set(GENERIC_F103ZEHX_FPCONF "-") add_library(GENERIC_F103ZEHX INTERFACE) target_compile_options(GENERIC_F103ZEHX INTERFACE - "SHELL:-DSTM32F103xE " + "SHELL:-DSTM32F103xE" "SHELL:" "SHELL:" "SHELL: " @@ -28189,15 +28329,15 @@ target_compile_options(GENERIC_F103ZEHX_serial_none INTERFACE ) add_library(GENERIC_F103ZEHX_usb_CDC INTERFACE) target_compile_options(GENERIC_F103ZEHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F103ZEHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F103ZEHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F103ZEHX_usb_HID INTERFACE) target_compile_options(GENERIC_F103ZEHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F103ZEHX_usb_none INTERFACE) target_compile_options(GENERIC_F103ZEHX_usb_none INTERFACE @@ -28226,7 +28366,7 @@ set(GENERIC_F103ZEHX_dfu2_MCU cortex-m3) set(GENERIC_F103ZEHX_dfu2_FPCONF "-") add_library(GENERIC_F103ZEHX_dfu2 INTERFACE) target_compile_options(GENERIC_F103ZEHX_dfu2 INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -28268,7 +28408,7 @@ set(GENERIC_F103ZEHX_dfuo_MCU cortex-m3) set(GENERIC_F103ZEHX_dfuo_FPCONF "-") add_library(GENERIC_F103ZEHX_dfuo INTERFACE) target_compile_options(GENERIC_F103ZEHX_dfuo INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -28310,7 +28450,7 @@ set(GENERIC_F103ZEHX_hid_MCU cortex-m3) set(GENERIC_F103ZEHX_hid_FPCONF "-") add_library(GENERIC_F103ZEHX_hid INTERFACE) target_compile_options(GENERIC_F103ZEHX_hid INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -28352,7 +28492,7 @@ set(GENERIC_F103ZETX_MCU cortex-m3) set(GENERIC_F103ZETX_FPCONF "-") add_library(GENERIC_F103ZETX INTERFACE) target_compile_options(GENERIC_F103ZETX INTERFACE - "SHELL:-DSTM32F103xE " + "SHELL:-DSTM32F103xE" "SHELL:" "SHELL:" "SHELL: " @@ -28397,15 +28537,15 @@ target_compile_options(GENERIC_F103ZETX_serial_none INTERFACE ) add_library(GENERIC_F103ZETX_usb_CDC INTERFACE) target_compile_options(GENERIC_F103ZETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F103ZETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F103ZETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F103ZETX_usb_HID INTERFACE) target_compile_options(GENERIC_F103ZETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F103ZETX_usb_none INTERFACE) target_compile_options(GENERIC_F103ZETX_usb_none INTERFACE @@ -28434,7 +28574,7 @@ set(GENERIC_F103ZETX_dfu2_MCU cortex-m3) set(GENERIC_F103ZETX_dfu2_FPCONF "-") add_library(GENERIC_F103ZETX_dfu2 INTERFACE) target_compile_options(GENERIC_F103ZETX_dfu2 INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -28476,7 +28616,7 @@ set(GENERIC_F103ZETX_dfuo_MCU cortex-m3) set(GENERIC_F103ZETX_dfuo_FPCONF "-") add_library(GENERIC_F103ZETX_dfuo INTERFACE) target_compile_options(GENERIC_F103ZETX_dfuo INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -28518,7 +28658,7 @@ set(GENERIC_F103ZETX_hid_MCU cortex-m3) set(GENERIC_F103ZETX_hid_FPCONF "-") add_library(GENERIC_F103ZETX_hid INTERFACE) target_compile_options(GENERIC_F103ZETX_hid INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -28560,7 +28700,7 @@ set(GENERIC_F103ZFHX_MCU cortex-m3) set(GENERIC_F103ZFHX_FPCONF "-") add_library(GENERIC_F103ZFHX INTERFACE) target_compile_options(GENERIC_F103ZFHX INTERFACE - "SHELL:-DSTM32F103xG " + "SHELL:-DSTM32F103xG" "SHELL:" "SHELL:" "SHELL: " @@ -28605,15 +28745,15 @@ target_compile_options(GENERIC_F103ZFHX_serial_none INTERFACE ) add_library(GENERIC_F103ZFHX_usb_CDC INTERFACE) target_compile_options(GENERIC_F103ZFHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F103ZFHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F103ZFHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F103ZFHX_usb_HID INTERFACE) target_compile_options(GENERIC_F103ZFHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F103ZFHX_usb_none INTERFACE) target_compile_options(GENERIC_F103ZFHX_usb_none INTERFACE @@ -28642,7 +28782,7 @@ set(GENERIC_F103ZFHX_dfu2_MCU cortex-m3) set(GENERIC_F103ZFHX_dfu2_FPCONF "-") add_library(GENERIC_F103ZFHX_dfu2 INTERFACE) target_compile_options(GENERIC_F103ZFHX_dfu2 INTERFACE - "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -28684,7 +28824,7 @@ set(GENERIC_F103ZFHX_dfuo_MCU cortex-m3) set(GENERIC_F103ZFHX_dfuo_FPCONF "-") add_library(GENERIC_F103ZFHX_dfuo INTERFACE) target_compile_options(GENERIC_F103ZFHX_dfuo INTERFACE - "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -28726,7 +28866,7 @@ set(GENERIC_F103ZFHX_hid_MCU cortex-m3) set(GENERIC_F103ZFHX_hid_FPCONF "-") add_library(GENERIC_F103ZFHX_hid INTERFACE) target_compile_options(GENERIC_F103ZFHX_hid INTERFACE - "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -28768,7 +28908,7 @@ set(GENERIC_F103ZFTX_MCU cortex-m3) set(GENERIC_F103ZFTX_FPCONF "-") add_library(GENERIC_F103ZFTX INTERFACE) target_compile_options(GENERIC_F103ZFTX INTERFACE - "SHELL:-DSTM32F103xG " + "SHELL:-DSTM32F103xG" "SHELL:" "SHELL:" "SHELL: " @@ -28813,15 +28953,15 @@ target_compile_options(GENERIC_F103ZFTX_serial_none INTERFACE ) add_library(GENERIC_F103ZFTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F103ZFTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F103ZFTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F103ZFTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F103ZFTX_usb_HID INTERFACE) target_compile_options(GENERIC_F103ZFTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F103ZFTX_usb_none INTERFACE) target_compile_options(GENERIC_F103ZFTX_usb_none INTERFACE @@ -28850,7 +28990,7 @@ set(GENERIC_F103ZFTX_dfu2_MCU cortex-m3) set(GENERIC_F103ZFTX_dfu2_FPCONF "-") add_library(GENERIC_F103ZFTX_dfu2 INTERFACE) target_compile_options(GENERIC_F103ZFTX_dfu2 INTERFACE - "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -28892,7 +29032,7 @@ set(GENERIC_F103ZFTX_dfuo_MCU cortex-m3) set(GENERIC_F103ZFTX_dfuo_FPCONF "-") add_library(GENERIC_F103ZFTX_dfuo INTERFACE) target_compile_options(GENERIC_F103ZFTX_dfuo INTERFACE - "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -28934,7 +29074,7 @@ set(GENERIC_F103ZFTX_hid_MCU cortex-m3) set(GENERIC_F103ZFTX_hid_FPCONF "-") add_library(GENERIC_F103ZFTX_hid INTERFACE) target_compile_options(GENERIC_F103ZFTX_hid INTERFACE - "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -28976,7 +29116,7 @@ set(GENERIC_F103ZGHX_MCU cortex-m3) set(GENERIC_F103ZGHX_FPCONF "-") add_library(GENERIC_F103ZGHX INTERFACE) target_compile_options(GENERIC_F103ZGHX INTERFACE - "SHELL:-DSTM32F103xG " + "SHELL:-DSTM32F103xG" "SHELL:" "SHELL:" "SHELL: " @@ -29021,15 +29161,15 @@ target_compile_options(GENERIC_F103ZGHX_serial_none INTERFACE ) add_library(GENERIC_F103ZGHX_usb_CDC INTERFACE) target_compile_options(GENERIC_F103ZGHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F103ZGHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F103ZGHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F103ZGHX_usb_HID INTERFACE) target_compile_options(GENERIC_F103ZGHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F103ZGHX_usb_none INTERFACE) target_compile_options(GENERIC_F103ZGHX_usb_none INTERFACE @@ -29058,7 +29198,7 @@ set(GENERIC_F103ZGHX_dfu2_MCU cortex-m3) set(GENERIC_F103ZGHX_dfu2_FPCONF "-") add_library(GENERIC_F103ZGHX_dfu2 INTERFACE) target_compile_options(GENERIC_F103ZGHX_dfu2 INTERFACE - "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -29100,7 +29240,7 @@ set(GENERIC_F103ZGHX_dfuo_MCU cortex-m3) set(GENERIC_F103ZGHX_dfuo_FPCONF "-") add_library(GENERIC_F103ZGHX_dfuo INTERFACE) target_compile_options(GENERIC_F103ZGHX_dfuo INTERFACE - "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -29142,7 +29282,7 @@ set(GENERIC_F103ZGHX_hid_MCU cortex-m3) set(GENERIC_F103ZGHX_hid_FPCONF "-") add_library(GENERIC_F103ZGHX_hid INTERFACE) target_compile_options(GENERIC_F103ZGHX_hid INTERFACE - "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -29184,7 +29324,7 @@ set(GENERIC_F103ZGTX_MCU cortex-m3) set(GENERIC_F103ZGTX_FPCONF "-") add_library(GENERIC_F103ZGTX INTERFACE) target_compile_options(GENERIC_F103ZGTX INTERFACE - "SHELL:-DSTM32F103xG " + "SHELL:-DSTM32F103xG" "SHELL:" "SHELL:" "SHELL: " @@ -29229,15 +29369,15 @@ target_compile_options(GENERIC_F103ZGTX_serial_none INTERFACE ) add_library(GENERIC_F103ZGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F103ZGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F103ZGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F103ZGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F103ZGTX_usb_HID INTERFACE) target_compile_options(GENERIC_F103ZGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F103ZGTX_usb_none INTERFACE) target_compile_options(GENERIC_F103ZGTX_usb_none INTERFACE @@ -29266,7 +29406,7 @@ set(GENERIC_F103ZGTX_dfu2_MCU cortex-m3) set(GENERIC_F103ZGTX_dfu2_FPCONF "-") add_library(GENERIC_F103ZGTX_dfu2 INTERFACE) target_compile_options(GENERIC_F103ZGTX_dfu2 INTERFACE - "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -29308,7 +29448,7 @@ set(GENERIC_F103ZGTX_dfuo_MCU cortex-m3) set(GENERIC_F103ZGTX_dfuo_FPCONF "-") add_library(GENERIC_F103ZGTX_dfuo INTERFACE) target_compile_options(GENERIC_F103ZGTX_dfuo INTERFACE - "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -29350,7 +29490,7 @@ set(GENERIC_F103ZGTX_hid_MCU cortex-m3) set(GENERIC_F103ZGTX_hid_FPCONF "-") add_library(GENERIC_F103ZGTX_hid INTERFACE) target_compile_options(GENERIC_F103ZGTX_hid INTERFACE - "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -29392,7 +29532,7 @@ set(GENERIC_F205RBTX_MCU cortex-m3) set(GENERIC_F205RBTX_FPCONF "-") add_library(GENERIC_F205RBTX INTERFACE) target_compile_options(GENERIC_F205RBTX INTERFACE - "SHELL:-DSTM32F205xx " + "SHELL:-DSTM32F205xx" "SHELL:" "SHELL:" "SHELL: " @@ -29437,15 +29577,15 @@ target_compile_options(GENERIC_F205RBTX_serial_none INTERFACE ) add_library(GENERIC_F205RBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F205RBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F205RBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F205RBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F205RBTX_usb_HID INTERFACE) target_compile_options(GENERIC_F205RBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F205RBTX_usb_none INTERFACE) target_compile_options(GENERIC_F205RBTX_usb_none INTERFACE @@ -29474,7 +29614,7 @@ set(GENERIC_F205RCTX_MCU cortex-m3) set(GENERIC_F205RCTX_FPCONF "-") add_library(GENERIC_F205RCTX INTERFACE) target_compile_options(GENERIC_F205RCTX INTERFACE - "SHELL:-DSTM32F205xx " + "SHELL:-DSTM32F205xx" "SHELL:" "SHELL:" "SHELL: " @@ -29519,15 +29659,15 @@ target_compile_options(GENERIC_F205RCTX_serial_none INTERFACE ) add_library(GENERIC_F205RCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F205RCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F205RCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F205RCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F205RCTX_usb_HID INTERFACE) target_compile_options(GENERIC_F205RCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F205RCTX_usb_none INTERFACE) target_compile_options(GENERIC_F205RCTX_usb_none INTERFACE @@ -29556,7 +29696,7 @@ set(GENERIC_F205RETX_MCU cortex-m3) set(GENERIC_F205RETX_FPCONF "-") add_library(GENERIC_F205RETX INTERFACE) target_compile_options(GENERIC_F205RETX INTERFACE - "SHELL:-DSTM32F205xx " + "SHELL:-DSTM32F205xx" "SHELL:" "SHELL:" "SHELL: " @@ -29601,15 +29741,15 @@ target_compile_options(GENERIC_F205RETX_serial_none INTERFACE ) add_library(GENERIC_F205RETX_usb_CDC INTERFACE) target_compile_options(GENERIC_F205RETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F205RETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F205RETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F205RETX_usb_HID INTERFACE) target_compile_options(GENERIC_F205RETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F205RETX_usb_none INTERFACE) target_compile_options(GENERIC_F205RETX_usb_none INTERFACE @@ -29638,7 +29778,7 @@ set(GENERIC_F205REYX_MCU cortex-m3) set(GENERIC_F205REYX_FPCONF "-") add_library(GENERIC_F205REYX INTERFACE) target_compile_options(GENERIC_F205REYX INTERFACE - "SHELL:-DSTM32F205xx " + "SHELL:-DSTM32F205xx" "SHELL:" "SHELL:" "SHELL: " @@ -29683,15 +29823,15 @@ target_compile_options(GENERIC_F205REYX_serial_none INTERFACE ) add_library(GENERIC_F205REYX_usb_CDC INTERFACE) target_compile_options(GENERIC_F205REYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F205REYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F205REYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F205REYX_usb_HID INTERFACE) target_compile_options(GENERIC_F205REYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F205REYX_usb_none INTERFACE) target_compile_options(GENERIC_F205REYX_usb_none INTERFACE @@ -29720,7 +29860,7 @@ set(GENERIC_F205RFTX_MCU cortex-m3) set(GENERIC_F205RFTX_FPCONF "-") add_library(GENERIC_F205RFTX INTERFACE) target_compile_options(GENERIC_F205RFTX INTERFACE - "SHELL:-DSTM32F205xx " + "SHELL:-DSTM32F205xx" "SHELL:" "SHELL:" "SHELL: " @@ -29765,15 +29905,15 @@ target_compile_options(GENERIC_F205RFTX_serial_none INTERFACE ) add_library(GENERIC_F205RFTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F205RFTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F205RFTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F205RFTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F205RFTX_usb_HID INTERFACE) target_compile_options(GENERIC_F205RFTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F205RFTX_usb_none INTERFACE) target_compile_options(GENERIC_F205RFTX_usb_none INTERFACE @@ -29802,7 +29942,7 @@ set(GENERIC_F205RGEX_MCU cortex-m3) set(GENERIC_F205RGEX_FPCONF "-") add_library(GENERIC_F205RGEX INTERFACE) target_compile_options(GENERIC_F205RGEX INTERFACE - "SHELL:-DSTM32F205xx " + "SHELL:-DSTM32F205xx" "SHELL:" "SHELL:" "SHELL: " @@ -29847,15 +29987,15 @@ target_compile_options(GENERIC_F205RGEX_serial_none INTERFACE ) add_library(GENERIC_F205RGEX_usb_CDC INTERFACE) target_compile_options(GENERIC_F205RGEX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F205RGEX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F205RGEX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F205RGEX_usb_HID INTERFACE) target_compile_options(GENERIC_F205RGEX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F205RGEX_usb_none INTERFACE) target_compile_options(GENERIC_F205RGEX_usb_none INTERFACE @@ -29884,7 +30024,7 @@ set(GENERIC_F205RGTX_MCU cortex-m3) set(GENERIC_F205RGTX_FPCONF "-") add_library(GENERIC_F205RGTX INTERFACE) target_compile_options(GENERIC_F205RGTX INTERFACE - "SHELL:-DSTM32F205xx " + "SHELL:-DSTM32F205xx" "SHELL:" "SHELL:" "SHELL: " @@ -29929,15 +30069,15 @@ target_compile_options(GENERIC_F205RGTX_serial_none INTERFACE ) add_library(GENERIC_F205RGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F205RGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F205RGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F205RGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F205RGTX_usb_HID INTERFACE) target_compile_options(GENERIC_F205RGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F205RGTX_usb_none INTERFACE) target_compile_options(GENERIC_F205RGTX_usb_none INTERFACE @@ -29966,7 +30106,7 @@ set(GENERIC_F205RGYX_MCU cortex-m3) set(GENERIC_F205RGYX_FPCONF "-") add_library(GENERIC_F205RGYX INTERFACE) target_compile_options(GENERIC_F205RGYX INTERFACE - "SHELL:-DSTM32F205xx " + "SHELL:-DSTM32F205xx" "SHELL:" "SHELL:" "SHELL: " @@ -30011,15 +30151,15 @@ target_compile_options(GENERIC_F205RGYX_serial_none INTERFACE ) add_library(GENERIC_F205RGYX_usb_CDC INTERFACE) target_compile_options(GENERIC_F205RGYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F205RGYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F205RGYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F205RGYX_usb_HID INTERFACE) target_compile_options(GENERIC_F205RGYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F205RGYX_usb_none INTERFACE) target_compile_options(GENERIC_F205RGYX_usb_none INTERFACE @@ -30048,7 +30188,7 @@ set(GENERIC_F205VBTX_MCU cortex-m3) set(GENERIC_F205VBTX_FPCONF "-") add_library(GENERIC_F205VBTX INTERFACE) target_compile_options(GENERIC_F205VBTX INTERFACE - "SHELL:-DSTM32F205xx " + "SHELL:-DSTM32F205xx" "SHELL:" "SHELL:" "SHELL: " @@ -30093,15 +30233,15 @@ target_compile_options(GENERIC_F205VBTX_serial_none INTERFACE ) add_library(GENERIC_F205VBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F205VBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F205VBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F205VBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F205VBTX_usb_HID INTERFACE) target_compile_options(GENERIC_F205VBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F205VBTX_usb_none INTERFACE) target_compile_options(GENERIC_F205VBTX_usb_none INTERFACE @@ -30130,7 +30270,7 @@ set(GENERIC_F205VCTX_MCU cortex-m3) set(GENERIC_F205VCTX_FPCONF "-") add_library(GENERIC_F205VCTX INTERFACE) target_compile_options(GENERIC_F205VCTX INTERFACE - "SHELL:-DSTM32F205xx " + "SHELL:-DSTM32F205xx" "SHELL:" "SHELL:" "SHELL: " @@ -30175,15 +30315,15 @@ target_compile_options(GENERIC_F205VCTX_serial_none INTERFACE ) add_library(GENERIC_F205VCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F205VCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F205VCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F205VCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F205VCTX_usb_HID INTERFACE) target_compile_options(GENERIC_F205VCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F205VCTX_usb_none INTERFACE) target_compile_options(GENERIC_F205VCTX_usb_none INTERFACE @@ -30212,7 +30352,7 @@ set(GENERIC_F205VETX_MCU cortex-m3) set(GENERIC_F205VETX_FPCONF "-") add_library(GENERIC_F205VETX INTERFACE) target_compile_options(GENERIC_F205VETX INTERFACE - "SHELL:-DSTM32F205xx " + "SHELL:-DSTM32F205xx" "SHELL:" "SHELL:" "SHELL: " @@ -30257,15 +30397,15 @@ target_compile_options(GENERIC_F205VETX_serial_none INTERFACE ) add_library(GENERIC_F205VETX_usb_CDC INTERFACE) target_compile_options(GENERIC_F205VETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F205VETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F205VETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F205VETX_usb_HID INTERFACE) target_compile_options(GENERIC_F205VETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F205VETX_usb_none INTERFACE) target_compile_options(GENERIC_F205VETX_usb_none INTERFACE @@ -30294,7 +30434,7 @@ set(GENERIC_F205VFTX_MCU cortex-m3) set(GENERIC_F205VFTX_FPCONF "-") add_library(GENERIC_F205VFTX INTERFACE) target_compile_options(GENERIC_F205VFTX INTERFACE - "SHELL:-DSTM32F205xx " + "SHELL:-DSTM32F205xx" "SHELL:" "SHELL:" "SHELL: " @@ -30339,15 +30479,15 @@ target_compile_options(GENERIC_F205VFTX_serial_none INTERFACE ) add_library(GENERIC_F205VFTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F205VFTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F205VFTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F205VFTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F205VFTX_usb_HID INTERFACE) target_compile_options(GENERIC_F205VFTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F205VFTX_usb_none INTERFACE) target_compile_options(GENERIC_F205VFTX_usb_none INTERFACE @@ -30376,7 +30516,7 @@ set(GENERIC_F205VGTX_MCU cortex-m3) set(GENERIC_F205VGTX_FPCONF "-") add_library(GENERIC_F205VGTX INTERFACE) target_compile_options(GENERIC_F205VGTX INTERFACE - "SHELL:-DSTM32F205xx " + "SHELL:-DSTM32F205xx" "SHELL:" "SHELL:" "SHELL: " @@ -30421,15 +30561,15 @@ target_compile_options(GENERIC_F205VGTX_serial_none INTERFACE ) add_library(GENERIC_F205VGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F205VGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F205VGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F205VGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F205VGTX_usb_HID INTERFACE) target_compile_options(GENERIC_F205VGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F205VGTX_usb_none INTERFACE) target_compile_options(GENERIC_F205VGTX_usb_none INTERFACE @@ -30458,7 +30598,7 @@ set(GENERIC_F205ZCTX_MCU cortex-m3) set(GENERIC_F205ZCTX_FPCONF "-") add_library(GENERIC_F205ZCTX INTERFACE) target_compile_options(GENERIC_F205ZCTX INTERFACE - "SHELL:-DSTM32F205xx " + "SHELL:-DSTM32F205xx" "SHELL:" "SHELL:" "SHELL: " @@ -30503,15 +30643,15 @@ target_compile_options(GENERIC_F205ZCTX_serial_none INTERFACE ) add_library(GENERIC_F205ZCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F205ZCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F205ZCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F205ZCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F205ZCTX_usb_HID INTERFACE) target_compile_options(GENERIC_F205ZCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F205ZCTX_usb_none INTERFACE) target_compile_options(GENERIC_F205ZCTX_usb_none INTERFACE @@ -30540,7 +30680,7 @@ set(GENERIC_F205ZETX_MCU cortex-m3) set(GENERIC_F205ZETX_FPCONF "-") add_library(GENERIC_F205ZETX INTERFACE) target_compile_options(GENERIC_F205ZETX INTERFACE - "SHELL:-DSTM32F205xx " + "SHELL:-DSTM32F205xx" "SHELL:" "SHELL:" "SHELL: " @@ -30585,15 +30725,15 @@ target_compile_options(GENERIC_F205ZETX_serial_none INTERFACE ) add_library(GENERIC_F205ZETX_usb_CDC INTERFACE) target_compile_options(GENERIC_F205ZETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F205ZETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F205ZETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F205ZETX_usb_HID INTERFACE) target_compile_options(GENERIC_F205ZETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F205ZETX_usb_none INTERFACE) target_compile_options(GENERIC_F205ZETX_usb_none INTERFACE @@ -30622,7 +30762,7 @@ set(GENERIC_F205ZFTX_MCU cortex-m3) set(GENERIC_F205ZFTX_FPCONF "-") add_library(GENERIC_F205ZFTX INTERFACE) target_compile_options(GENERIC_F205ZFTX INTERFACE - "SHELL:-DSTM32F205xx " + "SHELL:-DSTM32F205xx" "SHELL:" "SHELL:" "SHELL: " @@ -30667,15 +30807,15 @@ target_compile_options(GENERIC_F205ZFTX_serial_none INTERFACE ) add_library(GENERIC_F205ZFTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F205ZFTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F205ZFTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F205ZFTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F205ZFTX_usb_HID INTERFACE) target_compile_options(GENERIC_F205ZFTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F205ZFTX_usb_none INTERFACE) target_compile_options(GENERIC_F205ZFTX_usb_none INTERFACE @@ -30704,7 +30844,7 @@ set(GENERIC_F205ZGTX_MCU cortex-m3) set(GENERIC_F205ZGTX_FPCONF "-") add_library(GENERIC_F205ZGTX INTERFACE) target_compile_options(GENERIC_F205ZGTX INTERFACE - "SHELL:-DSTM32F205xx " + "SHELL:-DSTM32F205xx" "SHELL:" "SHELL:" "SHELL: " @@ -30749,15 +30889,15 @@ target_compile_options(GENERIC_F205ZGTX_serial_none INTERFACE ) add_library(GENERIC_F205ZGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F205ZGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F205ZGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F205ZGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F205ZGTX_usb_HID INTERFACE) target_compile_options(GENERIC_F205ZGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F205ZGTX_usb_none INTERFACE) target_compile_options(GENERIC_F205ZGTX_usb_none INTERFACE @@ -30786,7 +30926,7 @@ set(GENERIC_F207ICHX_MCU cortex-m3) set(GENERIC_F207ICHX_FPCONF "-") add_library(GENERIC_F207ICHX INTERFACE) target_compile_options(GENERIC_F207ICHX INTERFACE - "SHELL:-DSTM32F207xx " + "SHELL:-DSTM32F207xx" "SHELL:" "SHELL:" "SHELL: " @@ -30831,15 +30971,15 @@ target_compile_options(GENERIC_F207ICHX_serial_none INTERFACE ) add_library(GENERIC_F207ICHX_usb_CDC INTERFACE) target_compile_options(GENERIC_F207ICHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F207ICHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F207ICHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F207ICHX_usb_HID INTERFACE) target_compile_options(GENERIC_F207ICHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F207ICHX_usb_none INTERFACE) target_compile_options(GENERIC_F207ICHX_usb_none INTERFACE @@ -30868,7 +31008,7 @@ set(GENERIC_F207ICTX_MCU cortex-m3) set(GENERIC_F207ICTX_FPCONF "-") add_library(GENERIC_F207ICTX INTERFACE) target_compile_options(GENERIC_F207ICTX INTERFACE - "SHELL:-DSTM32F207xx " + "SHELL:-DSTM32F207xx" "SHELL:" "SHELL:" "SHELL: " @@ -30913,15 +31053,15 @@ target_compile_options(GENERIC_F207ICTX_serial_none INTERFACE ) add_library(GENERIC_F207ICTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F207ICTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F207ICTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F207ICTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F207ICTX_usb_HID INTERFACE) target_compile_options(GENERIC_F207ICTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F207ICTX_usb_none INTERFACE) target_compile_options(GENERIC_F207ICTX_usb_none INTERFACE @@ -30950,7 +31090,7 @@ set(GENERIC_F207IEHX_MCU cortex-m3) set(GENERIC_F207IEHX_FPCONF "-") add_library(GENERIC_F207IEHX INTERFACE) target_compile_options(GENERIC_F207IEHX INTERFACE - "SHELL:-DSTM32F207xx " + "SHELL:-DSTM32F207xx" "SHELL:" "SHELL:" "SHELL: " @@ -30995,15 +31135,15 @@ target_compile_options(GENERIC_F207IEHX_serial_none INTERFACE ) add_library(GENERIC_F207IEHX_usb_CDC INTERFACE) target_compile_options(GENERIC_F207IEHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F207IEHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F207IEHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F207IEHX_usb_HID INTERFACE) target_compile_options(GENERIC_F207IEHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F207IEHX_usb_none INTERFACE) target_compile_options(GENERIC_F207IEHX_usb_none INTERFACE @@ -31032,7 +31172,7 @@ set(GENERIC_F207IETX_MCU cortex-m3) set(GENERIC_F207IETX_FPCONF "-") add_library(GENERIC_F207IETX INTERFACE) target_compile_options(GENERIC_F207IETX INTERFACE - "SHELL:-DSTM32F207xx " + "SHELL:-DSTM32F207xx" "SHELL:" "SHELL:" "SHELL: " @@ -31077,15 +31217,15 @@ target_compile_options(GENERIC_F207IETX_serial_none INTERFACE ) add_library(GENERIC_F207IETX_usb_CDC INTERFACE) target_compile_options(GENERIC_F207IETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F207IETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F207IETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F207IETX_usb_HID INTERFACE) target_compile_options(GENERIC_F207IETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F207IETX_usb_none INTERFACE) target_compile_options(GENERIC_F207IETX_usb_none INTERFACE @@ -31114,7 +31254,7 @@ set(GENERIC_F207IFHX_MCU cortex-m3) set(GENERIC_F207IFHX_FPCONF "-") add_library(GENERIC_F207IFHX INTERFACE) target_compile_options(GENERIC_F207IFHX INTERFACE - "SHELL:-DSTM32F207xx " + "SHELL:-DSTM32F207xx" "SHELL:" "SHELL:" "SHELL: " @@ -31159,15 +31299,15 @@ target_compile_options(GENERIC_F207IFHX_serial_none INTERFACE ) add_library(GENERIC_F207IFHX_usb_CDC INTERFACE) target_compile_options(GENERIC_F207IFHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F207IFHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F207IFHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F207IFHX_usb_HID INTERFACE) target_compile_options(GENERIC_F207IFHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F207IFHX_usb_none INTERFACE) target_compile_options(GENERIC_F207IFHX_usb_none INTERFACE @@ -31196,7 +31336,7 @@ set(GENERIC_F207IFTX_MCU cortex-m3) set(GENERIC_F207IFTX_FPCONF "-") add_library(GENERIC_F207IFTX INTERFACE) target_compile_options(GENERIC_F207IFTX INTERFACE - "SHELL:-DSTM32F207xx " + "SHELL:-DSTM32F207xx" "SHELL:" "SHELL:" "SHELL: " @@ -31241,15 +31381,15 @@ target_compile_options(GENERIC_F207IFTX_serial_none INTERFACE ) add_library(GENERIC_F207IFTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F207IFTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F207IFTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F207IFTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F207IFTX_usb_HID INTERFACE) target_compile_options(GENERIC_F207IFTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F207IFTX_usb_none INTERFACE) target_compile_options(GENERIC_F207IFTX_usb_none INTERFACE @@ -31278,7 +31418,7 @@ set(GENERIC_F207IGHX_MCU cortex-m3) set(GENERIC_F207IGHX_FPCONF "-") add_library(GENERIC_F207IGHX INTERFACE) target_compile_options(GENERIC_F207IGHX INTERFACE - "SHELL:-DSTM32F207xx " + "SHELL:-DSTM32F207xx" "SHELL:" "SHELL:" "SHELL: " @@ -31323,15 +31463,15 @@ target_compile_options(GENERIC_F207IGHX_serial_none INTERFACE ) add_library(GENERIC_F207IGHX_usb_CDC INTERFACE) target_compile_options(GENERIC_F207IGHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F207IGHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F207IGHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F207IGHX_usb_HID INTERFACE) target_compile_options(GENERIC_F207IGHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F207IGHX_usb_none INTERFACE) target_compile_options(GENERIC_F207IGHX_usb_none INTERFACE @@ -31360,7 +31500,7 @@ set(GENERIC_F207IGTX_MCU cortex-m3) set(GENERIC_F207IGTX_FPCONF "-") add_library(GENERIC_F207IGTX INTERFACE) target_compile_options(GENERIC_F207IGTX INTERFACE - "SHELL:-DSTM32F207xx " + "SHELL:-DSTM32F207xx" "SHELL:" "SHELL:" "SHELL: " @@ -31405,15 +31545,15 @@ target_compile_options(GENERIC_F207IGTX_serial_none INTERFACE ) add_library(GENERIC_F207IGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F207IGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F207IGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F207IGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F207IGTX_usb_HID INTERFACE) target_compile_options(GENERIC_F207IGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F207IGTX_usb_none INTERFACE) target_compile_options(GENERIC_F207IGTX_usb_none INTERFACE @@ -31442,7 +31582,7 @@ set(GENERIC_F207VCTX_MCU cortex-m3) set(GENERIC_F207VCTX_FPCONF "-") add_library(GENERIC_F207VCTX INTERFACE) target_compile_options(GENERIC_F207VCTX INTERFACE - "SHELL:-DSTM32F207xx " + "SHELL:-DSTM32F207xx" "SHELL:" "SHELL:" "SHELL: " @@ -31487,15 +31627,15 @@ target_compile_options(GENERIC_F207VCTX_serial_none INTERFACE ) add_library(GENERIC_F207VCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F207VCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F207VCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F207VCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F207VCTX_usb_HID INTERFACE) target_compile_options(GENERIC_F207VCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F207VCTX_usb_none INTERFACE) target_compile_options(GENERIC_F207VCTX_usb_none INTERFACE @@ -31524,7 +31664,7 @@ set(GENERIC_F207VETX_MCU cortex-m3) set(GENERIC_F207VETX_FPCONF "-") add_library(GENERIC_F207VETX INTERFACE) target_compile_options(GENERIC_F207VETX INTERFACE - "SHELL:-DSTM32F207xx " + "SHELL:-DSTM32F207xx" "SHELL:" "SHELL:" "SHELL: " @@ -31569,15 +31709,15 @@ target_compile_options(GENERIC_F207VETX_serial_none INTERFACE ) add_library(GENERIC_F207VETX_usb_CDC INTERFACE) target_compile_options(GENERIC_F207VETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F207VETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F207VETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F207VETX_usb_HID INTERFACE) target_compile_options(GENERIC_F207VETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F207VETX_usb_none INTERFACE) target_compile_options(GENERIC_F207VETX_usb_none INTERFACE @@ -31606,7 +31746,7 @@ set(GENERIC_F207VFTX_MCU cortex-m3) set(GENERIC_F207VFTX_FPCONF "-") add_library(GENERIC_F207VFTX INTERFACE) target_compile_options(GENERIC_F207VFTX INTERFACE - "SHELL:-DSTM32F207xx " + "SHELL:-DSTM32F207xx" "SHELL:" "SHELL:" "SHELL: " @@ -31651,15 +31791,15 @@ target_compile_options(GENERIC_F207VFTX_serial_none INTERFACE ) add_library(GENERIC_F207VFTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F207VFTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F207VFTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F207VFTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F207VFTX_usb_HID INTERFACE) target_compile_options(GENERIC_F207VFTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F207VFTX_usb_none INTERFACE) target_compile_options(GENERIC_F207VFTX_usb_none INTERFACE @@ -31688,7 +31828,7 @@ set(GENERIC_F207VGTX_MCU cortex-m3) set(GENERIC_F207VGTX_FPCONF "-") add_library(GENERIC_F207VGTX INTERFACE) target_compile_options(GENERIC_F207VGTX INTERFACE - "SHELL:-DSTM32F207xx " + "SHELL:-DSTM32F207xx" "SHELL:" "SHELL:" "SHELL: " @@ -31733,15 +31873,15 @@ target_compile_options(GENERIC_F207VGTX_serial_none INTERFACE ) add_library(GENERIC_F207VGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F207VGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F207VGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F207VGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F207VGTX_usb_HID INTERFACE) target_compile_options(GENERIC_F207VGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F207VGTX_usb_none INTERFACE) target_compile_options(GENERIC_F207VGTX_usb_none INTERFACE @@ -31770,7 +31910,7 @@ set(GENERIC_F207ZCTX_MCU cortex-m3) set(GENERIC_F207ZCTX_FPCONF "-") add_library(GENERIC_F207ZCTX INTERFACE) target_compile_options(GENERIC_F207ZCTX INTERFACE - "SHELL:-DSTM32F207xx " + "SHELL:-DSTM32F207xx" "SHELL:" "SHELL:" "SHELL: " @@ -31815,15 +31955,15 @@ target_compile_options(GENERIC_F207ZCTX_serial_none INTERFACE ) add_library(GENERIC_F207ZCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F207ZCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F207ZCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F207ZCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F207ZCTX_usb_HID INTERFACE) target_compile_options(GENERIC_F207ZCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F207ZCTX_usb_none INTERFACE) target_compile_options(GENERIC_F207ZCTX_usb_none INTERFACE @@ -31852,7 +31992,7 @@ set(GENERIC_F207ZETX_MCU cortex-m3) set(GENERIC_F207ZETX_FPCONF "-") add_library(GENERIC_F207ZETX INTERFACE) target_compile_options(GENERIC_F207ZETX INTERFACE - "SHELL:-DSTM32F207xx " + "SHELL:-DSTM32F207xx" "SHELL:" "SHELL:" "SHELL: " @@ -31897,15 +32037,15 @@ target_compile_options(GENERIC_F207ZETX_serial_none INTERFACE ) add_library(GENERIC_F207ZETX_usb_CDC INTERFACE) target_compile_options(GENERIC_F207ZETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F207ZETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F207ZETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F207ZETX_usb_HID INTERFACE) target_compile_options(GENERIC_F207ZETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F207ZETX_usb_none INTERFACE) target_compile_options(GENERIC_F207ZETX_usb_none INTERFACE @@ -31934,7 +32074,7 @@ set(GENERIC_F207ZFTX_MCU cortex-m3) set(GENERIC_F207ZFTX_FPCONF "-") add_library(GENERIC_F207ZFTX INTERFACE) target_compile_options(GENERIC_F207ZFTX INTERFACE - "SHELL:-DSTM32F207xx " + "SHELL:-DSTM32F207xx" "SHELL:" "SHELL:" "SHELL: " @@ -31979,15 +32119,15 @@ target_compile_options(GENERIC_F207ZFTX_serial_none INTERFACE ) add_library(GENERIC_F207ZFTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F207ZFTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F207ZFTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F207ZFTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F207ZFTX_usb_HID INTERFACE) target_compile_options(GENERIC_F207ZFTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F207ZFTX_usb_none INTERFACE) target_compile_options(GENERIC_F207ZFTX_usb_none INTERFACE @@ -32016,7 +32156,7 @@ set(GENERIC_F207ZGTX_MCU cortex-m3) set(GENERIC_F207ZGTX_FPCONF "-") add_library(GENERIC_F207ZGTX INTERFACE) target_compile_options(GENERIC_F207ZGTX INTERFACE - "SHELL:-DSTM32F207xx " + "SHELL:-DSTM32F207xx" "SHELL:" "SHELL:" "SHELL: " @@ -32061,15 +32201,15 @@ target_compile_options(GENERIC_F207ZGTX_serial_none INTERFACE ) add_library(GENERIC_F207ZGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F207ZGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F207ZGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F207ZGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F207ZGTX_usb_HID INTERFACE) target_compile_options(GENERIC_F207ZGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F207ZGTX_usb_none INTERFACE) target_compile_options(GENERIC_F207ZGTX_usb_none INTERFACE @@ -32098,7 +32238,7 @@ set(GENERIC_F215RETX_MCU cortex-m3) set(GENERIC_F215RETX_FPCONF "-") add_library(GENERIC_F215RETX INTERFACE) target_compile_options(GENERIC_F215RETX INTERFACE - "SHELL:-DSTM32F215xx " + "SHELL:-DSTM32F215xx" "SHELL:" "SHELL:" "SHELL: " @@ -32143,15 +32283,15 @@ target_compile_options(GENERIC_F215RETX_serial_none INTERFACE ) add_library(GENERIC_F215RETX_usb_CDC INTERFACE) target_compile_options(GENERIC_F215RETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F215RETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F215RETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F215RETX_usb_HID INTERFACE) target_compile_options(GENERIC_F215RETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F215RETX_usb_none INTERFACE) target_compile_options(GENERIC_F215RETX_usb_none INTERFACE @@ -32180,7 +32320,7 @@ set(GENERIC_F215RGTX_MCU cortex-m3) set(GENERIC_F215RGTX_FPCONF "-") add_library(GENERIC_F215RGTX INTERFACE) target_compile_options(GENERIC_F215RGTX INTERFACE - "SHELL:-DSTM32F215xx " + "SHELL:-DSTM32F215xx" "SHELL:" "SHELL:" "SHELL: " @@ -32225,15 +32365,15 @@ target_compile_options(GENERIC_F215RGTX_serial_none INTERFACE ) add_library(GENERIC_F215RGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F215RGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F215RGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F215RGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F215RGTX_usb_HID INTERFACE) target_compile_options(GENERIC_F215RGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F215RGTX_usb_none INTERFACE) target_compile_options(GENERIC_F215RGTX_usb_none INTERFACE @@ -32262,7 +32402,7 @@ set(GENERIC_F215VETX_MCU cortex-m3) set(GENERIC_F215VETX_FPCONF "-") add_library(GENERIC_F215VETX INTERFACE) target_compile_options(GENERIC_F215VETX INTERFACE - "SHELL:-DSTM32F215xx " + "SHELL:-DSTM32F215xx" "SHELL:" "SHELL:" "SHELL: " @@ -32307,15 +32447,15 @@ target_compile_options(GENERIC_F215VETX_serial_none INTERFACE ) add_library(GENERIC_F215VETX_usb_CDC INTERFACE) target_compile_options(GENERIC_F215VETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F215VETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F215VETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F215VETX_usb_HID INTERFACE) target_compile_options(GENERIC_F215VETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F215VETX_usb_none INTERFACE) target_compile_options(GENERIC_F215VETX_usb_none INTERFACE @@ -32344,7 +32484,7 @@ set(GENERIC_F215VGTX_MCU cortex-m3) set(GENERIC_F215VGTX_FPCONF "-") add_library(GENERIC_F215VGTX INTERFACE) target_compile_options(GENERIC_F215VGTX INTERFACE - "SHELL:-DSTM32F215xx " + "SHELL:-DSTM32F215xx" "SHELL:" "SHELL:" "SHELL: " @@ -32389,15 +32529,15 @@ target_compile_options(GENERIC_F215VGTX_serial_none INTERFACE ) add_library(GENERIC_F215VGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F215VGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F215VGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F215VGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F215VGTX_usb_HID INTERFACE) target_compile_options(GENERIC_F215VGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F215VGTX_usb_none INTERFACE) target_compile_options(GENERIC_F215VGTX_usb_none INTERFACE @@ -32426,7 +32566,7 @@ set(GENERIC_F215ZETX_MCU cortex-m3) set(GENERIC_F215ZETX_FPCONF "-") add_library(GENERIC_F215ZETX INTERFACE) target_compile_options(GENERIC_F215ZETX INTERFACE - "SHELL:-DSTM32F215xx " + "SHELL:-DSTM32F215xx" "SHELL:" "SHELL:" "SHELL: " @@ -32471,15 +32611,15 @@ target_compile_options(GENERIC_F215ZETX_serial_none INTERFACE ) add_library(GENERIC_F215ZETX_usb_CDC INTERFACE) target_compile_options(GENERIC_F215ZETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F215ZETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F215ZETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F215ZETX_usb_HID INTERFACE) target_compile_options(GENERIC_F215ZETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F215ZETX_usb_none INTERFACE) target_compile_options(GENERIC_F215ZETX_usb_none INTERFACE @@ -32508,7 +32648,7 @@ set(GENERIC_F215ZGTX_MCU cortex-m3) set(GENERIC_F215ZGTX_FPCONF "-") add_library(GENERIC_F215ZGTX INTERFACE) target_compile_options(GENERIC_F215ZGTX INTERFACE - "SHELL:-DSTM32F215xx " + "SHELL:-DSTM32F215xx" "SHELL:" "SHELL:" "SHELL: " @@ -32553,15 +32693,15 @@ target_compile_options(GENERIC_F215ZGTX_serial_none INTERFACE ) add_library(GENERIC_F215ZGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F215ZGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F215ZGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F215ZGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F215ZGTX_usb_HID INTERFACE) target_compile_options(GENERIC_F215ZGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F215ZGTX_usb_none INTERFACE) target_compile_options(GENERIC_F215ZGTX_usb_none INTERFACE @@ -32590,7 +32730,7 @@ set(GENERIC_F217IEHX_MCU cortex-m3) set(GENERIC_F217IEHX_FPCONF "-") add_library(GENERIC_F217IEHX INTERFACE) target_compile_options(GENERIC_F217IEHX INTERFACE - "SHELL:-DSTM32F217xx " + "SHELL:-DSTM32F217xx" "SHELL:" "SHELL:" "SHELL: " @@ -32635,15 +32775,15 @@ target_compile_options(GENERIC_F217IEHX_serial_none INTERFACE ) add_library(GENERIC_F217IEHX_usb_CDC INTERFACE) target_compile_options(GENERIC_F217IEHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F217IEHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F217IEHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F217IEHX_usb_HID INTERFACE) target_compile_options(GENERIC_F217IEHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F217IEHX_usb_none INTERFACE) target_compile_options(GENERIC_F217IEHX_usb_none INTERFACE @@ -32672,7 +32812,7 @@ set(GENERIC_F217IETX_MCU cortex-m3) set(GENERIC_F217IETX_FPCONF "-") add_library(GENERIC_F217IETX INTERFACE) target_compile_options(GENERIC_F217IETX INTERFACE - "SHELL:-DSTM32F217xx " + "SHELL:-DSTM32F217xx" "SHELL:" "SHELL:" "SHELL: " @@ -32717,15 +32857,15 @@ target_compile_options(GENERIC_F217IETX_serial_none INTERFACE ) add_library(GENERIC_F217IETX_usb_CDC INTERFACE) target_compile_options(GENERIC_F217IETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F217IETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F217IETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F217IETX_usb_HID INTERFACE) target_compile_options(GENERIC_F217IETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F217IETX_usb_none INTERFACE) target_compile_options(GENERIC_F217IETX_usb_none INTERFACE @@ -32754,7 +32894,7 @@ set(GENERIC_F217IGHX_MCU cortex-m3) set(GENERIC_F217IGHX_FPCONF "-") add_library(GENERIC_F217IGHX INTERFACE) target_compile_options(GENERIC_F217IGHX INTERFACE - "SHELL:-DSTM32F217xx " + "SHELL:-DSTM32F217xx" "SHELL:" "SHELL:" "SHELL: " @@ -32799,15 +32939,15 @@ target_compile_options(GENERIC_F217IGHX_serial_none INTERFACE ) add_library(GENERIC_F217IGHX_usb_CDC INTERFACE) target_compile_options(GENERIC_F217IGHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F217IGHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F217IGHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F217IGHX_usb_HID INTERFACE) target_compile_options(GENERIC_F217IGHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F217IGHX_usb_none INTERFACE) target_compile_options(GENERIC_F217IGHX_usb_none INTERFACE @@ -32836,7 +32976,7 @@ set(GENERIC_F217IGTX_MCU cortex-m3) set(GENERIC_F217IGTX_FPCONF "-") add_library(GENERIC_F217IGTX INTERFACE) target_compile_options(GENERIC_F217IGTX INTERFACE - "SHELL:-DSTM32F217xx " + "SHELL:-DSTM32F217xx" "SHELL:" "SHELL:" "SHELL: " @@ -32881,15 +33021,15 @@ target_compile_options(GENERIC_F217IGTX_serial_none INTERFACE ) add_library(GENERIC_F217IGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F217IGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F217IGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F217IGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F217IGTX_usb_HID INTERFACE) target_compile_options(GENERIC_F217IGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F217IGTX_usb_none INTERFACE) target_compile_options(GENERIC_F217IGTX_usb_none INTERFACE @@ -32918,7 +33058,7 @@ set(GENERIC_F217VETX_MCU cortex-m3) set(GENERIC_F217VETX_FPCONF "-") add_library(GENERIC_F217VETX INTERFACE) target_compile_options(GENERIC_F217VETX INTERFACE - "SHELL:-DSTM32F217xx " + "SHELL:-DSTM32F217xx" "SHELL:" "SHELL:" "SHELL: " @@ -32963,15 +33103,15 @@ target_compile_options(GENERIC_F217VETX_serial_none INTERFACE ) add_library(GENERIC_F217VETX_usb_CDC INTERFACE) target_compile_options(GENERIC_F217VETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F217VETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F217VETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F217VETX_usb_HID INTERFACE) target_compile_options(GENERIC_F217VETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F217VETX_usb_none INTERFACE) target_compile_options(GENERIC_F217VETX_usb_none INTERFACE @@ -33000,7 +33140,7 @@ set(GENERIC_F217VGTX_MCU cortex-m3) set(GENERIC_F217VGTX_FPCONF "-") add_library(GENERIC_F217VGTX INTERFACE) target_compile_options(GENERIC_F217VGTX INTERFACE - "SHELL:-DSTM32F217xx " + "SHELL:-DSTM32F217xx" "SHELL:" "SHELL:" "SHELL: " @@ -33045,15 +33185,15 @@ target_compile_options(GENERIC_F217VGTX_serial_none INTERFACE ) add_library(GENERIC_F217VGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F217VGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F217VGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F217VGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F217VGTX_usb_HID INTERFACE) target_compile_options(GENERIC_F217VGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F217VGTX_usb_none INTERFACE) target_compile_options(GENERIC_F217VGTX_usb_none INTERFACE @@ -33082,7 +33222,7 @@ set(GENERIC_F217ZETX_MCU cortex-m3) set(GENERIC_F217ZETX_FPCONF "-") add_library(GENERIC_F217ZETX INTERFACE) target_compile_options(GENERIC_F217ZETX INTERFACE - "SHELL:-DSTM32F217xx " + "SHELL:-DSTM32F217xx" "SHELL:" "SHELL:" "SHELL: " @@ -33127,15 +33267,15 @@ target_compile_options(GENERIC_F217ZETX_serial_none INTERFACE ) add_library(GENERIC_F217ZETX_usb_CDC INTERFACE) target_compile_options(GENERIC_F217ZETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F217ZETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F217ZETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F217ZETX_usb_HID INTERFACE) target_compile_options(GENERIC_F217ZETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F217ZETX_usb_none INTERFACE) target_compile_options(GENERIC_F217ZETX_usb_none INTERFACE @@ -33164,7 +33304,7 @@ set(GENERIC_F217ZGTX_MCU cortex-m3) set(GENERIC_F217ZGTX_FPCONF "-") add_library(GENERIC_F217ZGTX INTERFACE) target_compile_options(GENERIC_F217ZGTX INTERFACE - "SHELL:-DSTM32F217xx " + "SHELL:-DSTM32F217xx" "SHELL:" "SHELL:" "SHELL: " @@ -33209,15 +33349,15 @@ target_compile_options(GENERIC_F217ZGTX_serial_none INTERFACE ) add_library(GENERIC_F217ZGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F217ZGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F217ZGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F217ZGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F217ZGTX_usb_HID INTERFACE) target_compile_options(GENERIC_F217ZGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F217ZGTX_usb_none INTERFACE) target_compile_options(GENERIC_F217ZGTX_usb_none INTERFACE @@ -33246,7 +33386,7 @@ set(GENERIC_F301C6TX_MCU cortex-m4) set(GENERIC_F301C6TX_FPCONF "-") add_library(GENERIC_F301C6TX INTERFACE) target_compile_options(GENERIC_F301C6TX INTERFACE - "SHELL:-DSTM32F301x8 " + "SHELL:-DSTM32F301x8" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -33291,15 +33431,15 @@ target_compile_options(GENERIC_F301C6TX_serial_none INTERFACE ) add_library(GENERIC_F301C6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F301C6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F301C6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F301C6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F301C6TX_usb_HID INTERFACE) target_compile_options(GENERIC_F301C6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F301C6TX_usb_none INTERFACE) target_compile_options(GENERIC_F301C6TX_usb_none INTERFACE @@ -33328,7 +33468,7 @@ set(GENERIC_F301C8TX_MCU cortex-m4) set(GENERIC_F301C8TX_FPCONF "-") add_library(GENERIC_F301C8TX INTERFACE) target_compile_options(GENERIC_F301C8TX INTERFACE - "SHELL:-DSTM32F301x8 " + "SHELL:-DSTM32F301x8" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -33373,15 +33513,15 @@ target_compile_options(GENERIC_F301C8TX_serial_none INTERFACE ) add_library(GENERIC_F301C8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F301C8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F301C8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F301C8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F301C8TX_usb_HID INTERFACE) target_compile_options(GENERIC_F301C8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F301C8TX_usb_none INTERFACE) target_compile_options(GENERIC_F301C8TX_usb_none INTERFACE @@ -33410,7 +33550,7 @@ set(GENERIC_F301C8YX_MCU cortex-m4) set(GENERIC_F301C8YX_FPCONF "-") add_library(GENERIC_F301C8YX INTERFACE) target_compile_options(GENERIC_F301C8YX INTERFACE - "SHELL:-DSTM32F301x8 " + "SHELL:-DSTM32F301x8" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -33455,15 +33595,15 @@ target_compile_options(GENERIC_F301C8YX_serial_none INTERFACE ) add_library(GENERIC_F301C8YX_usb_CDC INTERFACE) target_compile_options(GENERIC_F301C8YX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F301C8YX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F301C8YX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F301C8YX_usb_HID INTERFACE) target_compile_options(GENERIC_F301C8YX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F301C8YX_usb_none INTERFACE) target_compile_options(GENERIC_F301C8YX_usb_none INTERFACE @@ -33492,7 +33632,7 @@ set(GENERIC_F301K6TX_MCU cortex-m4) set(GENERIC_F301K6TX_FPCONF "-") add_library(GENERIC_F301K6TX INTERFACE) target_compile_options(GENERIC_F301K6TX INTERFACE - "SHELL:-DSTM32F301x8 " + "SHELL:-DSTM32F301x8" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -33537,15 +33677,15 @@ target_compile_options(GENERIC_F301K6TX_serial_none INTERFACE ) add_library(GENERIC_F301K6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F301K6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F301K6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F301K6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F301K6TX_usb_HID INTERFACE) target_compile_options(GENERIC_F301K6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F301K6TX_usb_none INTERFACE) target_compile_options(GENERIC_F301K6TX_usb_none INTERFACE @@ -33574,7 +33714,7 @@ set(GENERIC_F301K8TX_MCU cortex-m4) set(GENERIC_F301K8TX_FPCONF "-") add_library(GENERIC_F301K8TX INTERFACE) target_compile_options(GENERIC_F301K8TX INTERFACE - "SHELL:-DSTM32F301x8 " + "SHELL:-DSTM32F301x8" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -33619,15 +33759,15 @@ target_compile_options(GENERIC_F301K8TX_serial_none INTERFACE ) add_library(GENERIC_F301K8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F301K8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F301K8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F301K8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F301K8TX_usb_HID INTERFACE) target_compile_options(GENERIC_F301K8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F301K8TX_usb_none INTERFACE) target_compile_options(GENERIC_F301K8TX_usb_none INTERFACE @@ -33656,7 +33796,7 @@ set(GENERIC_F301R6TX_MCU cortex-m4) set(GENERIC_F301R6TX_FPCONF "-") add_library(GENERIC_F301R6TX INTERFACE) target_compile_options(GENERIC_F301R6TX INTERFACE - "SHELL:-DSTM32F301x8 " + "SHELL:-DSTM32F301x8" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -33701,15 +33841,15 @@ target_compile_options(GENERIC_F301R6TX_serial_none INTERFACE ) add_library(GENERIC_F301R6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F301R6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F301R6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F301R6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F301R6TX_usb_HID INTERFACE) target_compile_options(GENERIC_F301R6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F301R6TX_usb_none INTERFACE) target_compile_options(GENERIC_F301R6TX_usb_none INTERFACE @@ -33738,7 +33878,7 @@ set(GENERIC_F301R8TX_MCU cortex-m4) set(GENERIC_F301R8TX_FPCONF "-") add_library(GENERIC_F301R8TX INTERFACE) target_compile_options(GENERIC_F301R8TX INTERFACE - "SHELL:-DSTM32F301x8 " + "SHELL:-DSTM32F301x8" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -33783,15 +33923,15 @@ target_compile_options(GENERIC_F301R8TX_serial_none INTERFACE ) add_library(GENERIC_F301R8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F301R8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F301R8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F301R8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F301R8TX_usb_HID INTERFACE) target_compile_options(GENERIC_F301R8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F301R8TX_usb_none INTERFACE) target_compile_options(GENERIC_F301R8TX_usb_none INTERFACE @@ -33820,7 +33960,7 @@ set(GENERIC_F302R6TX_MCU cortex-m4) set(GENERIC_F302R6TX_FPCONF "-") add_library(GENERIC_F302R6TX INTERFACE) target_compile_options(GENERIC_F302R6TX INTERFACE - "SHELL:-DSTM32F302x8 " + "SHELL:-DSTM32F302x8" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -33865,15 +34005,15 @@ target_compile_options(GENERIC_F302R6TX_serial_none INTERFACE ) add_library(GENERIC_F302R6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F302R6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F302R6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F302R6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F302R6TX_usb_HID INTERFACE) target_compile_options(GENERIC_F302R6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F302R6TX_usb_none INTERFACE) target_compile_options(GENERIC_F302R6TX_usb_none INTERFACE @@ -33902,7 +34042,7 @@ set(GENERIC_F302R8TX_MCU cortex-m4) set(GENERIC_F302R8TX_FPCONF "-") add_library(GENERIC_F302R8TX INTERFACE) target_compile_options(GENERIC_F302R8TX INTERFACE - "SHELL:-DSTM32F302x8 " + "SHELL:-DSTM32F302x8" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -33947,15 +34087,15 @@ target_compile_options(GENERIC_F302R8TX_serial_none INTERFACE ) add_library(GENERIC_F302R8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F302R8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F302R8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F302R8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F302R8TX_usb_HID INTERFACE) target_compile_options(GENERIC_F302R8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F302R8TX_usb_none INTERFACE) target_compile_options(GENERIC_F302R8TX_usb_none INTERFACE @@ -33984,7 +34124,7 @@ set(GENERIC_F303C6TX_MCU cortex-m4) set(GENERIC_F303C6TX_FPCONF "-") add_library(GENERIC_F303C6TX INTERFACE) target_compile_options(GENERIC_F303C6TX INTERFACE - "SHELL:-DSTM32F303x8 " + "SHELL:-DSTM32F303x8" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -34029,15 +34169,15 @@ target_compile_options(GENERIC_F303C6TX_serial_none INTERFACE ) add_library(GENERIC_F303C6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F303C6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F303C6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F303C6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F303C6TX_usb_HID INTERFACE) target_compile_options(GENERIC_F303C6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F303C6TX_usb_none INTERFACE) target_compile_options(GENERIC_F303C6TX_usb_none INTERFACE @@ -34066,7 +34206,7 @@ set(GENERIC_F303C8TX_MCU cortex-m4) set(GENERIC_F303C8TX_FPCONF "-") add_library(GENERIC_F303C8TX INTERFACE) target_compile_options(GENERIC_F303C8TX INTERFACE - "SHELL:-DSTM32F303x8 " + "SHELL:-DSTM32F303x8" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -34111,15 +34251,15 @@ target_compile_options(GENERIC_F303C8TX_serial_none INTERFACE ) add_library(GENERIC_F303C8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F303C8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F303C8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F303C8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F303C8TX_usb_HID INTERFACE) target_compile_options(GENERIC_F303C8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F303C8TX_usb_none INTERFACE) target_compile_options(GENERIC_F303C8TX_usb_none INTERFACE @@ -34148,7 +34288,7 @@ set(GENERIC_F303CBTX_MCU cortex-m4) set(GENERIC_F303CBTX_FPCONF "-") add_library(GENERIC_F303CBTX INTERFACE) target_compile_options(GENERIC_F303CBTX INTERFACE - "SHELL:-DSTM32F303xC " + "SHELL:-DSTM32F303xC" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -34193,15 +34333,15 @@ target_compile_options(GENERIC_F303CBTX_serial_none INTERFACE ) add_library(GENERIC_F303CBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F303CBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F303CBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F303CBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F303CBTX_usb_HID INTERFACE) target_compile_options(GENERIC_F303CBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F303CBTX_usb_none INTERFACE) target_compile_options(GENERIC_F303CBTX_usb_none INTERFACE @@ -34230,7 +34370,7 @@ set(GENERIC_F303CCTX_MCU cortex-m4) set(GENERIC_F303CCTX_FPCONF "-") add_library(GENERIC_F303CCTX INTERFACE) target_compile_options(GENERIC_F303CCTX INTERFACE - "SHELL:-DSTM32F303xC " + "SHELL:-DSTM32F303xC" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -34275,15 +34415,15 @@ target_compile_options(GENERIC_F303CCTX_serial_none INTERFACE ) add_library(GENERIC_F303CCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F303CCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F303CCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F303CCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F303CCTX_usb_HID INTERFACE) target_compile_options(GENERIC_F303CCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F303CCTX_usb_none INTERFACE) target_compile_options(GENERIC_F303CCTX_usb_none INTERFACE @@ -34312,7 +34452,7 @@ set(GENERIC_F303K6TX_MCU cortex-m4) set(GENERIC_F303K6TX_FPCONF "-") add_library(GENERIC_F303K6TX INTERFACE) target_compile_options(GENERIC_F303K6TX INTERFACE - "SHELL:-DSTM32F303x8 " + "SHELL:-DSTM32F303x8" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -34357,15 +34497,15 @@ target_compile_options(GENERIC_F303K6TX_serial_none INTERFACE ) add_library(GENERIC_F303K6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F303K6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F303K6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F303K6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F303K6TX_usb_HID INTERFACE) target_compile_options(GENERIC_F303K6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F303K6TX_usb_none INTERFACE) target_compile_options(GENERIC_F303K6TX_usb_none INTERFACE @@ -34394,7 +34534,7 @@ set(GENERIC_F303K8TX_MCU cortex-m4) set(GENERIC_F303K8TX_FPCONF "-") add_library(GENERIC_F303K8TX INTERFACE) target_compile_options(GENERIC_F303K8TX INTERFACE - "SHELL:-DSTM32F303x8 " + "SHELL:-DSTM32F303x8" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -34439,15 +34579,15 @@ target_compile_options(GENERIC_F303K8TX_serial_none INTERFACE ) add_library(GENERIC_F303K8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F303K8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F303K8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F303K8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F303K8TX_usb_HID INTERFACE) target_compile_options(GENERIC_F303K8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F303K8TX_usb_none INTERFACE) target_compile_options(GENERIC_F303K8TX_usb_none INTERFACE @@ -34476,7 +34616,7 @@ set(GENERIC_F303R6TX_MCU cortex-m4) set(GENERIC_F303R6TX_FPCONF "-") add_library(GENERIC_F303R6TX INTERFACE) target_compile_options(GENERIC_F303R6TX INTERFACE - "SHELL:-DSTM32F303x8 " + "SHELL:-DSTM32F303x8" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -34521,15 +34661,15 @@ target_compile_options(GENERIC_F303R6TX_serial_none INTERFACE ) add_library(GENERIC_F303R6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F303R6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F303R6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F303R6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F303R6TX_usb_HID INTERFACE) target_compile_options(GENERIC_F303R6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F303R6TX_usb_none INTERFACE) target_compile_options(GENERIC_F303R6TX_usb_none INTERFACE @@ -34558,7 +34698,7 @@ set(GENERIC_F303R8TX_MCU cortex-m4) set(GENERIC_F303R8TX_FPCONF "-") add_library(GENERIC_F303R8TX INTERFACE) target_compile_options(GENERIC_F303R8TX INTERFACE - "SHELL:-DSTM32F303x8 " + "SHELL:-DSTM32F303x8" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -34603,15 +34743,15 @@ target_compile_options(GENERIC_F303R8TX_serial_none INTERFACE ) add_library(GENERIC_F303R8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F303R8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F303R8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F303R8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F303R8TX_usb_HID INTERFACE) target_compile_options(GENERIC_F303R8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F303R8TX_usb_none INTERFACE) target_compile_options(GENERIC_F303R8TX_usb_none INTERFACE @@ -34640,7 +34780,7 @@ set(GENERIC_F303RBTX_MCU cortex-m4) set(GENERIC_F303RBTX_FPCONF "-") add_library(GENERIC_F303RBTX INTERFACE) target_compile_options(GENERIC_F303RBTX INTERFACE - "SHELL:-DSTM32F303xC " + "SHELL:-DSTM32F303xC" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -34685,15 +34825,15 @@ target_compile_options(GENERIC_F303RBTX_serial_none INTERFACE ) add_library(GENERIC_F303RBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F303RBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F303RBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F303RBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F303RBTX_usb_HID INTERFACE) target_compile_options(GENERIC_F303RBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F303RBTX_usb_none INTERFACE) target_compile_options(GENERIC_F303RBTX_usb_none INTERFACE @@ -34722,7 +34862,7 @@ set(GENERIC_F303RCTX_MCU cortex-m4) set(GENERIC_F303RCTX_FPCONF "-") add_library(GENERIC_F303RCTX INTERFACE) target_compile_options(GENERIC_F303RCTX INTERFACE - "SHELL:-DSTM32F303xC " + "SHELL:-DSTM32F303xC" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -34767,15 +34907,15 @@ target_compile_options(GENERIC_F303RCTX_serial_none INTERFACE ) add_library(GENERIC_F303RCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F303RCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F303RCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F303RCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F303RCTX_usb_HID INTERFACE) target_compile_options(GENERIC_F303RCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F303RCTX_usb_none INTERFACE) target_compile_options(GENERIC_F303RCTX_usb_none INTERFACE @@ -34804,7 +34944,7 @@ set(GENERIC_F303RDTX_MCU cortex-m4) set(GENERIC_F303RDTX_FPCONF "-") add_library(GENERIC_F303RDTX INTERFACE) target_compile_options(GENERIC_F303RDTX INTERFACE - "SHELL:-DSTM32F303xE " + "SHELL:-DSTM32F303xE" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -34849,15 +34989,15 @@ target_compile_options(GENERIC_F303RDTX_serial_none INTERFACE ) add_library(GENERIC_F303RDTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F303RDTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F303RDTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F303RDTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F303RDTX_usb_HID INTERFACE) target_compile_options(GENERIC_F303RDTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F303RDTX_usb_none INTERFACE) target_compile_options(GENERIC_F303RDTX_usb_none INTERFACE @@ -34886,7 +35026,7 @@ set(GENERIC_F303RETX_MCU cortex-m4) set(GENERIC_F303RETX_FPCONF "-") add_library(GENERIC_F303RETX INTERFACE) target_compile_options(GENERIC_F303RETX INTERFACE - "SHELL:-DSTM32F303xE " + "SHELL:-DSTM32F303xE" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -34931,15 +35071,15 @@ target_compile_options(GENERIC_F303RETX_serial_none INTERFACE ) add_library(GENERIC_F303RETX_usb_CDC INTERFACE) target_compile_options(GENERIC_F303RETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F303RETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F303RETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F303RETX_usb_HID INTERFACE) target_compile_options(GENERIC_F303RETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F303RETX_usb_none INTERFACE) target_compile_options(GENERIC_F303RETX_usb_none INTERFACE @@ -34968,7 +35108,7 @@ set(GENERIC_F303VBTX_MCU cortex-m4) set(GENERIC_F303VBTX_FPCONF "-") add_library(GENERIC_F303VBTX INTERFACE) target_compile_options(GENERIC_F303VBTX INTERFACE - "SHELL:-DSTM32F303xC " + "SHELL:-DSTM32F303xC" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -35013,15 +35153,15 @@ target_compile_options(GENERIC_F303VBTX_serial_none INTERFACE ) add_library(GENERIC_F303VBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F303VBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F303VBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F303VBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F303VBTX_usb_HID INTERFACE) target_compile_options(GENERIC_F303VBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F303VBTX_usb_none INTERFACE) target_compile_options(GENERIC_F303VBTX_usb_none INTERFACE @@ -35050,7 +35190,7 @@ set(GENERIC_F303VCTX_MCU cortex-m4) set(GENERIC_F303VCTX_FPCONF "-") add_library(GENERIC_F303VCTX INTERFACE) target_compile_options(GENERIC_F303VCTX INTERFACE - "SHELL:-DSTM32F303xC " + "SHELL:-DSTM32F303xC" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -35095,15 +35235,15 @@ target_compile_options(GENERIC_F303VCTX_serial_none INTERFACE ) add_library(GENERIC_F303VCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F303VCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F303VCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F303VCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F303VCTX_usb_HID INTERFACE) target_compile_options(GENERIC_F303VCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F303VCTX_usb_none INTERFACE) target_compile_options(GENERIC_F303VCTX_usb_none INTERFACE @@ -35132,7 +35272,7 @@ set(GENERIC_F318C8TX_MCU cortex-m4) set(GENERIC_F318C8TX_FPCONF "-") add_library(GENERIC_F318C8TX INTERFACE) target_compile_options(GENERIC_F318C8TX INTERFACE - "SHELL:-DSTM32F318xx " + "SHELL:-DSTM32F318xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -35177,15 +35317,15 @@ target_compile_options(GENERIC_F318C8TX_serial_none INTERFACE ) add_library(GENERIC_F318C8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F318C8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F318C8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F318C8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F318C8TX_usb_HID INTERFACE) target_compile_options(GENERIC_F318C8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F318C8TX_usb_none INTERFACE) target_compile_options(GENERIC_F318C8TX_usb_none INTERFACE @@ -35214,7 +35354,7 @@ set(GENERIC_F318C8YX_MCU cortex-m4) set(GENERIC_F318C8YX_FPCONF "-") add_library(GENERIC_F318C8YX INTERFACE) target_compile_options(GENERIC_F318C8YX INTERFACE - "SHELL:-DSTM32F318xx " + "SHELL:-DSTM32F318xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -35259,15 +35399,15 @@ target_compile_options(GENERIC_F318C8YX_serial_none INTERFACE ) add_library(GENERIC_F318C8YX_usb_CDC INTERFACE) target_compile_options(GENERIC_F318C8YX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F318C8YX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F318C8YX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F318C8YX_usb_HID INTERFACE) target_compile_options(GENERIC_F318C8YX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F318C8YX_usb_none INTERFACE) target_compile_options(GENERIC_F318C8YX_usb_none INTERFACE @@ -35296,7 +35436,7 @@ set(GENERIC_F318K8UX_MCU cortex-m4) set(GENERIC_F318K8UX_FPCONF "-") add_library(GENERIC_F318K8UX INTERFACE) target_compile_options(GENERIC_F318K8UX INTERFACE - "SHELL:-DSTM32F318xx " + "SHELL:-DSTM32F318xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -35341,15 +35481,15 @@ target_compile_options(GENERIC_F318K8UX_serial_none INTERFACE ) add_library(GENERIC_F318K8UX_usb_CDC INTERFACE) target_compile_options(GENERIC_F318K8UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F318K8UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F318K8UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F318K8UX_usb_HID INTERFACE) target_compile_options(GENERIC_F318K8UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F318K8UX_usb_none INTERFACE) target_compile_options(GENERIC_F318K8UX_usb_none INTERFACE @@ -35378,7 +35518,7 @@ set(GENERIC_F328C8TX_MCU cortex-m4) set(GENERIC_F328C8TX_FPCONF "-") add_library(GENERIC_F328C8TX INTERFACE) target_compile_options(GENERIC_F328C8TX INTERFACE - "SHELL:-DSTM32F328xx " + "SHELL:-DSTM32F328xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -35423,15 +35563,15 @@ target_compile_options(GENERIC_F328C8TX_serial_none INTERFACE ) add_library(GENERIC_F328C8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F328C8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F328C8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F328C8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F328C8TX_usb_HID INTERFACE) target_compile_options(GENERIC_F328C8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F328C8TX_usb_none INTERFACE) target_compile_options(GENERIC_F328C8TX_usb_none INTERFACE @@ -35460,7 +35600,7 @@ set(GENERIC_F334C4TX_MCU cortex-m4) set(GENERIC_F334C4TX_FPCONF "-") add_library(GENERIC_F334C4TX INTERFACE) target_compile_options(GENERIC_F334C4TX INTERFACE - "SHELL:-DSTM32F334x8 " + "SHELL:-DSTM32F334x8" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -35505,15 +35645,15 @@ target_compile_options(GENERIC_F334C4TX_serial_none INTERFACE ) add_library(GENERIC_F334C4TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F334C4TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F334C4TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F334C4TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F334C4TX_usb_HID INTERFACE) target_compile_options(GENERIC_F334C4TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F334C4TX_usb_none INTERFACE) target_compile_options(GENERIC_F334C4TX_usb_none INTERFACE @@ -35542,7 +35682,7 @@ set(GENERIC_F334C6TX_MCU cortex-m4) set(GENERIC_F334C6TX_FPCONF "-") add_library(GENERIC_F334C6TX INTERFACE) target_compile_options(GENERIC_F334C6TX INTERFACE - "SHELL:-DSTM32F334x8 " + "SHELL:-DSTM32F334x8" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -35587,15 +35727,15 @@ target_compile_options(GENERIC_F334C6TX_serial_none INTERFACE ) add_library(GENERIC_F334C6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F334C6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F334C6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F334C6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F334C6TX_usb_HID INTERFACE) target_compile_options(GENERIC_F334C6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F334C6TX_usb_none INTERFACE) target_compile_options(GENERIC_F334C6TX_usb_none INTERFACE @@ -35624,7 +35764,7 @@ set(GENERIC_F334C8TX_MCU cortex-m4) set(GENERIC_F334C8TX_FPCONF "-") add_library(GENERIC_F334C8TX INTERFACE) target_compile_options(GENERIC_F334C8TX INTERFACE - "SHELL:-DSTM32F334x8 " + "SHELL:-DSTM32F334x8" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -35669,15 +35809,15 @@ target_compile_options(GENERIC_F334C8TX_serial_none INTERFACE ) add_library(GENERIC_F334C8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F334C8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F334C8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F334C8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F334C8TX_usb_HID INTERFACE) target_compile_options(GENERIC_F334C8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F334C8TX_usb_none INTERFACE) target_compile_options(GENERIC_F334C8TX_usb_none INTERFACE @@ -35706,7 +35846,7 @@ set(GENERIC_F334K4TX_MCU cortex-m4) set(GENERIC_F334K4TX_FPCONF "-") add_library(GENERIC_F334K4TX INTERFACE) target_compile_options(GENERIC_F334K4TX INTERFACE - "SHELL:-DSTM32F334x8 " + "SHELL:-DSTM32F334x8" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -35751,15 +35891,15 @@ target_compile_options(GENERIC_F334K4TX_serial_none INTERFACE ) add_library(GENERIC_F334K4TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F334K4TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F334K4TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F334K4TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F334K4TX_usb_HID INTERFACE) target_compile_options(GENERIC_F334K4TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F334K4TX_usb_none INTERFACE) target_compile_options(GENERIC_F334K4TX_usb_none INTERFACE @@ -35788,7 +35928,7 @@ set(GENERIC_F334K6TX_MCU cortex-m4) set(GENERIC_F334K6TX_FPCONF "-") add_library(GENERIC_F334K6TX INTERFACE) target_compile_options(GENERIC_F334K6TX INTERFACE - "SHELL:-DSTM32F334x8 " + "SHELL:-DSTM32F334x8" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -35833,15 +35973,15 @@ target_compile_options(GENERIC_F334K6TX_serial_none INTERFACE ) add_library(GENERIC_F334K6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F334K6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F334K6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F334K6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F334K6TX_usb_HID INTERFACE) target_compile_options(GENERIC_F334K6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F334K6TX_usb_none INTERFACE) target_compile_options(GENERIC_F334K6TX_usb_none INTERFACE @@ -35870,7 +36010,7 @@ set(GENERIC_F334K8TX_MCU cortex-m4) set(GENERIC_F334K8TX_FPCONF "-") add_library(GENERIC_F334K8TX INTERFACE) target_compile_options(GENERIC_F334K8TX INTERFACE - "SHELL:-DSTM32F334x8 " + "SHELL:-DSTM32F334x8" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -35915,15 +36055,15 @@ target_compile_options(GENERIC_F334K8TX_serial_none INTERFACE ) add_library(GENERIC_F334K8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F334K8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F334K8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F334K8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F334K8TX_usb_HID INTERFACE) target_compile_options(GENERIC_F334K8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F334K8TX_usb_none INTERFACE) target_compile_options(GENERIC_F334K8TX_usb_none INTERFACE @@ -35952,7 +36092,7 @@ set(GENERIC_F334R6TX_MCU cortex-m4) set(GENERIC_F334R6TX_FPCONF "-") add_library(GENERIC_F334R6TX INTERFACE) target_compile_options(GENERIC_F334R6TX INTERFACE - "SHELL:-DSTM32F334x8 " + "SHELL:-DSTM32F334x8" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -35997,15 +36137,15 @@ target_compile_options(GENERIC_F334R6TX_serial_none INTERFACE ) add_library(GENERIC_F334R6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F334R6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F334R6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F334R6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F334R6TX_usb_HID INTERFACE) target_compile_options(GENERIC_F334R6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F334R6TX_usb_none INTERFACE) target_compile_options(GENERIC_F334R6TX_usb_none INTERFACE @@ -36034,7 +36174,7 @@ set(GENERIC_F334R8TX_MCU cortex-m4) set(GENERIC_F334R8TX_FPCONF "-") add_library(GENERIC_F334R8TX INTERFACE) target_compile_options(GENERIC_F334R8TX INTERFACE - "SHELL:-DSTM32F334x8 " + "SHELL:-DSTM32F334x8" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -36079,15 +36219,15 @@ target_compile_options(GENERIC_F334R8TX_serial_none INTERFACE ) add_library(GENERIC_F334R8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F334R8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F334R8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F334R8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F334R8TX_usb_HID INTERFACE) target_compile_options(GENERIC_F334R8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F334R8TX_usb_none INTERFACE) target_compile_options(GENERIC_F334R8TX_usb_none INTERFACE @@ -36116,7 +36256,7 @@ set(GENERIC_F358CCTX_MCU cortex-m4) set(GENERIC_F358CCTX_FPCONF "-") add_library(GENERIC_F358CCTX INTERFACE) target_compile_options(GENERIC_F358CCTX INTERFACE - "SHELL:-DSTM32F358xx " + "SHELL:-DSTM32F358xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -36161,15 +36301,15 @@ target_compile_options(GENERIC_F358CCTX_serial_none INTERFACE ) add_library(GENERIC_F358CCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F358CCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F358CCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F358CCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F358CCTX_usb_HID INTERFACE) target_compile_options(GENERIC_F358CCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F358CCTX_usb_none INTERFACE) target_compile_options(GENERIC_F358CCTX_usb_none INTERFACE @@ -36198,7 +36338,7 @@ set(GENERIC_F358RCTX_MCU cortex-m4) set(GENERIC_F358RCTX_FPCONF "-") add_library(GENERIC_F358RCTX INTERFACE) target_compile_options(GENERIC_F358RCTX INTERFACE - "SHELL:-DSTM32F358xx " + "SHELL:-DSTM32F358xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -36243,15 +36383,15 @@ target_compile_options(GENERIC_F358RCTX_serial_none INTERFACE ) add_library(GENERIC_F358RCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F358RCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F358RCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F358RCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F358RCTX_usb_HID INTERFACE) target_compile_options(GENERIC_F358RCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F358RCTX_usb_none INTERFACE) target_compile_options(GENERIC_F358RCTX_usb_none INTERFACE @@ -36280,7 +36420,7 @@ set(GENERIC_F358VCTX_MCU cortex-m4) set(GENERIC_F358VCTX_FPCONF "-") add_library(GENERIC_F358VCTX INTERFACE) target_compile_options(GENERIC_F358VCTX INTERFACE - "SHELL:-DSTM32F358xx " + "SHELL:-DSTM32F358xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -36325,15 +36465,15 @@ target_compile_options(GENERIC_F358VCTX_serial_none INTERFACE ) add_library(GENERIC_F358VCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F358VCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F358VCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F358VCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F358VCTX_usb_HID INTERFACE) target_compile_options(GENERIC_F358VCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F358VCTX_usb_none INTERFACE) target_compile_options(GENERIC_F358VCTX_usb_none INTERFACE @@ -36362,7 +36502,7 @@ set(GENERIC_F378CCTX_MCU cortex-m4) set(GENERIC_F378CCTX_FPCONF "-") add_library(GENERIC_F378CCTX INTERFACE) target_compile_options(GENERIC_F378CCTX INTERFACE - "SHELL:-DSTM32F378xx " + "SHELL:-DSTM32F378xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -36407,15 +36547,15 @@ target_compile_options(GENERIC_F378CCTX_serial_none INTERFACE ) add_library(GENERIC_F378CCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F378CCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F378CCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F378CCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F378CCTX_usb_HID INTERFACE) target_compile_options(GENERIC_F378CCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F378CCTX_usb_none INTERFACE) target_compile_options(GENERIC_F378CCTX_usb_none INTERFACE @@ -36444,7 +36584,7 @@ set(GENERIC_F378RCTX_MCU cortex-m4) set(GENERIC_F378RCTX_FPCONF "-") add_library(GENERIC_F378RCTX INTERFACE) target_compile_options(GENERIC_F378RCTX INTERFACE - "SHELL:-DSTM32F378xx " + "SHELL:-DSTM32F378xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -36489,15 +36629,15 @@ target_compile_options(GENERIC_F378RCTX_serial_none INTERFACE ) add_library(GENERIC_F378RCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F378RCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F378RCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F378RCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F378RCTX_usb_HID INTERFACE) target_compile_options(GENERIC_F378RCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F378RCTX_usb_none INTERFACE) target_compile_options(GENERIC_F378RCTX_usb_none INTERFACE @@ -36526,7 +36666,7 @@ set(GENERIC_F378RCYX_MCU cortex-m4) set(GENERIC_F378RCYX_FPCONF "-") add_library(GENERIC_F378RCYX INTERFACE) target_compile_options(GENERIC_F378RCYX INTERFACE - "SHELL:-DSTM32F378xx " + "SHELL:-DSTM32F378xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -36571,15 +36711,15 @@ target_compile_options(GENERIC_F378RCYX_serial_none INTERFACE ) add_library(GENERIC_F378RCYX_usb_CDC INTERFACE) target_compile_options(GENERIC_F378RCYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F378RCYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F378RCYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F378RCYX_usb_HID INTERFACE) target_compile_options(GENERIC_F378RCYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F378RCYX_usb_none INTERFACE) target_compile_options(GENERIC_F378RCYX_usb_none INTERFACE @@ -36608,7 +36748,7 @@ set(GENERIC_F378VCHX_MCU cortex-m4) set(GENERIC_F378VCHX_FPCONF "-") add_library(GENERIC_F378VCHX INTERFACE) target_compile_options(GENERIC_F378VCHX INTERFACE - "SHELL:-DSTM32F378xx " + "SHELL:-DSTM32F378xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -36653,15 +36793,15 @@ target_compile_options(GENERIC_F378VCHX_serial_none INTERFACE ) add_library(GENERIC_F378VCHX_usb_CDC INTERFACE) target_compile_options(GENERIC_F378VCHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F378VCHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F378VCHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F378VCHX_usb_HID INTERFACE) target_compile_options(GENERIC_F378VCHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F378VCHX_usb_none INTERFACE) target_compile_options(GENERIC_F378VCHX_usb_none INTERFACE @@ -36690,7 +36830,7 @@ set(GENERIC_F378VCTX_MCU cortex-m4) set(GENERIC_F378VCTX_FPCONF "-") add_library(GENERIC_F378VCTX INTERFACE) target_compile_options(GENERIC_F378VCTX INTERFACE - "SHELL:-DSTM32F378xx " + "SHELL:-DSTM32F378xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -36735,15 +36875,15 @@ target_compile_options(GENERIC_F378VCTX_serial_none INTERFACE ) add_library(GENERIC_F378VCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F378VCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F378VCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F378VCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F378VCTX_usb_HID INTERFACE) target_compile_options(GENERIC_F378VCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F378VCTX_usb_none INTERFACE) target_compile_options(GENERIC_F378VCTX_usb_none INTERFACE @@ -36772,7 +36912,7 @@ set(GENERIC_F398VETX_MCU cortex-m4) set(GENERIC_F398VETX_FPCONF "-") add_library(GENERIC_F398VETX INTERFACE) target_compile_options(GENERIC_F398VETX INTERFACE - "SHELL:-DSTM32F398xx " + "SHELL:-DSTM32F398xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -36817,15 +36957,15 @@ target_compile_options(GENERIC_F398VETX_serial_none INTERFACE ) add_library(GENERIC_F398VETX_usb_CDC INTERFACE) target_compile_options(GENERIC_F398VETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F398VETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F398VETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F398VETX_usb_HID INTERFACE) target_compile_options(GENERIC_F398VETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F398VETX_usb_none INTERFACE) target_compile_options(GENERIC_F398VETX_usb_none INTERFACE @@ -36854,7 +36994,7 @@ set(GENERIC_F401CBUX_MCU cortex-m4) set(GENERIC_F401CBUX_FPCONF "-") add_library(GENERIC_F401CBUX INTERFACE) target_compile_options(GENERIC_F401CBUX INTERFACE - "SHELL:-DSTM32F401xC " + "SHELL:-DSTM32F401xC" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -36899,15 +37039,15 @@ target_compile_options(GENERIC_F401CBUX_serial_none INTERFACE ) add_library(GENERIC_F401CBUX_usb_CDC INTERFACE) target_compile_options(GENERIC_F401CBUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F401CBUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F401CBUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F401CBUX_usb_HID INTERFACE) target_compile_options(GENERIC_F401CBUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F401CBUX_usb_none INTERFACE) target_compile_options(GENERIC_F401CBUX_usb_none INTERFACE @@ -36936,7 +37076,7 @@ set(GENERIC_F401CBUX_hid_MCU cortex-m4) set(GENERIC_F401CBUX_hid_FPCONF "-") add_library(GENERIC_F401CBUX_hid INTERFACE) target_compile_options(GENERIC_F401CBUX_hid INTERFACE - "SHELL:-DSTM32F401xC -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F401xC -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -36978,7 +37118,7 @@ set(GENERIC_F401CBYX_MCU cortex-m4) set(GENERIC_F401CBYX_FPCONF "-") add_library(GENERIC_F401CBYX INTERFACE) target_compile_options(GENERIC_F401CBYX INTERFACE - "SHELL:-DSTM32F401xC " + "SHELL:-DSTM32F401xC" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -37023,15 +37163,15 @@ target_compile_options(GENERIC_F401CBYX_serial_none INTERFACE ) add_library(GENERIC_F401CBYX_usb_CDC INTERFACE) target_compile_options(GENERIC_F401CBYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F401CBYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F401CBYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F401CBYX_usb_HID INTERFACE) target_compile_options(GENERIC_F401CBYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F401CBYX_usb_none INTERFACE) target_compile_options(GENERIC_F401CBYX_usb_none INTERFACE @@ -37060,7 +37200,7 @@ set(GENERIC_F401CBYX_hid_MCU cortex-m4) set(GENERIC_F401CBYX_hid_FPCONF "-") add_library(GENERIC_F401CBYX_hid INTERFACE) target_compile_options(GENERIC_F401CBYX_hid INTERFACE - "SHELL:-DSTM32F401xC -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F401xC -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -37102,7 +37242,7 @@ set(GENERIC_F401CCFX_MCU cortex-m4) set(GENERIC_F401CCFX_FPCONF "-") add_library(GENERIC_F401CCFX INTERFACE) target_compile_options(GENERIC_F401CCFX INTERFACE - "SHELL:-DSTM32F401xC " + "SHELL:-DSTM32F401xC" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -37147,15 +37287,15 @@ target_compile_options(GENERIC_F401CCFX_serial_none INTERFACE ) add_library(GENERIC_F401CCFX_usb_CDC INTERFACE) target_compile_options(GENERIC_F401CCFX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F401CCFX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F401CCFX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F401CCFX_usb_HID INTERFACE) target_compile_options(GENERIC_F401CCFX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F401CCFX_usb_none INTERFACE) target_compile_options(GENERIC_F401CCFX_usb_none INTERFACE @@ -37184,7 +37324,7 @@ set(GENERIC_F401CCFX_hid_MCU cortex-m4) set(GENERIC_F401CCFX_hid_FPCONF "-") add_library(GENERIC_F401CCFX_hid INTERFACE) target_compile_options(GENERIC_F401CCFX_hid INTERFACE - "SHELL:-DSTM32F401xC -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F401xC -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -37226,7 +37366,7 @@ set(GENERIC_F401CCUX_MCU cortex-m4) set(GENERIC_F401CCUX_FPCONF "-") add_library(GENERIC_F401CCUX INTERFACE) target_compile_options(GENERIC_F401CCUX INTERFACE - "SHELL:-DSTM32F401xC " + "SHELL:-DSTM32F401xC" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -37271,15 +37411,15 @@ target_compile_options(GENERIC_F401CCUX_serial_none INTERFACE ) add_library(GENERIC_F401CCUX_usb_CDC INTERFACE) target_compile_options(GENERIC_F401CCUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F401CCUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F401CCUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F401CCUX_usb_HID INTERFACE) target_compile_options(GENERIC_F401CCUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F401CCUX_usb_none INTERFACE) target_compile_options(GENERIC_F401CCUX_usb_none INTERFACE @@ -37308,7 +37448,7 @@ set(GENERIC_F401CCUX_hid_MCU cortex-m4) set(GENERIC_F401CCUX_hid_FPCONF "-") add_library(GENERIC_F401CCUX_hid INTERFACE) target_compile_options(GENERIC_F401CCUX_hid INTERFACE - "SHELL:-DSTM32F401xC -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F401xC -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -37350,7 +37490,7 @@ set(GENERIC_F401CCYX_MCU cortex-m4) set(GENERIC_F401CCYX_FPCONF "-") add_library(GENERIC_F401CCYX INTERFACE) target_compile_options(GENERIC_F401CCYX INTERFACE - "SHELL:-DSTM32F401xC " + "SHELL:-DSTM32F401xC" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -37395,15 +37535,15 @@ target_compile_options(GENERIC_F401CCYX_serial_none INTERFACE ) add_library(GENERIC_F401CCYX_usb_CDC INTERFACE) target_compile_options(GENERIC_F401CCYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F401CCYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F401CCYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F401CCYX_usb_HID INTERFACE) target_compile_options(GENERIC_F401CCYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F401CCYX_usb_none INTERFACE) target_compile_options(GENERIC_F401CCYX_usb_none INTERFACE @@ -37432,7 +37572,7 @@ set(GENERIC_F401CCYX_hid_MCU cortex-m4) set(GENERIC_F401CCYX_hid_FPCONF "-") add_library(GENERIC_F401CCYX_hid INTERFACE) target_compile_options(GENERIC_F401CCYX_hid INTERFACE - "SHELL:-DSTM32F401xC -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F401xC -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -37474,7 +37614,7 @@ set(GENERIC_F401CDUX_MCU cortex-m4) set(GENERIC_F401CDUX_FPCONF "-") add_library(GENERIC_F401CDUX INTERFACE) target_compile_options(GENERIC_F401CDUX INTERFACE - "SHELL:-DSTM32F401xE " + "SHELL:-DSTM32F401xE" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -37519,15 +37659,15 @@ target_compile_options(GENERIC_F401CDUX_serial_none INTERFACE ) add_library(GENERIC_F401CDUX_usb_CDC INTERFACE) target_compile_options(GENERIC_F401CDUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F401CDUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F401CDUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F401CDUX_usb_HID INTERFACE) target_compile_options(GENERIC_F401CDUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F401CDUX_usb_none INTERFACE) target_compile_options(GENERIC_F401CDUX_usb_none INTERFACE @@ -37556,7 +37696,7 @@ set(GENERIC_F401CDUX_hid_MCU cortex-m4) set(GENERIC_F401CDUX_hid_FPCONF "-") add_library(GENERIC_F401CDUX_hid INTERFACE) target_compile_options(GENERIC_F401CDUX_hid INTERFACE - "SHELL:-DSTM32F401xE -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F401xE -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -37598,7 +37738,7 @@ set(GENERIC_F401CDYX_MCU cortex-m4) set(GENERIC_F401CDYX_FPCONF "-") add_library(GENERIC_F401CDYX INTERFACE) target_compile_options(GENERIC_F401CDYX INTERFACE - "SHELL:-DSTM32F401xE " + "SHELL:-DSTM32F401xE" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -37643,15 +37783,15 @@ target_compile_options(GENERIC_F401CDYX_serial_none INTERFACE ) add_library(GENERIC_F401CDYX_usb_CDC INTERFACE) target_compile_options(GENERIC_F401CDYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F401CDYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F401CDYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F401CDYX_usb_HID INTERFACE) target_compile_options(GENERIC_F401CDYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F401CDYX_usb_none INTERFACE) target_compile_options(GENERIC_F401CDYX_usb_none INTERFACE @@ -37680,7 +37820,7 @@ set(GENERIC_F401CDYX_hid_MCU cortex-m4) set(GENERIC_F401CDYX_hid_FPCONF "-") add_library(GENERIC_F401CDYX_hid INTERFACE) target_compile_options(GENERIC_F401CDYX_hid INTERFACE - "SHELL:-DSTM32F401xE -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F401xE -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -37722,7 +37862,7 @@ set(GENERIC_F401CEUX_MCU cortex-m4) set(GENERIC_F401CEUX_FPCONF "-") add_library(GENERIC_F401CEUX INTERFACE) target_compile_options(GENERIC_F401CEUX INTERFACE - "SHELL:-DSTM32F401xE " + "SHELL:-DSTM32F401xE" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -37767,15 +37907,15 @@ target_compile_options(GENERIC_F401CEUX_serial_none INTERFACE ) add_library(GENERIC_F401CEUX_usb_CDC INTERFACE) target_compile_options(GENERIC_F401CEUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F401CEUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F401CEUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F401CEUX_usb_HID INTERFACE) target_compile_options(GENERIC_F401CEUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F401CEUX_usb_none INTERFACE) target_compile_options(GENERIC_F401CEUX_usb_none INTERFACE @@ -37804,7 +37944,7 @@ set(GENERIC_F401CEUX_hid_MCU cortex-m4) set(GENERIC_F401CEUX_hid_FPCONF "-") add_library(GENERIC_F401CEUX_hid INTERFACE) target_compile_options(GENERIC_F401CEUX_hid INTERFACE - "SHELL:-DSTM32F401xE -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F401xE -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -37846,7 +37986,7 @@ set(GENERIC_F401CEYX_MCU cortex-m4) set(GENERIC_F401CEYX_FPCONF "-") add_library(GENERIC_F401CEYX INTERFACE) target_compile_options(GENERIC_F401CEYX INTERFACE - "SHELL:-DSTM32F401xE " + "SHELL:-DSTM32F401xE" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -37891,15 +38031,15 @@ target_compile_options(GENERIC_F401CEYX_serial_none INTERFACE ) add_library(GENERIC_F401CEYX_usb_CDC INTERFACE) target_compile_options(GENERIC_F401CEYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F401CEYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F401CEYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F401CEYX_usb_HID INTERFACE) target_compile_options(GENERIC_F401CEYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F401CEYX_usb_none INTERFACE) target_compile_options(GENERIC_F401CEYX_usb_none INTERFACE @@ -37928,7 +38068,7 @@ set(GENERIC_F401CEYX_hid_MCU cortex-m4) set(GENERIC_F401CEYX_hid_FPCONF "-") add_library(GENERIC_F401CEYX_hid INTERFACE) target_compile_options(GENERIC_F401CEYX_hid INTERFACE - "SHELL:-DSTM32F401xE -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F401xE -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -37970,7 +38110,7 @@ set(GENERIC_F401RBTX_MCU cortex-m4) set(GENERIC_F401RBTX_FPCONF "-") add_library(GENERIC_F401RBTX INTERFACE) target_compile_options(GENERIC_F401RBTX INTERFACE - "SHELL:-DSTM32F401xC " + "SHELL:-DSTM32F401xC" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -38015,15 +38155,15 @@ target_compile_options(GENERIC_F401RBTX_serial_none INTERFACE ) add_library(GENERIC_F401RBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F401RBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F401RBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F401RBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F401RBTX_usb_HID INTERFACE) target_compile_options(GENERIC_F401RBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F401RBTX_usb_none INTERFACE) target_compile_options(GENERIC_F401RBTX_usb_none INTERFACE @@ -38052,7 +38192,7 @@ set(GENERIC_F401RBTX_hid_MCU cortex-m4) set(GENERIC_F401RBTX_hid_FPCONF "-") add_library(GENERIC_F401RBTX_hid INTERFACE) target_compile_options(GENERIC_F401RBTX_hid INTERFACE - "SHELL:-DSTM32F401xC -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F401xC -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -38094,7 +38234,7 @@ set(GENERIC_F401RCTX_MCU cortex-m4) set(GENERIC_F401RCTX_FPCONF "-") add_library(GENERIC_F401RCTX INTERFACE) target_compile_options(GENERIC_F401RCTX INTERFACE - "SHELL:-DSTM32F401xC " + "SHELL:-DSTM32F401xC" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -38139,15 +38279,15 @@ target_compile_options(GENERIC_F401RCTX_serial_none INTERFACE ) add_library(GENERIC_F401RCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F401RCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F401RCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F401RCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F401RCTX_usb_HID INTERFACE) target_compile_options(GENERIC_F401RCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F401RCTX_usb_none INTERFACE) target_compile_options(GENERIC_F401RCTX_usb_none INTERFACE @@ -38176,7 +38316,7 @@ set(GENERIC_F401RCTX_hid_MCU cortex-m4) set(GENERIC_F401RCTX_hid_FPCONF "-") add_library(GENERIC_F401RCTX_hid INTERFACE) target_compile_options(GENERIC_F401RCTX_hid INTERFACE - "SHELL:-DSTM32F401xC -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F401xC -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -38218,7 +38358,7 @@ set(GENERIC_F401RDTX_MCU cortex-m4) set(GENERIC_F401RDTX_FPCONF "-") add_library(GENERIC_F401RDTX INTERFACE) target_compile_options(GENERIC_F401RDTX INTERFACE - "SHELL:-DSTM32F401xE " + "SHELL:-DSTM32F401xE" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -38263,15 +38403,15 @@ target_compile_options(GENERIC_F401RDTX_serial_none INTERFACE ) add_library(GENERIC_F401RDTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F401RDTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F401RDTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F401RDTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F401RDTX_usb_HID INTERFACE) target_compile_options(GENERIC_F401RDTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F401RDTX_usb_none INTERFACE) target_compile_options(GENERIC_F401RDTX_usb_none INTERFACE @@ -38300,7 +38440,7 @@ set(GENERIC_F401RDTX_hid_MCU cortex-m4) set(GENERIC_F401RDTX_hid_FPCONF "-") add_library(GENERIC_F401RDTX_hid INTERFACE) target_compile_options(GENERIC_F401RDTX_hid INTERFACE - "SHELL:-DSTM32F401xE -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F401xE -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -38342,7 +38482,7 @@ set(GENERIC_F401RETX_MCU cortex-m4) set(GENERIC_F401RETX_FPCONF "-") add_library(GENERIC_F401RETX INTERFACE) target_compile_options(GENERIC_F401RETX INTERFACE - "SHELL:-DSTM32F401xE " + "SHELL:-DSTM32F401xE" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -38387,15 +38527,15 @@ target_compile_options(GENERIC_F401RETX_serial_none INTERFACE ) add_library(GENERIC_F401RETX_usb_CDC INTERFACE) target_compile_options(GENERIC_F401RETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F401RETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F401RETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F401RETX_usb_HID INTERFACE) target_compile_options(GENERIC_F401RETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F401RETX_usb_none INTERFACE) target_compile_options(GENERIC_F401RETX_usb_none INTERFACE @@ -38424,7 +38564,7 @@ set(GENERIC_F401RETX_hid_MCU cortex-m4) set(GENERIC_F401RETX_hid_FPCONF "-") add_library(GENERIC_F401RETX_hid INTERFACE) target_compile_options(GENERIC_F401RETX_hid INTERFACE - "SHELL:-DSTM32F401xE -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F401xE -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -38466,7 +38606,7 @@ set(GENERIC_F401VBTX_MCU cortex-m4) set(GENERIC_F401VBTX_FPCONF "-") add_library(GENERIC_F401VBTX INTERFACE) target_compile_options(GENERIC_F401VBTX INTERFACE - "SHELL:-DSTM32F401xC " + "SHELL:-DSTM32F401xC" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -38511,15 +38651,15 @@ target_compile_options(GENERIC_F401VBTX_serial_none INTERFACE ) add_library(GENERIC_F401VBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F401VBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F401VBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F401VBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F401VBTX_usb_HID INTERFACE) target_compile_options(GENERIC_F401VBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F401VBTX_usb_none INTERFACE) target_compile_options(GENERIC_F401VBTX_usb_none INTERFACE @@ -38548,7 +38688,7 @@ set(GENERIC_F401VBTX_hid_MCU cortex-m4) set(GENERIC_F401VBTX_hid_FPCONF "-") add_library(GENERIC_F401VBTX_hid INTERFACE) target_compile_options(GENERIC_F401VBTX_hid INTERFACE - "SHELL:-DSTM32F401xC -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F401xC -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -38590,7 +38730,7 @@ set(GENERIC_F401VCTX_MCU cortex-m4) set(GENERIC_F401VCTX_FPCONF "-") add_library(GENERIC_F401VCTX INTERFACE) target_compile_options(GENERIC_F401VCTX INTERFACE - "SHELL:-DSTM32F401xC " + "SHELL:-DSTM32F401xC" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -38635,15 +38775,15 @@ target_compile_options(GENERIC_F401VCTX_serial_none INTERFACE ) add_library(GENERIC_F401VCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F401VCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F401VCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F401VCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F401VCTX_usb_HID INTERFACE) target_compile_options(GENERIC_F401VCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F401VCTX_usb_none INTERFACE) target_compile_options(GENERIC_F401VCTX_usb_none INTERFACE @@ -38672,7 +38812,7 @@ set(GENERIC_F401VCTX_hid_MCU cortex-m4) set(GENERIC_F401VCTX_hid_FPCONF "-") add_library(GENERIC_F401VCTX_hid INTERFACE) target_compile_options(GENERIC_F401VCTX_hid INTERFACE - "SHELL:-DSTM32F401xC -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F401xC -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -38714,7 +38854,7 @@ set(GENERIC_F401VDTX_MCU cortex-m4) set(GENERIC_F401VDTX_FPCONF "-") add_library(GENERIC_F401VDTX INTERFACE) target_compile_options(GENERIC_F401VDTX INTERFACE - "SHELL:-DSTM32F401xE " + "SHELL:-DSTM32F401xE" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -38759,15 +38899,15 @@ target_compile_options(GENERIC_F401VDTX_serial_none INTERFACE ) add_library(GENERIC_F401VDTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F401VDTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F401VDTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F401VDTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F401VDTX_usb_HID INTERFACE) target_compile_options(GENERIC_F401VDTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F401VDTX_usb_none INTERFACE) target_compile_options(GENERIC_F401VDTX_usb_none INTERFACE @@ -38796,7 +38936,7 @@ set(GENERIC_F401VDTX_hid_MCU cortex-m4) set(GENERIC_F401VDTX_hid_FPCONF "-") add_library(GENERIC_F401VDTX_hid INTERFACE) target_compile_options(GENERIC_F401VDTX_hid INTERFACE - "SHELL:-DSTM32F401xE -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F401xE -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -38838,7 +38978,7 @@ set(GENERIC_F401VETX_MCU cortex-m4) set(GENERIC_F401VETX_FPCONF "-") add_library(GENERIC_F401VETX INTERFACE) target_compile_options(GENERIC_F401VETX INTERFACE - "SHELL:-DSTM32F401xE " + "SHELL:-DSTM32F401xE" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -38883,15 +39023,15 @@ target_compile_options(GENERIC_F401VETX_serial_none INTERFACE ) add_library(GENERIC_F401VETX_usb_CDC INTERFACE) target_compile_options(GENERIC_F401VETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F401VETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F401VETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F401VETX_usb_HID INTERFACE) target_compile_options(GENERIC_F401VETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F401VETX_usb_none INTERFACE) target_compile_options(GENERIC_F401VETX_usb_none INTERFACE @@ -38920,7 +39060,7 @@ set(GENERIC_F401VETX_hid_MCU cortex-m4) set(GENERIC_F401VETX_hid_FPCONF "-") add_library(GENERIC_F401VETX_hid INTERFACE) target_compile_options(GENERIC_F401VETX_hid INTERFACE - "SHELL:-DSTM32F401xE -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F401xE -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -38962,7 +39102,7 @@ set(GENERIC_F405RGTX_MCU cortex-m4) set(GENERIC_F405RGTX_FPCONF "-") add_library(GENERIC_F405RGTX INTERFACE) target_compile_options(GENERIC_F405RGTX INTERFACE - "SHELL:-DSTM32F405xx " + "SHELL:-DSTM32F405xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -39007,15 +39147,15 @@ target_compile_options(GENERIC_F405RGTX_serial_none INTERFACE ) add_library(GENERIC_F405RGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F405RGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F405RGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F405RGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F405RGTX_usb_HID INTERFACE) target_compile_options(GENERIC_F405RGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F405RGTX_usb_none INTERFACE) target_compile_options(GENERIC_F405RGTX_usb_none INTERFACE @@ -39044,7 +39184,7 @@ set(GENERIC_F405RGTX_hid_MCU cortex-m4) set(GENERIC_F405RGTX_hid_FPCONF "-") add_library(GENERIC_F405RGTX_hid INTERFACE) target_compile_options(GENERIC_F405RGTX_hid INTERFACE - "SHELL:-DSTM32F405xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F405xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -39086,7 +39226,7 @@ set(GENERIC_F407IEHX_MCU cortex-m4) set(GENERIC_F407IEHX_FPCONF "-") add_library(GENERIC_F407IEHX INTERFACE) target_compile_options(GENERIC_F407IEHX INTERFACE - "SHELL:-DSTM32F407xx " + "SHELL:-DSTM32F407xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -39131,15 +39271,15 @@ target_compile_options(GENERIC_F407IEHX_serial_none INTERFACE ) add_library(GENERIC_F407IEHX_usb_CDC INTERFACE) target_compile_options(GENERIC_F407IEHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F407IEHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F407IEHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F407IEHX_usb_HID INTERFACE) target_compile_options(GENERIC_F407IEHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F407IEHX_usb_none INTERFACE) target_compile_options(GENERIC_F407IEHX_usb_none INTERFACE @@ -39168,7 +39308,7 @@ set(GENERIC_F407IEHX_hid_MCU cortex-m4) set(GENERIC_F407IEHX_hid_FPCONF "-") add_library(GENERIC_F407IEHX_hid INTERFACE) target_compile_options(GENERIC_F407IEHX_hid INTERFACE - "SHELL:-DSTM32F407xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F407xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -39210,7 +39350,7 @@ set(GENERIC_F407IETX_MCU cortex-m4) set(GENERIC_F407IETX_FPCONF "-") add_library(GENERIC_F407IETX INTERFACE) target_compile_options(GENERIC_F407IETX INTERFACE - "SHELL:-DSTM32F407xx " + "SHELL:-DSTM32F407xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -39255,15 +39395,15 @@ target_compile_options(GENERIC_F407IETX_serial_none INTERFACE ) add_library(GENERIC_F407IETX_usb_CDC INTERFACE) target_compile_options(GENERIC_F407IETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F407IETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F407IETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F407IETX_usb_HID INTERFACE) target_compile_options(GENERIC_F407IETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F407IETX_usb_none INTERFACE) target_compile_options(GENERIC_F407IETX_usb_none INTERFACE @@ -39292,7 +39432,7 @@ set(GENERIC_F407IETX_hid_MCU cortex-m4) set(GENERIC_F407IETX_hid_FPCONF "-") add_library(GENERIC_F407IETX_hid INTERFACE) target_compile_options(GENERIC_F407IETX_hid INTERFACE - "SHELL:-DSTM32F407xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F407xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -39334,7 +39474,7 @@ set(GENERIC_F407IGHX_MCU cortex-m4) set(GENERIC_F407IGHX_FPCONF "-") add_library(GENERIC_F407IGHX INTERFACE) target_compile_options(GENERIC_F407IGHX INTERFACE - "SHELL:-DSTM32F407xx " + "SHELL:-DSTM32F407xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -39379,15 +39519,15 @@ target_compile_options(GENERIC_F407IGHX_serial_none INTERFACE ) add_library(GENERIC_F407IGHX_usb_CDC INTERFACE) target_compile_options(GENERIC_F407IGHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F407IGHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F407IGHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F407IGHX_usb_HID INTERFACE) target_compile_options(GENERIC_F407IGHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F407IGHX_usb_none INTERFACE) target_compile_options(GENERIC_F407IGHX_usb_none INTERFACE @@ -39416,7 +39556,7 @@ set(GENERIC_F407IGHX_hid_MCU cortex-m4) set(GENERIC_F407IGHX_hid_FPCONF "-") add_library(GENERIC_F407IGHX_hid INTERFACE) target_compile_options(GENERIC_F407IGHX_hid INTERFACE - "SHELL:-DSTM32F407xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F407xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -39458,7 +39598,7 @@ set(GENERIC_F407IGTX_MCU cortex-m4) set(GENERIC_F407IGTX_FPCONF "-") add_library(GENERIC_F407IGTX INTERFACE) target_compile_options(GENERIC_F407IGTX INTERFACE - "SHELL:-DSTM32F407xx " + "SHELL:-DSTM32F407xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -39503,15 +39643,15 @@ target_compile_options(GENERIC_F407IGTX_serial_none INTERFACE ) add_library(GENERIC_F407IGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F407IGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F407IGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F407IGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F407IGTX_usb_HID INTERFACE) target_compile_options(GENERIC_F407IGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F407IGTX_usb_none INTERFACE) target_compile_options(GENERIC_F407IGTX_usb_none INTERFACE @@ -39540,7 +39680,7 @@ set(GENERIC_F407IGTX_hid_MCU cortex-m4) set(GENERIC_F407IGTX_hid_FPCONF "-") add_library(GENERIC_F407IGTX_hid INTERFACE) target_compile_options(GENERIC_F407IGTX_hid INTERFACE - "SHELL:-DSTM32F407xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F407xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -39582,7 +39722,7 @@ set(GENERIC_F407VETX_MCU cortex-m4) set(GENERIC_F407VETX_FPCONF "-") add_library(GENERIC_F407VETX INTERFACE) target_compile_options(GENERIC_F407VETX INTERFACE - "SHELL:-DSTM32F407xx " + "SHELL:-DSTM32F407xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -39627,15 +39767,15 @@ target_compile_options(GENERIC_F407VETX_serial_none INTERFACE ) add_library(GENERIC_F407VETX_usb_CDC INTERFACE) target_compile_options(GENERIC_F407VETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F407VETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F407VETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F407VETX_usb_HID INTERFACE) target_compile_options(GENERIC_F407VETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F407VETX_usb_none INTERFACE) target_compile_options(GENERIC_F407VETX_usb_none INTERFACE @@ -39664,7 +39804,7 @@ set(GENERIC_F407VETX_hid_MCU cortex-m4) set(GENERIC_F407VETX_hid_FPCONF "-") add_library(GENERIC_F407VETX_hid INTERFACE) target_compile_options(GENERIC_F407VETX_hid INTERFACE - "SHELL:-DSTM32F407xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F407xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -39706,7 +39846,7 @@ set(GENERIC_F407VGTX_MCU cortex-m4) set(GENERIC_F407VGTX_FPCONF "-") add_library(GENERIC_F407VGTX INTERFACE) target_compile_options(GENERIC_F407VGTX INTERFACE - "SHELL:-DSTM32F407xx " + "SHELL:-DSTM32F407xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -39751,15 +39891,15 @@ target_compile_options(GENERIC_F407VGTX_serial_none INTERFACE ) add_library(GENERIC_F407VGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F407VGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F407VGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F407VGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F407VGTX_usb_HID INTERFACE) target_compile_options(GENERIC_F407VGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F407VGTX_usb_none INTERFACE) target_compile_options(GENERIC_F407VGTX_usb_none INTERFACE @@ -39788,7 +39928,7 @@ set(GENERIC_F407VGTX_hid_MCU cortex-m4) set(GENERIC_F407VGTX_hid_FPCONF "-") add_library(GENERIC_F407VGTX_hid INTERFACE) target_compile_options(GENERIC_F407VGTX_hid INTERFACE - "SHELL:-DSTM32F407xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F407xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -39830,7 +39970,7 @@ set(GENERIC_F407ZETX_MCU cortex-m4) set(GENERIC_F407ZETX_FPCONF "-") add_library(GENERIC_F407ZETX INTERFACE) target_compile_options(GENERIC_F407ZETX INTERFACE - "SHELL:-DSTM32F407xx " + "SHELL:-DSTM32F407xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -39875,15 +40015,15 @@ target_compile_options(GENERIC_F407ZETX_serial_none INTERFACE ) add_library(GENERIC_F407ZETX_usb_CDC INTERFACE) target_compile_options(GENERIC_F407ZETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F407ZETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F407ZETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F407ZETX_usb_HID INTERFACE) target_compile_options(GENERIC_F407ZETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F407ZETX_usb_none INTERFACE) target_compile_options(GENERIC_F407ZETX_usb_none INTERFACE @@ -39912,7 +40052,7 @@ set(GENERIC_F407ZETX_hid_MCU cortex-m4) set(GENERIC_F407ZETX_hid_FPCONF "-") add_library(GENERIC_F407ZETX_hid INTERFACE) target_compile_options(GENERIC_F407ZETX_hid INTERFACE - "SHELL:-DSTM32F407xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F407xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -39954,7 +40094,7 @@ set(GENERIC_F407ZGTX_MCU cortex-m4) set(GENERIC_F407ZGTX_FPCONF "-") add_library(GENERIC_F407ZGTX INTERFACE) target_compile_options(GENERIC_F407ZGTX INTERFACE - "SHELL:-DSTM32F407xx " + "SHELL:-DSTM32F407xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -39999,15 +40139,15 @@ target_compile_options(GENERIC_F407ZGTX_serial_none INTERFACE ) add_library(GENERIC_F407ZGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F407ZGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F407ZGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F407ZGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F407ZGTX_usb_HID INTERFACE) target_compile_options(GENERIC_F407ZGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F407ZGTX_usb_none INTERFACE) target_compile_options(GENERIC_F407ZGTX_usb_none INTERFACE @@ -40036,7 +40176,7 @@ set(GENERIC_F407ZGTX_hid_MCU cortex-m4) set(GENERIC_F407ZGTX_hid_FPCONF "-") add_library(GENERIC_F407ZGTX_hid INTERFACE) target_compile_options(GENERIC_F407ZGTX_hid INTERFACE - "SHELL:-DSTM32F407xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F407xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -40078,7 +40218,7 @@ set(GENERIC_F410C8TX_MCU cortex-m4) set(GENERIC_F410C8TX_FPCONF "-") add_library(GENERIC_F410C8TX INTERFACE) target_compile_options(GENERIC_F410C8TX INTERFACE - "SHELL:-DSTM32F410Cx " + "SHELL:-DSTM32F410Cx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -40123,15 +40263,15 @@ target_compile_options(GENERIC_F410C8TX_serial_none INTERFACE ) add_library(GENERIC_F410C8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F410C8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F410C8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F410C8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F410C8TX_usb_HID INTERFACE) target_compile_options(GENERIC_F410C8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F410C8TX_usb_none INTERFACE) target_compile_options(GENERIC_F410C8TX_usb_none INTERFACE @@ -40160,7 +40300,7 @@ set(GENERIC_F410C8TX_hid_MCU cortex-m4) set(GENERIC_F410C8TX_hid_FPCONF "-") add_library(GENERIC_F410C8TX_hid INTERFACE) target_compile_options(GENERIC_F410C8TX_hid INTERFACE - "SHELL:-DSTM32F410Cx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F410Cx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -40202,7 +40342,7 @@ set(GENERIC_F410C8UX_MCU cortex-m4) set(GENERIC_F410C8UX_FPCONF "-") add_library(GENERIC_F410C8UX INTERFACE) target_compile_options(GENERIC_F410C8UX INTERFACE - "SHELL:-DSTM32F410Cx " + "SHELL:-DSTM32F410Cx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -40247,15 +40387,15 @@ target_compile_options(GENERIC_F410C8UX_serial_none INTERFACE ) add_library(GENERIC_F410C8UX_usb_CDC INTERFACE) target_compile_options(GENERIC_F410C8UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F410C8UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F410C8UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F410C8UX_usb_HID INTERFACE) target_compile_options(GENERIC_F410C8UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F410C8UX_usb_none INTERFACE) target_compile_options(GENERIC_F410C8UX_usb_none INTERFACE @@ -40284,7 +40424,7 @@ set(GENERIC_F410C8UX_hid_MCU cortex-m4) set(GENERIC_F410C8UX_hid_FPCONF "-") add_library(GENERIC_F410C8UX_hid INTERFACE) target_compile_options(GENERIC_F410C8UX_hid INTERFACE - "SHELL:-DSTM32F410Cx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F410Cx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -40326,7 +40466,7 @@ set(GENERIC_F410CBTX_MCU cortex-m4) set(GENERIC_F410CBTX_FPCONF "-") add_library(GENERIC_F410CBTX INTERFACE) target_compile_options(GENERIC_F410CBTX INTERFACE - "SHELL:-DSTM32F410Cx " + "SHELL:-DSTM32F410Cx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -40371,15 +40511,15 @@ target_compile_options(GENERIC_F410CBTX_serial_none INTERFACE ) add_library(GENERIC_F410CBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F410CBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F410CBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F410CBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F410CBTX_usb_HID INTERFACE) target_compile_options(GENERIC_F410CBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F410CBTX_usb_none INTERFACE) target_compile_options(GENERIC_F410CBTX_usb_none INTERFACE @@ -40408,7 +40548,7 @@ set(GENERIC_F410CBTX_hid_MCU cortex-m4) set(GENERIC_F410CBTX_hid_FPCONF "-") add_library(GENERIC_F410CBTX_hid INTERFACE) target_compile_options(GENERIC_F410CBTX_hid INTERFACE - "SHELL:-DSTM32F410Cx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F410Cx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -40450,7 +40590,7 @@ set(GENERIC_F410CBUX_MCU cortex-m4) set(GENERIC_F410CBUX_FPCONF "-") add_library(GENERIC_F410CBUX INTERFACE) target_compile_options(GENERIC_F410CBUX INTERFACE - "SHELL:-DSTM32F410Cx " + "SHELL:-DSTM32F410Cx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -40495,15 +40635,15 @@ target_compile_options(GENERIC_F410CBUX_serial_none INTERFACE ) add_library(GENERIC_F410CBUX_usb_CDC INTERFACE) target_compile_options(GENERIC_F410CBUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F410CBUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F410CBUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F410CBUX_usb_HID INTERFACE) target_compile_options(GENERIC_F410CBUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F410CBUX_usb_none INTERFACE) target_compile_options(GENERIC_F410CBUX_usb_none INTERFACE @@ -40532,7 +40672,7 @@ set(GENERIC_F410CBUX_hid_MCU cortex-m4) set(GENERIC_F410CBUX_hid_FPCONF "-") add_library(GENERIC_F410CBUX_hid INTERFACE) target_compile_options(GENERIC_F410CBUX_hid INTERFACE - "SHELL:-DSTM32F410Cx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F410Cx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -40574,7 +40714,7 @@ set(GENERIC_F410R8IX_MCU cortex-m4) set(GENERIC_F410R8IX_FPCONF "-") add_library(GENERIC_F410R8IX INTERFACE) target_compile_options(GENERIC_F410R8IX INTERFACE - "SHELL:-DSTM32F410Rx " + "SHELL:-DSTM32F410Rx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -40619,15 +40759,15 @@ target_compile_options(GENERIC_F410R8IX_serial_none INTERFACE ) add_library(GENERIC_F410R8IX_usb_CDC INTERFACE) target_compile_options(GENERIC_F410R8IX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F410R8IX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F410R8IX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F410R8IX_usb_HID INTERFACE) target_compile_options(GENERIC_F410R8IX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F410R8IX_usb_none INTERFACE) target_compile_options(GENERIC_F410R8IX_usb_none INTERFACE @@ -40656,7 +40796,7 @@ set(GENERIC_F410R8IX_hid_MCU cortex-m4) set(GENERIC_F410R8IX_hid_FPCONF "-") add_library(GENERIC_F410R8IX_hid INTERFACE) target_compile_options(GENERIC_F410R8IX_hid INTERFACE - "SHELL:-DSTM32F410Rx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F410Rx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -40698,7 +40838,7 @@ set(GENERIC_F410R8TX_MCU cortex-m4) set(GENERIC_F410R8TX_FPCONF "-") add_library(GENERIC_F410R8TX INTERFACE) target_compile_options(GENERIC_F410R8TX INTERFACE - "SHELL:-DSTM32F410Rx " + "SHELL:-DSTM32F410Rx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -40743,15 +40883,15 @@ target_compile_options(GENERIC_F410R8TX_serial_none INTERFACE ) add_library(GENERIC_F410R8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F410R8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F410R8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F410R8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F410R8TX_usb_HID INTERFACE) target_compile_options(GENERIC_F410R8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F410R8TX_usb_none INTERFACE) target_compile_options(GENERIC_F410R8TX_usb_none INTERFACE @@ -40780,7 +40920,7 @@ set(GENERIC_F410R8TX_hid_MCU cortex-m4) set(GENERIC_F410R8TX_hid_FPCONF "-") add_library(GENERIC_F410R8TX_hid INTERFACE) target_compile_options(GENERIC_F410R8TX_hid INTERFACE - "SHELL:-DSTM32F410Rx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F410Rx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -40822,7 +40962,7 @@ set(GENERIC_F410RBIX_MCU cortex-m4) set(GENERIC_F410RBIX_FPCONF "-") add_library(GENERIC_F410RBIX INTERFACE) target_compile_options(GENERIC_F410RBIX INTERFACE - "SHELL:-DSTM32F410Rx " + "SHELL:-DSTM32F410Rx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -40867,15 +41007,15 @@ target_compile_options(GENERIC_F410RBIX_serial_none INTERFACE ) add_library(GENERIC_F410RBIX_usb_CDC INTERFACE) target_compile_options(GENERIC_F410RBIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F410RBIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F410RBIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F410RBIX_usb_HID INTERFACE) target_compile_options(GENERIC_F410RBIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F410RBIX_usb_none INTERFACE) target_compile_options(GENERIC_F410RBIX_usb_none INTERFACE @@ -40904,7 +41044,7 @@ set(GENERIC_F410RBIX_hid_MCU cortex-m4) set(GENERIC_F410RBIX_hid_FPCONF "-") add_library(GENERIC_F410RBIX_hid INTERFACE) target_compile_options(GENERIC_F410RBIX_hid INTERFACE - "SHELL:-DSTM32F410Rx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F410Rx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -40946,7 +41086,7 @@ set(GENERIC_F410RBTX_MCU cortex-m4) set(GENERIC_F410RBTX_FPCONF "-") add_library(GENERIC_F410RBTX INTERFACE) target_compile_options(GENERIC_F410RBTX INTERFACE - "SHELL:-DSTM32F410Rx " + "SHELL:-DSTM32F410Rx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -40991,15 +41131,15 @@ target_compile_options(GENERIC_F410RBTX_serial_none INTERFACE ) add_library(GENERIC_F410RBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F410RBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F410RBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F410RBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F410RBTX_usb_HID INTERFACE) target_compile_options(GENERIC_F410RBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F410RBTX_usb_none INTERFACE) target_compile_options(GENERIC_F410RBTX_usb_none INTERFACE @@ -41028,7 +41168,7 @@ set(GENERIC_F410RBTX_hid_MCU cortex-m4) set(GENERIC_F410RBTX_hid_FPCONF "-") add_library(GENERIC_F410RBTX_hid INTERFACE) target_compile_options(GENERIC_F410RBTX_hid INTERFACE - "SHELL:-DSTM32F410Rx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F410Rx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -41070,7 +41210,7 @@ set(GENERIC_F410T8YX_MCU cortex-m4) set(GENERIC_F410T8YX_FPCONF "-") add_library(GENERIC_F410T8YX INTERFACE) target_compile_options(GENERIC_F410T8YX INTERFACE - "SHELL:-DSTM32F410Tx " + "SHELL:-DSTM32F410Tx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -41115,15 +41255,15 @@ target_compile_options(GENERIC_F410T8YX_serial_none INTERFACE ) add_library(GENERIC_F410T8YX_usb_CDC INTERFACE) target_compile_options(GENERIC_F410T8YX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F410T8YX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F410T8YX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F410T8YX_usb_HID INTERFACE) target_compile_options(GENERIC_F410T8YX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F410T8YX_usb_none INTERFACE) target_compile_options(GENERIC_F410T8YX_usb_none INTERFACE @@ -41152,7 +41292,7 @@ set(GENERIC_F410T8YX_hid_MCU cortex-m4) set(GENERIC_F410T8YX_hid_FPCONF "-") add_library(GENERIC_F410T8YX_hid INTERFACE) target_compile_options(GENERIC_F410T8YX_hid INTERFACE - "SHELL:-DSTM32F410Tx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F410Tx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -41194,7 +41334,7 @@ set(GENERIC_F410TBYX_MCU cortex-m4) set(GENERIC_F410TBYX_FPCONF "-") add_library(GENERIC_F410TBYX INTERFACE) target_compile_options(GENERIC_F410TBYX INTERFACE - "SHELL:-DSTM32F410Tx " + "SHELL:-DSTM32F410Tx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -41239,15 +41379,15 @@ target_compile_options(GENERIC_F410TBYX_serial_none INTERFACE ) add_library(GENERIC_F410TBYX_usb_CDC INTERFACE) target_compile_options(GENERIC_F410TBYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F410TBYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F410TBYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F410TBYX_usb_HID INTERFACE) target_compile_options(GENERIC_F410TBYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F410TBYX_usb_none INTERFACE) target_compile_options(GENERIC_F410TBYX_usb_none INTERFACE @@ -41276,7 +41416,7 @@ set(GENERIC_F410TBYX_hid_MCU cortex-m4) set(GENERIC_F410TBYX_hid_FPCONF "-") add_library(GENERIC_F410TBYX_hid INTERFACE) target_compile_options(GENERIC_F410TBYX_hid INTERFACE - "SHELL:-DSTM32F410Tx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F410Tx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -41318,7 +41458,7 @@ set(GENERIC_F411CCUX_MCU cortex-m4) set(GENERIC_F411CCUX_FPCONF "-") add_library(GENERIC_F411CCUX INTERFACE) target_compile_options(GENERIC_F411CCUX INTERFACE - "SHELL:-DSTM32F411xE " + "SHELL:-DSTM32F411xE" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -41363,15 +41503,15 @@ target_compile_options(GENERIC_F411CCUX_serial_none INTERFACE ) add_library(GENERIC_F411CCUX_usb_CDC INTERFACE) target_compile_options(GENERIC_F411CCUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F411CCUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F411CCUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F411CCUX_usb_HID INTERFACE) target_compile_options(GENERIC_F411CCUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F411CCUX_usb_none INTERFACE) target_compile_options(GENERIC_F411CCUX_usb_none INTERFACE @@ -41400,7 +41540,7 @@ set(GENERIC_F411CCUX_hid_MCU cortex-m4) set(GENERIC_F411CCUX_hid_FPCONF "-") add_library(GENERIC_F411CCUX_hid INTERFACE) target_compile_options(GENERIC_F411CCUX_hid INTERFACE - "SHELL:-DSTM32F411xE -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F411xE -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -41442,7 +41582,7 @@ set(GENERIC_F411CCYX_MCU cortex-m4) set(GENERIC_F411CCYX_FPCONF "-") add_library(GENERIC_F411CCYX INTERFACE) target_compile_options(GENERIC_F411CCYX INTERFACE - "SHELL:-DSTM32F411xE " + "SHELL:-DSTM32F411xE" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -41487,15 +41627,15 @@ target_compile_options(GENERIC_F411CCYX_serial_none INTERFACE ) add_library(GENERIC_F411CCYX_usb_CDC INTERFACE) target_compile_options(GENERIC_F411CCYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F411CCYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F411CCYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F411CCYX_usb_HID INTERFACE) target_compile_options(GENERIC_F411CCYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F411CCYX_usb_none INTERFACE) target_compile_options(GENERIC_F411CCYX_usb_none INTERFACE @@ -41524,7 +41664,7 @@ set(GENERIC_F411CCYX_hid_MCU cortex-m4) set(GENERIC_F411CCYX_hid_FPCONF "-") add_library(GENERIC_F411CCYX_hid INTERFACE) target_compile_options(GENERIC_F411CCYX_hid INTERFACE - "SHELL:-DSTM32F411xE -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F411xE -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -41566,7 +41706,7 @@ set(GENERIC_F411CEUX_MCU cortex-m4) set(GENERIC_F411CEUX_FPCONF "-") add_library(GENERIC_F411CEUX INTERFACE) target_compile_options(GENERIC_F411CEUX INTERFACE - "SHELL:-DSTM32F411xE " + "SHELL:-DSTM32F411xE" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -41611,15 +41751,15 @@ target_compile_options(GENERIC_F411CEUX_serial_none INTERFACE ) add_library(GENERIC_F411CEUX_usb_CDC INTERFACE) target_compile_options(GENERIC_F411CEUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F411CEUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F411CEUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F411CEUX_usb_HID INTERFACE) target_compile_options(GENERIC_F411CEUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F411CEUX_usb_none INTERFACE) target_compile_options(GENERIC_F411CEUX_usb_none INTERFACE @@ -41648,7 +41788,7 @@ set(GENERIC_F411CEUX_hid_MCU cortex-m4) set(GENERIC_F411CEUX_hid_FPCONF "-") add_library(GENERIC_F411CEUX_hid INTERFACE) target_compile_options(GENERIC_F411CEUX_hid INTERFACE - "SHELL:-DSTM32F411xE -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F411xE -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -41690,7 +41830,7 @@ set(GENERIC_F411CEYX_MCU cortex-m4) set(GENERIC_F411CEYX_FPCONF "-") add_library(GENERIC_F411CEYX INTERFACE) target_compile_options(GENERIC_F411CEYX INTERFACE - "SHELL:-DSTM32F411xE " + "SHELL:-DSTM32F411xE" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -41735,15 +41875,15 @@ target_compile_options(GENERIC_F411CEYX_serial_none INTERFACE ) add_library(GENERIC_F411CEYX_usb_CDC INTERFACE) target_compile_options(GENERIC_F411CEYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F411CEYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F411CEYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F411CEYX_usb_HID INTERFACE) target_compile_options(GENERIC_F411CEYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F411CEYX_usb_none INTERFACE) target_compile_options(GENERIC_F411CEYX_usb_none INTERFACE @@ -41772,7 +41912,7 @@ set(GENERIC_F411CEYX_hid_MCU cortex-m4) set(GENERIC_F411CEYX_hid_FPCONF "-") add_library(GENERIC_F411CEYX_hid INTERFACE) target_compile_options(GENERIC_F411CEYX_hid INTERFACE - "SHELL:-DSTM32F411xE -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F411xE -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -41814,7 +41954,7 @@ set(GENERIC_F411RCTX_MCU cortex-m4) set(GENERIC_F411RCTX_FPCONF "-") add_library(GENERIC_F411RCTX INTERFACE) target_compile_options(GENERIC_F411RCTX INTERFACE - "SHELL:-DSTM32F411xE " + "SHELL:-DSTM32F411xE" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -41859,15 +41999,15 @@ target_compile_options(GENERIC_F411RCTX_serial_none INTERFACE ) add_library(GENERIC_F411RCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F411RCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F411RCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F411RCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F411RCTX_usb_HID INTERFACE) target_compile_options(GENERIC_F411RCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F411RCTX_usb_none INTERFACE) target_compile_options(GENERIC_F411RCTX_usb_none INTERFACE @@ -41896,7 +42036,7 @@ set(GENERIC_F411RCTX_hid_MCU cortex-m4) set(GENERIC_F411RCTX_hid_FPCONF "-") add_library(GENERIC_F411RCTX_hid INTERFACE) target_compile_options(GENERIC_F411RCTX_hid INTERFACE - "SHELL:-DSTM32F411xE -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F411xE -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -41938,7 +42078,7 @@ set(GENERIC_F411RETX_MCU cortex-m4) set(GENERIC_F411RETX_FPCONF "-") add_library(GENERIC_F411RETX INTERFACE) target_compile_options(GENERIC_F411RETX INTERFACE - "SHELL:-DSTM32F411xE " + "SHELL:-DSTM32F411xE" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -41983,15 +42123,15 @@ target_compile_options(GENERIC_F411RETX_serial_none INTERFACE ) add_library(GENERIC_F411RETX_usb_CDC INTERFACE) target_compile_options(GENERIC_F411RETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F411RETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F411RETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F411RETX_usb_HID INTERFACE) target_compile_options(GENERIC_F411RETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F411RETX_usb_none INTERFACE) target_compile_options(GENERIC_F411RETX_usb_none INTERFACE @@ -42020,7 +42160,7 @@ set(GENERIC_F411RETX_hid_MCU cortex-m4) set(GENERIC_F411RETX_hid_FPCONF "-") add_library(GENERIC_F411RETX_hid INTERFACE) target_compile_options(GENERIC_F411RETX_hid INTERFACE - "SHELL:-DSTM32F411xE -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F411xE -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -42062,7 +42202,7 @@ set(GENERIC_F412CEUX_MCU cortex-m4) set(GENERIC_F412CEUX_FPCONF "-") add_library(GENERIC_F412CEUX INTERFACE) target_compile_options(GENERIC_F412CEUX INTERFACE - "SHELL:-DSTM32F412Cx " + "SHELL:-DSTM32F412Cx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -42107,15 +42247,15 @@ target_compile_options(GENERIC_F412CEUX_serial_none INTERFACE ) add_library(GENERIC_F412CEUX_usb_CDC INTERFACE) target_compile_options(GENERIC_F412CEUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F412CEUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F412CEUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F412CEUX_usb_HID INTERFACE) target_compile_options(GENERIC_F412CEUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F412CEUX_usb_none INTERFACE) target_compile_options(GENERIC_F412CEUX_usb_none INTERFACE @@ -42144,7 +42284,7 @@ set(GENERIC_F412CEUX_hid_MCU cortex-m4) set(GENERIC_F412CEUX_hid_FPCONF "-") add_library(GENERIC_F412CEUX_hid INTERFACE) target_compile_options(GENERIC_F412CEUX_hid INTERFACE - "SHELL:-DSTM32F412Cx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F412Cx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -42186,7 +42326,7 @@ set(GENERIC_F412CGUX_MCU cortex-m4) set(GENERIC_F412CGUX_FPCONF "-") add_library(GENERIC_F412CGUX INTERFACE) target_compile_options(GENERIC_F412CGUX INTERFACE - "SHELL:-DSTM32F412Cx " + "SHELL:-DSTM32F412Cx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -42231,15 +42371,15 @@ target_compile_options(GENERIC_F412CGUX_serial_none INTERFACE ) add_library(GENERIC_F412CGUX_usb_CDC INTERFACE) target_compile_options(GENERIC_F412CGUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F412CGUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F412CGUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F412CGUX_usb_HID INTERFACE) target_compile_options(GENERIC_F412CGUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F412CGUX_usb_none INTERFACE) target_compile_options(GENERIC_F412CGUX_usb_none INTERFACE @@ -42268,7 +42408,7 @@ set(GENERIC_F412CGUX_hid_MCU cortex-m4) set(GENERIC_F412CGUX_hid_FPCONF "-") add_library(GENERIC_F412CGUX_hid INTERFACE) target_compile_options(GENERIC_F412CGUX_hid INTERFACE - "SHELL:-DSTM32F412Cx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F412Cx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -42310,7 +42450,7 @@ set(GENERIC_F412RETX_MCU cortex-m4) set(GENERIC_F412RETX_FPCONF "-") add_library(GENERIC_F412RETX INTERFACE) target_compile_options(GENERIC_F412RETX INTERFACE - "SHELL:-DSTM32F412Rx " + "SHELL:-DSTM32F412Rx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -42355,15 +42495,15 @@ target_compile_options(GENERIC_F412RETX_serial_none INTERFACE ) add_library(GENERIC_F412RETX_usb_CDC INTERFACE) target_compile_options(GENERIC_F412RETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F412RETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F412RETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F412RETX_usb_HID INTERFACE) target_compile_options(GENERIC_F412RETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F412RETX_usb_none INTERFACE) target_compile_options(GENERIC_F412RETX_usb_none INTERFACE @@ -42392,7 +42532,7 @@ set(GENERIC_F412RETX_hid_MCU cortex-m4) set(GENERIC_F412RETX_hid_FPCONF "-") add_library(GENERIC_F412RETX_hid INTERFACE) target_compile_options(GENERIC_F412RETX_hid INTERFACE - "SHELL:-DSTM32F412Rx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F412Rx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -42434,7 +42574,7 @@ set(GENERIC_F412REYX_MCU cortex-m4) set(GENERIC_F412REYX_FPCONF "-") add_library(GENERIC_F412REYX INTERFACE) target_compile_options(GENERIC_F412REYX INTERFACE - "SHELL:-DSTM32F412Rx " + "SHELL:-DSTM32F412Rx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -42479,15 +42619,15 @@ target_compile_options(GENERIC_F412REYX_serial_none INTERFACE ) add_library(GENERIC_F412REYX_usb_CDC INTERFACE) target_compile_options(GENERIC_F412REYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F412REYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F412REYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F412REYX_usb_HID INTERFACE) target_compile_options(GENERIC_F412REYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F412REYX_usb_none INTERFACE) target_compile_options(GENERIC_F412REYX_usb_none INTERFACE @@ -42516,7 +42656,7 @@ set(GENERIC_F412REYX_hid_MCU cortex-m4) set(GENERIC_F412REYX_hid_FPCONF "-") add_library(GENERIC_F412REYX_hid INTERFACE) target_compile_options(GENERIC_F412REYX_hid INTERFACE - "SHELL:-DSTM32F412Rx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F412Rx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -42558,7 +42698,7 @@ set(GENERIC_F412REYXP_MCU cortex-m4) set(GENERIC_F412REYXP_FPCONF "-") add_library(GENERIC_F412REYXP INTERFACE) target_compile_options(GENERIC_F412REYXP INTERFACE - "SHELL:-DSTM32F412Rx " + "SHELL:-DSTM32F412Rx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -42603,15 +42743,15 @@ target_compile_options(GENERIC_F412REYXP_serial_none INTERFACE ) add_library(GENERIC_F412REYXP_usb_CDC INTERFACE) target_compile_options(GENERIC_F412REYXP_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F412REYXP_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F412REYXP_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F412REYXP_usb_HID INTERFACE) target_compile_options(GENERIC_F412REYXP_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F412REYXP_usb_none INTERFACE) target_compile_options(GENERIC_F412REYXP_usb_none INTERFACE @@ -42640,7 +42780,7 @@ set(GENERIC_F412REYXP_hid_MCU cortex-m4) set(GENERIC_F412REYXP_hid_FPCONF "-") add_library(GENERIC_F412REYXP_hid INTERFACE) target_compile_options(GENERIC_F412REYXP_hid INTERFACE - "SHELL:-DSTM32F412Rx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F412Rx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -42682,7 +42822,7 @@ set(GENERIC_F412RGTX_MCU cortex-m4) set(GENERIC_F412RGTX_FPCONF "-") add_library(GENERIC_F412RGTX INTERFACE) target_compile_options(GENERIC_F412RGTX INTERFACE - "SHELL:-DSTM32F412Rx " + "SHELL:-DSTM32F412Rx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -42727,15 +42867,15 @@ target_compile_options(GENERIC_F412RGTX_serial_none INTERFACE ) add_library(GENERIC_F412RGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F412RGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F412RGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F412RGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F412RGTX_usb_HID INTERFACE) target_compile_options(GENERIC_F412RGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F412RGTX_usb_none INTERFACE) target_compile_options(GENERIC_F412RGTX_usb_none INTERFACE @@ -42764,7 +42904,7 @@ set(GENERIC_F412RGTX_hid_MCU cortex-m4) set(GENERIC_F412RGTX_hid_FPCONF "-") add_library(GENERIC_F412RGTX_hid INTERFACE) target_compile_options(GENERIC_F412RGTX_hid INTERFACE - "SHELL:-DSTM32F412Rx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F412Rx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -42806,7 +42946,7 @@ set(GENERIC_F412RGYX_MCU cortex-m4) set(GENERIC_F412RGYX_FPCONF "-") add_library(GENERIC_F412RGYX INTERFACE) target_compile_options(GENERIC_F412RGYX INTERFACE - "SHELL:-DSTM32F412Rx " + "SHELL:-DSTM32F412Rx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -42851,15 +42991,15 @@ target_compile_options(GENERIC_F412RGYX_serial_none INTERFACE ) add_library(GENERIC_F412RGYX_usb_CDC INTERFACE) target_compile_options(GENERIC_F412RGYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F412RGYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F412RGYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F412RGYX_usb_HID INTERFACE) target_compile_options(GENERIC_F412RGYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F412RGYX_usb_none INTERFACE) target_compile_options(GENERIC_F412RGYX_usb_none INTERFACE @@ -42888,7 +43028,7 @@ set(GENERIC_F412RGYX_hid_MCU cortex-m4) set(GENERIC_F412RGYX_hid_FPCONF "-") add_library(GENERIC_F412RGYX_hid INTERFACE) target_compile_options(GENERIC_F412RGYX_hid INTERFACE - "SHELL:-DSTM32F412Rx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F412Rx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -42930,7 +43070,7 @@ set(GENERIC_F412RGYXP_MCU cortex-m4) set(GENERIC_F412RGYXP_FPCONF "-") add_library(GENERIC_F412RGYXP INTERFACE) target_compile_options(GENERIC_F412RGYXP INTERFACE - "SHELL:-DSTM32F412Rx " + "SHELL:-DSTM32F412Rx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -42975,15 +43115,15 @@ target_compile_options(GENERIC_F412RGYXP_serial_none INTERFACE ) add_library(GENERIC_F412RGYXP_usb_CDC INTERFACE) target_compile_options(GENERIC_F412RGYXP_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F412RGYXP_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F412RGYXP_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F412RGYXP_usb_HID INTERFACE) target_compile_options(GENERIC_F412RGYXP_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F412RGYXP_usb_none INTERFACE) target_compile_options(GENERIC_F412RGYXP_usb_none INTERFACE @@ -43012,7 +43152,7 @@ set(GENERIC_F412RGYXP_hid_MCU cortex-m4) set(GENERIC_F412RGYXP_hid_FPCONF "-") add_library(GENERIC_F412RGYXP_hid INTERFACE) target_compile_options(GENERIC_F412RGYXP_hid INTERFACE - "SHELL:-DSTM32F412Rx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F412Rx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -43054,7 +43194,7 @@ set(GENERIC_F412ZEJX_MCU cortex-m4) set(GENERIC_F412ZEJX_FPCONF "-") add_library(GENERIC_F412ZEJX INTERFACE) target_compile_options(GENERIC_F412ZEJX INTERFACE - "SHELL:-DSTM32F412Zx " + "SHELL:-DSTM32F412Zx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -43099,15 +43239,15 @@ target_compile_options(GENERIC_F412ZEJX_serial_none INTERFACE ) add_library(GENERIC_F412ZEJX_usb_CDC INTERFACE) target_compile_options(GENERIC_F412ZEJX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F412ZEJX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F412ZEJX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F412ZEJX_usb_HID INTERFACE) target_compile_options(GENERIC_F412ZEJX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F412ZEJX_usb_none INTERFACE) target_compile_options(GENERIC_F412ZEJX_usb_none INTERFACE @@ -43136,7 +43276,7 @@ set(GENERIC_F412ZEJX_hid_MCU cortex-m4) set(GENERIC_F412ZEJX_hid_FPCONF "-") add_library(GENERIC_F412ZEJX_hid INTERFACE) target_compile_options(GENERIC_F412ZEJX_hid INTERFACE - "SHELL:-DSTM32F412Zx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F412Zx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -43178,7 +43318,7 @@ set(GENERIC_F412ZETX_MCU cortex-m4) set(GENERIC_F412ZETX_FPCONF "-") add_library(GENERIC_F412ZETX INTERFACE) target_compile_options(GENERIC_F412ZETX INTERFACE - "SHELL:-DSTM32F412Zx " + "SHELL:-DSTM32F412Zx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -43223,15 +43363,15 @@ target_compile_options(GENERIC_F412ZETX_serial_none INTERFACE ) add_library(GENERIC_F412ZETX_usb_CDC INTERFACE) target_compile_options(GENERIC_F412ZETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F412ZETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F412ZETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F412ZETX_usb_HID INTERFACE) target_compile_options(GENERIC_F412ZETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F412ZETX_usb_none INTERFACE) target_compile_options(GENERIC_F412ZETX_usb_none INTERFACE @@ -43260,7 +43400,7 @@ set(GENERIC_F412ZETX_hid_MCU cortex-m4) set(GENERIC_F412ZETX_hid_FPCONF "-") add_library(GENERIC_F412ZETX_hid INTERFACE) target_compile_options(GENERIC_F412ZETX_hid INTERFACE - "SHELL:-DSTM32F412Zx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F412Zx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -43302,7 +43442,7 @@ set(GENERIC_F412ZGJX_MCU cortex-m4) set(GENERIC_F412ZGJX_FPCONF "-") add_library(GENERIC_F412ZGJX INTERFACE) target_compile_options(GENERIC_F412ZGJX INTERFACE - "SHELL:-DSTM32F412Zx " + "SHELL:-DSTM32F412Zx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -43347,15 +43487,15 @@ target_compile_options(GENERIC_F412ZGJX_serial_none INTERFACE ) add_library(GENERIC_F412ZGJX_usb_CDC INTERFACE) target_compile_options(GENERIC_F412ZGJX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F412ZGJX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F412ZGJX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F412ZGJX_usb_HID INTERFACE) target_compile_options(GENERIC_F412ZGJX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F412ZGJX_usb_none INTERFACE) target_compile_options(GENERIC_F412ZGJX_usb_none INTERFACE @@ -43384,7 +43524,7 @@ set(GENERIC_F412ZGJX_hid_MCU cortex-m4) set(GENERIC_F412ZGJX_hid_FPCONF "-") add_library(GENERIC_F412ZGJX_hid INTERFACE) target_compile_options(GENERIC_F412ZGJX_hid INTERFACE - "SHELL:-DSTM32F412Zx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F412Zx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -43426,7 +43566,7 @@ set(GENERIC_F412ZGTX_MCU cortex-m4) set(GENERIC_F412ZGTX_FPCONF "-") add_library(GENERIC_F412ZGTX INTERFACE) target_compile_options(GENERIC_F412ZGTX INTERFACE - "SHELL:-DSTM32F412Zx " + "SHELL:-DSTM32F412Zx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -43471,15 +43611,15 @@ target_compile_options(GENERIC_F412ZGTX_serial_none INTERFACE ) add_library(GENERIC_F412ZGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F412ZGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F412ZGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F412ZGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F412ZGTX_usb_HID INTERFACE) target_compile_options(GENERIC_F412ZGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F412ZGTX_usb_none INTERFACE) target_compile_options(GENERIC_F412ZGTX_usb_none INTERFACE @@ -43508,7 +43648,7 @@ set(GENERIC_F412ZGTX_hid_MCU cortex-m4) set(GENERIC_F412ZGTX_hid_FPCONF "-") add_library(GENERIC_F412ZGTX_hid INTERFACE) target_compile_options(GENERIC_F412ZGTX_hid INTERFACE - "SHELL:-DSTM32F412Zx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F412Zx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -43550,7 +43690,7 @@ set(GENERIC_F413CGUX_MCU cortex-m4) set(GENERIC_F413CGUX_FPCONF "-") add_library(GENERIC_F413CGUX INTERFACE) target_compile_options(GENERIC_F413CGUX INTERFACE - "SHELL:-DSTM32F413xx " + "SHELL:-DSTM32F413xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -43595,15 +43735,15 @@ target_compile_options(GENERIC_F413CGUX_serial_none INTERFACE ) add_library(GENERIC_F413CGUX_usb_CDC INTERFACE) target_compile_options(GENERIC_F413CGUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F413CGUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F413CGUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F413CGUX_usb_HID INTERFACE) target_compile_options(GENERIC_F413CGUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F413CGUX_usb_none INTERFACE) target_compile_options(GENERIC_F413CGUX_usb_none INTERFACE @@ -43632,7 +43772,7 @@ set(GENERIC_F413CGUX_hid_MCU cortex-m4) set(GENERIC_F413CGUX_hid_FPCONF "-") add_library(GENERIC_F413CGUX_hid INTERFACE) target_compile_options(GENERIC_F413CGUX_hid INTERFACE - "SHELL:-DSTM32F413xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F413xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -43674,7 +43814,7 @@ set(GENERIC_F413CHUX_MCU cortex-m4) set(GENERIC_F413CHUX_FPCONF "-") add_library(GENERIC_F413CHUX INTERFACE) target_compile_options(GENERIC_F413CHUX INTERFACE - "SHELL:-DSTM32F413xx " + "SHELL:-DSTM32F413xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -43719,15 +43859,15 @@ target_compile_options(GENERIC_F413CHUX_serial_none INTERFACE ) add_library(GENERIC_F413CHUX_usb_CDC INTERFACE) target_compile_options(GENERIC_F413CHUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F413CHUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F413CHUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F413CHUX_usb_HID INTERFACE) target_compile_options(GENERIC_F413CHUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F413CHUX_usb_none INTERFACE) target_compile_options(GENERIC_F413CHUX_usb_none INTERFACE @@ -43756,7 +43896,7 @@ set(GENERIC_F413CHUX_hid_MCU cortex-m4) set(GENERIC_F413CHUX_hid_FPCONF "-") add_library(GENERIC_F413CHUX_hid INTERFACE) target_compile_options(GENERIC_F413CHUX_hid INTERFACE - "SHELL:-DSTM32F413xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F413xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -43798,7 +43938,7 @@ set(GENERIC_F413RGTX_MCU cortex-m4) set(GENERIC_F413RGTX_FPCONF "-") add_library(GENERIC_F413RGTX INTERFACE) target_compile_options(GENERIC_F413RGTX INTERFACE - "SHELL:-DSTM32F413xx " + "SHELL:-DSTM32F413xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -43843,15 +43983,15 @@ target_compile_options(GENERIC_F413RGTX_serial_none INTERFACE ) add_library(GENERIC_F413RGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F413RGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F413RGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F413RGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F413RGTX_usb_HID INTERFACE) target_compile_options(GENERIC_F413RGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F413RGTX_usb_none INTERFACE) target_compile_options(GENERIC_F413RGTX_usb_none INTERFACE @@ -43880,7 +44020,7 @@ set(GENERIC_F413RGTX_hid_MCU cortex-m4) set(GENERIC_F413RGTX_hid_FPCONF "-") add_library(GENERIC_F413RGTX_hid INTERFACE) target_compile_options(GENERIC_F413RGTX_hid INTERFACE - "SHELL:-DSTM32F413xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F413xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -43922,7 +44062,7 @@ set(GENERIC_F413RHTX_MCU cortex-m4) set(GENERIC_F413RHTX_FPCONF "-") add_library(GENERIC_F413RHTX INTERFACE) target_compile_options(GENERIC_F413RHTX INTERFACE - "SHELL:-DSTM32F413xx " + "SHELL:-DSTM32F413xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -43967,15 +44107,15 @@ target_compile_options(GENERIC_F413RHTX_serial_none INTERFACE ) add_library(GENERIC_F413RHTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F413RHTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F413RHTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F413RHTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F413RHTX_usb_HID INTERFACE) target_compile_options(GENERIC_F413RHTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F413RHTX_usb_none INTERFACE) target_compile_options(GENERIC_F413RHTX_usb_none INTERFACE @@ -44004,7 +44144,7 @@ set(GENERIC_F413RHTX_hid_MCU cortex-m4) set(GENERIC_F413RHTX_hid_FPCONF "-") add_library(GENERIC_F413RHTX_hid INTERFACE) target_compile_options(GENERIC_F413RHTX_hid INTERFACE - "SHELL:-DSTM32F413xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F413xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -44046,7 +44186,7 @@ set(GENERIC_F413ZGJX_MCU cortex-m4) set(GENERIC_F413ZGJX_FPCONF "-") add_library(GENERIC_F413ZGJX INTERFACE) target_compile_options(GENERIC_F413ZGJX INTERFACE - "SHELL:-DSTM32F413xx " + "SHELL:-DSTM32F413xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -44091,15 +44231,15 @@ target_compile_options(GENERIC_F413ZGJX_serial_none INTERFACE ) add_library(GENERIC_F413ZGJX_usb_CDC INTERFACE) target_compile_options(GENERIC_F413ZGJX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F413ZGJX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F413ZGJX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F413ZGJX_usb_HID INTERFACE) target_compile_options(GENERIC_F413ZGJX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F413ZGJX_usb_none INTERFACE) target_compile_options(GENERIC_F413ZGJX_usb_none INTERFACE @@ -44128,7 +44268,7 @@ set(GENERIC_F413ZGJX_hid_MCU cortex-m4) set(GENERIC_F413ZGJX_hid_FPCONF "-") add_library(GENERIC_F413ZGJX_hid INTERFACE) target_compile_options(GENERIC_F413ZGJX_hid INTERFACE - "SHELL:-DSTM32F413xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F413xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -44170,7 +44310,7 @@ set(GENERIC_F413ZGTX_MCU cortex-m4) set(GENERIC_F413ZGTX_FPCONF "-") add_library(GENERIC_F413ZGTX INTERFACE) target_compile_options(GENERIC_F413ZGTX INTERFACE - "SHELL:-DSTM32F413xx " + "SHELL:-DSTM32F413xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -44215,15 +44355,15 @@ target_compile_options(GENERIC_F413ZGTX_serial_none INTERFACE ) add_library(GENERIC_F413ZGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F413ZGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F413ZGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F413ZGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F413ZGTX_usb_HID INTERFACE) target_compile_options(GENERIC_F413ZGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F413ZGTX_usb_none INTERFACE) target_compile_options(GENERIC_F413ZGTX_usb_none INTERFACE @@ -44252,7 +44392,7 @@ set(GENERIC_F413ZGTX_hid_MCU cortex-m4) set(GENERIC_F413ZGTX_hid_FPCONF "-") add_library(GENERIC_F413ZGTX_hid INTERFACE) target_compile_options(GENERIC_F413ZGTX_hid INTERFACE - "SHELL:-DSTM32F413xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F413xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -44294,7 +44434,7 @@ set(GENERIC_F413ZHJX_MCU cortex-m4) set(GENERIC_F413ZHJX_FPCONF "-") add_library(GENERIC_F413ZHJX INTERFACE) target_compile_options(GENERIC_F413ZHJX INTERFACE - "SHELL:-DSTM32F413xx " + "SHELL:-DSTM32F413xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -44339,15 +44479,15 @@ target_compile_options(GENERIC_F413ZHJX_serial_none INTERFACE ) add_library(GENERIC_F413ZHJX_usb_CDC INTERFACE) target_compile_options(GENERIC_F413ZHJX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F413ZHJX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F413ZHJX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F413ZHJX_usb_HID INTERFACE) target_compile_options(GENERIC_F413ZHJX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F413ZHJX_usb_none INTERFACE) target_compile_options(GENERIC_F413ZHJX_usb_none INTERFACE @@ -44376,7 +44516,7 @@ set(GENERIC_F413ZHJX_hid_MCU cortex-m4) set(GENERIC_F413ZHJX_hid_FPCONF "-") add_library(GENERIC_F413ZHJX_hid INTERFACE) target_compile_options(GENERIC_F413ZHJX_hid INTERFACE - "SHELL:-DSTM32F413xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F413xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -44418,7 +44558,7 @@ set(GENERIC_F413ZHTX_MCU cortex-m4) set(GENERIC_F413ZHTX_FPCONF "-") add_library(GENERIC_F413ZHTX INTERFACE) target_compile_options(GENERIC_F413ZHTX INTERFACE - "SHELL:-DSTM32F413xx " + "SHELL:-DSTM32F413xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -44463,15 +44603,15 @@ target_compile_options(GENERIC_F413ZHTX_serial_none INTERFACE ) add_library(GENERIC_F413ZHTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F413ZHTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F413ZHTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F413ZHTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F413ZHTX_usb_HID INTERFACE) target_compile_options(GENERIC_F413ZHTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F413ZHTX_usb_none INTERFACE) target_compile_options(GENERIC_F413ZHTX_usb_none INTERFACE @@ -44500,7 +44640,7 @@ set(GENERIC_F413ZHTX_hid_MCU cortex-m4) set(GENERIC_F413ZHTX_hid_FPCONF "-") add_library(GENERIC_F413ZHTX_hid INTERFACE) target_compile_options(GENERIC_F413ZHTX_hid INTERFACE - "SHELL:-DSTM32F413xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F413xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -44542,7 +44682,7 @@ set(GENERIC_F415RGTX_MCU cortex-m4) set(GENERIC_F415RGTX_FPCONF "-") add_library(GENERIC_F415RGTX INTERFACE) target_compile_options(GENERIC_F415RGTX INTERFACE - "SHELL:-DSTM32F415xx " + "SHELL:-DSTM32F415xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -44587,15 +44727,15 @@ target_compile_options(GENERIC_F415RGTX_serial_none INTERFACE ) add_library(GENERIC_F415RGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F415RGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F415RGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F415RGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F415RGTX_usb_HID INTERFACE) target_compile_options(GENERIC_F415RGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F415RGTX_usb_none INTERFACE) target_compile_options(GENERIC_F415RGTX_usb_none INTERFACE @@ -44624,7 +44764,7 @@ set(GENERIC_F415RGTX_hid_MCU cortex-m4) set(GENERIC_F415RGTX_hid_FPCONF "-") add_library(GENERIC_F415RGTX_hid INTERFACE) target_compile_options(GENERIC_F415RGTX_hid INTERFACE - "SHELL:-DSTM32F415xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F415xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -44666,7 +44806,7 @@ set(GENERIC_F417IEHX_MCU cortex-m4) set(GENERIC_F417IEHX_FPCONF "-") add_library(GENERIC_F417IEHX INTERFACE) target_compile_options(GENERIC_F417IEHX INTERFACE - "SHELL:-DSTM32F417xx " + "SHELL:-DSTM32F417xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -44711,15 +44851,15 @@ target_compile_options(GENERIC_F417IEHX_serial_none INTERFACE ) add_library(GENERIC_F417IEHX_usb_CDC INTERFACE) target_compile_options(GENERIC_F417IEHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F417IEHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F417IEHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F417IEHX_usb_HID INTERFACE) target_compile_options(GENERIC_F417IEHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F417IEHX_usb_none INTERFACE) target_compile_options(GENERIC_F417IEHX_usb_none INTERFACE @@ -44748,7 +44888,7 @@ set(GENERIC_F417IEHX_hid_MCU cortex-m4) set(GENERIC_F417IEHX_hid_FPCONF "-") add_library(GENERIC_F417IEHX_hid INTERFACE) target_compile_options(GENERIC_F417IEHX_hid INTERFACE - "SHELL:-DSTM32F417xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F417xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -44790,7 +44930,7 @@ set(GENERIC_F417IETX_MCU cortex-m4) set(GENERIC_F417IETX_FPCONF "-") add_library(GENERIC_F417IETX INTERFACE) target_compile_options(GENERIC_F417IETX INTERFACE - "SHELL:-DSTM32F417xx " + "SHELL:-DSTM32F417xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -44835,15 +44975,15 @@ target_compile_options(GENERIC_F417IETX_serial_none INTERFACE ) add_library(GENERIC_F417IETX_usb_CDC INTERFACE) target_compile_options(GENERIC_F417IETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F417IETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F417IETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F417IETX_usb_HID INTERFACE) target_compile_options(GENERIC_F417IETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F417IETX_usb_none INTERFACE) target_compile_options(GENERIC_F417IETX_usb_none INTERFACE @@ -44872,7 +45012,7 @@ set(GENERIC_F417IETX_hid_MCU cortex-m4) set(GENERIC_F417IETX_hid_FPCONF "-") add_library(GENERIC_F417IETX_hid INTERFACE) target_compile_options(GENERIC_F417IETX_hid INTERFACE - "SHELL:-DSTM32F417xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F417xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -44914,7 +45054,7 @@ set(GENERIC_F417IGHX_MCU cortex-m4) set(GENERIC_F417IGHX_FPCONF "-") add_library(GENERIC_F417IGHX INTERFACE) target_compile_options(GENERIC_F417IGHX INTERFACE - "SHELL:-DSTM32F417xx " + "SHELL:-DSTM32F417xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -44959,15 +45099,15 @@ target_compile_options(GENERIC_F417IGHX_serial_none INTERFACE ) add_library(GENERIC_F417IGHX_usb_CDC INTERFACE) target_compile_options(GENERIC_F417IGHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F417IGHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F417IGHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F417IGHX_usb_HID INTERFACE) target_compile_options(GENERIC_F417IGHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F417IGHX_usb_none INTERFACE) target_compile_options(GENERIC_F417IGHX_usb_none INTERFACE @@ -44996,7 +45136,7 @@ set(GENERIC_F417IGHX_hid_MCU cortex-m4) set(GENERIC_F417IGHX_hid_FPCONF "-") add_library(GENERIC_F417IGHX_hid INTERFACE) target_compile_options(GENERIC_F417IGHX_hid INTERFACE - "SHELL:-DSTM32F417xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F417xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -45038,7 +45178,7 @@ set(GENERIC_F417IGTX_MCU cortex-m4) set(GENERIC_F417IGTX_FPCONF "-") add_library(GENERIC_F417IGTX INTERFACE) target_compile_options(GENERIC_F417IGTX INTERFACE - "SHELL:-DSTM32F417xx " + "SHELL:-DSTM32F417xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -45083,15 +45223,15 @@ target_compile_options(GENERIC_F417IGTX_serial_none INTERFACE ) add_library(GENERIC_F417IGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F417IGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F417IGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F417IGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F417IGTX_usb_HID INTERFACE) target_compile_options(GENERIC_F417IGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F417IGTX_usb_none INTERFACE) target_compile_options(GENERIC_F417IGTX_usb_none INTERFACE @@ -45120,7 +45260,7 @@ set(GENERIC_F417IGTX_hid_MCU cortex-m4) set(GENERIC_F417IGTX_hid_FPCONF "-") add_library(GENERIC_F417IGTX_hid INTERFACE) target_compile_options(GENERIC_F417IGTX_hid INTERFACE - "SHELL:-DSTM32F417xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F417xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -45162,7 +45302,7 @@ set(GENERIC_F417VETX_MCU cortex-m4) set(GENERIC_F417VETX_FPCONF "-") add_library(GENERIC_F417VETX INTERFACE) target_compile_options(GENERIC_F417VETX INTERFACE - "SHELL:-DSTM32F417xx " + "SHELL:-DSTM32F417xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -45207,15 +45347,15 @@ target_compile_options(GENERIC_F417VETX_serial_none INTERFACE ) add_library(GENERIC_F417VETX_usb_CDC INTERFACE) target_compile_options(GENERIC_F417VETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F417VETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F417VETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F417VETX_usb_HID INTERFACE) target_compile_options(GENERIC_F417VETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F417VETX_usb_none INTERFACE) target_compile_options(GENERIC_F417VETX_usb_none INTERFACE @@ -45244,7 +45384,7 @@ set(GENERIC_F417VETX_hid_MCU cortex-m4) set(GENERIC_F417VETX_hid_FPCONF "-") add_library(GENERIC_F417VETX_hid INTERFACE) target_compile_options(GENERIC_F417VETX_hid INTERFACE - "SHELL:-DSTM32F417xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F417xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -45286,7 +45426,7 @@ set(GENERIC_F417VGTX_MCU cortex-m4) set(GENERIC_F417VGTX_FPCONF "-") add_library(GENERIC_F417VGTX INTERFACE) target_compile_options(GENERIC_F417VGTX INTERFACE - "SHELL:-DSTM32F417xx " + "SHELL:-DSTM32F417xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -45331,15 +45471,15 @@ target_compile_options(GENERIC_F417VGTX_serial_none INTERFACE ) add_library(GENERIC_F417VGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F417VGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F417VGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F417VGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F417VGTX_usb_HID INTERFACE) target_compile_options(GENERIC_F417VGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F417VGTX_usb_none INTERFACE) target_compile_options(GENERIC_F417VGTX_usb_none INTERFACE @@ -45368,7 +45508,7 @@ set(GENERIC_F417VGTX_hid_MCU cortex-m4) set(GENERIC_F417VGTX_hid_FPCONF "-") add_library(GENERIC_F417VGTX_hid INTERFACE) target_compile_options(GENERIC_F417VGTX_hid INTERFACE - "SHELL:-DSTM32F417xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F417xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -45410,7 +45550,7 @@ set(GENERIC_F417ZETX_MCU cortex-m4) set(GENERIC_F417ZETX_FPCONF "-") add_library(GENERIC_F417ZETX INTERFACE) target_compile_options(GENERIC_F417ZETX INTERFACE - "SHELL:-DSTM32F417xx " + "SHELL:-DSTM32F417xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -45455,15 +45595,15 @@ target_compile_options(GENERIC_F417ZETX_serial_none INTERFACE ) add_library(GENERIC_F417ZETX_usb_CDC INTERFACE) target_compile_options(GENERIC_F417ZETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F417ZETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F417ZETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F417ZETX_usb_HID INTERFACE) target_compile_options(GENERIC_F417ZETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F417ZETX_usb_none INTERFACE) target_compile_options(GENERIC_F417ZETX_usb_none INTERFACE @@ -45492,7 +45632,7 @@ set(GENERIC_F417ZETX_hid_MCU cortex-m4) set(GENERIC_F417ZETX_hid_FPCONF "-") add_library(GENERIC_F417ZETX_hid INTERFACE) target_compile_options(GENERIC_F417ZETX_hid INTERFACE - "SHELL:-DSTM32F417xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F417xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -45534,7 +45674,7 @@ set(GENERIC_F417ZGTX_MCU cortex-m4) set(GENERIC_F417ZGTX_FPCONF "-") add_library(GENERIC_F417ZGTX INTERFACE) target_compile_options(GENERIC_F417ZGTX INTERFACE - "SHELL:-DSTM32F417xx " + "SHELL:-DSTM32F417xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -45579,15 +45719,15 @@ target_compile_options(GENERIC_F417ZGTX_serial_none INTERFACE ) add_library(GENERIC_F417ZGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F417ZGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F417ZGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F417ZGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F417ZGTX_usb_HID INTERFACE) target_compile_options(GENERIC_F417ZGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F417ZGTX_usb_none INTERFACE) target_compile_options(GENERIC_F417ZGTX_usb_none INTERFACE @@ -45616,7 +45756,7 @@ set(GENERIC_F417ZGTX_hid_MCU cortex-m4) set(GENERIC_F417ZGTX_hid_FPCONF "-") add_library(GENERIC_F417ZGTX_hid INTERFACE) target_compile_options(GENERIC_F417ZGTX_hid INTERFACE - "SHELL:-DSTM32F417xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F417xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -45658,7 +45798,7 @@ set(GENERIC_F423CHUX_MCU cortex-m4) set(GENERIC_F423CHUX_FPCONF "-") add_library(GENERIC_F423CHUX INTERFACE) target_compile_options(GENERIC_F423CHUX INTERFACE - "SHELL:-DSTM32F423xx " + "SHELL:-DSTM32F423xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -45703,15 +45843,15 @@ target_compile_options(GENERIC_F423CHUX_serial_none INTERFACE ) add_library(GENERIC_F423CHUX_usb_CDC INTERFACE) target_compile_options(GENERIC_F423CHUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F423CHUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F423CHUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F423CHUX_usb_HID INTERFACE) target_compile_options(GENERIC_F423CHUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F423CHUX_usb_none INTERFACE) target_compile_options(GENERIC_F423CHUX_usb_none INTERFACE @@ -45740,7 +45880,7 @@ set(GENERIC_F423CHUX_hid_MCU cortex-m4) set(GENERIC_F423CHUX_hid_FPCONF "-") add_library(GENERIC_F423CHUX_hid INTERFACE) target_compile_options(GENERIC_F423CHUX_hid INTERFACE - "SHELL:-DSTM32F423xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F423xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -45782,7 +45922,7 @@ set(GENERIC_F423RHTX_MCU cortex-m4) set(GENERIC_F423RHTX_FPCONF "-") add_library(GENERIC_F423RHTX INTERFACE) target_compile_options(GENERIC_F423RHTX INTERFACE - "SHELL:-DSTM32F423xx " + "SHELL:-DSTM32F423xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -45827,15 +45967,15 @@ target_compile_options(GENERIC_F423RHTX_serial_none INTERFACE ) add_library(GENERIC_F423RHTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F423RHTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F423RHTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F423RHTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F423RHTX_usb_HID INTERFACE) target_compile_options(GENERIC_F423RHTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F423RHTX_usb_none INTERFACE) target_compile_options(GENERIC_F423RHTX_usb_none INTERFACE @@ -45864,7 +46004,7 @@ set(GENERIC_F423RHTX_hid_MCU cortex-m4) set(GENERIC_F423RHTX_hid_FPCONF "-") add_library(GENERIC_F423RHTX_hid INTERFACE) target_compile_options(GENERIC_F423RHTX_hid INTERFACE - "SHELL:-DSTM32F423xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F423xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -45906,7 +46046,7 @@ set(GENERIC_F423ZHJX_MCU cortex-m4) set(GENERIC_F423ZHJX_FPCONF "-") add_library(GENERIC_F423ZHJX INTERFACE) target_compile_options(GENERIC_F423ZHJX INTERFACE - "SHELL:-DSTM32F423xx " + "SHELL:-DSTM32F423xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -45951,15 +46091,15 @@ target_compile_options(GENERIC_F423ZHJX_serial_none INTERFACE ) add_library(GENERIC_F423ZHJX_usb_CDC INTERFACE) target_compile_options(GENERIC_F423ZHJX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F423ZHJX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F423ZHJX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F423ZHJX_usb_HID INTERFACE) target_compile_options(GENERIC_F423ZHJX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F423ZHJX_usb_none INTERFACE) target_compile_options(GENERIC_F423ZHJX_usb_none INTERFACE @@ -45988,7 +46128,7 @@ set(GENERIC_F423ZHJX_hid_MCU cortex-m4) set(GENERIC_F423ZHJX_hid_FPCONF "-") add_library(GENERIC_F423ZHJX_hid INTERFACE) target_compile_options(GENERIC_F423ZHJX_hid INTERFACE - "SHELL:-DSTM32F423xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F423xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -46030,7 +46170,7 @@ set(GENERIC_F423ZHTX_MCU cortex-m4) set(GENERIC_F423ZHTX_FPCONF "-") add_library(GENERIC_F423ZHTX INTERFACE) target_compile_options(GENERIC_F423ZHTX INTERFACE - "SHELL:-DSTM32F423xx " + "SHELL:-DSTM32F423xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -46075,15 +46215,15 @@ target_compile_options(GENERIC_F423ZHTX_serial_none INTERFACE ) add_library(GENERIC_F423ZHTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F423ZHTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F423ZHTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F423ZHTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F423ZHTX_usb_HID INTERFACE) target_compile_options(GENERIC_F423ZHTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F423ZHTX_usb_none INTERFACE) target_compile_options(GENERIC_F423ZHTX_usb_none INTERFACE @@ -46112,7 +46252,7 @@ set(GENERIC_F423ZHTX_hid_MCU cortex-m4) set(GENERIC_F423ZHTX_hid_FPCONF "-") add_library(GENERIC_F423ZHTX_hid INTERFACE) target_compile_options(GENERIC_F423ZHTX_hid INTERFACE - "SHELL:-DSTM32F423xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F423xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -46154,7 +46294,7 @@ set(GENERIC_F427ZGTX_MCU cortex-m4) set(GENERIC_F427ZGTX_FPCONF "-") add_library(GENERIC_F427ZGTX INTERFACE) target_compile_options(GENERIC_F427ZGTX INTERFACE - "SHELL:-DSTM32F427xx " + "SHELL:-DSTM32F427xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -46199,15 +46339,15 @@ target_compile_options(GENERIC_F427ZGTX_serial_none INTERFACE ) add_library(GENERIC_F427ZGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F427ZGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F427ZGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F427ZGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F427ZGTX_usb_HID INTERFACE) target_compile_options(GENERIC_F427ZGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F427ZGTX_usb_none INTERFACE) target_compile_options(GENERIC_F427ZGTX_usb_none INTERFACE @@ -46236,7 +46376,7 @@ set(GENERIC_F427ZGTX_hid_MCU cortex-m4) set(GENERIC_F427ZGTX_hid_FPCONF "-") add_library(GENERIC_F427ZGTX_hid INTERFACE) target_compile_options(GENERIC_F427ZGTX_hid INTERFACE - "SHELL:-DSTM32F427xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F427xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -46278,7 +46418,7 @@ set(GENERIC_F427ZITX_MCU cortex-m4) set(GENERIC_F427ZITX_FPCONF "-") add_library(GENERIC_F427ZITX INTERFACE) target_compile_options(GENERIC_F427ZITX INTERFACE - "SHELL:-DSTM32F427xx " + "SHELL:-DSTM32F427xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -46323,15 +46463,15 @@ target_compile_options(GENERIC_F427ZITX_serial_none INTERFACE ) add_library(GENERIC_F427ZITX_usb_CDC INTERFACE) target_compile_options(GENERIC_F427ZITX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F427ZITX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F427ZITX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F427ZITX_usb_HID INTERFACE) target_compile_options(GENERIC_F427ZITX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F427ZITX_usb_none INTERFACE) target_compile_options(GENERIC_F427ZITX_usb_none INTERFACE @@ -46360,7 +46500,7 @@ set(GENERIC_F427ZITX_hid_MCU cortex-m4) set(GENERIC_F427ZITX_hid_FPCONF "-") add_library(GENERIC_F427ZITX_hid INTERFACE) target_compile_options(GENERIC_F427ZITX_hid INTERFACE - "SHELL:-DSTM32F427xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F427xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -46402,7 +46542,7 @@ set(GENERIC_F429ZETX_MCU cortex-m4) set(GENERIC_F429ZETX_FPCONF "-") add_library(GENERIC_F429ZETX INTERFACE) target_compile_options(GENERIC_F429ZETX INTERFACE - "SHELL:-DSTM32F429xx " + "SHELL:-DSTM32F429xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -46447,15 +46587,15 @@ target_compile_options(GENERIC_F429ZETX_serial_none INTERFACE ) add_library(GENERIC_F429ZETX_usb_CDC INTERFACE) target_compile_options(GENERIC_F429ZETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F429ZETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F429ZETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F429ZETX_usb_HID INTERFACE) target_compile_options(GENERIC_F429ZETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F429ZETX_usb_none INTERFACE) target_compile_options(GENERIC_F429ZETX_usb_none INTERFACE @@ -46484,7 +46624,7 @@ set(GENERIC_F429ZETX_hid_MCU cortex-m4) set(GENERIC_F429ZETX_hid_FPCONF "-") add_library(GENERIC_F429ZETX_hid INTERFACE) target_compile_options(GENERIC_F429ZETX_hid INTERFACE - "SHELL:-DSTM32F429xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F429xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -46526,7 +46666,7 @@ set(GENERIC_F429ZGTX_MCU cortex-m4) set(GENERIC_F429ZGTX_FPCONF "-") add_library(GENERIC_F429ZGTX INTERFACE) target_compile_options(GENERIC_F429ZGTX INTERFACE - "SHELL:-DSTM32F429xx " + "SHELL:-DSTM32F429xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -46571,15 +46711,15 @@ target_compile_options(GENERIC_F429ZGTX_serial_none INTERFACE ) add_library(GENERIC_F429ZGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F429ZGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F429ZGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F429ZGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F429ZGTX_usb_HID INTERFACE) target_compile_options(GENERIC_F429ZGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F429ZGTX_usb_none INTERFACE) target_compile_options(GENERIC_F429ZGTX_usb_none INTERFACE @@ -46608,7 +46748,7 @@ set(GENERIC_F429ZGTX_hid_MCU cortex-m4) set(GENERIC_F429ZGTX_hid_FPCONF "-") add_library(GENERIC_F429ZGTX_hid INTERFACE) target_compile_options(GENERIC_F429ZGTX_hid INTERFACE - "SHELL:-DSTM32F429xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F429xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -46650,7 +46790,7 @@ set(GENERIC_F429ZGYX_MCU cortex-m4) set(GENERIC_F429ZGYX_FPCONF "-") add_library(GENERIC_F429ZGYX INTERFACE) target_compile_options(GENERIC_F429ZGYX INTERFACE - "SHELL:-DSTM32F429xx " + "SHELL:-DSTM32F429xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -46695,15 +46835,15 @@ target_compile_options(GENERIC_F429ZGYX_serial_none INTERFACE ) add_library(GENERIC_F429ZGYX_usb_CDC INTERFACE) target_compile_options(GENERIC_F429ZGYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F429ZGYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F429ZGYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F429ZGYX_usb_HID INTERFACE) target_compile_options(GENERIC_F429ZGYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F429ZGYX_usb_none INTERFACE) target_compile_options(GENERIC_F429ZGYX_usb_none INTERFACE @@ -46732,7 +46872,7 @@ set(GENERIC_F429ZGYX_hid_MCU cortex-m4) set(GENERIC_F429ZGYX_hid_FPCONF "-") add_library(GENERIC_F429ZGYX_hid INTERFACE) target_compile_options(GENERIC_F429ZGYX_hid INTERFACE - "SHELL:-DSTM32F429xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F429xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -46774,7 +46914,7 @@ set(GENERIC_F429ZITX_MCU cortex-m4) set(GENERIC_F429ZITX_FPCONF "-") add_library(GENERIC_F429ZITX INTERFACE) target_compile_options(GENERIC_F429ZITX INTERFACE - "SHELL:-DSTM32F429xx " + "SHELL:-DSTM32F429xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -46819,15 +46959,15 @@ target_compile_options(GENERIC_F429ZITX_serial_none INTERFACE ) add_library(GENERIC_F429ZITX_usb_CDC INTERFACE) target_compile_options(GENERIC_F429ZITX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F429ZITX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F429ZITX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F429ZITX_usb_HID INTERFACE) target_compile_options(GENERIC_F429ZITX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F429ZITX_usb_none INTERFACE) target_compile_options(GENERIC_F429ZITX_usb_none INTERFACE @@ -46856,7 +46996,7 @@ set(GENERIC_F429ZITX_hid_MCU cortex-m4) set(GENERIC_F429ZITX_hid_FPCONF "-") add_library(GENERIC_F429ZITX_hid INTERFACE) target_compile_options(GENERIC_F429ZITX_hid INTERFACE - "SHELL:-DSTM32F429xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F429xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -46898,7 +47038,7 @@ set(GENERIC_F429ZIYX_MCU cortex-m4) set(GENERIC_F429ZIYX_FPCONF "-") add_library(GENERIC_F429ZIYX INTERFACE) target_compile_options(GENERIC_F429ZIYX INTERFACE - "SHELL:-DSTM32F429xx " + "SHELL:-DSTM32F429xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -46943,15 +47083,15 @@ target_compile_options(GENERIC_F429ZIYX_serial_none INTERFACE ) add_library(GENERIC_F429ZIYX_usb_CDC INTERFACE) target_compile_options(GENERIC_F429ZIYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F429ZIYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F429ZIYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F429ZIYX_usb_HID INTERFACE) target_compile_options(GENERIC_F429ZIYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F429ZIYX_usb_none INTERFACE) target_compile_options(GENERIC_F429ZIYX_usb_none INTERFACE @@ -46980,7 +47120,7 @@ set(GENERIC_F429ZIYX_hid_MCU cortex-m4) set(GENERIC_F429ZIYX_hid_FPCONF "-") add_library(GENERIC_F429ZIYX_hid INTERFACE) target_compile_options(GENERIC_F429ZIYX_hid INTERFACE - "SHELL:-DSTM32F429xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F429xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -47022,7 +47162,7 @@ set(GENERIC_F437ZGTX_MCU cortex-m4) set(GENERIC_F437ZGTX_FPCONF "-") add_library(GENERIC_F437ZGTX INTERFACE) target_compile_options(GENERIC_F437ZGTX INTERFACE - "SHELL:-DSTM32F437xx " + "SHELL:-DSTM32F437xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -47067,15 +47207,15 @@ target_compile_options(GENERIC_F437ZGTX_serial_none INTERFACE ) add_library(GENERIC_F437ZGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F437ZGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F437ZGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F437ZGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F437ZGTX_usb_HID INTERFACE) target_compile_options(GENERIC_F437ZGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F437ZGTX_usb_none INTERFACE) target_compile_options(GENERIC_F437ZGTX_usb_none INTERFACE @@ -47104,7 +47244,7 @@ set(GENERIC_F437ZGTX_hid_MCU cortex-m4) set(GENERIC_F437ZGTX_hid_FPCONF "-") add_library(GENERIC_F437ZGTX_hid INTERFACE) target_compile_options(GENERIC_F437ZGTX_hid INTERFACE - "SHELL:-DSTM32F437xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F437xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -47146,7 +47286,7 @@ set(GENERIC_F437ZITX_MCU cortex-m4) set(GENERIC_F437ZITX_FPCONF "-") add_library(GENERIC_F437ZITX INTERFACE) target_compile_options(GENERIC_F437ZITX INTERFACE - "SHELL:-DSTM32F437xx " + "SHELL:-DSTM32F437xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -47191,15 +47331,15 @@ target_compile_options(GENERIC_F437ZITX_serial_none INTERFACE ) add_library(GENERIC_F437ZITX_usb_CDC INTERFACE) target_compile_options(GENERIC_F437ZITX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F437ZITX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F437ZITX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F437ZITX_usb_HID INTERFACE) target_compile_options(GENERIC_F437ZITX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F437ZITX_usb_none INTERFACE) target_compile_options(GENERIC_F437ZITX_usb_none INTERFACE @@ -47228,7 +47368,7 @@ set(GENERIC_F437ZITX_hid_MCU cortex-m4) set(GENERIC_F437ZITX_hid_FPCONF "-") add_library(GENERIC_F437ZITX_hid INTERFACE) target_compile_options(GENERIC_F437ZITX_hid INTERFACE - "SHELL:-DSTM32F437xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F437xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -47270,7 +47410,7 @@ set(GENERIC_F439ZGTX_MCU cortex-m4) set(GENERIC_F439ZGTX_FPCONF "-") add_library(GENERIC_F439ZGTX INTERFACE) target_compile_options(GENERIC_F439ZGTX INTERFACE - "SHELL:-DSTM32F439xx " + "SHELL:-DSTM32F439xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -47315,15 +47455,15 @@ target_compile_options(GENERIC_F439ZGTX_serial_none INTERFACE ) add_library(GENERIC_F439ZGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F439ZGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F439ZGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F439ZGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F439ZGTX_usb_HID INTERFACE) target_compile_options(GENERIC_F439ZGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F439ZGTX_usb_none INTERFACE) target_compile_options(GENERIC_F439ZGTX_usb_none INTERFACE @@ -47352,7 +47492,7 @@ set(GENERIC_F439ZGTX_hid_MCU cortex-m4) set(GENERIC_F439ZGTX_hid_FPCONF "-") add_library(GENERIC_F439ZGTX_hid INTERFACE) target_compile_options(GENERIC_F439ZGTX_hid INTERFACE - "SHELL:-DSTM32F439xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F439xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -47394,7 +47534,7 @@ set(GENERIC_F439ZGYX_MCU cortex-m4) set(GENERIC_F439ZGYX_FPCONF "-") add_library(GENERIC_F439ZGYX INTERFACE) target_compile_options(GENERIC_F439ZGYX INTERFACE - "SHELL:-DSTM32F439xx " + "SHELL:-DSTM32F439xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -47439,15 +47579,15 @@ target_compile_options(GENERIC_F439ZGYX_serial_none INTERFACE ) add_library(GENERIC_F439ZGYX_usb_CDC INTERFACE) target_compile_options(GENERIC_F439ZGYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F439ZGYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F439ZGYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F439ZGYX_usb_HID INTERFACE) target_compile_options(GENERIC_F439ZGYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F439ZGYX_usb_none INTERFACE) target_compile_options(GENERIC_F439ZGYX_usb_none INTERFACE @@ -47476,7 +47616,7 @@ set(GENERIC_F439ZGYX_hid_MCU cortex-m4) set(GENERIC_F439ZGYX_hid_FPCONF "-") add_library(GENERIC_F439ZGYX_hid INTERFACE) target_compile_options(GENERIC_F439ZGYX_hid INTERFACE - "SHELL:-DSTM32F439xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F439xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -47518,7 +47658,7 @@ set(GENERIC_F439ZITX_MCU cortex-m4) set(GENERIC_F439ZITX_FPCONF "-") add_library(GENERIC_F439ZITX INTERFACE) target_compile_options(GENERIC_F439ZITX INTERFACE - "SHELL:-DSTM32F439xx " + "SHELL:-DSTM32F439xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -47563,15 +47703,15 @@ target_compile_options(GENERIC_F439ZITX_serial_none INTERFACE ) add_library(GENERIC_F439ZITX_usb_CDC INTERFACE) target_compile_options(GENERIC_F439ZITX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F439ZITX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F439ZITX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F439ZITX_usb_HID INTERFACE) target_compile_options(GENERIC_F439ZITX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F439ZITX_usb_none INTERFACE) target_compile_options(GENERIC_F439ZITX_usb_none INTERFACE @@ -47600,7 +47740,7 @@ set(GENERIC_F439ZITX_hid_MCU cortex-m4) set(GENERIC_F439ZITX_hid_FPCONF "-") add_library(GENERIC_F439ZITX_hid INTERFACE) target_compile_options(GENERIC_F439ZITX_hid INTERFACE - "SHELL:-DSTM32F439xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F439xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -47642,7 +47782,7 @@ set(GENERIC_F439ZIYX_MCU cortex-m4) set(GENERIC_F439ZIYX_FPCONF "-") add_library(GENERIC_F439ZIYX INTERFACE) target_compile_options(GENERIC_F439ZIYX INTERFACE - "SHELL:-DSTM32F439xx " + "SHELL:-DSTM32F439xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -47687,15 +47827,15 @@ target_compile_options(GENERIC_F439ZIYX_serial_none INTERFACE ) add_library(GENERIC_F439ZIYX_usb_CDC INTERFACE) target_compile_options(GENERIC_F439ZIYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F439ZIYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F439ZIYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F439ZIYX_usb_HID INTERFACE) target_compile_options(GENERIC_F439ZIYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F439ZIYX_usb_none INTERFACE) target_compile_options(GENERIC_F439ZIYX_usb_none INTERFACE @@ -47724,7 +47864,7 @@ set(GENERIC_F439ZIYX_hid_MCU cortex-m4) set(GENERIC_F439ZIYX_hid_FPCONF "-") add_library(GENERIC_F439ZIYX_hid INTERFACE) target_compile_options(GENERIC_F439ZIYX_hid INTERFACE - "SHELL:-DSTM32F439xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F439xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -47766,7 +47906,7 @@ set(GENERIC_F446RCTX_MCU cortex-m4) set(GENERIC_F446RCTX_FPCONF "-") add_library(GENERIC_F446RCTX INTERFACE) target_compile_options(GENERIC_F446RCTX INTERFACE - "SHELL:-DSTM32F446xx " + "SHELL:-DSTM32F446xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -47811,15 +47951,15 @@ target_compile_options(GENERIC_F446RCTX_serial_none INTERFACE ) add_library(GENERIC_F446RCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F446RCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F446RCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F446RCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F446RCTX_usb_HID INTERFACE) target_compile_options(GENERIC_F446RCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F446RCTX_usb_none INTERFACE) target_compile_options(GENERIC_F446RCTX_usb_none INTERFACE @@ -47848,7 +47988,7 @@ set(GENERIC_F446RCTX_hid_MCU cortex-m4) set(GENERIC_F446RCTX_hid_FPCONF "-") add_library(GENERIC_F446RCTX_hid INTERFACE) target_compile_options(GENERIC_F446RCTX_hid INTERFACE - "SHELL:-DSTM32F446xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F446xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -47890,7 +48030,7 @@ set(GENERIC_F446RETX_MCU cortex-m4) set(GENERIC_F446RETX_FPCONF "-") add_library(GENERIC_F446RETX INTERFACE) target_compile_options(GENERIC_F446RETX INTERFACE - "SHELL:-DSTM32F446xx " + "SHELL:-DSTM32F446xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -47935,15 +48075,15 @@ target_compile_options(GENERIC_F446RETX_serial_none INTERFACE ) add_library(GENERIC_F446RETX_usb_CDC INTERFACE) target_compile_options(GENERIC_F446RETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F446RETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F446RETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F446RETX_usb_HID INTERFACE) target_compile_options(GENERIC_F446RETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F446RETX_usb_none INTERFACE) target_compile_options(GENERIC_F446RETX_usb_none INTERFACE @@ -47972,7 +48112,7 @@ set(GENERIC_F446RETX_hid_MCU cortex-m4) set(GENERIC_F446RETX_hid_FPCONF "-") add_library(GENERIC_F446RETX_hid INTERFACE) target_compile_options(GENERIC_F446RETX_hid INTERFACE - "SHELL:-DSTM32F446xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F446xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -48014,7 +48154,7 @@ set(GENERIC_F446VCTX_MCU cortex-m4) set(GENERIC_F446VCTX_FPCONF "-") add_library(GENERIC_F446VCTX INTERFACE) target_compile_options(GENERIC_F446VCTX INTERFACE - "SHELL:-DSTM32F446xx " + "SHELL:-DSTM32F446xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -48059,15 +48199,15 @@ target_compile_options(GENERIC_F446VCTX_serial_none INTERFACE ) add_library(GENERIC_F446VCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F446VCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F446VCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F446VCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F446VCTX_usb_HID INTERFACE) target_compile_options(GENERIC_F446VCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F446VCTX_usb_none INTERFACE) target_compile_options(GENERIC_F446VCTX_usb_none INTERFACE @@ -48096,7 +48236,7 @@ set(GENERIC_F446VCTX_hid_MCU cortex-m4) set(GENERIC_F446VCTX_hid_FPCONF "-") add_library(GENERIC_F446VCTX_hid INTERFACE) target_compile_options(GENERIC_F446VCTX_hid INTERFACE - "SHELL:-DSTM32F446xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F446xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -48138,7 +48278,7 @@ set(GENERIC_F446VETX_MCU cortex-m4) set(GENERIC_F446VETX_FPCONF "-") add_library(GENERIC_F446VETX INTERFACE) target_compile_options(GENERIC_F446VETX INTERFACE - "SHELL:-DSTM32F446xx " + "SHELL:-DSTM32F446xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -48183,15 +48323,15 @@ target_compile_options(GENERIC_F446VETX_serial_none INTERFACE ) add_library(GENERIC_F446VETX_usb_CDC INTERFACE) target_compile_options(GENERIC_F446VETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F446VETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F446VETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F446VETX_usb_HID INTERFACE) target_compile_options(GENERIC_F446VETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F446VETX_usb_none INTERFACE) target_compile_options(GENERIC_F446VETX_usb_none INTERFACE @@ -48220,7 +48360,7 @@ set(GENERIC_F446VETX_hid_MCU cortex-m4) set(GENERIC_F446VETX_hid_FPCONF "-") add_library(GENERIC_F446VETX_hid INTERFACE) target_compile_options(GENERIC_F446VETX_hid INTERFACE - "SHELL:-DSTM32F446xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F446xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -48262,7 +48402,7 @@ set(GENERIC_F446ZCHX_MCU cortex-m4) set(GENERIC_F446ZCHX_FPCONF "-") add_library(GENERIC_F446ZCHX INTERFACE) target_compile_options(GENERIC_F446ZCHX INTERFACE - "SHELL:-DSTM32F446xx " + "SHELL:-DSTM32F446xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -48307,15 +48447,15 @@ target_compile_options(GENERIC_F446ZCHX_serial_none INTERFACE ) add_library(GENERIC_F446ZCHX_usb_CDC INTERFACE) target_compile_options(GENERIC_F446ZCHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F446ZCHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F446ZCHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F446ZCHX_usb_HID INTERFACE) target_compile_options(GENERIC_F446ZCHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F446ZCHX_usb_none INTERFACE) target_compile_options(GENERIC_F446ZCHX_usb_none INTERFACE @@ -48344,7 +48484,7 @@ set(GENERIC_F446ZCHX_hid_MCU cortex-m4) set(GENERIC_F446ZCHX_hid_FPCONF "-") add_library(GENERIC_F446ZCHX_hid INTERFACE) target_compile_options(GENERIC_F446ZCHX_hid INTERFACE - "SHELL:-DSTM32F446xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F446xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -48386,7 +48526,7 @@ set(GENERIC_F446ZCJX_MCU cortex-m4) set(GENERIC_F446ZCJX_FPCONF "-") add_library(GENERIC_F446ZCJX INTERFACE) target_compile_options(GENERIC_F446ZCJX INTERFACE - "SHELL:-DSTM32F446xx " + "SHELL:-DSTM32F446xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -48431,15 +48571,15 @@ target_compile_options(GENERIC_F446ZCJX_serial_none INTERFACE ) add_library(GENERIC_F446ZCJX_usb_CDC INTERFACE) target_compile_options(GENERIC_F446ZCJX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F446ZCJX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F446ZCJX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F446ZCJX_usb_HID INTERFACE) target_compile_options(GENERIC_F446ZCJX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F446ZCJX_usb_none INTERFACE) target_compile_options(GENERIC_F446ZCJX_usb_none INTERFACE @@ -48468,7 +48608,7 @@ set(GENERIC_F446ZCJX_hid_MCU cortex-m4) set(GENERIC_F446ZCJX_hid_FPCONF "-") add_library(GENERIC_F446ZCJX_hid INTERFACE) target_compile_options(GENERIC_F446ZCJX_hid INTERFACE - "SHELL:-DSTM32F446xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F446xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -48510,7 +48650,7 @@ set(GENERIC_F446ZCTX_MCU cortex-m4) set(GENERIC_F446ZCTX_FPCONF "-") add_library(GENERIC_F446ZCTX INTERFACE) target_compile_options(GENERIC_F446ZCTX INTERFACE - "SHELL:-DSTM32F446xx " + "SHELL:-DSTM32F446xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -48555,15 +48695,15 @@ target_compile_options(GENERIC_F446ZCTX_serial_none INTERFACE ) add_library(GENERIC_F446ZCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F446ZCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F446ZCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F446ZCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F446ZCTX_usb_HID INTERFACE) target_compile_options(GENERIC_F446ZCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F446ZCTX_usb_none INTERFACE) target_compile_options(GENERIC_F446ZCTX_usb_none INTERFACE @@ -48592,7 +48732,7 @@ set(GENERIC_F446ZCTX_hid_MCU cortex-m4) set(GENERIC_F446ZCTX_hid_FPCONF "-") add_library(GENERIC_F446ZCTX_hid INTERFACE) target_compile_options(GENERIC_F446ZCTX_hid INTERFACE - "SHELL:-DSTM32F446xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F446xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -48634,7 +48774,7 @@ set(GENERIC_F446ZEHX_MCU cortex-m4) set(GENERIC_F446ZEHX_FPCONF "-") add_library(GENERIC_F446ZEHX INTERFACE) target_compile_options(GENERIC_F446ZEHX INTERFACE - "SHELL:-DSTM32F446xx " + "SHELL:-DSTM32F446xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -48679,15 +48819,15 @@ target_compile_options(GENERIC_F446ZEHX_serial_none INTERFACE ) add_library(GENERIC_F446ZEHX_usb_CDC INTERFACE) target_compile_options(GENERIC_F446ZEHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F446ZEHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F446ZEHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F446ZEHX_usb_HID INTERFACE) target_compile_options(GENERIC_F446ZEHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F446ZEHX_usb_none INTERFACE) target_compile_options(GENERIC_F446ZEHX_usb_none INTERFACE @@ -48716,7 +48856,7 @@ set(GENERIC_F446ZEHX_hid_MCU cortex-m4) set(GENERIC_F446ZEHX_hid_FPCONF "-") add_library(GENERIC_F446ZEHX_hid INTERFACE) target_compile_options(GENERIC_F446ZEHX_hid INTERFACE - "SHELL:-DSTM32F446xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F446xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -48758,7 +48898,7 @@ set(GENERIC_F446ZEJX_MCU cortex-m4) set(GENERIC_F446ZEJX_FPCONF "-") add_library(GENERIC_F446ZEJX INTERFACE) target_compile_options(GENERIC_F446ZEJX INTERFACE - "SHELL:-DSTM32F446xx " + "SHELL:-DSTM32F446xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -48803,15 +48943,15 @@ target_compile_options(GENERIC_F446ZEJX_serial_none INTERFACE ) add_library(GENERIC_F446ZEJX_usb_CDC INTERFACE) target_compile_options(GENERIC_F446ZEJX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F446ZEJX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F446ZEJX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F446ZEJX_usb_HID INTERFACE) target_compile_options(GENERIC_F446ZEJX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F446ZEJX_usb_none INTERFACE) target_compile_options(GENERIC_F446ZEJX_usb_none INTERFACE @@ -48840,7 +48980,7 @@ set(GENERIC_F446ZEJX_hid_MCU cortex-m4) set(GENERIC_F446ZEJX_hid_FPCONF "-") add_library(GENERIC_F446ZEJX_hid INTERFACE) target_compile_options(GENERIC_F446ZEJX_hid INTERFACE - "SHELL:-DSTM32F446xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F446xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -48882,7 +49022,7 @@ set(GENERIC_F446ZETX_MCU cortex-m4) set(GENERIC_F446ZETX_FPCONF "-") add_library(GENERIC_F446ZETX INTERFACE) target_compile_options(GENERIC_F446ZETX INTERFACE - "SHELL:-DSTM32F446xx " + "SHELL:-DSTM32F446xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -48927,15 +49067,15 @@ target_compile_options(GENERIC_F446ZETX_serial_none INTERFACE ) add_library(GENERIC_F446ZETX_usb_CDC INTERFACE) target_compile_options(GENERIC_F446ZETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F446ZETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F446ZETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F446ZETX_usb_HID INTERFACE) target_compile_options(GENERIC_F446ZETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F446ZETX_usb_none INTERFACE) target_compile_options(GENERIC_F446ZETX_usb_none INTERFACE @@ -48964,7 +49104,7 @@ set(GENERIC_F446ZETX_hid_MCU cortex-m4) set(GENERIC_F446ZETX_hid_FPCONF "-") add_library(GENERIC_F446ZETX_hid INTERFACE) target_compile_options(GENERIC_F446ZETX_hid INTERFACE - "SHELL:-DSTM32F446xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F446xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -49006,7 +49146,7 @@ set(GENERIC_F722RCTX_MCU cortex-m7) set(GENERIC_F722RCTX_FPCONF "-") add_library(GENERIC_F722RCTX INTERFACE) target_compile_options(GENERIC_F722RCTX INTERFACE - "SHELL:-DSTM32F722xx " + "SHELL:-DSTM32F722xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -49051,15 +49191,15 @@ target_compile_options(GENERIC_F722RCTX_serial_none INTERFACE ) add_library(GENERIC_F722RCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F722RCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F722RCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F722RCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F722RCTX_usb_HID INTERFACE) target_compile_options(GENERIC_F722RCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F722RCTX_usb_none INTERFACE) target_compile_options(GENERIC_F722RCTX_usb_none INTERFACE @@ -49088,7 +49228,7 @@ set(GENERIC_F722RETX_MCU cortex-m7) set(GENERIC_F722RETX_FPCONF "-") add_library(GENERIC_F722RETX INTERFACE) target_compile_options(GENERIC_F722RETX INTERFACE - "SHELL:-DSTM32F722xx " + "SHELL:-DSTM32F722xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -49133,15 +49273,15 @@ target_compile_options(GENERIC_F722RETX_serial_none INTERFACE ) add_library(GENERIC_F722RETX_usb_CDC INTERFACE) target_compile_options(GENERIC_F722RETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F722RETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F722RETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F722RETX_usb_HID INTERFACE) target_compile_options(GENERIC_F722RETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F722RETX_usb_none INTERFACE) target_compile_options(GENERIC_F722RETX_usb_none INTERFACE @@ -49170,7 +49310,7 @@ set(GENERIC_F722ZCTX_MCU cortex-m7) set(GENERIC_F722ZCTX_FPCONF "-") add_library(GENERIC_F722ZCTX INTERFACE) target_compile_options(GENERIC_F722ZCTX INTERFACE - "SHELL:-DSTM32F722xx " + "SHELL:-DSTM32F722xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -49215,15 +49355,15 @@ target_compile_options(GENERIC_F722ZCTX_serial_none INTERFACE ) add_library(GENERIC_F722ZCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F722ZCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F722ZCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F722ZCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F722ZCTX_usb_HID INTERFACE) target_compile_options(GENERIC_F722ZCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F722ZCTX_usb_none INTERFACE) target_compile_options(GENERIC_F722ZCTX_usb_none INTERFACE @@ -49252,7 +49392,7 @@ set(GENERIC_F722ZETX_MCU cortex-m7) set(GENERIC_F722ZETX_FPCONF "-") add_library(GENERIC_F722ZETX INTERFACE) target_compile_options(GENERIC_F722ZETX INTERFACE - "SHELL:-DSTM32F722xx " + "SHELL:-DSTM32F722xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -49297,15 +49437,15 @@ target_compile_options(GENERIC_F722ZETX_serial_none INTERFACE ) add_library(GENERIC_F722ZETX_usb_CDC INTERFACE) target_compile_options(GENERIC_F722ZETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F722ZETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F722ZETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F722ZETX_usb_HID INTERFACE) target_compile_options(GENERIC_F722ZETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F722ZETX_usb_none INTERFACE) target_compile_options(GENERIC_F722ZETX_usb_none INTERFACE @@ -49334,7 +49474,7 @@ set(GENERIC_F723ICKX_MCU cortex-m7) set(GENERIC_F723ICKX_FPCONF "-") add_library(GENERIC_F723ICKX INTERFACE) target_compile_options(GENERIC_F723ICKX INTERFACE - "SHELL:-DSTM32F723xx " + "SHELL:-DSTM32F723xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -49379,15 +49519,15 @@ target_compile_options(GENERIC_F723ICKX_serial_none INTERFACE ) add_library(GENERIC_F723ICKX_usb_CDC INTERFACE) target_compile_options(GENERIC_F723ICKX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F723ICKX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F723ICKX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F723ICKX_usb_HID INTERFACE) target_compile_options(GENERIC_F723ICKX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F723ICKX_usb_none INTERFACE) target_compile_options(GENERIC_F723ICKX_usb_none INTERFACE @@ -49416,7 +49556,7 @@ set(GENERIC_F723ICTX_MCU cortex-m7) set(GENERIC_F723ICTX_FPCONF "-") add_library(GENERIC_F723ICTX INTERFACE) target_compile_options(GENERIC_F723ICTX INTERFACE - "SHELL:-DSTM32F723xx " + "SHELL:-DSTM32F723xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -49461,15 +49601,15 @@ target_compile_options(GENERIC_F723ICTX_serial_none INTERFACE ) add_library(GENERIC_F723ICTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F723ICTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F723ICTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F723ICTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F723ICTX_usb_HID INTERFACE) target_compile_options(GENERIC_F723ICTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F723ICTX_usb_none INTERFACE) target_compile_options(GENERIC_F723ICTX_usb_none INTERFACE @@ -49498,7 +49638,7 @@ set(GENERIC_F723IEKX_MCU cortex-m7) set(GENERIC_F723IEKX_FPCONF "-") add_library(GENERIC_F723IEKX INTERFACE) target_compile_options(GENERIC_F723IEKX INTERFACE - "SHELL:-DSTM32F723xx " + "SHELL:-DSTM32F723xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -49543,15 +49683,15 @@ target_compile_options(GENERIC_F723IEKX_serial_none INTERFACE ) add_library(GENERIC_F723IEKX_usb_CDC INTERFACE) target_compile_options(GENERIC_F723IEKX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F723IEKX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F723IEKX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F723IEKX_usb_HID INTERFACE) target_compile_options(GENERIC_F723IEKX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F723IEKX_usb_none INTERFACE) target_compile_options(GENERIC_F723IEKX_usb_none INTERFACE @@ -49580,7 +49720,7 @@ set(GENERIC_F723IETX_MCU cortex-m7) set(GENERIC_F723IETX_FPCONF "-") add_library(GENERIC_F723IETX INTERFACE) target_compile_options(GENERIC_F723IETX INTERFACE - "SHELL:-DSTM32F723xx " + "SHELL:-DSTM32F723xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -49625,15 +49765,15 @@ target_compile_options(GENERIC_F723IETX_serial_none INTERFACE ) add_library(GENERIC_F723IETX_usb_CDC INTERFACE) target_compile_options(GENERIC_F723IETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F723IETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F723IETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F723IETX_usb_HID INTERFACE) target_compile_options(GENERIC_F723IETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F723IETX_usb_none INTERFACE) target_compile_options(GENERIC_F723IETX_usb_none INTERFACE @@ -49662,7 +49802,7 @@ set(GENERIC_F730I8KX_MCU cortex-m7) set(GENERIC_F730I8KX_FPCONF "-") add_library(GENERIC_F730I8KX INTERFACE) target_compile_options(GENERIC_F730I8KX INTERFACE - "SHELL:-DSTM32F730xx " + "SHELL:-DSTM32F730xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -49707,15 +49847,15 @@ target_compile_options(GENERIC_F730I8KX_serial_none INTERFACE ) add_library(GENERIC_F730I8KX_usb_CDC INTERFACE) target_compile_options(GENERIC_F730I8KX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F730I8KX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F730I8KX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F730I8KX_usb_HID INTERFACE) target_compile_options(GENERIC_F730I8KX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F730I8KX_usb_none INTERFACE) target_compile_options(GENERIC_F730I8KX_usb_none INTERFACE @@ -49744,7 +49884,7 @@ set(GENERIC_F730R8TX_MCU cortex-m7) set(GENERIC_F730R8TX_FPCONF "-") add_library(GENERIC_F730R8TX INTERFACE) target_compile_options(GENERIC_F730R8TX INTERFACE - "SHELL:-DSTM32F730xx " + "SHELL:-DSTM32F730xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -49789,15 +49929,15 @@ target_compile_options(GENERIC_F730R8TX_serial_none INTERFACE ) add_library(GENERIC_F730R8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F730R8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F730R8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F730R8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F730R8TX_usb_HID INTERFACE) target_compile_options(GENERIC_F730R8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F730R8TX_usb_none INTERFACE) target_compile_options(GENERIC_F730R8TX_usb_none INTERFACE @@ -49826,7 +49966,7 @@ set(GENERIC_F732RETX_MCU cortex-m7) set(GENERIC_F732RETX_FPCONF "-") add_library(GENERIC_F732RETX INTERFACE) target_compile_options(GENERIC_F732RETX INTERFACE - "SHELL:-DSTM32F732xx " + "SHELL:-DSTM32F732xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -49871,15 +50011,15 @@ target_compile_options(GENERIC_F732RETX_serial_none INTERFACE ) add_library(GENERIC_F732RETX_usb_CDC INTERFACE) target_compile_options(GENERIC_F732RETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F732RETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F732RETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F732RETX_usb_HID INTERFACE) target_compile_options(GENERIC_F732RETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F732RETX_usb_none INTERFACE) target_compile_options(GENERIC_F732RETX_usb_none INTERFACE @@ -49908,7 +50048,7 @@ set(GENERIC_F732ZETX_MCU cortex-m7) set(GENERIC_F732ZETX_FPCONF "-") add_library(GENERIC_F732ZETX INTERFACE) target_compile_options(GENERIC_F732ZETX INTERFACE - "SHELL:-DSTM32F732xx " + "SHELL:-DSTM32F732xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -49953,15 +50093,15 @@ target_compile_options(GENERIC_F732ZETX_serial_none INTERFACE ) add_library(GENERIC_F732ZETX_usb_CDC INTERFACE) target_compile_options(GENERIC_F732ZETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F732ZETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F732ZETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F732ZETX_usb_HID INTERFACE) target_compile_options(GENERIC_F732ZETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F732ZETX_usb_none INTERFACE) target_compile_options(GENERIC_F732ZETX_usb_none INTERFACE @@ -49990,7 +50130,7 @@ set(GENERIC_F733IEKX_MCU cortex-m7) set(GENERIC_F733IEKX_FPCONF "-") add_library(GENERIC_F733IEKX INTERFACE) target_compile_options(GENERIC_F733IEKX INTERFACE - "SHELL:-DSTM32F733xx " + "SHELL:-DSTM32F733xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -50035,15 +50175,15 @@ target_compile_options(GENERIC_F733IEKX_serial_none INTERFACE ) add_library(GENERIC_F733IEKX_usb_CDC INTERFACE) target_compile_options(GENERIC_F733IEKX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F733IEKX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F733IEKX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F733IEKX_usb_HID INTERFACE) target_compile_options(GENERIC_F733IEKX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F733IEKX_usb_none INTERFACE) target_compile_options(GENERIC_F733IEKX_usb_none INTERFACE @@ -50072,7 +50212,7 @@ set(GENERIC_F733IETX_MCU cortex-m7) set(GENERIC_F733IETX_FPCONF "-") add_library(GENERIC_F733IETX INTERFACE) target_compile_options(GENERIC_F733IETX INTERFACE - "SHELL:-DSTM32F733xx " + "SHELL:-DSTM32F733xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -50117,15 +50257,15 @@ target_compile_options(GENERIC_F733IETX_serial_none INTERFACE ) add_library(GENERIC_F733IETX_usb_CDC INTERFACE) target_compile_options(GENERIC_F733IETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F733IETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F733IETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F733IETX_usb_HID INTERFACE) target_compile_options(GENERIC_F733IETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F733IETX_usb_none INTERFACE) target_compile_options(GENERIC_F733IETX_usb_none INTERFACE @@ -50154,7 +50294,7 @@ set(GENERIC_F745ZETX_MCU cortex-m7) set(GENERIC_F745ZETX_FPCONF "-") add_library(GENERIC_F745ZETX INTERFACE) target_compile_options(GENERIC_F745ZETX INTERFACE - "SHELL:-DSTM32F745xx " + "SHELL:-DSTM32F745xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -50199,15 +50339,15 @@ target_compile_options(GENERIC_F745ZETX_serial_none INTERFACE ) add_library(GENERIC_F745ZETX_usb_CDC INTERFACE) target_compile_options(GENERIC_F745ZETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F745ZETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F745ZETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F745ZETX_usb_HID INTERFACE) target_compile_options(GENERIC_F745ZETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F745ZETX_usb_none INTERFACE) target_compile_options(GENERIC_F745ZETX_usb_none INTERFACE @@ -50236,7 +50376,7 @@ set(GENERIC_F745ZGTX_MCU cortex-m7) set(GENERIC_F745ZGTX_FPCONF "-") add_library(GENERIC_F745ZGTX INTERFACE) target_compile_options(GENERIC_F745ZGTX INTERFACE - "SHELL:-DSTM32F745xx " + "SHELL:-DSTM32F745xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -50281,15 +50421,15 @@ target_compile_options(GENERIC_F745ZGTX_serial_none INTERFACE ) add_library(GENERIC_F745ZGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F745ZGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F745ZGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F745ZGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F745ZGTX_usb_HID INTERFACE) target_compile_options(GENERIC_F745ZGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F745ZGTX_usb_none INTERFACE) target_compile_options(GENERIC_F745ZGTX_usb_none INTERFACE @@ -50318,7 +50458,7 @@ set(GENERIC_F746BETX_MCU cortex-m7) set(GENERIC_F746BETX_FPCONF "-") add_library(GENERIC_F746BETX INTERFACE) target_compile_options(GENERIC_F746BETX INTERFACE - "SHELL:-DSTM32F746xx " + "SHELL:-DSTM32F746xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -50363,15 +50503,15 @@ target_compile_options(GENERIC_F746BETX_serial_none INTERFACE ) add_library(GENERIC_F746BETX_usb_CDC INTERFACE) target_compile_options(GENERIC_F746BETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F746BETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F746BETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F746BETX_usb_HID INTERFACE) target_compile_options(GENERIC_F746BETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F746BETX_usb_none INTERFACE) target_compile_options(GENERIC_F746BETX_usb_none INTERFACE @@ -50400,7 +50540,7 @@ set(GENERIC_F746BGTX_MCU cortex-m7) set(GENERIC_F746BGTX_FPCONF "-") add_library(GENERIC_F746BGTX INTERFACE) target_compile_options(GENERIC_F746BGTX INTERFACE - "SHELL:-DSTM32F746xx " + "SHELL:-DSTM32F746xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -50445,15 +50585,15 @@ target_compile_options(GENERIC_F746BGTX_serial_none INTERFACE ) add_library(GENERIC_F746BGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F746BGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F746BGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F746BGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F746BGTX_usb_HID INTERFACE) target_compile_options(GENERIC_F746BGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F746BGTX_usb_none INTERFACE) target_compile_options(GENERIC_F746BGTX_usb_none INTERFACE @@ -50482,7 +50622,7 @@ set(GENERIC_F746NEHX_MCU cortex-m7) set(GENERIC_F746NEHX_FPCONF "-") add_library(GENERIC_F746NEHX INTERFACE) target_compile_options(GENERIC_F746NEHX INTERFACE - "SHELL:-DSTM32F746xx " + "SHELL:-DSTM32F746xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -50527,15 +50667,15 @@ target_compile_options(GENERIC_F746NEHX_serial_none INTERFACE ) add_library(GENERIC_F746NEHX_usb_CDC INTERFACE) target_compile_options(GENERIC_F746NEHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F746NEHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F746NEHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F746NEHX_usb_HID INTERFACE) target_compile_options(GENERIC_F746NEHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F746NEHX_usb_none INTERFACE) target_compile_options(GENERIC_F746NEHX_usb_none INTERFACE @@ -50564,7 +50704,7 @@ set(GENERIC_F746NGHX_MCU cortex-m7) set(GENERIC_F746NGHX_FPCONF "-") add_library(GENERIC_F746NGHX INTERFACE) target_compile_options(GENERIC_F746NGHX INTERFACE - "SHELL:-DSTM32F746xx " + "SHELL:-DSTM32F746xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -50609,15 +50749,15 @@ target_compile_options(GENERIC_F746NGHX_serial_none INTERFACE ) add_library(GENERIC_F746NGHX_usb_CDC INTERFACE) target_compile_options(GENERIC_F746NGHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F746NGHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F746NGHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F746NGHX_usb_HID INTERFACE) target_compile_options(GENERIC_F746NGHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F746NGHX_usb_none INTERFACE) target_compile_options(GENERIC_F746NGHX_usb_none INTERFACE @@ -50646,7 +50786,7 @@ set(GENERIC_F746ZETX_MCU cortex-m7) set(GENERIC_F746ZETX_FPCONF "-") add_library(GENERIC_F746ZETX INTERFACE) target_compile_options(GENERIC_F746ZETX INTERFACE - "SHELL:-DSTM32F746xx " + "SHELL:-DSTM32F746xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -50691,15 +50831,15 @@ target_compile_options(GENERIC_F746ZETX_serial_none INTERFACE ) add_library(GENERIC_F746ZETX_usb_CDC INTERFACE) target_compile_options(GENERIC_F746ZETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F746ZETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F746ZETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F746ZETX_usb_HID INTERFACE) target_compile_options(GENERIC_F746ZETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F746ZETX_usb_none INTERFACE) target_compile_options(GENERIC_F746ZETX_usb_none INTERFACE @@ -50728,7 +50868,7 @@ set(GENERIC_F746ZEYX_MCU cortex-m7) set(GENERIC_F746ZEYX_FPCONF "-") add_library(GENERIC_F746ZEYX INTERFACE) target_compile_options(GENERIC_F746ZEYX INTERFACE - "SHELL:-DSTM32F746xx " + "SHELL:-DSTM32F746xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -50773,15 +50913,15 @@ target_compile_options(GENERIC_F746ZEYX_serial_none INTERFACE ) add_library(GENERIC_F746ZEYX_usb_CDC INTERFACE) target_compile_options(GENERIC_F746ZEYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F746ZEYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F746ZEYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F746ZEYX_usb_HID INTERFACE) target_compile_options(GENERIC_F746ZEYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F746ZEYX_usb_none INTERFACE) target_compile_options(GENERIC_F746ZEYX_usb_none INTERFACE @@ -50810,7 +50950,7 @@ set(GENERIC_F746ZGTX_MCU cortex-m7) set(GENERIC_F746ZGTX_FPCONF "-") add_library(GENERIC_F746ZGTX INTERFACE) target_compile_options(GENERIC_F746ZGTX INTERFACE - "SHELL:-DSTM32F746xx " + "SHELL:-DSTM32F746xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -50855,15 +50995,15 @@ target_compile_options(GENERIC_F746ZGTX_serial_none INTERFACE ) add_library(GENERIC_F746ZGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F746ZGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F746ZGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F746ZGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F746ZGTX_usb_HID INTERFACE) target_compile_options(GENERIC_F746ZGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F746ZGTX_usb_none INTERFACE) target_compile_options(GENERIC_F746ZGTX_usb_none INTERFACE @@ -50892,7 +51032,7 @@ set(GENERIC_F746ZGYX_MCU cortex-m7) set(GENERIC_F746ZGYX_FPCONF "-") add_library(GENERIC_F746ZGYX INTERFACE) target_compile_options(GENERIC_F746ZGYX INTERFACE - "SHELL:-DSTM32F746xx " + "SHELL:-DSTM32F746xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -50937,15 +51077,15 @@ target_compile_options(GENERIC_F746ZGYX_serial_none INTERFACE ) add_library(GENERIC_F746ZGYX_usb_CDC INTERFACE) target_compile_options(GENERIC_F746ZGYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F746ZGYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F746ZGYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F746ZGYX_usb_HID INTERFACE) target_compile_options(GENERIC_F746ZGYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F746ZGYX_usb_none INTERFACE) target_compile_options(GENERIC_F746ZGYX_usb_none INTERFACE @@ -50974,7 +51114,7 @@ set(GENERIC_F750N8HX_MCU cortex-m7) set(GENERIC_F750N8HX_FPCONF "-") add_library(GENERIC_F750N8HX INTERFACE) target_compile_options(GENERIC_F750N8HX INTERFACE - "SHELL:-DSTM32F750xx " + "SHELL:-DSTM32F750xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -51019,15 +51159,15 @@ target_compile_options(GENERIC_F750N8HX_serial_none INTERFACE ) add_library(GENERIC_F750N8HX_usb_CDC INTERFACE) target_compile_options(GENERIC_F750N8HX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F750N8HX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F750N8HX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F750N8HX_usb_HID INTERFACE) target_compile_options(GENERIC_F750N8HX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F750N8HX_usb_none INTERFACE) target_compile_options(GENERIC_F750N8HX_usb_none INTERFACE @@ -51056,7 +51196,7 @@ set(GENERIC_F750Z8TX_MCU cortex-m7) set(GENERIC_F750Z8TX_FPCONF "-") add_library(GENERIC_F750Z8TX INTERFACE) target_compile_options(GENERIC_F750Z8TX INTERFACE - "SHELL:-DSTM32F750xx " + "SHELL:-DSTM32F750xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -51101,15 +51241,15 @@ target_compile_options(GENERIC_F750Z8TX_serial_none INTERFACE ) add_library(GENERIC_F750Z8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_F750Z8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F750Z8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F750Z8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F750Z8TX_usb_HID INTERFACE) target_compile_options(GENERIC_F750Z8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F750Z8TX_usb_none INTERFACE) target_compile_options(GENERIC_F750Z8TX_usb_none INTERFACE @@ -51138,7 +51278,7 @@ set(GENERIC_F756BGTX_MCU cortex-m7) set(GENERIC_F756BGTX_FPCONF "-") add_library(GENERIC_F756BGTX INTERFACE) target_compile_options(GENERIC_F756BGTX INTERFACE - "SHELL:-DSTM32F756xx " + "SHELL:-DSTM32F756xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -51183,15 +51323,15 @@ target_compile_options(GENERIC_F756BGTX_serial_none INTERFACE ) add_library(GENERIC_F756BGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F756BGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F756BGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F756BGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F756BGTX_usb_HID INTERFACE) target_compile_options(GENERIC_F756BGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F756BGTX_usb_none INTERFACE) target_compile_options(GENERIC_F756BGTX_usb_none INTERFACE @@ -51220,7 +51360,7 @@ set(GENERIC_F756NGHX_MCU cortex-m7) set(GENERIC_F756NGHX_FPCONF "-") add_library(GENERIC_F756NGHX INTERFACE) target_compile_options(GENERIC_F756NGHX INTERFACE - "SHELL:-DSTM32F756xx " + "SHELL:-DSTM32F756xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -51265,15 +51405,15 @@ target_compile_options(GENERIC_F756NGHX_serial_none INTERFACE ) add_library(GENERIC_F756NGHX_usb_CDC INTERFACE) target_compile_options(GENERIC_F756NGHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F756NGHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F756NGHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F756NGHX_usb_HID INTERFACE) target_compile_options(GENERIC_F756NGHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F756NGHX_usb_none INTERFACE) target_compile_options(GENERIC_F756NGHX_usb_none INTERFACE @@ -51302,7 +51442,7 @@ set(GENERIC_F756ZGTX_MCU cortex-m7) set(GENERIC_F756ZGTX_FPCONF "-") add_library(GENERIC_F756ZGTX INTERFACE) target_compile_options(GENERIC_F756ZGTX INTERFACE - "SHELL:-DSTM32F756xx " + "SHELL:-DSTM32F756xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -51347,15 +51487,15 @@ target_compile_options(GENERIC_F756ZGTX_serial_none INTERFACE ) add_library(GENERIC_F756ZGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F756ZGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F756ZGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F756ZGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F756ZGTX_usb_HID INTERFACE) target_compile_options(GENERIC_F756ZGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F756ZGTX_usb_none INTERFACE) target_compile_options(GENERIC_F756ZGTX_usb_none INTERFACE @@ -51384,7 +51524,7 @@ set(GENERIC_F756ZGYX_MCU cortex-m7) set(GENERIC_F756ZGYX_FPCONF "-") add_library(GENERIC_F756ZGYX INTERFACE) target_compile_options(GENERIC_F756ZGYX INTERFACE - "SHELL:-DSTM32F756xx " + "SHELL:-DSTM32F756xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -51429,15 +51569,15 @@ target_compile_options(GENERIC_F756ZGYX_serial_none INTERFACE ) add_library(GENERIC_F756ZGYX_usb_CDC INTERFACE) target_compile_options(GENERIC_F756ZGYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F756ZGYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F756ZGYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F756ZGYX_usb_HID INTERFACE) target_compile_options(GENERIC_F756ZGYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F756ZGYX_usb_none INTERFACE) target_compile_options(GENERIC_F756ZGYX_usb_none INTERFACE @@ -51466,7 +51606,7 @@ set(GENERIC_F765IGKX_MCU cortex-m7) set(GENERIC_F765IGKX_FPCONF "-") add_library(GENERIC_F765IGKX INTERFACE) target_compile_options(GENERIC_F765IGKX INTERFACE - "SHELL:-DSTM32F765xx " + "SHELL:-DSTM32F765xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -51511,15 +51651,15 @@ target_compile_options(GENERIC_F765IGKX_serial_none INTERFACE ) add_library(GENERIC_F765IGKX_usb_CDC INTERFACE) target_compile_options(GENERIC_F765IGKX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F765IGKX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F765IGKX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F765IGKX_usb_HID INTERFACE) target_compile_options(GENERIC_F765IGKX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F765IGKX_usb_none INTERFACE) target_compile_options(GENERIC_F765IGKX_usb_none INTERFACE @@ -51548,7 +51688,7 @@ set(GENERIC_F765IGTX_MCU cortex-m7) set(GENERIC_F765IGTX_FPCONF "-") add_library(GENERIC_F765IGTX INTERFACE) target_compile_options(GENERIC_F765IGTX INTERFACE - "SHELL:-DSTM32F765xx " + "SHELL:-DSTM32F765xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -51593,15 +51733,15 @@ target_compile_options(GENERIC_F765IGTX_serial_none INTERFACE ) add_library(GENERIC_F765IGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F765IGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F765IGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F765IGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F765IGTX_usb_HID INTERFACE) target_compile_options(GENERIC_F765IGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F765IGTX_usb_none INTERFACE) target_compile_options(GENERIC_F765IGTX_usb_none INTERFACE @@ -51630,7 +51770,7 @@ set(GENERIC_F765IIKX_MCU cortex-m7) set(GENERIC_F765IIKX_FPCONF "-") add_library(GENERIC_F765IIKX INTERFACE) target_compile_options(GENERIC_F765IIKX INTERFACE - "SHELL:-DSTM32F765xx " + "SHELL:-DSTM32F765xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -51675,15 +51815,15 @@ target_compile_options(GENERIC_F765IIKX_serial_none INTERFACE ) add_library(GENERIC_F765IIKX_usb_CDC INTERFACE) target_compile_options(GENERIC_F765IIKX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F765IIKX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F765IIKX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F765IIKX_usb_HID INTERFACE) target_compile_options(GENERIC_F765IIKX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F765IIKX_usb_none INTERFACE) target_compile_options(GENERIC_F765IIKX_usb_none INTERFACE @@ -51712,7 +51852,7 @@ set(GENERIC_F765IITX_MCU cortex-m7) set(GENERIC_F765IITX_FPCONF "-") add_library(GENERIC_F765IITX INTERFACE) target_compile_options(GENERIC_F765IITX INTERFACE - "SHELL:-DSTM32F765xx " + "SHELL:-DSTM32F765xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -51757,15 +51897,15 @@ target_compile_options(GENERIC_F765IITX_serial_none INTERFACE ) add_library(GENERIC_F765IITX_usb_CDC INTERFACE) target_compile_options(GENERIC_F765IITX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F765IITX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F765IITX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F765IITX_usb_HID INTERFACE) target_compile_options(GENERIC_F765IITX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F765IITX_usb_none INTERFACE) target_compile_options(GENERIC_F765IITX_usb_none INTERFACE @@ -51794,7 +51934,7 @@ set(GENERIC_F765VGHX_MCU cortex-m7) set(GENERIC_F765VGHX_FPCONF "-") add_library(GENERIC_F765VGHX INTERFACE) target_compile_options(GENERIC_F765VGHX INTERFACE - "SHELL:-DSTM32F765xx " + "SHELL:-DSTM32F765xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -51839,15 +51979,15 @@ target_compile_options(GENERIC_F765VGHX_serial_none INTERFACE ) add_library(GENERIC_F765VGHX_usb_CDC INTERFACE) target_compile_options(GENERIC_F765VGHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F765VGHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F765VGHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F765VGHX_usb_HID INTERFACE) target_compile_options(GENERIC_F765VGHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F765VGHX_usb_none INTERFACE) target_compile_options(GENERIC_F765VGHX_usb_none INTERFACE @@ -51876,7 +52016,7 @@ set(GENERIC_F765VGTX_MCU cortex-m7) set(GENERIC_F765VGTX_FPCONF "-") add_library(GENERIC_F765VGTX INTERFACE) target_compile_options(GENERIC_F765VGTX INTERFACE - "SHELL:-DSTM32F765xx " + "SHELL:-DSTM32F765xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -51921,15 +52061,15 @@ target_compile_options(GENERIC_F765VGTX_serial_none INTERFACE ) add_library(GENERIC_F765VGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F765VGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F765VGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F765VGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F765VGTX_usb_HID INTERFACE) target_compile_options(GENERIC_F765VGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F765VGTX_usb_none INTERFACE) target_compile_options(GENERIC_F765VGTX_usb_none INTERFACE @@ -51958,7 +52098,7 @@ set(GENERIC_F765VIHX_MCU cortex-m7) set(GENERIC_F765VIHX_FPCONF "-") add_library(GENERIC_F765VIHX INTERFACE) target_compile_options(GENERIC_F765VIHX INTERFACE - "SHELL:-DSTM32F765xx " + "SHELL:-DSTM32F765xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -52003,15 +52143,15 @@ target_compile_options(GENERIC_F765VIHX_serial_none INTERFACE ) add_library(GENERIC_F765VIHX_usb_CDC INTERFACE) target_compile_options(GENERIC_F765VIHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F765VIHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F765VIHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F765VIHX_usb_HID INTERFACE) target_compile_options(GENERIC_F765VIHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F765VIHX_usb_none INTERFACE) target_compile_options(GENERIC_F765VIHX_usb_none INTERFACE @@ -52040,7 +52180,7 @@ set(GENERIC_F765VITX_MCU cortex-m7) set(GENERIC_F765VITX_FPCONF "-") add_library(GENERIC_F765VITX INTERFACE) target_compile_options(GENERIC_F765VITX INTERFACE - "SHELL:-DSTM32F765xx " + "SHELL:-DSTM32F765xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -52085,15 +52225,15 @@ target_compile_options(GENERIC_F765VITX_serial_none INTERFACE ) add_library(GENERIC_F765VITX_usb_CDC INTERFACE) target_compile_options(GENERIC_F765VITX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F765VITX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F765VITX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F765VITX_usb_HID INTERFACE) target_compile_options(GENERIC_F765VITX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F765VITX_usb_none INTERFACE) target_compile_options(GENERIC_F765VITX_usb_none INTERFACE @@ -52122,7 +52262,7 @@ set(GENERIC_F765ZGTX_MCU cortex-m7) set(GENERIC_F765ZGTX_FPCONF "-") add_library(GENERIC_F765ZGTX INTERFACE) target_compile_options(GENERIC_F765ZGTX INTERFACE - "SHELL:-DSTM32F765xx " + "SHELL:-DSTM32F765xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -52167,15 +52307,15 @@ target_compile_options(GENERIC_F765ZGTX_serial_none INTERFACE ) add_library(GENERIC_F765ZGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F765ZGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F765ZGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F765ZGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F765ZGTX_usb_HID INTERFACE) target_compile_options(GENERIC_F765ZGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F765ZGTX_usb_none INTERFACE) target_compile_options(GENERIC_F765ZGTX_usb_none INTERFACE @@ -52204,7 +52344,7 @@ set(GENERIC_F765ZITX_MCU cortex-m7) set(GENERIC_F765ZITX_FPCONF "-") add_library(GENERIC_F765ZITX INTERFACE) target_compile_options(GENERIC_F765ZITX INTERFACE - "SHELL:-DSTM32F765xx " + "SHELL:-DSTM32F765xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -52249,15 +52389,15 @@ target_compile_options(GENERIC_F765ZITX_serial_none INTERFACE ) add_library(GENERIC_F765ZITX_usb_CDC INTERFACE) target_compile_options(GENERIC_F765ZITX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F765ZITX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F765ZITX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F765ZITX_usb_HID INTERFACE) target_compile_options(GENERIC_F765ZITX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F765ZITX_usb_none INTERFACE) target_compile_options(GENERIC_F765ZITX_usb_none INTERFACE @@ -52286,7 +52426,7 @@ set(GENERIC_F767IGKX_MCU cortex-m7) set(GENERIC_F767IGKX_FPCONF "-") add_library(GENERIC_F767IGKX INTERFACE) target_compile_options(GENERIC_F767IGKX INTERFACE - "SHELL:-DSTM32F767xx " + "SHELL:-DSTM32F767xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -52331,15 +52471,15 @@ target_compile_options(GENERIC_F767IGKX_serial_none INTERFACE ) add_library(GENERIC_F767IGKX_usb_CDC INTERFACE) target_compile_options(GENERIC_F767IGKX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F767IGKX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F767IGKX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F767IGKX_usb_HID INTERFACE) target_compile_options(GENERIC_F767IGKX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F767IGKX_usb_none INTERFACE) target_compile_options(GENERIC_F767IGKX_usb_none INTERFACE @@ -52368,7 +52508,7 @@ set(GENERIC_F767IGTX_MCU cortex-m7) set(GENERIC_F767IGTX_FPCONF "-") add_library(GENERIC_F767IGTX INTERFACE) target_compile_options(GENERIC_F767IGTX INTERFACE - "SHELL:-DSTM32F767xx " + "SHELL:-DSTM32F767xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -52413,15 +52553,15 @@ target_compile_options(GENERIC_F767IGTX_serial_none INTERFACE ) add_library(GENERIC_F767IGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F767IGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F767IGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F767IGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F767IGTX_usb_HID INTERFACE) target_compile_options(GENERIC_F767IGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F767IGTX_usb_none INTERFACE) target_compile_options(GENERIC_F767IGTX_usb_none INTERFACE @@ -52450,7 +52590,7 @@ set(GENERIC_F767IIKX_MCU cortex-m7) set(GENERIC_F767IIKX_FPCONF "-") add_library(GENERIC_F767IIKX INTERFACE) target_compile_options(GENERIC_F767IIKX INTERFACE - "SHELL:-DSTM32F767xx " + "SHELL:-DSTM32F767xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -52495,15 +52635,15 @@ target_compile_options(GENERIC_F767IIKX_serial_none INTERFACE ) add_library(GENERIC_F767IIKX_usb_CDC INTERFACE) target_compile_options(GENERIC_F767IIKX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F767IIKX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F767IIKX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F767IIKX_usb_HID INTERFACE) target_compile_options(GENERIC_F767IIKX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F767IIKX_usb_none INTERFACE) target_compile_options(GENERIC_F767IIKX_usb_none INTERFACE @@ -52532,7 +52672,7 @@ set(GENERIC_F767IITX_MCU cortex-m7) set(GENERIC_F767IITX_FPCONF "-") add_library(GENERIC_F767IITX INTERFACE) target_compile_options(GENERIC_F767IITX INTERFACE - "SHELL:-DSTM32F767xx " + "SHELL:-DSTM32F767xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -52577,15 +52717,15 @@ target_compile_options(GENERIC_F767IITX_serial_none INTERFACE ) add_library(GENERIC_F767IITX_usb_CDC INTERFACE) target_compile_options(GENERIC_F767IITX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F767IITX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F767IITX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F767IITX_usb_HID INTERFACE) target_compile_options(GENERIC_F767IITX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F767IITX_usb_none INTERFACE) target_compile_options(GENERIC_F767IITX_usb_none INTERFACE @@ -52614,7 +52754,7 @@ set(GENERIC_F767VGHX_MCU cortex-m7) set(GENERIC_F767VGHX_FPCONF "-") add_library(GENERIC_F767VGHX INTERFACE) target_compile_options(GENERIC_F767VGHX INTERFACE - "SHELL:-DSTM32F767xx " + "SHELL:-DSTM32F767xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -52659,15 +52799,15 @@ target_compile_options(GENERIC_F767VGHX_serial_none INTERFACE ) add_library(GENERIC_F767VGHX_usb_CDC INTERFACE) target_compile_options(GENERIC_F767VGHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F767VGHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F767VGHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F767VGHX_usb_HID INTERFACE) target_compile_options(GENERIC_F767VGHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F767VGHX_usb_none INTERFACE) target_compile_options(GENERIC_F767VGHX_usb_none INTERFACE @@ -52696,7 +52836,7 @@ set(GENERIC_F767VGTX_MCU cortex-m7) set(GENERIC_F767VGTX_FPCONF "-") add_library(GENERIC_F767VGTX INTERFACE) target_compile_options(GENERIC_F767VGTX INTERFACE - "SHELL:-DSTM32F767xx " + "SHELL:-DSTM32F767xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -52741,15 +52881,15 @@ target_compile_options(GENERIC_F767VGTX_serial_none INTERFACE ) add_library(GENERIC_F767VGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F767VGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F767VGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F767VGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F767VGTX_usb_HID INTERFACE) target_compile_options(GENERIC_F767VGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F767VGTX_usb_none INTERFACE) target_compile_options(GENERIC_F767VGTX_usb_none INTERFACE @@ -52778,7 +52918,7 @@ set(GENERIC_F767VIHX_MCU cortex-m7) set(GENERIC_F767VIHX_FPCONF "-") add_library(GENERIC_F767VIHX INTERFACE) target_compile_options(GENERIC_F767VIHX INTERFACE - "SHELL:-DSTM32F767xx " + "SHELL:-DSTM32F767xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -52823,15 +52963,15 @@ target_compile_options(GENERIC_F767VIHX_serial_none INTERFACE ) add_library(GENERIC_F767VIHX_usb_CDC INTERFACE) target_compile_options(GENERIC_F767VIHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F767VIHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F767VIHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F767VIHX_usb_HID INTERFACE) target_compile_options(GENERIC_F767VIHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F767VIHX_usb_none INTERFACE) target_compile_options(GENERIC_F767VIHX_usb_none INTERFACE @@ -52860,7 +53000,7 @@ set(GENERIC_F767VITX_MCU cortex-m7) set(GENERIC_F767VITX_FPCONF "-") add_library(GENERIC_F767VITX INTERFACE) target_compile_options(GENERIC_F767VITX INTERFACE - "SHELL:-DSTM32F767xx " + "SHELL:-DSTM32F767xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -52905,15 +53045,15 @@ target_compile_options(GENERIC_F767VITX_serial_none INTERFACE ) add_library(GENERIC_F767VITX_usb_CDC INTERFACE) target_compile_options(GENERIC_F767VITX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F767VITX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F767VITX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F767VITX_usb_HID INTERFACE) target_compile_options(GENERIC_F767VITX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F767VITX_usb_none INTERFACE) target_compile_options(GENERIC_F767VITX_usb_none INTERFACE @@ -52942,7 +53082,7 @@ set(GENERIC_F767ZGTX_MCU cortex-m7) set(GENERIC_F767ZGTX_FPCONF "-") add_library(GENERIC_F767ZGTX INTERFACE) target_compile_options(GENERIC_F767ZGTX INTERFACE - "SHELL:-DSTM32F767xx " + "SHELL:-DSTM32F767xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -52987,15 +53127,15 @@ target_compile_options(GENERIC_F767ZGTX_serial_none INTERFACE ) add_library(GENERIC_F767ZGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_F767ZGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F767ZGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F767ZGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F767ZGTX_usb_HID INTERFACE) target_compile_options(GENERIC_F767ZGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F767ZGTX_usb_none INTERFACE) target_compile_options(GENERIC_F767ZGTX_usb_none INTERFACE @@ -53024,7 +53164,7 @@ set(GENERIC_F767ZITX_MCU cortex-m7) set(GENERIC_F767ZITX_FPCONF "-") add_library(GENERIC_F767ZITX INTERFACE) target_compile_options(GENERIC_F767ZITX INTERFACE - "SHELL:-DSTM32F767xx " + "SHELL:-DSTM32F767xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -53069,15 +53209,15 @@ target_compile_options(GENERIC_F767ZITX_serial_none INTERFACE ) add_library(GENERIC_F767ZITX_usb_CDC INTERFACE) target_compile_options(GENERIC_F767ZITX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F767ZITX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F767ZITX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F767ZITX_usb_HID INTERFACE) target_compile_options(GENERIC_F767ZITX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F767ZITX_usb_none INTERFACE) target_compile_options(GENERIC_F767ZITX_usb_none INTERFACE @@ -53106,7 +53246,7 @@ set(GENERIC_F777IIKX_MCU cortex-m7) set(GENERIC_F777IIKX_FPCONF "-") add_library(GENERIC_F777IIKX INTERFACE) target_compile_options(GENERIC_F777IIKX INTERFACE - "SHELL:-DSTM32F777xx " + "SHELL:-DSTM32F777xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -53151,15 +53291,15 @@ target_compile_options(GENERIC_F777IIKX_serial_none INTERFACE ) add_library(GENERIC_F777IIKX_usb_CDC INTERFACE) target_compile_options(GENERIC_F777IIKX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F777IIKX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F777IIKX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F777IIKX_usb_HID INTERFACE) target_compile_options(GENERIC_F777IIKX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F777IIKX_usb_none INTERFACE) target_compile_options(GENERIC_F777IIKX_usb_none INTERFACE @@ -53188,7 +53328,7 @@ set(GENERIC_F777IITX_MCU cortex-m7) set(GENERIC_F777IITX_FPCONF "-") add_library(GENERIC_F777IITX INTERFACE) target_compile_options(GENERIC_F777IITX INTERFACE - "SHELL:-DSTM32F777xx " + "SHELL:-DSTM32F777xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -53233,15 +53373,15 @@ target_compile_options(GENERIC_F777IITX_serial_none INTERFACE ) add_library(GENERIC_F777IITX_usb_CDC INTERFACE) target_compile_options(GENERIC_F777IITX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F777IITX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F777IITX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F777IITX_usb_HID INTERFACE) target_compile_options(GENERIC_F777IITX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F777IITX_usb_none INTERFACE) target_compile_options(GENERIC_F777IITX_usb_none INTERFACE @@ -53270,7 +53410,7 @@ set(GENERIC_F777VIHX_MCU cortex-m7) set(GENERIC_F777VIHX_FPCONF "-") add_library(GENERIC_F777VIHX INTERFACE) target_compile_options(GENERIC_F777VIHX INTERFACE - "SHELL:-DSTM32F777xx " + "SHELL:-DSTM32F777xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -53315,15 +53455,15 @@ target_compile_options(GENERIC_F777VIHX_serial_none INTERFACE ) add_library(GENERIC_F777VIHX_usb_CDC INTERFACE) target_compile_options(GENERIC_F777VIHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F777VIHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F777VIHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F777VIHX_usb_HID INTERFACE) target_compile_options(GENERIC_F777VIHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F777VIHX_usb_none INTERFACE) target_compile_options(GENERIC_F777VIHX_usb_none INTERFACE @@ -53352,7 +53492,7 @@ set(GENERIC_F777VITX_MCU cortex-m7) set(GENERIC_F777VITX_FPCONF "-") add_library(GENERIC_F777VITX INTERFACE) target_compile_options(GENERIC_F777VITX INTERFACE - "SHELL:-DSTM32F777xx " + "SHELL:-DSTM32F777xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -53397,15 +53537,15 @@ target_compile_options(GENERIC_F777VITX_serial_none INTERFACE ) add_library(GENERIC_F777VITX_usb_CDC INTERFACE) target_compile_options(GENERIC_F777VITX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F777VITX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F777VITX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F777VITX_usb_HID INTERFACE) target_compile_options(GENERIC_F777VITX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F777VITX_usb_none INTERFACE) target_compile_options(GENERIC_F777VITX_usb_none INTERFACE @@ -53434,7 +53574,7 @@ set(GENERIC_F777ZITX_MCU cortex-m7) set(GENERIC_F777ZITX_FPCONF "-") add_library(GENERIC_F777ZITX INTERFACE) target_compile_options(GENERIC_F777ZITX INTERFACE - "SHELL:-DSTM32F777xx " + "SHELL:-DSTM32F777xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -53479,15 +53619,15 @@ target_compile_options(GENERIC_F777ZITX_serial_none INTERFACE ) add_library(GENERIC_F777ZITX_usb_CDC INTERFACE) target_compile_options(GENERIC_F777ZITX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_F777ZITX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_F777ZITX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_F777ZITX_usb_HID INTERFACE) target_compile_options(GENERIC_F777ZITX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_F777ZITX_usb_none INTERFACE) target_compile_options(GENERIC_F777ZITX_usb_none INTERFACE @@ -53516,7 +53656,7 @@ set(GENERIC_G030C6TX_MCU cortex-m0plus) set(GENERIC_G030C6TX_FPCONF "-") add_library(GENERIC_G030C6TX INTERFACE) target_compile_options(GENERIC_G030C6TX INTERFACE - "SHELL:-DSTM32G030xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G030xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -53561,15 +53701,15 @@ target_compile_options(GENERIC_G030C6TX_serial_none INTERFACE ) add_library(GENERIC_G030C6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_G030C6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G030C6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G030C6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G030C6TX_usb_HID INTERFACE) target_compile_options(GENERIC_G030C6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G030C6TX_usb_none INTERFACE) target_compile_options(GENERIC_G030C6TX_usb_none INTERFACE @@ -53586,7 +53726,7 @@ set(GENERIC_G030C8TX_MCU cortex-m0plus) set(GENERIC_G030C8TX_FPCONF "-") add_library(GENERIC_G030C8TX INTERFACE) target_compile_options(GENERIC_G030C8TX INTERFACE - "SHELL:-DSTM32G030xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G030xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -53631,15 +53771,15 @@ target_compile_options(GENERIC_G030C8TX_serial_none INTERFACE ) add_library(GENERIC_G030C8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_G030C8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G030C8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G030C8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G030C8TX_usb_HID INTERFACE) target_compile_options(GENERIC_G030C8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G030C8TX_usb_none INTERFACE) target_compile_options(GENERIC_G030C8TX_usb_none INTERFACE @@ -53656,7 +53796,7 @@ set(GENERIC_G030F6PX_MCU cortex-m0plus) set(GENERIC_G030F6PX_FPCONF "-") add_library(GENERIC_G030F6PX INTERFACE) target_compile_options(GENERIC_G030F6PX INTERFACE - "SHELL:-DSTM32G030xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G030xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -53701,15 +53841,15 @@ target_compile_options(GENERIC_G030F6PX_serial_none INTERFACE ) add_library(GENERIC_G030F6PX_usb_CDC INTERFACE) target_compile_options(GENERIC_G030F6PX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G030F6PX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G030F6PX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G030F6PX_usb_HID INTERFACE) target_compile_options(GENERIC_G030F6PX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G030F6PX_usb_none INTERFACE) target_compile_options(GENERIC_G030F6PX_usb_none INTERFACE @@ -53726,7 +53866,7 @@ set(GENERIC_G030J6MX_MCU cortex-m0plus) set(GENERIC_G030J6MX_FPCONF "-") add_library(GENERIC_G030J6MX INTERFACE) target_compile_options(GENERIC_G030J6MX INTERFACE - "SHELL:-DSTM32G030xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G030xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -53771,15 +53911,15 @@ target_compile_options(GENERIC_G030J6MX_serial_none INTERFACE ) add_library(GENERIC_G030J6MX_usb_CDC INTERFACE) target_compile_options(GENERIC_G030J6MX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G030J6MX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G030J6MX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G030J6MX_usb_HID INTERFACE) target_compile_options(GENERIC_G030J6MX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G030J6MX_usb_none INTERFACE) target_compile_options(GENERIC_G030J6MX_usb_none INTERFACE @@ -53796,7 +53936,7 @@ set(GENERIC_G030K6TX_MCU cortex-m0plus) set(GENERIC_G030K6TX_FPCONF "-") add_library(GENERIC_G030K6TX INTERFACE) target_compile_options(GENERIC_G030K6TX INTERFACE - "SHELL:-DSTM32G030xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G030xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -53841,15 +53981,15 @@ target_compile_options(GENERIC_G030K6TX_serial_none INTERFACE ) add_library(GENERIC_G030K6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_G030K6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G030K6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G030K6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G030K6TX_usb_HID INTERFACE) target_compile_options(GENERIC_G030K6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G030K6TX_usb_none INTERFACE) target_compile_options(GENERIC_G030K6TX_usb_none INTERFACE @@ -53866,7 +54006,7 @@ set(GENERIC_G030K8TX_MCU cortex-m0plus) set(GENERIC_G030K8TX_FPCONF "-") add_library(GENERIC_G030K8TX INTERFACE) target_compile_options(GENERIC_G030K8TX INTERFACE - "SHELL:-DSTM32G030xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G030xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -53911,15 +54051,15 @@ target_compile_options(GENERIC_G030K8TX_serial_none INTERFACE ) add_library(GENERIC_G030K8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_G030K8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G030K8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G030K8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G030K8TX_usb_HID INTERFACE) target_compile_options(GENERIC_G030K8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G030K8TX_usb_none INTERFACE) target_compile_options(GENERIC_G030K8TX_usb_none INTERFACE @@ -53936,7 +54076,7 @@ set(GENERIC_G031C4TX_MCU cortex-m0plus) set(GENERIC_G031C4TX_FPCONF "-") add_library(GENERIC_G031C4TX INTERFACE) target_compile_options(GENERIC_G031C4TX INTERFACE - "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -53981,15 +54121,15 @@ target_compile_options(GENERIC_G031C4TX_serial_none INTERFACE ) add_library(GENERIC_G031C4TX_usb_CDC INTERFACE) target_compile_options(GENERIC_G031C4TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G031C4TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G031C4TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G031C4TX_usb_HID INTERFACE) target_compile_options(GENERIC_G031C4TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G031C4TX_usb_none INTERFACE) target_compile_options(GENERIC_G031C4TX_usb_none INTERFACE @@ -54006,7 +54146,7 @@ set(GENERIC_G031C4UX_MCU cortex-m0plus) set(GENERIC_G031C4UX_FPCONF "-") add_library(GENERIC_G031C4UX INTERFACE) target_compile_options(GENERIC_G031C4UX INTERFACE - "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -54051,15 +54191,15 @@ target_compile_options(GENERIC_G031C4UX_serial_none INTERFACE ) add_library(GENERIC_G031C4UX_usb_CDC INTERFACE) target_compile_options(GENERIC_G031C4UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G031C4UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G031C4UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G031C4UX_usb_HID INTERFACE) target_compile_options(GENERIC_G031C4UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G031C4UX_usb_none INTERFACE) target_compile_options(GENERIC_G031C4UX_usb_none INTERFACE @@ -54076,7 +54216,7 @@ set(GENERIC_G031C6TX_MCU cortex-m0plus) set(GENERIC_G031C6TX_FPCONF "-") add_library(GENERIC_G031C6TX INTERFACE) target_compile_options(GENERIC_G031C6TX INTERFACE - "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -54121,15 +54261,15 @@ target_compile_options(GENERIC_G031C6TX_serial_none INTERFACE ) add_library(GENERIC_G031C6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_G031C6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G031C6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G031C6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G031C6TX_usb_HID INTERFACE) target_compile_options(GENERIC_G031C6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G031C6TX_usb_none INTERFACE) target_compile_options(GENERIC_G031C6TX_usb_none INTERFACE @@ -54146,7 +54286,7 @@ set(GENERIC_G031C6UX_MCU cortex-m0plus) set(GENERIC_G031C6UX_FPCONF "-") add_library(GENERIC_G031C6UX INTERFACE) target_compile_options(GENERIC_G031C6UX INTERFACE - "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -54191,15 +54331,15 @@ target_compile_options(GENERIC_G031C6UX_serial_none INTERFACE ) add_library(GENERIC_G031C6UX_usb_CDC INTERFACE) target_compile_options(GENERIC_G031C6UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G031C6UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G031C6UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G031C6UX_usb_HID INTERFACE) target_compile_options(GENERIC_G031C6UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G031C6UX_usb_none INTERFACE) target_compile_options(GENERIC_G031C6UX_usb_none INTERFACE @@ -54216,7 +54356,7 @@ set(GENERIC_G031C8TX_MCU cortex-m0plus) set(GENERIC_G031C8TX_FPCONF "-") add_library(GENERIC_G031C8TX INTERFACE) target_compile_options(GENERIC_G031C8TX INTERFACE - "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -54261,15 +54401,15 @@ target_compile_options(GENERIC_G031C8TX_serial_none INTERFACE ) add_library(GENERIC_G031C8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_G031C8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G031C8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G031C8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G031C8TX_usb_HID INTERFACE) target_compile_options(GENERIC_G031C8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G031C8TX_usb_none INTERFACE) target_compile_options(GENERIC_G031C8TX_usb_none INTERFACE @@ -54286,7 +54426,7 @@ set(GENERIC_G031C8UX_MCU cortex-m0plus) set(GENERIC_G031C8UX_FPCONF "-") add_library(GENERIC_G031C8UX INTERFACE) target_compile_options(GENERIC_G031C8UX INTERFACE - "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -54331,15 +54471,15 @@ target_compile_options(GENERIC_G031C8UX_serial_none INTERFACE ) add_library(GENERIC_G031C8UX_usb_CDC INTERFACE) target_compile_options(GENERIC_G031C8UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G031C8UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G031C8UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G031C8UX_usb_HID INTERFACE) target_compile_options(GENERIC_G031C8UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G031C8UX_usb_none INTERFACE) target_compile_options(GENERIC_G031C8UX_usb_none INTERFACE @@ -54356,7 +54496,7 @@ set(GENERIC_G031F4PX_MCU cortex-m0plus) set(GENERIC_G031F4PX_FPCONF "-") add_library(GENERIC_G031F4PX INTERFACE) target_compile_options(GENERIC_G031F4PX INTERFACE - "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -54401,15 +54541,15 @@ target_compile_options(GENERIC_G031F4PX_serial_none INTERFACE ) add_library(GENERIC_G031F4PX_usb_CDC INTERFACE) target_compile_options(GENERIC_G031F4PX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G031F4PX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G031F4PX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G031F4PX_usb_HID INTERFACE) target_compile_options(GENERIC_G031F4PX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G031F4PX_usb_none INTERFACE) target_compile_options(GENERIC_G031F4PX_usb_none INTERFACE @@ -54426,7 +54566,7 @@ set(GENERIC_G031F6PX_MCU cortex-m0plus) set(GENERIC_G031F6PX_FPCONF "-") add_library(GENERIC_G031F6PX INTERFACE) target_compile_options(GENERIC_G031F6PX INTERFACE - "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -54471,15 +54611,15 @@ target_compile_options(GENERIC_G031F6PX_serial_none INTERFACE ) add_library(GENERIC_G031F6PX_usb_CDC INTERFACE) target_compile_options(GENERIC_G031F6PX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G031F6PX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G031F6PX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G031F6PX_usb_HID INTERFACE) target_compile_options(GENERIC_G031F6PX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G031F6PX_usb_none INTERFACE) target_compile_options(GENERIC_G031F6PX_usb_none INTERFACE @@ -54496,7 +54636,7 @@ set(GENERIC_G031F8PX_MCU cortex-m0plus) set(GENERIC_G031F8PX_FPCONF "-") add_library(GENERIC_G031F8PX INTERFACE) target_compile_options(GENERIC_G031F8PX INTERFACE - "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -54541,15 +54681,15 @@ target_compile_options(GENERIC_G031F8PX_serial_none INTERFACE ) add_library(GENERIC_G031F8PX_usb_CDC INTERFACE) target_compile_options(GENERIC_G031F8PX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G031F8PX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G031F8PX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G031F8PX_usb_HID INTERFACE) target_compile_options(GENERIC_G031F8PX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G031F8PX_usb_none INTERFACE) target_compile_options(GENERIC_G031F8PX_usb_none INTERFACE @@ -54566,7 +54706,7 @@ set(GENERIC_G031G4UX_MCU cortex-m0plus) set(GENERIC_G031G4UX_FPCONF "-") add_library(GENERIC_G031G4UX INTERFACE) target_compile_options(GENERIC_G031G4UX INTERFACE - "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -54611,15 +54751,15 @@ target_compile_options(GENERIC_G031G4UX_serial_none INTERFACE ) add_library(GENERIC_G031G4UX_usb_CDC INTERFACE) target_compile_options(GENERIC_G031G4UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G031G4UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G031G4UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G031G4UX_usb_HID INTERFACE) target_compile_options(GENERIC_G031G4UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G031G4UX_usb_none INTERFACE) target_compile_options(GENERIC_G031G4UX_usb_none INTERFACE @@ -54636,7 +54776,7 @@ set(GENERIC_G031G6UX_MCU cortex-m0plus) set(GENERIC_G031G6UX_FPCONF "-") add_library(GENERIC_G031G6UX INTERFACE) target_compile_options(GENERIC_G031G6UX INTERFACE - "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -54681,15 +54821,15 @@ target_compile_options(GENERIC_G031G6UX_serial_none INTERFACE ) add_library(GENERIC_G031G6UX_usb_CDC INTERFACE) target_compile_options(GENERIC_G031G6UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G031G6UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G031G6UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G031G6UX_usb_HID INTERFACE) target_compile_options(GENERIC_G031G6UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G031G6UX_usb_none INTERFACE) target_compile_options(GENERIC_G031G6UX_usb_none INTERFACE @@ -54706,7 +54846,7 @@ set(GENERIC_G031G8UX_MCU cortex-m0plus) set(GENERIC_G031G8UX_FPCONF "-") add_library(GENERIC_G031G8UX INTERFACE) target_compile_options(GENERIC_G031G8UX INTERFACE - "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -54751,15 +54891,15 @@ target_compile_options(GENERIC_G031G8UX_serial_none INTERFACE ) add_library(GENERIC_G031G8UX_usb_CDC INTERFACE) target_compile_options(GENERIC_G031G8UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G031G8UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G031G8UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G031G8UX_usb_HID INTERFACE) target_compile_options(GENERIC_G031G8UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G031G8UX_usb_none INTERFACE) target_compile_options(GENERIC_G031G8UX_usb_none INTERFACE @@ -54776,7 +54916,7 @@ set(GENERIC_G031J4MX_MCU cortex-m0plus) set(GENERIC_G031J4MX_FPCONF "-") add_library(GENERIC_G031J4MX INTERFACE) target_compile_options(GENERIC_G031J4MX INTERFACE - "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -54821,15 +54961,15 @@ target_compile_options(GENERIC_G031J4MX_serial_none INTERFACE ) add_library(GENERIC_G031J4MX_usb_CDC INTERFACE) target_compile_options(GENERIC_G031J4MX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G031J4MX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G031J4MX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G031J4MX_usb_HID INTERFACE) target_compile_options(GENERIC_G031J4MX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G031J4MX_usb_none INTERFACE) target_compile_options(GENERIC_G031J4MX_usb_none INTERFACE @@ -54846,7 +54986,7 @@ set(GENERIC_G031J6MX_MCU cortex-m0plus) set(GENERIC_G031J6MX_FPCONF "-") add_library(GENERIC_G031J6MX INTERFACE) target_compile_options(GENERIC_G031J6MX INTERFACE - "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -54891,15 +55031,15 @@ target_compile_options(GENERIC_G031J6MX_serial_none INTERFACE ) add_library(GENERIC_G031J6MX_usb_CDC INTERFACE) target_compile_options(GENERIC_G031J6MX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G031J6MX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G031J6MX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G031J6MX_usb_HID INTERFACE) target_compile_options(GENERIC_G031J6MX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G031J6MX_usb_none INTERFACE) target_compile_options(GENERIC_G031J6MX_usb_none INTERFACE @@ -54916,7 +55056,7 @@ set(GENERIC_G031K4TX_MCU cortex-m0plus) set(GENERIC_G031K4TX_FPCONF "-") add_library(GENERIC_G031K4TX INTERFACE) target_compile_options(GENERIC_G031K4TX INTERFACE - "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -54961,15 +55101,15 @@ target_compile_options(GENERIC_G031K4TX_serial_none INTERFACE ) add_library(GENERIC_G031K4TX_usb_CDC INTERFACE) target_compile_options(GENERIC_G031K4TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G031K4TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G031K4TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G031K4TX_usb_HID INTERFACE) target_compile_options(GENERIC_G031K4TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G031K4TX_usb_none INTERFACE) target_compile_options(GENERIC_G031K4TX_usb_none INTERFACE @@ -54986,7 +55126,7 @@ set(GENERIC_G031K4UX_MCU cortex-m0plus) set(GENERIC_G031K4UX_FPCONF "-") add_library(GENERIC_G031K4UX INTERFACE) target_compile_options(GENERIC_G031K4UX INTERFACE - "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -55031,15 +55171,15 @@ target_compile_options(GENERIC_G031K4UX_serial_none INTERFACE ) add_library(GENERIC_G031K4UX_usb_CDC INTERFACE) target_compile_options(GENERIC_G031K4UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G031K4UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G031K4UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G031K4UX_usb_HID INTERFACE) target_compile_options(GENERIC_G031K4UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G031K4UX_usb_none INTERFACE) target_compile_options(GENERIC_G031K4UX_usb_none INTERFACE @@ -55056,7 +55196,7 @@ set(GENERIC_G031K6TX_MCU cortex-m0plus) set(GENERIC_G031K6TX_FPCONF "-") add_library(GENERIC_G031K6TX INTERFACE) target_compile_options(GENERIC_G031K6TX INTERFACE - "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -55101,15 +55241,15 @@ target_compile_options(GENERIC_G031K6TX_serial_none INTERFACE ) add_library(GENERIC_G031K6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_G031K6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G031K6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G031K6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G031K6TX_usb_HID INTERFACE) target_compile_options(GENERIC_G031K6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G031K6TX_usb_none INTERFACE) target_compile_options(GENERIC_G031K6TX_usb_none INTERFACE @@ -55126,7 +55266,7 @@ set(GENERIC_G031K6UX_MCU cortex-m0plus) set(GENERIC_G031K6UX_FPCONF "-") add_library(GENERIC_G031K6UX INTERFACE) target_compile_options(GENERIC_G031K6UX INTERFACE - "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -55171,15 +55311,15 @@ target_compile_options(GENERIC_G031K6UX_serial_none INTERFACE ) add_library(GENERIC_G031K6UX_usb_CDC INTERFACE) target_compile_options(GENERIC_G031K6UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G031K6UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G031K6UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G031K6UX_usb_HID INTERFACE) target_compile_options(GENERIC_G031K6UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G031K6UX_usb_none INTERFACE) target_compile_options(GENERIC_G031K6UX_usb_none INTERFACE @@ -55196,7 +55336,7 @@ set(GENERIC_G031K8TX_MCU cortex-m0plus) set(GENERIC_G031K8TX_FPCONF "-") add_library(GENERIC_G031K8TX INTERFACE) target_compile_options(GENERIC_G031K8TX INTERFACE - "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -55241,15 +55381,15 @@ target_compile_options(GENERIC_G031K8TX_serial_none INTERFACE ) add_library(GENERIC_G031K8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_G031K8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G031K8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G031K8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G031K8TX_usb_HID INTERFACE) target_compile_options(GENERIC_G031K8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G031K8TX_usb_none INTERFACE) target_compile_options(GENERIC_G031K8TX_usb_none INTERFACE @@ -55266,7 +55406,7 @@ set(GENERIC_G031K8UX_MCU cortex-m0plus) set(GENERIC_G031K8UX_FPCONF "-") add_library(GENERIC_G031K8UX INTERFACE) target_compile_options(GENERIC_G031K8UX INTERFACE - "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -55311,15 +55451,15 @@ target_compile_options(GENERIC_G031K8UX_serial_none INTERFACE ) add_library(GENERIC_G031K8UX_usb_CDC INTERFACE) target_compile_options(GENERIC_G031K8UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G031K8UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G031K8UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G031K8UX_usb_HID INTERFACE) target_compile_options(GENERIC_G031K8UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G031K8UX_usb_none INTERFACE) target_compile_options(GENERIC_G031K8UX_usb_none INTERFACE @@ -55336,7 +55476,7 @@ set(GENERIC_G031Y8YX_MCU cortex-m0plus) set(GENERIC_G031Y8YX_FPCONF "-") add_library(GENERIC_G031Y8YX INTERFACE) target_compile_options(GENERIC_G031Y8YX INTERFACE - "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -55381,15 +55521,15 @@ target_compile_options(GENERIC_G031Y8YX_serial_none INTERFACE ) add_library(GENERIC_G031Y8YX_usb_CDC INTERFACE) target_compile_options(GENERIC_G031Y8YX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G031Y8YX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G031Y8YX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G031Y8YX_usb_HID INTERFACE) target_compile_options(GENERIC_G031Y8YX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G031Y8YX_usb_none INTERFACE) target_compile_options(GENERIC_G031Y8YX_usb_none INTERFACE @@ -55406,7 +55546,7 @@ set(GENERIC_G041C6TX_MCU cortex-m0plus) set(GENERIC_G041C6TX_FPCONF "-") add_library(GENERIC_G041C6TX INTERFACE) target_compile_options(GENERIC_G041C6TX INTERFACE - "SHELL:-DSTM32G041xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G041xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -55451,15 +55591,15 @@ target_compile_options(GENERIC_G041C6TX_serial_none INTERFACE ) add_library(GENERIC_G041C6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_G041C6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G041C6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G041C6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G041C6TX_usb_HID INTERFACE) target_compile_options(GENERIC_G041C6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G041C6TX_usb_none INTERFACE) target_compile_options(GENERIC_G041C6TX_usb_none INTERFACE @@ -55476,7 +55616,7 @@ set(GENERIC_G041C6UX_MCU cortex-m0plus) set(GENERIC_G041C6UX_FPCONF "-") add_library(GENERIC_G041C6UX INTERFACE) target_compile_options(GENERIC_G041C6UX INTERFACE - "SHELL:-DSTM32G041xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G041xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -55521,15 +55661,15 @@ target_compile_options(GENERIC_G041C6UX_serial_none INTERFACE ) add_library(GENERIC_G041C6UX_usb_CDC INTERFACE) target_compile_options(GENERIC_G041C6UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G041C6UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G041C6UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G041C6UX_usb_HID INTERFACE) target_compile_options(GENERIC_G041C6UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G041C6UX_usb_none INTERFACE) target_compile_options(GENERIC_G041C6UX_usb_none INTERFACE @@ -55546,7 +55686,7 @@ set(GENERIC_G041C8TX_MCU cortex-m0plus) set(GENERIC_G041C8TX_FPCONF "-") add_library(GENERIC_G041C8TX INTERFACE) target_compile_options(GENERIC_G041C8TX INTERFACE - "SHELL:-DSTM32G041xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G041xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -55591,15 +55731,15 @@ target_compile_options(GENERIC_G041C8TX_serial_none INTERFACE ) add_library(GENERIC_G041C8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_G041C8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G041C8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G041C8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G041C8TX_usb_HID INTERFACE) target_compile_options(GENERIC_G041C8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G041C8TX_usb_none INTERFACE) target_compile_options(GENERIC_G041C8TX_usb_none INTERFACE @@ -55616,7 +55756,7 @@ set(GENERIC_G041C8UX_MCU cortex-m0plus) set(GENERIC_G041C8UX_FPCONF "-") add_library(GENERIC_G041C8UX INTERFACE) target_compile_options(GENERIC_G041C8UX INTERFACE - "SHELL:-DSTM32G041xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G041xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -55661,15 +55801,15 @@ target_compile_options(GENERIC_G041C8UX_serial_none INTERFACE ) add_library(GENERIC_G041C8UX_usb_CDC INTERFACE) target_compile_options(GENERIC_G041C8UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G041C8UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G041C8UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G041C8UX_usb_HID INTERFACE) target_compile_options(GENERIC_G041C8UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G041C8UX_usb_none INTERFACE) target_compile_options(GENERIC_G041C8UX_usb_none INTERFACE @@ -55686,7 +55826,7 @@ set(GENERIC_G041F6PX_MCU cortex-m0plus) set(GENERIC_G041F6PX_FPCONF "-") add_library(GENERIC_G041F6PX INTERFACE) target_compile_options(GENERIC_G041F6PX INTERFACE - "SHELL:-DSTM32G041xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G041xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -55731,15 +55871,15 @@ target_compile_options(GENERIC_G041F6PX_serial_none INTERFACE ) add_library(GENERIC_G041F6PX_usb_CDC INTERFACE) target_compile_options(GENERIC_G041F6PX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G041F6PX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G041F6PX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G041F6PX_usb_HID INTERFACE) target_compile_options(GENERIC_G041F6PX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G041F6PX_usb_none INTERFACE) target_compile_options(GENERIC_G041F6PX_usb_none INTERFACE @@ -55756,7 +55896,7 @@ set(GENERIC_G041F8PX_MCU cortex-m0plus) set(GENERIC_G041F8PX_FPCONF "-") add_library(GENERIC_G041F8PX INTERFACE) target_compile_options(GENERIC_G041F8PX INTERFACE - "SHELL:-DSTM32G041xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G041xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -55801,15 +55941,15 @@ target_compile_options(GENERIC_G041F8PX_serial_none INTERFACE ) add_library(GENERIC_G041F8PX_usb_CDC INTERFACE) target_compile_options(GENERIC_G041F8PX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G041F8PX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G041F8PX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G041F8PX_usb_HID INTERFACE) target_compile_options(GENERIC_G041F8PX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G041F8PX_usb_none INTERFACE) target_compile_options(GENERIC_G041F8PX_usb_none INTERFACE @@ -55826,7 +55966,7 @@ set(GENERIC_G041G6UX_MCU cortex-m0plus) set(GENERIC_G041G6UX_FPCONF "-") add_library(GENERIC_G041G6UX INTERFACE) target_compile_options(GENERIC_G041G6UX INTERFACE - "SHELL:-DSTM32G041xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G041xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -55871,15 +56011,15 @@ target_compile_options(GENERIC_G041G6UX_serial_none INTERFACE ) add_library(GENERIC_G041G6UX_usb_CDC INTERFACE) target_compile_options(GENERIC_G041G6UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G041G6UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G041G6UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G041G6UX_usb_HID INTERFACE) target_compile_options(GENERIC_G041G6UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G041G6UX_usb_none INTERFACE) target_compile_options(GENERIC_G041G6UX_usb_none INTERFACE @@ -55896,7 +56036,7 @@ set(GENERIC_G041G8UX_MCU cortex-m0plus) set(GENERIC_G041G8UX_FPCONF "-") add_library(GENERIC_G041G8UX INTERFACE) target_compile_options(GENERIC_G041G8UX INTERFACE - "SHELL:-DSTM32G041xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G041xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -55941,15 +56081,15 @@ target_compile_options(GENERIC_G041G8UX_serial_none INTERFACE ) add_library(GENERIC_G041G8UX_usb_CDC INTERFACE) target_compile_options(GENERIC_G041G8UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G041G8UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G041G8UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G041G8UX_usb_HID INTERFACE) target_compile_options(GENERIC_G041G8UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G041G8UX_usb_none INTERFACE) target_compile_options(GENERIC_G041G8UX_usb_none INTERFACE @@ -55966,7 +56106,7 @@ set(GENERIC_G041J6MX_MCU cortex-m0plus) set(GENERIC_G041J6MX_FPCONF "-") add_library(GENERIC_G041J6MX INTERFACE) target_compile_options(GENERIC_G041J6MX INTERFACE - "SHELL:-DSTM32G041xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G041xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -56011,15 +56151,15 @@ target_compile_options(GENERIC_G041J6MX_serial_none INTERFACE ) add_library(GENERIC_G041J6MX_usb_CDC INTERFACE) target_compile_options(GENERIC_G041J6MX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G041J6MX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G041J6MX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G041J6MX_usb_HID INTERFACE) target_compile_options(GENERIC_G041J6MX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G041J6MX_usb_none INTERFACE) target_compile_options(GENERIC_G041J6MX_usb_none INTERFACE @@ -56036,7 +56176,7 @@ set(GENERIC_G041K6TX_MCU cortex-m0plus) set(GENERIC_G041K6TX_FPCONF "-") add_library(GENERIC_G041K6TX INTERFACE) target_compile_options(GENERIC_G041K6TX INTERFACE - "SHELL:-DSTM32G041xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G041xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -56081,15 +56221,15 @@ target_compile_options(GENERIC_G041K6TX_serial_none INTERFACE ) add_library(GENERIC_G041K6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_G041K6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G041K6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G041K6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G041K6TX_usb_HID INTERFACE) target_compile_options(GENERIC_G041K6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G041K6TX_usb_none INTERFACE) target_compile_options(GENERIC_G041K6TX_usb_none INTERFACE @@ -56106,7 +56246,7 @@ set(GENERIC_G041K6UX_MCU cortex-m0plus) set(GENERIC_G041K6UX_FPCONF "-") add_library(GENERIC_G041K6UX INTERFACE) target_compile_options(GENERIC_G041K6UX INTERFACE - "SHELL:-DSTM32G041xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G041xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -56151,15 +56291,15 @@ target_compile_options(GENERIC_G041K6UX_serial_none INTERFACE ) add_library(GENERIC_G041K6UX_usb_CDC INTERFACE) target_compile_options(GENERIC_G041K6UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G041K6UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G041K6UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G041K6UX_usb_HID INTERFACE) target_compile_options(GENERIC_G041K6UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G041K6UX_usb_none INTERFACE) target_compile_options(GENERIC_G041K6UX_usb_none INTERFACE @@ -56176,7 +56316,7 @@ set(GENERIC_G041K8TX_MCU cortex-m0plus) set(GENERIC_G041K8TX_FPCONF "-") add_library(GENERIC_G041K8TX INTERFACE) target_compile_options(GENERIC_G041K8TX INTERFACE - "SHELL:-DSTM32G041xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G041xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -56221,15 +56361,15 @@ target_compile_options(GENERIC_G041K8TX_serial_none INTERFACE ) add_library(GENERIC_G041K8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_G041K8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G041K8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G041K8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G041K8TX_usb_HID INTERFACE) target_compile_options(GENERIC_G041K8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G041K8TX_usb_none INTERFACE) target_compile_options(GENERIC_G041K8TX_usb_none INTERFACE @@ -56246,7 +56386,7 @@ set(GENERIC_G041K8UX_MCU cortex-m0plus) set(GENERIC_G041K8UX_FPCONF "-") add_library(GENERIC_G041K8UX INTERFACE) target_compile_options(GENERIC_G041K8UX INTERFACE - "SHELL:-DSTM32G041xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G041xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -56291,15 +56431,15 @@ target_compile_options(GENERIC_G041K8UX_serial_none INTERFACE ) add_library(GENERIC_G041K8UX_usb_CDC INTERFACE) target_compile_options(GENERIC_G041K8UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G041K8UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G041K8UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G041K8UX_usb_HID INTERFACE) target_compile_options(GENERIC_G041K8UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G041K8UX_usb_none INTERFACE) target_compile_options(GENERIC_G041K8UX_usb_none INTERFACE @@ -56316,7 +56456,7 @@ set(GENERIC_G041Y8YX_MCU cortex-m0plus) set(GENERIC_G041Y8YX_FPCONF "-") add_library(GENERIC_G041Y8YX INTERFACE) target_compile_options(GENERIC_G041Y8YX INTERFACE - "SHELL:-DSTM32G041xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G041xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -56361,15 +56501,15 @@ target_compile_options(GENERIC_G041Y8YX_serial_none INTERFACE ) add_library(GENERIC_G041Y8YX_usb_CDC INTERFACE) target_compile_options(GENERIC_G041Y8YX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G041Y8YX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G041Y8YX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G041Y8YX_usb_HID INTERFACE) target_compile_options(GENERIC_G041Y8YX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G041Y8YX_usb_none INTERFACE) target_compile_options(GENERIC_G041Y8YX_usb_none INTERFACE @@ -56386,7 +56526,7 @@ set(GENERIC_G050C6TX_MCU cortex-m0plus) set(GENERIC_G050C6TX_FPCONF "-") add_library(GENERIC_G050C6TX INTERFACE) target_compile_options(GENERIC_G050C6TX INTERFACE - "SHELL:-DSTM32G050xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G050xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -56431,15 +56571,15 @@ target_compile_options(GENERIC_G050C6TX_serial_none INTERFACE ) add_library(GENERIC_G050C6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_G050C6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G050C6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G050C6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G050C6TX_usb_HID INTERFACE) target_compile_options(GENERIC_G050C6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G050C6TX_usb_none INTERFACE) target_compile_options(GENERIC_G050C6TX_usb_none INTERFACE @@ -56456,7 +56596,7 @@ set(GENERIC_G050C8TX_MCU cortex-m0plus) set(GENERIC_G050C8TX_FPCONF "-") add_library(GENERIC_G050C8TX INTERFACE) target_compile_options(GENERIC_G050C8TX INTERFACE - "SHELL:-DSTM32G050xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G050xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -56501,15 +56641,15 @@ target_compile_options(GENERIC_G050C8TX_serial_none INTERFACE ) add_library(GENERIC_G050C8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_G050C8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G050C8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G050C8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G050C8TX_usb_HID INTERFACE) target_compile_options(GENERIC_G050C8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G050C8TX_usb_none INTERFACE) target_compile_options(GENERIC_G050C8TX_usb_none INTERFACE @@ -56526,7 +56666,7 @@ set(GENERIC_G050F6PX_MCU cortex-m0plus) set(GENERIC_G050F6PX_FPCONF "-") add_library(GENERIC_G050F6PX INTERFACE) target_compile_options(GENERIC_G050F6PX INTERFACE - "SHELL:-DSTM32G050xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G050xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -56571,15 +56711,15 @@ target_compile_options(GENERIC_G050F6PX_serial_none INTERFACE ) add_library(GENERIC_G050F6PX_usb_CDC INTERFACE) target_compile_options(GENERIC_G050F6PX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G050F6PX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G050F6PX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G050F6PX_usb_HID INTERFACE) target_compile_options(GENERIC_G050F6PX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G050F6PX_usb_none INTERFACE) target_compile_options(GENERIC_G050F6PX_usb_none INTERFACE @@ -56596,7 +56736,7 @@ set(GENERIC_G050K6TX_MCU cortex-m0plus) set(GENERIC_G050K6TX_FPCONF "-") add_library(GENERIC_G050K6TX INTERFACE) target_compile_options(GENERIC_G050K6TX INTERFACE - "SHELL:-DSTM32G050xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G050xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -56641,15 +56781,15 @@ target_compile_options(GENERIC_G050K6TX_serial_none INTERFACE ) add_library(GENERIC_G050K6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_G050K6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G050K6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G050K6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G050K6TX_usb_HID INTERFACE) target_compile_options(GENERIC_G050K6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G050K6TX_usb_none INTERFACE) target_compile_options(GENERIC_G050K6TX_usb_none INTERFACE @@ -56666,7 +56806,7 @@ set(GENERIC_G050K8TX_MCU cortex-m0plus) set(GENERIC_G050K8TX_FPCONF "-") add_library(GENERIC_G050K8TX INTERFACE) target_compile_options(GENERIC_G050K8TX INTERFACE - "SHELL:-DSTM32G050xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G050xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -56711,15 +56851,15 @@ target_compile_options(GENERIC_G050K8TX_serial_none INTERFACE ) add_library(GENERIC_G050K8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_G050K8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G050K8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G050K8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G050K8TX_usb_HID INTERFACE) target_compile_options(GENERIC_G050K8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G050K8TX_usb_none INTERFACE) target_compile_options(GENERIC_G050K8TX_usb_none INTERFACE @@ -56736,7 +56876,7 @@ set(GENERIC_G051C6TX_MCU cortex-m0plus) set(GENERIC_G051C6TX_FPCONF "-") add_library(GENERIC_G051C6TX INTERFACE) target_compile_options(GENERIC_G051C6TX INTERFACE - "SHELL:-DSTM32G051xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G051xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -56781,15 +56921,15 @@ target_compile_options(GENERIC_G051C6TX_serial_none INTERFACE ) add_library(GENERIC_G051C6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_G051C6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G051C6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G051C6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G051C6TX_usb_HID INTERFACE) target_compile_options(GENERIC_G051C6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G051C6TX_usb_none INTERFACE) target_compile_options(GENERIC_G051C6TX_usb_none INTERFACE @@ -56806,7 +56946,7 @@ set(GENERIC_G051C6UX_MCU cortex-m0plus) set(GENERIC_G051C6UX_FPCONF "-") add_library(GENERIC_G051C6UX INTERFACE) target_compile_options(GENERIC_G051C6UX INTERFACE - "SHELL:-DSTM32G051xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G051xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -56851,15 +56991,15 @@ target_compile_options(GENERIC_G051C6UX_serial_none INTERFACE ) add_library(GENERIC_G051C6UX_usb_CDC INTERFACE) target_compile_options(GENERIC_G051C6UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G051C6UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G051C6UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G051C6UX_usb_HID INTERFACE) target_compile_options(GENERIC_G051C6UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G051C6UX_usb_none INTERFACE) target_compile_options(GENERIC_G051C6UX_usb_none INTERFACE @@ -56876,7 +57016,7 @@ set(GENERIC_G051C8TX_MCU cortex-m0plus) set(GENERIC_G051C8TX_FPCONF "-") add_library(GENERIC_G051C8TX INTERFACE) target_compile_options(GENERIC_G051C8TX INTERFACE - "SHELL:-DSTM32G051xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G051xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -56921,15 +57061,15 @@ target_compile_options(GENERIC_G051C8TX_serial_none INTERFACE ) add_library(GENERIC_G051C8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_G051C8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G051C8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G051C8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G051C8TX_usb_HID INTERFACE) target_compile_options(GENERIC_G051C8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G051C8TX_usb_none INTERFACE) target_compile_options(GENERIC_G051C8TX_usb_none INTERFACE @@ -56946,7 +57086,7 @@ set(GENERIC_G051C8UX_MCU cortex-m0plus) set(GENERIC_G051C8UX_FPCONF "-") add_library(GENERIC_G051C8UX INTERFACE) target_compile_options(GENERIC_G051C8UX INTERFACE - "SHELL:-DSTM32G051xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G051xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -56991,15 +57131,15 @@ target_compile_options(GENERIC_G051C8UX_serial_none INTERFACE ) add_library(GENERIC_G051C8UX_usb_CDC INTERFACE) target_compile_options(GENERIC_G051C8UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G051C8UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G051C8UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G051C8UX_usb_HID INTERFACE) target_compile_options(GENERIC_G051C8UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G051C8UX_usb_none INTERFACE) target_compile_options(GENERIC_G051C8UX_usb_none INTERFACE @@ -57016,7 +57156,7 @@ set(GENERIC_G051F6PX_MCU cortex-m0plus) set(GENERIC_G051F6PX_FPCONF "-") add_library(GENERIC_G051F6PX INTERFACE) target_compile_options(GENERIC_G051F6PX INTERFACE - "SHELL:-DSTM32G051xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G051xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -57061,15 +57201,15 @@ target_compile_options(GENERIC_G051F6PX_serial_none INTERFACE ) add_library(GENERIC_G051F6PX_usb_CDC INTERFACE) target_compile_options(GENERIC_G051F6PX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G051F6PX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G051F6PX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G051F6PX_usb_HID INTERFACE) target_compile_options(GENERIC_G051F6PX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G051F6PX_usb_none INTERFACE) target_compile_options(GENERIC_G051F6PX_usb_none INTERFACE @@ -57086,7 +57226,7 @@ set(GENERIC_G051F8PX_MCU cortex-m0plus) set(GENERIC_G051F8PX_FPCONF "-") add_library(GENERIC_G051F8PX INTERFACE) target_compile_options(GENERIC_G051F8PX INTERFACE - "SHELL:-DSTM32G051xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G051xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -57131,15 +57271,15 @@ target_compile_options(GENERIC_G051F8PX_serial_none INTERFACE ) add_library(GENERIC_G051F8PX_usb_CDC INTERFACE) target_compile_options(GENERIC_G051F8PX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G051F8PX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G051F8PX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G051F8PX_usb_HID INTERFACE) target_compile_options(GENERIC_G051F8PX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G051F8PX_usb_none INTERFACE) target_compile_options(GENERIC_G051F8PX_usb_none INTERFACE @@ -57156,7 +57296,7 @@ set(GENERIC_G051F8YX_MCU cortex-m0plus) set(GENERIC_G051F8YX_FPCONF "-") add_library(GENERIC_G051F8YX INTERFACE) target_compile_options(GENERIC_G051F8YX INTERFACE - "SHELL:-DSTM32G051xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G051xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -57201,15 +57341,15 @@ target_compile_options(GENERIC_G051F8YX_serial_none INTERFACE ) add_library(GENERIC_G051F8YX_usb_CDC INTERFACE) target_compile_options(GENERIC_G051F8YX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G051F8YX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G051F8YX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G051F8YX_usb_HID INTERFACE) target_compile_options(GENERIC_G051F8YX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G051F8YX_usb_none INTERFACE) target_compile_options(GENERIC_G051F8YX_usb_none INTERFACE @@ -57226,7 +57366,7 @@ set(GENERIC_G051G6UX_MCU cortex-m0plus) set(GENERIC_G051G6UX_FPCONF "-") add_library(GENERIC_G051G6UX INTERFACE) target_compile_options(GENERIC_G051G6UX INTERFACE - "SHELL:-DSTM32G051xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G051xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -57271,15 +57411,15 @@ target_compile_options(GENERIC_G051G6UX_serial_none INTERFACE ) add_library(GENERIC_G051G6UX_usb_CDC INTERFACE) target_compile_options(GENERIC_G051G6UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G051G6UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G051G6UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G051G6UX_usb_HID INTERFACE) target_compile_options(GENERIC_G051G6UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G051G6UX_usb_none INTERFACE) target_compile_options(GENERIC_G051G6UX_usb_none INTERFACE @@ -57296,7 +57436,7 @@ set(GENERIC_G051G8UX_MCU cortex-m0plus) set(GENERIC_G051G8UX_FPCONF "-") add_library(GENERIC_G051G8UX INTERFACE) target_compile_options(GENERIC_G051G8UX INTERFACE - "SHELL:-DSTM32G051xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G051xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -57341,15 +57481,15 @@ target_compile_options(GENERIC_G051G8UX_serial_none INTERFACE ) add_library(GENERIC_G051G8UX_usb_CDC INTERFACE) target_compile_options(GENERIC_G051G8UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G051G8UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G051G8UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G051G8UX_usb_HID INTERFACE) target_compile_options(GENERIC_G051G8UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G051G8UX_usb_none INTERFACE) target_compile_options(GENERIC_G051G8UX_usb_none INTERFACE @@ -57366,7 +57506,7 @@ set(GENERIC_G051K6TX_MCU cortex-m0plus) set(GENERIC_G051K6TX_FPCONF "-") add_library(GENERIC_G051K6TX INTERFACE) target_compile_options(GENERIC_G051K6TX INTERFACE - "SHELL:-DSTM32G051xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G051xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -57411,15 +57551,15 @@ target_compile_options(GENERIC_G051K6TX_serial_none INTERFACE ) add_library(GENERIC_G051K6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_G051K6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G051K6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G051K6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G051K6TX_usb_HID INTERFACE) target_compile_options(GENERIC_G051K6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G051K6TX_usb_none INTERFACE) target_compile_options(GENERIC_G051K6TX_usb_none INTERFACE @@ -57436,7 +57576,7 @@ set(GENERIC_G051K6UX_MCU cortex-m0plus) set(GENERIC_G051K6UX_FPCONF "-") add_library(GENERIC_G051K6UX INTERFACE) target_compile_options(GENERIC_G051K6UX INTERFACE - "SHELL:-DSTM32G051xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G051xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -57481,15 +57621,15 @@ target_compile_options(GENERIC_G051K6UX_serial_none INTERFACE ) add_library(GENERIC_G051K6UX_usb_CDC INTERFACE) target_compile_options(GENERIC_G051K6UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G051K6UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G051K6UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G051K6UX_usb_HID INTERFACE) target_compile_options(GENERIC_G051K6UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G051K6UX_usb_none INTERFACE) target_compile_options(GENERIC_G051K6UX_usb_none INTERFACE @@ -57506,7 +57646,7 @@ set(GENERIC_G051K8TX_MCU cortex-m0plus) set(GENERIC_G051K8TX_FPCONF "-") add_library(GENERIC_G051K8TX INTERFACE) target_compile_options(GENERIC_G051K8TX INTERFACE - "SHELL:-DSTM32G051xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G051xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -57551,15 +57691,15 @@ target_compile_options(GENERIC_G051K8TX_serial_none INTERFACE ) add_library(GENERIC_G051K8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_G051K8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G051K8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G051K8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G051K8TX_usb_HID INTERFACE) target_compile_options(GENERIC_G051K8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G051K8TX_usb_none INTERFACE) target_compile_options(GENERIC_G051K8TX_usb_none INTERFACE @@ -57576,7 +57716,7 @@ set(GENERIC_G051K8UX_MCU cortex-m0plus) set(GENERIC_G051K8UX_FPCONF "-") add_library(GENERIC_G051K8UX INTERFACE) target_compile_options(GENERIC_G051K8UX INTERFACE - "SHELL:-DSTM32G051xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G051xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -57621,15 +57761,15 @@ target_compile_options(GENERIC_G051K8UX_serial_none INTERFACE ) add_library(GENERIC_G051K8UX_usb_CDC INTERFACE) target_compile_options(GENERIC_G051K8UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G051K8UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G051K8UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G051K8UX_usb_HID INTERFACE) target_compile_options(GENERIC_G051K8UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G051K8UX_usb_none INTERFACE) target_compile_options(GENERIC_G051K8UX_usb_none INTERFACE @@ -57646,7 +57786,7 @@ set(GENERIC_G061C6TX_MCU cortex-m0plus) set(GENERIC_G061C6TX_FPCONF "-") add_library(GENERIC_G061C6TX INTERFACE) target_compile_options(GENERIC_G061C6TX INTERFACE - "SHELL:-DSTM32G061xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G061xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -57691,15 +57831,15 @@ target_compile_options(GENERIC_G061C6TX_serial_none INTERFACE ) add_library(GENERIC_G061C6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_G061C6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G061C6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G061C6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G061C6TX_usb_HID INTERFACE) target_compile_options(GENERIC_G061C6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G061C6TX_usb_none INTERFACE) target_compile_options(GENERIC_G061C6TX_usb_none INTERFACE @@ -57716,7 +57856,7 @@ set(GENERIC_G061C6UX_MCU cortex-m0plus) set(GENERIC_G061C6UX_FPCONF "-") add_library(GENERIC_G061C6UX INTERFACE) target_compile_options(GENERIC_G061C6UX INTERFACE - "SHELL:-DSTM32G061xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G061xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -57761,15 +57901,15 @@ target_compile_options(GENERIC_G061C6UX_serial_none INTERFACE ) add_library(GENERIC_G061C6UX_usb_CDC INTERFACE) target_compile_options(GENERIC_G061C6UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G061C6UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G061C6UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G061C6UX_usb_HID INTERFACE) target_compile_options(GENERIC_G061C6UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G061C6UX_usb_none INTERFACE) target_compile_options(GENERIC_G061C6UX_usb_none INTERFACE @@ -57786,7 +57926,7 @@ set(GENERIC_G061C8TX_MCU cortex-m0plus) set(GENERIC_G061C8TX_FPCONF "-") add_library(GENERIC_G061C8TX INTERFACE) target_compile_options(GENERIC_G061C8TX INTERFACE - "SHELL:-DSTM32G061xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G061xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -57831,15 +57971,15 @@ target_compile_options(GENERIC_G061C8TX_serial_none INTERFACE ) add_library(GENERIC_G061C8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_G061C8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G061C8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G061C8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G061C8TX_usb_HID INTERFACE) target_compile_options(GENERIC_G061C8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G061C8TX_usb_none INTERFACE) target_compile_options(GENERIC_G061C8TX_usb_none INTERFACE @@ -57856,7 +57996,7 @@ set(GENERIC_G061C8UX_MCU cortex-m0plus) set(GENERIC_G061C8UX_FPCONF "-") add_library(GENERIC_G061C8UX INTERFACE) target_compile_options(GENERIC_G061C8UX INTERFACE - "SHELL:-DSTM32G061xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G061xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -57901,15 +58041,15 @@ target_compile_options(GENERIC_G061C8UX_serial_none INTERFACE ) add_library(GENERIC_G061C8UX_usb_CDC INTERFACE) target_compile_options(GENERIC_G061C8UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G061C8UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G061C8UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G061C8UX_usb_HID INTERFACE) target_compile_options(GENERIC_G061C8UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G061C8UX_usb_none INTERFACE) target_compile_options(GENERIC_G061C8UX_usb_none INTERFACE @@ -57926,7 +58066,7 @@ set(GENERIC_G061F6PX_MCU cortex-m0plus) set(GENERIC_G061F6PX_FPCONF "-") add_library(GENERIC_G061F6PX INTERFACE) target_compile_options(GENERIC_G061F6PX INTERFACE - "SHELL:-DSTM32G061xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G061xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -57971,15 +58111,15 @@ target_compile_options(GENERIC_G061F6PX_serial_none INTERFACE ) add_library(GENERIC_G061F6PX_usb_CDC INTERFACE) target_compile_options(GENERIC_G061F6PX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G061F6PX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G061F6PX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G061F6PX_usb_HID INTERFACE) target_compile_options(GENERIC_G061F6PX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G061F6PX_usb_none INTERFACE) target_compile_options(GENERIC_G061F6PX_usb_none INTERFACE @@ -57996,7 +58136,7 @@ set(GENERIC_G061F8PX_MCU cortex-m0plus) set(GENERIC_G061F8PX_FPCONF "-") add_library(GENERIC_G061F8PX INTERFACE) target_compile_options(GENERIC_G061F8PX INTERFACE - "SHELL:-DSTM32G061xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G061xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -58041,15 +58181,15 @@ target_compile_options(GENERIC_G061F8PX_serial_none INTERFACE ) add_library(GENERIC_G061F8PX_usb_CDC INTERFACE) target_compile_options(GENERIC_G061F8PX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G061F8PX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G061F8PX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G061F8PX_usb_HID INTERFACE) target_compile_options(GENERIC_G061F8PX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G061F8PX_usb_none INTERFACE) target_compile_options(GENERIC_G061F8PX_usb_none INTERFACE @@ -58066,7 +58206,7 @@ set(GENERIC_G061F8YX_MCU cortex-m0plus) set(GENERIC_G061F8YX_FPCONF "-") add_library(GENERIC_G061F8YX INTERFACE) target_compile_options(GENERIC_G061F8YX INTERFACE - "SHELL:-DSTM32G061xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G061xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -58111,15 +58251,15 @@ target_compile_options(GENERIC_G061F8YX_serial_none INTERFACE ) add_library(GENERIC_G061F8YX_usb_CDC INTERFACE) target_compile_options(GENERIC_G061F8YX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G061F8YX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G061F8YX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G061F8YX_usb_HID INTERFACE) target_compile_options(GENERIC_G061F8YX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G061F8YX_usb_none INTERFACE) target_compile_options(GENERIC_G061F8YX_usb_none INTERFACE @@ -58136,7 +58276,7 @@ set(GENERIC_G061G6UX_MCU cortex-m0plus) set(GENERIC_G061G6UX_FPCONF "-") add_library(GENERIC_G061G6UX INTERFACE) target_compile_options(GENERIC_G061G6UX INTERFACE - "SHELL:-DSTM32G061xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G061xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -58181,15 +58321,15 @@ target_compile_options(GENERIC_G061G6UX_serial_none INTERFACE ) add_library(GENERIC_G061G6UX_usb_CDC INTERFACE) target_compile_options(GENERIC_G061G6UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G061G6UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G061G6UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G061G6UX_usb_HID INTERFACE) target_compile_options(GENERIC_G061G6UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G061G6UX_usb_none INTERFACE) target_compile_options(GENERIC_G061G6UX_usb_none INTERFACE @@ -58206,7 +58346,7 @@ set(GENERIC_G061G8UX_MCU cortex-m0plus) set(GENERIC_G061G8UX_FPCONF "-") add_library(GENERIC_G061G8UX INTERFACE) target_compile_options(GENERIC_G061G8UX INTERFACE - "SHELL:-DSTM32G061xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G061xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -58251,15 +58391,15 @@ target_compile_options(GENERIC_G061G8UX_serial_none INTERFACE ) add_library(GENERIC_G061G8UX_usb_CDC INTERFACE) target_compile_options(GENERIC_G061G8UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G061G8UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G061G8UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G061G8UX_usb_HID INTERFACE) target_compile_options(GENERIC_G061G8UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G061G8UX_usb_none INTERFACE) target_compile_options(GENERIC_G061G8UX_usb_none INTERFACE @@ -58276,7 +58416,7 @@ set(GENERIC_G061K6TX_MCU cortex-m0plus) set(GENERIC_G061K6TX_FPCONF "-") add_library(GENERIC_G061K6TX INTERFACE) target_compile_options(GENERIC_G061K6TX INTERFACE - "SHELL:-DSTM32G061xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G061xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -58321,15 +58461,15 @@ target_compile_options(GENERIC_G061K6TX_serial_none INTERFACE ) add_library(GENERIC_G061K6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_G061K6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G061K6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G061K6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G061K6TX_usb_HID INTERFACE) target_compile_options(GENERIC_G061K6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G061K6TX_usb_none INTERFACE) target_compile_options(GENERIC_G061K6TX_usb_none INTERFACE @@ -58346,7 +58486,7 @@ set(GENERIC_G061K6UX_MCU cortex-m0plus) set(GENERIC_G061K6UX_FPCONF "-") add_library(GENERIC_G061K6UX INTERFACE) target_compile_options(GENERIC_G061K6UX INTERFACE - "SHELL:-DSTM32G061xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G061xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -58391,15 +58531,15 @@ target_compile_options(GENERIC_G061K6UX_serial_none INTERFACE ) add_library(GENERIC_G061K6UX_usb_CDC INTERFACE) target_compile_options(GENERIC_G061K6UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G061K6UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G061K6UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G061K6UX_usb_HID INTERFACE) target_compile_options(GENERIC_G061K6UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G061K6UX_usb_none INTERFACE) target_compile_options(GENERIC_G061K6UX_usb_none INTERFACE @@ -58416,7 +58556,7 @@ set(GENERIC_G061K8TX_MCU cortex-m0plus) set(GENERIC_G061K8TX_FPCONF "-") add_library(GENERIC_G061K8TX INTERFACE) target_compile_options(GENERIC_G061K8TX INTERFACE - "SHELL:-DSTM32G061xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G061xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -58461,15 +58601,15 @@ target_compile_options(GENERIC_G061K8TX_serial_none INTERFACE ) add_library(GENERIC_G061K8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_G061K8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G061K8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G061K8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G061K8TX_usb_HID INTERFACE) target_compile_options(GENERIC_G061K8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G061K8TX_usb_none INTERFACE) target_compile_options(GENERIC_G061K8TX_usb_none INTERFACE @@ -58486,7 +58626,7 @@ set(GENERIC_G061K8UX_MCU cortex-m0plus) set(GENERIC_G061K8UX_FPCONF "-") add_library(GENERIC_G061K8UX INTERFACE) target_compile_options(GENERIC_G061K8UX INTERFACE - "SHELL:-DSTM32G061xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G061xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -58531,15 +58671,15 @@ target_compile_options(GENERIC_G061K8UX_serial_none INTERFACE ) add_library(GENERIC_G061K8UX_usb_CDC INTERFACE) target_compile_options(GENERIC_G061K8UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G061K8UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G061K8UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G061K8UX_usb_HID INTERFACE) target_compile_options(GENERIC_G061K8UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G061K8UX_usb_none INTERFACE) target_compile_options(GENERIC_G061K8UX_usb_none INTERFACE @@ -58556,7 +58696,7 @@ set(GENERIC_G070CBTX_MCU cortex-m0plus) set(GENERIC_G070CBTX_FPCONF "-") add_library(GENERIC_G070CBTX INTERFACE) target_compile_options(GENERIC_G070CBTX INTERFACE - "SHELL:-DSTM32G070xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G070xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -58601,15 +58741,15 @@ target_compile_options(GENERIC_G070CBTX_serial_none INTERFACE ) add_library(GENERIC_G070CBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G070CBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G070CBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G070CBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G070CBTX_usb_HID INTERFACE) target_compile_options(GENERIC_G070CBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G070CBTX_usb_none INTERFACE) target_compile_options(GENERIC_G070CBTX_usb_none INTERFACE @@ -58626,7 +58766,7 @@ set(GENERIC_G070KBTX_MCU cortex-m0plus) set(GENERIC_G070KBTX_FPCONF "-") add_library(GENERIC_G070KBTX INTERFACE) target_compile_options(GENERIC_G070KBTX INTERFACE - "SHELL:-DSTM32G070xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G070xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -58671,15 +58811,15 @@ target_compile_options(GENERIC_G070KBTX_serial_none INTERFACE ) add_library(GENERIC_G070KBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G070KBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G070KBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G070KBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G070KBTX_usb_HID INTERFACE) target_compile_options(GENERIC_G070KBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G070KBTX_usb_none INTERFACE) target_compile_options(GENERIC_G070KBTX_usb_none INTERFACE @@ -58696,7 +58836,7 @@ set(GENERIC_G070RBTX_MCU cortex-m0plus) set(GENERIC_G070RBTX_FPCONF "-") add_library(GENERIC_G070RBTX INTERFACE) target_compile_options(GENERIC_G070RBTX INTERFACE - "SHELL:-DSTM32G070xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G070xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -58741,15 +58881,15 @@ target_compile_options(GENERIC_G070RBTX_serial_none INTERFACE ) add_library(GENERIC_G070RBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G070RBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G070RBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G070RBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G070RBTX_usb_HID INTERFACE) target_compile_options(GENERIC_G070RBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G070RBTX_usb_none INTERFACE) target_compile_options(GENERIC_G070RBTX_usb_none INTERFACE @@ -58766,7 +58906,7 @@ set(GENERIC_G071C6TX_MCU cortex-m0plus) set(GENERIC_G071C6TX_FPCONF "-") add_library(GENERIC_G071C6TX INTERFACE) target_compile_options(GENERIC_G071C6TX INTERFACE - "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -58811,15 +58951,15 @@ target_compile_options(GENERIC_G071C6TX_serial_none INTERFACE ) add_library(GENERIC_G071C6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_G071C6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G071C6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G071C6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G071C6TX_usb_HID INTERFACE) target_compile_options(GENERIC_G071C6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G071C6TX_usb_none INTERFACE) target_compile_options(GENERIC_G071C6TX_usb_none INTERFACE @@ -58836,7 +58976,7 @@ set(GENERIC_G071C6UX_MCU cortex-m0plus) set(GENERIC_G071C6UX_FPCONF "-") add_library(GENERIC_G071C6UX INTERFACE) target_compile_options(GENERIC_G071C6UX INTERFACE - "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -58881,15 +59021,15 @@ target_compile_options(GENERIC_G071C6UX_serial_none INTERFACE ) add_library(GENERIC_G071C6UX_usb_CDC INTERFACE) target_compile_options(GENERIC_G071C6UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G071C6UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G071C6UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G071C6UX_usb_HID INTERFACE) target_compile_options(GENERIC_G071C6UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G071C6UX_usb_none INTERFACE) target_compile_options(GENERIC_G071C6UX_usb_none INTERFACE @@ -58906,7 +59046,7 @@ set(GENERIC_G071C8TX_MCU cortex-m0plus) set(GENERIC_G071C8TX_FPCONF "-") add_library(GENERIC_G071C8TX INTERFACE) target_compile_options(GENERIC_G071C8TX INTERFACE - "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -58951,15 +59091,15 @@ target_compile_options(GENERIC_G071C8TX_serial_none INTERFACE ) add_library(GENERIC_G071C8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_G071C8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G071C8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G071C8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G071C8TX_usb_HID INTERFACE) target_compile_options(GENERIC_G071C8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G071C8TX_usb_none INTERFACE) target_compile_options(GENERIC_G071C8TX_usb_none INTERFACE @@ -58976,7 +59116,7 @@ set(GENERIC_G071C8UX_MCU cortex-m0plus) set(GENERIC_G071C8UX_FPCONF "-") add_library(GENERIC_G071C8UX INTERFACE) target_compile_options(GENERIC_G071C8UX INTERFACE - "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -59021,15 +59161,15 @@ target_compile_options(GENERIC_G071C8UX_serial_none INTERFACE ) add_library(GENERIC_G071C8UX_usb_CDC INTERFACE) target_compile_options(GENERIC_G071C8UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G071C8UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G071C8UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G071C8UX_usb_HID INTERFACE) target_compile_options(GENERIC_G071C8UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G071C8UX_usb_none INTERFACE) target_compile_options(GENERIC_G071C8UX_usb_none INTERFACE @@ -59046,7 +59186,7 @@ set(GENERIC_G071CBTX_MCU cortex-m0plus) set(GENERIC_G071CBTX_FPCONF "-") add_library(GENERIC_G071CBTX INTERFACE) target_compile_options(GENERIC_G071CBTX INTERFACE - "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -59091,15 +59231,15 @@ target_compile_options(GENERIC_G071CBTX_serial_none INTERFACE ) add_library(GENERIC_G071CBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G071CBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G071CBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G071CBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G071CBTX_usb_HID INTERFACE) target_compile_options(GENERIC_G071CBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G071CBTX_usb_none INTERFACE) target_compile_options(GENERIC_G071CBTX_usb_none INTERFACE @@ -59116,7 +59256,7 @@ set(GENERIC_G071CBUX_MCU cortex-m0plus) set(GENERIC_G071CBUX_FPCONF "-") add_library(GENERIC_G071CBUX INTERFACE) target_compile_options(GENERIC_G071CBUX INTERFACE - "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -59161,15 +59301,15 @@ target_compile_options(GENERIC_G071CBUX_serial_none INTERFACE ) add_library(GENERIC_G071CBUX_usb_CDC INTERFACE) target_compile_options(GENERIC_G071CBUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G071CBUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G071CBUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G071CBUX_usb_HID INTERFACE) target_compile_options(GENERIC_G071CBUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G071CBUX_usb_none INTERFACE) target_compile_options(GENERIC_G071CBUX_usb_none INTERFACE @@ -59186,7 +59326,7 @@ set(GENERIC_G071EBYX_MCU cortex-m0plus) set(GENERIC_G071EBYX_FPCONF "-") add_library(GENERIC_G071EBYX INTERFACE) target_compile_options(GENERIC_G071EBYX INTERFACE - "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -59231,15 +59371,15 @@ target_compile_options(GENERIC_G071EBYX_serial_none INTERFACE ) add_library(GENERIC_G071EBYX_usb_CDC INTERFACE) target_compile_options(GENERIC_G071EBYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G071EBYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G071EBYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G071EBYX_usb_HID INTERFACE) target_compile_options(GENERIC_G071EBYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G071EBYX_usb_none INTERFACE) target_compile_options(GENERIC_G071EBYX_usb_none INTERFACE @@ -59256,7 +59396,7 @@ set(GENERIC_G071G6UX_MCU cortex-m0plus) set(GENERIC_G071G6UX_FPCONF "-") add_library(GENERIC_G071G6UX INTERFACE) target_compile_options(GENERIC_G071G6UX INTERFACE - "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -59301,15 +59441,15 @@ target_compile_options(GENERIC_G071G6UX_serial_none INTERFACE ) add_library(GENERIC_G071G6UX_usb_CDC INTERFACE) target_compile_options(GENERIC_G071G6UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G071G6UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G071G6UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G071G6UX_usb_HID INTERFACE) target_compile_options(GENERIC_G071G6UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G071G6UX_usb_none INTERFACE) target_compile_options(GENERIC_G071G6UX_usb_none INTERFACE @@ -59326,7 +59466,7 @@ set(GENERIC_G071G8UX_MCU cortex-m0plus) set(GENERIC_G071G8UX_FPCONF "-") add_library(GENERIC_G071G8UX INTERFACE) target_compile_options(GENERIC_G071G8UX INTERFACE - "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -59371,15 +59511,15 @@ target_compile_options(GENERIC_G071G8UX_serial_none INTERFACE ) add_library(GENERIC_G071G8UX_usb_CDC INTERFACE) target_compile_options(GENERIC_G071G8UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G071G8UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G071G8UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G071G8UX_usb_HID INTERFACE) target_compile_options(GENERIC_G071G8UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G071G8UX_usb_none INTERFACE) target_compile_options(GENERIC_G071G8UX_usb_none INTERFACE @@ -59396,7 +59536,7 @@ set(GENERIC_G071G8UXN_MCU cortex-m0plus) set(GENERIC_G071G8UXN_FPCONF "-") add_library(GENERIC_G071G8UXN INTERFACE) target_compile_options(GENERIC_G071G8UXN INTERFACE - "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -59441,15 +59581,15 @@ target_compile_options(GENERIC_G071G8UXN_serial_none INTERFACE ) add_library(GENERIC_G071G8UXN_usb_CDC INTERFACE) target_compile_options(GENERIC_G071G8UXN_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G071G8UXN_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G071G8UXN_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G071G8UXN_usb_HID INTERFACE) target_compile_options(GENERIC_G071G8UXN_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G071G8UXN_usb_none INTERFACE) target_compile_options(GENERIC_G071G8UXN_usb_none INTERFACE @@ -59466,7 +59606,7 @@ set(GENERIC_G071GBUX_MCU cortex-m0plus) set(GENERIC_G071GBUX_FPCONF "-") add_library(GENERIC_G071GBUX INTERFACE) target_compile_options(GENERIC_G071GBUX INTERFACE - "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -59511,15 +59651,15 @@ target_compile_options(GENERIC_G071GBUX_serial_none INTERFACE ) add_library(GENERIC_G071GBUX_usb_CDC INTERFACE) target_compile_options(GENERIC_G071GBUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G071GBUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G071GBUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G071GBUX_usb_HID INTERFACE) target_compile_options(GENERIC_G071GBUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G071GBUX_usb_none INTERFACE) target_compile_options(GENERIC_G071GBUX_usb_none INTERFACE @@ -59536,7 +59676,7 @@ set(GENERIC_G071GBUXN_MCU cortex-m0plus) set(GENERIC_G071GBUXN_FPCONF "-") add_library(GENERIC_G071GBUXN INTERFACE) target_compile_options(GENERIC_G071GBUXN INTERFACE - "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -59581,15 +59721,15 @@ target_compile_options(GENERIC_G071GBUXN_serial_none INTERFACE ) add_library(GENERIC_G071GBUXN_usb_CDC INTERFACE) target_compile_options(GENERIC_G071GBUXN_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G071GBUXN_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G071GBUXN_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G071GBUXN_usb_HID INTERFACE) target_compile_options(GENERIC_G071GBUXN_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G071GBUXN_usb_none INTERFACE) target_compile_options(GENERIC_G071GBUXN_usb_none INTERFACE @@ -59606,7 +59746,7 @@ set(GENERIC_G071K6TX_MCU cortex-m0plus) set(GENERIC_G071K6TX_FPCONF "-") add_library(GENERIC_G071K6TX INTERFACE) target_compile_options(GENERIC_G071K6TX INTERFACE - "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -59651,15 +59791,15 @@ target_compile_options(GENERIC_G071K6TX_serial_none INTERFACE ) add_library(GENERIC_G071K6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_G071K6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G071K6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G071K6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G071K6TX_usb_HID INTERFACE) target_compile_options(GENERIC_G071K6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G071K6TX_usb_none INTERFACE) target_compile_options(GENERIC_G071K6TX_usb_none INTERFACE @@ -59676,7 +59816,7 @@ set(GENERIC_G071K6UX_MCU cortex-m0plus) set(GENERIC_G071K6UX_FPCONF "-") add_library(GENERIC_G071K6UX INTERFACE) target_compile_options(GENERIC_G071K6UX INTERFACE - "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -59721,15 +59861,15 @@ target_compile_options(GENERIC_G071K6UX_serial_none INTERFACE ) add_library(GENERIC_G071K6UX_usb_CDC INTERFACE) target_compile_options(GENERIC_G071K6UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G071K6UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G071K6UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G071K6UX_usb_HID INTERFACE) target_compile_options(GENERIC_G071K6UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G071K6UX_usb_none INTERFACE) target_compile_options(GENERIC_G071K6UX_usb_none INTERFACE @@ -59746,7 +59886,7 @@ set(GENERIC_G071K8TX_MCU cortex-m0plus) set(GENERIC_G071K8TX_FPCONF "-") add_library(GENERIC_G071K8TX INTERFACE) target_compile_options(GENERIC_G071K8TX INTERFACE - "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -59791,15 +59931,15 @@ target_compile_options(GENERIC_G071K8TX_serial_none INTERFACE ) add_library(GENERIC_G071K8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_G071K8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G071K8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G071K8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G071K8TX_usb_HID INTERFACE) target_compile_options(GENERIC_G071K8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G071K8TX_usb_none INTERFACE) target_compile_options(GENERIC_G071K8TX_usb_none INTERFACE @@ -59816,7 +59956,7 @@ set(GENERIC_G071K8UX_MCU cortex-m0plus) set(GENERIC_G071K8UX_FPCONF "-") add_library(GENERIC_G071K8UX INTERFACE) target_compile_options(GENERIC_G071K8UX INTERFACE - "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -59861,15 +60001,15 @@ target_compile_options(GENERIC_G071K8UX_serial_none INTERFACE ) add_library(GENERIC_G071K8UX_usb_CDC INTERFACE) target_compile_options(GENERIC_G071K8UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G071K8UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G071K8UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G071K8UX_usb_HID INTERFACE) target_compile_options(GENERIC_G071K8UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G071K8UX_usb_none INTERFACE) target_compile_options(GENERIC_G071K8UX_usb_none INTERFACE @@ -59886,7 +60026,7 @@ set(GENERIC_G071KBTX_MCU cortex-m0plus) set(GENERIC_G071KBTX_FPCONF "-") add_library(GENERIC_G071KBTX INTERFACE) target_compile_options(GENERIC_G071KBTX INTERFACE - "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -59931,15 +60071,15 @@ target_compile_options(GENERIC_G071KBTX_serial_none INTERFACE ) add_library(GENERIC_G071KBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G071KBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G071KBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G071KBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G071KBTX_usb_HID INTERFACE) target_compile_options(GENERIC_G071KBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G071KBTX_usb_none INTERFACE) target_compile_options(GENERIC_G071KBTX_usb_none INTERFACE @@ -59956,7 +60096,7 @@ set(GENERIC_G071KBUX_MCU cortex-m0plus) set(GENERIC_G071KBUX_FPCONF "-") add_library(GENERIC_G071KBUX INTERFACE) target_compile_options(GENERIC_G071KBUX INTERFACE - "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -60001,15 +60141,15 @@ target_compile_options(GENERIC_G071KBUX_serial_none INTERFACE ) add_library(GENERIC_G071KBUX_usb_CDC INTERFACE) target_compile_options(GENERIC_G071KBUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G071KBUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G071KBUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G071KBUX_usb_HID INTERFACE) target_compile_options(GENERIC_G071KBUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G071KBUX_usb_none INTERFACE) target_compile_options(GENERIC_G071KBUX_usb_none INTERFACE @@ -60026,7 +60166,7 @@ set(GENERIC_G071R6TX_MCU cortex-m0plus) set(GENERIC_G071R6TX_FPCONF "-") add_library(GENERIC_G071R6TX INTERFACE) target_compile_options(GENERIC_G071R6TX INTERFACE - "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -60071,15 +60211,15 @@ target_compile_options(GENERIC_G071R6TX_serial_none INTERFACE ) add_library(GENERIC_G071R6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_G071R6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G071R6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G071R6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G071R6TX_usb_HID INTERFACE) target_compile_options(GENERIC_G071R6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G071R6TX_usb_none INTERFACE) target_compile_options(GENERIC_G071R6TX_usb_none INTERFACE @@ -60096,7 +60236,7 @@ set(GENERIC_G071R8TX_MCU cortex-m0plus) set(GENERIC_G071R8TX_FPCONF "-") add_library(GENERIC_G071R8TX INTERFACE) target_compile_options(GENERIC_G071R8TX INTERFACE - "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -60141,15 +60281,15 @@ target_compile_options(GENERIC_G071R8TX_serial_none INTERFACE ) add_library(GENERIC_G071R8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_G071R8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G071R8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G071R8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G071R8TX_usb_HID INTERFACE) target_compile_options(GENERIC_G071R8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G071R8TX_usb_none INTERFACE) target_compile_options(GENERIC_G071R8TX_usb_none INTERFACE @@ -60166,7 +60306,7 @@ set(GENERIC_G071RBIX_MCU cortex-m0plus) set(GENERIC_G071RBIX_FPCONF "-") add_library(GENERIC_G071RBIX INTERFACE) target_compile_options(GENERIC_G071RBIX INTERFACE - "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -60211,15 +60351,15 @@ target_compile_options(GENERIC_G071RBIX_serial_none INTERFACE ) add_library(GENERIC_G071RBIX_usb_CDC INTERFACE) target_compile_options(GENERIC_G071RBIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G071RBIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G071RBIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G071RBIX_usb_HID INTERFACE) target_compile_options(GENERIC_G071RBIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G071RBIX_usb_none INTERFACE) target_compile_options(GENERIC_G071RBIX_usb_none INTERFACE @@ -60236,7 +60376,7 @@ set(GENERIC_G071RBTX_MCU cortex-m0plus) set(GENERIC_G071RBTX_FPCONF "-") add_library(GENERIC_G071RBTX INTERFACE) target_compile_options(GENERIC_G071RBTX INTERFACE - "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -60281,15 +60421,15 @@ target_compile_options(GENERIC_G071RBTX_serial_none INTERFACE ) add_library(GENERIC_G071RBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G071RBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G071RBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G071RBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G071RBTX_usb_HID INTERFACE) target_compile_options(GENERIC_G071RBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G071RBTX_usb_none INTERFACE) target_compile_options(GENERIC_G071RBTX_usb_none INTERFACE @@ -60306,7 +60446,7 @@ set(GENERIC_G081CBTX_MCU cortex-m0plus) set(GENERIC_G081CBTX_FPCONF "-") add_library(GENERIC_G081CBTX INTERFACE) target_compile_options(GENERIC_G081CBTX INTERFACE - "SHELL:-DSTM32G081xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G081xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -60351,15 +60491,15 @@ target_compile_options(GENERIC_G081CBTX_serial_none INTERFACE ) add_library(GENERIC_G081CBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G081CBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G081CBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G081CBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G081CBTX_usb_HID INTERFACE) target_compile_options(GENERIC_G081CBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G081CBTX_usb_none INTERFACE) target_compile_options(GENERIC_G081CBTX_usb_none INTERFACE @@ -60376,7 +60516,7 @@ set(GENERIC_G081CBUX_MCU cortex-m0plus) set(GENERIC_G081CBUX_FPCONF "-") add_library(GENERIC_G081CBUX INTERFACE) target_compile_options(GENERIC_G081CBUX INTERFACE - "SHELL:-DSTM32G081xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G081xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -60421,15 +60561,15 @@ target_compile_options(GENERIC_G081CBUX_serial_none INTERFACE ) add_library(GENERIC_G081CBUX_usb_CDC INTERFACE) target_compile_options(GENERIC_G081CBUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G081CBUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G081CBUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G081CBUX_usb_HID INTERFACE) target_compile_options(GENERIC_G081CBUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G081CBUX_usb_none INTERFACE) target_compile_options(GENERIC_G081CBUX_usb_none INTERFACE @@ -60446,7 +60586,7 @@ set(GENERIC_G081EBYX_MCU cortex-m0plus) set(GENERIC_G081EBYX_FPCONF "-") add_library(GENERIC_G081EBYX INTERFACE) target_compile_options(GENERIC_G081EBYX INTERFACE - "SHELL:-DSTM32G081xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G081xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -60491,15 +60631,15 @@ target_compile_options(GENERIC_G081EBYX_serial_none INTERFACE ) add_library(GENERIC_G081EBYX_usb_CDC INTERFACE) target_compile_options(GENERIC_G081EBYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G081EBYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G081EBYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G081EBYX_usb_HID INTERFACE) target_compile_options(GENERIC_G081EBYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G081EBYX_usb_none INTERFACE) target_compile_options(GENERIC_G081EBYX_usb_none INTERFACE @@ -60516,7 +60656,7 @@ set(GENERIC_G081GBUX_MCU cortex-m0plus) set(GENERIC_G081GBUX_FPCONF "-") add_library(GENERIC_G081GBUX INTERFACE) target_compile_options(GENERIC_G081GBUX INTERFACE - "SHELL:-DSTM32G081xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G081xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -60561,15 +60701,15 @@ target_compile_options(GENERIC_G081GBUX_serial_none INTERFACE ) add_library(GENERIC_G081GBUX_usb_CDC INTERFACE) target_compile_options(GENERIC_G081GBUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G081GBUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G081GBUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G081GBUX_usb_HID INTERFACE) target_compile_options(GENERIC_G081GBUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G081GBUX_usb_none INTERFACE) target_compile_options(GENERIC_G081GBUX_usb_none INTERFACE @@ -60586,7 +60726,7 @@ set(GENERIC_G081GBUXN_MCU cortex-m0plus) set(GENERIC_G081GBUXN_FPCONF "-") add_library(GENERIC_G081GBUXN INTERFACE) target_compile_options(GENERIC_G081GBUXN INTERFACE - "SHELL:-DSTM32G081xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G081xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -60631,15 +60771,15 @@ target_compile_options(GENERIC_G081GBUXN_serial_none INTERFACE ) add_library(GENERIC_G081GBUXN_usb_CDC INTERFACE) target_compile_options(GENERIC_G081GBUXN_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G081GBUXN_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G081GBUXN_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G081GBUXN_usb_HID INTERFACE) target_compile_options(GENERIC_G081GBUXN_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G081GBUXN_usb_none INTERFACE) target_compile_options(GENERIC_G081GBUXN_usb_none INTERFACE @@ -60656,7 +60796,7 @@ set(GENERIC_G081KBTX_MCU cortex-m0plus) set(GENERIC_G081KBTX_FPCONF "-") add_library(GENERIC_G081KBTX INTERFACE) target_compile_options(GENERIC_G081KBTX INTERFACE - "SHELL:-DSTM32G081xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G081xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -60701,15 +60841,15 @@ target_compile_options(GENERIC_G081KBTX_serial_none INTERFACE ) add_library(GENERIC_G081KBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G081KBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G081KBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G081KBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G081KBTX_usb_HID INTERFACE) target_compile_options(GENERIC_G081KBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G081KBTX_usb_none INTERFACE) target_compile_options(GENERIC_G081KBTX_usb_none INTERFACE @@ -60726,7 +60866,7 @@ set(GENERIC_G081KBUX_MCU cortex-m0plus) set(GENERIC_G081KBUX_FPCONF "-") add_library(GENERIC_G081KBUX INTERFACE) target_compile_options(GENERIC_G081KBUX INTERFACE - "SHELL:-DSTM32G081xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G081xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -60771,15 +60911,15 @@ target_compile_options(GENERIC_G081KBUX_serial_none INTERFACE ) add_library(GENERIC_G081KBUX_usb_CDC INTERFACE) target_compile_options(GENERIC_G081KBUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G081KBUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G081KBUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G081KBUX_usb_HID INTERFACE) target_compile_options(GENERIC_G081KBUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G081KBUX_usb_none INTERFACE) target_compile_options(GENERIC_G081KBUX_usb_none INTERFACE @@ -60796,7 +60936,7 @@ set(GENERIC_G081RBIX_MCU cortex-m0plus) set(GENERIC_G081RBIX_FPCONF "-") add_library(GENERIC_G081RBIX INTERFACE) target_compile_options(GENERIC_G081RBIX INTERFACE - "SHELL:-DSTM32G081xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G081xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -60841,15 +60981,15 @@ target_compile_options(GENERIC_G081RBIX_serial_none INTERFACE ) add_library(GENERIC_G081RBIX_usb_CDC INTERFACE) target_compile_options(GENERIC_G081RBIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G081RBIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G081RBIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G081RBIX_usb_HID INTERFACE) target_compile_options(GENERIC_G081RBIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G081RBIX_usb_none INTERFACE) target_compile_options(GENERIC_G081RBIX_usb_none INTERFACE @@ -60866,7 +61006,7 @@ set(GENERIC_G081RBTX_MCU cortex-m0plus) set(GENERIC_G081RBTX_FPCONF "-") add_library(GENERIC_G081RBTX INTERFACE) target_compile_options(GENERIC_G081RBTX INTERFACE - "SHELL:-DSTM32G081xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G081xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -60911,15 +61051,15 @@ target_compile_options(GENERIC_G081RBTX_serial_none INTERFACE ) add_library(GENERIC_G081RBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G081RBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G081RBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G081RBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G081RBTX_usb_HID INTERFACE) target_compile_options(GENERIC_G081RBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G081RBTX_usb_none INTERFACE) target_compile_options(GENERIC_G081RBTX_usb_none INTERFACE @@ -60936,7 +61076,7 @@ set(GENERIC_G0B0CETX_MCU cortex-m0plus) set(GENERIC_G0B0CETX_FPCONF "-") add_library(GENERIC_G0B0CETX INTERFACE) target_compile_options(GENERIC_G0B0CETX INTERFACE - "SHELL:-DSTM32G0B0xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G0B0xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -60981,15 +61121,15 @@ target_compile_options(GENERIC_G0B0CETX_serial_none INTERFACE ) add_library(GENERIC_G0B0CETX_usb_CDC INTERFACE) target_compile_options(GENERIC_G0B0CETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G0B0CETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G0B0CETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G0B0CETX_usb_HID INTERFACE) target_compile_options(GENERIC_G0B0CETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G0B0CETX_usb_none INTERFACE) target_compile_options(GENERIC_G0B0CETX_usb_none INTERFACE @@ -61006,7 +61146,7 @@ set(GENERIC_G0B0RETX_MCU cortex-m0plus) set(GENERIC_G0B0RETX_FPCONF "-") add_library(GENERIC_G0B0RETX INTERFACE) target_compile_options(GENERIC_G0B0RETX INTERFACE - "SHELL:-DSTM32G0B0xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G0B0xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -61051,15 +61191,15 @@ target_compile_options(GENERIC_G0B0RETX_serial_none INTERFACE ) add_library(GENERIC_G0B0RETX_usb_CDC INTERFACE) target_compile_options(GENERIC_G0B0RETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G0B0RETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G0B0RETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G0B0RETX_usb_HID INTERFACE) target_compile_options(GENERIC_G0B0RETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G0B0RETX_usb_none INTERFACE) target_compile_options(GENERIC_G0B0RETX_usb_none INTERFACE @@ -61076,7 +61216,7 @@ set(GENERIC_G0B0VETX_MCU cortex-m0plus) set(GENERIC_G0B0VETX_FPCONF "-") add_library(GENERIC_G0B0VETX INTERFACE) target_compile_options(GENERIC_G0B0VETX INTERFACE - "SHELL:-DSTM32G0B0xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G0B0xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -61121,15 +61261,15 @@ target_compile_options(GENERIC_G0B0VETX_serial_none INTERFACE ) add_library(GENERIC_G0B0VETX_usb_CDC INTERFACE) target_compile_options(GENERIC_G0B0VETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G0B0VETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G0B0VETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G0B0VETX_usb_HID INTERFACE) target_compile_options(GENERIC_G0B0VETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G0B0VETX_usb_none INTERFACE) target_compile_options(GENERIC_G0B0VETX_usb_none INTERFACE @@ -61146,7 +61286,7 @@ set(GENERIC_G0B1CBTX_MCU cortex-m0plus) set(GENERIC_G0B1CBTX_FPCONF "-") add_library(GENERIC_G0B1CBTX INTERFACE) target_compile_options(GENERIC_G0B1CBTX INTERFACE - "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -61191,15 +61331,15 @@ target_compile_options(GENERIC_G0B1CBTX_serial_none INTERFACE ) add_library(GENERIC_G0B1CBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G0B1CBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G0B1CBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G0B1CBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G0B1CBTX_usb_HID INTERFACE) target_compile_options(GENERIC_G0B1CBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G0B1CBTX_usb_none INTERFACE) target_compile_options(GENERIC_G0B1CBTX_usb_none INTERFACE @@ -61216,7 +61356,7 @@ set(GENERIC_G0B1CBUX_MCU cortex-m0plus) set(GENERIC_G0B1CBUX_FPCONF "-") add_library(GENERIC_G0B1CBUX INTERFACE) target_compile_options(GENERIC_G0B1CBUX INTERFACE - "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -61261,15 +61401,15 @@ target_compile_options(GENERIC_G0B1CBUX_serial_none INTERFACE ) add_library(GENERIC_G0B1CBUX_usb_CDC INTERFACE) target_compile_options(GENERIC_G0B1CBUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G0B1CBUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G0B1CBUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G0B1CBUX_usb_HID INTERFACE) target_compile_options(GENERIC_G0B1CBUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G0B1CBUX_usb_none INTERFACE) target_compile_options(GENERIC_G0B1CBUX_usb_none INTERFACE @@ -61286,7 +61426,7 @@ set(GENERIC_G0B1CCTX_MCU cortex-m0plus) set(GENERIC_G0B1CCTX_FPCONF "-") add_library(GENERIC_G0B1CCTX INTERFACE) target_compile_options(GENERIC_G0B1CCTX INTERFACE - "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -61331,15 +61471,15 @@ target_compile_options(GENERIC_G0B1CCTX_serial_none INTERFACE ) add_library(GENERIC_G0B1CCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G0B1CCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G0B1CCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G0B1CCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G0B1CCTX_usb_HID INTERFACE) target_compile_options(GENERIC_G0B1CCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G0B1CCTX_usb_none INTERFACE) target_compile_options(GENERIC_G0B1CCTX_usb_none INTERFACE @@ -61356,7 +61496,7 @@ set(GENERIC_G0B1CCUX_MCU cortex-m0plus) set(GENERIC_G0B1CCUX_FPCONF "-") add_library(GENERIC_G0B1CCUX INTERFACE) target_compile_options(GENERIC_G0B1CCUX INTERFACE - "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -61401,15 +61541,15 @@ target_compile_options(GENERIC_G0B1CCUX_serial_none INTERFACE ) add_library(GENERIC_G0B1CCUX_usb_CDC INTERFACE) target_compile_options(GENERIC_G0B1CCUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G0B1CCUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G0B1CCUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G0B1CCUX_usb_HID INTERFACE) target_compile_options(GENERIC_G0B1CCUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G0B1CCUX_usb_none INTERFACE) target_compile_options(GENERIC_G0B1CCUX_usb_none INTERFACE @@ -61426,7 +61566,7 @@ set(GENERIC_G0B1CETX_MCU cortex-m0plus) set(GENERIC_G0B1CETX_FPCONF "-") add_library(GENERIC_G0B1CETX INTERFACE) target_compile_options(GENERIC_G0B1CETX INTERFACE - "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -61471,15 +61611,15 @@ target_compile_options(GENERIC_G0B1CETX_serial_none INTERFACE ) add_library(GENERIC_G0B1CETX_usb_CDC INTERFACE) target_compile_options(GENERIC_G0B1CETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G0B1CETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G0B1CETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G0B1CETX_usb_HID INTERFACE) target_compile_options(GENERIC_G0B1CETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G0B1CETX_usb_none INTERFACE) target_compile_options(GENERIC_G0B1CETX_usb_none INTERFACE @@ -61496,7 +61636,7 @@ set(GENERIC_G0B1CEUX_MCU cortex-m0plus) set(GENERIC_G0B1CEUX_FPCONF "-") add_library(GENERIC_G0B1CEUX INTERFACE) target_compile_options(GENERIC_G0B1CEUX INTERFACE - "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -61541,15 +61681,15 @@ target_compile_options(GENERIC_G0B1CEUX_serial_none INTERFACE ) add_library(GENERIC_G0B1CEUX_usb_CDC INTERFACE) target_compile_options(GENERIC_G0B1CEUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G0B1CEUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G0B1CEUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G0B1CEUX_usb_HID INTERFACE) target_compile_options(GENERIC_G0B1CEUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G0B1CEUX_usb_none INTERFACE) target_compile_options(GENERIC_G0B1CEUX_usb_none INTERFACE @@ -61566,7 +61706,7 @@ set(GENERIC_G0B1KBTX_MCU cortex-m0plus) set(GENERIC_G0B1KBTX_FPCONF "-") add_library(GENERIC_G0B1KBTX INTERFACE) target_compile_options(GENERIC_G0B1KBTX INTERFACE - "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -61611,15 +61751,15 @@ target_compile_options(GENERIC_G0B1KBTX_serial_none INTERFACE ) add_library(GENERIC_G0B1KBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G0B1KBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G0B1KBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G0B1KBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G0B1KBTX_usb_HID INTERFACE) target_compile_options(GENERIC_G0B1KBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G0B1KBTX_usb_none INTERFACE) target_compile_options(GENERIC_G0B1KBTX_usb_none INTERFACE @@ -61636,7 +61776,7 @@ set(GENERIC_G0B1KBUX_MCU cortex-m0plus) set(GENERIC_G0B1KBUX_FPCONF "-") add_library(GENERIC_G0B1KBUX INTERFACE) target_compile_options(GENERIC_G0B1KBUX INTERFACE - "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -61681,15 +61821,15 @@ target_compile_options(GENERIC_G0B1KBUX_serial_none INTERFACE ) add_library(GENERIC_G0B1KBUX_usb_CDC INTERFACE) target_compile_options(GENERIC_G0B1KBUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G0B1KBUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G0B1KBUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G0B1KBUX_usb_HID INTERFACE) target_compile_options(GENERIC_G0B1KBUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G0B1KBUX_usb_none INTERFACE) target_compile_options(GENERIC_G0B1KBUX_usb_none INTERFACE @@ -61706,7 +61846,7 @@ set(GENERIC_G0B1KCTX_MCU cortex-m0plus) set(GENERIC_G0B1KCTX_FPCONF "-") add_library(GENERIC_G0B1KCTX INTERFACE) target_compile_options(GENERIC_G0B1KCTX INTERFACE - "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -61751,15 +61891,15 @@ target_compile_options(GENERIC_G0B1KCTX_serial_none INTERFACE ) add_library(GENERIC_G0B1KCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G0B1KCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G0B1KCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G0B1KCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G0B1KCTX_usb_HID INTERFACE) target_compile_options(GENERIC_G0B1KCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G0B1KCTX_usb_none INTERFACE) target_compile_options(GENERIC_G0B1KCTX_usb_none INTERFACE @@ -61776,7 +61916,7 @@ set(GENERIC_G0B1KCUX_MCU cortex-m0plus) set(GENERIC_G0B1KCUX_FPCONF "-") add_library(GENERIC_G0B1KCUX INTERFACE) target_compile_options(GENERIC_G0B1KCUX INTERFACE - "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -61821,15 +61961,15 @@ target_compile_options(GENERIC_G0B1KCUX_serial_none INTERFACE ) add_library(GENERIC_G0B1KCUX_usb_CDC INTERFACE) target_compile_options(GENERIC_G0B1KCUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G0B1KCUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G0B1KCUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G0B1KCUX_usb_HID INTERFACE) target_compile_options(GENERIC_G0B1KCUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G0B1KCUX_usb_none INTERFACE) target_compile_options(GENERIC_G0B1KCUX_usb_none INTERFACE @@ -61846,7 +61986,7 @@ set(GENERIC_G0B1KETX_MCU cortex-m0plus) set(GENERIC_G0B1KETX_FPCONF "-") add_library(GENERIC_G0B1KETX INTERFACE) target_compile_options(GENERIC_G0B1KETX INTERFACE - "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -61891,15 +62031,15 @@ target_compile_options(GENERIC_G0B1KETX_serial_none INTERFACE ) add_library(GENERIC_G0B1KETX_usb_CDC INTERFACE) target_compile_options(GENERIC_G0B1KETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G0B1KETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G0B1KETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G0B1KETX_usb_HID INTERFACE) target_compile_options(GENERIC_G0B1KETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G0B1KETX_usb_none INTERFACE) target_compile_options(GENERIC_G0B1KETX_usb_none INTERFACE @@ -61916,7 +62056,7 @@ set(GENERIC_G0B1KEUX_MCU cortex-m0plus) set(GENERIC_G0B1KEUX_FPCONF "-") add_library(GENERIC_G0B1KEUX INTERFACE) target_compile_options(GENERIC_G0B1KEUX INTERFACE - "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -61961,15 +62101,15 @@ target_compile_options(GENERIC_G0B1KEUX_serial_none INTERFACE ) add_library(GENERIC_G0B1KEUX_usb_CDC INTERFACE) target_compile_options(GENERIC_G0B1KEUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G0B1KEUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G0B1KEUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G0B1KEUX_usb_HID INTERFACE) target_compile_options(GENERIC_G0B1KEUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G0B1KEUX_usb_none INTERFACE) target_compile_options(GENERIC_G0B1KEUX_usb_none INTERFACE @@ -61986,7 +62126,7 @@ set(GENERIC_G0B1MBTX_MCU cortex-m0plus) set(GENERIC_G0B1MBTX_FPCONF "-") add_library(GENERIC_G0B1MBTX INTERFACE) target_compile_options(GENERIC_G0B1MBTX INTERFACE - "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -62031,15 +62171,15 @@ target_compile_options(GENERIC_G0B1MBTX_serial_none INTERFACE ) add_library(GENERIC_G0B1MBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G0B1MBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G0B1MBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G0B1MBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G0B1MBTX_usb_HID INTERFACE) target_compile_options(GENERIC_G0B1MBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G0B1MBTX_usb_none INTERFACE) target_compile_options(GENERIC_G0B1MBTX_usb_none INTERFACE @@ -62056,7 +62196,7 @@ set(GENERIC_G0B1MCTX_MCU cortex-m0plus) set(GENERIC_G0B1MCTX_FPCONF "-") add_library(GENERIC_G0B1MCTX INTERFACE) target_compile_options(GENERIC_G0B1MCTX INTERFACE - "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -62101,15 +62241,15 @@ target_compile_options(GENERIC_G0B1MCTX_serial_none INTERFACE ) add_library(GENERIC_G0B1MCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G0B1MCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G0B1MCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G0B1MCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G0B1MCTX_usb_HID INTERFACE) target_compile_options(GENERIC_G0B1MCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G0B1MCTX_usb_none INTERFACE) target_compile_options(GENERIC_G0B1MCTX_usb_none INTERFACE @@ -62126,7 +62266,7 @@ set(GENERIC_G0B1METX_MCU cortex-m0plus) set(GENERIC_G0B1METX_FPCONF "-") add_library(GENERIC_G0B1METX INTERFACE) target_compile_options(GENERIC_G0B1METX INTERFACE - "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -62171,15 +62311,15 @@ target_compile_options(GENERIC_G0B1METX_serial_none INTERFACE ) add_library(GENERIC_G0B1METX_usb_CDC INTERFACE) target_compile_options(GENERIC_G0B1METX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G0B1METX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G0B1METX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G0B1METX_usb_HID INTERFACE) target_compile_options(GENERIC_G0B1METX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G0B1METX_usb_none INTERFACE) target_compile_options(GENERIC_G0B1METX_usb_none INTERFACE @@ -62196,7 +62336,7 @@ set(GENERIC_G0B1NEYX_MCU cortex-m0plus) set(GENERIC_G0B1NEYX_FPCONF "-") add_library(GENERIC_G0B1NEYX INTERFACE) target_compile_options(GENERIC_G0B1NEYX INTERFACE - "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -62241,15 +62381,15 @@ target_compile_options(GENERIC_G0B1NEYX_serial_none INTERFACE ) add_library(GENERIC_G0B1NEYX_usb_CDC INTERFACE) target_compile_options(GENERIC_G0B1NEYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G0B1NEYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G0B1NEYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G0B1NEYX_usb_HID INTERFACE) target_compile_options(GENERIC_G0B1NEYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G0B1NEYX_usb_none INTERFACE) target_compile_options(GENERIC_G0B1NEYX_usb_none INTERFACE @@ -62266,7 +62406,7 @@ set(GENERIC_G0B1RBTX_MCU cortex-m0plus) set(GENERIC_G0B1RBTX_FPCONF "-") add_library(GENERIC_G0B1RBTX INTERFACE) target_compile_options(GENERIC_G0B1RBTX INTERFACE - "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -62311,15 +62451,15 @@ target_compile_options(GENERIC_G0B1RBTX_serial_none INTERFACE ) add_library(GENERIC_G0B1RBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G0B1RBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G0B1RBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G0B1RBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G0B1RBTX_usb_HID INTERFACE) target_compile_options(GENERIC_G0B1RBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G0B1RBTX_usb_none INTERFACE) target_compile_options(GENERIC_G0B1RBTX_usb_none INTERFACE @@ -62336,7 +62476,7 @@ set(GENERIC_G0B1RCTX_MCU cortex-m0plus) set(GENERIC_G0B1RCTX_FPCONF "-") add_library(GENERIC_G0B1RCTX INTERFACE) target_compile_options(GENERIC_G0B1RCTX INTERFACE - "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -62381,15 +62521,15 @@ target_compile_options(GENERIC_G0B1RCTX_serial_none INTERFACE ) add_library(GENERIC_G0B1RCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G0B1RCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G0B1RCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G0B1RCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G0B1RCTX_usb_HID INTERFACE) target_compile_options(GENERIC_G0B1RCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G0B1RCTX_usb_none INTERFACE) target_compile_options(GENERIC_G0B1RCTX_usb_none INTERFACE @@ -62406,7 +62546,7 @@ set(GENERIC_G0B1RETX_MCU cortex-m0plus) set(GENERIC_G0B1RETX_FPCONF "-") add_library(GENERIC_G0B1RETX INTERFACE) target_compile_options(GENERIC_G0B1RETX INTERFACE - "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -62451,15 +62591,15 @@ target_compile_options(GENERIC_G0B1RETX_serial_none INTERFACE ) add_library(GENERIC_G0B1RETX_usb_CDC INTERFACE) target_compile_options(GENERIC_G0B1RETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G0B1RETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G0B1RETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G0B1RETX_usb_HID INTERFACE) target_compile_options(GENERIC_G0B1RETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G0B1RETX_usb_none INTERFACE) target_compile_options(GENERIC_G0B1RETX_usb_none INTERFACE @@ -62476,7 +62616,7 @@ set(GENERIC_G0B1VBIX_MCU cortex-m0plus) set(GENERIC_G0B1VBIX_FPCONF "-") add_library(GENERIC_G0B1VBIX INTERFACE) target_compile_options(GENERIC_G0B1VBIX INTERFACE - "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -62521,15 +62661,15 @@ target_compile_options(GENERIC_G0B1VBIX_serial_none INTERFACE ) add_library(GENERIC_G0B1VBIX_usb_CDC INTERFACE) target_compile_options(GENERIC_G0B1VBIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G0B1VBIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G0B1VBIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G0B1VBIX_usb_HID INTERFACE) target_compile_options(GENERIC_G0B1VBIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G0B1VBIX_usb_none INTERFACE) target_compile_options(GENERIC_G0B1VBIX_usb_none INTERFACE @@ -62546,7 +62686,7 @@ set(GENERIC_G0B1VBTX_MCU cortex-m0plus) set(GENERIC_G0B1VBTX_FPCONF "-") add_library(GENERIC_G0B1VBTX INTERFACE) target_compile_options(GENERIC_G0B1VBTX INTERFACE - "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -62591,15 +62731,15 @@ target_compile_options(GENERIC_G0B1VBTX_serial_none INTERFACE ) add_library(GENERIC_G0B1VBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G0B1VBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G0B1VBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G0B1VBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G0B1VBTX_usb_HID INTERFACE) target_compile_options(GENERIC_G0B1VBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G0B1VBTX_usb_none INTERFACE) target_compile_options(GENERIC_G0B1VBTX_usb_none INTERFACE @@ -62616,7 +62756,7 @@ set(GENERIC_G0B1VCIX_MCU cortex-m0plus) set(GENERIC_G0B1VCIX_FPCONF "-") add_library(GENERIC_G0B1VCIX INTERFACE) target_compile_options(GENERIC_G0B1VCIX INTERFACE - "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -62661,15 +62801,15 @@ target_compile_options(GENERIC_G0B1VCIX_serial_none INTERFACE ) add_library(GENERIC_G0B1VCIX_usb_CDC INTERFACE) target_compile_options(GENERIC_G0B1VCIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G0B1VCIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G0B1VCIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G0B1VCIX_usb_HID INTERFACE) target_compile_options(GENERIC_G0B1VCIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G0B1VCIX_usb_none INTERFACE) target_compile_options(GENERIC_G0B1VCIX_usb_none INTERFACE @@ -62686,7 +62826,7 @@ set(GENERIC_G0B1VCTX_MCU cortex-m0plus) set(GENERIC_G0B1VCTX_FPCONF "-") add_library(GENERIC_G0B1VCTX INTERFACE) target_compile_options(GENERIC_G0B1VCTX INTERFACE - "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -62731,15 +62871,15 @@ target_compile_options(GENERIC_G0B1VCTX_serial_none INTERFACE ) add_library(GENERIC_G0B1VCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G0B1VCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G0B1VCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G0B1VCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G0B1VCTX_usb_HID INTERFACE) target_compile_options(GENERIC_G0B1VCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G0B1VCTX_usb_none INTERFACE) target_compile_options(GENERIC_G0B1VCTX_usb_none INTERFACE @@ -62756,7 +62896,7 @@ set(GENERIC_G0B1VEIX_MCU cortex-m0plus) set(GENERIC_G0B1VEIX_FPCONF "-") add_library(GENERIC_G0B1VEIX INTERFACE) target_compile_options(GENERIC_G0B1VEIX INTERFACE - "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -62801,15 +62941,15 @@ target_compile_options(GENERIC_G0B1VEIX_serial_none INTERFACE ) add_library(GENERIC_G0B1VEIX_usb_CDC INTERFACE) target_compile_options(GENERIC_G0B1VEIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G0B1VEIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G0B1VEIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G0B1VEIX_usb_HID INTERFACE) target_compile_options(GENERIC_G0B1VEIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G0B1VEIX_usb_none INTERFACE) target_compile_options(GENERIC_G0B1VEIX_usb_none INTERFACE @@ -62826,7 +62966,7 @@ set(GENERIC_G0B1VETX_MCU cortex-m0plus) set(GENERIC_G0B1VETX_FPCONF "-") add_library(GENERIC_G0B1VETX INTERFACE) target_compile_options(GENERIC_G0B1VETX INTERFACE - "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -62871,15 +63011,15 @@ target_compile_options(GENERIC_G0B1VETX_serial_none INTERFACE ) add_library(GENERIC_G0B1VETX_usb_CDC INTERFACE) target_compile_options(GENERIC_G0B1VETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G0B1VETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G0B1VETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G0B1VETX_usb_HID INTERFACE) target_compile_options(GENERIC_G0B1VETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G0B1VETX_usb_none INTERFACE) target_compile_options(GENERIC_G0B1VETX_usb_none INTERFACE @@ -62896,7 +63036,7 @@ set(GENERIC_G0C1CCTX_MCU cortex-m0plus) set(GENERIC_G0C1CCTX_FPCONF "-") add_library(GENERIC_G0C1CCTX INTERFACE) target_compile_options(GENERIC_G0C1CCTX INTERFACE - "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -62941,15 +63081,15 @@ target_compile_options(GENERIC_G0C1CCTX_serial_none INTERFACE ) add_library(GENERIC_G0C1CCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G0C1CCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G0C1CCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G0C1CCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G0C1CCTX_usb_HID INTERFACE) target_compile_options(GENERIC_G0C1CCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G0C1CCTX_usb_none INTERFACE) target_compile_options(GENERIC_G0C1CCTX_usb_none INTERFACE @@ -62966,7 +63106,7 @@ set(GENERIC_G0C1CCUX_MCU cortex-m0plus) set(GENERIC_G0C1CCUX_FPCONF "-") add_library(GENERIC_G0C1CCUX INTERFACE) target_compile_options(GENERIC_G0C1CCUX INTERFACE - "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -63011,15 +63151,15 @@ target_compile_options(GENERIC_G0C1CCUX_serial_none INTERFACE ) add_library(GENERIC_G0C1CCUX_usb_CDC INTERFACE) target_compile_options(GENERIC_G0C1CCUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G0C1CCUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G0C1CCUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G0C1CCUX_usb_HID INTERFACE) target_compile_options(GENERIC_G0C1CCUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G0C1CCUX_usb_none INTERFACE) target_compile_options(GENERIC_G0C1CCUX_usb_none INTERFACE @@ -63036,7 +63176,7 @@ set(GENERIC_G0C1CETX_MCU cortex-m0plus) set(GENERIC_G0C1CETX_FPCONF "-") add_library(GENERIC_G0C1CETX INTERFACE) target_compile_options(GENERIC_G0C1CETX INTERFACE - "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -63081,15 +63221,15 @@ target_compile_options(GENERIC_G0C1CETX_serial_none INTERFACE ) add_library(GENERIC_G0C1CETX_usb_CDC INTERFACE) target_compile_options(GENERIC_G0C1CETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G0C1CETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G0C1CETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G0C1CETX_usb_HID INTERFACE) target_compile_options(GENERIC_G0C1CETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G0C1CETX_usb_none INTERFACE) target_compile_options(GENERIC_G0C1CETX_usb_none INTERFACE @@ -63106,7 +63246,7 @@ set(GENERIC_G0C1CEUX_MCU cortex-m0plus) set(GENERIC_G0C1CEUX_FPCONF "-") add_library(GENERIC_G0C1CEUX INTERFACE) target_compile_options(GENERIC_G0C1CEUX INTERFACE - "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -63151,15 +63291,15 @@ target_compile_options(GENERIC_G0C1CEUX_serial_none INTERFACE ) add_library(GENERIC_G0C1CEUX_usb_CDC INTERFACE) target_compile_options(GENERIC_G0C1CEUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G0C1CEUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G0C1CEUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G0C1CEUX_usb_HID INTERFACE) target_compile_options(GENERIC_G0C1CEUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G0C1CEUX_usb_none INTERFACE) target_compile_options(GENERIC_G0C1CEUX_usb_none INTERFACE @@ -63176,7 +63316,7 @@ set(GENERIC_G0C1KCTX_MCU cortex-m0plus) set(GENERIC_G0C1KCTX_FPCONF "-") add_library(GENERIC_G0C1KCTX INTERFACE) target_compile_options(GENERIC_G0C1KCTX INTERFACE - "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -63221,15 +63361,15 @@ target_compile_options(GENERIC_G0C1KCTX_serial_none INTERFACE ) add_library(GENERIC_G0C1KCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G0C1KCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G0C1KCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G0C1KCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G0C1KCTX_usb_HID INTERFACE) target_compile_options(GENERIC_G0C1KCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G0C1KCTX_usb_none INTERFACE) target_compile_options(GENERIC_G0C1KCTX_usb_none INTERFACE @@ -63246,7 +63386,7 @@ set(GENERIC_G0C1KCUX_MCU cortex-m0plus) set(GENERIC_G0C1KCUX_FPCONF "-") add_library(GENERIC_G0C1KCUX INTERFACE) target_compile_options(GENERIC_G0C1KCUX INTERFACE - "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -63291,15 +63431,15 @@ target_compile_options(GENERIC_G0C1KCUX_serial_none INTERFACE ) add_library(GENERIC_G0C1KCUX_usb_CDC INTERFACE) target_compile_options(GENERIC_G0C1KCUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G0C1KCUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G0C1KCUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G0C1KCUX_usb_HID INTERFACE) target_compile_options(GENERIC_G0C1KCUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G0C1KCUX_usb_none INTERFACE) target_compile_options(GENERIC_G0C1KCUX_usb_none INTERFACE @@ -63316,7 +63456,7 @@ set(GENERIC_G0C1KETX_MCU cortex-m0plus) set(GENERIC_G0C1KETX_FPCONF "-") add_library(GENERIC_G0C1KETX INTERFACE) target_compile_options(GENERIC_G0C1KETX INTERFACE - "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -63361,15 +63501,15 @@ target_compile_options(GENERIC_G0C1KETX_serial_none INTERFACE ) add_library(GENERIC_G0C1KETX_usb_CDC INTERFACE) target_compile_options(GENERIC_G0C1KETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G0C1KETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G0C1KETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G0C1KETX_usb_HID INTERFACE) target_compile_options(GENERIC_G0C1KETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G0C1KETX_usb_none INTERFACE) target_compile_options(GENERIC_G0C1KETX_usb_none INTERFACE @@ -63386,7 +63526,7 @@ set(GENERIC_G0C1KEUX_MCU cortex-m0plus) set(GENERIC_G0C1KEUX_FPCONF "-") add_library(GENERIC_G0C1KEUX INTERFACE) target_compile_options(GENERIC_G0C1KEUX INTERFACE - "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -63431,15 +63571,15 @@ target_compile_options(GENERIC_G0C1KEUX_serial_none INTERFACE ) add_library(GENERIC_G0C1KEUX_usb_CDC INTERFACE) target_compile_options(GENERIC_G0C1KEUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G0C1KEUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G0C1KEUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G0C1KEUX_usb_HID INTERFACE) target_compile_options(GENERIC_G0C1KEUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G0C1KEUX_usb_none INTERFACE) target_compile_options(GENERIC_G0C1KEUX_usb_none INTERFACE @@ -63456,7 +63596,7 @@ set(GENERIC_G0C1MCTX_MCU cortex-m0plus) set(GENERIC_G0C1MCTX_FPCONF "-") add_library(GENERIC_G0C1MCTX INTERFACE) target_compile_options(GENERIC_G0C1MCTX INTERFACE - "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -63501,15 +63641,15 @@ target_compile_options(GENERIC_G0C1MCTX_serial_none INTERFACE ) add_library(GENERIC_G0C1MCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G0C1MCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G0C1MCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G0C1MCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G0C1MCTX_usb_HID INTERFACE) target_compile_options(GENERIC_G0C1MCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G0C1MCTX_usb_none INTERFACE) target_compile_options(GENERIC_G0C1MCTX_usb_none INTERFACE @@ -63526,7 +63666,7 @@ set(GENERIC_G0C1METX_MCU cortex-m0plus) set(GENERIC_G0C1METX_FPCONF "-") add_library(GENERIC_G0C1METX INTERFACE) target_compile_options(GENERIC_G0C1METX INTERFACE - "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -63571,15 +63711,15 @@ target_compile_options(GENERIC_G0C1METX_serial_none INTERFACE ) add_library(GENERIC_G0C1METX_usb_CDC INTERFACE) target_compile_options(GENERIC_G0C1METX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G0C1METX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G0C1METX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G0C1METX_usb_HID INTERFACE) target_compile_options(GENERIC_G0C1METX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G0C1METX_usb_none INTERFACE) target_compile_options(GENERIC_G0C1METX_usb_none INTERFACE @@ -63596,7 +63736,7 @@ set(GENERIC_G0C1NEYX_MCU cortex-m0plus) set(GENERIC_G0C1NEYX_FPCONF "-") add_library(GENERIC_G0C1NEYX INTERFACE) target_compile_options(GENERIC_G0C1NEYX INTERFACE - "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -63641,15 +63781,15 @@ target_compile_options(GENERIC_G0C1NEYX_serial_none INTERFACE ) add_library(GENERIC_G0C1NEYX_usb_CDC INTERFACE) target_compile_options(GENERIC_G0C1NEYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G0C1NEYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G0C1NEYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G0C1NEYX_usb_HID INTERFACE) target_compile_options(GENERIC_G0C1NEYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G0C1NEYX_usb_none INTERFACE) target_compile_options(GENERIC_G0C1NEYX_usb_none INTERFACE @@ -63666,7 +63806,7 @@ set(GENERIC_G0C1RCTX_MCU cortex-m0plus) set(GENERIC_G0C1RCTX_FPCONF "-") add_library(GENERIC_G0C1RCTX INTERFACE) target_compile_options(GENERIC_G0C1RCTX INTERFACE - "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -63711,15 +63851,15 @@ target_compile_options(GENERIC_G0C1RCTX_serial_none INTERFACE ) add_library(GENERIC_G0C1RCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G0C1RCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G0C1RCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G0C1RCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G0C1RCTX_usb_HID INTERFACE) target_compile_options(GENERIC_G0C1RCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G0C1RCTX_usb_none INTERFACE) target_compile_options(GENERIC_G0C1RCTX_usb_none INTERFACE @@ -63736,7 +63876,7 @@ set(GENERIC_G0C1RETX_MCU cortex-m0plus) set(GENERIC_G0C1RETX_FPCONF "-") add_library(GENERIC_G0C1RETX INTERFACE) target_compile_options(GENERIC_G0C1RETX INTERFACE - "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -63781,15 +63921,15 @@ target_compile_options(GENERIC_G0C1RETX_serial_none INTERFACE ) add_library(GENERIC_G0C1RETX_usb_CDC INTERFACE) target_compile_options(GENERIC_G0C1RETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G0C1RETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G0C1RETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G0C1RETX_usb_HID INTERFACE) target_compile_options(GENERIC_G0C1RETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G0C1RETX_usb_none INTERFACE) target_compile_options(GENERIC_G0C1RETX_usb_none INTERFACE @@ -63806,7 +63946,7 @@ set(GENERIC_G0C1VCIX_MCU cortex-m0plus) set(GENERIC_G0C1VCIX_FPCONF "-") add_library(GENERIC_G0C1VCIX INTERFACE) target_compile_options(GENERIC_G0C1VCIX INTERFACE - "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -63851,15 +63991,15 @@ target_compile_options(GENERIC_G0C1VCIX_serial_none INTERFACE ) add_library(GENERIC_G0C1VCIX_usb_CDC INTERFACE) target_compile_options(GENERIC_G0C1VCIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G0C1VCIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G0C1VCIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G0C1VCIX_usb_HID INTERFACE) target_compile_options(GENERIC_G0C1VCIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G0C1VCIX_usb_none INTERFACE) target_compile_options(GENERIC_G0C1VCIX_usb_none INTERFACE @@ -63876,7 +64016,7 @@ set(GENERIC_G0C1VCTX_MCU cortex-m0plus) set(GENERIC_G0C1VCTX_FPCONF "-") add_library(GENERIC_G0C1VCTX INTERFACE) target_compile_options(GENERIC_G0C1VCTX INTERFACE - "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -63921,15 +64061,15 @@ target_compile_options(GENERIC_G0C1VCTX_serial_none INTERFACE ) add_library(GENERIC_G0C1VCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G0C1VCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G0C1VCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G0C1VCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G0C1VCTX_usb_HID INTERFACE) target_compile_options(GENERIC_G0C1VCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G0C1VCTX_usb_none INTERFACE) target_compile_options(GENERIC_G0C1VCTX_usb_none INTERFACE @@ -63946,7 +64086,7 @@ set(GENERIC_G0C1VEIX_MCU cortex-m0plus) set(GENERIC_G0C1VEIX_FPCONF "-") add_library(GENERIC_G0C1VEIX INTERFACE) target_compile_options(GENERIC_G0C1VEIX INTERFACE - "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -63991,15 +64131,15 @@ target_compile_options(GENERIC_G0C1VEIX_serial_none INTERFACE ) add_library(GENERIC_G0C1VEIX_usb_CDC INTERFACE) target_compile_options(GENERIC_G0C1VEIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G0C1VEIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G0C1VEIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G0C1VEIX_usb_HID INTERFACE) target_compile_options(GENERIC_G0C1VEIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G0C1VEIX_usb_none INTERFACE) target_compile_options(GENERIC_G0C1VEIX_usb_none INTERFACE @@ -64016,7 +64156,7 @@ set(GENERIC_G0C1VETX_MCU cortex-m0plus) set(GENERIC_G0C1VETX_FPCONF "-") add_library(GENERIC_G0C1VETX INTERFACE) target_compile_options(GENERIC_G0C1VETX INTERFACE - "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -64061,15 +64201,15 @@ target_compile_options(GENERIC_G0C1VETX_serial_none INTERFACE ) add_library(GENERIC_G0C1VETX_usb_CDC INTERFACE) target_compile_options(GENERIC_G0C1VETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G0C1VETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G0C1VETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G0C1VETX_usb_HID INTERFACE) target_compile_options(GENERIC_G0C1VETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G0C1VETX_usb_none INTERFACE) target_compile_options(GENERIC_G0C1VETX_usb_none INTERFACE @@ -64086,7 +64226,7 @@ set(GENERIC_G431C6TX_MCU cortex-m4) set(GENERIC_G431C6TX_FPCONF "-") add_library(GENERIC_G431C6TX INTERFACE) target_compile_options(GENERIC_G431C6TX INTERFACE - "SHELL:-DSTM32G431xx " + "SHELL:-DSTM32G431xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -64131,15 +64271,15 @@ target_compile_options(GENERIC_G431C6TX_serial_none INTERFACE ) add_library(GENERIC_G431C6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_G431C6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G431C6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G431C6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G431C6TX_usb_HID INTERFACE) target_compile_options(GENERIC_G431C6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G431C6TX_usb_none INTERFACE) target_compile_options(GENERIC_G431C6TX_usb_none INTERFACE @@ -64168,7 +64308,7 @@ set(GENERIC_G431C6UX_MCU cortex-m4) set(GENERIC_G431C6UX_FPCONF "-") add_library(GENERIC_G431C6UX INTERFACE) target_compile_options(GENERIC_G431C6UX INTERFACE - "SHELL:-DSTM32G431xx " + "SHELL:-DSTM32G431xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -64213,15 +64353,15 @@ target_compile_options(GENERIC_G431C6UX_serial_none INTERFACE ) add_library(GENERIC_G431C6UX_usb_CDC INTERFACE) target_compile_options(GENERIC_G431C6UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G431C6UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G431C6UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G431C6UX_usb_HID INTERFACE) target_compile_options(GENERIC_G431C6UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G431C6UX_usb_none INTERFACE) target_compile_options(GENERIC_G431C6UX_usb_none INTERFACE @@ -64250,7 +64390,7 @@ set(GENERIC_G431C8TX_MCU cortex-m4) set(GENERIC_G431C8TX_FPCONF "-") add_library(GENERIC_G431C8TX INTERFACE) target_compile_options(GENERIC_G431C8TX INTERFACE - "SHELL:-DSTM32G431xx " + "SHELL:-DSTM32G431xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -64295,15 +64435,15 @@ target_compile_options(GENERIC_G431C8TX_serial_none INTERFACE ) add_library(GENERIC_G431C8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_G431C8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G431C8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G431C8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G431C8TX_usb_HID INTERFACE) target_compile_options(GENERIC_G431C8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G431C8TX_usb_none INTERFACE) target_compile_options(GENERIC_G431C8TX_usb_none INTERFACE @@ -64332,7 +64472,7 @@ set(GENERIC_G431C8UX_MCU cortex-m4) set(GENERIC_G431C8UX_FPCONF "-") add_library(GENERIC_G431C8UX INTERFACE) target_compile_options(GENERIC_G431C8UX INTERFACE - "SHELL:-DSTM32G431xx " + "SHELL:-DSTM32G431xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -64377,15 +64517,15 @@ target_compile_options(GENERIC_G431C8UX_serial_none INTERFACE ) add_library(GENERIC_G431C8UX_usb_CDC INTERFACE) target_compile_options(GENERIC_G431C8UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G431C8UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G431C8UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G431C8UX_usb_HID INTERFACE) target_compile_options(GENERIC_G431C8UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G431C8UX_usb_none INTERFACE) target_compile_options(GENERIC_G431C8UX_usb_none INTERFACE @@ -64414,7 +64554,7 @@ set(GENERIC_G431CBTX_MCU cortex-m4) set(GENERIC_G431CBTX_FPCONF "-") add_library(GENERIC_G431CBTX INTERFACE) target_compile_options(GENERIC_G431CBTX INTERFACE - "SHELL:-DSTM32G431xx " + "SHELL:-DSTM32G431xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -64459,15 +64599,15 @@ target_compile_options(GENERIC_G431CBTX_serial_none INTERFACE ) add_library(GENERIC_G431CBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G431CBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G431CBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G431CBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G431CBTX_usb_HID INTERFACE) target_compile_options(GENERIC_G431CBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G431CBTX_usb_none INTERFACE) target_compile_options(GENERIC_G431CBTX_usb_none INTERFACE @@ -64496,7 +64636,7 @@ set(GENERIC_G431CBUX_MCU cortex-m4) set(GENERIC_G431CBUX_FPCONF "-") add_library(GENERIC_G431CBUX INTERFACE) target_compile_options(GENERIC_G431CBUX INTERFACE - "SHELL:-DSTM32G431xx " + "SHELL:-DSTM32G431xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -64541,15 +64681,15 @@ target_compile_options(GENERIC_G431CBUX_serial_none INTERFACE ) add_library(GENERIC_G431CBUX_usb_CDC INTERFACE) target_compile_options(GENERIC_G431CBUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G431CBUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G431CBUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G431CBUX_usb_HID INTERFACE) target_compile_options(GENERIC_G431CBUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G431CBUX_usb_none INTERFACE) target_compile_options(GENERIC_G431CBUX_usb_none INTERFACE @@ -64578,7 +64718,7 @@ set(GENERIC_G431K6TX_MCU cortex-m4) set(GENERIC_G431K6TX_FPCONF "-") add_library(GENERIC_G431K6TX INTERFACE) target_compile_options(GENERIC_G431K6TX INTERFACE - "SHELL:-DSTM32G431xx " + "SHELL:-DSTM32G431xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -64623,15 +64763,15 @@ target_compile_options(GENERIC_G431K6TX_serial_none INTERFACE ) add_library(GENERIC_G431K6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_G431K6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G431K6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G431K6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G431K6TX_usb_HID INTERFACE) target_compile_options(GENERIC_G431K6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G431K6TX_usb_none INTERFACE) target_compile_options(GENERIC_G431K6TX_usb_none INTERFACE @@ -64660,7 +64800,7 @@ set(GENERIC_G431K6UX_MCU cortex-m4) set(GENERIC_G431K6UX_FPCONF "-") add_library(GENERIC_G431K6UX INTERFACE) target_compile_options(GENERIC_G431K6UX INTERFACE - "SHELL:-DSTM32G431xx " + "SHELL:-DSTM32G431xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -64705,15 +64845,15 @@ target_compile_options(GENERIC_G431K6UX_serial_none INTERFACE ) add_library(GENERIC_G431K6UX_usb_CDC INTERFACE) target_compile_options(GENERIC_G431K6UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G431K6UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G431K6UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G431K6UX_usb_HID INTERFACE) target_compile_options(GENERIC_G431K6UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G431K6UX_usb_none INTERFACE) target_compile_options(GENERIC_G431K6UX_usb_none INTERFACE @@ -64742,7 +64882,7 @@ set(GENERIC_G431K8TX_MCU cortex-m4) set(GENERIC_G431K8TX_FPCONF "-") add_library(GENERIC_G431K8TX INTERFACE) target_compile_options(GENERIC_G431K8TX INTERFACE - "SHELL:-DSTM32G431xx " + "SHELL:-DSTM32G431xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -64787,15 +64927,15 @@ target_compile_options(GENERIC_G431K8TX_serial_none INTERFACE ) add_library(GENERIC_G431K8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_G431K8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G431K8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G431K8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G431K8TX_usb_HID INTERFACE) target_compile_options(GENERIC_G431K8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G431K8TX_usb_none INTERFACE) target_compile_options(GENERIC_G431K8TX_usb_none INTERFACE @@ -64824,7 +64964,7 @@ set(GENERIC_G431K8UX_MCU cortex-m4) set(GENERIC_G431K8UX_FPCONF "-") add_library(GENERIC_G431K8UX INTERFACE) target_compile_options(GENERIC_G431K8UX INTERFACE - "SHELL:-DSTM32G431xx " + "SHELL:-DSTM32G431xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -64869,15 +65009,15 @@ target_compile_options(GENERIC_G431K8UX_serial_none INTERFACE ) add_library(GENERIC_G431K8UX_usb_CDC INTERFACE) target_compile_options(GENERIC_G431K8UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G431K8UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G431K8UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G431K8UX_usb_HID INTERFACE) target_compile_options(GENERIC_G431K8UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G431K8UX_usb_none INTERFACE) target_compile_options(GENERIC_G431K8UX_usb_none INTERFACE @@ -64906,7 +65046,7 @@ set(GENERIC_G431KBTX_MCU cortex-m4) set(GENERIC_G431KBTX_FPCONF "-") add_library(GENERIC_G431KBTX INTERFACE) target_compile_options(GENERIC_G431KBTX INTERFACE - "SHELL:-DSTM32G431xx " + "SHELL:-DSTM32G431xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -64951,15 +65091,15 @@ target_compile_options(GENERIC_G431KBTX_serial_none INTERFACE ) add_library(GENERIC_G431KBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G431KBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G431KBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G431KBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G431KBTX_usb_HID INTERFACE) target_compile_options(GENERIC_G431KBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G431KBTX_usb_none INTERFACE) target_compile_options(GENERIC_G431KBTX_usb_none INTERFACE @@ -64988,7 +65128,7 @@ set(GENERIC_G431KBUX_MCU cortex-m4) set(GENERIC_G431KBUX_FPCONF "-") add_library(GENERIC_G431KBUX INTERFACE) target_compile_options(GENERIC_G431KBUX INTERFACE - "SHELL:-DSTM32G431xx " + "SHELL:-DSTM32G431xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -65033,15 +65173,15 @@ target_compile_options(GENERIC_G431KBUX_serial_none INTERFACE ) add_library(GENERIC_G431KBUX_usb_CDC INTERFACE) target_compile_options(GENERIC_G431KBUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G431KBUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G431KBUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G431KBUX_usb_HID INTERFACE) target_compile_options(GENERIC_G431KBUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G431KBUX_usb_none INTERFACE) target_compile_options(GENERIC_G431KBUX_usb_none INTERFACE @@ -65070,7 +65210,7 @@ set(GENERIC_G431M6TX_MCU cortex-m4) set(GENERIC_G431M6TX_FPCONF "-") add_library(GENERIC_G431M6TX INTERFACE) target_compile_options(GENERIC_G431M6TX INTERFACE - "SHELL:-DSTM32G431xx " + "SHELL:-DSTM32G431xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -65115,15 +65255,15 @@ target_compile_options(GENERIC_G431M6TX_serial_none INTERFACE ) add_library(GENERIC_G431M6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_G431M6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G431M6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G431M6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G431M6TX_usb_HID INTERFACE) target_compile_options(GENERIC_G431M6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G431M6TX_usb_none INTERFACE) target_compile_options(GENERIC_G431M6TX_usb_none INTERFACE @@ -65152,7 +65292,7 @@ set(GENERIC_G431M8TX_MCU cortex-m4) set(GENERIC_G431M8TX_FPCONF "-") add_library(GENERIC_G431M8TX INTERFACE) target_compile_options(GENERIC_G431M8TX INTERFACE - "SHELL:-DSTM32G431xx " + "SHELL:-DSTM32G431xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -65197,15 +65337,15 @@ target_compile_options(GENERIC_G431M8TX_serial_none INTERFACE ) add_library(GENERIC_G431M8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_G431M8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G431M8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G431M8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G431M8TX_usb_HID INTERFACE) target_compile_options(GENERIC_G431M8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G431M8TX_usb_none INTERFACE) target_compile_options(GENERIC_G431M8TX_usb_none INTERFACE @@ -65234,7 +65374,7 @@ set(GENERIC_G431MBTX_MCU cortex-m4) set(GENERIC_G431MBTX_FPCONF "-") add_library(GENERIC_G431MBTX INTERFACE) target_compile_options(GENERIC_G431MBTX INTERFACE - "SHELL:-DSTM32G431xx " + "SHELL:-DSTM32G431xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -65279,15 +65419,15 @@ target_compile_options(GENERIC_G431MBTX_serial_none INTERFACE ) add_library(GENERIC_G431MBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G431MBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G431MBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G431MBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G431MBTX_usb_HID INTERFACE) target_compile_options(GENERIC_G431MBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G431MBTX_usb_none INTERFACE) target_compile_options(GENERIC_G431MBTX_usb_none INTERFACE @@ -65316,7 +65456,7 @@ set(GENERIC_G431R6IX_MCU cortex-m4) set(GENERIC_G431R6IX_FPCONF "-") add_library(GENERIC_G431R6IX INTERFACE) target_compile_options(GENERIC_G431R6IX INTERFACE - "SHELL:-DSTM32G431xx " + "SHELL:-DSTM32G431xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -65361,15 +65501,15 @@ target_compile_options(GENERIC_G431R6IX_serial_none INTERFACE ) add_library(GENERIC_G431R6IX_usb_CDC INTERFACE) target_compile_options(GENERIC_G431R6IX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G431R6IX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G431R6IX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G431R6IX_usb_HID INTERFACE) target_compile_options(GENERIC_G431R6IX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G431R6IX_usb_none INTERFACE) target_compile_options(GENERIC_G431R6IX_usb_none INTERFACE @@ -65398,7 +65538,7 @@ set(GENERIC_G431R6TX_MCU cortex-m4) set(GENERIC_G431R6TX_FPCONF "-") add_library(GENERIC_G431R6TX INTERFACE) target_compile_options(GENERIC_G431R6TX INTERFACE - "SHELL:-DSTM32G431xx " + "SHELL:-DSTM32G431xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -65443,15 +65583,15 @@ target_compile_options(GENERIC_G431R6TX_serial_none INTERFACE ) add_library(GENERIC_G431R6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_G431R6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G431R6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G431R6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G431R6TX_usb_HID INTERFACE) target_compile_options(GENERIC_G431R6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G431R6TX_usb_none INTERFACE) target_compile_options(GENERIC_G431R6TX_usb_none INTERFACE @@ -65480,7 +65620,7 @@ set(GENERIC_G431R8IX_MCU cortex-m4) set(GENERIC_G431R8IX_FPCONF "-") add_library(GENERIC_G431R8IX INTERFACE) target_compile_options(GENERIC_G431R8IX INTERFACE - "SHELL:-DSTM32G431xx " + "SHELL:-DSTM32G431xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -65525,15 +65665,15 @@ target_compile_options(GENERIC_G431R8IX_serial_none INTERFACE ) add_library(GENERIC_G431R8IX_usb_CDC INTERFACE) target_compile_options(GENERIC_G431R8IX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G431R8IX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G431R8IX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G431R8IX_usb_HID INTERFACE) target_compile_options(GENERIC_G431R8IX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G431R8IX_usb_none INTERFACE) target_compile_options(GENERIC_G431R8IX_usb_none INTERFACE @@ -65562,7 +65702,7 @@ set(GENERIC_G431R8TX_MCU cortex-m4) set(GENERIC_G431R8TX_FPCONF "-") add_library(GENERIC_G431R8TX INTERFACE) target_compile_options(GENERIC_G431R8TX INTERFACE - "SHELL:-DSTM32G431xx " + "SHELL:-DSTM32G431xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -65607,15 +65747,15 @@ target_compile_options(GENERIC_G431R8TX_serial_none INTERFACE ) add_library(GENERIC_G431R8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_G431R8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G431R8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G431R8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G431R8TX_usb_HID INTERFACE) target_compile_options(GENERIC_G431R8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G431R8TX_usb_none INTERFACE) target_compile_options(GENERIC_G431R8TX_usb_none INTERFACE @@ -65644,7 +65784,7 @@ set(GENERIC_G431RBIX_MCU cortex-m4) set(GENERIC_G431RBIX_FPCONF "-") add_library(GENERIC_G431RBIX INTERFACE) target_compile_options(GENERIC_G431RBIX INTERFACE - "SHELL:-DSTM32G431xx " + "SHELL:-DSTM32G431xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -65689,15 +65829,15 @@ target_compile_options(GENERIC_G431RBIX_serial_none INTERFACE ) add_library(GENERIC_G431RBIX_usb_CDC INTERFACE) target_compile_options(GENERIC_G431RBIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G431RBIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G431RBIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G431RBIX_usb_HID INTERFACE) target_compile_options(GENERIC_G431RBIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G431RBIX_usb_none INTERFACE) target_compile_options(GENERIC_G431RBIX_usb_none INTERFACE @@ -65726,7 +65866,7 @@ set(GENERIC_G431RBTX_MCU cortex-m4) set(GENERIC_G431RBTX_FPCONF "-") add_library(GENERIC_G431RBTX INTERFACE) target_compile_options(GENERIC_G431RBTX INTERFACE - "SHELL:-DSTM32G431xx " + "SHELL:-DSTM32G431xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -65771,15 +65911,15 @@ target_compile_options(GENERIC_G431RBTX_serial_none INTERFACE ) add_library(GENERIC_G431RBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G431RBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G431RBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G431RBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G431RBTX_usb_HID INTERFACE) target_compile_options(GENERIC_G431RBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G431RBTX_usb_none INTERFACE) target_compile_options(GENERIC_G431RBTX_usb_none INTERFACE @@ -65808,7 +65948,7 @@ set(GENERIC_G431RBTXZ_MCU cortex-m4) set(GENERIC_G431RBTXZ_FPCONF "-") add_library(GENERIC_G431RBTXZ INTERFACE) target_compile_options(GENERIC_G431RBTXZ INTERFACE - "SHELL:-DSTM32G431xx " + "SHELL:-DSTM32G431xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -65853,15 +65993,15 @@ target_compile_options(GENERIC_G431RBTXZ_serial_none INTERFACE ) add_library(GENERIC_G431RBTXZ_usb_CDC INTERFACE) target_compile_options(GENERIC_G431RBTXZ_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G431RBTXZ_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G431RBTXZ_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G431RBTXZ_usb_HID INTERFACE) target_compile_options(GENERIC_G431RBTXZ_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G431RBTXZ_usb_none INTERFACE) target_compile_options(GENERIC_G431RBTXZ_usb_none INTERFACE @@ -65890,7 +66030,7 @@ set(GENERIC_G431V6TX_MCU cortex-m4) set(GENERIC_G431V6TX_FPCONF "-") add_library(GENERIC_G431V6TX INTERFACE) target_compile_options(GENERIC_G431V6TX INTERFACE - "SHELL:-DSTM32G431xx " + "SHELL:-DSTM32G431xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -65935,15 +66075,15 @@ target_compile_options(GENERIC_G431V6TX_serial_none INTERFACE ) add_library(GENERIC_G431V6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_G431V6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G431V6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G431V6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G431V6TX_usb_HID INTERFACE) target_compile_options(GENERIC_G431V6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G431V6TX_usb_none INTERFACE) target_compile_options(GENERIC_G431V6TX_usb_none INTERFACE @@ -65972,7 +66112,7 @@ set(GENERIC_G431V8TX_MCU cortex-m4) set(GENERIC_G431V8TX_FPCONF "-") add_library(GENERIC_G431V8TX INTERFACE) target_compile_options(GENERIC_G431V8TX INTERFACE - "SHELL:-DSTM32G431xx " + "SHELL:-DSTM32G431xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -66017,15 +66157,15 @@ target_compile_options(GENERIC_G431V8TX_serial_none INTERFACE ) add_library(GENERIC_G431V8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_G431V8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G431V8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G431V8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G431V8TX_usb_HID INTERFACE) target_compile_options(GENERIC_G431V8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G431V8TX_usb_none INTERFACE) target_compile_options(GENERIC_G431V8TX_usb_none INTERFACE @@ -66054,7 +66194,7 @@ set(GENERIC_G431VBTX_MCU cortex-m4) set(GENERIC_G431VBTX_FPCONF "-") add_library(GENERIC_G431VBTX INTERFACE) target_compile_options(GENERIC_G431VBTX INTERFACE - "SHELL:-DSTM32G431xx " + "SHELL:-DSTM32G431xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -66099,15 +66239,15 @@ target_compile_options(GENERIC_G431VBTX_serial_none INTERFACE ) add_library(GENERIC_G431VBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G431VBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G431VBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G431VBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G431VBTX_usb_HID INTERFACE) target_compile_options(GENERIC_G431VBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G431VBTX_usb_none INTERFACE) target_compile_options(GENERIC_G431VBTX_usb_none INTERFACE @@ -66136,7 +66276,7 @@ set(GENERIC_G441CBTX_MCU cortex-m4) set(GENERIC_G441CBTX_FPCONF "-") add_library(GENERIC_G441CBTX INTERFACE) target_compile_options(GENERIC_G441CBTX INTERFACE - "SHELL:-DSTM32G441xx " + "SHELL:-DSTM32G441xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -66181,15 +66321,15 @@ target_compile_options(GENERIC_G441CBTX_serial_none INTERFACE ) add_library(GENERIC_G441CBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G441CBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G441CBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G441CBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G441CBTX_usb_HID INTERFACE) target_compile_options(GENERIC_G441CBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G441CBTX_usb_none INTERFACE) target_compile_options(GENERIC_G441CBTX_usb_none INTERFACE @@ -66218,7 +66358,7 @@ set(GENERIC_G441CBUX_MCU cortex-m4) set(GENERIC_G441CBUX_FPCONF "-") add_library(GENERIC_G441CBUX INTERFACE) target_compile_options(GENERIC_G441CBUX INTERFACE - "SHELL:-DSTM32G441xx " + "SHELL:-DSTM32G441xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -66263,15 +66403,15 @@ target_compile_options(GENERIC_G441CBUX_serial_none INTERFACE ) add_library(GENERIC_G441CBUX_usb_CDC INTERFACE) target_compile_options(GENERIC_G441CBUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G441CBUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G441CBUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G441CBUX_usb_HID INTERFACE) target_compile_options(GENERIC_G441CBUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G441CBUX_usb_none INTERFACE) target_compile_options(GENERIC_G441CBUX_usb_none INTERFACE @@ -66300,7 +66440,7 @@ set(GENERIC_G441KBTX_MCU cortex-m4) set(GENERIC_G441KBTX_FPCONF "-") add_library(GENERIC_G441KBTX INTERFACE) target_compile_options(GENERIC_G441KBTX INTERFACE - "SHELL:-DSTM32G441xx " + "SHELL:-DSTM32G441xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -66345,15 +66485,15 @@ target_compile_options(GENERIC_G441KBTX_serial_none INTERFACE ) add_library(GENERIC_G441KBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G441KBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G441KBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G441KBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G441KBTX_usb_HID INTERFACE) target_compile_options(GENERIC_G441KBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G441KBTX_usb_none INTERFACE) target_compile_options(GENERIC_G441KBTX_usb_none INTERFACE @@ -66382,7 +66522,7 @@ set(GENERIC_G441KBUX_MCU cortex-m4) set(GENERIC_G441KBUX_FPCONF "-") add_library(GENERIC_G441KBUX INTERFACE) target_compile_options(GENERIC_G441KBUX INTERFACE - "SHELL:-DSTM32G441xx " + "SHELL:-DSTM32G441xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -66427,15 +66567,15 @@ target_compile_options(GENERIC_G441KBUX_serial_none INTERFACE ) add_library(GENERIC_G441KBUX_usb_CDC INTERFACE) target_compile_options(GENERIC_G441KBUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G441KBUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G441KBUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G441KBUX_usb_HID INTERFACE) target_compile_options(GENERIC_G441KBUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G441KBUX_usb_none INTERFACE) target_compile_options(GENERIC_G441KBUX_usb_none INTERFACE @@ -66464,7 +66604,7 @@ set(GENERIC_G441MBTX_MCU cortex-m4) set(GENERIC_G441MBTX_FPCONF "-") add_library(GENERIC_G441MBTX INTERFACE) target_compile_options(GENERIC_G441MBTX INTERFACE - "SHELL:-DSTM32G441xx " + "SHELL:-DSTM32G441xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -66509,15 +66649,15 @@ target_compile_options(GENERIC_G441MBTX_serial_none INTERFACE ) add_library(GENERIC_G441MBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G441MBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G441MBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G441MBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G441MBTX_usb_HID INTERFACE) target_compile_options(GENERIC_G441MBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G441MBTX_usb_none INTERFACE) target_compile_options(GENERIC_G441MBTX_usb_none INTERFACE @@ -66546,7 +66686,7 @@ set(GENERIC_G441RBIX_MCU cortex-m4) set(GENERIC_G441RBIX_FPCONF "-") add_library(GENERIC_G441RBIX INTERFACE) target_compile_options(GENERIC_G441RBIX INTERFACE - "SHELL:-DSTM32G441xx " + "SHELL:-DSTM32G441xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -66591,15 +66731,15 @@ target_compile_options(GENERIC_G441RBIX_serial_none INTERFACE ) add_library(GENERIC_G441RBIX_usb_CDC INTERFACE) target_compile_options(GENERIC_G441RBIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G441RBIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G441RBIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G441RBIX_usb_HID INTERFACE) target_compile_options(GENERIC_G441RBIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G441RBIX_usb_none INTERFACE) target_compile_options(GENERIC_G441RBIX_usb_none INTERFACE @@ -66628,7 +66768,7 @@ set(GENERIC_G441RBTX_MCU cortex-m4) set(GENERIC_G441RBTX_FPCONF "-") add_library(GENERIC_G441RBTX INTERFACE) target_compile_options(GENERIC_G441RBTX INTERFACE - "SHELL:-DSTM32G441xx " + "SHELL:-DSTM32G441xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -66673,15 +66813,15 @@ target_compile_options(GENERIC_G441RBTX_serial_none INTERFACE ) add_library(GENERIC_G441RBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G441RBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G441RBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G441RBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G441RBTX_usb_HID INTERFACE) target_compile_options(GENERIC_G441RBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G441RBTX_usb_none INTERFACE) target_compile_options(GENERIC_G441RBTX_usb_none INTERFACE @@ -66710,7 +66850,7 @@ set(GENERIC_G441VBTX_MCU cortex-m4) set(GENERIC_G441VBTX_FPCONF "-") add_library(GENERIC_G441VBTX INTERFACE) target_compile_options(GENERIC_G441VBTX INTERFACE - "SHELL:-DSTM32G441xx " + "SHELL:-DSTM32G441xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -66755,15 +66895,15 @@ target_compile_options(GENERIC_G441VBTX_serial_none INTERFACE ) add_library(GENERIC_G441VBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G441VBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G441VBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G441VBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G441VBTX_usb_HID INTERFACE) target_compile_options(GENERIC_G441VBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G441VBTX_usb_none INTERFACE) target_compile_options(GENERIC_G441VBTX_usb_none INTERFACE @@ -66792,7 +66932,7 @@ set(GENERIC_G471CCTX_MCU cortex-m4) set(GENERIC_G471CCTX_FPCONF "-") add_library(GENERIC_G471CCTX INTERFACE) target_compile_options(GENERIC_G471CCTX INTERFACE - "SHELL:-DSTM32G471xx " + "SHELL:-DSTM32G471xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -66837,15 +66977,15 @@ target_compile_options(GENERIC_G471CCTX_serial_none INTERFACE ) add_library(GENERIC_G471CCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G471CCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G471CCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G471CCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G471CCTX_usb_HID INTERFACE) target_compile_options(GENERIC_G471CCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G471CCTX_usb_none INTERFACE) target_compile_options(GENERIC_G471CCTX_usb_none INTERFACE @@ -66874,7 +67014,7 @@ set(GENERIC_G471CETX_MCU cortex-m4) set(GENERIC_G471CETX_FPCONF "-") add_library(GENERIC_G471CETX INTERFACE) target_compile_options(GENERIC_G471CETX INTERFACE - "SHELL:-DSTM32G471xx " + "SHELL:-DSTM32G471xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -66919,15 +67059,15 @@ target_compile_options(GENERIC_G471CETX_serial_none INTERFACE ) add_library(GENERIC_G471CETX_usb_CDC INTERFACE) target_compile_options(GENERIC_G471CETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G471CETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G471CETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G471CETX_usb_HID INTERFACE) target_compile_options(GENERIC_G471CETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G471CETX_usb_none INTERFACE) target_compile_options(GENERIC_G471CETX_usb_none INTERFACE @@ -66956,7 +67096,7 @@ set(GENERIC_G471MCTX_MCU cortex-m4) set(GENERIC_G471MCTX_FPCONF "-") add_library(GENERIC_G471MCTX INTERFACE) target_compile_options(GENERIC_G471MCTX INTERFACE - "SHELL:-DSTM32G471xx " + "SHELL:-DSTM32G471xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -67001,15 +67141,15 @@ target_compile_options(GENERIC_G471MCTX_serial_none INTERFACE ) add_library(GENERIC_G471MCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G471MCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G471MCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G471MCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G471MCTX_usb_HID INTERFACE) target_compile_options(GENERIC_G471MCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G471MCTX_usb_none INTERFACE) target_compile_options(GENERIC_G471MCTX_usb_none INTERFACE @@ -67038,7 +67178,7 @@ set(GENERIC_G471METX_MCU cortex-m4) set(GENERIC_G471METX_FPCONF "-") add_library(GENERIC_G471METX INTERFACE) target_compile_options(GENERIC_G471METX INTERFACE - "SHELL:-DSTM32G471xx " + "SHELL:-DSTM32G471xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -67083,15 +67223,15 @@ target_compile_options(GENERIC_G471METX_serial_none INTERFACE ) add_library(GENERIC_G471METX_usb_CDC INTERFACE) target_compile_options(GENERIC_G471METX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G471METX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G471METX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G471METX_usb_HID INTERFACE) target_compile_options(GENERIC_G471METX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G471METX_usb_none INTERFACE) target_compile_options(GENERIC_G471METX_usb_none INTERFACE @@ -67120,7 +67260,7 @@ set(GENERIC_G471QCTX_MCU cortex-m4) set(GENERIC_G471QCTX_FPCONF "-") add_library(GENERIC_G471QCTX INTERFACE) target_compile_options(GENERIC_G471QCTX INTERFACE - "SHELL:-DSTM32G471xx " + "SHELL:-DSTM32G471xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -67165,15 +67305,15 @@ target_compile_options(GENERIC_G471QCTX_serial_none INTERFACE ) add_library(GENERIC_G471QCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G471QCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G471QCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G471QCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G471QCTX_usb_HID INTERFACE) target_compile_options(GENERIC_G471QCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G471QCTX_usb_none INTERFACE) target_compile_options(GENERIC_G471QCTX_usb_none INTERFACE @@ -67202,7 +67342,7 @@ set(GENERIC_G471QETX_MCU cortex-m4) set(GENERIC_G471QETX_FPCONF "-") add_library(GENERIC_G471QETX INTERFACE) target_compile_options(GENERIC_G471QETX INTERFACE - "SHELL:-DSTM32G471xx " + "SHELL:-DSTM32G471xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -67247,15 +67387,15 @@ target_compile_options(GENERIC_G471QETX_serial_none INTERFACE ) add_library(GENERIC_G471QETX_usb_CDC INTERFACE) target_compile_options(GENERIC_G471QETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G471QETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G471QETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G471QETX_usb_HID INTERFACE) target_compile_options(GENERIC_G471QETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G471QETX_usb_none INTERFACE) target_compile_options(GENERIC_G471QETX_usb_none INTERFACE @@ -67284,7 +67424,7 @@ set(GENERIC_G471RCTX_MCU cortex-m4) set(GENERIC_G471RCTX_FPCONF "-") add_library(GENERIC_G471RCTX INTERFACE) target_compile_options(GENERIC_G471RCTX INTERFACE - "SHELL:-DSTM32G471xx " + "SHELL:-DSTM32G471xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -67329,15 +67469,15 @@ target_compile_options(GENERIC_G471RCTX_serial_none INTERFACE ) add_library(GENERIC_G471RCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G471RCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G471RCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G471RCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G471RCTX_usb_HID INTERFACE) target_compile_options(GENERIC_G471RCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G471RCTX_usb_none INTERFACE) target_compile_options(GENERIC_G471RCTX_usb_none INTERFACE @@ -67366,7 +67506,7 @@ set(GENERIC_G471RETX_MCU cortex-m4) set(GENERIC_G471RETX_FPCONF "-") add_library(GENERIC_G471RETX INTERFACE) target_compile_options(GENERIC_G471RETX INTERFACE - "SHELL:-DSTM32G471xx " + "SHELL:-DSTM32G471xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -67411,15 +67551,15 @@ target_compile_options(GENERIC_G471RETX_serial_none INTERFACE ) add_library(GENERIC_G471RETX_usb_CDC INTERFACE) target_compile_options(GENERIC_G471RETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G471RETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G471RETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G471RETX_usb_HID INTERFACE) target_compile_options(GENERIC_G471RETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G471RETX_usb_none INTERFACE) target_compile_options(GENERIC_G471RETX_usb_none INTERFACE @@ -67448,7 +67588,7 @@ set(GENERIC_G471VCHX_MCU cortex-m4) set(GENERIC_G471VCHX_FPCONF "-") add_library(GENERIC_G471VCHX INTERFACE) target_compile_options(GENERIC_G471VCHX INTERFACE - "SHELL:-DSTM32G471xx " + "SHELL:-DSTM32G471xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -67493,15 +67633,15 @@ target_compile_options(GENERIC_G471VCHX_serial_none INTERFACE ) add_library(GENERIC_G471VCHX_usb_CDC INTERFACE) target_compile_options(GENERIC_G471VCHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G471VCHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G471VCHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G471VCHX_usb_HID INTERFACE) target_compile_options(GENERIC_G471VCHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G471VCHX_usb_none INTERFACE) target_compile_options(GENERIC_G471VCHX_usb_none INTERFACE @@ -67530,7 +67670,7 @@ set(GENERIC_G471VCIX_MCU cortex-m4) set(GENERIC_G471VCIX_FPCONF "-") add_library(GENERIC_G471VCIX INTERFACE) target_compile_options(GENERIC_G471VCIX INTERFACE - "SHELL:-DSTM32G471xx " + "SHELL:-DSTM32G471xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -67575,15 +67715,15 @@ target_compile_options(GENERIC_G471VCIX_serial_none INTERFACE ) add_library(GENERIC_G471VCIX_usb_CDC INTERFACE) target_compile_options(GENERIC_G471VCIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G471VCIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G471VCIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G471VCIX_usb_HID INTERFACE) target_compile_options(GENERIC_G471VCIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G471VCIX_usb_none INTERFACE) target_compile_options(GENERIC_G471VCIX_usb_none INTERFACE @@ -67612,7 +67752,7 @@ set(GENERIC_G471VCTX_MCU cortex-m4) set(GENERIC_G471VCTX_FPCONF "-") add_library(GENERIC_G471VCTX INTERFACE) target_compile_options(GENERIC_G471VCTX INTERFACE - "SHELL:-DSTM32G471xx " + "SHELL:-DSTM32G471xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -67657,15 +67797,15 @@ target_compile_options(GENERIC_G471VCTX_serial_none INTERFACE ) add_library(GENERIC_G471VCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G471VCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G471VCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G471VCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G471VCTX_usb_HID INTERFACE) target_compile_options(GENERIC_G471VCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G471VCTX_usb_none INTERFACE) target_compile_options(GENERIC_G471VCTX_usb_none INTERFACE @@ -67694,7 +67834,7 @@ set(GENERIC_G471VEHX_MCU cortex-m4) set(GENERIC_G471VEHX_FPCONF "-") add_library(GENERIC_G471VEHX INTERFACE) target_compile_options(GENERIC_G471VEHX INTERFACE - "SHELL:-DSTM32G471xx " + "SHELL:-DSTM32G471xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -67739,15 +67879,15 @@ target_compile_options(GENERIC_G471VEHX_serial_none INTERFACE ) add_library(GENERIC_G471VEHX_usb_CDC INTERFACE) target_compile_options(GENERIC_G471VEHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G471VEHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G471VEHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G471VEHX_usb_HID INTERFACE) target_compile_options(GENERIC_G471VEHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G471VEHX_usb_none INTERFACE) target_compile_options(GENERIC_G471VEHX_usb_none INTERFACE @@ -67776,7 +67916,7 @@ set(GENERIC_G471VEIX_MCU cortex-m4) set(GENERIC_G471VEIX_FPCONF "-") add_library(GENERIC_G471VEIX INTERFACE) target_compile_options(GENERIC_G471VEIX INTERFACE - "SHELL:-DSTM32G471xx " + "SHELL:-DSTM32G471xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -67821,15 +67961,15 @@ target_compile_options(GENERIC_G471VEIX_serial_none INTERFACE ) add_library(GENERIC_G471VEIX_usb_CDC INTERFACE) target_compile_options(GENERIC_G471VEIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G471VEIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G471VEIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G471VEIX_usb_HID INTERFACE) target_compile_options(GENERIC_G471VEIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G471VEIX_usb_none INTERFACE) target_compile_options(GENERIC_G471VEIX_usb_none INTERFACE @@ -67858,7 +67998,7 @@ set(GENERIC_G471VETX_MCU cortex-m4) set(GENERIC_G471VETX_FPCONF "-") add_library(GENERIC_G471VETX INTERFACE) target_compile_options(GENERIC_G471VETX INTERFACE - "SHELL:-DSTM32G471xx " + "SHELL:-DSTM32G471xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -67903,15 +68043,15 @@ target_compile_options(GENERIC_G471VETX_serial_none INTERFACE ) add_library(GENERIC_G471VETX_usb_CDC INTERFACE) target_compile_options(GENERIC_G471VETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G471VETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G471VETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G471VETX_usb_HID INTERFACE) target_compile_options(GENERIC_G471VETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G471VETX_usb_none INTERFACE) target_compile_options(GENERIC_G471VETX_usb_none INTERFACE @@ -67940,7 +68080,7 @@ set(GENERIC_G473CBTX_MCU cortex-m4) set(GENERIC_G473CBTX_FPCONF "-") add_library(GENERIC_G473CBTX INTERFACE) target_compile_options(GENERIC_G473CBTX INTERFACE - "SHELL:-DSTM32G473xx " + "SHELL:-DSTM32G473xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -67985,15 +68125,15 @@ target_compile_options(GENERIC_G473CBTX_serial_none INTERFACE ) add_library(GENERIC_G473CBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G473CBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G473CBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G473CBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G473CBTX_usb_HID INTERFACE) target_compile_options(GENERIC_G473CBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G473CBTX_usb_none INTERFACE) target_compile_options(GENERIC_G473CBTX_usb_none INTERFACE @@ -68022,7 +68162,7 @@ set(GENERIC_G473CBUX_MCU cortex-m4) set(GENERIC_G473CBUX_FPCONF "-") add_library(GENERIC_G473CBUX INTERFACE) target_compile_options(GENERIC_G473CBUX INTERFACE - "SHELL:-DSTM32G473xx " + "SHELL:-DSTM32G473xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -68067,15 +68207,15 @@ target_compile_options(GENERIC_G473CBUX_serial_none INTERFACE ) add_library(GENERIC_G473CBUX_usb_CDC INTERFACE) target_compile_options(GENERIC_G473CBUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G473CBUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G473CBUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G473CBUX_usb_HID INTERFACE) target_compile_options(GENERIC_G473CBUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G473CBUX_usb_none INTERFACE) target_compile_options(GENERIC_G473CBUX_usb_none INTERFACE @@ -68104,7 +68244,7 @@ set(GENERIC_G473CCTX_MCU cortex-m4) set(GENERIC_G473CCTX_FPCONF "-") add_library(GENERIC_G473CCTX INTERFACE) target_compile_options(GENERIC_G473CCTX INTERFACE - "SHELL:-DSTM32G473xx " + "SHELL:-DSTM32G473xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -68149,15 +68289,15 @@ target_compile_options(GENERIC_G473CCTX_serial_none INTERFACE ) add_library(GENERIC_G473CCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G473CCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G473CCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G473CCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G473CCTX_usb_HID INTERFACE) target_compile_options(GENERIC_G473CCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G473CCTX_usb_none INTERFACE) target_compile_options(GENERIC_G473CCTX_usb_none INTERFACE @@ -68186,7 +68326,7 @@ set(GENERIC_G473CCUX_MCU cortex-m4) set(GENERIC_G473CCUX_FPCONF "-") add_library(GENERIC_G473CCUX INTERFACE) target_compile_options(GENERIC_G473CCUX INTERFACE - "SHELL:-DSTM32G473xx " + "SHELL:-DSTM32G473xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -68231,15 +68371,15 @@ target_compile_options(GENERIC_G473CCUX_serial_none INTERFACE ) add_library(GENERIC_G473CCUX_usb_CDC INTERFACE) target_compile_options(GENERIC_G473CCUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G473CCUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G473CCUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G473CCUX_usb_HID INTERFACE) target_compile_options(GENERIC_G473CCUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G473CCUX_usb_none INTERFACE) target_compile_options(GENERIC_G473CCUX_usb_none INTERFACE @@ -68268,7 +68408,7 @@ set(GENERIC_G473CETX_MCU cortex-m4) set(GENERIC_G473CETX_FPCONF "-") add_library(GENERIC_G473CETX INTERFACE) target_compile_options(GENERIC_G473CETX INTERFACE - "SHELL:-DSTM32G473xx " + "SHELL:-DSTM32G473xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -68313,15 +68453,15 @@ target_compile_options(GENERIC_G473CETX_serial_none INTERFACE ) add_library(GENERIC_G473CETX_usb_CDC INTERFACE) target_compile_options(GENERIC_G473CETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G473CETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G473CETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G473CETX_usb_HID INTERFACE) target_compile_options(GENERIC_G473CETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G473CETX_usb_none INTERFACE) target_compile_options(GENERIC_G473CETX_usb_none INTERFACE @@ -68350,7 +68490,7 @@ set(GENERIC_G473CEUX_MCU cortex-m4) set(GENERIC_G473CEUX_FPCONF "-") add_library(GENERIC_G473CEUX INTERFACE) target_compile_options(GENERIC_G473CEUX INTERFACE - "SHELL:-DSTM32G473xx " + "SHELL:-DSTM32G473xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -68395,15 +68535,15 @@ target_compile_options(GENERIC_G473CEUX_serial_none INTERFACE ) add_library(GENERIC_G473CEUX_usb_CDC INTERFACE) target_compile_options(GENERIC_G473CEUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G473CEUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G473CEUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G473CEUX_usb_HID INTERFACE) target_compile_options(GENERIC_G473CEUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G473CEUX_usb_none INTERFACE) target_compile_options(GENERIC_G473CEUX_usb_none INTERFACE @@ -68432,7 +68572,7 @@ set(GENERIC_G473MBTX_MCU cortex-m4) set(GENERIC_G473MBTX_FPCONF "-") add_library(GENERIC_G473MBTX INTERFACE) target_compile_options(GENERIC_G473MBTX INTERFACE - "SHELL:-DSTM32G473xx " + "SHELL:-DSTM32G473xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -68477,15 +68617,15 @@ target_compile_options(GENERIC_G473MBTX_serial_none INTERFACE ) add_library(GENERIC_G473MBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G473MBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G473MBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G473MBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G473MBTX_usb_HID INTERFACE) target_compile_options(GENERIC_G473MBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G473MBTX_usb_none INTERFACE) target_compile_options(GENERIC_G473MBTX_usb_none INTERFACE @@ -68514,7 +68654,7 @@ set(GENERIC_G473MCTX_MCU cortex-m4) set(GENERIC_G473MCTX_FPCONF "-") add_library(GENERIC_G473MCTX INTERFACE) target_compile_options(GENERIC_G473MCTX INTERFACE - "SHELL:-DSTM32G473xx " + "SHELL:-DSTM32G473xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -68559,15 +68699,15 @@ target_compile_options(GENERIC_G473MCTX_serial_none INTERFACE ) add_library(GENERIC_G473MCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G473MCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G473MCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G473MCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G473MCTX_usb_HID INTERFACE) target_compile_options(GENERIC_G473MCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G473MCTX_usb_none INTERFACE) target_compile_options(GENERIC_G473MCTX_usb_none INTERFACE @@ -68596,7 +68736,7 @@ set(GENERIC_G473METX_MCU cortex-m4) set(GENERIC_G473METX_FPCONF "-") add_library(GENERIC_G473METX INTERFACE) target_compile_options(GENERIC_G473METX INTERFACE - "SHELL:-DSTM32G473xx " + "SHELL:-DSTM32G473xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -68641,15 +68781,15 @@ target_compile_options(GENERIC_G473METX_serial_none INTERFACE ) add_library(GENERIC_G473METX_usb_CDC INTERFACE) target_compile_options(GENERIC_G473METX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G473METX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G473METX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G473METX_usb_HID INTERFACE) target_compile_options(GENERIC_G473METX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G473METX_usb_none INTERFACE) target_compile_options(GENERIC_G473METX_usb_none INTERFACE @@ -68678,7 +68818,7 @@ set(GENERIC_G473PBIX_MCU cortex-m4) set(GENERIC_G473PBIX_FPCONF "-") add_library(GENERIC_G473PBIX INTERFACE) target_compile_options(GENERIC_G473PBIX INTERFACE - "SHELL:-DSTM32G473xx " + "SHELL:-DSTM32G473xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -68723,15 +68863,15 @@ target_compile_options(GENERIC_G473PBIX_serial_none INTERFACE ) add_library(GENERIC_G473PBIX_usb_CDC INTERFACE) target_compile_options(GENERIC_G473PBIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G473PBIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G473PBIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G473PBIX_usb_HID INTERFACE) target_compile_options(GENERIC_G473PBIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G473PBIX_usb_none INTERFACE) target_compile_options(GENERIC_G473PBIX_usb_none INTERFACE @@ -68760,7 +68900,7 @@ set(GENERIC_G473PCIX_MCU cortex-m4) set(GENERIC_G473PCIX_FPCONF "-") add_library(GENERIC_G473PCIX INTERFACE) target_compile_options(GENERIC_G473PCIX INTERFACE - "SHELL:-DSTM32G473xx " + "SHELL:-DSTM32G473xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -68805,15 +68945,15 @@ target_compile_options(GENERIC_G473PCIX_serial_none INTERFACE ) add_library(GENERIC_G473PCIX_usb_CDC INTERFACE) target_compile_options(GENERIC_G473PCIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G473PCIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G473PCIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G473PCIX_usb_HID INTERFACE) target_compile_options(GENERIC_G473PCIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G473PCIX_usb_none INTERFACE) target_compile_options(GENERIC_G473PCIX_usb_none INTERFACE @@ -68842,7 +68982,7 @@ set(GENERIC_G473PEIX_MCU cortex-m4) set(GENERIC_G473PEIX_FPCONF "-") add_library(GENERIC_G473PEIX INTERFACE) target_compile_options(GENERIC_G473PEIX INTERFACE - "SHELL:-DSTM32G473xx " + "SHELL:-DSTM32G473xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -68887,15 +69027,15 @@ target_compile_options(GENERIC_G473PEIX_serial_none INTERFACE ) add_library(GENERIC_G473PEIX_usb_CDC INTERFACE) target_compile_options(GENERIC_G473PEIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G473PEIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G473PEIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G473PEIX_usb_HID INTERFACE) target_compile_options(GENERIC_G473PEIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G473PEIX_usb_none INTERFACE) target_compile_options(GENERIC_G473PEIX_usb_none INTERFACE @@ -68924,7 +69064,7 @@ set(GENERIC_G473QBTX_MCU cortex-m4) set(GENERIC_G473QBTX_FPCONF "-") add_library(GENERIC_G473QBTX INTERFACE) target_compile_options(GENERIC_G473QBTX INTERFACE - "SHELL:-DSTM32G473xx " + "SHELL:-DSTM32G473xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -68969,15 +69109,15 @@ target_compile_options(GENERIC_G473QBTX_serial_none INTERFACE ) add_library(GENERIC_G473QBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G473QBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G473QBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G473QBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G473QBTX_usb_HID INTERFACE) target_compile_options(GENERIC_G473QBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G473QBTX_usb_none INTERFACE) target_compile_options(GENERIC_G473QBTX_usb_none INTERFACE @@ -69006,7 +69146,7 @@ set(GENERIC_G473QCTX_MCU cortex-m4) set(GENERIC_G473QCTX_FPCONF "-") add_library(GENERIC_G473QCTX INTERFACE) target_compile_options(GENERIC_G473QCTX INTERFACE - "SHELL:-DSTM32G473xx " + "SHELL:-DSTM32G473xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -69051,15 +69191,15 @@ target_compile_options(GENERIC_G473QCTX_serial_none INTERFACE ) add_library(GENERIC_G473QCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G473QCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G473QCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G473QCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G473QCTX_usb_HID INTERFACE) target_compile_options(GENERIC_G473QCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G473QCTX_usb_none INTERFACE) target_compile_options(GENERIC_G473QCTX_usb_none INTERFACE @@ -69088,7 +69228,7 @@ set(GENERIC_G473QETX_MCU cortex-m4) set(GENERIC_G473QETX_FPCONF "-") add_library(GENERIC_G473QETX INTERFACE) target_compile_options(GENERIC_G473QETX INTERFACE - "SHELL:-DSTM32G473xx " + "SHELL:-DSTM32G473xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -69133,15 +69273,15 @@ target_compile_options(GENERIC_G473QETX_serial_none INTERFACE ) add_library(GENERIC_G473QETX_usb_CDC INTERFACE) target_compile_options(GENERIC_G473QETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G473QETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G473QETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G473QETX_usb_HID INTERFACE) target_compile_options(GENERIC_G473QETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G473QETX_usb_none INTERFACE) target_compile_options(GENERIC_G473QETX_usb_none INTERFACE @@ -69170,7 +69310,7 @@ set(GENERIC_G473QETXZ_MCU cortex-m4) set(GENERIC_G473QETXZ_FPCONF "-") add_library(GENERIC_G473QETXZ INTERFACE) target_compile_options(GENERIC_G473QETXZ INTERFACE - "SHELL:-DSTM32G473xx " + "SHELL:-DSTM32G473xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -69215,15 +69355,15 @@ target_compile_options(GENERIC_G473QETXZ_serial_none INTERFACE ) add_library(GENERIC_G473QETXZ_usb_CDC INTERFACE) target_compile_options(GENERIC_G473QETXZ_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G473QETXZ_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G473QETXZ_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G473QETXZ_usb_HID INTERFACE) target_compile_options(GENERIC_G473QETXZ_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G473QETXZ_usb_none INTERFACE) target_compile_options(GENERIC_G473QETXZ_usb_none INTERFACE @@ -69252,7 +69392,7 @@ set(GENERIC_G473RBTX_MCU cortex-m4) set(GENERIC_G473RBTX_FPCONF "-") add_library(GENERIC_G473RBTX INTERFACE) target_compile_options(GENERIC_G473RBTX INTERFACE - "SHELL:-DSTM32G473xx " + "SHELL:-DSTM32G473xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -69297,15 +69437,15 @@ target_compile_options(GENERIC_G473RBTX_serial_none INTERFACE ) add_library(GENERIC_G473RBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G473RBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G473RBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G473RBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G473RBTX_usb_HID INTERFACE) target_compile_options(GENERIC_G473RBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G473RBTX_usb_none INTERFACE) target_compile_options(GENERIC_G473RBTX_usb_none INTERFACE @@ -69334,7 +69474,7 @@ set(GENERIC_G473RCTX_MCU cortex-m4) set(GENERIC_G473RCTX_FPCONF "-") add_library(GENERIC_G473RCTX INTERFACE) target_compile_options(GENERIC_G473RCTX INTERFACE - "SHELL:-DSTM32G473xx " + "SHELL:-DSTM32G473xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -69379,15 +69519,15 @@ target_compile_options(GENERIC_G473RCTX_serial_none INTERFACE ) add_library(GENERIC_G473RCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G473RCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G473RCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G473RCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G473RCTX_usb_HID INTERFACE) target_compile_options(GENERIC_G473RCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G473RCTX_usb_none INTERFACE) target_compile_options(GENERIC_G473RCTX_usb_none INTERFACE @@ -69416,7 +69556,7 @@ set(GENERIC_G473RETX_MCU cortex-m4) set(GENERIC_G473RETX_FPCONF "-") add_library(GENERIC_G473RETX INTERFACE) target_compile_options(GENERIC_G473RETX INTERFACE - "SHELL:-DSTM32G473xx " + "SHELL:-DSTM32G473xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -69461,15 +69601,15 @@ target_compile_options(GENERIC_G473RETX_serial_none INTERFACE ) add_library(GENERIC_G473RETX_usb_CDC INTERFACE) target_compile_options(GENERIC_G473RETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G473RETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G473RETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G473RETX_usb_HID INTERFACE) target_compile_options(GENERIC_G473RETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G473RETX_usb_none INTERFACE) target_compile_options(GENERIC_G473RETX_usb_none INTERFACE @@ -69498,7 +69638,7 @@ set(GENERIC_G473RETXZ_MCU cortex-m4) set(GENERIC_G473RETXZ_FPCONF "-") add_library(GENERIC_G473RETXZ INTERFACE) target_compile_options(GENERIC_G473RETXZ INTERFACE - "SHELL:-DSTM32G473xx " + "SHELL:-DSTM32G473xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -69543,15 +69683,15 @@ target_compile_options(GENERIC_G473RETXZ_serial_none INTERFACE ) add_library(GENERIC_G473RETXZ_usb_CDC INTERFACE) target_compile_options(GENERIC_G473RETXZ_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G473RETXZ_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G473RETXZ_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G473RETXZ_usb_HID INTERFACE) target_compile_options(GENERIC_G473RETXZ_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G473RETXZ_usb_none INTERFACE) target_compile_options(GENERIC_G473RETXZ_usb_none INTERFACE @@ -69580,7 +69720,7 @@ set(GENERIC_G473VBHX_MCU cortex-m4) set(GENERIC_G473VBHX_FPCONF "-") add_library(GENERIC_G473VBHX INTERFACE) target_compile_options(GENERIC_G473VBHX INTERFACE - "SHELL:-DSTM32G473xx " + "SHELL:-DSTM32G473xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -69625,15 +69765,15 @@ target_compile_options(GENERIC_G473VBHX_serial_none INTERFACE ) add_library(GENERIC_G473VBHX_usb_CDC INTERFACE) target_compile_options(GENERIC_G473VBHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G473VBHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G473VBHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G473VBHX_usb_HID INTERFACE) target_compile_options(GENERIC_G473VBHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G473VBHX_usb_none INTERFACE) target_compile_options(GENERIC_G473VBHX_usb_none INTERFACE @@ -69662,7 +69802,7 @@ set(GENERIC_G473VBTX_MCU cortex-m4) set(GENERIC_G473VBTX_FPCONF "-") add_library(GENERIC_G473VBTX INTERFACE) target_compile_options(GENERIC_G473VBTX INTERFACE - "SHELL:-DSTM32G473xx " + "SHELL:-DSTM32G473xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -69707,15 +69847,15 @@ target_compile_options(GENERIC_G473VBTX_serial_none INTERFACE ) add_library(GENERIC_G473VBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G473VBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G473VBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G473VBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G473VBTX_usb_HID INTERFACE) target_compile_options(GENERIC_G473VBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G473VBTX_usb_none INTERFACE) target_compile_options(GENERIC_G473VBTX_usb_none INTERFACE @@ -69744,7 +69884,7 @@ set(GENERIC_G473VCHX_MCU cortex-m4) set(GENERIC_G473VCHX_FPCONF "-") add_library(GENERIC_G473VCHX INTERFACE) target_compile_options(GENERIC_G473VCHX INTERFACE - "SHELL:-DSTM32G473xx " + "SHELL:-DSTM32G473xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -69789,15 +69929,15 @@ target_compile_options(GENERIC_G473VCHX_serial_none INTERFACE ) add_library(GENERIC_G473VCHX_usb_CDC INTERFACE) target_compile_options(GENERIC_G473VCHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G473VCHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G473VCHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G473VCHX_usb_HID INTERFACE) target_compile_options(GENERIC_G473VCHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G473VCHX_usb_none INTERFACE) target_compile_options(GENERIC_G473VCHX_usb_none INTERFACE @@ -69826,7 +69966,7 @@ set(GENERIC_G473VCTX_MCU cortex-m4) set(GENERIC_G473VCTX_FPCONF "-") add_library(GENERIC_G473VCTX INTERFACE) target_compile_options(GENERIC_G473VCTX INTERFACE - "SHELL:-DSTM32G473xx " + "SHELL:-DSTM32G473xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -69871,15 +70011,15 @@ target_compile_options(GENERIC_G473VCTX_serial_none INTERFACE ) add_library(GENERIC_G473VCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G473VCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G473VCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G473VCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G473VCTX_usb_HID INTERFACE) target_compile_options(GENERIC_G473VCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G473VCTX_usb_none INTERFACE) target_compile_options(GENERIC_G473VCTX_usb_none INTERFACE @@ -69908,7 +70048,7 @@ set(GENERIC_G473VEHX_MCU cortex-m4) set(GENERIC_G473VEHX_FPCONF "-") add_library(GENERIC_G473VEHX INTERFACE) target_compile_options(GENERIC_G473VEHX INTERFACE - "SHELL:-DSTM32G473xx " + "SHELL:-DSTM32G473xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -69953,15 +70093,15 @@ target_compile_options(GENERIC_G473VEHX_serial_none INTERFACE ) add_library(GENERIC_G473VEHX_usb_CDC INTERFACE) target_compile_options(GENERIC_G473VEHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G473VEHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G473VEHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G473VEHX_usb_HID INTERFACE) target_compile_options(GENERIC_G473VEHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G473VEHX_usb_none INTERFACE) target_compile_options(GENERIC_G473VEHX_usb_none INTERFACE @@ -69990,7 +70130,7 @@ set(GENERIC_G473VETX_MCU cortex-m4) set(GENERIC_G473VETX_FPCONF "-") add_library(GENERIC_G473VETX INTERFACE) target_compile_options(GENERIC_G473VETX INTERFACE - "SHELL:-DSTM32G473xx " + "SHELL:-DSTM32G473xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -70035,15 +70175,15 @@ target_compile_options(GENERIC_G473VETX_serial_none INTERFACE ) add_library(GENERIC_G473VETX_usb_CDC INTERFACE) target_compile_options(GENERIC_G473VETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G473VETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G473VETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G473VETX_usb_HID INTERFACE) target_compile_options(GENERIC_G473VETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G473VETX_usb_none INTERFACE) target_compile_options(GENERIC_G473VETX_usb_none INTERFACE @@ -70072,7 +70212,7 @@ set(GENERIC_G474CBTX_MCU cortex-m4) set(GENERIC_G474CBTX_FPCONF "-") add_library(GENERIC_G474CBTX INTERFACE) target_compile_options(GENERIC_G474CBTX INTERFACE - "SHELL:-DSTM32G474xx " + "SHELL:-DSTM32G474xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -70117,15 +70257,15 @@ target_compile_options(GENERIC_G474CBTX_serial_none INTERFACE ) add_library(GENERIC_G474CBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G474CBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G474CBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G474CBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G474CBTX_usb_HID INTERFACE) target_compile_options(GENERIC_G474CBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G474CBTX_usb_none INTERFACE) target_compile_options(GENERIC_G474CBTX_usb_none INTERFACE @@ -70154,7 +70294,7 @@ set(GENERIC_G474CBUX_MCU cortex-m4) set(GENERIC_G474CBUX_FPCONF "-") add_library(GENERIC_G474CBUX INTERFACE) target_compile_options(GENERIC_G474CBUX INTERFACE - "SHELL:-DSTM32G474xx " + "SHELL:-DSTM32G474xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -70199,15 +70339,15 @@ target_compile_options(GENERIC_G474CBUX_serial_none INTERFACE ) add_library(GENERIC_G474CBUX_usb_CDC INTERFACE) target_compile_options(GENERIC_G474CBUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G474CBUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G474CBUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G474CBUX_usb_HID INTERFACE) target_compile_options(GENERIC_G474CBUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G474CBUX_usb_none INTERFACE) target_compile_options(GENERIC_G474CBUX_usb_none INTERFACE @@ -70236,7 +70376,7 @@ set(GENERIC_G474CCTX_MCU cortex-m4) set(GENERIC_G474CCTX_FPCONF "-") add_library(GENERIC_G474CCTX INTERFACE) target_compile_options(GENERIC_G474CCTX INTERFACE - "SHELL:-DSTM32G474xx " + "SHELL:-DSTM32G474xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -70281,15 +70421,15 @@ target_compile_options(GENERIC_G474CCTX_serial_none INTERFACE ) add_library(GENERIC_G474CCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G474CCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G474CCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G474CCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G474CCTX_usb_HID INTERFACE) target_compile_options(GENERIC_G474CCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G474CCTX_usb_none INTERFACE) target_compile_options(GENERIC_G474CCTX_usb_none INTERFACE @@ -70318,7 +70458,7 @@ set(GENERIC_G474CCUX_MCU cortex-m4) set(GENERIC_G474CCUX_FPCONF "-") add_library(GENERIC_G474CCUX INTERFACE) target_compile_options(GENERIC_G474CCUX INTERFACE - "SHELL:-DSTM32G474xx " + "SHELL:-DSTM32G474xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -70363,15 +70503,15 @@ target_compile_options(GENERIC_G474CCUX_serial_none INTERFACE ) add_library(GENERIC_G474CCUX_usb_CDC INTERFACE) target_compile_options(GENERIC_G474CCUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G474CCUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G474CCUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G474CCUX_usb_HID INTERFACE) target_compile_options(GENERIC_G474CCUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G474CCUX_usb_none INTERFACE) target_compile_options(GENERIC_G474CCUX_usb_none INTERFACE @@ -70400,7 +70540,7 @@ set(GENERIC_G474CETX_MCU cortex-m4) set(GENERIC_G474CETX_FPCONF "-") add_library(GENERIC_G474CETX INTERFACE) target_compile_options(GENERIC_G474CETX INTERFACE - "SHELL:-DSTM32G474xx " + "SHELL:-DSTM32G474xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -70445,15 +70585,15 @@ target_compile_options(GENERIC_G474CETX_serial_none INTERFACE ) add_library(GENERIC_G474CETX_usb_CDC INTERFACE) target_compile_options(GENERIC_G474CETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G474CETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G474CETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G474CETX_usb_HID INTERFACE) target_compile_options(GENERIC_G474CETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G474CETX_usb_none INTERFACE) target_compile_options(GENERIC_G474CETX_usb_none INTERFACE @@ -70482,7 +70622,7 @@ set(GENERIC_G474CEUX_MCU cortex-m4) set(GENERIC_G474CEUX_FPCONF "-") add_library(GENERIC_G474CEUX INTERFACE) target_compile_options(GENERIC_G474CEUX INTERFACE - "SHELL:-DSTM32G474xx " + "SHELL:-DSTM32G474xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -70527,15 +70667,15 @@ target_compile_options(GENERIC_G474CEUX_serial_none INTERFACE ) add_library(GENERIC_G474CEUX_usb_CDC INTERFACE) target_compile_options(GENERIC_G474CEUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G474CEUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G474CEUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G474CEUX_usb_HID INTERFACE) target_compile_options(GENERIC_G474CEUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G474CEUX_usb_none INTERFACE) target_compile_options(GENERIC_G474CEUX_usb_none INTERFACE @@ -70564,7 +70704,7 @@ set(GENERIC_G474MBTX_MCU cortex-m4) set(GENERIC_G474MBTX_FPCONF "-") add_library(GENERIC_G474MBTX INTERFACE) target_compile_options(GENERIC_G474MBTX INTERFACE - "SHELL:-DSTM32G474xx " + "SHELL:-DSTM32G474xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -70609,15 +70749,15 @@ target_compile_options(GENERIC_G474MBTX_serial_none INTERFACE ) add_library(GENERIC_G474MBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G474MBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G474MBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G474MBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G474MBTX_usb_HID INTERFACE) target_compile_options(GENERIC_G474MBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G474MBTX_usb_none INTERFACE) target_compile_options(GENERIC_G474MBTX_usb_none INTERFACE @@ -70646,7 +70786,7 @@ set(GENERIC_G474MCTX_MCU cortex-m4) set(GENERIC_G474MCTX_FPCONF "-") add_library(GENERIC_G474MCTX INTERFACE) target_compile_options(GENERIC_G474MCTX INTERFACE - "SHELL:-DSTM32G474xx " + "SHELL:-DSTM32G474xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -70691,15 +70831,15 @@ target_compile_options(GENERIC_G474MCTX_serial_none INTERFACE ) add_library(GENERIC_G474MCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G474MCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G474MCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G474MCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G474MCTX_usb_HID INTERFACE) target_compile_options(GENERIC_G474MCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G474MCTX_usb_none INTERFACE) target_compile_options(GENERIC_G474MCTX_usb_none INTERFACE @@ -70728,7 +70868,7 @@ set(GENERIC_G474METX_MCU cortex-m4) set(GENERIC_G474METX_FPCONF "-") add_library(GENERIC_G474METX INTERFACE) target_compile_options(GENERIC_G474METX INTERFACE - "SHELL:-DSTM32G474xx " + "SHELL:-DSTM32G474xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -70773,15 +70913,15 @@ target_compile_options(GENERIC_G474METX_serial_none INTERFACE ) add_library(GENERIC_G474METX_usb_CDC INTERFACE) target_compile_options(GENERIC_G474METX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G474METX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G474METX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G474METX_usb_HID INTERFACE) target_compile_options(GENERIC_G474METX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G474METX_usb_none INTERFACE) target_compile_options(GENERIC_G474METX_usb_none INTERFACE @@ -70810,7 +70950,7 @@ set(GENERIC_G474PBIX_MCU cortex-m4) set(GENERIC_G474PBIX_FPCONF "-") add_library(GENERIC_G474PBIX INTERFACE) target_compile_options(GENERIC_G474PBIX INTERFACE - "SHELL:-DSTM32G474xx " + "SHELL:-DSTM32G474xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -70855,15 +70995,15 @@ target_compile_options(GENERIC_G474PBIX_serial_none INTERFACE ) add_library(GENERIC_G474PBIX_usb_CDC INTERFACE) target_compile_options(GENERIC_G474PBIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G474PBIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G474PBIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G474PBIX_usb_HID INTERFACE) target_compile_options(GENERIC_G474PBIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G474PBIX_usb_none INTERFACE) target_compile_options(GENERIC_G474PBIX_usb_none INTERFACE @@ -70892,7 +71032,7 @@ set(GENERIC_G474PCIX_MCU cortex-m4) set(GENERIC_G474PCIX_FPCONF "-") add_library(GENERIC_G474PCIX INTERFACE) target_compile_options(GENERIC_G474PCIX INTERFACE - "SHELL:-DSTM32G474xx " + "SHELL:-DSTM32G474xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -70937,15 +71077,15 @@ target_compile_options(GENERIC_G474PCIX_serial_none INTERFACE ) add_library(GENERIC_G474PCIX_usb_CDC INTERFACE) target_compile_options(GENERIC_G474PCIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G474PCIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G474PCIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G474PCIX_usb_HID INTERFACE) target_compile_options(GENERIC_G474PCIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G474PCIX_usb_none INTERFACE) target_compile_options(GENERIC_G474PCIX_usb_none INTERFACE @@ -70974,7 +71114,7 @@ set(GENERIC_G474PEIX_MCU cortex-m4) set(GENERIC_G474PEIX_FPCONF "-") add_library(GENERIC_G474PEIX INTERFACE) target_compile_options(GENERIC_G474PEIX INTERFACE - "SHELL:-DSTM32G474xx " + "SHELL:-DSTM32G474xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -71019,15 +71159,15 @@ target_compile_options(GENERIC_G474PEIX_serial_none INTERFACE ) add_library(GENERIC_G474PEIX_usb_CDC INTERFACE) target_compile_options(GENERIC_G474PEIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G474PEIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G474PEIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G474PEIX_usb_HID INTERFACE) target_compile_options(GENERIC_G474PEIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G474PEIX_usb_none INTERFACE) target_compile_options(GENERIC_G474PEIX_usb_none INTERFACE @@ -71056,7 +71196,7 @@ set(GENERIC_G474QBTX_MCU cortex-m4) set(GENERIC_G474QBTX_FPCONF "-") add_library(GENERIC_G474QBTX INTERFACE) target_compile_options(GENERIC_G474QBTX INTERFACE - "SHELL:-DSTM32G474xx " + "SHELL:-DSTM32G474xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -71101,15 +71241,15 @@ target_compile_options(GENERIC_G474QBTX_serial_none INTERFACE ) add_library(GENERIC_G474QBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G474QBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G474QBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G474QBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G474QBTX_usb_HID INTERFACE) target_compile_options(GENERIC_G474QBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G474QBTX_usb_none INTERFACE) target_compile_options(GENERIC_G474QBTX_usb_none INTERFACE @@ -71138,7 +71278,7 @@ set(GENERIC_G474QCTX_MCU cortex-m4) set(GENERIC_G474QCTX_FPCONF "-") add_library(GENERIC_G474QCTX INTERFACE) target_compile_options(GENERIC_G474QCTX INTERFACE - "SHELL:-DSTM32G474xx " + "SHELL:-DSTM32G474xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -71183,15 +71323,15 @@ target_compile_options(GENERIC_G474QCTX_serial_none INTERFACE ) add_library(GENERIC_G474QCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G474QCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G474QCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G474QCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G474QCTX_usb_HID INTERFACE) target_compile_options(GENERIC_G474QCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G474QCTX_usb_none INTERFACE) target_compile_options(GENERIC_G474QCTX_usb_none INTERFACE @@ -71220,7 +71360,7 @@ set(GENERIC_G474QETX_MCU cortex-m4) set(GENERIC_G474QETX_FPCONF "-") add_library(GENERIC_G474QETX INTERFACE) target_compile_options(GENERIC_G474QETX INTERFACE - "SHELL:-DSTM32G474xx " + "SHELL:-DSTM32G474xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -71265,15 +71405,15 @@ target_compile_options(GENERIC_G474QETX_serial_none INTERFACE ) add_library(GENERIC_G474QETX_usb_CDC INTERFACE) target_compile_options(GENERIC_G474QETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G474QETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G474QETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G474QETX_usb_HID INTERFACE) target_compile_options(GENERIC_G474QETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G474QETX_usb_none INTERFACE) target_compile_options(GENERIC_G474QETX_usb_none INTERFACE @@ -71302,7 +71442,7 @@ set(GENERIC_G474RBTX_MCU cortex-m4) set(GENERIC_G474RBTX_FPCONF "-") add_library(GENERIC_G474RBTX INTERFACE) target_compile_options(GENERIC_G474RBTX INTERFACE - "SHELL:-DSTM32G474xx " + "SHELL:-DSTM32G474xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -71347,15 +71487,15 @@ target_compile_options(GENERIC_G474RBTX_serial_none INTERFACE ) add_library(GENERIC_G474RBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G474RBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G474RBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G474RBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G474RBTX_usb_HID INTERFACE) target_compile_options(GENERIC_G474RBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G474RBTX_usb_none INTERFACE) target_compile_options(GENERIC_G474RBTX_usb_none INTERFACE @@ -71384,7 +71524,7 @@ set(GENERIC_G474RCTX_MCU cortex-m4) set(GENERIC_G474RCTX_FPCONF "-") add_library(GENERIC_G474RCTX INTERFACE) target_compile_options(GENERIC_G474RCTX INTERFACE - "SHELL:-DSTM32G474xx " + "SHELL:-DSTM32G474xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -71429,15 +71569,15 @@ target_compile_options(GENERIC_G474RCTX_serial_none INTERFACE ) add_library(GENERIC_G474RCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G474RCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G474RCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G474RCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G474RCTX_usb_HID INTERFACE) target_compile_options(GENERIC_G474RCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G474RCTX_usb_none INTERFACE) target_compile_options(GENERIC_G474RCTX_usb_none INTERFACE @@ -71466,7 +71606,7 @@ set(GENERIC_G474RETX_MCU cortex-m4) set(GENERIC_G474RETX_FPCONF "-") add_library(GENERIC_G474RETX INTERFACE) target_compile_options(GENERIC_G474RETX INTERFACE - "SHELL:-DSTM32G474xx " + "SHELL:-DSTM32G474xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -71511,15 +71651,15 @@ target_compile_options(GENERIC_G474RETX_serial_none INTERFACE ) add_library(GENERIC_G474RETX_usb_CDC INTERFACE) target_compile_options(GENERIC_G474RETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G474RETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G474RETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G474RETX_usb_HID INTERFACE) target_compile_options(GENERIC_G474RETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G474RETX_usb_none INTERFACE) target_compile_options(GENERIC_G474RETX_usb_none INTERFACE @@ -71548,7 +71688,7 @@ set(GENERIC_G474VBHX_MCU cortex-m4) set(GENERIC_G474VBHX_FPCONF "-") add_library(GENERIC_G474VBHX INTERFACE) target_compile_options(GENERIC_G474VBHX INTERFACE - "SHELL:-DSTM32G474xx " + "SHELL:-DSTM32G474xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -71593,15 +71733,15 @@ target_compile_options(GENERIC_G474VBHX_serial_none INTERFACE ) add_library(GENERIC_G474VBHX_usb_CDC INTERFACE) target_compile_options(GENERIC_G474VBHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G474VBHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G474VBHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G474VBHX_usb_HID INTERFACE) target_compile_options(GENERIC_G474VBHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G474VBHX_usb_none INTERFACE) target_compile_options(GENERIC_G474VBHX_usb_none INTERFACE @@ -71630,7 +71770,7 @@ set(GENERIC_G474VBTX_MCU cortex-m4) set(GENERIC_G474VBTX_FPCONF "-") add_library(GENERIC_G474VBTX INTERFACE) target_compile_options(GENERIC_G474VBTX INTERFACE - "SHELL:-DSTM32G474xx " + "SHELL:-DSTM32G474xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -71675,15 +71815,15 @@ target_compile_options(GENERIC_G474VBTX_serial_none INTERFACE ) add_library(GENERIC_G474VBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G474VBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G474VBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G474VBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G474VBTX_usb_HID INTERFACE) target_compile_options(GENERIC_G474VBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G474VBTX_usb_none INTERFACE) target_compile_options(GENERIC_G474VBTX_usb_none INTERFACE @@ -71712,7 +71852,7 @@ set(GENERIC_G474VCHX_MCU cortex-m4) set(GENERIC_G474VCHX_FPCONF "-") add_library(GENERIC_G474VCHX INTERFACE) target_compile_options(GENERIC_G474VCHX INTERFACE - "SHELL:-DSTM32G474xx " + "SHELL:-DSTM32G474xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -71757,15 +71897,15 @@ target_compile_options(GENERIC_G474VCHX_serial_none INTERFACE ) add_library(GENERIC_G474VCHX_usb_CDC INTERFACE) target_compile_options(GENERIC_G474VCHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G474VCHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G474VCHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G474VCHX_usb_HID INTERFACE) target_compile_options(GENERIC_G474VCHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G474VCHX_usb_none INTERFACE) target_compile_options(GENERIC_G474VCHX_usb_none INTERFACE @@ -71794,7 +71934,7 @@ set(GENERIC_G474VCTX_MCU cortex-m4) set(GENERIC_G474VCTX_FPCONF "-") add_library(GENERIC_G474VCTX INTERFACE) target_compile_options(GENERIC_G474VCTX INTERFACE - "SHELL:-DSTM32G474xx " + "SHELL:-DSTM32G474xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -71839,15 +71979,15 @@ target_compile_options(GENERIC_G474VCTX_serial_none INTERFACE ) add_library(GENERIC_G474VCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G474VCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G474VCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G474VCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G474VCTX_usb_HID INTERFACE) target_compile_options(GENERIC_G474VCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G474VCTX_usb_none INTERFACE) target_compile_options(GENERIC_G474VCTX_usb_none INTERFACE @@ -71876,7 +72016,7 @@ set(GENERIC_G474VEHX_MCU cortex-m4) set(GENERIC_G474VEHX_FPCONF "-") add_library(GENERIC_G474VEHX INTERFACE) target_compile_options(GENERIC_G474VEHX INTERFACE - "SHELL:-DSTM32G474xx " + "SHELL:-DSTM32G474xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -71921,15 +72061,15 @@ target_compile_options(GENERIC_G474VEHX_serial_none INTERFACE ) add_library(GENERIC_G474VEHX_usb_CDC INTERFACE) target_compile_options(GENERIC_G474VEHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G474VEHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G474VEHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G474VEHX_usb_HID INTERFACE) target_compile_options(GENERIC_G474VEHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G474VEHX_usb_none INTERFACE) target_compile_options(GENERIC_G474VEHX_usb_none INTERFACE @@ -71958,7 +72098,7 @@ set(GENERIC_G474VETX_MCU cortex-m4) set(GENERIC_G474VETX_FPCONF "-") add_library(GENERIC_G474VETX INTERFACE) target_compile_options(GENERIC_G474VETX INTERFACE - "SHELL:-DSTM32G474xx " + "SHELL:-DSTM32G474xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -72003,15 +72143,15 @@ target_compile_options(GENERIC_G474VETX_serial_none INTERFACE ) add_library(GENERIC_G474VETX_usb_CDC INTERFACE) target_compile_options(GENERIC_G474VETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G474VETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G474VETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G474VETX_usb_HID INTERFACE) target_compile_options(GENERIC_G474VETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G474VETX_usb_none INTERFACE) target_compile_options(GENERIC_G474VETX_usb_none INTERFACE @@ -72040,7 +72180,7 @@ set(GENERIC_G483CETX_MCU cortex-m4) set(GENERIC_G483CETX_FPCONF "-") add_library(GENERIC_G483CETX INTERFACE) target_compile_options(GENERIC_G483CETX INTERFACE - "SHELL:-DSTM32G483xx " + "SHELL:-DSTM32G483xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -72085,15 +72225,15 @@ target_compile_options(GENERIC_G483CETX_serial_none INTERFACE ) add_library(GENERIC_G483CETX_usb_CDC INTERFACE) target_compile_options(GENERIC_G483CETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G483CETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G483CETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G483CETX_usb_HID INTERFACE) target_compile_options(GENERIC_G483CETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G483CETX_usb_none INTERFACE) target_compile_options(GENERIC_G483CETX_usb_none INTERFACE @@ -72122,7 +72262,7 @@ set(GENERIC_G483CEUX_MCU cortex-m4) set(GENERIC_G483CEUX_FPCONF "-") add_library(GENERIC_G483CEUX INTERFACE) target_compile_options(GENERIC_G483CEUX INTERFACE - "SHELL:-DSTM32G483xx " + "SHELL:-DSTM32G483xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -72167,15 +72307,15 @@ target_compile_options(GENERIC_G483CEUX_serial_none INTERFACE ) add_library(GENERIC_G483CEUX_usb_CDC INTERFACE) target_compile_options(GENERIC_G483CEUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G483CEUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G483CEUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G483CEUX_usb_HID INTERFACE) target_compile_options(GENERIC_G483CEUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G483CEUX_usb_none INTERFACE) target_compile_options(GENERIC_G483CEUX_usb_none INTERFACE @@ -72204,7 +72344,7 @@ set(GENERIC_G483METX_MCU cortex-m4) set(GENERIC_G483METX_FPCONF "-") add_library(GENERIC_G483METX INTERFACE) target_compile_options(GENERIC_G483METX INTERFACE - "SHELL:-DSTM32G483xx " + "SHELL:-DSTM32G483xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -72249,15 +72389,15 @@ target_compile_options(GENERIC_G483METX_serial_none INTERFACE ) add_library(GENERIC_G483METX_usb_CDC INTERFACE) target_compile_options(GENERIC_G483METX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G483METX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G483METX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G483METX_usb_HID INTERFACE) target_compile_options(GENERIC_G483METX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G483METX_usb_none INTERFACE) target_compile_options(GENERIC_G483METX_usb_none INTERFACE @@ -72286,7 +72426,7 @@ set(GENERIC_G483PEIX_MCU cortex-m4) set(GENERIC_G483PEIX_FPCONF "-") add_library(GENERIC_G483PEIX INTERFACE) target_compile_options(GENERIC_G483PEIX INTERFACE - "SHELL:-DSTM32G483xx " + "SHELL:-DSTM32G483xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -72331,15 +72471,15 @@ target_compile_options(GENERIC_G483PEIX_serial_none INTERFACE ) add_library(GENERIC_G483PEIX_usb_CDC INTERFACE) target_compile_options(GENERIC_G483PEIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G483PEIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G483PEIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G483PEIX_usb_HID INTERFACE) target_compile_options(GENERIC_G483PEIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G483PEIX_usb_none INTERFACE) target_compile_options(GENERIC_G483PEIX_usb_none INTERFACE @@ -72368,7 +72508,7 @@ set(GENERIC_G483QETX_MCU cortex-m4) set(GENERIC_G483QETX_FPCONF "-") add_library(GENERIC_G483QETX INTERFACE) target_compile_options(GENERIC_G483QETX INTERFACE - "SHELL:-DSTM32G483xx " + "SHELL:-DSTM32G483xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -72413,15 +72553,15 @@ target_compile_options(GENERIC_G483QETX_serial_none INTERFACE ) add_library(GENERIC_G483QETX_usb_CDC INTERFACE) target_compile_options(GENERIC_G483QETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G483QETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G483QETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G483QETX_usb_HID INTERFACE) target_compile_options(GENERIC_G483QETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G483QETX_usb_none INTERFACE) target_compile_options(GENERIC_G483QETX_usb_none INTERFACE @@ -72450,7 +72590,7 @@ set(GENERIC_G483RETX_MCU cortex-m4) set(GENERIC_G483RETX_FPCONF "-") add_library(GENERIC_G483RETX INTERFACE) target_compile_options(GENERIC_G483RETX INTERFACE - "SHELL:-DSTM32G483xx " + "SHELL:-DSTM32G483xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -72495,15 +72635,15 @@ target_compile_options(GENERIC_G483RETX_serial_none INTERFACE ) add_library(GENERIC_G483RETX_usb_CDC INTERFACE) target_compile_options(GENERIC_G483RETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G483RETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G483RETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G483RETX_usb_HID INTERFACE) target_compile_options(GENERIC_G483RETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G483RETX_usb_none INTERFACE) target_compile_options(GENERIC_G483RETX_usb_none INTERFACE @@ -72532,7 +72672,7 @@ set(GENERIC_G483VEHX_MCU cortex-m4) set(GENERIC_G483VEHX_FPCONF "-") add_library(GENERIC_G483VEHX INTERFACE) target_compile_options(GENERIC_G483VEHX INTERFACE - "SHELL:-DSTM32G483xx " + "SHELL:-DSTM32G483xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -72577,15 +72717,15 @@ target_compile_options(GENERIC_G483VEHX_serial_none INTERFACE ) add_library(GENERIC_G483VEHX_usb_CDC INTERFACE) target_compile_options(GENERIC_G483VEHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G483VEHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G483VEHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G483VEHX_usb_HID INTERFACE) target_compile_options(GENERIC_G483VEHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G483VEHX_usb_none INTERFACE) target_compile_options(GENERIC_G483VEHX_usb_none INTERFACE @@ -72614,7 +72754,7 @@ set(GENERIC_G483VETX_MCU cortex-m4) set(GENERIC_G483VETX_FPCONF "-") add_library(GENERIC_G483VETX INTERFACE) target_compile_options(GENERIC_G483VETX INTERFACE - "SHELL:-DSTM32G483xx " + "SHELL:-DSTM32G483xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -72659,15 +72799,15 @@ target_compile_options(GENERIC_G483VETX_serial_none INTERFACE ) add_library(GENERIC_G483VETX_usb_CDC INTERFACE) target_compile_options(GENERIC_G483VETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G483VETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G483VETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G483VETX_usb_HID INTERFACE) target_compile_options(GENERIC_G483VETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G483VETX_usb_none INTERFACE) target_compile_options(GENERIC_G483VETX_usb_none INTERFACE @@ -72696,7 +72836,7 @@ set(GENERIC_G484CETX_MCU cortex-m4) set(GENERIC_G484CETX_FPCONF "-") add_library(GENERIC_G484CETX INTERFACE) target_compile_options(GENERIC_G484CETX INTERFACE - "SHELL:-DSTM32G484xx " + "SHELL:-DSTM32G484xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -72741,15 +72881,15 @@ target_compile_options(GENERIC_G484CETX_serial_none INTERFACE ) add_library(GENERIC_G484CETX_usb_CDC INTERFACE) target_compile_options(GENERIC_G484CETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G484CETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G484CETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G484CETX_usb_HID INTERFACE) target_compile_options(GENERIC_G484CETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G484CETX_usb_none INTERFACE) target_compile_options(GENERIC_G484CETX_usb_none INTERFACE @@ -72778,7 +72918,7 @@ set(GENERIC_G484CEUX_MCU cortex-m4) set(GENERIC_G484CEUX_FPCONF "-") add_library(GENERIC_G484CEUX INTERFACE) target_compile_options(GENERIC_G484CEUX INTERFACE - "SHELL:-DSTM32G484xx " + "SHELL:-DSTM32G484xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -72823,15 +72963,15 @@ target_compile_options(GENERIC_G484CEUX_serial_none INTERFACE ) add_library(GENERIC_G484CEUX_usb_CDC INTERFACE) target_compile_options(GENERIC_G484CEUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G484CEUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G484CEUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G484CEUX_usb_HID INTERFACE) target_compile_options(GENERIC_G484CEUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G484CEUX_usb_none INTERFACE) target_compile_options(GENERIC_G484CEUX_usb_none INTERFACE @@ -72860,7 +73000,7 @@ set(GENERIC_G484METX_MCU cortex-m4) set(GENERIC_G484METX_FPCONF "-") add_library(GENERIC_G484METX INTERFACE) target_compile_options(GENERIC_G484METX INTERFACE - "SHELL:-DSTM32G484xx " + "SHELL:-DSTM32G484xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -72905,15 +73045,15 @@ target_compile_options(GENERIC_G484METX_serial_none INTERFACE ) add_library(GENERIC_G484METX_usb_CDC INTERFACE) target_compile_options(GENERIC_G484METX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G484METX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G484METX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G484METX_usb_HID INTERFACE) target_compile_options(GENERIC_G484METX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G484METX_usb_none INTERFACE) target_compile_options(GENERIC_G484METX_usb_none INTERFACE @@ -72942,7 +73082,7 @@ set(GENERIC_G484PEIX_MCU cortex-m4) set(GENERIC_G484PEIX_FPCONF "-") add_library(GENERIC_G484PEIX INTERFACE) target_compile_options(GENERIC_G484PEIX INTERFACE - "SHELL:-DSTM32G484xx " + "SHELL:-DSTM32G484xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -72987,15 +73127,15 @@ target_compile_options(GENERIC_G484PEIX_serial_none INTERFACE ) add_library(GENERIC_G484PEIX_usb_CDC INTERFACE) target_compile_options(GENERIC_G484PEIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G484PEIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G484PEIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G484PEIX_usb_HID INTERFACE) target_compile_options(GENERIC_G484PEIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G484PEIX_usb_none INTERFACE) target_compile_options(GENERIC_G484PEIX_usb_none INTERFACE @@ -73024,7 +73164,7 @@ set(GENERIC_G484QETX_MCU cortex-m4) set(GENERIC_G484QETX_FPCONF "-") add_library(GENERIC_G484QETX INTERFACE) target_compile_options(GENERIC_G484QETX INTERFACE - "SHELL:-DSTM32G484xx " + "SHELL:-DSTM32G484xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -73069,15 +73209,15 @@ target_compile_options(GENERIC_G484QETX_serial_none INTERFACE ) add_library(GENERIC_G484QETX_usb_CDC INTERFACE) target_compile_options(GENERIC_G484QETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G484QETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G484QETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G484QETX_usb_HID INTERFACE) target_compile_options(GENERIC_G484QETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G484QETX_usb_none INTERFACE) target_compile_options(GENERIC_G484QETX_usb_none INTERFACE @@ -73106,7 +73246,7 @@ set(GENERIC_G484RETX_MCU cortex-m4) set(GENERIC_G484RETX_FPCONF "-") add_library(GENERIC_G484RETX INTERFACE) target_compile_options(GENERIC_G484RETX INTERFACE - "SHELL:-DSTM32G484xx " + "SHELL:-DSTM32G484xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -73151,15 +73291,15 @@ target_compile_options(GENERIC_G484RETX_serial_none INTERFACE ) add_library(GENERIC_G484RETX_usb_CDC INTERFACE) target_compile_options(GENERIC_G484RETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G484RETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G484RETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G484RETX_usb_HID INTERFACE) target_compile_options(GENERIC_G484RETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G484RETX_usb_none INTERFACE) target_compile_options(GENERIC_G484RETX_usb_none INTERFACE @@ -73188,7 +73328,7 @@ set(GENERIC_G484VEHX_MCU cortex-m4) set(GENERIC_G484VEHX_FPCONF "-") add_library(GENERIC_G484VEHX INTERFACE) target_compile_options(GENERIC_G484VEHX INTERFACE - "SHELL:-DSTM32G484xx " + "SHELL:-DSTM32G484xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -73233,15 +73373,15 @@ target_compile_options(GENERIC_G484VEHX_serial_none INTERFACE ) add_library(GENERIC_G484VEHX_usb_CDC INTERFACE) target_compile_options(GENERIC_G484VEHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G484VEHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G484VEHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G484VEHX_usb_HID INTERFACE) target_compile_options(GENERIC_G484VEHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G484VEHX_usb_none INTERFACE) target_compile_options(GENERIC_G484VEHX_usb_none INTERFACE @@ -73270,7 +73410,7 @@ set(GENERIC_G484VETX_MCU cortex-m4) set(GENERIC_G484VETX_FPCONF "-") add_library(GENERIC_G484VETX INTERFACE) target_compile_options(GENERIC_G484VETX INTERFACE - "SHELL:-DSTM32G484xx " + "SHELL:-DSTM32G484xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -73315,15 +73455,15 @@ target_compile_options(GENERIC_G484VETX_serial_none INTERFACE ) add_library(GENERIC_G484VETX_usb_CDC INTERFACE) target_compile_options(GENERIC_G484VETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G484VETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G484VETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G484VETX_usb_HID INTERFACE) target_compile_options(GENERIC_G484VETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G484VETX_usb_none INTERFACE) target_compile_options(GENERIC_G484VETX_usb_none INTERFACE @@ -73352,7 +73492,7 @@ set(GENERIC_G491CCTX_MCU cortex-m4) set(GENERIC_G491CCTX_FPCONF "-") add_library(GENERIC_G491CCTX INTERFACE) target_compile_options(GENERIC_G491CCTX INTERFACE - "SHELL:-DSTM32G491xx " + "SHELL:-DSTM32G491xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -73397,15 +73537,15 @@ target_compile_options(GENERIC_G491CCTX_serial_none INTERFACE ) add_library(GENERIC_G491CCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G491CCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G491CCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G491CCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G491CCTX_usb_HID INTERFACE) target_compile_options(GENERIC_G491CCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G491CCTX_usb_none INTERFACE) target_compile_options(GENERIC_G491CCTX_usb_none INTERFACE @@ -73434,7 +73574,7 @@ set(GENERIC_G491CETX_MCU cortex-m4) set(GENERIC_G491CETX_FPCONF "-") add_library(GENERIC_G491CETX INTERFACE) target_compile_options(GENERIC_G491CETX INTERFACE - "SHELL:-DSTM32G491xx " + "SHELL:-DSTM32G491xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -73479,15 +73619,15 @@ target_compile_options(GENERIC_G491CETX_serial_none INTERFACE ) add_library(GENERIC_G491CETX_usb_CDC INTERFACE) target_compile_options(GENERIC_G491CETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G491CETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G491CETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G491CETX_usb_HID INTERFACE) target_compile_options(GENERIC_G491CETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G491CETX_usb_none INTERFACE) target_compile_options(GENERIC_G491CETX_usb_none INTERFACE @@ -73516,7 +73656,7 @@ set(GENERIC_G491KCUX_MCU cortex-m4) set(GENERIC_G491KCUX_FPCONF "-") add_library(GENERIC_G491KCUX INTERFACE) target_compile_options(GENERIC_G491KCUX INTERFACE - "SHELL:-DSTM32G491xx " + "SHELL:-DSTM32G491xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -73561,15 +73701,15 @@ target_compile_options(GENERIC_G491KCUX_serial_none INTERFACE ) add_library(GENERIC_G491KCUX_usb_CDC INTERFACE) target_compile_options(GENERIC_G491KCUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G491KCUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G491KCUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G491KCUX_usb_HID INTERFACE) target_compile_options(GENERIC_G491KCUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G491KCUX_usb_none INTERFACE) target_compile_options(GENERIC_G491KCUX_usb_none INTERFACE @@ -73598,7 +73738,7 @@ set(GENERIC_G491KEUX_MCU cortex-m4) set(GENERIC_G491KEUX_FPCONF "-") add_library(GENERIC_G491KEUX INTERFACE) target_compile_options(GENERIC_G491KEUX INTERFACE - "SHELL:-DSTM32G491xx " + "SHELL:-DSTM32G491xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -73643,15 +73783,15 @@ target_compile_options(GENERIC_G491KEUX_serial_none INTERFACE ) add_library(GENERIC_G491KEUX_usb_CDC INTERFACE) target_compile_options(GENERIC_G491KEUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G491KEUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G491KEUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G491KEUX_usb_HID INTERFACE) target_compile_options(GENERIC_G491KEUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G491KEUX_usb_none INTERFACE) target_compile_options(GENERIC_G491KEUX_usb_none INTERFACE @@ -73680,7 +73820,7 @@ set(GENERIC_G491MCSX_MCU cortex-m4) set(GENERIC_G491MCSX_FPCONF "-") add_library(GENERIC_G491MCSX INTERFACE) target_compile_options(GENERIC_G491MCSX INTERFACE - "SHELL:-DSTM32G491xx " + "SHELL:-DSTM32G491xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -73725,15 +73865,15 @@ target_compile_options(GENERIC_G491MCSX_serial_none INTERFACE ) add_library(GENERIC_G491MCSX_usb_CDC INTERFACE) target_compile_options(GENERIC_G491MCSX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G491MCSX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G491MCSX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G491MCSX_usb_HID INTERFACE) target_compile_options(GENERIC_G491MCSX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G491MCSX_usb_none INTERFACE) target_compile_options(GENERIC_G491MCSX_usb_none INTERFACE @@ -73762,7 +73902,7 @@ set(GENERIC_G491MCTX_MCU cortex-m4) set(GENERIC_G491MCTX_FPCONF "-") add_library(GENERIC_G491MCTX INTERFACE) target_compile_options(GENERIC_G491MCTX INTERFACE - "SHELL:-DSTM32G491xx " + "SHELL:-DSTM32G491xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -73807,15 +73947,15 @@ target_compile_options(GENERIC_G491MCTX_serial_none INTERFACE ) add_library(GENERIC_G491MCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G491MCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G491MCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G491MCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G491MCTX_usb_HID INTERFACE) target_compile_options(GENERIC_G491MCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G491MCTX_usb_none INTERFACE) target_compile_options(GENERIC_G491MCTX_usb_none INTERFACE @@ -73844,7 +73984,7 @@ set(GENERIC_G491MESX_MCU cortex-m4) set(GENERIC_G491MESX_FPCONF "-") add_library(GENERIC_G491MESX INTERFACE) target_compile_options(GENERIC_G491MESX INTERFACE - "SHELL:-DSTM32G491xx " + "SHELL:-DSTM32G491xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -73889,15 +74029,15 @@ target_compile_options(GENERIC_G491MESX_serial_none INTERFACE ) add_library(GENERIC_G491MESX_usb_CDC INTERFACE) target_compile_options(GENERIC_G491MESX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G491MESX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G491MESX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G491MESX_usb_HID INTERFACE) target_compile_options(GENERIC_G491MESX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G491MESX_usb_none INTERFACE) target_compile_options(GENERIC_G491MESX_usb_none INTERFACE @@ -73926,7 +74066,7 @@ set(GENERIC_G491METX_MCU cortex-m4) set(GENERIC_G491METX_FPCONF "-") add_library(GENERIC_G491METX INTERFACE) target_compile_options(GENERIC_G491METX INTERFACE - "SHELL:-DSTM32G491xx " + "SHELL:-DSTM32G491xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -73971,15 +74111,15 @@ target_compile_options(GENERIC_G491METX_serial_none INTERFACE ) add_library(GENERIC_G491METX_usb_CDC INTERFACE) target_compile_options(GENERIC_G491METX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G491METX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G491METX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G491METX_usb_HID INTERFACE) target_compile_options(GENERIC_G491METX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G491METX_usb_none INTERFACE) target_compile_options(GENERIC_G491METX_usb_none INTERFACE @@ -74008,7 +74148,7 @@ set(GENERIC_G491RCIX_MCU cortex-m4) set(GENERIC_G491RCIX_FPCONF "-") add_library(GENERIC_G491RCIX INTERFACE) target_compile_options(GENERIC_G491RCIX INTERFACE - "SHELL:-DSTM32G491xx " + "SHELL:-DSTM32G491xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -74053,15 +74193,15 @@ target_compile_options(GENERIC_G491RCIX_serial_none INTERFACE ) add_library(GENERIC_G491RCIX_usb_CDC INTERFACE) target_compile_options(GENERIC_G491RCIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G491RCIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G491RCIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G491RCIX_usb_HID INTERFACE) target_compile_options(GENERIC_G491RCIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G491RCIX_usb_none INTERFACE) target_compile_options(GENERIC_G491RCIX_usb_none INTERFACE @@ -74090,7 +74230,7 @@ set(GENERIC_G491RCTX_MCU cortex-m4) set(GENERIC_G491RCTX_FPCONF "-") add_library(GENERIC_G491RCTX INTERFACE) target_compile_options(GENERIC_G491RCTX INTERFACE - "SHELL:-DSTM32G491xx " + "SHELL:-DSTM32G491xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -74135,15 +74275,15 @@ target_compile_options(GENERIC_G491RCTX_serial_none INTERFACE ) add_library(GENERIC_G491RCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G491RCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G491RCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G491RCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G491RCTX_usb_HID INTERFACE) target_compile_options(GENERIC_G491RCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G491RCTX_usb_none INTERFACE) target_compile_options(GENERIC_G491RCTX_usb_none INTERFACE @@ -74172,7 +74312,7 @@ set(GENERIC_G491REIX_MCU cortex-m4) set(GENERIC_G491REIX_FPCONF "-") add_library(GENERIC_G491REIX INTERFACE) target_compile_options(GENERIC_G491REIX INTERFACE - "SHELL:-DSTM32G491xx " + "SHELL:-DSTM32G491xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -74217,15 +74357,15 @@ target_compile_options(GENERIC_G491REIX_serial_none INTERFACE ) add_library(GENERIC_G491REIX_usb_CDC INTERFACE) target_compile_options(GENERIC_G491REIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G491REIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G491REIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G491REIX_usb_HID INTERFACE) target_compile_options(GENERIC_G491REIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G491REIX_usb_none INTERFACE) target_compile_options(GENERIC_G491REIX_usb_none INTERFACE @@ -74254,7 +74394,7 @@ set(GENERIC_G491RETX_MCU cortex-m4) set(GENERIC_G491RETX_FPCONF "-") add_library(GENERIC_G491RETX INTERFACE) target_compile_options(GENERIC_G491RETX INTERFACE - "SHELL:-DSTM32G491xx " + "SHELL:-DSTM32G491xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -74299,15 +74439,15 @@ target_compile_options(GENERIC_G491RETX_serial_none INTERFACE ) add_library(GENERIC_G491RETX_usb_CDC INTERFACE) target_compile_options(GENERIC_G491RETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G491RETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G491RETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G491RETX_usb_HID INTERFACE) target_compile_options(GENERIC_G491RETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G491RETX_usb_none INTERFACE) target_compile_options(GENERIC_G491RETX_usb_none INTERFACE @@ -74336,7 +74476,7 @@ set(GENERIC_G491RETXZ_MCU cortex-m4) set(GENERIC_G491RETXZ_FPCONF "-") add_library(GENERIC_G491RETXZ INTERFACE) target_compile_options(GENERIC_G491RETXZ INTERFACE - "SHELL:-DSTM32G491xx " + "SHELL:-DSTM32G491xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -74381,15 +74521,15 @@ target_compile_options(GENERIC_G491RETXZ_serial_none INTERFACE ) add_library(GENERIC_G491RETXZ_usb_CDC INTERFACE) target_compile_options(GENERIC_G491RETXZ_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G491RETXZ_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G491RETXZ_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G491RETXZ_usb_HID INTERFACE) target_compile_options(GENERIC_G491RETXZ_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G491RETXZ_usb_none INTERFACE) target_compile_options(GENERIC_G491RETXZ_usb_none INTERFACE @@ -74418,7 +74558,7 @@ set(GENERIC_G491REYX_MCU cortex-m4) set(GENERIC_G491REYX_FPCONF "-") add_library(GENERIC_G491REYX INTERFACE) target_compile_options(GENERIC_G491REYX INTERFACE - "SHELL:-DSTM32G491xx " + "SHELL:-DSTM32G491xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -74463,15 +74603,15 @@ target_compile_options(GENERIC_G491REYX_serial_none INTERFACE ) add_library(GENERIC_G491REYX_usb_CDC INTERFACE) target_compile_options(GENERIC_G491REYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G491REYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G491REYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G491REYX_usb_HID INTERFACE) target_compile_options(GENERIC_G491REYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G491REYX_usb_none INTERFACE) target_compile_options(GENERIC_G491REYX_usb_none INTERFACE @@ -74500,7 +74640,7 @@ set(GENERIC_G491VCTX_MCU cortex-m4) set(GENERIC_G491VCTX_FPCONF "-") add_library(GENERIC_G491VCTX INTERFACE) target_compile_options(GENERIC_G491VCTX INTERFACE - "SHELL:-DSTM32G491xx " + "SHELL:-DSTM32G491xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -74545,15 +74685,15 @@ target_compile_options(GENERIC_G491VCTX_serial_none INTERFACE ) add_library(GENERIC_G491VCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_G491VCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G491VCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G491VCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G491VCTX_usb_HID INTERFACE) target_compile_options(GENERIC_G491VCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G491VCTX_usb_none INTERFACE) target_compile_options(GENERIC_G491VCTX_usb_none INTERFACE @@ -74582,7 +74722,7 @@ set(GENERIC_G491VETX_MCU cortex-m4) set(GENERIC_G491VETX_FPCONF "-") add_library(GENERIC_G491VETX INTERFACE) target_compile_options(GENERIC_G491VETX INTERFACE - "SHELL:-DSTM32G491xx " + "SHELL:-DSTM32G491xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -74627,15 +74767,15 @@ target_compile_options(GENERIC_G491VETX_serial_none INTERFACE ) add_library(GENERIC_G491VETX_usb_CDC INTERFACE) target_compile_options(GENERIC_G491VETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G491VETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G491VETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G491VETX_usb_HID INTERFACE) target_compile_options(GENERIC_G491VETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G491VETX_usb_none INTERFACE) target_compile_options(GENERIC_G491VETX_usb_none INTERFACE @@ -74664,7 +74804,7 @@ set(GENERIC_G4A1CETX_MCU cortex-m4) set(GENERIC_G4A1CETX_FPCONF "-") add_library(GENERIC_G4A1CETX INTERFACE) target_compile_options(GENERIC_G4A1CETX INTERFACE - "SHELL:-DSTM32G4A1xx " + "SHELL:-DSTM32G4A1xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -74709,15 +74849,15 @@ target_compile_options(GENERIC_G4A1CETX_serial_none INTERFACE ) add_library(GENERIC_G4A1CETX_usb_CDC INTERFACE) target_compile_options(GENERIC_G4A1CETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G4A1CETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G4A1CETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G4A1CETX_usb_HID INTERFACE) target_compile_options(GENERIC_G4A1CETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G4A1CETX_usb_none INTERFACE) target_compile_options(GENERIC_G4A1CETX_usb_none INTERFACE @@ -74746,7 +74886,7 @@ set(GENERIC_G4A1KEUX_MCU cortex-m4) set(GENERIC_G4A1KEUX_FPCONF "-") add_library(GENERIC_G4A1KEUX INTERFACE) target_compile_options(GENERIC_G4A1KEUX INTERFACE - "SHELL:-DSTM32G4A1xx " + "SHELL:-DSTM32G4A1xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -74791,15 +74931,15 @@ target_compile_options(GENERIC_G4A1KEUX_serial_none INTERFACE ) add_library(GENERIC_G4A1KEUX_usb_CDC INTERFACE) target_compile_options(GENERIC_G4A1KEUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G4A1KEUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G4A1KEUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G4A1KEUX_usb_HID INTERFACE) target_compile_options(GENERIC_G4A1KEUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G4A1KEUX_usb_none INTERFACE) target_compile_options(GENERIC_G4A1KEUX_usb_none INTERFACE @@ -74828,7 +74968,7 @@ set(GENERIC_G4A1MESX_MCU cortex-m4) set(GENERIC_G4A1MESX_FPCONF "-") add_library(GENERIC_G4A1MESX INTERFACE) target_compile_options(GENERIC_G4A1MESX INTERFACE - "SHELL:-DSTM32G4A1xx " + "SHELL:-DSTM32G4A1xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -74873,15 +75013,15 @@ target_compile_options(GENERIC_G4A1MESX_serial_none INTERFACE ) add_library(GENERIC_G4A1MESX_usb_CDC INTERFACE) target_compile_options(GENERIC_G4A1MESX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G4A1MESX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G4A1MESX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G4A1MESX_usb_HID INTERFACE) target_compile_options(GENERIC_G4A1MESX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G4A1MESX_usb_none INTERFACE) target_compile_options(GENERIC_G4A1MESX_usb_none INTERFACE @@ -74910,7 +75050,7 @@ set(GENERIC_G4A1METX_MCU cortex-m4) set(GENERIC_G4A1METX_FPCONF "-") add_library(GENERIC_G4A1METX INTERFACE) target_compile_options(GENERIC_G4A1METX INTERFACE - "SHELL:-DSTM32G4A1xx " + "SHELL:-DSTM32G4A1xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -74955,15 +75095,15 @@ target_compile_options(GENERIC_G4A1METX_serial_none INTERFACE ) add_library(GENERIC_G4A1METX_usb_CDC INTERFACE) target_compile_options(GENERIC_G4A1METX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G4A1METX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G4A1METX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G4A1METX_usb_HID INTERFACE) target_compile_options(GENERIC_G4A1METX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G4A1METX_usb_none INTERFACE) target_compile_options(GENERIC_G4A1METX_usb_none INTERFACE @@ -74992,7 +75132,7 @@ set(GENERIC_G4A1REIX_MCU cortex-m4) set(GENERIC_G4A1REIX_FPCONF "-") add_library(GENERIC_G4A1REIX INTERFACE) target_compile_options(GENERIC_G4A1REIX INTERFACE - "SHELL:-DSTM32G4A1xx " + "SHELL:-DSTM32G4A1xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -75037,15 +75177,15 @@ target_compile_options(GENERIC_G4A1REIX_serial_none INTERFACE ) add_library(GENERIC_G4A1REIX_usb_CDC INTERFACE) target_compile_options(GENERIC_G4A1REIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G4A1REIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G4A1REIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G4A1REIX_usb_HID INTERFACE) target_compile_options(GENERIC_G4A1REIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G4A1REIX_usb_none INTERFACE) target_compile_options(GENERIC_G4A1REIX_usb_none INTERFACE @@ -75074,7 +75214,7 @@ set(GENERIC_G4A1RETX_MCU cortex-m4) set(GENERIC_G4A1RETX_FPCONF "-") add_library(GENERIC_G4A1RETX INTERFACE) target_compile_options(GENERIC_G4A1RETX INTERFACE - "SHELL:-DSTM32G4A1xx " + "SHELL:-DSTM32G4A1xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -75119,15 +75259,15 @@ target_compile_options(GENERIC_G4A1RETX_serial_none INTERFACE ) add_library(GENERIC_G4A1RETX_usb_CDC INTERFACE) target_compile_options(GENERIC_G4A1RETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G4A1RETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G4A1RETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G4A1RETX_usb_HID INTERFACE) target_compile_options(GENERIC_G4A1RETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G4A1RETX_usb_none INTERFACE) target_compile_options(GENERIC_G4A1RETX_usb_none INTERFACE @@ -75156,7 +75296,7 @@ set(GENERIC_G4A1REYX_MCU cortex-m4) set(GENERIC_G4A1REYX_FPCONF "-") add_library(GENERIC_G4A1REYX INTERFACE) target_compile_options(GENERIC_G4A1REYX INTERFACE - "SHELL:-DSTM32G4A1xx " + "SHELL:-DSTM32G4A1xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -75201,15 +75341,15 @@ target_compile_options(GENERIC_G4A1REYX_serial_none INTERFACE ) add_library(GENERIC_G4A1REYX_usb_CDC INTERFACE) target_compile_options(GENERIC_G4A1REYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G4A1REYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G4A1REYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G4A1REYX_usb_HID INTERFACE) target_compile_options(GENERIC_G4A1REYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G4A1REYX_usb_none INTERFACE) target_compile_options(GENERIC_G4A1REYX_usb_none INTERFACE @@ -75238,7 +75378,7 @@ set(GENERIC_G4A1VETX_MCU cortex-m4) set(GENERIC_G4A1VETX_FPCONF "-") add_library(GENERIC_G4A1VETX INTERFACE) target_compile_options(GENERIC_G4A1VETX INTERFACE - "SHELL:-DSTM32G4A1xx " + "SHELL:-DSTM32G4A1xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -75283,15 +75423,15 @@ target_compile_options(GENERIC_G4A1VETX_serial_none INTERFACE ) add_library(GENERIC_G4A1VETX_usb_CDC INTERFACE) target_compile_options(GENERIC_G4A1VETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_G4A1VETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_G4A1VETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_G4A1VETX_usb_HID INTERFACE) target_compile_options(GENERIC_G4A1VETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_G4A1VETX_usb_none INTERFACE) target_compile_options(GENERIC_G4A1VETX_usb_none INTERFACE @@ -75320,7 +75460,7 @@ set(GENERIC_H503CBTX_MCU cortex-m33) set(GENERIC_H503CBTX_FPCONF "-") add_library(GENERIC_H503CBTX INTERFACE) target_compile_options(GENERIC_H503CBTX INTERFACE - "SHELL:-DSTM32H503xx " + "SHELL:-DSTM32H503xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -75365,15 +75505,15 @@ target_compile_options(GENERIC_H503CBTX_serial_none INTERFACE ) add_library(GENERIC_H503CBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_H503CBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H503CBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H503CBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H503CBTX_usb_HID INTERFACE) target_compile_options(GENERIC_H503CBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H503CBTX_usb_none INTERFACE) target_compile_options(GENERIC_H503CBTX_usb_none INTERFACE @@ -75402,7 +75542,7 @@ set(GENERIC_H503CBUX_MCU cortex-m33) set(GENERIC_H503CBUX_FPCONF "-") add_library(GENERIC_H503CBUX INTERFACE) target_compile_options(GENERIC_H503CBUX INTERFACE - "SHELL:-DSTM32H503xx " + "SHELL:-DSTM32H503xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -75447,15 +75587,15 @@ target_compile_options(GENERIC_H503CBUX_serial_none INTERFACE ) add_library(GENERIC_H503CBUX_usb_CDC INTERFACE) target_compile_options(GENERIC_H503CBUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H503CBUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H503CBUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H503CBUX_usb_HID INTERFACE) target_compile_options(GENERIC_H503CBUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H503CBUX_usb_none INTERFACE) target_compile_options(GENERIC_H503CBUX_usb_none INTERFACE @@ -75484,7 +75624,7 @@ set(GENERIC_H503KBUX_MCU cortex-m33) set(GENERIC_H503KBUX_FPCONF "-") add_library(GENERIC_H503KBUX INTERFACE) target_compile_options(GENERIC_H503KBUX INTERFACE - "SHELL:-DSTM32H503xx " + "SHELL:-DSTM32H503xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -75529,15 +75669,15 @@ target_compile_options(GENERIC_H503KBUX_serial_none INTERFACE ) add_library(GENERIC_H503KBUX_usb_CDC INTERFACE) target_compile_options(GENERIC_H503KBUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H503KBUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H503KBUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H503KBUX_usb_HID INTERFACE) target_compile_options(GENERIC_H503KBUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H503KBUX_usb_none INTERFACE) target_compile_options(GENERIC_H503KBUX_usb_none INTERFACE @@ -75566,7 +75706,7 @@ set(GENERIC_H503RBTX_MCU cortex-m33) set(GENERIC_H503RBTX_FPCONF "-") add_library(GENERIC_H503RBTX INTERFACE) target_compile_options(GENERIC_H503RBTX INTERFACE - "SHELL:-DSTM32H503xx " + "SHELL:-DSTM32H503xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -75611,15 +75751,15 @@ target_compile_options(GENERIC_H503RBTX_serial_none INTERFACE ) add_library(GENERIC_H503RBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_H503RBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H503RBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H503RBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H503RBTX_usb_HID INTERFACE) target_compile_options(GENERIC_H503RBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H503RBTX_usb_none INTERFACE) target_compile_options(GENERIC_H503RBTX_usb_none INTERFACE @@ -75648,7 +75788,7 @@ set(GENERIC_H562RGTX_MCU cortex-m33) set(GENERIC_H562RGTX_FPCONF "-") add_library(GENERIC_H562RGTX INTERFACE) target_compile_options(GENERIC_H562RGTX INTERFACE - "SHELL:-DSTM32H562xx " + "SHELL:-DSTM32H562xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -75693,15 +75833,15 @@ target_compile_options(GENERIC_H562RGTX_serial_none INTERFACE ) add_library(GENERIC_H562RGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_H562RGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H562RGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H562RGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H562RGTX_usb_HID INTERFACE) target_compile_options(GENERIC_H562RGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H562RGTX_usb_none INTERFACE) target_compile_options(GENERIC_H562RGTX_usb_none INTERFACE @@ -75730,7 +75870,7 @@ set(GENERIC_H562RITX_MCU cortex-m33) set(GENERIC_H562RITX_FPCONF "-") add_library(GENERIC_H562RITX INTERFACE) target_compile_options(GENERIC_H562RITX INTERFACE - "SHELL:-DSTM32H562xx " + "SHELL:-DSTM32H562xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -75775,15 +75915,15 @@ target_compile_options(GENERIC_H562RITX_serial_none INTERFACE ) add_library(GENERIC_H562RITX_usb_CDC INTERFACE) target_compile_options(GENERIC_H562RITX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H562RITX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H562RITX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H562RITX_usb_HID INTERFACE) target_compile_options(GENERIC_H562RITX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H562RITX_usb_none INTERFACE) target_compile_options(GENERIC_H562RITX_usb_none INTERFACE @@ -75812,7 +75952,7 @@ set(GENERIC_H563IIKXQ_MCU cortex-m33) set(GENERIC_H563IIKXQ_FPCONF "-") add_library(GENERIC_H563IIKXQ INTERFACE) target_compile_options(GENERIC_H563IIKXQ INTERFACE - "SHELL:-DSTM32H563xx " + "SHELL:-DSTM32H563xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -75857,15 +75997,15 @@ target_compile_options(GENERIC_H563IIKXQ_serial_none INTERFACE ) add_library(GENERIC_H563IIKXQ_usb_CDC INTERFACE) target_compile_options(GENERIC_H563IIKXQ_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H563IIKXQ_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H563IIKXQ_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H563IIKXQ_usb_HID INTERFACE) target_compile_options(GENERIC_H563IIKXQ_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H563IIKXQ_usb_none INTERFACE) target_compile_options(GENERIC_H563IIKXQ_usb_none INTERFACE @@ -75894,7 +76034,7 @@ set(GENERIC_H563RGTX_MCU cortex-m33) set(GENERIC_H563RGTX_FPCONF "-") add_library(GENERIC_H563RGTX INTERFACE) target_compile_options(GENERIC_H563RGTX INTERFACE - "SHELL:-DSTM32H563xx " + "SHELL:-DSTM32H563xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -75939,15 +76079,15 @@ target_compile_options(GENERIC_H563RGTX_serial_none INTERFACE ) add_library(GENERIC_H563RGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_H563RGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H563RGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H563RGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H563RGTX_usb_HID INTERFACE) target_compile_options(GENERIC_H563RGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H563RGTX_usb_none INTERFACE) target_compile_options(GENERIC_H563RGTX_usb_none INTERFACE @@ -75976,7 +76116,7 @@ set(GENERIC_H563RITX_MCU cortex-m33) set(GENERIC_H563RITX_FPCONF "-") add_library(GENERIC_H563RITX INTERFACE) target_compile_options(GENERIC_H563RITX INTERFACE - "SHELL:-DSTM32H563xx " + "SHELL:-DSTM32H563xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -76021,15 +76161,15 @@ target_compile_options(GENERIC_H563RITX_serial_none INTERFACE ) add_library(GENERIC_H563RITX_usb_CDC INTERFACE) target_compile_options(GENERIC_H563RITX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H563RITX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H563RITX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H563RITX_usb_HID INTERFACE) target_compile_options(GENERIC_H563RITX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H563RITX_usb_none INTERFACE) target_compile_options(GENERIC_H563RITX_usb_none INTERFACE @@ -76058,7 +76198,7 @@ set(GENERIC_H563ZGTX_MCU cortex-m33) set(GENERIC_H563ZGTX_FPCONF "-") add_library(GENERIC_H563ZGTX INTERFACE) target_compile_options(GENERIC_H563ZGTX INTERFACE - "SHELL:-DSTM32H563xx " + "SHELL:-DSTM32H563xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -76103,15 +76243,15 @@ target_compile_options(GENERIC_H563ZGTX_serial_none INTERFACE ) add_library(GENERIC_H563ZGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_H563ZGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H563ZGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H563ZGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H563ZGTX_usb_HID INTERFACE) target_compile_options(GENERIC_H563ZGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H563ZGTX_usb_none INTERFACE) target_compile_options(GENERIC_H563ZGTX_usb_none INTERFACE @@ -76140,7 +76280,7 @@ set(GENERIC_H563ZITX_MCU cortex-m33) set(GENERIC_H563ZITX_FPCONF "-") add_library(GENERIC_H563ZITX INTERFACE) target_compile_options(GENERIC_H563ZITX INTERFACE - "SHELL:-DSTM32H563xx " + "SHELL:-DSTM32H563xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -76185,15 +76325,15 @@ target_compile_options(GENERIC_H563ZITX_serial_none INTERFACE ) add_library(GENERIC_H563ZITX_usb_CDC INTERFACE) target_compile_options(GENERIC_H563ZITX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H563ZITX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H563ZITX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H563ZITX_usb_HID INTERFACE) target_compile_options(GENERIC_H563ZITX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H563ZITX_usb_none INTERFACE) target_compile_options(GENERIC_H563ZITX_usb_none INTERFACE @@ -76222,7 +76362,7 @@ set(GENERIC_H573IIKXQ_MCU cortex-m33) set(GENERIC_H573IIKXQ_FPCONF "-") add_library(GENERIC_H573IIKXQ INTERFACE) target_compile_options(GENERIC_H573IIKXQ INTERFACE - "SHELL:-DSTM32H573xx " + "SHELL:-DSTM32H573xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -76267,15 +76407,15 @@ target_compile_options(GENERIC_H573IIKXQ_serial_none INTERFACE ) add_library(GENERIC_H573IIKXQ_usb_CDC INTERFACE) target_compile_options(GENERIC_H573IIKXQ_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H573IIKXQ_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H573IIKXQ_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H573IIKXQ_usb_HID INTERFACE) target_compile_options(GENERIC_H573IIKXQ_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H573IIKXQ_usb_none INTERFACE) target_compile_options(GENERIC_H573IIKXQ_usb_none INTERFACE @@ -76304,7 +76444,7 @@ set(GENERIC_H573RITX_MCU cortex-m33) set(GENERIC_H573RITX_FPCONF "-") add_library(GENERIC_H573RITX INTERFACE) target_compile_options(GENERIC_H573RITX INTERFACE - "SHELL:-DSTM32H573xx " + "SHELL:-DSTM32H573xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -76349,15 +76489,15 @@ target_compile_options(GENERIC_H573RITX_serial_none INTERFACE ) add_library(GENERIC_H573RITX_usb_CDC INTERFACE) target_compile_options(GENERIC_H573RITX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H573RITX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H573RITX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H573RITX_usb_HID INTERFACE) target_compile_options(GENERIC_H573RITX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H573RITX_usb_none INTERFACE) target_compile_options(GENERIC_H573RITX_usb_none INTERFACE @@ -76386,7 +76526,7 @@ set(GENERIC_H573ZITX_MCU cortex-m33) set(GENERIC_H573ZITX_FPCONF "-") add_library(GENERIC_H573ZITX INTERFACE) target_compile_options(GENERIC_H573ZITX INTERFACE - "SHELL:-DSTM32H573xx " + "SHELL:-DSTM32H573xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -76431,15 +76571,15 @@ target_compile_options(GENERIC_H573ZITX_serial_none INTERFACE ) add_library(GENERIC_H573ZITX_usb_CDC INTERFACE) target_compile_options(GENERIC_H573ZITX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H573ZITX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H573ZITX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H573ZITX_usb_HID INTERFACE) target_compile_options(GENERIC_H573ZITX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H573ZITX_usb_none INTERFACE) target_compile_options(GENERIC_H573ZITX_usb_none INTERFACE @@ -76468,7 +76608,7 @@ set(GENERIC_H723ZETX_MCU cortex-m7) set(GENERIC_H723ZETX_FPCONF "-") add_library(GENERIC_H723ZETX INTERFACE) target_compile_options(GENERIC_H723ZETX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H723xx " + "SHELL:-DCORE_CM7 -DSTM32H723xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -76513,15 +76653,15 @@ target_compile_options(GENERIC_H723ZETX_serial_none INTERFACE ) add_library(GENERIC_H723ZETX_usb_CDC INTERFACE) target_compile_options(GENERIC_H723ZETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H723ZETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H723ZETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H723ZETX_usb_HID INTERFACE) target_compile_options(GENERIC_H723ZETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H723ZETX_usb_none INTERFACE) target_compile_options(GENERIC_H723ZETX_usb_none INTERFACE @@ -76550,7 +76690,7 @@ set(GENERIC_H723ZGTX_MCU cortex-m7) set(GENERIC_H723ZGTX_FPCONF "-") add_library(GENERIC_H723ZGTX INTERFACE) target_compile_options(GENERIC_H723ZGTX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H723xx " + "SHELL:-DCORE_CM7 -DSTM32H723xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -76595,15 +76735,15 @@ target_compile_options(GENERIC_H723ZGTX_serial_none INTERFACE ) add_library(GENERIC_H723ZGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_H723ZGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H723ZGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H723ZGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H723ZGTX_usb_HID INTERFACE) target_compile_options(GENERIC_H723ZGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H723ZGTX_usb_none INTERFACE) target_compile_options(GENERIC_H723ZGTX_usb_none INTERFACE @@ -76632,7 +76772,7 @@ set(GENERIC_H730ZBTX_MCU cortex-m7) set(GENERIC_H730ZBTX_FPCONF "-") add_library(GENERIC_H730ZBTX INTERFACE) target_compile_options(GENERIC_H730ZBTX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H730xx " + "SHELL:-DCORE_CM7 -DSTM32H730xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -76677,15 +76817,15 @@ target_compile_options(GENERIC_H730ZBTX_serial_none INTERFACE ) add_library(GENERIC_H730ZBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_H730ZBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H730ZBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H730ZBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H730ZBTX_usb_HID INTERFACE) target_compile_options(GENERIC_H730ZBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H730ZBTX_usb_none INTERFACE) target_compile_options(GENERIC_H730ZBTX_usb_none INTERFACE @@ -76714,7 +76854,7 @@ set(GENERIC_H733ZGTX_MCU cortex-m7) set(GENERIC_H733ZGTX_FPCONF "-") add_library(GENERIC_H733ZGTX INTERFACE) target_compile_options(GENERIC_H733ZGTX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H733xx " + "SHELL:-DCORE_CM7 -DSTM32H733xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -76759,15 +76899,15 @@ target_compile_options(GENERIC_H733ZGTX_serial_none INTERFACE ) add_library(GENERIC_H733ZGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_H733ZGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H733ZGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H733ZGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H733ZGTX_usb_HID INTERFACE) target_compile_options(GENERIC_H733ZGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H733ZGTX_usb_none INTERFACE) target_compile_options(GENERIC_H733ZGTX_usb_none INTERFACE @@ -76796,7 +76936,7 @@ set(GENERIC_H742IGKX_MCU cortex-m7) set(GENERIC_H742IGKX_FPCONF "-") add_library(GENERIC_H742IGKX INTERFACE) target_compile_options(GENERIC_H742IGKX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H742xx " + "SHELL:-DCORE_CM7 -DSTM32H742xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -76841,15 +76981,15 @@ target_compile_options(GENERIC_H742IGKX_serial_none INTERFACE ) add_library(GENERIC_H742IGKX_usb_CDC INTERFACE) target_compile_options(GENERIC_H742IGKX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H742IGKX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H742IGKX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H742IGKX_usb_HID INTERFACE) target_compile_options(GENERIC_H742IGKX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H742IGKX_usb_none INTERFACE) target_compile_options(GENERIC_H742IGKX_usb_none INTERFACE @@ -76878,7 +77018,7 @@ set(GENERIC_H742IGTX_MCU cortex-m7) set(GENERIC_H742IGTX_FPCONF "-") add_library(GENERIC_H742IGTX INTERFACE) target_compile_options(GENERIC_H742IGTX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H742xx " + "SHELL:-DCORE_CM7 -DSTM32H742xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -76923,15 +77063,15 @@ target_compile_options(GENERIC_H742IGTX_serial_none INTERFACE ) add_library(GENERIC_H742IGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_H742IGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H742IGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H742IGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H742IGTX_usb_HID INTERFACE) target_compile_options(GENERIC_H742IGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H742IGTX_usb_none INTERFACE) target_compile_options(GENERIC_H742IGTX_usb_none INTERFACE @@ -76960,7 +77100,7 @@ set(GENERIC_H742IIKX_MCU cortex-m7) set(GENERIC_H742IIKX_FPCONF "-") add_library(GENERIC_H742IIKX INTERFACE) target_compile_options(GENERIC_H742IIKX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H742xx " + "SHELL:-DCORE_CM7 -DSTM32H742xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -77005,15 +77145,15 @@ target_compile_options(GENERIC_H742IIKX_serial_none INTERFACE ) add_library(GENERIC_H742IIKX_usb_CDC INTERFACE) target_compile_options(GENERIC_H742IIKX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H742IIKX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H742IIKX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H742IIKX_usb_HID INTERFACE) target_compile_options(GENERIC_H742IIKX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H742IIKX_usb_none INTERFACE) target_compile_options(GENERIC_H742IIKX_usb_none INTERFACE @@ -77042,7 +77182,7 @@ set(GENERIC_H742IITX_MCU cortex-m7) set(GENERIC_H742IITX_FPCONF "-") add_library(GENERIC_H742IITX INTERFACE) target_compile_options(GENERIC_H742IITX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H742xx " + "SHELL:-DCORE_CM7 -DSTM32H742xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -77087,15 +77227,15 @@ target_compile_options(GENERIC_H742IITX_serial_none INTERFACE ) add_library(GENERIC_H742IITX_usb_CDC INTERFACE) target_compile_options(GENERIC_H742IITX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H742IITX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H742IITX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H742IITX_usb_HID INTERFACE) target_compile_options(GENERIC_H742IITX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H742IITX_usb_none INTERFACE) target_compile_options(GENERIC_H742IITX_usb_none INTERFACE @@ -77124,7 +77264,7 @@ set(GENERIC_H742VGHX_MCU cortex-m7) set(GENERIC_H742VGHX_FPCONF "-") add_library(GENERIC_H742VGHX INTERFACE) target_compile_options(GENERIC_H742VGHX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H742xx " + "SHELL:-DCORE_CM7 -DSTM32H742xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -77169,15 +77309,15 @@ target_compile_options(GENERIC_H742VGHX_serial_none INTERFACE ) add_library(GENERIC_H742VGHX_usb_CDC INTERFACE) target_compile_options(GENERIC_H742VGHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H742VGHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H742VGHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H742VGHX_usb_HID INTERFACE) target_compile_options(GENERIC_H742VGHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H742VGHX_usb_none INTERFACE) target_compile_options(GENERIC_H742VGHX_usb_none INTERFACE @@ -77206,7 +77346,7 @@ set(GENERIC_H742VGTX_MCU cortex-m7) set(GENERIC_H742VGTX_FPCONF "-") add_library(GENERIC_H742VGTX INTERFACE) target_compile_options(GENERIC_H742VGTX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H742xx " + "SHELL:-DCORE_CM7 -DSTM32H742xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -77251,15 +77391,15 @@ target_compile_options(GENERIC_H742VGTX_serial_none INTERFACE ) add_library(GENERIC_H742VGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_H742VGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H742VGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H742VGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H742VGTX_usb_HID INTERFACE) target_compile_options(GENERIC_H742VGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H742VGTX_usb_none INTERFACE) target_compile_options(GENERIC_H742VGTX_usb_none INTERFACE @@ -77288,7 +77428,7 @@ set(GENERIC_H742VIHX_MCU cortex-m7) set(GENERIC_H742VIHX_FPCONF "-") add_library(GENERIC_H742VIHX INTERFACE) target_compile_options(GENERIC_H742VIHX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H742xx " + "SHELL:-DCORE_CM7 -DSTM32H742xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -77333,15 +77473,15 @@ target_compile_options(GENERIC_H742VIHX_serial_none INTERFACE ) add_library(GENERIC_H742VIHX_usb_CDC INTERFACE) target_compile_options(GENERIC_H742VIHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H742VIHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H742VIHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H742VIHX_usb_HID INTERFACE) target_compile_options(GENERIC_H742VIHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H742VIHX_usb_none INTERFACE) target_compile_options(GENERIC_H742VIHX_usb_none INTERFACE @@ -77370,7 +77510,7 @@ set(GENERIC_H742VITX_MCU cortex-m7) set(GENERIC_H742VITX_FPCONF "-") add_library(GENERIC_H742VITX INTERFACE) target_compile_options(GENERIC_H742VITX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H742xx " + "SHELL:-DCORE_CM7 -DSTM32H742xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -77415,15 +77555,15 @@ target_compile_options(GENERIC_H742VITX_serial_none INTERFACE ) add_library(GENERIC_H742VITX_usb_CDC INTERFACE) target_compile_options(GENERIC_H742VITX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H742VITX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H742VITX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H742VITX_usb_HID INTERFACE) target_compile_options(GENERIC_H742VITX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H742VITX_usb_none INTERFACE) target_compile_options(GENERIC_H742VITX_usb_none INTERFACE @@ -77452,7 +77592,7 @@ set(GENERIC_H742XGHX_MCU cortex-m7) set(GENERIC_H742XGHX_FPCONF "-") add_library(GENERIC_H742XGHX INTERFACE) target_compile_options(GENERIC_H742XGHX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H742xx " + "SHELL:-DCORE_CM7 -DSTM32H742xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -77497,15 +77637,15 @@ target_compile_options(GENERIC_H742XGHX_serial_none INTERFACE ) add_library(GENERIC_H742XGHX_usb_CDC INTERFACE) target_compile_options(GENERIC_H742XGHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H742XGHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H742XGHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H742XGHX_usb_HID INTERFACE) target_compile_options(GENERIC_H742XGHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H742XGHX_usb_none INTERFACE) target_compile_options(GENERIC_H742XGHX_usb_none INTERFACE @@ -77534,7 +77674,7 @@ set(GENERIC_H742XIHX_MCU cortex-m7) set(GENERIC_H742XIHX_FPCONF "-") add_library(GENERIC_H742XIHX INTERFACE) target_compile_options(GENERIC_H742XIHX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H742xx " + "SHELL:-DCORE_CM7 -DSTM32H742xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -77579,15 +77719,15 @@ target_compile_options(GENERIC_H742XIHX_serial_none INTERFACE ) add_library(GENERIC_H742XIHX_usb_CDC INTERFACE) target_compile_options(GENERIC_H742XIHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H742XIHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H742XIHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H742XIHX_usb_HID INTERFACE) target_compile_options(GENERIC_H742XIHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H742XIHX_usb_none INTERFACE) target_compile_options(GENERIC_H742XIHX_usb_none INTERFACE @@ -77616,7 +77756,7 @@ set(GENERIC_H742ZGTX_MCU cortex-m7) set(GENERIC_H742ZGTX_FPCONF "-") add_library(GENERIC_H742ZGTX INTERFACE) target_compile_options(GENERIC_H742ZGTX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H742xx " + "SHELL:-DCORE_CM7 -DSTM32H742xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -77661,15 +77801,15 @@ target_compile_options(GENERIC_H742ZGTX_serial_none INTERFACE ) add_library(GENERIC_H742ZGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_H742ZGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H742ZGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H742ZGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H742ZGTX_usb_HID INTERFACE) target_compile_options(GENERIC_H742ZGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H742ZGTX_usb_none INTERFACE) target_compile_options(GENERIC_H742ZGTX_usb_none INTERFACE @@ -77698,7 +77838,7 @@ set(GENERIC_H742ZITX_MCU cortex-m7) set(GENERIC_H742ZITX_FPCONF "-") add_library(GENERIC_H742ZITX INTERFACE) target_compile_options(GENERIC_H742ZITX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H742xx " + "SHELL:-DCORE_CM7 -DSTM32H742xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -77743,15 +77883,15 @@ target_compile_options(GENERIC_H742ZITX_serial_none INTERFACE ) add_library(GENERIC_H742ZITX_usb_CDC INTERFACE) target_compile_options(GENERIC_H742ZITX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H742ZITX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H742ZITX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H742ZITX_usb_HID INTERFACE) target_compile_options(GENERIC_H742ZITX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H742ZITX_usb_none INTERFACE) target_compile_options(GENERIC_H742ZITX_usb_none INTERFACE @@ -77780,7 +77920,7 @@ set(GENERIC_H743IGKX_MCU cortex-m7) set(GENERIC_H743IGKX_FPCONF "-") add_library(GENERIC_H743IGKX INTERFACE) target_compile_options(GENERIC_H743IGKX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H743xx " + "SHELL:-DCORE_CM7 -DSTM32H743xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -77825,15 +77965,15 @@ target_compile_options(GENERIC_H743IGKX_serial_none INTERFACE ) add_library(GENERIC_H743IGKX_usb_CDC INTERFACE) target_compile_options(GENERIC_H743IGKX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H743IGKX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H743IGKX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H743IGKX_usb_HID INTERFACE) target_compile_options(GENERIC_H743IGKX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H743IGKX_usb_none INTERFACE) target_compile_options(GENERIC_H743IGKX_usb_none INTERFACE @@ -77862,7 +78002,7 @@ set(GENERIC_H743IGTX_MCU cortex-m7) set(GENERIC_H743IGTX_FPCONF "-") add_library(GENERIC_H743IGTX INTERFACE) target_compile_options(GENERIC_H743IGTX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H743xx " + "SHELL:-DCORE_CM7 -DSTM32H743xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -77907,15 +78047,15 @@ target_compile_options(GENERIC_H743IGTX_serial_none INTERFACE ) add_library(GENERIC_H743IGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_H743IGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H743IGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H743IGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H743IGTX_usb_HID INTERFACE) target_compile_options(GENERIC_H743IGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H743IGTX_usb_none INTERFACE) target_compile_options(GENERIC_H743IGTX_usb_none INTERFACE @@ -77944,7 +78084,7 @@ set(GENERIC_H743IIKX_MCU cortex-m7) set(GENERIC_H743IIKX_FPCONF "-") add_library(GENERIC_H743IIKX INTERFACE) target_compile_options(GENERIC_H743IIKX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H743xx " + "SHELL:-DCORE_CM7 -DSTM32H743xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -77989,15 +78129,15 @@ target_compile_options(GENERIC_H743IIKX_serial_none INTERFACE ) add_library(GENERIC_H743IIKX_usb_CDC INTERFACE) target_compile_options(GENERIC_H743IIKX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H743IIKX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H743IIKX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H743IIKX_usb_HID INTERFACE) target_compile_options(GENERIC_H743IIKX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H743IIKX_usb_none INTERFACE) target_compile_options(GENERIC_H743IIKX_usb_none INTERFACE @@ -78026,7 +78166,7 @@ set(GENERIC_H743IITX_MCU cortex-m7) set(GENERIC_H743IITX_FPCONF "-") add_library(GENERIC_H743IITX INTERFACE) target_compile_options(GENERIC_H743IITX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H743xx " + "SHELL:-DCORE_CM7 -DSTM32H743xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -78071,15 +78211,15 @@ target_compile_options(GENERIC_H743IITX_serial_none INTERFACE ) add_library(GENERIC_H743IITX_usb_CDC INTERFACE) target_compile_options(GENERIC_H743IITX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H743IITX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H743IITX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H743IITX_usb_HID INTERFACE) target_compile_options(GENERIC_H743IITX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H743IITX_usb_none INTERFACE) target_compile_options(GENERIC_H743IITX_usb_none INTERFACE @@ -78108,7 +78248,7 @@ set(GENERIC_H743VGHX_MCU cortex-m7) set(GENERIC_H743VGHX_FPCONF "-") add_library(GENERIC_H743VGHX INTERFACE) target_compile_options(GENERIC_H743VGHX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H743xx " + "SHELL:-DCORE_CM7 -DSTM32H743xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -78153,15 +78293,15 @@ target_compile_options(GENERIC_H743VGHX_serial_none INTERFACE ) add_library(GENERIC_H743VGHX_usb_CDC INTERFACE) target_compile_options(GENERIC_H743VGHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H743VGHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H743VGHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H743VGHX_usb_HID INTERFACE) target_compile_options(GENERIC_H743VGHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H743VGHX_usb_none INTERFACE) target_compile_options(GENERIC_H743VGHX_usb_none INTERFACE @@ -78190,7 +78330,7 @@ set(GENERIC_H743VGTX_MCU cortex-m7) set(GENERIC_H743VGTX_FPCONF "-") add_library(GENERIC_H743VGTX INTERFACE) target_compile_options(GENERIC_H743VGTX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H743xx " + "SHELL:-DCORE_CM7 -DSTM32H743xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -78235,15 +78375,15 @@ target_compile_options(GENERIC_H743VGTX_serial_none INTERFACE ) add_library(GENERIC_H743VGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_H743VGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H743VGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H743VGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H743VGTX_usb_HID INTERFACE) target_compile_options(GENERIC_H743VGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H743VGTX_usb_none INTERFACE) target_compile_options(GENERIC_H743VGTX_usb_none INTERFACE @@ -78272,7 +78412,7 @@ set(GENERIC_H743VIHX_MCU cortex-m7) set(GENERIC_H743VIHX_FPCONF "-") add_library(GENERIC_H743VIHX INTERFACE) target_compile_options(GENERIC_H743VIHX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H743xx " + "SHELL:-DCORE_CM7 -DSTM32H743xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -78317,15 +78457,15 @@ target_compile_options(GENERIC_H743VIHX_serial_none INTERFACE ) add_library(GENERIC_H743VIHX_usb_CDC INTERFACE) target_compile_options(GENERIC_H743VIHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H743VIHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H743VIHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H743VIHX_usb_HID INTERFACE) target_compile_options(GENERIC_H743VIHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H743VIHX_usb_none INTERFACE) target_compile_options(GENERIC_H743VIHX_usb_none INTERFACE @@ -78354,7 +78494,7 @@ set(GENERIC_H743VITX_MCU cortex-m7) set(GENERIC_H743VITX_FPCONF "-") add_library(GENERIC_H743VITX INTERFACE) target_compile_options(GENERIC_H743VITX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H743xx " + "SHELL:-DCORE_CM7 -DSTM32H743xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -78399,15 +78539,15 @@ target_compile_options(GENERIC_H743VITX_serial_none INTERFACE ) add_library(GENERIC_H743VITX_usb_CDC INTERFACE) target_compile_options(GENERIC_H743VITX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H743VITX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H743VITX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H743VITX_usb_HID INTERFACE) target_compile_options(GENERIC_H743VITX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H743VITX_usb_none INTERFACE) target_compile_options(GENERIC_H743VITX_usb_none INTERFACE @@ -78436,7 +78576,7 @@ set(GENERIC_H743XGHX_MCU cortex-m7) set(GENERIC_H743XGHX_FPCONF "-") add_library(GENERIC_H743XGHX INTERFACE) target_compile_options(GENERIC_H743XGHX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H743xx " + "SHELL:-DCORE_CM7 -DSTM32H743xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -78481,15 +78621,15 @@ target_compile_options(GENERIC_H743XGHX_serial_none INTERFACE ) add_library(GENERIC_H743XGHX_usb_CDC INTERFACE) target_compile_options(GENERIC_H743XGHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H743XGHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H743XGHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H743XGHX_usb_HID INTERFACE) target_compile_options(GENERIC_H743XGHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H743XGHX_usb_none INTERFACE) target_compile_options(GENERIC_H743XGHX_usb_none INTERFACE @@ -78518,7 +78658,7 @@ set(GENERIC_H743XIHX_MCU cortex-m7) set(GENERIC_H743XIHX_FPCONF "-") add_library(GENERIC_H743XIHX INTERFACE) target_compile_options(GENERIC_H743XIHX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H743xx " + "SHELL:-DCORE_CM7 -DSTM32H743xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -78563,15 +78703,15 @@ target_compile_options(GENERIC_H743XIHX_serial_none INTERFACE ) add_library(GENERIC_H743XIHX_usb_CDC INTERFACE) target_compile_options(GENERIC_H743XIHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H743XIHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H743XIHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H743XIHX_usb_HID INTERFACE) target_compile_options(GENERIC_H743XIHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H743XIHX_usb_none INTERFACE) target_compile_options(GENERIC_H743XIHX_usb_none INTERFACE @@ -78600,7 +78740,7 @@ set(GENERIC_H743ZGTX_MCU cortex-m7) set(GENERIC_H743ZGTX_FPCONF "-") add_library(GENERIC_H743ZGTX INTERFACE) target_compile_options(GENERIC_H743ZGTX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H743xx " + "SHELL:-DCORE_CM7 -DSTM32H743xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -78645,15 +78785,15 @@ target_compile_options(GENERIC_H743ZGTX_serial_none INTERFACE ) add_library(GENERIC_H743ZGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_H743ZGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H743ZGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H743ZGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H743ZGTX_usb_HID INTERFACE) target_compile_options(GENERIC_H743ZGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H743ZGTX_usb_none INTERFACE) target_compile_options(GENERIC_H743ZGTX_usb_none INTERFACE @@ -78682,7 +78822,7 @@ set(GENERIC_H743ZITX_MCU cortex-m7) set(GENERIC_H743ZITX_FPCONF "-") add_library(GENERIC_H743ZITX INTERFACE) target_compile_options(GENERIC_H743ZITX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H743xx " + "SHELL:-DCORE_CM7 -DSTM32H743xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -78727,15 +78867,15 @@ target_compile_options(GENERIC_H743ZITX_serial_none INTERFACE ) add_library(GENERIC_H743ZITX_usb_CDC INTERFACE) target_compile_options(GENERIC_H743ZITX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H743ZITX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H743ZITX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H743ZITX_usb_HID INTERFACE) target_compile_options(GENERIC_H743ZITX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H743ZITX_usb_none INTERFACE) target_compile_options(GENERIC_H743ZITX_usb_none INTERFACE @@ -78764,7 +78904,7 @@ set(GENERIC_H745XGHX_MCU cortex-m7) set(GENERIC_H745XGHX_FPCONF "-") add_library(GENERIC_H745XGHX INTERFACE) target_compile_options(GENERIC_H745XGHX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H745xG " + "SHELL:-DCORE_CM7 -DSTM32H745xG" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -78809,15 +78949,15 @@ target_compile_options(GENERIC_H745XGHX_serial_none INTERFACE ) add_library(GENERIC_H745XGHX_usb_CDC INTERFACE) target_compile_options(GENERIC_H745XGHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H745XGHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H745XGHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H745XGHX_usb_HID INTERFACE) target_compile_options(GENERIC_H745XGHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H745XGHX_usb_none INTERFACE) target_compile_options(GENERIC_H745XGHX_usb_none INTERFACE @@ -78846,7 +78986,7 @@ set(GENERIC_H745XIHX_MCU cortex-m7) set(GENERIC_H745XIHX_FPCONF "-") add_library(GENERIC_H745XIHX INTERFACE) target_compile_options(GENERIC_H745XIHX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H745xx " + "SHELL:-DCORE_CM7 -DSTM32H745xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -78891,15 +79031,15 @@ target_compile_options(GENERIC_H745XIHX_serial_none INTERFACE ) add_library(GENERIC_H745XIHX_usb_CDC INTERFACE) target_compile_options(GENERIC_H745XIHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H745XIHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H745XIHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H745XIHX_usb_HID INTERFACE) target_compile_options(GENERIC_H745XIHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H745XIHX_usb_none INTERFACE) target_compile_options(GENERIC_H745XIHX_usb_none INTERFACE @@ -78928,7 +79068,7 @@ set(GENERIC_H747AGIX_MCU cortex-m7) set(GENERIC_H747AGIX_FPCONF "-") add_library(GENERIC_H747AGIX INTERFACE) target_compile_options(GENERIC_H747AGIX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H747xx " + "SHELL:-DCORE_CM7 -DSTM32H747xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -78973,15 +79113,15 @@ target_compile_options(GENERIC_H747AGIX_serial_none INTERFACE ) add_library(GENERIC_H747AGIX_usb_CDC INTERFACE) target_compile_options(GENERIC_H747AGIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H747AGIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H747AGIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H747AGIX_usb_HID INTERFACE) target_compile_options(GENERIC_H747AGIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H747AGIX_usb_none INTERFACE) target_compile_options(GENERIC_H747AGIX_usb_none INTERFACE @@ -79010,7 +79150,7 @@ set(GENERIC_H747AIIX_MCU cortex-m7) set(GENERIC_H747AIIX_FPCONF "-") add_library(GENERIC_H747AIIX INTERFACE) target_compile_options(GENERIC_H747AIIX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H747xx " + "SHELL:-DCORE_CM7 -DSTM32H747xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -79055,15 +79195,15 @@ target_compile_options(GENERIC_H747AIIX_serial_none INTERFACE ) add_library(GENERIC_H747AIIX_usb_CDC INTERFACE) target_compile_options(GENERIC_H747AIIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H747AIIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H747AIIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H747AIIX_usb_HID INTERFACE) target_compile_options(GENERIC_H747AIIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H747AIIX_usb_none INTERFACE) target_compile_options(GENERIC_H747AIIX_usb_none INTERFACE @@ -79092,7 +79232,7 @@ set(GENERIC_H747IGTX_MCU cortex-m7) set(GENERIC_H747IGTX_FPCONF "-") add_library(GENERIC_H747IGTX INTERFACE) target_compile_options(GENERIC_H747IGTX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H747xx " + "SHELL:-DCORE_CM7 -DSTM32H747xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -79137,15 +79277,15 @@ target_compile_options(GENERIC_H747IGTX_serial_none INTERFACE ) add_library(GENERIC_H747IGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_H747IGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H747IGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H747IGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H747IGTX_usb_HID INTERFACE) target_compile_options(GENERIC_H747IGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H747IGTX_usb_none INTERFACE) target_compile_options(GENERIC_H747IGTX_usb_none INTERFACE @@ -79174,7 +79314,7 @@ set(GENERIC_H747IITX_MCU cortex-m7) set(GENERIC_H747IITX_FPCONF "-") add_library(GENERIC_H747IITX INTERFACE) target_compile_options(GENERIC_H747IITX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H747xx " + "SHELL:-DCORE_CM7 -DSTM32H747xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -79219,15 +79359,15 @@ target_compile_options(GENERIC_H747IITX_serial_none INTERFACE ) add_library(GENERIC_H747IITX_usb_CDC INTERFACE) target_compile_options(GENERIC_H747IITX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H747IITX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H747IITX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H747IITX_usb_HID INTERFACE) target_compile_options(GENERIC_H747IITX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H747IITX_usb_none INTERFACE) target_compile_options(GENERIC_H747IITX_usb_none INTERFACE @@ -79256,7 +79396,7 @@ set(GENERIC_H747XGHX_MCU cortex-m7) set(GENERIC_H747XGHX_FPCONF "-") add_library(GENERIC_H747XGHX INTERFACE) target_compile_options(GENERIC_H747XGHX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H747xG " + "SHELL:-DCORE_CM7 -DSTM32H747xG" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -79301,15 +79441,15 @@ target_compile_options(GENERIC_H747XGHX_serial_none INTERFACE ) add_library(GENERIC_H747XGHX_usb_CDC INTERFACE) target_compile_options(GENERIC_H747XGHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H747XGHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H747XGHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H747XGHX_usb_HID INTERFACE) target_compile_options(GENERIC_H747XGHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H747XGHX_usb_none INTERFACE) target_compile_options(GENERIC_H747XGHX_usb_none INTERFACE @@ -79338,7 +79478,7 @@ set(GENERIC_H747XIHX_MCU cortex-m7) set(GENERIC_H747XIHX_FPCONF "-") add_library(GENERIC_H747XIHX INTERFACE) target_compile_options(GENERIC_H747XIHX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H747xx " + "SHELL:-DCORE_CM7 -DSTM32H747xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -79383,15 +79523,15 @@ target_compile_options(GENERIC_H747XIHX_serial_none INTERFACE ) add_library(GENERIC_H747XIHX_usb_CDC INTERFACE) target_compile_options(GENERIC_H747XIHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H747XIHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H747XIHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H747XIHX_usb_HID INTERFACE) target_compile_options(GENERIC_H747XIHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H747XIHX_usb_none INTERFACE) target_compile_options(GENERIC_H747XIHX_usb_none INTERFACE @@ -79420,7 +79560,7 @@ set(GENERIC_H750IBKX_MCU cortex-m7) set(GENERIC_H750IBKX_FPCONF "-") add_library(GENERIC_H750IBKX INTERFACE) target_compile_options(GENERIC_H750IBKX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H750xx " + "SHELL:-DCORE_CM7 -DSTM32H750xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -79465,15 +79605,15 @@ target_compile_options(GENERIC_H750IBKX_serial_none INTERFACE ) add_library(GENERIC_H750IBKX_usb_CDC INTERFACE) target_compile_options(GENERIC_H750IBKX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H750IBKX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H750IBKX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H750IBKX_usb_HID INTERFACE) target_compile_options(GENERIC_H750IBKX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H750IBKX_usb_none INTERFACE) target_compile_options(GENERIC_H750IBKX_usb_none INTERFACE @@ -79502,7 +79642,7 @@ set(GENERIC_H750IBTX_MCU cortex-m7) set(GENERIC_H750IBTX_FPCONF "-") add_library(GENERIC_H750IBTX INTERFACE) target_compile_options(GENERIC_H750IBTX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H750xx " + "SHELL:-DCORE_CM7 -DSTM32H750xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -79547,15 +79687,15 @@ target_compile_options(GENERIC_H750IBTX_serial_none INTERFACE ) add_library(GENERIC_H750IBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_H750IBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H750IBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H750IBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H750IBTX_usb_HID INTERFACE) target_compile_options(GENERIC_H750IBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H750IBTX_usb_none INTERFACE) target_compile_options(GENERIC_H750IBTX_usb_none INTERFACE @@ -79584,7 +79724,7 @@ set(GENERIC_H750VBTX_MCU cortex-m7) set(GENERIC_H750VBTX_FPCONF "-") add_library(GENERIC_H750VBTX INTERFACE) target_compile_options(GENERIC_H750VBTX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H750xx " + "SHELL:-DCORE_CM7 -DSTM32H750xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -79629,15 +79769,15 @@ target_compile_options(GENERIC_H750VBTX_serial_none INTERFACE ) add_library(GENERIC_H750VBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_H750VBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H750VBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H750VBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H750VBTX_usb_HID INTERFACE) target_compile_options(GENERIC_H750VBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H750VBTX_usb_none INTERFACE) target_compile_options(GENERIC_H750VBTX_usb_none INTERFACE @@ -79666,7 +79806,7 @@ set(GENERIC_H750XBHX_MCU cortex-m7) set(GENERIC_H750XBHX_FPCONF "-") add_library(GENERIC_H750XBHX INTERFACE) target_compile_options(GENERIC_H750XBHX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H750xx " + "SHELL:-DCORE_CM7 -DSTM32H750xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -79711,15 +79851,15 @@ target_compile_options(GENERIC_H750XBHX_serial_none INTERFACE ) add_library(GENERIC_H750XBHX_usb_CDC INTERFACE) target_compile_options(GENERIC_H750XBHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H750XBHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H750XBHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H750XBHX_usb_HID INTERFACE) target_compile_options(GENERIC_H750XBHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H750XBHX_usb_none INTERFACE) target_compile_options(GENERIC_H750XBHX_usb_none INTERFACE @@ -79748,7 +79888,7 @@ set(GENERIC_H750ZBTX_MCU cortex-m7) set(GENERIC_H750ZBTX_FPCONF "-") add_library(GENERIC_H750ZBTX INTERFACE) target_compile_options(GENERIC_H750ZBTX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H750xx " + "SHELL:-DCORE_CM7 -DSTM32H750xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -79793,15 +79933,15 @@ target_compile_options(GENERIC_H750ZBTX_serial_none INTERFACE ) add_library(GENERIC_H750ZBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_H750ZBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H750ZBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H750ZBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H750ZBTX_usb_HID INTERFACE) target_compile_options(GENERIC_H750ZBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H750ZBTX_usb_none INTERFACE) target_compile_options(GENERIC_H750ZBTX_usb_none INTERFACE @@ -79830,7 +79970,7 @@ set(GENERIC_H753IIKX_MCU cortex-m7) set(GENERIC_H753IIKX_FPCONF "-") add_library(GENERIC_H753IIKX INTERFACE) target_compile_options(GENERIC_H753IIKX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H753xx " + "SHELL:-DCORE_CM7 -DSTM32H753xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -79875,15 +80015,15 @@ target_compile_options(GENERIC_H753IIKX_serial_none INTERFACE ) add_library(GENERIC_H753IIKX_usb_CDC INTERFACE) target_compile_options(GENERIC_H753IIKX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H753IIKX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H753IIKX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H753IIKX_usb_HID INTERFACE) target_compile_options(GENERIC_H753IIKX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H753IIKX_usb_none INTERFACE) target_compile_options(GENERIC_H753IIKX_usb_none INTERFACE @@ -79912,7 +80052,7 @@ set(GENERIC_H753IITX_MCU cortex-m7) set(GENERIC_H753IITX_FPCONF "-") add_library(GENERIC_H753IITX INTERFACE) target_compile_options(GENERIC_H753IITX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H753xx " + "SHELL:-DCORE_CM7 -DSTM32H753xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -79957,15 +80097,15 @@ target_compile_options(GENERIC_H753IITX_serial_none INTERFACE ) add_library(GENERIC_H753IITX_usb_CDC INTERFACE) target_compile_options(GENERIC_H753IITX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H753IITX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H753IITX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H753IITX_usb_HID INTERFACE) target_compile_options(GENERIC_H753IITX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H753IITX_usb_none INTERFACE) target_compile_options(GENERIC_H753IITX_usb_none INTERFACE @@ -79994,7 +80134,7 @@ set(GENERIC_H753VIHX_MCU cortex-m7) set(GENERIC_H753VIHX_FPCONF "-") add_library(GENERIC_H753VIHX INTERFACE) target_compile_options(GENERIC_H753VIHX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H753xx " + "SHELL:-DCORE_CM7 -DSTM32H753xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -80039,15 +80179,15 @@ target_compile_options(GENERIC_H753VIHX_serial_none INTERFACE ) add_library(GENERIC_H753VIHX_usb_CDC INTERFACE) target_compile_options(GENERIC_H753VIHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H753VIHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H753VIHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H753VIHX_usb_HID INTERFACE) target_compile_options(GENERIC_H753VIHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H753VIHX_usb_none INTERFACE) target_compile_options(GENERIC_H753VIHX_usb_none INTERFACE @@ -80076,7 +80216,7 @@ set(GENERIC_H753VITX_MCU cortex-m7) set(GENERIC_H753VITX_FPCONF "-") add_library(GENERIC_H753VITX INTERFACE) target_compile_options(GENERIC_H753VITX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H753xx " + "SHELL:-DCORE_CM7 -DSTM32H753xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -80121,15 +80261,15 @@ target_compile_options(GENERIC_H753VITX_serial_none INTERFACE ) add_library(GENERIC_H753VITX_usb_CDC INTERFACE) target_compile_options(GENERIC_H753VITX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H753VITX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H753VITX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H753VITX_usb_HID INTERFACE) target_compile_options(GENERIC_H753VITX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H753VITX_usb_none INTERFACE) target_compile_options(GENERIC_H753VITX_usb_none INTERFACE @@ -80158,7 +80298,7 @@ set(GENERIC_H753XIHX_MCU cortex-m7) set(GENERIC_H753XIHX_FPCONF "-") add_library(GENERIC_H753XIHX INTERFACE) target_compile_options(GENERIC_H753XIHX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H753xx " + "SHELL:-DCORE_CM7 -DSTM32H753xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -80203,15 +80343,15 @@ target_compile_options(GENERIC_H753XIHX_serial_none INTERFACE ) add_library(GENERIC_H753XIHX_usb_CDC INTERFACE) target_compile_options(GENERIC_H753XIHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H753XIHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H753XIHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H753XIHX_usb_HID INTERFACE) target_compile_options(GENERIC_H753XIHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H753XIHX_usb_none INTERFACE) target_compile_options(GENERIC_H753XIHX_usb_none INTERFACE @@ -80240,7 +80380,7 @@ set(GENERIC_H753ZITX_MCU cortex-m7) set(GENERIC_H753ZITX_FPCONF "-") add_library(GENERIC_H753ZITX INTERFACE) target_compile_options(GENERIC_H753ZITX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H753xx " + "SHELL:-DCORE_CM7 -DSTM32H753xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -80285,15 +80425,15 @@ target_compile_options(GENERIC_H753ZITX_serial_none INTERFACE ) add_library(GENERIC_H753ZITX_usb_CDC INTERFACE) target_compile_options(GENERIC_H753ZITX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H753ZITX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H753ZITX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H753ZITX_usb_HID INTERFACE) target_compile_options(GENERIC_H753ZITX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H753ZITX_usb_none INTERFACE) target_compile_options(GENERIC_H753ZITX_usb_none INTERFACE @@ -80322,7 +80462,7 @@ set(GENERIC_H755XIHX_MCU cortex-m7) set(GENERIC_H755XIHX_FPCONF "-") add_library(GENERIC_H755XIHX INTERFACE) target_compile_options(GENERIC_H755XIHX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H755xx " + "SHELL:-DCORE_CM7 -DSTM32H755xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -80367,15 +80507,15 @@ target_compile_options(GENERIC_H755XIHX_serial_none INTERFACE ) add_library(GENERIC_H755XIHX_usb_CDC INTERFACE) target_compile_options(GENERIC_H755XIHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H755XIHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H755XIHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H755XIHX_usb_HID INTERFACE) target_compile_options(GENERIC_H755XIHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H755XIHX_usb_none INTERFACE) target_compile_options(GENERIC_H755XIHX_usb_none INTERFACE @@ -80404,7 +80544,7 @@ set(GENERIC_H757AIIX_MCU cortex-m7) set(GENERIC_H757AIIX_FPCONF "-") add_library(GENERIC_H757AIIX INTERFACE) target_compile_options(GENERIC_H757AIIX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H757xx " + "SHELL:-DCORE_CM7 -DSTM32H757xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -80449,15 +80589,15 @@ target_compile_options(GENERIC_H757AIIX_serial_none INTERFACE ) add_library(GENERIC_H757AIIX_usb_CDC INTERFACE) target_compile_options(GENERIC_H757AIIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H757AIIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H757AIIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H757AIIX_usb_HID INTERFACE) target_compile_options(GENERIC_H757AIIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H757AIIX_usb_none INTERFACE) target_compile_options(GENERIC_H757AIIX_usb_none INTERFACE @@ -80486,7 +80626,7 @@ set(GENERIC_H757IITX_MCU cortex-m7) set(GENERIC_H757IITX_FPCONF "-") add_library(GENERIC_H757IITX INTERFACE) target_compile_options(GENERIC_H757IITX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H757xx " + "SHELL:-DCORE_CM7 -DSTM32H757xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -80531,15 +80671,15 @@ target_compile_options(GENERIC_H757IITX_serial_none INTERFACE ) add_library(GENERIC_H757IITX_usb_CDC INTERFACE) target_compile_options(GENERIC_H757IITX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H757IITX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H757IITX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H757IITX_usb_HID INTERFACE) target_compile_options(GENERIC_H757IITX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H757IITX_usb_none INTERFACE) target_compile_options(GENERIC_H757IITX_usb_none INTERFACE @@ -80568,7 +80708,7 @@ set(GENERIC_H757XIHX_MCU cortex-m7) set(GENERIC_H757XIHX_FPCONF "-") add_library(GENERIC_H757XIHX INTERFACE) target_compile_options(GENERIC_H757XIHX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H757xx " + "SHELL:-DCORE_CM7 -DSTM32H757xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -80613,15 +80753,15 @@ target_compile_options(GENERIC_H757XIHX_serial_none INTERFACE ) add_library(GENERIC_H757XIHX_usb_CDC INTERFACE) target_compile_options(GENERIC_H757XIHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H757XIHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H757XIHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H757XIHX_usb_HID INTERFACE) target_compile_options(GENERIC_H757XIHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H757XIHX_usb_none INTERFACE) target_compile_options(GENERIC_H757XIHX_usb_none INTERFACE @@ -80650,7 +80790,7 @@ set(GENERIC_H7A3VGHX_MCU cortex-m7) set(GENERIC_H7A3VGHX_FPCONF "-") add_library(GENERIC_H7A3VGHX INTERFACE) target_compile_options(GENERIC_H7A3VGHX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H7A3xx " + "SHELL:-DCORE_CM7 -DSTM32H7A3xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -80695,15 +80835,15 @@ target_compile_options(GENERIC_H7A3VGHX_serial_none INTERFACE ) add_library(GENERIC_H7A3VGHX_usb_CDC INTERFACE) target_compile_options(GENERIC_H7A3VGHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H7A3VGHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H7A3VGHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H7A3VGHX_usb_HID INTERFACE) target_compile_options(GENERIC_H7A3VGHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H7A3VGHX_usb_none INTERFACE) target_compile_options(GENERIC_H7A3VGHX_usb_none INTERFACE @@ -80732,7 +80872,7 @@ set(GENERIC_H7A3VGTX_MCU cortex-m7) set(GENERIC_H7A3VGTX_FPCONF "-") add_library(GENERIC_H7A3VGTX INTERFACE) target_compile_options(GENERIC_H7A3VGTX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H7A3xx " + "SHELL:-DCORE_CM7 -DSTM32H7A3xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -80777,15 +80917,15 @@ target_compile_options(GENERIC_H7A3VGTX_serial_none INTERFACE ) add_library(GENERIC_H7A3VGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_H7A3VGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H7A3VGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H7A3VGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H7A3VGTX_usb_HID INTERFACE) target_compile_options(GENERIC_H7A3VGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H7A3VGTX_usb_none INTERFACE) target_compile_options(GENERIC_H7A3VGTX_usb_none INTERFACE @@ -80814,7 +80954,7 @@ set(GENERIC_H7A3VIHX_MCU cortex-m7) set(GENERIC_H7A3VIHX_FPCONF "-") add_library(GENERIC_H7A3VIHX INTERFACE) target_compile_options(GENERIC_H7A3VIHX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H7A3xx " + "SHELL:-DCORE_CM7 -DSTM32H7A3xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -80859,15 +80999,15 @@ target_compile_options(GENERIC_H7A3VIHX_serial_none INTERFACE ) add_library(GENERIC_H7A3VIHX_usb_CDC INTERFACE) target_compile_options(GENERIC_H7A3VIHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H7A3VIHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H7A3VIHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H7A3VIHX_usb_HID INTERFACE) target_compile_options(GENERIC_H7A3VIHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H7A3VIHX_usb_none INTERFACE) target_compile_options(GENERIC_H7A3VIHX_usb_none INTERFACE @@ -80896,7 +81036,7 @@ set(GENERIC_H7A3VITX_MCU cortex-m7) set(GENERIC_H7A3VITX_FPCONF "-") add_library(GENERIC_H7A3VITX INTERFACE) target_compile_options(GENERIC_H7A3VITX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H7A3xx " + "SHELL:-DCORE_CM7 -DSTM32H7A3xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -80941,15 +81081,15 @@ target_compile_options(GENERIC_H7A3VITX_serial_none INTERFACE ) add_library(GENERIC_H7A3VITX_usb_CDC INTERFACE) target_compile_options(GENERIC_H7A3VITX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H7A3VITX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H7A3VITX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H7A3VITX_usb_HID INTERFACE) target_compile_options(GENERIC_H7A3VITX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H7A3VITX_usb_none INTERFACE) target_compile_options(GENERIC_H7A3VITX_usb_none INTERFACE @@ -80978,7 +81118,7 @@ set(GENERIC_H7A3ZGTXQ_MCU cortex-m7) set(GENERIC_H7A3ZGTXQ_FPCONF "-") add_library(GENERIC_H7A3ZGTXQ INTERFACE) target_compile_options(GENERIC_H7A3ZGTXQ INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H7A3xxQ " + "SHELL:-DCORE_CM7 -DSTM32H7A3xxQ" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -81023,15 +81163,15 @@ target_compile_options(GENERIC_H7A3ZGTXQ_serial_none INTERFACE ) add_library(GENERIC_H7A3ZGTXQ_usb_CDC INTERFACE) target_compile_options(GENERIC_H7A3ZGTXQ_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H7A3ZGTXQ_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H7A3ZGTXQ_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H7A3ZGTXQ_usb_HID INTERFACE) target_compile_options(GENERIC_H7A3ZGTXQ_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H7A3ZGTXQ_usb_none INTERFACE) target_compile_options(GENERIC_H7A3ZGTXQ_usb_none INTERFACE @@ -81060,7 +81200,7 @@ set(GENERIC_H7A3ZITXQ_MCU cortex-m7) set(GENERIC_H7A3ZITXQ_FPCONF "-") add_library(GENERIC_H7A3ZITXQ INTERFACE) target_compile_options(GENERIC_H7A3ZITXQ INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H7A3xxQ " + "SHELL:-DCORE_CM7 -DSTM32H7A3xxQ" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -81105,15 +81245,15 @@ target_compile_options(GENERIC_H7A3ZITXQ_serial_none INTERFACE ) add_library(GENERIC_H7A3ZITXQ_usb_CDC INTERFACE) target_compile_options(GENERIC_H7A3ZITXQ_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H7A3ZITXQ_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H7A3ZITXQ_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H7A3ZITXQ_usb_HID INTERFACE) target_compile_options(GENERIC_H7A3ZITXQ_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H7A3ZITXQ_usb_none INTERFACE) target_compile_options(GENERIC_H7A3ZITXQ_usb_none INTERFACE @@ -81142,7 +81282,7 @@ set(GENERIC_H7B0VBTX_MCU cortex-m7) set(GENERIC_H7B0VBTX_FPCONF "-") add_library(GENERIC_H7B0VBTX INTERFACE) target_compile_options(GENERIC_H7B0VBTX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H7B0xx " + "SHELL:-DCORE_CM7 -DSTM32H7B0xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -81187,15 +81327,15 @@ target_compile_options(GENERIC_H7B0VBTX_serial_none INTERFACE ) add_library(GENERIC_H7B0VBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_H7B0VBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H7B0VBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H7B0VBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H7B0VBTX_usb_HID INTERFACE) target_compile_options(GENERIC_H7B0VBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H7B0VBTX_usb_none INTERFACE) target_compile_options(GENERIC_H7B0VBTX_usb_none INTERFACE @@ -81224,7 +81364,7 @@ set(GENERIC_H7B3VIHX_MCU cortex-m7) set(GENERIC_H7B3VIHX_FPCONF "-") add_library(GENERIC_H7B3VIHX INTERFACE) target_compile_options(GENERIC_H7B3VIHX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H7B3xx " + "SHELL:-DCORE_CM7 -DSTM32H7B3xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -81269,15 +81409,15 @@ target_compile_options(GENERIC_H7B3VIHX_serial_none INTERFACE ) add_library(GENERIC_H7B3VIHX_usb_CDC INTERFACE) target_compile_options(GENERIC_H7B3VIHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H7B3VIHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H7B3VIHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H7B3VIHX_usb_HID INTERFACE) target_compile_options(GENERIC_H7B3VIHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H7B3VIHX_usb_none INTERFACE) target_compile_options(GENERIC_H7B3VIHX_usb_none INTERFACE @@ -81306,7 +81446,7 @@ set(GENERIC_H7B3VITX_MCU cortex-m7) set(GENERIC_H7B3VITX_FPCONF "-") add_library(GENERIC_H7B3VITX INTERFACE) target_compile_options(GENERIC_H7B3VITX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H7B3xx " + "SHELL:-DCORE_CM7 -DSTM32H7B3xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -81351,15 +81491,15 @@ target_compile_options(GENERIC_H7B3VITX_serial_none INTERFACE ) add_library(GENERIC_H7B3VITX_usb_CDC INTERFACE) target_compile_options(GENERIC_H7B3VITX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H7B3VITX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H7B3VITX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H7B3VITX_usb_HID INTERFACE) target_compile_options(GENERIC_H7B3VITX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H7B3VITX_usb_none INTERFACE) target_compile_options(GENERIC_H7B3VITX_usb_none INTERFACE @@ -81388,7 +81528,7 @@ set(GENERIC_H7B3ZITXQ_MCU cortex-m7) set(GENERIC_H7B3ZITXQ_FPCONF "-") add_library(GENERIC_H7B3ZITXQ INTERFACE) target_compile_options(GENERIC_H7B3ZITXQ INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H7B3xxQ " + "SHELL:-DCORE_CM7 -DSTM32H7B3xxQ" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -81433,15 +81573,15 @@ target_compile_options(GENERIC_H7B3ZITXQ_serial_none INTERFACE ) add_library(GENERIC_H7B3ZITXQ_usb_CDC INTERFACE) target_compile_options(GENERIC_H7B3ZITXQ_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_H7B3ZITXQ_usb_CDCgen INTERFACE) target_compile_options(GENERIC_H7B3ZITXQ_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_H7B3ZITXQ_usb_HID INTERFACE) target_compile_options(GENERIC_H7B3ZITXQ_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_H7B3ZITXQ_usb_none INTERFACE) target_compile_options(GENERIC_H7B3ZITXQ_usb_none INTERFACE @@ -81470,7 +81610,7 @@ set(GENERIC_L010C6TX_MCU cortex-m0plus) set(GENERIC_L010C6TX_FPCONF "-") add_library(GENERIC_L010C6TX INTERFACE) target_compile_options(GENERIC_L010C6TX INTERFACE - "SHELL:-DSTM32L010x6 -D__CORTEX_SC=0" + "SHELL:-DSTM32L010x6 -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -81515,15 +81655,15 @@ target_compile_options(GENERIC_L010C6TX_serial_none INTERFACE ) add_library(GENERIC_L010C6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_L010C6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L010C6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L010C6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L010C6TX_usb_HID INTERFACE) target_compile_options(GENERIC_L010C6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L010C6TX_usb_none INTERFACE) target_compile_options(GENERIC_L010C6TX_usb_none INTERFACE @@ -81540,7 +81680,7 @@ set(GENERIC_L010F4PX_MCU cortex-m0plus) set(GENERIC_L010F4PX_FPCONF "-") add_library(GENERIC_L010F4PX INTERFACE) target_compile_options(GENERIC_L010F4PX INTERFACE - "SHELL:-DSTM32L010x4 -D__CORTEX_SC=0" + "SHELL:-DSTM32L010x4 -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -81585,15 +81725,15 @@ target_compile_options(GENERIC_L010F4PX_serial_none INTERFACE ) add_library(GENERIC_L010F4PX_usb_CDC INTERFACE) target_compile_options(GENERIC_L010F4PX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L010F4PX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L010F4PX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L010F4PX_usb_HID INTERFACE) target_compile_options(GENERIC_L010F4PX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L010F4PX_usb_none INTERFACE) target_compile_options(GENERIC_L010F4PX_usb_none INTERFACE @@ -81610,7 +81750,7 @@ set(GENERIC_L010K4TX_MCU cortex-m0plus) set(GENERIC_L010K4TX_FPCONF "-") add_library(GENERIC_L010K4TX INTERFACE) target_compile_options(GENERIC_L010K4TX INTERFACE - "SHELL:-DSTM32L010x4 -D__CORTEX_SC=0" + "SHELL:-DSTM32L010x4 -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -81655,15 +81795,15 @@ target_compile_options(GENERIC_L010K4TX_serial_none INTERFACE ) add_library(GENERIC_L010K4TX_usb_CDC INTERFACE) target_compile_options(GENERIC_L010K4TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L010K4TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L010K4TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L010K4TX_usb_HID INTERFACE) target_compile_options(GENERIC_L010K4TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L010K4TX_usb_none INTERFACE) target_compile_options(GENERIC_L010K4TX_usb_none INTERFACE @@ -81680,7 +81820,7 @@ set(GENERIC_L010R8TX_MCU cortex-m0plus) set(GENERIC_L010R8TX_FPCONF "-") add_library(GENERIC_L010R8TX INTERFACE) target_compile_options(GENERIC_L010R8TX INTERFACE - "SHELL:-DSTM32L010x8 -D__CORTEX_SC=0" + "SHELL:-DSTM32L010x8 -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -81725,15 +81865,15 @@ target_compile_options(GENERIC_L010R8TX_serial_none INTERFACE ) add_library(GENERIC_L010R8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_L010R8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L010R8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L010R8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L010R8TX_usb_HID INTERFACE) target_compile_options(GENERIC_L010R8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L010R8TX_usb_none INTERFACE) target_compile_options(GENERIC_L010R8TX_usb_none INTERFACE @@ -81750,7 +81890,7 @@ set(GENERIC_L010RBTX_MCU cortex-m0plus) set(GENERIC_L010RBTX_FPCONF "-") add_library(GENERIC_L010RBTX INTERFACE) target_compile_options(GENERIC_L010RBTX INTERFACE - "SHELL:-DSTM32L010xB -D__CORTEX_SC=0" + "SHELL:-DSTM32L010xB -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -81795,15 +81935,15 @@ target_compile_options(GENERIC_L010RBTX_serial_none INTERFACE ) add_library(GENERIC_L010RBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L010RBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L010RBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L010RBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L010RBTX_usb_HID INTERFACE) target_compile_options(GENERIC_L010RBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L010RBTX_usb_none INTERFACE) target_compile_options(GENERIC_L010RBTX_usb_none INTERFACE @@ -81820,7 +81960,7 @@ set(GENERIC_L011D3PX_MCU cortex-m0plus) set(GENERIC_L011D3PX_FPCONF "-") add_library(GENERIC_L011D3PX INTERFACE) target_compile_options(GENERIC_L011D3PX INTERFACE - "SHELL:-DSTM32L011xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L011xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -81865,15 +82005,15 @@ target_compile_options(GENERIC_L011D3PX_serial_none INTERFACE ) add_library(GENERIC_L011D3PX_usb_CDC INTERFACE) target_compile_options(GENERIC_L011D3PX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L011D3PX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L011D3PX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L011D3PX_usb_HID INTERFACE) target_compile_options(GENERIC_L011D3PX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L011D3PX_usb_none INTERFACE) target_compile_options(GENERIC_L011D3PX_usb_none INTERFACE @@ -81890,7 +82030,7 @@ set(GENERIC_L011D4PX_MCU cortex-m0plus) set(GENERIC_L011D4PX_FPCONF "-") add_library(GENERIC_L011D4PX INTERFACE) target_compile_options(GENERIC_L011D4PX INTERFACE - "SHELL:-DSTM32L011xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L011xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -81935,15 +82075,15 @@ target_compile_options(GENERIC_L011D4PX_serial_none INTERFACE ) add_library(GENERIC_L011D4PX_usb_CDC INTERFACE) target_compile_options(GENERIC_L011D4PX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L011D4PX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L011D4PX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L011D4PX_usb_HID INTERFACE) target_compile_options(GENERIC_L011D4PX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L011D4PX_usb_none INTERFACE) target_compile_options(GENERIC_L011D4PX_usb_none INTERFACE @@ -81960,7 +82100,7 @@ set(GENERIC_L011E3YX_MCU cortex-m0plus) set(GENERIC_L011E3YX_FPCONF "-") add_library(GENERIC_L011E3YX INTERFACE) target_compile_options(GENERIC_L011E3YX INTERFACE - "SHELL:-DSTM32L011xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L011xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -82005,15 +82145,15 @@ target_compile_options(GENERIC_L011E3YX_serial_none INTERFACE ) add_library(GENERIC_L011E3YX_usb_CDC INTERFACE) target_compile_options(GENERIC_L011E3YX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L011E3YX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L011E3YX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L011E3YX_usb_HID INTERFACE) target_compile_options(GENERIC_L011E3YX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L011E3YX_usb_none INTERFACE) target_compile_options(GENERIC_L011E3YX_usb_none INTERFACE @@ -82030,7 +82170,7 @@ set(GENERIC_L011E4YX_MCU cortex-m0plus) set(GENERIC_L011E4YX_FPCONF "-") add_library(GENERIC_L011E4YX INTERFACE) target_compile_options(GENERIC_L011E4YX INTERFACE - "SHELL:-DSTM32L011xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L011xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -82075,15 +82215,15 @@ target_compile_options(GENERIC_L011E4YX_serial_none INTERFACE ) add_library(GENERIC_L011E4YX_usb_CDC INTERFACE) target_compile_options(GENERIC_L011E4YX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L011E4YX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L011E4YX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L011E4YX_usb_HID INTERFACE) target_compile_options(GENERIC_L011E4YX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L011E4YX_usb_none INTERFACE) target_compile_options(GENERIC_L011E4YX_usb_none INTERFACE @@ -82100,7 +82240,7 @@ set(GENERIC_L011F3PX_MCU cortex-m0plus) set(GENERIC_L011F3PX_FPCONF "-") add_library(GENERIC_L011F3PX INTERFACE) target_compile_options(GENERIC_L011F3PX INTERFACE - "SHELL:-DSTM32L011xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L011xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -82145,15 +82285,15 @@ target_compile_options(GENERIC_L011F3PX_serial_none INTERFACE ) add_library(GENERIC_L011F3PX_usb_CDC INTERFACE) target_compile_options(GENERIC_L011F3PX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L011F3PX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L011F3PX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L011F3PX_usb_HID INTERFACE) target_compile_options(GENERIC_L011F3PX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L011F3PX_usb_none INTERFACE) target_compile_options(GENERIC_L011F3PX_usb_none INTERFACE @@ -82170,7 +82310,7 @@ set(GENERIC_L011F3UX_MCU cortex-m0plus) set(GENERIC_L011F3UX_FPCONF "-") add_library(GENERIC_L011F3UX INTERFACE) target_compile_options(GENERIC_L011F3UX INTERFACE - "SHELL:-DSTM32L011xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L011xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -82215,15 +82355,15 @@ target_compile_options(GENERIC_L011F3UX_serial_none INTERFACE ) add_library(GENERIC_L011F3UX_usb_CDC INTERFACE) target_compile_options(GENERIC_L011F3UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L011F3UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L011F3UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L011F3UX_usb_HID INTERFACE) target_compile_options(GENERIC_L011F3UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L011F3UX_usb_none INTERFACE) target_compile_options(GENERIC_L011F3UX_usb_none INTERFACE @@ -82240,7 +82380,7 @@ set(GENERIC_L011F4PX_MCU cortex-m0plus) set(GENERIC_L011F4PX_FPCONF "-") add_library(GENERIC_L011F4PX INTERFACE) target_compile_options(GENERIC_L011F4PX INTERFACE - "SHELL:-DSTM32L011xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L011xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -82285,15 +82425,15 @@ target_compile_options(GENERIC_L011F4PX_serial_none INTERFACE ) add_library(GENERIC_L011F4PX_usb_CDC INTERFACE) target_compile_options(GENERIC_L011F4PX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L011F4PX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L011F4PX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L011F4PX_usb_HID INTERFACE) target_compile_options(GENERIC_L011F4PX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L011F4PX_usb_none INTERFACE) target_compile_options(GENERIC_L011F4PX_usb_none INTERFACE @@ -82310,7 +82450,7 @@ set(GENERIC_L011F4UX_MCU cortex-m0plus) set(GENERIC_L011F4UX_FPCONF "-") add_library(GENERIC_L011F4UX INTERFACE) target_compile_options(GENERIC_L011F4UX INTERFACE - "SHELL:-DSTM32L011xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L011xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -82355,15 +82495,15 @@ target_compile_options(GENERIC_L011F4UX_serial_none INTERFACE ) add_library(GENERIC_L011F4UX_usb_CDC INTERFACE) target_compile_options(GENERIC_L011F4UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L011F4UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L011F4UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L011F4UX_usb_HID INTERFACE) target_compile_options(GENERIC_L011F4UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L011F4UX_usb_none INTERFACE) target_compile_options(GENERIC_L011F4UX_usb_none INTERFACE @@ -82380,7 +82520,7 @@ set(GENERIC_L011G3UX_MCU cortex-m0plus) set(GENERIC_L011G3UX_FPCONF "-") add_library(GENERIC_L011G3UX INTERFACE) target_compile_options(GENERIC_L011G3UX INTERFACE - "SHELL:-DSTM32L011xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L011xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -82425,15 +82565,15 @@ target_compile_options(GENERIC_L011G3UX_serial_none INTERFACE ) add_library(GENERIC_L011G3UX_usb_CDC INTERFACE) target_compile_options(GENERIC_L011G3UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L011G3UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L011G3UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L011G3UX_usb_HID INTERFACE) target_compile_options(GENERIC_L011G3UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L011G3UX_usb_none INTERFACE) target_compile_options(GENERIC_L011G3UX_usb_none INTERFACE @@ -82450,7 +82590,7 @@ set(GENERIC_L011G4UX_MCU cortex-m0plus) set(GENERIC_L011G4UX_FPCONF "-") add_library(GENERIC_L011G4UX INTERFACE) target_compile_options(GENERIC_L011G4UX INTERFACE - "SHELL:-DSTM32L011xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L011xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -82495,15 +82635,15 @@ target_compile_options(GENERIC_L011G4UX_serial_none INTERFACE ) add_library(GENERIC_L011G4UX_usb_CDC INTERFACE) target_compile_options(GENERIC_L011G4UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L011G4UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L011G4UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L011G4UX_usb_HID INTERFACE) target_compile_options(GENERIC_L011G4UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L011G4UX_usb_none INTERFACE) target_compile_options(GENERIC_L011G4UX_usb_none INTERFACE @@ -82520,7 +82660,7 @@ set(GENERIC_L011K3TX_MCU cortex-m0plus) set(GENERIC_L011K3TX_FPCONF "-") add_library(GENERIC_L011K3TX INTERFACE) target_compile_options(GENERIC_L011K3TX INTERFACE - "SHELL:-DSTM32L011xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L011xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -82565,15 +82705,15 @@ target_compile_options(GENERIC_L011K3TX_serial_none INTERFACE ) add_library(GENERIC_L011K3TX_usb_CDC INTERFACE) target_compile_options(GENERIC_L011K3TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L011K3TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L011K3TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L011K3TX_usb_HID INTERFACE) target_compile_options(GENERIC_L011K3TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L011K3TX_usb_none INTERFACE) target_compile_options(GENERIC_L011K3TX_usb_none INTERFACE @@ -82590,7 +82730,7 @@ set(GENERIC_L011K3UX_MCU cortex-m0plus) set(GENERIC_L011K3UX_FPCONF "-") add_library(GENERIC_L011K3UX INTERFACE) target_compile_options(GENERIC_L011K3UX INTERFACE - "SHELL:-DSTM32L011xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L011xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -82635,15 +82775,15 @@ target_compile_options(GENERIC_L011K3UX_serial_none INTERFACE ) add_library(GENERIC_L011K3UX_usb_CDC INTERFACE) target_compile_options(GENERIC_L011K3UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L011K3UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L011K3UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L011K3UX_usb_HID INTERFACE) target_compile_options(GENERIC_L011K3UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L011K3UX_usb_none INTERFACE) target_compile_options(GENERIC_L011K3UX_usb_none INTERFACE @@ -82660,7 +82800,7 @@ set(GENERIC_L011K4TX_MCU cortex-m0plus) set(GENERIC_L011K4TX_FPCONF "-") add_library(GENERIC_L011K4TX INTERFACE) target_compile_options(GENERIC_L011K4TX INTERFACE - "SHELL:-DSTM32L011xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L011xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -82705,15 +82845,15 @@ target_compile_options(GENERIC_L011K4TX_serial_none INTERFACE ) add_library(GENERIC_L011K4TX_usb_CDC INTERFACE) target_compile_options(GENERIC_L011K4TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L011K4TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L011K4TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L011K4TX_usb_HID INTERFACE) target_compile_options(GENERIC_L011K4TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L011K4TX_usb_none INTERFACE) target_compile_options(GENERIC_L011K4TX_usb_none INTERFACE @@ -82730,7 +82870,7 @@ set(GENERIC_L011K4UX_MCU cortex-m0plus) set(GENERIC_L011K4UX_FPCONF "-") add_library(GENERIC_L011K4UX INTERFACE) target_compile_options(GENERIC_L011K4UX INTERFACE - "SHELL:-DSTM32L011xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L011xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -82775,15 +82915,15 @@ target_compile_options(GENERIC_L011K4UX_serial_none INTERFACE ) add_library(GENERIC_L011K4UX_usb_CDC INTERFACE) target_compile_options(GENERIC_L011K4UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L011K4UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L011K4UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L011K4UX_usb_HID INTERFACE) target_compile_options(GENERIC_L011K4UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L011K4UX_usb_none INTERFACE) target_compile_options(GENERIC_L011K4UX_usb_none INTERFACE @@ -82800,7 +82940,7 @@ set(GENERIC_L021D4PX_MCU cortex-m0plus) set(GENERIC_L021D4PX_FPCONF "-") add_library(GENERIC_L021D4PX INTERFACE) target_compile_options(GENERIC_L021D4PX INTERFACE - "SHELL:-DSTM32L021xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L021xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -82845,15 +82985,15 @@ target_compile_options(GENERIC_L021D4PX_serial_none INTERFACE ) add_library(GENERIC_L021D4PX_usb_CDC INTERFACE) target_compile_options(GENERIC_L021D4PX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L021D4PX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L021D4PX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L021D4PX_usb_HID INTERFACE) target_compile_options(GENERIC_L021D4PX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L021D4PX_usb_none INTERFACE) target_compile_options(GENERIC_L021D4PX_usb_none INTERFACE @@ -82870,7 +83010,7 @@ set(GENERIC_L021F4PX_MCU cortex-m0plus) set(GENERIC_L021F4PX_FPCONF "-") add_library(GENERIC_L021F4PX INTERFACE) target_compile_options(GENERIC_L021F4PX INTERFACE - "SHELL:-DSTM32L021xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L021xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -82915,15 +83055,15 @@ target_compile_options(GENERIC_L021F4PX_serial_none INTERFACE ) add_library(GENERIC_L021F4PX_usb_CDC INTERFACE) target_compile_options(GENERIC_L021F4PX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L021F4PX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L021F4PX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L021F4PX_usb_HID INTERFACE) target_compile_options(GENERIC_L021F4PX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L021F4PX_usb_none INTERFACE) target_compile_options(GENERIC_L021F4PX_usb_none INTERFACE @@ -82940,7 +83080,7 @@ set(GENERIC_L021F4UX_MCU cortex-m0plus) set(GENERIC_L021F4UX_FPCONF "-") add_library(GENERIC_L021F4UX INTERFACE) target_compile_options(GENERIC_L021F4UX INTERFACE - "SHELL:-DSTM32L021xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L021xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -82985,15 +83125,15 @@ target_compile_options(GENERIC_L021F4UX_serial_none INTERFACE ) add_library(GENERIC_L021F4UX_usb_CDC INTERFACE) target_compile_options(GENERIC_L021F4UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L021F4UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L021F4UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L021F4UX_usb_HID INTERFACE) target_compile_options(GENERIC_L021F4UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L021F4UX_usb_none INTERFACE) target_compile_options(GENERIC_L021F4UX_usb_none INTERFACE @@ -83010,7 +83150,7 @@ set(GENERIC_L021G4UX_MCU cortex-m0plus) set(GENERIC_L021G4UX_FPCONF "-") add_library(GENERIC_L021G4UX INTERFACE) target_compile_options(GENERIC_L021G4UX INTERFACE - "SHELL:-DSTM32L021xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L021xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -83055,15 +83195,15 @@ target_compile_options(GENERIC_L021G4UX_serial_none INTERFACE ) add_library(GENERIC_L021G4UX_usb_CDC INTERFACE) target_compile_options(GENERIC_L021G4UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L021G4UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L021G4UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L021G4UX_usb_HID INTERFACE) target_compile_options(GENERIC_L021G4UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L021G4UX_usb_none INTERFACE) target_compile_options(GENERIC_L021G4UX_usb_none INTERFACE @@ -83080,7 +83220,7 @@ set(GENERIC_L021K4TX_MCU cortex-m0plus) set(GENERIC_L021K4TX_FPCONF "-") add_library(GENERIC_L021K4TX INTERFACE) target_compile_options(GENERIC_L021K4TX INTERFACE - "SHELL:-DSTM32L021xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L021xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -83125,15 +83265,15 @@ target_compile_options(GENERIC_L021K4TX_serial_none INTERFACE ) add_library(GENERIC_L021K4TX_usb_CDC INTERFACE) target_compile_options(GENERIC_L021K4TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L021K4TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L021K4TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L021K4TX_usb_HID INTERFACE) target_compile_options(GENERIC_L021K4TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L021K4TX_usb_none INTERFACE) target_compile_options(GENERIC_L021K4TX_usb_none INTERFACE @@ -83150,7 +83290,7 @@ set(GENERIC_L021K4UX_MCU cortex-m0plus) set(GENERIC_L021K4UX_FPCONF "-") add_library(GENERIC_L021K4UX INTERFACE) target_compile_options(GENERIC_L021K4UX INTERFACE - "SHELL:-DSTM32L021xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L021xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -83195,15 +83335,15 @@ target_compile_options(GENERIC_L021K4UX_serial_none INTERFACE ) add_library(GENERIC_L021K4UX_usb_CDC INTERFACE) target_compile_options(GENERIC_L021K4UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L021K4UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L021K4UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L021K4UX_usb_HID INTERFACE) target_compile_options(GENERIC_L021K4UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L021K4UX_usb_none INTERFACE) target_compile_options(GENERIC_L021K4UX_usb_none INTERFACE @@ -83220,7 +83360,7 @@ set(GENERIC_L031C4TX_MCU cortex-m0plus) set(GENERIC_L031C4TX_FPCONF "-") add_library(GENERIC_L031C4TX INTERFACE) target_compile_options(GENERIC_L031C4TX INTERFACE - "SHELL:-DSTM32L031xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L031xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -83265,15 +83405,15 @@ target_compile_options(GENERIC_L031C4TX_serial_none INTERFACE ) add_library(GENERIC_L031C4TX_usb_CDC INTERFACE) target_compile_options(GENERIC_L031C4TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L031C4TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L031C4TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L031C4TX_usb_HID INTERFACE) target_compile_options(GENERIC_L031C4TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L031C4TX_usb_none INTERFACE) target_compile_options(GENERIC_L031C4TX_usb_none INTERFACE @@ -83290,7 +83430,7 @@ set(GENERIC_L031C4UX_MCU cortex-m0plus) set(GENERIC_L031C4UX_FPCONF "-") add_library(GENERIC_L031C4UX INTERFACE) target_compile_options(GENERIC_L031C4UX INTERFACE - "SHELL:-DSTM32L031xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L031xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -83335,15 +83475,15 @@ target_compile_options(GENERIC_L031C4UX_serial_none INTERFACE ) add_library(GENERIC_L031C4UX_usb_CDC INTERFACE) target_compile_options(GENERIC_L031C4UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L031C4UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L031C4UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L031C4UX_usb_HID INTERFACE) target_compile_options(GENERIC_L031C4UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L031C4UX_usb_none INTERFACE) target_compile_options(GENERIC_L031C4UX_usb_none INTERFACE @@ -83360,7 +83500,7 @@ set(GENERIC_L031C6TX_MCU cortex-m0plus) set(GENERIC_L031C6TX_FPCONF "-") add_library(GENERIC_L031C6TX INTERFACE) target_compile_options(GENERIC_L031C6TX INTERFACE - "SHELL:-DSTM32L031xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L031xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -83405,15 +83545,15 @@ target_compile_options(GENERIC_L031C6TX_serial_none INTERFACE ) add_library(GENERIC_L031C6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_L031C6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L031C6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L031C6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L031C6TX_usb_HID INTERFACE) target_compile_options(GENERIC_L031C6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L031C6TX_usb_none INTERFACE) target_compile_options(GENERIC_L031C6TX_usb_none INTERFACE @@ -83430,7 +83570,7 @@ set(GENERIC_L031C6UX_MCU cortex-m0plus) set(GENERIC_L031C6UX_FPCONF "-") add_library(GENERIC_L031C6UX INTERFACE) target_compile_options(GENERIC_L031C6UX INTERFACE - "SHELL:-DSTM32L031xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L031xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -83475,15 +83615,15 @@ target_compile_options(GENERIC_L031C6UX_serial_none INTERFACE ) add_library(GENERIC_L031C6UX_usb_CDC INTERFACE) target_compile_options(GENERIC_L031C6UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L031C6UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L031C6UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L031C6UX_usb_HID INTERFACE) target_compile_options(GENERIC_L031C6UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L031C6UX_usb_none INTERFACE) target_compile_options(GENERIC_L031C6UX_usb_none INTERFACE @@ -83500,7 +83640,7 @@ set(GENERIC_L031E4YX_MCU cortex-m0plus) set(GENERIC_L031E4YX_FPCONF "-") add_library(GENERIC_L031E4YX INTERFACE) target_compile_options(GENERIC_L031E4YX INTERFACE - "SHELL:-DSTM32L031xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L031xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -83545,15 +83685,15 @@ target_compile_options(GENERIC_L031E4YX_serial_none INTERFACE ) add_library(GENERIC_L031E4YX_usb_CDC INTERFACE) target_compile_options(GENERIC_L031E4YX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L031E4YX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L031E4YX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L031E4YX_usb_HID INTERFACE) target_compile_options(GENERIC_L031E4YX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L031E4YX_usb_none INTERFACE) target_compile_options(GENERIC_L031E4YX_usb_none INTERFACE @@ -83570,7 +83710,7 @@ set(GENERIC_L031E6YX_MCU cortex-m0plus) set(GENERIC_L031E6YX_FPCONF "-") add_library(GENERIC_L031E6YX INTERFACE) target_compile_options(GENERIC_L031E6YX INTERFACE - "SHELL:-DSTM32L031xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L031xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -83615,15 +83755,15 @@ target_compile_options(GENERIC_L031E6YX_serial_none INTERFACE ) add_library(GENERIC_L031E6YX_usb_CDC INTERFACE) target_compile_options(GENERIC_L031E6YX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L031E6YX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L031E6YX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L031E6YX_usb_HID INTERFACE) target_compile_options(GENERIC_L031E6YX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L031E6YX_usb_none INTERFACE) target_compile_options(GENERIC_L031E6YX_usb_none INTERFACE @@ -83640,7 +83780,7 @@ set(GENERIC_L031F4PX_MCU cortex-m0plus) set(GENERIC_L031F4PX_FPCONF "-") add_library(GENERIC_L031F4PX INTERFACE) target_compile_options(GENERIC_L031F4PX INTERFACE - "SHELL:-DSTM32L031xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L031xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -83685,15 +83825,15 @@ target_compile_options(GENERIC_L031F4PX_serial_none INTERFACE ) add_library(GENERIC_L031F4PX_usb_CDC INTERFACE) target_compile_options(GENERIC_L031F4PX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L031F4PX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L031F4PX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L031F4PX_usb_HID INTERFACE) target_compile_options(GENERIC_L031F4PX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L031F4PX_usb_none INTERFACE) target_compile_options(GENERIC_L031F4PX_usb_none INTERFACE @@ -83710,7 +83850,7 @@ set(GENERIC_L031F6PX_MCU cortex-m0plus) set(GENERIC_L031F6PX_FPCONF "-") add_library(GENERIC_L031F6PX INTERFACE) target_compile_options(GENERIC_L031F6PX INTERFACE - "SHELL:-DSTM32L031xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L031xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -83755,15 +83895,15 @@ target_compile_options(GENERIC_L031F6PX_serial_none INTERFACE ) add_library(GENERIC_L031F6PX_usb_CDC INTERFACE) target_compile_options(GENERIC_L031F6PX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L031F6PX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L031F6PX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L031F6PX_usb_HID INTERFACE) target_compile_options(GENERIC_L031F6PX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L031F6PX_usb_none INTERFACE) target_compile_options(GENERIC_L031F6PX_usb_none INTERFACE @@ -83780,7 +83920,7 @@ set(GENERIC_L031G4UX_MCU cortex-m0plus) set(GENERIC_L031G4UX_FPCONF "-") add_library(GENERIC_L031G4UX INTERFACE) target_compile_options(GENERIC_L031G4UX INTERFACE - "SHELL:-DSTM32L031xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L031xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -83825,15 +83965,15 @@ target_compile_options(GENERIC_L031G4UX_serial_none INTERFACE ) add_library(GENERIC_L031G4UX_usb_CDC INTERFACE) target_compile_options(GENERIC_L031G4UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L031G4UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L031G4UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L031G4UX_usb_HID INTERFACE) target_compile_options(GENERIC_L031G4UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L031G4UX_usb_none INTERFACE) target_compile_options(GENERIC_L031G4UX_usb_none INTERFACE @@ -83850,7 +83990,7 @@ set(GENERIC_L031G6UX_MCU cortex-m0plus) set(GENERIC_L031G6UX_FPCONF "-") add_library(GENERIC_L031G6UX INTERFACE) target_compile_options(GENERIC_L031G6UX INTERFACE - "SHELL:-DSTM32L031xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L031xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -83895,15 +84035,15 @@ target_compile_options(GENERIC_L031G6UX_serial_none INTERFACE ) add_library(GENERIC_L031G6UX_usb_CDC INTERFACE) target_compile_options(GENERIC_L031G6UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L031G6UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L031G6UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L031G6UX_usb_HID INTERFACE) target_compile_options(GENERIC_L031G6UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L031G6UX_usb_none INTERFACE) target_compile_options(GENERIC_L031G6UX_usb_none INTERFACE @@ -83920,7 +84060,7 @@ set(GENERIC_L031K4TX_MCU cortex-m0plus) set(GENERIC_L031K4TX_FPCONF "-") add_library(GENERIC_L031K4TX INTERFACE) target_compile_options(GENERIC_L031K4TX INTERFACE - "SHELL:-DSTM32L031xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L031xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -83965,15 +84105,15 @@ target_compile_options(GENERIC_L031K4TX_serial_none INTERFACE ) add_library(GENERIC_L031K4TX_usb_CDC INTERFACE) target_compile_options(GENERIC_L031K4TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L031K4TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L031K4TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L031K4TX_usb_HID INTERFACE) target_compile_options(GENERIC_L031K4TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L031K4TX_usb_none INTERFACE) target_compile_options(GENERIC_L031K4TX_usb_none INTERFACE @@ -83990,7 +84130,7 @@ set(GENERIC_L031K6TX_MCU cortex-m0plus) set(GENERIC_L031K6TX_FPCONF "-") add_library(GENERIC_L031K6TX INTERFACE) target_compile_options(GENERIC_L031K6TX INTERFACE - "SHELL:-DSTM32L031xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L031xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -84035,15 +84175,15 @@ target_compile_options(GENERIC_L031K6TX_serial_none INTERFACE ) add_library(GENERIC_L031K6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_L031K6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L031K6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L031K6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L031K6TX_usb_HID INTERFACE) target_compile_options(GENERIC_L031K6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L031K6TX_usb_none INTERFACE) target_compile_options(GENERIC_L031K6TX_usb_none INTERFACE @@ -84060,7 +84200,7 @@ set(GENERIC_L041C4TX_MCU cortex-m0plus) set(GENERIC_L041C4TX_FPCONF "-") add_library(GENERIC_L041C4TX INTERFACE) target_compile_options(GENERIC_L041C4TX INTERFACE - "SHELL:-DSTM32L041xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L041xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -84105,15 +84245,15 @@ target_compile_options(GENERIC_L041C4TX_serial_none INTERFACE ) add_library(GENERIC_L041C4TX_usb_CDC INTERFACE) target_compile_options(GENERIC_L041C4TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L041C4TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L041C4TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L041C4TX_usb_HID INTERFACE) target_compile_options(GENERIC_L041C4TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L041C4TX_usb_none INTERFACE) target_compile_options(GENERIC_L041C4TX_usb_none INTERFACE @@ -84130,7 +84270,7 @@ set(GENERIC_L041C6TX_MCU cortex-m0plus) set(GENERIC_L041C6TX_FPCONF "-") add_library(GENERIC_L041C6TX INTERFACE) target_compile_options(GENERIC_L041C6TX INTERFACE - "SHELL:-DSTM32L041xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L041xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -84175,15 +84315,15 @@ target_compile_options(GENERIC_L041C6TX_serial_none INTERFACE ) add_library(GENERIC_L041C6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_L041C6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L041C6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L041C6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L041C6TX_usb_HID INTERFACE) target_compile_options(GENERIC_L041C6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L041C6TX_usb_none INTERFACE) target_compile_options(GENERIC_L041C6TX_usb_none INTERFACE @@ -84200,7 +84340,7 @@ set(GENERIC_L041C6UX_MCU cortex-m0plus) set(GENERIC_L041C6UX_FPCONF "-") add_library(GENERIC_L041C6UX INTERFACE) target_compile_options(GENERIC_L041C6UX INTERFACE - "SHELL:-DSTM32L041xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L041xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -84245,15 +84385,15 @@ target_compile_options(GENERIC_L041C6UX_serial_none INTERFACE ) add_library(GENERIC_L041C6UX_usb_CDC INTERFACE) target_compile_options(GENERIC_L041C6UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L041C6UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L041C6UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L041C6UX_usb_HID INTERFACE) target_compile_options(GENERIC_L041C6UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L041C6UX_usb_none INTERFACE) target_compile_options(GENERIC_L041C6UX_usb_none INTERFACE @@ -84270,7 +84410,7 @@ set(GENERIC_L041E6YX_MCU cortex-m0plus) set(GENERIC_L041E6YX_FPCONF "-") add_library(GENERIC_L041E6YX INTERFACE) target_compile_options(GENERIC_L041E6YX INTERFACE - "SHELL:-DSTM32L041xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L041xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -84315,15 +84455,15 @@ target_compile_options(GENERIC_L041E6YX_serial_none INTERFACE ) add_library(GENERIC_L041E6YX_usb_CDC INTERFACE) target_compile_options(GENERIC_L041E6YX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L041E6YX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L041E6YX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L041E6YX_usb_HID INTERFACE) target_compile_options(GENERIC_L041E6YX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L041E6YX_usb_none INTERFACE) target_compile_options(GENERIC_L041E6YX_usb_none INTERFACE @@ -84340,7 +84480,7 @@ set(GENERIC_L041F6PX_MCU cortex-m0plus) set(GENERIC_L041F6PX_FPCONF "-") add_library(GENERIC_L041F6PX INTERFACE) target_compile_options(GENERIC_L041F6PX INTERFACE - "SHELL:-DSTM32L041xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L041xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -84385,15 +84525,15 @@ target_compile_options(GENERIC_L041F6PX_serial_none INTERFACE ) add_library(GENERIC_L041F6PX_usb_CDC INTERFACE) target_compile_options(GENERIC_L041F6PX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L041F6PX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L041F6PX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L041F6PX_usb_HID INTERFACE) target_compile_options(GENERIC_L041F6PX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L041F6PX_usb_none INTERFACE) target_compile_options(GENERIC_L041F6PX_usb_none INTERFACE @@ -84410,7 +84550,7 @@ set(GENERIC_L041G6UX_MCU cortex-m0plus) set(GENERIC_L041G6UX_FPCONF "-") add_library(GENERIC_L041G6UX INTERFACE) target_compile_options(GENERIC_L041G6UX INTERFACE - "SHELL:-DSTM32L041xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L041xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -84455,15 +84595,15 @@ target_compile_options(GENERIC_L041G6UX_serial_none INTERFACE ) add_library(GENERIC_L041G6UX_usb_CDC INTERFACE) target_compile_options(GENERIC_L041G6UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L041G6UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L041G6UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L041G6UX_usb_HID INTERFACE) target_compile_options(GENERIC_L041G6UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L041G6UX_usb_none INTERFACE) target_compile_options(GENERIC_L041G6UX_usb_none INTERFACE @@ -84480,7 +84620,7 @@ set(GENERIC_L041K6TX_MCU cortex-m0plus) set(GENERIC_L041K6TX_FPCONF "-") add_library(GENERIC_L041K6TX INTERFACE) target_compile_options(GENERIC_L041K6TX INTERFACE - "SHELL:-DSTM32L041xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L041xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -84525,15 +84665,15 @@ target_compile_options(GENERIC_L041K6TX_serial_none INTERFACE ) add_library(GENERIC_L041K6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_L041K6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L041K6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L041K6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L041K6TX_usb_HID INTERFACE) target_compile_options(GENERIC_L041K6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L041K6TX_usb_none INTERFACE) target_compile_options(GENERIC_L041K6TX_usb_none INTERFACE @@ -84550,7 +84690,7 @@ set(GENERIC_L051C6TX_MCU cortex-m0plus) set(GENERIC_L051C6TX_FPCONF "-") add_library(GENERIC_L051C6TX INTERFACE) target_compile_options(GENERIC_L051C6TX INTERFACE - "SHELL:-DSTM32L051xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L051xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -84595,15 +84735,15 @@ target_compile_options(GENERIC_L051C6TX_serial_none INTERFACE ) add_library(GENERIC_L051C6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_L051C6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L051C6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L051C6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L051C6TX_usb_HID INTERFACE) target_compile_options(GENERIC_L051C6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L051C6TX_usb_none INTERFACE) target_compile_options(GENERIC_L051C6TX_usb_none INTERFACE @@ -84620,7 +84760,7 @@ set(GENERIC_L051C6UX_MCU cortex-m0plus) set(GENERIC_L051C6UX_FPCONF "-") add_library(GENERIC_L051C6UX INTERFACE) target_compile_options(GENERIC_L051C6UX INTERFACE - "SHELL:-DSTM32L051xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L051xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -84665,15 +84805,15 @@ target_compile_options(GENERIC_L051C6UX_serial_none INTERFACE ) add_library(GENERIC_L051C6UX_usb_CDC INTERFACE) target_compile_options(GENERIC_L051C6UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L051C6UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L051C6UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L051C6UX_usb_HID INTERFACE) target_compile_options(GENERIC_L051C6UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L051C6UX_usb_none INTERFACE) target_compile_options(GENERIC_L051C6UX_usb_none INTERFACE @@ -84690,7 +84830,7 @@ set(GENERIC_L051C8TX_MCU cortex-m0plus) set(GENERIC_L051C8TX_FPCONF "-") add_library(GENERIC_L051C8TX INTERFACE) target_compile_options(GENERIC_L051C8TX INTERFACE - "SHELL:-DSTM32L051xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L051xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -84735,15 +84875,15 @@ target_compile_options(GENERIC_L051C8TX_serial_none INTERFACE ) add_library(GENERIC_L051C8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_L051C8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L051C8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L051C8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L051C8TX_usb_HID INTERFACE) target_compile_options(GENERIC_L051C8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L051C8TX_usb_none INTERFACE) target_compile_options(GENERIC_L051C8TX_usb_none INTERFACE @@ -84760,7 +84900,7 @@ set(GENERIC_L051C8UX_MCU cortex-m0plus) set(GENERIC_L051C8UX_FPCONF "-") add_library(GENERIC_L051C8UX INTERFACE) target_compile_options(GENERIC_L051C8UX INTERFACE - "SHELL:-DSTM32L051xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L051xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -84805,15 +84945,15 @@ target_compile_options(GENERIC_L051C8UX_serial_none INTERFACE ) add_library(GENERIC_L051C8UX_usb_CDC INTERFACE) target_compile_options(GENERIC_L051C8UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L051C8UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L051C8UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L051C8UX_usb_HID INTERFACE) target_compile_options(GENERIC_L051C8UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L051C8UX_usb_none INTERFACE) target_compile_options(GENERIC_L051C8UX_usb_none INTERFACE @@ -84830,7 +84970,7 @@ set(GENERIC_L051K6TX_MCU cortex-m0plus) set(GENERIC_L051K6TX_FPCONF "-") add_library(GENERIC_L051K6TX INTERFACE) target_compile_options(GENERIC_L051K6TX INTERFACE - "SHELL:-DSTM32L051xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L051xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -84875,15 +85015,15 @@ target_compile_options(GENERIC_L051K6TX_serial_none INTERFACE ) add_library(GENERIC_L051K6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_L051K6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L051K6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L051K6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L051K6TX_usb_HID INTERFACE) target_compile_options(GENERIC_L051K6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L051K6TX_usb_none INTERFACE) target_compile_options(GENERIC_L051K6TX_usb_none INTERFACE @@ -84900,7 +85040,7 @@ set(GENERIC_L051K6UX_MCU cortex-m0plus) set(GENERIC_L051K6UX_FPCONF "-") add_library(GENERIC_L051K6UX INTERFACE) target_compile_options(GENERIC_L051K6UX INTERFACE - "SHELL:-DSTM32L051xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L051xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -84945,15 +85085,15 @@ target_compile_options(GENERIC_L051K6UX_serial_none INTERFACE ) add_library(GENERIC_L051K6UX_usb_CDC INTERFACE) target_compile_options(GENERIC_L051K6UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L051K6UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L051K6UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L051K6UX_usb_HID INTERFACE) target_compile_options(GENERIC_L051K6UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L051K6UX_usb_none INTERFACE) target_compile_options(GENERIC_L051K6UX_usb_none INTERFACE @@ -84970,7 +85110,7 @@ set(GENERIC_L051K8TX_MCU cortex-m0plus) set(GENERIC_L051K8TX_FPCONF "-") add_library(GENERIC_L051K8TX INTERFACE) target_compile_options(GENERIC_L051K8TX INTERFACE - "SHELL:-DSTM32L051xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L051xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -85015,15 +85155,15 @@ target_compile_options(GENERIC_L051K8TX_serial_none INTERFACE ) add_library(GENERIC_L051K8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_L051K8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L051K8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L051K8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L051K8TX_usb_HID INTERFACE) target_compile_options(GENERIC_L051K8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L051K8TX_usb_none INTERFACE) target_compile_options(GENERIC_L051K8TX_usb_none INTERFACE @@ -85040,7 +85180,7 @@ set(GENERIC_L051K8UX_MCU cortex-m0plus) set(GENERIC_L051K8UX_FPCONF "-") add_library(GENERIC_L051K8UX INTERFACE) target_compile_options(GENERIC_L051K8UX INTERFACE - "SHELL:-DSTM32L051xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L051xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -85085,15 +85225,15 @@ target_compile_options(GENERIC_L051K8UX_serial_none INTERFACE ) add_library(GENERIC_L051K8UX_usb_CDC INTERFACE) target_compile_options(GENERIC_L051K8UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L051K8UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L051K8UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L051K8UX_usb_HID INTERFACE) target_compile_options(GENERIC_L051K8UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L051K8UX_usb_none INTERFACE) target_compile_options(GENERIC_L051K8UX_usb_none INTERFACE @@ -85110,7 +85250,7 @@ set(GENERIC_L052C6TX_MCU cortex-m0plus) set(GENERIC_L052C6TX_FPCONF "-") add_library(GENERIC_L052C6TX INTERFACE) target_compile_options(GENERIC_L052C6TX INTERFACE - "SHELL:-DSTM32L052xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L052xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -85155,15 +85295,15 @@ target_compile_options(GENERIC_L052C6TX_serial_none INTERFACE ) add_library(GENERIC_L052C6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_L052C6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L052C6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L052C6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L052C6TX_usb_HID INTERFACE) target_compile_options(GENERIC_L052C6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L052C6TX_usb_none INTERFACE) target_compile_options(GENERIC_L052C6TX_usb_none INTERFACE @@ -85180,7 +85320,7 @@ set(GENERIC_L052C6UX_MCU cortex-m0plus) set(GENERIC_L052C6UX_FPCONF "-") add_library(GENERIC_L052C6UX INTERFACE) target_compile_options(GENERIC_L052C6UX INTERFACE - "SHELL:-DSTM32L052xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L052xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -85225,15 +85365,15 @@ target_compile_options(GENERIC_L052C6UX_serial_none INTERFACE ) add_library(GENERIC_L052C6UX_usb_CDC INTERFACE) target_compile_options(GENERIC_L052C6UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L052C6UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L052C6UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L052C6UX_usb_HID INTERFACE) target_compile_options(GENERIC_L052C6UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L052C6UX_usb_none INTERFACE) target_compile_options(GENERIC_L052C6UX_usb_none INTERFACE @@ -85250,7 +85390,7 @@ set(GENERIC_L052C8TX_MCU cortex-m0plus) set(GENERIC_L052C8TX_FPCONF "-") add_library(GENERIC_L052C8TX INTERFACE) target_compile_options(GENERIC_L052C8TX INTERFACE - "SHELL:-DSTM32L052xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L052xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -85295,15 +85435,15 @@ target_compile_options(GENERIC_L052C8TX_serial_none INTERFACE ) add_library(GENERIC_L052C8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_L052C8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L052C8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L052C8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L052C8TX_usb_HID INTERFACE) target_compile_options(GENERIC_L052C8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L052C8TX_usb_none INTERFACE) target_compile_options(GENERIC_L052C8TX_usb_none INTERFACE @@ -85320,7 +85460,7 @@ set(GENERIC_L052C8UX_MCU cortex-m0plus) set(GENERIC_L052C8UX_FPCONF "-") add_library(GENERIC_L052C8UX INTERFACE) target_compile_options(GENERIC_L052C8UX INTERFACE - "SHELL:-DSTM32L052xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L052xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -85365,15 +85505,15 @@ target_compile_options(GENERIC_L052C8UX_serial_none INTERFACE ) add_library(GENERIC_L052C8UX_usb_CDC INTERFACE) target_compile_options(GENERIC_L052C8UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L052C8UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L052C8UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L052C8UX_usb_HID INTERFACE) target_compile_options(GENERIC_L052C8UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L052C8UX_usb_none INTERFACE) target_compile_options(GENERIC_L052C8UX_usb_none INTERFACE @@ -85390,7 +85530,7 @@ set(GENERIC_L052K6TX_MCU cortex-m0plus) set(GENERIC_L052K6TX_FPCONF "-") add_library(GENERIC_L052K6TX INTERFACE) target_compile_options(GENERIC_L052K6TX INTERFACE - "SHELL:-DSTM32L052xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L052xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -85435,15 +85575,15 @@ target_compile_options(GENERIC_L052K6TX_serial_none INTERFACE ) add_library(GENERIC_L052K6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_L052K6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L052K6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L052K6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L052K6TX_usb_HID INTERFACE) target_compile_options(GENERIC_L052K6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L052K6TX_usb_none INTERFACE) target_compile_options(GENERIC_L052K6TX_usb_none INTERFACE @@ -85460,7 +85600,7 @@ set(GENERIC_L052K8TX_MCU cortex-m0plus) set(GENERIC_L052K8TX_FPCONF "-") add_library(GENERIC_L052K8TX INTERFACE) target_compile_options(GENERIC_L052K8TX INTERFACE - "SHELL:-DSTM32L052xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L052xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -85505,15 +85645,15 @@ target_compile_options(GENERIC_L052K8TX_serial_none INTERFACE ) add_library(GENERIC_L052K8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_L052K8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L052K8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L052K8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L052K8TX_usb_HID INTERFACE) target_compile_options(GENERIC_L052K8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L052K8TX_usb_none INTERFACE) target_compile_options(GENERIC_L052K8TX_usb_none INTERFACE @@ -85530,7 +85670,7 @@ set(GENERIC_L052R6HX_MCU cortex-m0plus) set(GENERIC_L052R6HX_FPCONF "-") add_library(GENERIC_L052R6HX INTERFACE) target_compile_options(GENERIC_L052R6HX INTERFACE - "SHELL:-DSTM32L052xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L052xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -85575,15 +85715,15 @@ target_compile_options(GENERIC_L052R6HX_serial_none INTERFACE ) add_library(GENERIC_L052R6HX_usb_CDC INTERFACE) target_compile_options(GENERIC_L052R6HX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L052R6HX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L052R6HX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L052R6HX_usb_HID INTERFACE) target_compile_options(GENERIC_L052R6HX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L052R6HX_usb_none INTERFACE) target_compile_options(GENERIC_L052R6HX_usb_none INTERFACE @@ -85600,7 +85740,7 @@ set(GENERIC_L052R6TX_MCU cortex-m0plus) set(GENERIC_L052R6TX_FPCONF "-") add_library(GENERIC_L052R6TX INTERFACE) target_compile_options(GENERIC_L052R6TX INTERFACE - "SHELL:-DSTM32L052xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L052xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -85645,15 +85785,15 @@ target_compile_options(GENERIC_L052R6TX_serial_none INTERFACE ) add_library(GENERIC_L052R6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_L052R6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L052R6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L052R6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L052R6TX_usb_HID INTERFACE) target_compile_options(GENERIC_L052R6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L052R6TX_usb_none INTERFACE) target_compile_options(GENERIC_L052R6TX_usb_none INTERFACE @@ -85670,7 +85810,7 @@ set(GENERIC_L052R8HX_MCU cortex-m0plus) set(GENERIC_L052R8HX_FPCONF "-") add_library(GENERIC_L052R8HX INTERFACE) target_compile_options(GENERIC_L052R8HX INTERFACE - "SHELL:-DSTM32L052xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L052xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -85715,15 +85855,15 @@ target_compile_options(GENERIC_L052R8HX_serial_none INTERFACE ) add_library(GENERIC_L052R8HX_usb_CDC INTERFACE) target_compile_options(GENERIC_L052R8HX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L052R8HX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L052R8HX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L052R8HX_usb_HID INTERFACE) target_compile_options(GENERIC_L052R8HX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L052R8HX_usb_none INTERFACE) target_compile_options(GENERIC_L052R8HX_usb_none INTERFACE @@ -85740,7 +85880,7 @@ set(GENERIC_L052R8TX_MCU cortex-m0plus) set(GENERIC_L052R8TX_FPCONF "-") add_library(GENERIC_L052R8TX INTERFACE) target_compile_options(GENERIC_L052R8TX INTERFACE - "SHELL:-DSTM32L052xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L052xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -85785,15 +85925,15 @@ target_compile_options(GENERIC_L052R8TX_serial_none INTERFACE ) add_library(GENERIC_L052R8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_L052R8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L052R8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L052R8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L052R8TX_usb_HID INTERFACE) target_compile_options(GENERIC_L052R8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L052R8TX_usb_none INTERFACE) target_compile_options(GENERIC_L052R8TX_usb_none INTERFACE @@ -85810,7 +85950,7 @@ set(GENERIC_L052T6YX_MCU cortex-m0plus) set(GENERIC_L052T6YX_FPCONF "-") add_library(GENERIC_L052T6YX INTERFACE) target_compile_options(GENERIC_L052T6YX INTERFACE - "SHELL:-DSTM32L052xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L052xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -85855,15 +85995,15 @@ target_compile_options(GENERIC_L052T6YX_serial_none INTERFACE ) add_library(GENERIC_L052T6YX_usb_CDC INTERFACE) target_compile_options(GENERIC_L052T6YX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L052T6YX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L052T6YX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L052T6YX_usb_HID INTERFACE) target_compile_options(GENERIC_L052T6YX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L052T6YX_usb_none INTERFACE) target_compile_options(GENERIC_L052T6YX_usb_none INTERFACE @@ -85880,7 +86020,7 @@ set(GENERIC_L052T8FX_MCU cortex-m0plus) set(GENERIC_L052T8FX_FPCONF "-") add_library(GENERIC_L052T8FX INTERFACE) target_compile_options(GENERIC_L052T8FX INTERFACE - "SHELL:-DSTM32L052xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L052xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -85925,15 +86065,15 @@ target_compile_options(GENERIC_L052T8FX_serial_none INTERFACE ) add_library(GENERIC_L052T8FX_usb_CDC INTERFACE) target_compile_options(GENERIC_L052T8FX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L052T8FX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L052T8FX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L052T8FX_usb_HID INTERFACE) target_compile_options(GENERIC_L052T8FX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L052T8FX_usb_none INTERFACE) target_compile_options(GENERIC_L052T8FX_usb_none INTERFACE @@ -85950,7 +86090,7 @@ set(GENERIC_L052T8YX_MCU cortex-m0plus) set(GENERIC_L052T8YX_FPCONF "-") add_library(GENERIC_L052T8YX INTERFACE) target_compile_options(GENERIC_L052T8YX INTERFACE - "SHELL:-DSTM32L052xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L052xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -85995,15 +86135,15 @@ target_compile_options(GENERIC_L052T8YX_serial_none INTERFACE ) add_library(GENERIC_L052T8YX_usb_CDC INTERFACE) target_compile_options(GENERIC_L052T8YX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L052T8YX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L052T8YX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L052T8YX_usb_HID INTERFACE) target_compile_options(GENERIC_L052T8YX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L052T8YX_usb_none INTERFACE) target_compile_options(GENERIC_L052T8YX_usb_none INTERFACE @@ -86020,7 +86160,7 @@ set(GENERIC_L053C6TX_MCU cortex-m0plus) set(GENERIC_L053C6TX_FPCONF "-") add_library(GENERIC_L053C6TX INTERFACE) target_compile_options(GENERIC_L053C6TX INTERFACE - "SHELL:-DSTM32L053xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L053xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -86065,15 +86205,15 @@ target_compile_options(GENERIC_L053C6TX_serial_none INTERFACE ) add_library(GENERIC_L053C6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_L053C6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L053C6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L053C6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L053C6TX_usb_HID INTERFACE) target_compile_options(GENERIC_L053C6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L053C6TX_usb_none INTERFACE) target_compile_options(GENERIC_L053C6TX_usb_none INTERFACE @@ -86090,7 +86230,7 @@ set(GENERIC_L053C6UX_MCU cortex-m0plus) set(GENERIC_L053C6UX_FPCONF "-") add_library(GENERIC_L053C6UX INTERFACE) target_compile_options(GENERIC_L053C6UX INTERFACE - "SHELL:-DSTM32L053xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L053xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -86135,15 +86275,15 @@ target_compile_options(GENERIC_L053C6UX_serial_none INTERFACE ) add_library(GENERIC_L053C6UX_usb_CDC INTERFACE) target_compile_options(GENERIC_L053C6UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L053C6UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L053C6UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L053C6UX_usb_HID INTERFACE) target_compile_options(GENERIC_L053C6UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L053C6UX_usb_none INTERFACE) target_compile_options(GENERIC_L053C6UX_usb_none INTERFACE @@ -86160,7 +86300,7 @@ set(GENERIC_L053C8TX_MCU cortex-m0plus) set(GENERIC_L053C8TX_FPCONF "-") add_library(GENERIC_L053C8TX INTERFACE) target_compile_options(GENERIC_L053C8TX INTERFACE - "SHELL:-DSTM32L053xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L053xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -86205,15 +86345,15 @@ target_compile_options(GENERIC_L053C8TX_serial_none INTERFACE ) add_library(GENERIC_L053C8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_L053C8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L053C8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L053C8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L053C8TX_usb_HID INTERFACE) target_compile_options(GENERIC_L053C8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L053C8TX_usb_none INTERFACE) target_compile_options(GENERIC_L053C8TX_usb_none INTERFACE @@ -86230,7 +86370,7 @@ set(GENERIC_L053C8UX_MCU cortex-m0plus) set(GENERIC_L053C8UX_FPCONF "-") add_library(GENERIC_L053C8UX INTERFACE) target_compile_options(GENERIC_L053C8UX INTERFACE - "SHELL:-DSTM32L053xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L053xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -86275,15 +86415,15 @@ target_compile_options(GENERIC_L053C8UX_serial_none INTERFACE ) add_library(GENERIC_L053C8UX_usb_CDC INTERFACE) target_compile_options(GENERIC_L053C8UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L053C8UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L053C8UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L053C8UX_usb_HID INTERFACE) target_compile_options(GENERIC_L053C8UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L053C8UX_usb_none INTERFACE) target_compile_options(GENERIC_L053C8UX_usb_none INTERFACE @@ -86300,7 +86440,7 @@ set(GENERIC_L053R6HX_MCU cortex-m0plus) set(GENERIC_L053R6HX_FPCONF "-") add_library(GENERIC_L053R6HX INTERFACE) target_compile_options(GENERIC_L053R6HX INTERFACE - "SHELL:-DSTM32L053xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L053xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -86345,15 +86485,15 @@ target_compile_options(GENERIC_L053R6HX_serial_none INTERFACE ) add_library(GENERIC_L053R6HX_usb_CDC INTERFACE) target_compile_options(GENERIC_L053R6HX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L053R6HX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L053R6HX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L053R6HX_usb_HID INTERFACE) target_compile_options(GENERIC_L053R6HX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L053R6HX_usb_none INTERFACE) target_compile_options(GENERIC_L053R6HX_usb_none INTERFACE @@ -86370,7 +86510,7 @@ set(GENERIC_L053R6TX_MCU cortex-m0plus) set(GENERIC_L053R6TX_FPCONF "-") add_library(GENERIC_L053R6TX INTERFACE) target_compile_options(GENERIC_L053R6TX INTERFACE - "SHELL:-DSTM32L053xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L053xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -86415,15 +86555,15 @@ target_compile_options(GENERIC_L053R6TX_serial_none INTERFACE ) add_library(GENERIC_L053R6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_L053R6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L053R6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L053R6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L053R6TX_usb_HID INTERFACE) target_compile_options(GENERIC_L053R6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L053R6TX_usb_none INTERFACE) target_compile_options(GENERIC_L053R6TX_usb_none INTERFACE @@ -86440,7 +86580,7 @@ set(GENERIC_L053R8HX_MCU cortex-m0plus) set(GENERIC_L053R8HX_FPCONF "-") add_library(GENERIC_L053R8HX INTERFACE) target_compile_options(GENERIC_L053R8HX INTERFACE - "SHELL:-DSTM32L053xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L053xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -86485,15 +86625,15 @@ target_compile_options(GENERIC_L053R8HX_serial_none INTERFACE ) add_library(GENERIC_L053R8HX_usb_CDC INTERFACE) target_compile_options(GENERIC_L053R8HX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L053R8HX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L053R8HX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L053R8HX_usb_HID INTERFACE) target_compile_options(GENERIC_L053R8HX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L053R8HX_usb_none INTERFACE) target_compile_options(GENERIC_L053R8HX_usb_none INTERFACE @@ -86510,7 +86650,7 @@ set(GENERIC_L053R8TX_MCU cortex-m0plus) set(GENERIC_L053R8TX_FPCONF "-") add_library(GENERIC_L053R8TX INTERFACE) target_compile_options(GENERIC_L053R8TX INTERFACE - "SHELL:-DSTM32L053xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L053xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -86555,15 +86695,15 @@ target_compile_options(GENERIC_L053R8TX_serial_none INTERFACE ) add_library(GENERIC_L053R8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_L053R8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L053R8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L053R8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L053R8TX_usb_HID INTERFACE) target_compile_options(GENERIC_L053R8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L053R8TX_usb_none INTERFACE) target_compile_options(GENERIC_L053R8TX_usb_none INTERFACE @@ -86580,7 +86720,7 @@ set(GENERIC_L062C8UX_MCU cortex-m0plus) set(GENERIC_L062C8UX_FPCONF "-") add_library(GENERIC_L062C8UX INTERFACE) target_compile_options(GENERIC_L062C8UX INTERFACE - "SHELL:-DSTM32L062xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L062xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -86625,15 +86765,15 @@ target_compile_options(GENERIC_L062C8UX_serial_none INTERFACE ) add_library(GENERIC_L062C8UX_usb_CDC INTERFACE) target_compile_options(GENERIC_L062C8UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L062C8UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L062C8UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L062C8UX_usb_HID INTERFACE) target_compile_options(GENERIC_L062C8UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L062C8UX_usb_none INTERFACE) target_compile_options(GENERIC_L062C8UX_usb_none INTERFACE @@ -86650,7 +86790,7 @@ set(GENERIC_L062K8TX_MCU cortex-m0plus) set(GENERIC_L062K8TX_FPCONF "-") add_library(GENERIC_L062K8TX INTERFACE) target_compile_options(GENERIC_L062K8TX INTERFACE - "SHELL:-DSTM32L062xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L062xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -86695,15 +86835,15 @@ target_compile_options(GENERIC_L062K8TX_serial_none INTERFACE ) add_library(GENERIC_L062K8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_L062K8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L062K8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L062K8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L062K8TX_usb_HID INTERFACE) target_compile_options(GENERIC_L062K8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L062K8TX_usb_none INTERFACE) target_compile_options(GENERIC_L062K8TX_usb_none INTERFACE @@ -86720,7 +86860,7 @@ set(GENERIC_L063C8TX_MCU cortex-m0plus) set(GENERIC_L063C8TX_FPCONF "-") add_library(GENERIC_L063C8TX INTERFACE) target_compile_options(GENERIC_L063C8TX INTERFACE - "SHELL:-DSTM32L063xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L063xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -86765,15 +86905,15 @@ target_compile_options(GENERIC_L063C8TX_serial_none INTERFACE ) add_library(GENERIC_L063C8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_L063C8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L063C8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L063C8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L063C8TX_usb_HID INTERFACE) target_compile_options(GENERIC_L063C8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L063C8TX_usb_none INTERFACE) target_compile_options(GENERIC_L063C8TX_usb_none INTERFACE @@ -86790,7 +86930,7 @@ set(GENERIC_L063C8UX_MCU cortex-m0plus) set(GENERIC_L063C8UX_FPCONF "-") add_library(GENERIC_L063C8UX INTERFACE) target_compile_options(GENERIC_L063C8UX INTERFACE - "SHELL:-DSTM32L063xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L063xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -86835,15 +86975,15 @@ target_compile_options(GENERIC_L063C8UX_serial_none INTERFACE ) add_library(GENERIC_L063C8UX_usb_CDC INTERFACE) target_compile_options(GENERIC_L063C8UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L063C8UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L063C8UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L063C8UX_usb_HID INTERFACE) target_compile_options(GENERIC_L063C8UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L063C8UX_usb_none INTERFACE) target_compile_options(GENERIC_L063C8UX_usb_none INTERFACE @@ -86860,7 +87000,7 @@ set(GENERIC_L063R8TX_MCU cortex-m0plus) set(GENERIC_L063R8TX_FPCONF "-") add_library(GENERIC_L063R8TX INTERFACE) target_compile_options(GENERIC_L063R8TX INTERFACE - "SHELL:-DSTM32L063xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L063xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -86905,15 +87045,15 @@ target_compile_options(GENERIC_L063R8TX_serial_none INTERFACE ) add_library(GENERIC_L063R8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_L063R8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L063R8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L063R8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L063R8TX_usb_HID INTERFACE) target_compile_options(GENERIC_L063R8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L063R8TX_usb_none INTERFACE) target_compile_options(GENERIC_L063R8TX_usb_none INTERFACE @@ -86930,7 +87070,7 @@ set(GENERIC_L072CBTX_MCU cortex-m0plus) set(GENERIC_L072CBTX_FPCONF "-") add_library(GENERIC_L072CBTX INTERFACE) target_compile_options(GENERIC_L072CBTX INTERFACE - "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -86975,15 +87115,15 @@ target_compile_options(GENERIC_L072CBTX_serial_none INTERFACE ) add_library(GENERIC_L072CBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L072CBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L072CBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L072CBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L072CBTX_usb_HID INTERFACE) target_compile_options(GENERIC_L072CBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L072CBTX_usb_none INTERFACE) target_compile_options(GENERIC_L072CBTX_usb_none INTERFACE @@ -87000,7 +87140,7 @@ set(GENERIC_L072CBUX_MCU cortex-m0plus) set(GENERIC_L072CBUX_FPCONF "-") add_library(GENERIC_L072CBUX INTERFACE) target_compile_options(GENERIC_L072CBUX INTERFACE - "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -87045,15 +87185,15 @@ target_compile_options(GENERIC_L072CBUX_serial_none INTERFACE ) add_library(GENERIC_L072CBUX_usb_CDC INTERFACE) target_compile_options(GENERIC_L072CBUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L072CBUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L072CBUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L072CBUX_usb_HID INTERFACE) target_compile_options(GENERIC_L072CBUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L072CBUX_usb_none INTERFACE) target_compile_options(GENERIC_L072CBUX_usb_none INTERFACE @@ -87070,7 +87210,7 @@ set(GENERIC_L072CBYX_MCU cortex-m0plus) set(GENERIC_L072CBYX_FPCONF "-") add_library(GENERIC_L072CBYX INTERFACE) target_compile_options(GENERIC_L072CBYX INTERFACE - "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -87115,15 +87255,15 @@ target_compile_options(GENERIC_L072CBYX_serial_none INTERFACE ) add_library(GENERIC_L072CBYX_usb_CDC INTERFACE) target_compile_options(GENERIC_L072CBYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L072CBYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L072CBYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L072CBYX_usb_HID INTERFACE) target_compile_options(GENERIC_L072CBYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L072CBYX_usb_none INTERFACE) target_compile_options(GENERIC_L072CBYX_usb_none INTERFACE @@ -87140,7 +87280,7 @@ set(GENERIC_L072CZEX_MCU cortex-m0plus) set(GENERIC_L072CZEX_FPCONF "-") add_library(GENERIC_L072CZEX INTERFACE) target_compile_options(GENERIC_L072CZEX INTERFACE - "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -87185,15 +87325,15 @@ target_compile_options(GENERIC_L072CZEX_serial_none INTERFACE ) add_library(GENERIC_L072CZEX_usb_CDC INTERFACE) target_compile_options(GENERIC_L072CZEX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L072CZEX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L072CZEX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L072CZEX_usb_HID INTERFACE) target_compile_options(GENERIC_L072CZEX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L072CZEX_usb_none INTERFACE) target_compile_options(GENERIC_L072CZEX_usb_none INTERFACE @@ -87210,7 +87350,7 @@ set(GENERIC_L072CZTX_MCU cortex-m0plus) set(GENERIC_L072CZTX_FPCONF "-") add_library(GENERIC_L072CZTX INTERFACE) target_compile_options(GENERIC_L072CZTX INTERFACE - "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -87255,15 +87395,15 @@ target_compile_options(GENERIC_L072CZTX_serial_none INTERFACE ) add_library(GENERIC_L072CZTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L072CZTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L072CZTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L072CZTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L072CZTX_usb_HID INTERFACE) target_compile_options(GENERIC_L072CZTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L072CZTX_usb_none INTERFACE) target_compile_options(GENERIC_L072CZTX_usb_none INTERFACE @@ -87280,7 +87420,7 @@ set(GENERIC_L072CZUX_MCU cortex-m0plus) set(GENERIC_L072CZUX_FPCONF "-") add_library(GENERIC_L072CZUX INTERFACE) target_compile_options(GENERIC_L072CZUX INTERFACE - "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -87325,15 +87465,15 @@ target_compile_options(GENERIC_L072CZUX_serial_none INTERFACE ) add_library(GENERIC_L072CZUX_usb_CDC INTERFACE) target_compile_options(GENERIC_L072CZUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L072CZUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L072CZUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L072CZUX_usb_HID INTERFACE) target_compile_options(GENERIC_L072CZUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L072CZUX_usb_none INTERFACE) target_compile_options(GENERIC_L072CZUX_usb_none INTERFACE @@ -87350,7 +87490,7 @@ set(GENERIC_L072CZYX_MCU cortex-m0plus) set(GENERIC_L072CZYX_FPCONF "-") add_library(GENERIC_L072CZYX INTERFACE) target_compile_options(GENERIC_L072CZYX INTERFACE - "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -87395,15 +87535,15 @@ target_compile_options(GENERIC_L072CZYX_serial_none INTERFACE ) add_library(GENERIC_L072CZYX_usb_CDC INTERFACE) target_compile_options(GENERIC_L072CZYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L072CZYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L072CZYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L072CZYX_usb_HID INTERFACE) target_compile_options(GENERIC_L072CZYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L072CZYX_usb_none INTERFACE) target_compile_options(GENERIC_L072CZYX_usb_none INTERFACE @@ -87420,7 +87560,7 @@ set(GENERIC_L072KBTX_MCU cortex-m0plus) set(GENERIC_L072KBTX_FPCONF "-") add_library(GENERIC_L072KBTX INTERFACE) target_compile_options(GENERIC_L072KBTX INTERFACE - "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -87465,15 +87605,15 @@ target_compile_options(GENERIC_L072KBTX_serial_none INTERFACE ) add_library(GENERIC_L072KBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L072KBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L072KBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L072KBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L072KBTX_usb_HID INTERFACE) target_compile_options(GENERIC_L072KBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L072KBTX_usb_none INTERFACE) target_compile_options(GENERIC_L072KBTX_usb_none INTERFACE @@ -87490,7 +87630,7 @@ set(GENERIC_L072KBUX_MCU cortex-m0plus) set(GENERIC_L072KBUX_FPCONF "-") add_library(GENERIC_L072KBUX INTERFACE) target_compile_options(GENERIC_L072KBUX INTERFACE - "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -87535,15 +87675,15 @@ target_compile_options(GENERIC_L072KBUX_serial_none INTERFACE ) add_library(GENERIC_L072KBUX_usb_CDC INTERFACE) target_compile_options(GENERIC_L072KBUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L072KBUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L072KBUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L072KBUX_usb_HID INTERFACE) target_compile_options(GENERIC_L072KBUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L072KBUX_usb_none INTERFACE) target_compile_options(GENERIC_L072KBUX_usb_none INTERFACE @@ -87560,7 +87700,7 @@ set(GENERIC_L072KZTX_MCU cortex-m0plus) set(GENERIC_L072KZTX_FPCONF "-") add_library(GENERIC_L072KZTX INTERFACE) target_compile_options(GENERIC_L072KZTX INTERFACE - "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -87605,15 +87745,15 @@ target_compile_options(GENERIC_L072KZTX_serial_none INTERFACE ) add_library(GENERIC_L072KZTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L072KZTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L072KZTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L072KZTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L072KZTX_usb_HID INTERFACE) target_compile_options(GENERIC_L072KZTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L072KZTX_usb_none INTERFACE) target_compile_options(GENERIC_L072KZTX_usb_none INTERFACE @@ -87630,7 +87770,7 @@ set(GENERIC_L072KZUX_MCU cortex-m0plus) set(GENERIC_L072KZUX_FPCONF "-") add_library(GENERIC_L072KZUX INTERFACE) target_compile_options(GENERIC_L072KZUX INTERFACE - "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -87675,15 +87815,15 @@ target_compile_options(GENERIC_L072KZUX_serial_none INTERFACE ) add_library(GENERIC_L072KZUX_usb_CDC INTERFACE) target_compile_options(GENERIC_L072KZUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L072KZUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L072KZUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L072KZUX_usb_HID INTERFACE) target_compile_options(GENERIC_L072KZUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L072KZUX_usb_none INTERFACE) target_compile_options(GENERIC_L072KZUX_usb_none INTERFACE @@ -87700,7 +87840,7 @@ set(GENERIC_L072RBHX_MCU cortex-m0plus) set(GENERIC_L072RBHX_FPCONF "-") add_library(GENERIC_L072RBHX INTERFACE) target_compile_options(GENERIC_L072RBHX INTERFACE - "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -87745,15 +87885,15 @@ target_compile_options(GENERIC_L072RBHX_serial_none INTERFACE ) add_library(GENERIC_L072RBHX_usb_CDC INTERFACE) target_compile_options(GENERIC_L072RBHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L072RBHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L072RBHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L072RBHX_usb_HID INTERFACE) target_compile_options(GENERIC_L072RBHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L072RBHX_usb_none INTERFACE) target_compile_options(GENERIC_L072RBHX_usb_none INTERFACE @@ -87770,7 +87910,7 @@ set(GENERIC_L072RBIX_MCU cortex-m0plus) set(GENERIC_L072RBIX_FPCONF "-") add_library(GENERIC_L072RBIX INTERFACE) target_compile_options(GENERIC_L072RBIX INTERFACE - "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -87815,15 +87955,15 @@ target_compile_options(GENERIC_L072RBIX_serial_none INTERFACE ) add_library(GENERIC_L072RBIX_usb_CDC INTERFACE) target_compile_options(GENERIC_L072RBIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L072RBIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L072RBIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L072RBIX_usb_HID INTERFACE) target_compile_options(GENERIC_L072RBIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L072RBIX_usb_none INTERFACE) target_compile_options(GENERIC_L072RBIX_usb_none INTERFACE @@ -87840,7 +87980,7 @@ set(GENERIC_L072RBTX_MCU cortex-m0plus) set(GENERIC_L072RBTX_FPCONF "-") add_library(GENERIC_L072RBTX INTERFACE) target_compile_options(GENERIC_L072RBTX INTERFACE - "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -87885,15 +88025,15 @@ target_compile_options(GENERIC_L072RBTX_serial_none INTERFACE ) add_library(GENERIC_L072RBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L072RBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L072RBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L072RBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L072RBTX_usb_HID INTERFACE) target_compile_options(GENERIC_L072RBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L072RBTX_usb_none INTERFACE) target_compile_options(GENERIC_L072RBTX_usb_none INTERFACE @@ -87910,7 +88050,7 @@ set(GENERIC_L072RZHX_MCU cortex-m0plus) set(GENERIC_L072RZHX_FPCONF "-") add_library(GENERIC_L072RZHX INTERFACE) target_compile_options(GENERIC_L072RZHX INTERFACE - "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -87955,15 +88095,15 @@ target_compile_options(GENERIC_L072RZHX_serial_none INTERFACE ) add_library(GENERIC_L072RZHX_usb_CDC INTERFACE) target_compile_options(GENERIC_L072RZHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L072RZHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L072RZHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L072RZHX_usb_HID INTERFACE) target_compile_options(GENERIC_L072RZHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L072RZHX_usb_none INTERFACE) target_compile_options(GENERIC_L072RZHX_usb_none INTERFACE @@ -87980,7 +88120,7 @@ set(GENERIC_L072RZIX_MCU cortex-m0plus) set(GENERIC_L072RZIX_FPCONF "-") add_library(GENERIC_L072RZIX INTERFACE) target_compile_options(GENERIC_L072RZIX INTERFACE - "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -88025,15 +88165,15 @@ target_compile_options(GENERIC_L072RZIX_serial_none INTERFACE ) add_library(GENERIC_L072RZIX_usb_CDC INTERFACE) target_compile_options(GENERIC_L072RZIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L072RZIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L072RZIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L072RZIX_usb_HID INTERFACE) target_compile_options(GENERIC_L072RZIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L072RZIX_usb_none INTERFACE) target_compile_options(GENERIC_L072RZIX_usb_none INTERFACE @@ -88050,7 +88190,7 @@ set(GENERIC_L072RZTX_MCU cortex-m0plus) set(GENERIC_L072RZTX_FPCONF "-") add_library(GENERIC_L072RZTX INTERFACE) target_compile_options(GENERIC_L072RZTX INTERFACE - "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -88095,15 +88235,15 @@ target_compile_options(GENERIC_L072RZTX_serial_none INTERFACE ) add_library(GENERIC_L072RZTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L072RZTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L072RZTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L072RZTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L072RZTX_usb_HID INTERFACE) target_compile_options(GENERIC_L072RZTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L072RZTX_usb_none INTERFACE) target_compile_options(GENERIC_L072RZTX_usb_none INTERFACE @@ -88120,7 +88260,7 @@ set(GENERIC_L072V8IX_MCU cortex-m0plus) set(GENERIC_L072V8IX_FPCONF "-") add_library(GENERIC_L072V8IX INTERFACE) target_compile_options(GENERIC_L072V8IX INTERFACE - "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -88165,15 +88305,15 @@ target_compile_options(GENERIC_L072V8IX_serial_none INTERFACE ) add_library(GENERIC_L072V8IX_usb_CDC INTERFACE) target_compile_options(GENERIC_L072V8IX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L072V8IX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L072V8IX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L072V8IX_usb_HID INTERFACE) target_compile_options(GENERIC_L072V8IX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L072V8IX_usb_none INTERFACE) target_compile_options(GENERIC_L072V8IX_usb_none INTERFACE @@ -88190,7 +88330,7 @@ set(GENERIC_L072V8TX_MCU cortex-m0plus) set(GENERIC_L072V8TX_FPCONF "-") add_library(GENERIC_L072V8TX INTERFACE) target_compile_options(GENERIC_L072V8TX INTERFACE - "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -88235,15 +88375,15 @@ target_compile_options(GENERIC_L072V8TX_serial_none INTERFACE ) add_library(GENERIC_L072V8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_L072V8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L072V8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L072V8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L072V8TX_usb_HID INTERFACE) target_compile_options(GENERIC_L072V8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L072V8TX_usb_none INTERFACE) target_compile_options(GENERIC_L072V8TX_usb_none INTERFACE @@ -88260,7 +88400,7 @@ set(GENERIC_L072VBIX_MCU cortex-m0plus) set(GENERIC_L072VBIX_FPCONF "-") add_library(GENERIC_L072VBIX INTERFACE) target_compile_options(GENERIC_L072VBIX INTERFACE - "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -88305,15 +88445,15 @@ target_compile_options(GENERIC_L072VBIX_serial_none INTERFACE ) add_library(GENERIC_L072VBIX_usb_CDC INTERFACE) target_compile_options(GENERIC_L072VBIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L072VBIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L072VBIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L072VBIX_usb_HID INTERFACE) target_compile_options(GENERIC_L072VBIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L072VBIX_usb_none INTERFACE) target_compile_options(GENERIC_L072VBIX_usb_none INTERFACE @@ -88330,7 +88470,7 @@ set(GENERIC_L072VBTX_MCU cortex-m0plus) set(GENERIC_L072VBTX_FPCONF "-") add_library(GENERIC_L072VBTX INTERFACE) target_compile_options(GENERIC_L072VBTX INTERFACE - "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -88375,15 +88515,15 @@ target_compile_options(GENERIC_L072VBTX_serial_none INTERFACE ) add_library(GENERIC_L072VBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L072VBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L072VBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L072VBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L072VBTX_usb_HID INTERFACE) target_compile_options(GENERIC_L072VBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L072VBTX_usb_none INTERFACE) target_compile_options(GENERIC_L072VBTX_usb_none INTERFACE @@ -88400,7 +88540,7 @@ set(GENERIC_L072VZIX_MCU cortex-m0plus) set(GENERIC_L072VZIX_FPCONF "-") add_library(GENERIC_L072VZIX INTERFACE) target_compile_options(GENERIC_L072VZIX INTERFACE - "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -88445,15 +88585,15 @@ target_compile_options(GENERIC_L072VZIX_serial_none INTERFACE ) add_library(GENERIC_L072VZIX_usb_CDC INTERFACE) target_compile_options(GENERIC_L072VZIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L072VZIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L072VZIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L072VZIX_usb_HID INTERFACE) target_compile_options(GENERIC_L072VZIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L072VZIX_usb_none INTERFACE) target_compile_options(GENERIC_L072VZIX_usb_none INTERFACE @@ -88470,7 +88610,7 @@ set(GENERIC_L072VZTX_MCU cortex-m0plus) set(GENERIC_L072VZTX_FPCONF "-") add_library(GENERIC_L072VZTX INTERFACE) target_compile_options(GENERIC_L072VZTX INTERFACE - "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -88515,15 +88655,15 @@ target_compile_options(GENERIC_L072VZTX_serial_none INTERFACE ) add_library(GENERIC_L072VZTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L072VZTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L072VZTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L072VZTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L072VZTX_usb_HID INTERFACE) target_compile_options(GENERIC_L072VZTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L072VZTX_usb_none INTERFACE) target_compile_options(GENERIC_L072VZTX_usb_none INTERFACE @@ -88540,7 +88680,7 @@ set(GENERIC_L073CBTX_MCU cortex-m0plus) set(GENERIC_L073CBTX_FPCONF "-") add_library(GENERIC_L073CBTX INTERFACE) target_compile_options(GENERIC_L073CBTX INTERFACE - "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -88585,15 +88725,15 @@ target_compile_options(GENERIC_L073CBTX_serial_none INTERFACE ) add_library(GENERIC_L073CBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L073CBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L073CBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L073CBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L073CBTX_usb_HID INTERFACE) target_compile_options(GENERIC_L073CBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L073CBTX_usb_none INTERFACE) target_compile_options(GENERIC_L073CBTX_usb_none INTERFACE @@ -88610,7 +88750,7 @@ set(GENERIC_L073CBUX_MCU cortex-m0plus) set(GENERIC_L073CBUX_FPCONF "-") add_library(GENERIC_L073CBUX INTERFACE) target_compile_options(GENERIC_L073CBUX INTERFACE - "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -88655,15 +88795,15 @@ target_compile_options(GENERIC_L073CBUX_serial_none INTERFACE ) add_library(GENERIC_L073CBUX_usb_CDC INTERFACE) target_compile_options(GENERIC_L073CBUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L073CBUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L073CBUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L073CBUX_usb_HID INTERFACE) target_compile_options(GENERIC_L073CBUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L073CBUX_usb_none INTERFACE) target_compile_options(GENERIC_L073CBUX_usb_none INTERFACE @@ -88680,7 +88820,7 @@ set(GENERIC_L073CZTX_MCU cortex-m0plus) set(GENERIC_L073CZTX_FPCONF "-") add_library(GENERIC_L073CZTX INTERFACE) target_compile_options(GENERIC_L073CZTX INTERFACE - "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -88725,15 +88865,15 @@ target_compile_options(GENERIC_L073CZTX_serial_none INTERFACE ) add_library(GENERIC_L073CZTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L073CZTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L073CZTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L073CZTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L073CZTX_usb_HID INTERFACE) target_compile_options(GENERIC_L073CZTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L073CZTX_usb_none INTERFACE) target_compile_options(GENERIC_L073CZTX_usb_none INTERFACE @@ -88750,7 +88890,7 @@ set(GENERIC_L073CZUX_MCU cortex-m0plus) set(GENERIC_L073CZUX_FPCONF "-") add_library(GENERIC_L073CZUX INTERFACE) target_compile_options(GENERIC_L073CZUX INTERFACE - "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -88795,15 +88935,15 @@ target_compile_options(GENERIC_L073CZUX_serial_none INTERFACE ) add_library(GENERIC_L073CZUX_usb_CDC INTERFACE) target_compile_options(GENERIC_L073CZUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L073CZUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L073CZUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L073CZUX_usb_HID INTERFACE) target_compile_options(GENERIC_L073CZUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L073CZUX_usb_none INTERFACE) target_compile_options(GENERIC_L073CZUX_usb_none INTERFACE @@ -88820,7 +88960,7 @@ set(GENERIC_L073CZYX_MCU cortex-m0plus) set(GENERIC_L073CZYX_FPCONF "-") add_library(GENERIC_L073CZYX INTERFACE) target_compile_options(GENERIC_L073CZYX INTERFACE - "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -88865,15 +89005,15 @@ target_compile_options(GENERIC_L073CZYX_serial_none INTERFACE ) add_library(GENERIC_L073CZYX_usb_CDC INTERFACE) target_compile_options(GENERIC_L073CZYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L073CZYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L073CZYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L073CZYX_usb_HID INTERFACE) target_compile_options(GENERIC_L073CZYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L073CZYX_usb_none INTERFACE) target_compile_options(GENERIC_L073CZYX_usb_none INTERFACE @@ -88890,7 +89030,7 @@ set(GENERIC_L073RBHX_MCU cortex-m0plus) set(GENERIC_L073RBHX_FPCONF "-") add_library(GENERIC_L073RBHX INTERFACE) target_compile_options(GENERIC_L073RBHX INTERFACE - "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -88935,15 +89075,15 @@ target_compile_options(GENERIC_L073RBHX_serial_none INTERFACE ) add_library(GENERIC_L073RBHX_usb_CDC INTERFACE) target_compile_options(GENERIC_L073RBHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L073RBHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L073RBHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L073RBHX_usb_HID INTERFACE) target_compile_options(GENERIC_L073RBHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L073RBHX_usb_none INTERFACE) target_compile_options(GENERIC_L073RBHX_usb_none INTERFACE @@ -88960,7 +89100,7 @@ set(GENERIC_L073RBTX_MCU cortex-m0plus) set(GENERIC_L073RBTX_FPCONF "-") add_library(GENERIC_L073RBTX INTERFACE) target_compile_options(GENERIC_L073RBTX INTERFACE - "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -89005,15 +89145,15 @@ target_compile_options(GENERIC_L073RBTX_serial_none INTERFACE ) add_library(GENERIC_L073RBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L073RBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L073RBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L073RBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L073RBTX_usb_HID INTERFACE) target_compile_options(GENERIC_L073RBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L073RBTX_usb_none INTERFACE) target_compile_options(GENERIC_L073RBTX_usb_none INTERFACE @@ -89030,7 +89170,7 @@ set(GENERIC_L073RZHX_MCU cortex-m0plus) set(GENERIC_L073RZHX_FPCONF "-") add_library(GENERIC_L073RZHX INTERFACE) target_compile_options(GENERIC_L073RZHX INTERFACE - "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -89075,15 +89215,15 @@ target_compile_options(GENERIC_L073RZHX_serial_none INTERFACE ) add_library(GENERIC_L073RZHX_usb_CDC INTERFACE) target_compile_options(GENERIC_L073RZHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L073RZHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L073RZHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L073RZHX_usb_HID INTERFACE) target_compile_options(GENERIC_L073RZHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L073RZHX_usb_none INTERFACE) target_compile_options(GENERIC_L073RZHX_usb_none INTERFACE @@ -89100,7 +89240,7 @@ set(GENERIC_L073RZIX_MCU cortex-m0plus) set(GENERIC_L073RZIX_FPCONF "-") add_library(GENERIC_L073RZIX INTERFACE) target_compile_options(GENERIC_L073RZIX INTERFACE - "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -89145,15 +89285,15 @@ target_compile_options(GENERIC_L073RZIX_serial_none INTERFACE ) add_library(GENERIC_L073RZIX_usb_CDC INTERFACE) target_compile_options(GENERIC_L073RZIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L073RZIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L073RZIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L073RZIX_usb_HID INTERFACE) target_compile_options(GENERIC_L073RZIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L073RZIX_usb_none INTERFACE) target_compile_options(GENERIC_L073RZIX_usb_none INTERFACE @@ -89170,7 +89310,7 @@ set(GENERIC_L073RZTX_MCU cortex-m0plus) set(GENERIC_L073RZTX_FPCONF "-") add_library(GENERIC_L073RZTX INTERFACE) target_compile_options(GENERIC_L073RZTX INTERFACE - "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -89215,15 +89355,15 @@ target_compile_options(GENERIC_L073RZTX_serial_none INTERFACE ) add_library(GENERIC_L073RZTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L073RZTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L073RZTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L073RZTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L073RZTX_usb_HID INTERFACE) target_compile_options(GENERIC_L073RZTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L073RZTX_usb_none INTERFACE) target_compile_options(GENERIC_L073RZTX_usb_none INTERFACE @@ -89240,7 +89380,7 @@ set(GENERIC_L073V8IX_MCU cortex-m0plus) set(GENERIC_L073V8IX_FPCONF "-") add_library(GENERIC_L073V8IX INTERFACE) target_compile_options(GENERIC_L073V8IX INTERFACE - "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -89285,15 +89425,15 @@ target_compile_options(GENERIC_L073V8IX_serial_none INTERFACE ) add_library(GENERIC_L073V8IX_usb_CDC INTERFACE) target_compile_options(GENERIC_L073V8IX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L073V8IX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L073V8IX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L073V8IX_usb_HID INTERFACE) target_compile_options(GENERIC_L073V8IX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L073V8IX_usb_none INTERFACE) target_compile_options(GENERIC_L073V8IX_usb_none INTERFACE @@ -89310,7 +89450,7 @@ set(GENERIC_L073V8TX_MCU cortex-m0plus) set(GENERIC_L073V8TX_FPCONF "-") add_library(GENERIC_L073V8TX INTERFACE) target_compile_options(GENERIC_L073V8TX INTERFACE - "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -89355,15 +89495,15 @@ target_compile_options(GENERIC_L073V8TX_serial_none INTERFACE ) add_library(GENERIC_L073V8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_L073V8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L073V8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L073V8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L073V8TX_usb_HID INTERFACE) target_compile_options(GENERIC_L073V8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L073V8TX_usb_none INTERFACE) target_compile_options(GENERIC_L073V8TX_usb_none INTERFACE @@ -89380,7 +89520,7 @@ set(GENERIC_L073VBIX_MCU cortex-m0plus) set(GENERIC_L073VBIX_FPCONF "-") add_library(GENERIC_L073VBIX INTERFACE) target_compile_options(GENERIC_L073VBIX INTERFACE - "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -89425,15 +89565,15 @@ target_compile_options(GENERIC_L073VBIX_serial_none INTERFACE ) add_library(GENERIC_L073VBIX_usb_CDC INTERFACE) target_compile_options(GENERIC_L073VBIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L073VBIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L073VBIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L073VBIX_usb_HID INTERFACE) target_compile_options(GENERIC_L073VBIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L073VBIX_usb_none INTERFACE) target_compile_options(GENERIC_L073VBIX_usb_none INTERFACE @@ -89450,7 +89590,7 @@ set(GENERIC_L073VBTX_MCU cortex-m0plus) set(GENERIC_L073VBTX_FPCONF "-") add_library(GENERIC_L073VBTX INTERFACE) target_compile_options(GENERIC_L073VBTX INTERFACE - "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -89495,15 +89635,15 @@ target_compile_options(GENERIC_L073VBTX_serial_none INTERFACE ) add_library(GENERIC_L073VBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L073VBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L073VBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L073VBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L073VBTX_usb_HID INTERFACE) target_compile_options(GENERIC_L073VBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L073VBTX_usb_none INTERFACE) target_compile_options(GENERIC_L073VBTX_usb_none INTERFACE @@ -89520,7 +89660,7 @@ set(GENERIC_L073VZIX_MCU cortex-m0plus) set(GENERIC_L073VZIX_FPCONF "-") add_library(GENERIC_L073VZIX INTERFACE) target_compile_options(GENERIC_L073VZIX INTERFACE - "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -89565,15 +89705,15 @@ target_compile_options(GENERIC_L073VZIX_serial_none INTERFACE ) add_library(GENERIC_L073VZIX_usb_CDC INTERFACE) target_compile_options(GENERIC_L073VZIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L073VZIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L073VZIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L073VZIX_usb_HID INTERFACE) target_compile_options(GENERIC_L073VZIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L073VZIX_usb_none INTERFACE) target_compile_options(GENERIC_L073VZIX_usb_none INTERFACE @@ -89590,7 +89730,7 @@ set(GENERIC_L073VZTX_MCU cortex-m0plus) set(GENERIC_L073VZTX_FPCONF "-") add_library(GENERIC_L073VZTX INTERFACE) target_compile_options(GENERIC_L073VZTX INTERFACE - "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -89635,15 +89775,15 @@ target_compile_options(GENERIC_L073VZTX_serial_none INTERFACE ) add_library(GENERIC_L073VZTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L073VZTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L073VZTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L073VZTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L073VZTX_usb_HID INTERFACE) target_compile_options(GENERIC_L073VZTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L073VZTX_usb_none INTERFACE) target_compile_options(GENERIC_L073VZTX_usb_none INTERFACE @@ -89660,7 +89800,7 @@ set(GENERIC_L082CZUX_MCU cortex-m0plus) set(GENERIC_L082CZUX_FPCONF "-") add_library(GENERIC_L082CZUX INTERFACE) target_compile_options(GENERIC_L082CZUX INTERFACE - "SHELL:-DSTM32L082xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L082xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -89705,15 +89845,15 @@ target_compile_options(GENERIC_L082CZUX_serial_none INTERFACE ) add_library(GENERIC_L082CZUX_usb_CDC INTERFACE) target_compile_options(GENERIC_L082CZUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L082CZUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L082CZUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L082CZUX_usb_HID INTERFACE) target_compile_options(GENERIC_L082CZUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L082CZUX_usb_none INTERFACE) target_compile_options(GENERIC_L082CZUX_usb_none INTERFACE @@ -89730,7 +89870,7 @@ set(GENERIC_L082CZYX_MCU cortex-m0plus) set(GENERIC_L082CZYX_FPCONF "-") add_library(GENERIC_L082CZYX INTERFACE) target_compile_options(GENERIC_L082CZYX INTERFACE - "SHELL:-DSTM32L082xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L082xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -89775,15 +89915,15 @@ target_compile_options(GENERIC_L082CZYX_serial_none INTERFACE ) add_library(GENERIC_L082CZYX_usb_CDC INTERFACE) target_compile_options(GENERIC_L082CZYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L082CZYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L082CZYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L082CZYX_usb_HID INTERFACE) target_compile_options(GENERIC_L082CZYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L082CZYX_usb_none INTERFACE) target_compile_options(GENERIC_L082CZYX_usb_none INTERFACE @@ -89800,7 +89940,7 @@ set(GENERIC_L082KBTX_MCU cortex-m0plus) set(GENERIC_L082KBTX_FPCONF "-") add_library(GENERIC_L082KBTX INTERFACE) target_compile_options(GENERIC_L082KBTX INTERFACE - "SHELL:-DSTM32L082xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L082xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -89845,15 +89985,15 @@ target_compile_options(GENERIC_L082KBTX_serial_none INTERFACE ) add_library(GENERIC_L082KBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L082KBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L082KBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L082KBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L082KBTX_usb_HID INTERFACE) target_compile_options(GENERIC_L082KBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L082KBTX_usb_none INTERFACE) target_compile_options(GENERIC_L082KBTX_usb_none INTERFACE @@ -89870,7 +90010,7 @@ set(GENERIC_L082KBUX_MCU cortex-m0plus) set(GENERIC_L082KBUX_FPCONF "-") add_library(GENERIC_L082KBUX INTERFACE) target_compile_options(GENERIC_L082KBUX INTERFACE - "SHELL:-DSTM32L082xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L082xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -89915,15 +90055,15 @@ target_compile_options(GENERIC_L082KBUX_serial_none INTERFACE ) add_library(GENERIC_L082KBUX_usb_CDC INTERFACE) target_compile_options(GENERIC_L082KBUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L082KBUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L082KBUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L082KBUX_usb_HID INTERFACE) target_compile_options(GENERIC_L082KBUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L082KBUX_usb_none INTERFACE) target_compile_options(GENERIC_L082KBUX_usb_none INTERFACE @@ -89940,7 +90080,7 @@ set(GENERIC_L082KZTX_MCU cortex-m0plus) set(GENERIC_L082KZTX_FPCONF "-") add_library(GENERIC_L082KZTX INTERFACE) target_compile_options(GENERIC_L082KZTX INTERFACE - "SHELL:-DSTM32L082xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L082xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -89985,15 +90125,15 @@ target_compile_options(GENERIC_L082KZTX_serial_none INTERFACE ) add_library(GENERIC_L082KZTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L082KZTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L082KZTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L082KZTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L082KZTX_usb_HID INTERFACE) target_compile_options(GENERIC_L082KZTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L082KZTX_usb_none INTERFACE) target_compile_options(GENERIC_L082KZTX_usb_none INTERFACE @@ -90010,7 +90150,7 @@ set(GENERIC_L082KZUX_MCU cortex-m0plus) set(GENERIC_L082KZUX_FPCONF "-") add_library(GENERIC_L082KZUX INTERFACE) target_compile_options(GENERIC_L082KZUX INTERFACE - "SHELL:-DSTM32L082xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L082xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -90055,15 +90195,15 @@ target_compile_options(GENERIC_L082KZUX_serial_none INTERFACE ) add_library(GENERIC_L082KZUX_usb_CDC INTERFACE) target_compile_options(GENERIC_L082KZUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L082KZUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L082KZUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L082KZUX_usb_HID INTERFACE) target_compile_options(GENERIC_L082KZUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L082KZUX_usb_none INTERFACE) target_compile_options(GENERIC_L082KZUX_usb_none INTERFACE @@ -90080,7 +90220,7 @@ set(GENERIC_L083CBTX_MCU cortex-m0plus) set(GENERIC_L083CBTX_FPCONF "-") add_library(GENERIC_L083CBTX INTERFACE) target_compile_options(GENERIC_L083CBTX INTERFACE - "SHELL:-DSTM32L083xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L083xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -90125,15 +90265,15 @@ target_compile_options(GENERIC_L083CBTX_serial_none INTERFACE ) add_library(GENERIC_L083CBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L083CBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L083CBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L083CBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L083CBTX_usb_HID INTERFACE) target_compile_options(GENERIC_L083CBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L083CBTX_usb_none INTERFACE) target_compile_options(GENERIC_L083CBTX_usb_none INTERFACE @@ -90150,7 +90290,7 @@ set(GENERIC_L083CZTX_MCU cortex-m0plus) set(GENERIC_L083CZTX_FPCONF "-") add_library(GENERIC_L083CZTX INTERFACE) target_compile_options(GENERIC_L083CZTX INTERFACE - "SHELL:-DSTM32L083xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L083xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -90195,15 +90335,15 @@ target_compile_options(GENERIC_L083CZTX_serial_none INTERFACE ) add_library(GENERIC_L083CZTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L083CZTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L083CZTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L083CZTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L083CZTX_usb_HID INTERFACE) target_compile_options(GENERIC_L083CZTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L083CZTX_usb_none INTERFACE) target_compile_options(GENERIC_L083CZTX_usb_none INTERFACE @@ -90220,7 +90360,7 @@ set(GENERIC_L083CZUX_MCU cortex-m0plus) set(GENERIC_L083CZUX_FPCONF "-") add_library(GENERIC_L083CZUX INTERFACE) target_compile_options(GENERIC_L083CZUX INTERFACE - "SHELL:-DSTM32L083xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L083xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -90265,15 +90405,15 @@ target_compile_options(GENERIC_L083CZUX_serial_none INTERFACE ) add_library(GENERIC_L083CZUX_usb_CDC INTERFACE) target_compile_options(GENERIC_L083CZUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L083CZUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L083CZUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L083CZUX_usb_HID INTERFACE) target_compile_options(GENERIC_L083CZUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L083CZUX_usb_none INTERFACE) target_compile_options(GENERIC_L083CZUX_usb_none INTERFACE @@ -90290,7 +90430,7 @@ set(GENERIC_L083RBHX_MCU cortex-m0plus) set(GENERIC_L083RBHX_FPCONF "-") add_library(GENERIC_L083RBHX INTERFACE) target_compile_options(GENERIC_L083RBHX INTERFACE - "SHELL:-DSTM32L083xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L083xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -90335,15 +90475,15 @@ target_compile_options(GENERIC_L083RBHX_serial_none INTERFACE ) add_library(GENERIC_L083RBHX_usb_CDC INTERFACE) target_compile_options(GENERIC_L083RBHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L083RBHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L083RBHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L083RBHX_usb_HID INTERFACE) target_compile_options(GENERIC_L083RBHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L083RBHX_usb_none INTERFACE) target_compile_options(GENERIC_L083RBHX_usb_none INTERFACE @@ -90360,7 +90500,7 @@ set(GENERIC_L083RBTX_MCU cortex-m0plus) set(GENERIC_L083RBTX_FPCONF "-") add_library(GENERIC_L083RBTX INTERFACE) target_compile_options(GENERIC_L083RBTX INTERFACE - "SHELL:-DSTM32L083xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L083xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -90405,15 +90545,15 @@ target_compile_options(GENERIC_L083RBTX_serial_none INTERFACE ) add_library(GENERIC_L083RBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L083RBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L083RBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L083RBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L083RBTX_usb_HID INTERFACE) target_compile_options(GENERIC_L083RBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L083RBTX_usb_none INTERFACE) target_compile_options(GENERIC_L083RBTX_usb_none INTERFACE @@ -90430,7 +90570,7 @@ set(GENERIC_L083RZHX_MCU cortex-m0plus) set(GENERIC_L083RZHX_FPCONF "-") add_library(GENERIC_L083RZHX INTERFACE) target_compile_options(GENERIC_L083RZHX INTERFACE - "SHELL:-DSTM32L083xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L083xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -90475,15 +90615,15 @@ target_compile_options(GENERIC_L083RZHX_serial_none INTERFACE ) add_library(GENERIC_L083RZHX_usb_CDC INTERFACE) target_compile_options(GENERIC_L083RZHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L083RZHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L083RZHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L083RZHX_usb_HID INTERFACE) target_compile_options(GENERIC_L083RZHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L083RZHX_usb_none INTERFACE) target_compile_options(GENERIC_L083RZHX_usb_none INTERFACE @@ -90500,7 +90640,7 @@ set(GENERIC_L083RZTX_MCU cortex-m0plus) set(GENERIC_L083RZTX_FPCONF "-") add_library(GENERIC_L083RZTX INTERFACE) target_compile_options(GENERIC_L083RZTX INTERFACE - "SHELL:-DSTM32L083xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L083xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -90545,15 +90685,15 @@ target_compile_options(GENERIC_L083RZTX_serial_none INTERFACE ) add_library(GENERIC_L083RZTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L083RZTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L083RZTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L083RZTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L083RZTX_usb_HID INTERFACE) target_compile_options(GENERIC_L083RZTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L083RZTX_usb_none INTERFACE) target_compile_options(GENERIC_L083RZTX_usb_none INTERFACE @@ -90570,7 +90710,7 @@ set(GENERIC_L083V8IX_MCU cortex-m0plus) set(GENERIC_L083V8IX_FPCONF "-") add_library(GENERIC_L083V8IX INTERFACE) target_compile_options(GENERIC_L083V8IX INTERFACE - "SHELL:-DSTM32L083xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L083xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -90615,15 +90755,15 @@ target_compile_options(GENERIC_L083V8IX_serial_none INTERFACE ) add_library(GENERIC_L083V8IX_usb_CDC INTERFACE) target_compile_options(GENERIC_L083V8IX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L083V8IX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L083V8IX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L083V8IX_usb_HID INTERFACE) target_compile_options(GENERIC_L083V8IX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L083V8IX_usb_none INTERFACE) target_compile_options(GENERIC_L083V8IX_usb_none INTERFACE @@ -90640,7 +90780,7 @@ set(GENERIC_L083V8TX_MCU cortex-m0plus) set(GENERIC_L083V8TX_FPCONF "-") add_library(GENERIC_L083V8TX INTERFACE) target_compile_options(GENERIC_L083V8TX INTERFACE - "SHELL:-DSTM32L083xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L083xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -90685,15 +90825,15 @@ target_compile_options(GENERIC_L083V8TX_serial_none INTERFACE ) add_library(GENERIC_L083V8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_L083V8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L083V8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L083V8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L083V8TX_usb_HID INTERFACE) target_compile_options(GENERIC_L083V8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L083V8TX_usb_none INTERFACE) target_compile_options(GENERIC_L083V8TX_usb_none INTERFACE @@ -90710,7 +90850,7 @@ set(GENERIC_L083VBIX_MCU cortex-m0plus) set(GENERIC_L083VBIX_FPCONF "-") add_library(GENERIC_L083VBIX INTERFACE) target_compile_options(GENERIC_L083VBIX INTERFACE - "SHELL:-DSTM32L083xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L083xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -90755,15 +90895,15 @@ target_compile_options(GENERIC_L083VBIX_serial_none INTERFACE ) add_library(GENERIC_L083VBIX_usb_CDC INTERFACE) target_compile_options(GENERIC_L083VBIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L083VBIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L083VBIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L083VBIX_usb_HID INTERFACE) target_compile_options(GENERIC_L083VBIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L083VBIX_usb_none INTERFACE) target_compile_options(GENERIC_L083VBIX_usb_none INTERFACE @@ -90780,7 +90920,7 @@ set(GENERIC_L083VBTX_MCU cortex-m0plus) set(GENERIC_L083VBTX_FPCONF "-") add_library(GENERIC_L083VBTX INTERFACE) target_compile_options(GENERIC_L083VBTX INTERFACE - "SHELL:-DSTM32L083xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L083xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -90825,15 +90965,15 @@ target_compile_options(GENERIC_L083VBTX_serial_none INTERFACE ) add_library(GENERIC_L083VBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L083VBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L083VBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L083VBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L083VBTX_usb_HID INTERFACE) target_compile_options(GENERIC_L083VBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L083VBTX_usb_none INTERFACE) target_compile_options(GENERIC_L083VBTX_usb_none INTERFACE @@ -90850,7 +90990,7 @@ set(GENERIC_L083VZIX_MCU cortex-m0plus) set(GENERIC_L083VZIX_FPCONF "-") add_library(GENERIC_L083VZIX INTERFACE) target_compile_options(GENERIC_L083VZIX INTERFACE - "SHELL:-DSTM32L083xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L083xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -90895,15 +91035,15 @@ target_compile_options(GENERIC_L083VZIX_serial_none INTERFACE ) add_library(GENERIC_L083VZIX_usb_CDC INTERFACE) target_compile_options(GENERIC_L083VZIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L083VZIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L083VZIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L083VZIX_usb_HID INTERFACE) target_compile_options(GENERIC_L083VZIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L083VZIX_usb_none INTERFACE) target_compile_options(GENERIC_L083VZIX_usb_none INTERFACE @@ -90920,7 +91060,7 @@ set(GENERIC_L083VZTX_MCU cortex-m0plus) set(GENERIC_L083VZTX_FPCONF "-") add_library(GENERIC_L083VZTX INTERFACE) target_compile_options(GENERIC_L083VZTX INTERFACE - "SHELL:-DSTM32L083xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L083xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -90965,15 +91105,15 @@ target_compile_options(GENERIC_L083VZTX_serial_none INTERFACE ) add_library(GENERIC_L083VZTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L083VZTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L083VZTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L083VZTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L083VZTX_usb_HID INTERFACE) target_compile_options(GENERIC_L083VZTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L083VZTX_usb_none INTERFACE) target_compile_options(GENERIC_L083VZTX_usb_none INTERFACE @@ -90990,7 +91130,7 @@ set(GENERIC_L100C6UX_MCU cortex-m3) set(GENERIC_L100C6UX_FPCONF "-") add_library(GENERIC_L100C6UX INTERFACE) target_compile_options(GENERIC_L100C6UX INTERFACE - "SHELL:-DSTM32L100xB " + "SHELL:-DSTM32L100xB" "SHELL:" "SHELL:" "SHELL: " @@ -91035,15 +91175,15 @@ target_compile_options(GENERIC_L100C6UX_serial_none INTERFACE ) add_library(GENERIC_L100C6UX_usb_CDC INTERFACE) target_compile_options(GENERIC_L100C6UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L100C6UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L100C6UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L100C6UX_usb_HID INTERFACE) target_compile_options(GENERIC_L100C6UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L100C6UX_usb_none INTERFACE) target_compile_options(GENERIC_L100C6UX_usb_none INTERFACE @@ -91060,7 +91200,7 @@ set(GENERIC_L100C6UXA_MCU cortex-m3) set(GENERIC_L100C6UXA_FPCONF "-") add_library(GENERIC_L100C6UXA INTERFACE) target_compile_options(GENERIC_L100C6UXA INTERFACE - "SHELL:-DSTM32L100xBA " + "SHELL:-DSTM32L100xBA" "SHELL:" "SHELL:" "SHELL: " @@ -91105,15 +91245,15 @@ target_compile_options(GENERIC_L100C6UXA_serial_none INTERFACE ) add_library(GENERIC_L100C6UXA_usb_CDC INTERFACE) target_compile_options(GENERIC_L100C6UXA_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L100C6UXA_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L100C6UXA_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L100C6UXA_usb_HID INTERFACE) target_compile_options(GENERIC_L100C6UXA_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L100C6UXA_usb_none INTERFACE) target_compile_options(GENERIC_L100C6UXA_usb_none INTERFACE @@ -91130,7 +91270,7 @@ set(GENERIC_L151C6TX_MCU cortex-m3) set(GENERIC_L151C6TX_FPCONF "-") add_library(GENERIC_L151C6TX INTERFACE) target_compile_options(GENERIC_L151C6TX INTERFACE - "SHELL:-DSTM32L151xB " + "SHELL:-DSTM32L151xB" "SHELL:" "SHELL:" "SHELL: " @@ -91175,15 +91315,15 @@ target_compile_options(GENERIC_L151C6TX_serial_none INTERFACE ) add_library(GENERIC_L151C6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_L151C6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L151C6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L151C6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L151C6TX_usb_HID INTERFACE) target_compile_options(GENERIC_L151C6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L151C6TX_usb_none INTERFACE) target_compile_options(GENERIC_L151C6TX_usb_none INTERFACE @@ -91200,7 +91340,7 @@ set(GENERIC_L151C6TXA_MCU cortex-m3) set(GENERIC_L151C6TXA_FPCONF "-") add_library(GENERIC_L151C6TXA INTERFACE) target_compile_options(GENERIC_L151C6TXA INTERFACE - "SHELL:-DSTM32L151xBA " + "SHELL:-DSTM32L151xBA" "SHELL:" "SHELL:" "SHELL: " @@ -91245,15 +91385,15 @@ target_compile_options(GENERIC_L151C6TXA_serial_none INTERFACE ) add_library(GENERIC_L151C6TXA_usb_CDC INTERFACE) target_compile_options(GENERIC_L151C6TXA_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L151C6TXA_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L151C6TXA_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L151C6TXA_usb_HID INTERFACE) target_compile_options(GENERIC_L151C6TXA_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L151C6TXA_usb_none INTERFACE) target_compile_options(GENERIC_L151C6TXA_usb_none INTERFACE @@ -91270,7 +91410,7 @@ set(GENERIC_L151C6UX_MCU cortex-m3) set(GENERIC_L151C6UX_FPCONF "-") add_library(GENERIC_L151C6UX INTERFACE) target_compile_options(GENERIC_L151C6UX INTERFACE - "SHELL:-DSTM32L151xB " + "SHELL:-DSTM32L151xB" "SHELL:" "SHELL:" "SHELL: " @@ -91315,15 +91455,15 @@ target_compile_options(GENERIC_L151C6UX_serial_none INTERFACE ) add_library(GENERIC_L151C6UX_usb_CDC INTERFACE) target_compile_options(GENERIC_L151C6UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L151C6UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L151C6UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L151C6UX_usb_HID INTERFACE) target_compile_options(GENERIC_L151C6UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L151C6UX_usb_none INTERFACE) target_compile_options(GENERIC_L151C6UX_usb_none INTERFACE @@ -91340,7 +91480,7 @@ set(GENERIC_L151C6UXA_MCU cortex-m3) set(GENERIC_L151C6UXA_FPCONF "-") add_library(GENERIC_L151C6UXA INTERFACE) target_compile_options(GENERIC_L151C6UXA INTERFACE - "SHELL:-DSTM32L151xBA " + "SHELL:-DSTM32L151xBA" "SHELL:" "SHELL:" "SHELL: " @@ -91385,15 +91525,15 @@ target_compile_options(GENERIC_L151C6UXA_serial_none INTERFACE ) add_library(GENERIC_L151C6UXA_usb_CDC INTERFACE) target_compile_options(GENERIC_L151C6UXA_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L151C6UXA_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L151C6UXA_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L151C6UXA_usb_HID INTERFACE) target_compile_options(GENERIC_L151C6UXA_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L151C6UXA_usb_none INTERFACE) target_compile_options(GENERIC_L151C6UXA_usb_none INTERFACE @@ -91410,7 +91550,7 @@ set(GENERIC_L151C8TX_MCU cortex-m3) set(GENERIC_L151C8TX_FPCONF "-") add_library(GENERIC_L151C8TX INTERFACE) target_compile_options(GENERIC_L151C8TX INTERFACE - "SHELL:-DSTM32L151xB " + "SHELL:-DSTM32L151xB" "SHELL:" "SHELL:" "SHELL: " @@ -91455,15 +91595,15 @@ target_compile_options(GENERIC_L151C8TX_serial_none INTERFACE ) add_library(GENERIC_L151C8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_L151C8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L151C8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L151C8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L151C8TX_usb_HID INTERFACE) target_compile_options(GENERIC_L151C8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L151C8TX_usb_none INTERFACE) target_compile_options(GENERIC_L151C8TX_usb_none INTERFACE @@ -91480,7 +91620,7 @@ set(GENERIC_L151C8TXA_MCU cortex-m3) set(GENERIC_L151C8TXA_FPCONF "-") add_library(GENERIC_L151C8TXA INTERFACE) target_compile_options(GENERIC_L151C8TXA INTERFACE - "SHELL:-DSTM32L151xBA " + "SHELL:-DSTM32L151xBA" "SHELL:" "SHELL:" "SHELL: " @@ -91525,15 +91665,15 @@ target_compile_options(GENERIC_L151C8TXA_serial_none INTERFACE ) add_library(GENERIC_L151C8TXA_usb_CDC INTERFACE) target_compile_options(GENERIC_L151C8TXA_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L151C8TXA_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L151C8TXA_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L151C8TXA_usb_HID INTERFACE) target_compile_options(GENERIC_L151C8TXA_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L151C8TXA_usb_none INTERFACE) target_compile_options(GENERIC_L151C8TXA_usb_none INTERFACE @@ -91550,7 +91690,7 @@ set(GENERIC_L151C8UX_MCU cortex-m3) set(GENERIC_L151C8UX_FPCONF "-") add_library(GENERIC_L151C8UX INTERFACE) target_compile_options(GENERIC_L151C8UX INTERFACE - "SHELL:-DSTM32L151xB " + "SHELL:-DSTM32L151xB" "SHELL:" "SHELL:" "SHELL: " @@ -91595,15 +91735,15 @@ target_compile_options(GENERIC_L151C8UX_serial_none INTERFACE ) add_library(GENERIC_L151C8UX_usb_CDC INTERFACE) target_compile_options(GENERIC_L151C8UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L151C8UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L151C8UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L151C8UX_usb_HID INTERFACE) target_compile_options(GENERIC_L151C8UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L151C8UX_usb_none INTERFACE) target_compile_options(GENERIC_L151C8UX_usb_none INTERFACE @@ -91620,7 +91760,7 @@ set(GENERIC_L151C8UXA_MCU cortex-m3) set(GENERIC_L151C8UXA_FPCONF "-") add_library(GENERIC_L151C8UXA INTERFACE) target_compile_options(GENERIC_L151C8UXA INTERFACE - "SHELL:-DSTM32L151xBA " + "SHELL:-DSTM32L151xBA" "SHELL:" "SHELL:" "SHELL: " @@ -91665,15 +91805,15 @@ target_compile_options(GENERIC_L151C8UXA_serial_none INTERFACE ) add_library(GENERIC_L151C8UXA_usb_CDC INTERFACE) target_compile_options(GENERIC_L151C8UXA_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L151C8UXA_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L151C8UXA_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L151C8UXA_usb_HID INTERFACE) target_compile_options(GENERIC_L151C8UXA_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L151C8UXA_usb_none INTERFACE) target_compile_options(GENERIC_L151C8UXA_usb_none INTERFACE @@ -91690,7 +91830,7 @@ set(GENERIC_L151CBTX_MCU cortex-m3) set(GENERIC_L151CBTX_FPCONF "-") add_library(GENERIC_L151CBTX INTERFACE) target_compile_options(GENERIC_L151CBTX INTERFACE - "SHELL:-DSTM32L151xB " + "SHELL:-DSTM32L151xB" "SHELL:" "SHELL:" "SHELL: " @@ -91735,15 +91875,15 @@ target_compile_options(GENERIC_L151CBTX_serial_none INTERFACE ) add_library(GENERIC_L151CBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L151CBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L151CBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L151CBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L151CBTX_usb_HID INTERFACE) target_compile_options(GENERIC_L151CBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L151CBTX_usb_none INTERFACE) target_compile_options(GENERIC_L151CBTX_usb_none INTERFACE @@ -91760,7 +91900,7 @@ set(GENERIC_L151CBTXA_MCU cortex-m3) set(GENERIC_L151CBTXA_FPCONF "-") add_library(GENERIC_L151CBTXA INTERFACE) target_compile_options(GENERIC_L151CBTXA INTERFACE - "SHELL:-DSTM32L151xBA " + "SHELL:-DSTM32L151xBA" "SHELL:" "SHELL:" "SHELL: " @@ -91805,15 +91945,15 @@ target_compile_options(GENERIC_L151CBTXA_serial_none INTERFACE ) add_library(GENERIC_L151CBTXA_usb_CDC INTERFACE) target_compile_options(GENERIC_L151CBTXA_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L151CBTXA_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L151CBTXA_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L151CBTXA_usb_HID INTERFACE) target_compile_options(GENERIC_L151CBTXA_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L151CBTXA_usb_none INTERFACE) target_compile_options(GENERIC_L151CBTXA_usb_none INTERFACE @@ -91830,7 +91970,7 @@ set(GENERIC_L151CBUX_MCU cortex-m3) set(GENERIC_L151CBUX_FPCONF "-") add_library(GENERIC_L151CBUX INTERFACE) target_compile_options(GENERIC_L151CBUX INTERFACE - "SHELL:-DSTM32L151xB " + "SHELL:-DSTM32L151xB" "SHELL:" "SHELL:" "SHELL: " @@ -91875,15 +92015,15 @@ target_compile_options(GENERIC_L151CBUX_serial_none INTERFACE ) add_library(GENERIC_L151CBUX_usb_CDC INTERFACE) target_compile_options(GENERIC_L151CBUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L151CBUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L151CBUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L151CBUX_usb_HID INTERFACE) target_compile_options(GENERIC_L151CBUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L151CBUX_usb_none INTERFACE) target_compile_options(GENERIC_L151CBUX_usb_none INTERFACE @@ -91900,7 +92040,7 @@ set(GENERIC_L151CBUXA_MCU cortex-m3) set(GENERIC_L151CBUXA_FPCONF "-") add_library(GENERIC_L151CBUXA INTERFACE) target_compile_options(GENERIC_L151CBUXA INTERFACE - "SHELL:-DSTM32L151xBA " + "SHELL:-DSTM32L151xBA" "SHELL:" "SHELL:" "SHELL: " @@ -91945,15 +92085,15 @@ target_compile_options(GENERIC_L151CBUXA_serial_none INTERFACE ) add_library(GENERIC_L151CBUXA_usb_CDC INTERFACE) target_compile_options(GENERIC_L151CBUXA_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L151CBUXA_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L151CBUXA_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L151CBUXA_usb_HID INTERFACE) target_compile_options(GENERIC_L151CBUXA_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L151CBUXA_usb_none INTERFACE) target_compile_options(GENERIC_L151CBUXA_usb_none INTERFACE @@ -91970,7 +92110,7 @@ set(GENERIC_L151RETX_MCU cortex-m3) set(GENERIC_L151RETX_FPCONF "-") add_library(GENERIC_L151RETX INTERFACE) target_compile_options(GENERIC_L151RETX INTERFACE - "SHELL:-DSTM32L151xE " + "SHELL:-DSTM32L151xE" "SHELL:" "SHELL:" "SHELL: " @@ -92015,15 +92155,15 @@ target_compile_options(GENERIC_L151RETX_serial_none INTERFACE ) add_library(GENERIC_L151RETX_usb_CDC INTERFACE) target_compile_options(GENERIC_L151RETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L151RETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L151RETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L151RETX_usb_HID INTERFACE) target_compile_options(GENERIC_L151RETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L151RETX_usb_none INTERFACE) target_compile_options(GENERIC_L151RETX_usb_none INTERFACE @@ -92040,7 +92180,7 @@ set(GENERIC_L151ZDTX_MCU cortex-m3) set(GENERIC_L151ZDTX_FPCONF "-") add_library(GENERIC_L151ZDTX INTERFACE) target_compile_options(GENERIC_L151ZDTX INTERFACE - "SHELL:-DSTM32L151xD " + "SHELL:-DSTM32L151xD" "SHELL:" "SHELL:" "SHELL: " @@ -92085,15 +92225,15 @@ target_compile_options(GENERIC_L151ZDTX_serial_none INTERFACE ) add_library(GENERIC_L151ZDTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L151ZDTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L151ZDTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L151ZDTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L151ZDTX_usb_HID INTERFACE) target_compile_options(GENERIC_L151ZDTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L151ZDTX_usb_none INTERFACE) target_compile_options(GENERIC_L151ZDTX_usb_none INTERFACE @@ -92110,7 +92250,7 @@ set(GENERIC_L152C6TX_MCU cortex-m3) set(GENERIC_L152C6TX_FPCONF "-") add_library(GENERIC_L152C6TX INTERFACE) target_compile_options(GENERIC_L152C6TX INTERFACE - "SHELL:-DSTM32L152xB " + "SHELL:-DSTM32L152xB" "SHELL:" "SHELL:" "SHELL: " @@ -92155,15 +92295,15 @@ target_compile_options(GENERIC_L152C6TX_serial_none INTERFACE ) add_library(GENERIC_L152C6TX_usb_CDC INTERFACE) target_compile_options(GENERIC_L152C6TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L152C6TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L152C6TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L152C6TX_usb_HID INTERFACE) target_compile_options(GENERIC_L152C6TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L152C6TX_usb_none INTERFACE) target_compile_options(GENERIC_L152C6TX_usb_none INTERFACE @@ -92180,7 +92320,7 @@ set(GENERIC_L152C6TXA_MCU cortex-m3) set(GENERIC_L152C6TXA_FPCONF "-") add_library(GENERIC_L152C6TXA INTERFACE) target_compile_options(GENERIC_L152C6TXA INTERFACE - "SHELL:-DSTM32L152xBA " + "SHELL:-DSTM32L152xBA" "SHELL:" "SHELL:" "SHELL: " @@ -92225,15 +92365,15 @@ target_compile_options(GENERIC_L152C6TXA_serial_none INTERFACE ) add_library(GENERIC_L152C6TXA_usb_CDC INTERFACE) target_compile_options(GENERIC_L152C6TXA_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L152C6TXA_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L152C6TXA_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L152C6TXA_usb_HID INTERFACE) target_compile_options(GENERIC_L152C6TXA_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L152C6TXA_usb_none INTERFACE) target_compile_options(GENERIC_L152C6TXA_usb_none INTERFACE @@ -92250,7 +92390,7 @@ set(GENERIC_L152C6UX_MCU cortex-m3) set(GENERIC_L152C6UX_FPCONF "-") add_library(GENERIC_L152C6UX INTERFACE) target_compile_options(GENERIC_L152C6UX INTERFACE - "SHELL:-DSTM32L152xB " + "SHELL:-DSTM32L152xB" "SHELL:" "SHELL:" "SHELL: " @@ -92295,15 +92435,15 @@ target_compile_options(GENERIC_L152C6UX_serial_none INTERFACE ) add_library(GENERIC_L152C6UX_usb_CDC INTERFACE) target_compile_options(GENERIC_L152C6UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L152C6UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L152C6UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L152C6UX_usb_HID INTERFACE) target_compile_options(GENERIC_L152C6UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L152C6UX_usb_none INTERFACE) target_compile_options(GENERIC_L152C6UX_usb_none INTERFACE @@ -92320,7 +92460,7 @@ set(GENERIC_L152C6UXA_MCU cortex-m3) set(GENERIC_L152C6UXA_FPCONF "-") add_library(GENERIC_L152C6UXA INTERFACE) target_compile_options(GENERIC_L152C6UXA INTERFACE - "SHELL:-DSTM32L152xBA " + "SHELL:-DSTM32L152xBA" "SHELL:" "SHELL:" "SHELL: " @@ -92365,15 +92505,15 @@ target_compile_options(GENERIC_L152C6UXA_serial_none INTERFACE ) add_library(GENERIC_L152C6UXA_usb_CDC INTERFACE) target_compile_options(GENERIC_L152C6UXA_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L152C6UXA_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L152C6UXA_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L152C6UXA_usb_HID INTERFACE) target_compile_options(GENERIC_L152C6UXA_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L152C6UXA_usb_none INTERFACE) target_compile_options(GENERIC_L152C6UXA_usb_none INTERFACE @@ -92390,7 +92530,7 @@ set(GENERIC_L152C8TX_MCU cortex-m3) set(GENERIC_L152C8TX_FPCONF "-") add_library(GENERIC_L152C8TX INTERFACE) target_compile_options(GENERIC_L152C8TX INTERFACE - "SHELL:-DSTM32L152xB " + "SHELL:-DSTM32L152xB" "SHELL:" "SHELL:" "SHELL: " @@ -92435,15 +92575,15 @@ target_compile_options(GENERIC_L152C8TX_serial_none INTERFACE ) add_library(GENERIC_L152C8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_L152C8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L152C8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L152C8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L152C8TX_usb_HID INTERFACE) target_compile_options(GENERIC_L152C8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L152C8TX_usb_none INTERFACE) target_compile_options(GENERIC_L152C8TX_usb_none INTERFACE @@ -92460,7 +92600,7 @@ set(GENERIC_L152C8TXA_MCU cortex-m3) set(GENERIC_L152C8TXA_FPCONF "-") add_library(GENERIC_L152C8TXA INTERFACE) target_compile_options(GENERIC_L152C8TXA INTERFACE - "SHELL:-DSTM32L152xBA " + "SHELL:-DSTM32L152xBA" "SHELL:" "SHELL:" "SHELL: " @@ -92505,15 +92645,15 @@ target_compile_options(GENERIC_L152C8TXA_serial_none INTERFACE ) add_library(GENERIC_L152C8TXA_usb_CDC INTERFACE) target_compile_options(GENERIC_L152C8TXA_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L152C8TXA_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L152C8TXA_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L152C8TXA_usb_HID INTERFACE) target_compile_options(GENERIC_L152C8TXA_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L152C8TXA_usb_none INTERFACE) target_compile_options(GENERIC_L152C8TXA_usb_none INTERFACE @@ -92530,7 +92670,7 @@ set(GENERIC_L152C8UX_MCU cortex-m3) set(GENERIC_L152C8UX_FPCONF "-") add_library(GENERIC_L152C8UX INTERFACE) target_compile_options(GENERIC_L152C8UX INTERFACE - "SHELL:-DSTM32L152xB " + "SHELL:-DSTM32L152xB" "SHELL:" "SHELL:" "SHELL: " @@ -92575,15 +92715,15 @@ target_compile_options(GENERIC_L152C8UX_serial_none INTERFACE ) add_library(GENERIC_L152C8UX_usb_CDC INTERFACE) target_compile_options(GENERIC_L152C8UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L152C8UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L152C8UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L152C8UX_usb_HID INTERFACE) target_compile_options(GENERIC_L152C8UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L152C8UX_usb_none INTERFACE) target_compile_options(GENERIC_L152C8UX_usb_none INTERFACE @@ -92600,7 +92740,7 @@ set(GENERIC_L152C8UXA_MCU cortex-m3) set(GENERIC_L152C8UXA_FPCONF "-") add_library(GENERIC_L152C8UXA INTERFACE) target_compile_options(GENERIC_L152C8UXA INTERFACE - "SHELL:-DSTM32L152xBA " + "SHELL:-DSTM32L152xBA" "SHELL:" "SHELL:" "SHELL: " @@ -92645,15 +92785,15 @@ target_compile_options(GENERIC_L152C8UXA_serial_none INTERFACE ) add_library(GENERIC_L152C8UXA_usb_CDC INTERFACE) target_compile_options(GENERIC_L152C8UXA_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L152C8UXA_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L152C8UXA_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L152C8UXA_usb_HID INTERFACE) target_compile_options(GENERIC_L152C8UXA_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L152C8UXA_usb_none INTERFACE) target_compile_options(GENERIC_L152C8UXA_usb_none INTERFACE @@ -92670,7 +92810,7 @@ set(GENERIC_L152CBTX_MCU cortex-m3) set(GENERIC_L152CBTX_FPCONF "-") add_library(GENERIC_L152CBTX INTERFACE) target_compile_options(GENERIC_L152CBTX INTERFACE - "SHELL:-DSTM32L152xB " + "SHELL:-DSTM32L152xB" "SHELL:" "SHELL:" "SHELL: " @@ -92715,15 +92855,15 @@ target_compile_options(GENERIC_L152CBTX_serial_none INTERFACE ) add_library(GENERIC_L152CBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L152CBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L152CBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L152CBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L152CBTX_usb_HID INTERFACE) target_compile_options(GENERIC_L152CBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L152CBTX_usb_none INTERFACE) target_compile_options(GENERIC_L152CBTX_usb_none INTERFACE @@ -92740,7 +92880,7 @@ set(GENERIC_L152CBTXA_MCU cortex-m3) set(GENERIC_L152CBTXA_FPCONF "-") add_library(GENERIC_L152CBTXA INTERFACE) target_compile_options(GENERIC_L152CBTXA INTERFACE - "SHELL:-DSTM32L152xBA " + "SHELL:-DSTM32L152xBA" "SHELL:" "SHELL:" "SHELL: " @@ -92785,15 +92925,15 @@ target_compile_options(GENERIC_L152CBTXA_serial_none INTERFACE ) add_library(GENERIC_L152CBTXA_usb_CDC INTERFACE) target_compile_options(GENERIC_L152CBTXA_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L152CBTXA_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L152CBTXA_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L152CBTXA_usb_HID INTERFACE) target_compile_options(GENERIC_L152CBTXA_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L152CBTXA_usb_none INTERFACE) target_compile_options(GENERIC_L152CBTXA_usb_none INTERFACE @@ -92810,7 +92950,7 @@ set(GENERIC_L152CBUX_MCU cortex-m3) set(GENERIC_L152CBUX_FPCONF "-") add_library(GENERIC_L152CBUX INTERFACE) target_compile_options(GENERIC_L152CBUX INTERFACE - "SHELL:-DSTM32L152xB " + "SHELL:-DSTM32L152xB" "SHELL:" "SHELL:" "SHELL: " @@ -92855,15 +92995,15 @@ target_compile_options(GENERIC_L152CBUX_serial_none INTERFACE ) add_library(GENERIC_L152CBUX_usb_CDC INTERFACE) target_compile_options(GENERIC_L152CBUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L152CBUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L152CBUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L152CBUX_usb_HID INTERFACE) target_compile_options(GENERIC_L152CBUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L152CBUX_usb_none INTERFACE) target_compile_options(GENERIC_L152CBUX_usb_none INTERFACE @@ -92880,7 +93020,7 @@ set(GENERIC_L152CBUXA_MCU cortex-m3) set(GENERIC_L152CBUXA_FPCONF "-") add_library(GENERIC_L152CBUXA INTERFACE) target_compile_options(GENERIC_L152CBUXA INTERFACE - "SHELL:-DSTM32L152xBA " + "SHELL:-DSTM32L152xBA" "SHELL:" "SHELL:" "SHELL: " @@ -92925,15 +93065,15 @@ target_compile_options(GENERIC_L152CBUXA_serial_none INTERFACE ) add_library(GENERIC_L152CBUXA_usb_CDC INTERFACE) target_compile_options(GENERIC_L152CBUXA_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L152CBUXA_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L152CBUXA_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L152CBUXA_usb_HID INTERFACE) target_compile_options(GENERIC_L152CBUXA_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L152CBUXA_usb_none INTERFACE) target_compile_options(GENERIC_L152CBUXA_usb_none INTERFACE @@ -92950,7 +93090,7 @@ set(GENERIC_L152RETX_MCU cortex-m3) set(GENERIC_L152RETX_FPCONF "-") add_library(GENERIC_L152RETX INTERFACE) target_compile_options(GENERIC_L152RETX INTERFACE - "SHELL:-DSTM32L152xE " + "SHELL:-DSTM32L152xE" "SHELL:" "SHELL:" "SHELL: " @@ -92995,15 +93135,15 @@ target_compile_options(GENERIC_L152RETX_serial_none INTERFACE ) add_library(GENERIC_L152RETX_usb_CDC INTERFACE) target_compile_options(GENERIC_L152RETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L152RETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L152RETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L152RETX_usb_HID INTERFACE) target_compile_options(GENERIC_L152RETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L152RETX_usb_none INTERFACE) target_compile_options(GENERIC_L152RETX_usb_none INTERFACE @@ -93020,7 +93160,7 @@ set(GENERIC_L152ZDTX_MCU cortex-m3) set(GENERIC_L152ZDTX_FPCONF "-") add_library(GENERIC_L152ZDTX INTERFACE) target_compile_options(GENERIC_L152ZDTX INTERFACE - "SHELL:-DSTM32L152xD " + "SHELL:-DSTM32L152xD" "SHELL:" "SHELL:" "SHELL: " @@ -93065,15 +93205,15 @@ target_compile_options(GENERIC_L152ZDTX_serial_none INTERFACE ) add_library(GENERIC_L152ZDTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L152ZDTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L152ZDTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L152ZDTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L152ZDTX_usb_HID INTERFACE) target_compile_options(GENERIC_L152ZDTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L152ZDTX_usb_none INTERFACE) target_compile_options(GENERIC_L152ZDTX_usb_none INTERFACE @@ -93090,7 +93230,7 @@ set(GENERIC_L162RETX_MCU cortex-m3) set(GENERIC_L162RETX_FPCONF "-") add_library(GENERIC_L162RETX INTERFACE) target_compile_options(GENERIC_L162RETX INTERFACE - "SHELL:-DSTM32L162xE " + "SHELL:-DSTM32L162xE" "SHELL:" "SHELL:" "SHELL: " @@ -93135,15 +93275,15 @@ target_compile_options(GENERIC_L162RETX_serial_none INTERFACE ) add_library(GENERIC_L162RETX_usb_CDC INTERFACE) target_compile_options(GENERIC_L162RETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L162RETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L162RETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L162RETX_usb_HID INTERFACE) target_compile_options(GENERIC_L162RETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L162RETX_usb_none INTERFACE) target_compile_options(GENERIC_L162RETX_usb_none INTERFACE @@ -93160,7 +93300,7 @@ set(GENERIC_L162ZDTX_MCU cortex-m3) set(GENERIC_L162ZDTX_FPCONF "-") add_library(GENERIC_L162ZDTX INTERFACE) target_compile_options(GENERIC_L162ZDTX INTERFACE - "SHELL:-DSTM32L162xD " + "SHELL:-DSTM32L162xD" "SHELL:" "SHELL:" "SHELL: " @@ -93205,15 +93345,15 @@ target_compile_options(GENERIC_L162ZDTX_serial_none INTERFACE ) add_library(GENERIC_L162ZDTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L162ZDTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L162ZDTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L162ZDTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L162ZDTX_usb_HID INTERFACE) target_compile_options(GENERIC_L162ZDTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L162ZDTX_usb_none INTERFACE) target_compile_options(GENERIC_L162ZDTX_usb_none INTERFACE @@ -93230,7 +93370,7 @@ set(GENERIC_L412K8TX_MCU cortex-m4) set(GENERIC_L412K8TX_FPCONF "-") add_library(GENERIC_L412K8TX INTERFACE) target_compile_options(GENERIC_L412K8TX INTERFACE - "SHELL:-DSTM32L412xx " + "SHELL:-DSTM32L412xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -93275,15 +93415,15 @@ target_compile_options(GENERIC_L412K8TX_serial_none INTERFACE ) add_library(GENERIC_L412K8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_L412K8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L412K8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L412K8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L412K8TX_usb_HID INTERFACE) target_compile_options(GENERIC_L412K8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L412K8TX_usb_none INTERFACE) target_compile_options(GENERIC_L412K8TX_usb_none INTERFACE @@ -93312,7 +93452,7 @@ set(GENERIC_L412K8UX_MCU cortex-m4) set(GENERIC_L412K8UX_FPCONF "-") add_library(GENERIC_L412K8UX INTERFACE) target_compile_options(GENERIC_L412K8UX INTERFACE - "SHELL:-DSTM32L412xx " + "SHELL:-DSTM32L412xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -93357,15 +93497,15 @@ target_compile_options(GENERIC_L412K8UX_serial_none INTERFACE ) add_library(GENERIC_L412K8UX_usb_CDC INTERFACE) target_compile_options(GENERIC_L412K8UX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L412K8UX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L412K8UX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L412K8UX_usb_HID INTERFACE) target_compile_options(GENERIC_L412K8UX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L412K8UX_usb_none INTERFACE) target_compile_options(GENERIC_L412K8UX_usb_none INTERFACE @@ -93394,7 +93534,7 @@ set(GENERIC_L412KBTX_MCU cortex-m4) set(GENERIC_L412KBTX_FPCONF "-") add_library(GENERIC_L412KBTX INTERFACE) target_compile_options(GENERIC_L412KBTX INTERFACE - "SHELL:-DSTM32L412xx " + "SHELL:-DSTM32L412xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -93439,15 +93579,15 @@ target_compile_options(GENERIC_L412KBTX_serial_none INTERFACE ) add_library(GENERIC_L412KBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L412KBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L412KBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L412KBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L412KBTX_usb_HID INTERFACE) target_compile_options(GENERIC_L412KBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L412KBTX_usb_none INTERFACE) target_compile_options(GENERIC_L412KBTX_usb_none INTERFACE @@ -93476,7 +93616,7 @@ set(GENERIC_L412KBUX_MCU cortex-m4) set(GENERIC_L412KBUX_FPCONF "-") add_library(GENERIC_L412KBUX INTERFACE) target_compile_options(GENERIC_L412KBUX INTERFACE - "SHELL:-DSTM32L412xx " + "SHELL:-DSTM32L412xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -93521,15 +93661,15 @@ target_compile_options(GENERIC_L412KBUX_serial_none INTERFACE ) add_library(GENERIC_L412KBUX_usb_CDC INTERFACE) target_compile_options(GENERIC_L412KBUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L412KBUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L412KBUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L412KBUX_usb_HID INTERFACE) target_compile_options(GENERIC_L412KBUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L412KBUX_usb_none INTERFACE) target_compile_options(GENERIC_L412KBUX_usb_none INTERFACE @@ -93558,7 +93698,7 @@ set(GENERIC_L412RBIXP_MCU cortex-m4) set(GENERIC_L412RBIXP_FPCONF "-") add_library(GENERIC_L412RBIXP INTERFACE) target_compile_options(GENERIC_L412RBIXP INTERFACE - "SHELL:-DSTM32L412xx " + "SHELL:-DSTM32L412xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -93603,15 +93743,15 @@ target_compile_options(GENERIC_L412RBIXP_serial_none INTERFACE ) add_library(GENERIC_L412RBIXP_usb_CDC INTERFACE) target_compile_options(GENERIC_L412RBIXP_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L412RBIXP_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L412RBIXP_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L412RBIXP_usb_HID INTERFACE) target_compile_options(GENERIC_L412RBIXP_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L412RBIXP_usb_none INTERFACE) target_compile_options(GENERIC_L412RBIXP_usb_none INTERFACE @@ -93640,7 +93780,7 @@ set(GENERIC_L412RBTXP_MCU cortex-m4) set(GENERIC_L412RBTXP_FPCONF "-") add_library(GENERIC_L412RBTXP INTERFACE) target_compile_options(GENERIC_L412RBTXP INTERFACE - "SHELL:-DSTM32L412xx " + "SHELL:-DSTM32L412xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -93685,15 +93825,15 @@ target_compile_options(GENERIC_L412RBTXP_serial_none INTERFACE ) add_library(GENERIC_L412RBTXP_usb_CDC INTERFACE) target_compile_options(GENERIC_L412RBTXP_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L412RBTXP_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L412RBTXP_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L412RBTXP_usb_HID INTERFACE) target_compile_options(GENERIC_L412RBTXP_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L412RBTXP_usb_none INTERFACE) target_compile_options(GENERIC_L412RBTXP_usb_none INTERFACE @@ -93722,7 +93862,7 @@ set(GENERIC_L422KBTX_MCU cortex-m4) set(GENERIC_L422KBTX_FPCONF "-") add_library(GENERIC_L422KBTX INTERFACE) target_compile_options(GENERIC_L422KBTX INTERFACE - "SHELL:-DSTM32L422xx " + "SHELL:-DSTM32L422xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -93767,15 +93907,15 @@ target_compile_options(GENERIC_L422KBTX_serial_none INTERFACE ) add_library(GENERIC_L422KBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L422KBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L422KBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L422KBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L422KBTX_usb_HID INTERFACE) target_compile_options(GENERIC_L422KBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L422KBTX_usb_none INTERFACE) target_compile_options(GENERIC_L422KBTX_usb_none INTERFACE @@ -93804,7 +93944,7 @@ set(GENERIC_L422KBUX_MCU cortex-m4) set(GENERIC_L422KBUX_FPCONF "-") add_library(GENERIC_L422KBUX INTERFACE) target_compile_options(GENERIC_L422KBUX INTERFACE - "SHELL:-DSTM32L422xx " + "SHELL:-DSTM32L422xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -93849,15 +93989,15 @@ target_compile_options(GENERIC_L422KBUX_serial_none INTERFACE ) add_library(GENERIC_L422KBUX_usb_CDC INTERFACE) target_compile_options(GENERIC_L422KBUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L422KBUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L422KBUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L422KBUX_usb_HID INTERFACE) target_compile_options(GENERIC_L422KBUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L422KBUX_usb_none INTERFACE) target_compile_options(GENERIC_L422KBUX_usb_none INTERFACE @@ -93886,7 +94026,7 @@ set(GENERIC_L431CBTX_MCU cortex-m4) set(GENERIC_L431CBTX_FPCONF "-") add_library(GENERIC_L431CBTX INTERFACE) target_compile_options(GENERIC_L431CBTX INTERFACE - "SHELL:-DSTM32L431xx " + "SHELL:-DSTM32L431xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -93931,15 +94071,15 @@ target_compile_options(GENERIC_L431CBTX_serial_none INTERFACE ) add_library(GENERIC_L431CBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L431CBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L431CBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L431CBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L431CBTX_usb_HID INTERFACE) target_compile_options(GENERIC_L431CBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L431CBTX_usb_none INTERFACE) target_compile_options(GENERIC_L431CBTX_usb_none INTERFACE @@ -93968,7 +94108,7 @@ set(GENERIC_L431CBUX_MCU cortex-m4) set(GENERIC_L431CBUX_FPCONF "-") add_library(GENERIC_L431CBUX INTERFACE) target_compile_options(GENERIC_L431CBUX INTERFACE - "SHELL:-DSTM32L431xx " + "SHELL:-DSTM32L431xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -94013,15 +94153,15 @@ target_compile_options(GENERIC_L431CBUX_serial_none INTERFACE ) add_library(GENERIC_L431CBUX_usb_CDC INTERFACE) target_compile_options(GENERIC_L431CBUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L431CBUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L431CBUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L431CBUX_usb_HID INTERFACE) target_compile_options(GENERIC_L431CBUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L431CBUX_usb_none INTERFACE) target_compile_options(GENERIC_L431CBUX_usb_none INTERFACE @@ -94050,7 +94190,7 @@ set(GENERIC_L431CCTX_MCU cortex-m4) set(GENERIC_L431CCTX_FPCONF "-") add_library(GENERIC_L431CCTX INTERFACE) target_compile_options(GENERIC_L431CCTX INTERFACE - "SHELL:-DSTM32L431xx " + "SHELL:-DSTM32L431xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -94095,15 +94235,15 @@ target_compile_options(GENERIC_L431CCTX_serial_none INTERFACE ) add_library(GENERIC_L431CCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L431CCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L431CCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L431CCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L431CCTX_usb_HID INTERFACE) target_compile_options(GENERIC_L431CCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L431CCTX_usb_none INTERFACE) target_compile_options(GENERIC_L431CCTX_usb_none INTERFACE @@ -94132,7 +94272,7 @@ set(GENERIC_L431CCUX_MCU cortex-m4) set(GENERIC_L431CCUX_FPCONF "-") add_library(GENERIC_L431CCUX INTERFACE) target_compile_options(GENERIC_L431CCUX INTERFACE - "SHELL:-DSTM32L431xx " + "SHELL:-DSTM32L431xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -94177,15 +94317,15 @@ target_compile_options(GENERIC_L431CCUX_serial_none INTERFACE ) add_library(GENERIC_L431CCUX_usb_CDC INTERFACE) target_compile_options(GENERIC_L431CCUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L431CCUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L431CCUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L431CCUX_usb_HID INTERFACE) target_compile_options(GENERIC_L431CCUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L431CCUX_usb_none INTERFACE) target_compile_options(GENERIC_L431CCUX_usb_none INTERFACE @@ -94214,7 +94354,7 @@ set(GENERIC_L431RBIX_MCU cortex-m4) set(GENERIC_L431RBIX_FPCONF "-") add_library(GENERIC_L431RBIX INTERFACE) target_compile_options(GENERIC_L431RBIX INTERFACE - "SHELL:-DSTM32L431xx " + "SHELL:-DSTM32L431xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -94259,15 +94399,15 @@ target_compile_options(GENERIC_L431RBIX_serial_none INTERFACE ) add_library(GENERIC_L431RBIX_usb_CDC INTERFACE) target_compile_options(GENERIC_L431RBIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L431RBIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L431RBIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L431RBIX_usb_HID INTERFACE) target_compile_options(GENERIC_L431RBIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L431RBIX_usb_none INTERFACE) target_compile_options(GENERIC_L431RBIX_usb_none INTERFACE @@ -94296,7 +94436,7 @@ set(GENERIC_L431RBTX_MCU cortex-m4) set(GENERIC_L431RBTX_FPCONF "-") add_library(GENERIC_L431RBTX INTERFACE) target_compile_options(GENERIC_L431RBTX INTERFACE - "SHELL:-DSTM32L431xx " + "SHELL:-DSTM32L431xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -94341,15 +94481,15 @@ target_compile_options(GENERIC_L431RBTX_serial_none INTERFACE ) add_library(GENERIC_L431RBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L431RBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L431RBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L431RBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L431RBTX_usb_HID INTERFACE) target_compile_options(GENERIC_L431RBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L431RBTX_usb_none INTERFACE) target_compile_options(GENERIC_L431RBTX_usb_none INTERFACE @@ -94378,7 +94518,7 @@ set(GENERIC_L431RBYX_MCU cortex-m4) set(GENERIC_L431RBYX_FPCONF "-") add_library(GENERIC_L431RBYX INTERFACE) target_compile_options(GENERIC_L431RBYX INTERFACE - "SHELL:-DSTM32L431xx " + "SHELL:-DSTM32L431xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -94423,15 +94563,15 @@ target_compile_options(GENERIC_L431RBYX_serial_none INTERFACE ) add_library(GENERIC_L431RBYX_usb_CDC INTERFACE) target_compile_options(GENERIC_L431RBYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L431RBYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L431RBYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L431RBYX_usb_HID INTERFACE) target_compile_options(GENERIC_L431RBYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L431RBYX_usb_none INTERFACE) target_compile_options(GENERIC_L431RBYX_usb_none INTERFACE @@ -94460,7 +94600,7 @@ set(GENERIC_L431RCIX_MCU cortex-m4) set(GENERIC_L431RCIX_FPCONF "-") add_library(GENERIC_L431RCIX INTERFACE) target_compile_options(GENERIC_L431RCIX INTERFACE - "SHELL:-DSTM32L431xx " + "SHELL:-DSTM32L431xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -94505,15 +94645,15 @@ target_compile_options(GENERIC_L431RCIX_serial_none INTERFACE ) add_library(GENERIC_L431RCIX_usb_CDC INTERFACE) target_compile_options(GENERIC_L431RCIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L431RCIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L431RCIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L431RCIX_usb_HID INTERFACE) target_compile_options(GENERIC_L431RCIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L431RCIX_usb_none INTERFACE) target_compile_options(GENERIC_L431RCIX_usb_none INTERFACE @@ -94542,7 +94682,7 @@ set(GENERIC_L431RCTX_MCU cortex-m4) set(GENERIC_L431RCTX_FPCONF "-") add_library(GENERIC_L431RCTX INTERFACE) target_compile_options(GENERIC_L431RCTX INTERFACE - "SHELL:-DSTM32L431xx " + "SHELL:-DSTM32L431xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -94587,15 +94727,15 @@ target_compile_options(GENERIC_L431RCTX_serial_none INTERFACE ) add_library(GENERIC_L431RCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L431RCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L431RCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L431RCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L431RCTX_usb_HID INTERFACE) target_compile_options(GENERIC_L431RCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L431RCTX_usb_none INTERFACE) target_compile_options(GENERIC_L431RCTX_usb_none INTERFACE @@ -94624,7 +94764,7 @@ set(GENERIC_L431RCYX_MCU cortex-m4) set(GENERIC_L431RCYX_FPCONF "-") add_library(GENERIC_L431RCYX INTERFACE) target_compile_options(GENERIC_L431RCYX INTERFACE - "SHELL:-DSTM32L431xx " + "SHELL:-DSTM32L431xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -94669,15 +94809,15 @@ target_compile_options(GENERIC_L431RCYX_serial_none INTERFACE ) add_library(GENERIC_L431RCYX_usb_CDC INTERFACE) target_compile_options(GENERIC_L431RCYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L431RCYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L431RCYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L431RCYX_usb_HID INTERFACE) target_compile_options(GENERIC_L431RCYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L431RCYX_usb_none INTERFACE) target_compile_options(GENERIC_L431RCYX_usb_none INTERFACE @@ -94706,7 +94846,7 @@ set(GENERIC_L432KBUX_MCU cortex-m4) set(GENERIC_L432KBUX_FPCONF "-") add_library(GENERIC_L432KBUX INTERFACE) target_compile_options(GENERIC_L432KBUX INTERFACE - "SHELL:-DSTM32L432xx " + "SHELL:-DSTM32L432xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -94751,15 +94891,15 @@ target_compile_options(GENERIC_L432KBUX_serial_none INTERFACE ) add_library(GENERIC_L432KBUX_usb_CDC INTERFACE) target_compile_options(GENERIC_L432KBUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L432KBUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L432KBUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L432KBUX_usb_HID INTERFACE) target_compile_options(GENERIC_L432KBUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L432KBUX_usb_none INTERFACE) target_compile_options(GENERIC_L432KBUX_usb_none INTERFACE @@ -94788,7 +94928,7 @@ set(GENERIC_L432KCUX_MCU cortex-m4) set(GENERIC_L432KCUX_FPCONF "-") add_library(GENERIC_L432KCUX INTERFACE) target_compile_options(GENERIC_L432KCUX INTERFACE - "SHELL:-DSTM32L432xx " + "SHELL:-DSTM32L432xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -94833,15 +94973,15 @@ target_compile_options(GENERIC_L432KCUX_serial_none INTERFACE ) add_library(GENERIC_L432KCUX_usb_CDC INTERFACE) target_compile_options(GENERIC_L432KCUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L432KCUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L432KCUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L432KCUX_usb_HID INTERFACE) target_compile_options(GENERIC_L432KCUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L432KCUX_usb_none INTERFACE) target_compile_options(GENERIC_L432KCUX_usb_none INTERFACE @@ -94870,7 +95010,7 @@ set(GENERIC_L433CBTX_MCU cortex-m4) set(GENERIC_L433CBTX_FPCONF "-") add_library(GENERIC_L433CBTX INTERFACE) target_compile_options(GENERIC_L433CBTX INTERFACE - "SHELL:-DSTM32L433xx " + "SHELL:-DSTM32L433xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -94915,15 +95055,15 @@ target_compile_options(GENERIC_L433CBTX_serial_none INTERFACE ) add_library(GENERIC_L433CBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L433CBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L433CBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L433CBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L433CBTX_usb_HID INTERFACE) target_compile_options(GENERIC_L433CBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L433CBTX_usb_none INTERFACE) target_compile_options(GENERIC_L433CBTX_usb_none INTERFACE @@ -94952,7 +95092,7 @@ set(GENERIC_L433CBUX_MCU cortex-m4) set(GENERIC_L433CBUX_FPCONF "-") add_library(GENERIC_L433CBUX INTERFACE) target_compile_options(GENERIC_L433CBUX INTERFACE - "SHELL:-DSTM32L433xx " + "SHELL:-DSTM32L433xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -94997,15 +95137,15 @@ target_compile_options(GENERIC_L433CBUX_serial_none INTERFACE ) add_library(GENERIC_L433CBUX_usb_CDC INTERFACE) target_compile_options(GENERIC_L433CBUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L433CBUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L433CBUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L433CBUX_usb_HID INTERFACE) target_compile_options(GENERIC_L433CBUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L433CBUX_usb_none INTERFACE) target_compile_options(GENERIC_L433CBUX_usb_none INTERFACE @@ -95034,7 +95174,7 @@ set(GENERIC_L433CCTX_MCU cortex-m4) set(GENERIC_L433CCTX_FPCONF "-") add_library(GENERIC_L433CCTX INTERFACE) target_compile_options(GENERIC_L433CCTX INTERFACE - "SHELL:-DSTM32L433xx " + "SHELL:-DSTM32L433xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -95079,15 +95219,15 @@ target_compile_options(GENERIC_L433CCTX_serial_none INTERFACE ) add_library(GENERIC_L433CCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L433CCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L433CCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L433CCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L433CCTX_usb_HID INTERFACE) target_compile_options(GENERIC_L433CCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L433CCTX_usb_none INTERFACE) target_compile_options(GENERIC_L433CCTX_usb_none INTERFACE @@ -95116,7 +95256,7 @@ set(GENERIC_L433CCUX_MCU cortex-m4) set(GENERIC_L433CCUX_FPCONF "-") add_library(GENERIC_L433CCUX INTERFACE) target_compile_options(GENERIC_L433CCUX INTERFACE - "SHELL:-DSTM32L433xx " + "SHELL:-DSTM32L433xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -95161,15 +95301,15 @@ target_compile_options(GENERIC_L433CCUX_serial_none INTERFACE ) add_library(GENERIC_L433CCUX_usb_CDC INTERFACE) target_compile_options(GENERIC_L433CCUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L433CCUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L433CCUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L433CCUX_usb_HID INTERFACE) target_compile_options(GENERIC_L433CCUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L433CCUX_usb_none INTERFACE) target_compile_options(GENERIC_L433CCUX_usb_none INTERFACE @@ -95198,7 +95338,7 @@ set(GENERIC_L433RBIX_MCU cortex-m4) set(GENERIC_L433RBIX_FPCONF "-") add_library(GENERIC_L433RBIX INTERFACE) target_compile_options(GENERIC_L433RBIX INTERFACE - "SHELL:-DSTM32L433xx " + "SHELL:-DSTM32L433xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -95243,15 +95383,15 @@ target_compile_options(GENERIC_L433RBIX_serial_none INTERFACE ) add_library(GENERIC_L433RBIX_usb_CDC INTERFACE) target_compile_options(GENERIC_L433RBIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L433RBIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L433RBIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L433RBIX_usb_HID INTERFACE) target_compile_options(GENERIC_L433RBIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L433RBIX_usb_none INTERFACE) target_compile_options(GENERIC_L433RBIX_usb_none INTERFACE @@ -95280,7 +95420,7 @@ set(GENERIC_L433RBTX_MCU cortex-m4) set(GENERIC_L433RBTX_FPCONF "-") add_library(GENERIC_L433RBTX INTERFACE) target_compile_options(GENERIC_L433RBTX INTERFACE - "SHELL:-DSTM32L433xx " + "SHELL:-DSTM32L433xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -95325,15 +95465,15 @@ target_compile_options(GENERIC_L433RBTX_serial_none INTERFACE ) add_library(GENERIC_L433RBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L433RBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L433RBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L433RBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L433RBTX_usb_HID INTERFACE) target_compile_options(GENERIC_L433RBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L433RBTX_usb_none INTERFACE) target_compile_options(GENERIC_L433RBTX_usb_none INTERFACE @@ -95362,7 +95502,7 @@ set(GENERIC_L433RBYX_MCU cortex-m4) set(GENERIC_L433RBYX_FPCONF "-") add_library(GENERIC_L433RBYX INTERFACE) target_compile_options(GENERIC_L433RBYX INTERFACE - "SHELL:-DSTM32L433xx " + "SHELL:-DSTM32L433xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -95407,15 +95547,15 @@ target_compile_options(GENERIC_L433RBYX_serial_none INTERFACE ) add_library(GENERIC_L433RBYX_usb_CDC INTERFACE) target_compile_options(GENERIC_L433RBYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L433RBYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L433RBYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L433RBYX_usb_HID INTERFACE) target_compile_options(GENERIC_L433RBYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L433RBYX_usb_none INTERFACE) target_compile_options(GENERIC_L433RBYX_usb_none INTERFACE @@ -95444,7 +95584,7 @@ set(GENERIC_L433RCIX_MCU cortex-m4) set(GENERIC_L433RCIX_FPCONF "-") add_library(GENERIC_L433RCIX INTERFACE) target_compile_options(GENERIC_L433RCIX INTERFACE - "SHELL:-DSTM32L433xx " + "SHELL:-DSTM32L433xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -95489,15 +95629,15 @@ target_compile_options(GENERIC_L433RCIX_serial_none INTERFACE ) add_library(GENERIC_L433RCIX_usb_CDC INTERFACE) target_compile_options(GENERIC_L433RCIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L433RCIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L433RCIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L433RCIX_usb_HID INTERFACE) target_compile_options(GENERIC_L433RCIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L433RCIX_usb_none INTERFACE) target_compile_options(GENERIC_L433RCIX_usb_none INTERFACE @@ -95526,7 +95666,7 @@ set(GENERIC_L433RCTX_MCU cortex-m4) set(GENERIC_L433RCTX_FPCONF "-") add_library(GENERIC_L433RCTX INTERFACE) target_compile_options(GENERIC_L433RCTX INTERFACE - "SHELL:-DSTM32L433xx " + "SHELL:-DSTM32L433xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -95571,15 +95711,15 @@ target_compile_options(GENERIC_L433RCTX_serial_none INTERFACE ) add_library(GENERIC_L433RCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L433RCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L433RCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L433RCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L433RCTX_usb_HID INTERFACE) target_compile_options(GENERIC_L433RCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L433RCTX_usb_none INTERFACE) target_compile_options(GENERIC_L433RCTX_usb_none INTERFACE @@ -95608,7 +95748,7 @@ set(GENERIC_L433RCTXP_MCU cortex-m4) set(GENERIC_L433RCTXP_FPCONF "-") add_library(GENERIC_L433RCTXP INTERFACE) target_compile_options(GENERIC_L433RCTXP INTERFACE - "SHELL:-DSTM32L433xx " + "SHELL:-DSTM32L433xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -95653,15 +95793,15 @@ target_compile_options(GENERIC_L433RCTXP_serial_none INTERFACE ) add_library(GENERIC_L433RCTXP_usb_CDC INTERFACE) target_compile_options(GENERIC_L433RCTXP_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L433RCTXP_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L433RCTXP_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L433RCTXP_usb_HID INTERFACE) target_compile_options(GENERIC_L433RCTXP_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L433RCTXP_usb_none INTERFACE) target_compile_options(GENERIC_L433RCTXP_usb_none INTERFACE @@ -95690,7 +95830,7 @@ set(GENERIC_L433RCYX_MCU cortex-m4) set(GENERIC_L433RCYX_FPCONF "-") add_library(GENERIC_L433RCYX INTERFACE) target_compile_options(GENERIC_L433RCYX INTERFACE - "SHELL:-DSTM32L433xx " + "SHELL:-DSTM32L433xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -95735,15 +95875,15 @@ target_compile_options(GENERIC_L433RCYX_serial_none INTERFACE ) add_library(GENERIC_L433RCYX_usb_CDC INTERFACE) target_compile_options(GENERIC_L433RCYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L433RCYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L433RCYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L433RCYX_usb_HID INTERFACE) target_compile_options(GENERIC_L433RCYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L433RCYX_usb_none INTERFACE) target_compile_options(GENERIC_L433RCYX_usb_none INTERFACE @@ -95772,7 +95912,7 @@ set(GENERIC_L442KCUX_MCU cortex-m4) set(GENERIC_L442KCUX_FPCONF "-") add_library(GENERIC_L442KCUX INTERFACE) target_compile_options(GENERIC_L442KCUX INTERFACE - "SHELL:-DSTM32L442xx " + "SHELL:-DSTM32L442xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -95817,15 +95957,15 @@ target_compile_options(GENERIC_L442KCUX_serial_none INTERFACE ) add_library(GENERIC_L442KCUX_usb_CDC INTERFACE) target_compile_options(GENERIC_L442KCUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L442KCUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L442KCUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L442KCUX_usb_HID INTERFACE) target_compile_options(GENERIC_L442KCUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L442KCUX_usb_none INTERFACE) target_compile_options(GENERIC_L442KCUX_usb_none INTERFACE @@ -95854,7 +95994,7 @@ set(GENERIC_L443CCTX_MCU cortex-m4) set(GENERIC_L443CCTX_FPCONF "-") add_library(GENERIC_L443CCTX INTERFACE) target_compile_options(GENERIC_L443CCTX INTERFACE - "SHELL:-DSTM32L443xx " + "SHELL:-DSTM32L443xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -95899,15 +96039,15 @@ target_compile_options(GENERIC_L443CCTX_serial_none INTERFACE ) add_library(GENERIC_L443CCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L443CCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L443CCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L443CCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L443CCTX_usb_HID INTERFACE) target_compile_options(GENERIC_L443CCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L443CCTX_usb_none INTERFACE) target_compile_options(GENERIC_L443CCTX_usb_none INTERFACE @@ -95936,7 +96076,7 @@ set(GENERIC_L443CCUX_MCU cortex-m4) set(GENERIC_L443CCUX_FPCONF "-") add_library(GENERIC_L443CCUX INTERFACE) target_compile_options(GENERIC_L443CCUX INTERFACE - "SHELL:-DSTM32L443xx " + "SHELL:-DSTM32L443xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -95981,15 +96121,15 @@ target_compile_options(GENERIC_L443CCUX_serial_none INTERFACE ) add_library(GENERIC_L443CCUX_usb_CDC INTERFACE) target_compile_options(GENERIC_L443CCUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L443CCUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L443CCUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L443CCUX_usb_HID INTERFACE) target_compile_options(GENERIC_L443CCUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L443CCUX_usb_none INTERFACE) target_compile_options(GENERIC_L443CCUX_usb_none INTERFACE @@ -96018,7 +96158,7 @@ set(GENERIC_L443RCIX_MCU cortex-m4) set(GENERIC_L443RCIX_FPCONF "-") add_library(GENERIC_L443RCIX INTERFACE) target_compile_options(GENERIC_L443RCIX INTERFACE - "SHELL:-DSTM32L443xx " + "SHELL:-DSTM32L443xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -96063,15 +96203,15 @@ target_compile_options(GENERIC_L443RCIX_serial_none INTERFACE ) add_library(GENERIC_L443RCIX_usb_CDC INTERFACE) target_compile_options(GENERIC_L443RCIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L443RCIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L443RCIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L443RCIX_usb_HID INTERFACE) target_compile_options(GENERIC_L443RCIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L443RCIX_usb_none INTERFACE) target_compile_options(GENERIC_L443RCIX_usb_none INTERFACE @@ -96100,7 +96240,7 @@ set(GENERIC_L443RCTX_MCU cortex-m4) set(GENERIC_L443RCTX_FPCONF "-") add_library(GENERIC_L443RCTX INTERFACE) target_compile_options(GENERIC_L443RCTX INTERFACE - "SHELL:-DSTM32L443xx " + "SHELL:-DSTM32L443xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -96145,15 +96285,15 @@ target_compile_options(GENERIC_L443RCTX_serial_none INTERFACE ) add_library(GENERIC_L443RCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L443RCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L443RCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L443RCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L443RCTX_usb_HID INTERFACE) target_compile_options(GENERIC_L443RCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L443RCTX_usb_none INTERFACE) target_compile_options(GENERIC_L443RCTX_usb_none INTERFACE @@ -96182,7 +96322,7 @@ set(GENERIC_L443RCYX_MCU cortex-m4) set(GENERIC_L443RCYX_FPCONF "-") add_library(GENERIC_L443RCYX INTERFACE) target_compile_options(GENERIC_L443RCYX INTERFACE - "SHELL:-DSTM32L443xx " + "SHELL:-DSTM32L443xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -96227,15 +96367,15 @@ target_compile_options(GENERIC_L443RCYX_serial_none INTERFACE ) add_library(GENERIC_L443RCYX_usb_CDC INTERFACE) target_compile_options(GENERIC_L443RCYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L443RCYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L443RCYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L443RCYX_usb_HID INTERFACE) target_compile_options(GENERIC_L443RCYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L443RCYX_usb_none INTERFACE) target_compile_options(GENERIC_L443RCYX_usb_none INTERFACE @@ -96264,7 +96404,7 @@ set(GENERIC_L452RCIX_MCU cortex-m4) set(GENERIC_L452RCIX_FPCONF "-") add_library(GENERIC_L452RCIX INTERFACE) target_compile_options(GENERIC_L452RCIX INTERFACE - "SHELL:-DSTM32L452xx " + "SHELL:-DSTM32L452xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -96309,15 +96449,15 @@ target_compile_options(GENERIC_L452RCIX_serial_none INTERFACE ) add_library(GENERIC_L452RCIX_usb_CDC INTERFACE) target_compile_options(GENERIC_L452RCIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L452RCIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L452RCIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L452RCIX_usb_HID INTERFACE) target_compile_options(GENERIC_L452RCIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L452RCIX_usb_none INTERFACE) target_compile_options(GENERIC_L452RCIX_usb_none INTERFACE @@ -96346,7 +96486,7 @@ set(GENERIC_L452RCTX_MCU cortex-m4) set(GENERIC_L452RCTX_FPCONF "-") add_library(GENERIC_L452RCTX INTERFACE) target_compile_options(GENERIC_L452RCTX INTERFACE - "SHELL:-DSTM32L452xx " + "SHELL:-DSTM32L452xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -96391,15 +96531,15 @@ target_compile_options(GENERIC_L452RCTX_serial_none INTERFACE ) add_library(GENERIC_L452RCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L452RCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L452RCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L452RCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L452RCTX_usb_HID INTERFACE) target_compile_options(GENERIC_L452RCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L452RCTX_usb_none INTERFACE) target_compile_options(GENERIC_L452RCTX_usb_none INTERFACE @@ -96428,7 +96568,7 @@ set(GENERIC_L452RCYX_MCU cortex-m4) set(GENERIC_L452RCYX_FPCONF "-") add_library(GENERIC_L452RCYX INTERFACE) target_compile_options(GENERIC_L452RCYX INTERFACE - "SHELL:-DSTM32L452xx " + "SHELL:-DSTM32L452xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -96473,15 +96613,15 @@ target_compile_options(GENERIC_L452RCYX_serial_none INTERFACE ) add_library(GENERIC_L452RCYX_usb_CDC INTERFACE) target_compile_options(GENERIC_L452RCYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L452RCYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L452RCYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L452RCYX_usb_HID INTERFACE) target_compile_options(GENERIC_L452RCYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L452RCYX_usb_none INTERFACE) target_compile_options(GENERIC_L452RCYX_usb_none INTERFACE @@ -96510,7 +96650,7 @@ set(GENERIC_L452REIX_MCU cortex-m4) set(GENERIC_L452REIX_FPCONF "-") add_library(GENERIC_L452REIX INTERFACE) target_compile_options(GENERIC_L452REIX INTERFACE - "SHELL:-DSTM32L452xx " + "SHELL:-DSTM32L452xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -96555,15 +96695,15 @@ target_compile_options(GENERIC_L452REIX_serial_none INTERFACE ) add_library(GENERIC_L452REIX_usb_CDC INTERFACE) target_compile_options(GENERIC_L452REIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L452REIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L452REIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L452REIX_usb_HID INTERFACE) target_compile_options(GENERIC_L452REIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L452REIX_usb_none INTERFACE) target_compile_options(GENERIC_L452REIX_usb_none INTERFACE @@ -96592,7 +96732,7 @@ set(GENERIC_L452RETX_MCU cortex-m4) set(GENERIC_L452RETX_FPCONF "-") add_library(GENERIC_L452RETX INTERFACE) target_compile_options(GENERIC_L452RETX INTERFACE - "SHELL:-DSTM32L452xx " + "SHELL:-DSTM32L452xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -96637,15 +96777,15 @@ target_compile_options(GENERIC_L452RETX_serial_none INTERFACE ) add_library(GENERIC_L452RETX_usb_CDC INTERFACE) target_compile_options(GENERIC_L452RETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L452RETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L452RETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L452RETX_usb_HID INTERFACE) target_compile_options(GENERIC_L452RETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L452RETX_usb_none INTERFACE) target_compile_options(GENERIC_L452RETX_usb_none INTERFACE @@ -96674,7 +96814,7 @@ set(GENERIC_L452RETXP_MCU cortex-m4) set(GENERIC_L452RETXP_FPCONF "-") add_library(GENERIC_L452RETXP INTERFACE) target_compile_options(GENERIC_L452RETXP INTERFACE - "SHELL:-DSTM32L452xx " + "SHELL:-DSTM32L452xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -96719,15 +96859,15 @@ target_compile_options(GENERIC_L452RETXP_serial_none INTERFACE ) add_library(GENERIC_L452RETXP_usb_CDC INTERFACE) target_compile_options(GENERIC_L452RETXP_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L452RETXP_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L452RETXP_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L452RETXP_usb_HID INTERFACE) target_compile_options(GENERIC_L452RETXP_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L452RETXP_usb_none INTERFACE) target_compile_options(GENERIC_L452RETXP_usb_none INTERFACE @@ -96756,7 +96896,7 @@ set(GENERIC_L452REYX_MCU cortex-m4) set(GENERIC_L452REYX_FPCONF "-") add_library(GENERIC_L452REYX INTERFACE) target_compile_options(GENERIC_L452REYX INTERFACE - "SHELL:-DSTM32L452xx " + "SHELL:-DSTM32L452xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -96801,15 +96941,15 @@ target_compile_options(GENERIC_L452REYX_serial_none INTERFACE ) add_library(GENERIC_L452REYX_usb_CDC INTERFACE) target_compile_options(GENERIC_L452REYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L452REYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L452REYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L452REYX_usb_HID INTERFACE) target_compile_options(GENERIC_L452REYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L452REYX_usb_none INTERFACE) target_compile_options(GENERIC_L452REYX_usb_none INTERFACE @@ -96838,7 +96978,7 @@ set(GENERIC_L462REIX_MCU cortex-m4) set(GENERIC_L462REIX_FPCONF "-") add_library(GENERIC_L462REIX INTERFACE) target_compile_options(GENERIC_L462REIX INTERFACE - "SHELL:-DSTM32L462xx " + "SHELL:-DSTM32L462xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -96883,15 +97023,15 @@ target_compile_options(GENERIC_L462REIX_serial_none INTERFACE ) add_library(GENERIC_L462REIX_usb_CDC INTERFACE) target_compile_options(GENERIC_L462REIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L462REIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L462REIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L462REIX_usb_HID INTERFACE) target_compile_options(GENERIC_L462REIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L462REIX_usb_none INTERFACE) target_compile_options(GENERIC_L462REIX_usb_none INTERFACE @@ -96920,7 +97060,7 @@ set(GENERIC_L462RETX_MCU cortex-m4) set(GENERIC_L462RETX_FPCONF "-") add_library(GENERIC_L462RETX INTERFACE) target_compile_options(GENERIC_L462RETX INTERFACE - "SHELL:-DSTM32L462xx " + "SHELL:-DSTM32L462xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -96965,15 +97105,15 @@ target_compile_options(GENERIC_L462RETX_serial_none INTERFACE ) add_library(GENERIC_L462RETX_usb_CDC INTERFACE) target_compile_options(GENERIC_L462RETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L462RETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L462RETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L462RETX_usb_HID INTERFACE) target_compile_options(GENERIC_L462RETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L462RETX_usb_none INTERFACE) target_compile_options(GENERIC_L462RETX_usb_none INTERFACE @@ -97002,7 +97142,7 @@ set(GENERIC_L462REYX_MCU cortex-m4) set(GENERIC_L462REYX_FPCONF "-") add_library(GENERIC_L462REYX INTERFACE) target_compile_options(GENERIC_L462REYX INTERFACE - "SHELL:-DSTM32L462xx " + "SHELL:-DSTM32L462xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -97047,15 +97187,15 @@ target_compile_options(GENERIC_L462REYX_serial_none INTERFACE ) add_library(GENERIC_L462REYX_usb_CDC INTERFACE) target_compile_options(GENERIC_L462REYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L462REYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L462REYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L462REYX_usb_HID INTERFACE) target_compile_options(GENERIC_L462REYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L462REYX_usb_none INTERFACE) target_compile_options(GENERIC_L462REYX_usb_none INTERFACE @@ -97084,7 +97224,7 @@ set(GENERIC_L475RCTX_MCU cortex-m4) set(GENERIC_L475RCTX_FPCONF "-") add_library(GENERIC_L475RCTX INTERFACE) target_compile_options(GENERIC_L475RCTX INTERFACE - "SHELL:-DSTM32L475xx " + "SHELL:-DSTM32L475xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -97129,15 +97269,15 @@ target_compile_options(GENERIC_L475RCTX_serial_none INTERFACE ) add_library(GENERIC_L475RCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L475RCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L475RCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L475RCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L475RCTX_usb_HID INTERFACE) target_compile_options(GENERIC_L475RCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L475RCTX_usb_none INTERFACE) target_compile_options(GENERIC_L475RCTX_usb_none INTERFACE @@ -97166,7 +97306,7 @@ set(GENERIC_L475RETX_MCU cortex-m4) set(GENERIC_L475RETX_FPCONF "-") add_library(GENERIC_L475RETX INTERFACE) target_compile_options(GENERIC_L475RETX INTERFACE - "SHELL:-DSTM32L475xx " + "SHELL:-DSTM32L475xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -97211,15 +97351,15 @@ target_compile_options(GENERIC_L475RETX_serial_none INTERFACE ) add_library(GENERIC_L475RETX_usb_CDC INTERFACE) target_compile_options(GENERIC_L475RETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L475RETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L475RETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L475RETX_usb_HID INTERFACE) target_compile_options(GENERIC_L475RETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L475RETX_usb_none INTERFACE) target_compile_options(GENERIC_L475RETX_usb_none INTERFACE @@ -97248,7 +97388,7 @@ set(GENERIC_L475RGTX_MCU cortex-m4) set(GENERIC_L475RGTX_FPCONF "-") add_library(GENERIC_L475RGTX INTERFACE) target_compile_options(GENERIC_L475RGTX INTERFACE - "SHELL:-DSTM32L475xx " + "SHELL:-DSTM32L475xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -97293,15 +97433,15 @@ target_compile_options(GENERIC_L475RGTX_serial_none INTERFACE ) add_library(GENERIC_L475RGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L475RGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L475RGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L475RGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L475RGTX_usb_HID INTERFACE) target_compile_options(GENERIC_L475RGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L475RGTX_usb_none INTERFACE) target_compile_options(GENERIC_L475RGTX_usb_none INTERFACE @@ -97330,7 +97470,7 @@ set(GENERIC_L475VCTX_MCU cortex-m4) set(GENERIC_L475VCTX_FPCONF "-") add_library(GENERIC_L475VCTX INTERFACE) target_compile_options(GENERIC_L475VCTX INTERFACE - "SHELL:-DSTM32L475xx " + "SHELL:-DSTM32L475xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -97375,15 +97515,15 @@ target_compile_options(GENERIC_L475VCTX_serial_none INTERFACE ) add_library(GENERIC_L475VCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L475VCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L475VCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L475VCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L475VCTX_usb_HID INTERFACE) target_compile_options(GENERIC_L475VCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L475VCTX_usb_none INTERFACE) target_compile_options(GENERIC_L475VCTX_usb_none INTERFACE @@ -97412,7 +97552,7 @@ set(GENERIC_L475VETX_MCU cortex-m4) set(GENERIC_L475VETX_FPCONF "-") add_library(GENERIC_L475VETX INTERFACE) target_compile_options(GENERIC_L475VETX INTERFACE - "SHELL:-DSTM32L475xx " + "SHELL:-DSTM32L475xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -97457,15 +97597,15 @@ target_compile_options(GENERIC_L475VETX_serial_none INTERFACE ) add_library(GENERIC_L475VETX_usb_CDC INTERFACE) target_compile_options(GENERIC_L475VETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L475VETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L475VETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L475VETX_usb_HID INTERFACE) target_compile_options(GENERIC_L475VETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L475VETX_usb_none INTERFACE) target_compile_options(GENERIC_L475VETX_usb_none INTERFACE @@ -97494,7 +97634,7 @@ set(GENERIC_L475VGTX_MCU cortex-m4) set(GENERIC_L475VGTX_FPCONF "-") add_library(GENERIC_L475VGTX INTERFACE) target_compile_options(GENERIC_L475VGTX INTERFACE - "SHELL:-DSTM32L475xx " + "SHELL:-DSTM32L475xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -97539,15 +97679,15 @@ target_compile_options(GENERIC_L475VGTX_serial_none INTERFACE ) add_library(GENERIC_L475VGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L475VGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L475VGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L475VGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L475VGTX_usb_HID INTERFACE) target_compile_options(GENERIC_L475VGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L475VGTX_usb_none INTERFACE) target_compile_options(GENERIC_L475VGTX_usb_none INTERFACE @@ -97576,7 +97716,7 @@ set(GENERIC_L476RCTX_MCU cortex-m4) set(GENERIC_L476RCTX_FPCONF "-") add_library(GENERIC_L476RCTX INTERFACE) target_compile_options(GENERIC_L476RCTX INTERFACE - "SHELL:-DSTM32L476xx " + "SHELL:-DSTM32L476xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -97621,15 +97761,15 @@ target_compile_options(GENERIC_L476RCTX_serial_none INTERFACE ) add_library(GENERIC_L476RCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L476RCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L476RCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L476RCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L476RCTX_usb_HID INTERFACE) target_compile_options(GENERIC_L476RCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L476RCTX_usb_none INTERFACE) target_compile_options(GENERIC_L476RCTX_usb_none INTERFACE @@ -97658,7 +97798,7 @@ set(GENERIC_L476RETX_MCU cortex-m4) set(GENERIC_L476RETX_FPCONF "-") add_library(GENERIC_L476RETX INTERFACE) target_compile_options(GENERIC_L476RETX INTERFACE - "SHELL:-DSTM32L476xx " + "SHELL:-DSTM32L476xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -97703,15 +97843,15 @@ target_compile_options(GENERIC_L476RETX_serial_none INTERFACE ) add_library(GENERIC_L476RETX_usb_CDC INTERFACE) target_compile_options(GENERIC_L476RETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L476RETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L476RETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L476RETX_usb_HID INTERFACE) target_compile_options(GENERIC_L476RETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L476RETX_usb_none INTERFACE) target_compile_options(GENERIC_L476RETX_usb_none INTERFACE @@ -97740,7 +97880,7 @@ set(GENERIC_L476RGTX_MCU cortex-m4) set(GENERIC_L476RGTX_FPCONF "-") add_library(GENERIC_L476RGTX INTERFACE) target_compile_options(GENERIC_L476RGTX INTERFACE - "SHELL:-DSTM32L476xx " + "SHELL:-DSTM32L476xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -97785,15 +97925,15 @@ target_compile_options(GENERIC_L476RGTX_serial_none INTERFACE ) add_library(GENERIC_L476RGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L476RGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L476RGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L476RGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L476RGTX_usb_HID INTERFACE) target_compile_options(GENERIC_L476RGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L476RGTX_usb_none INTERFACE) target_compile_options(GENERIC_L476RGTX_usb_none INTERFACE @@ -97822,7 +97962,7 @@ set(GENERIC_L476VCTX_MCU cortex-m4) set(GENERIC_L476VCTX_FPCONF "-") add_library(GENERIC_L476VCTX INTERFACE) target_compile_options(GENERIC_L476VCTX INTERFACE - "SHELL:-DSTM32L476xx " + "SHELL:-DSTM32L476xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -97867,15 +98007,15 @@ target_compile_options(GENERIC_L476VCTX_serial_none INTERFACE ) add_library(GENERIC_L476VCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L476VCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L476VCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L476VCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L476VCTX_usb_HID INTERFACE) target_compile_options(GENERIC_L476VCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L476VCTX_usb_none INTERFACE) target_compile_options(GENERIC_L476VCTX_usb_none INTERFACE @@ -97904,7 +98044,7 @@ set(GENERIC_L476VETX_MCU cortex-m4) set(GENERIC_L476VETX_FPCONF "-") add_library(GENERIC_L476VETX INTERFACE) target_compile_options(GENERIC_L476VETX INTERFACE - "SHELL:-DSTM32L476xx " + "SHELL:-DSTM32L476xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -97949,15 +98089,15 @@ target_compile_options(GENERIC_L476VETX_serial_none INTERFACE ) add_library(GENERIC_L476VETX_usb_CDC INTERFACE) target_compile_options(GENERIC_L476VETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L476VETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L476VETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L476VETX_usb_HID INTERFACE) target_compile_options(GENERIC_L476VETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L476VETX_usb_none INTERFACE) target_compile_options(GENERIC_L476VETX_usb_none INTERFACE @@ -97986,7 +98126,7 @@ set(GENERIC_L476VGTX_MCU cortex-m4) set(GENERIC_L476VGTX_FPCONF "-") add_library(GENERIC_L476VGTX INTERFACE) target_compile_options(GENERIC_L476VGTX INTERFACE - "SHELL:-DSTM32L476xx " + "SHELL:-DSTM32L476xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -98031,15 +98171,15 @@ target_compile_options(GENERIC_L476VGTX_serial_none INTERFACE ) add_library(GENERIC_L476VGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L476VGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L476VGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L476VGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L476VGTX_usb_HID INTERFACE) target_compile_options(GENERIC_L476VGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L476VGTX_usb_none INTERFACE) target_compile_options(GENERIC_L476VGTX_usb_none INTERFACE @@ -98068,7 +98208,7 @@ set(GENERIC_L486RGTX_MCU cortex-m4) set(GENERIC_L486RGTX_FPCONF "-") add_library(GENERIC_L486RGTX INTERFACE) target_compile_options(GENERIC_L486RGTX INTERFACE - "SHELL:-DSTM32L486xx " + "SHELL:-DSTM32L486xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -98113,15 +98253,15 @@ target_compile_options(GENERIC_L486RGTX_serial_none INTERFACE ) add_library(GENERIC_L486RGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L486RGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L486RGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L486RGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L486RGTX_usb_HID INTERFACE) target_compile_options(GENERIC_L486RGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L486RGTX_usb_none INTERFACE) target_compile_options(GENERIC_L486RGTX_usb_none INTERFACE @@ -98150,7 +98290,7 @@ set(GENERIC_L486VGTX_MCU cortex-m4) set(GENERIC_L486VGTX_FPCONF "-") add_library(GENERIC_L486VGTX INTERFACE) target_compile_options(GENERIC_L486VGTX INTERFACE - "SHELL:-DSTM32L486xx " + "SHELL:-DSTM32L486xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -98195,15 +98335,15 @@ target_compile_options(GENERIC_L486VGTX_serial_none INTERFACE ) add_library(GENERIC_L486VGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L486VGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L486VGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L486VGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L486VGTX_usb_HID INTERFACE) target_compile_options(GENERIC_L486VGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L486VGTX_usb_none INTERFACE) target_compile_options(GENERIC_L486VGTX_usb_none INTERFACE @@ -98232,7 +98372,7 @@ set(GENERIC_L496ZETX_MCU cortex-m4) set(GENERIC_L496ZETX_FPCONF "-") add_library(GENERIC_L496ZETX INTERFACE) target_compile_options(GENERIC_L496ZETX INTERFACE - "SHELL:-DSTM32L496xx " + "SHELL:-DSTM32L496xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -98277,15 +98417,15 @@ target_compile_options(GENERIC_L496ZETX_serial_none INTERFACE ) add_library(GENERIC_L496ZETX_usb_CDC INTERFACE) target_compile_options(GENERIC_L496ZETX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L496ZETX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L496ZETX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L496ZETX_usb_HID INTERFACE) target_compile_options(GENERIC_L496ZETX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L496ZETX_usb_none INTERFACE) target_compile_options(GENERIC_L496ZETX_usb_none INTERFACE @@ -98314,7 +98454,7 @@ set(GENERIC_L496ZGTX_MCU cortex-m4) set(GENERIC_L496ZGTX_FPCONF "-") add_library(GENERIC_L496ZGTX INTERFACE) target_compile_options(GENERIC_L496ZGTX INTERFACE - "SHELL:-DSTM32L496xx " + "SHELL:-DSTM32L496xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -98359,15 +98499,15 @@ target_compile_options(GENERIC_L496ZGTX_serial_none INTERFACE ) add_library(GENERIC_L496ZGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L496ZGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L496ZGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L496ZGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L496ZGTX_usb_HID INTERFACE) target_compile_options(GENERIC_L496ZGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L496ZGTX_usb_none INTERFACE) target_compile_options(GENERIC_L496ZGTX_usb_none INTERFACE @@ -98396,7 +98536,7 @@ set(GENERIC_L496ZGTXP_MCU cortex-m4) set(GENERIC_L496ZGTXP_FPCONF "-") add_library(GENERIC_L496ZGTXP INTERFACE) target_compile_options(GENERIC_L496ZGTXP INTERFACE - "SHELL:-DSTM32L496xx " + "SHELL:-DSTM32L496xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -98441,15 +98581,15 @@ target_compile_options(GENERIC_L496ZGTXP_serial_none INTERFACE ) add_library(GENERIC_L496ZGTXP_usb_CDC INTERFACE) target_compile_options(GENERIC_L496ZGTXP_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L496ZGTXP_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L496ZGTXP_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L496ZGTXP_usb_HID INTERFACE) target_compile_options(GENERIC_L496ZGTXP_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L496ZGTXP_usb_none INTERFACE) target_compile_options(GENERIC_L496ZGTXP_usb_none INTERFACE @@ -98478,7 +98618,7 @@ set(GENERIC_L4A6ZGTX_MCU cortex-m4) set(GENERIC_L4A6ZGTX_FPCONF "-") add_library(GENERIC_L4A6ZGTX INTERFACE) target_compile_options(GENERIC_L4A6ZGTX INTERFACE - "SHELL:-DSTM32L4A6xx " + "SHELL:-DSTM32L4A6xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -98523,15 +98663,15 @@ target_compile_options(GENERIC_L4A6ZGTX_serial_none INTERFACE ) add_library(GENERIC_L4A6ZGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L4A6ZGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L4A6ZGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L4A6ZGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L4A6ZGTX_usb_HID INTERFACE) target_compile_options(GENERIC_L4A6ZGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L4A6ZGTX_usb_none INTERFACE) target_compile_options(GENERIC_L4A6ZGTX_usb_none INTERFACE @@ -98560,7 +98700,7 @@ set(GENERIC_L4A6ZGTXP_MCU cortex-m4) set(GENERIC_L4A6ZGTXP_FPCONF "-") add_library(GENERIC_L4A6ZGTXP INTERFACE) target_compile_options(GENERIC_L4A6ZGTXP INTERFACE - "SHELL:-DSTM32L4A6xx " + "SHELL:-DSTM32L4A6xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -98605,15 +98745,15 @@ target_compile_options(GENERIC_L4A6ZGTXP_serial_none INTERFACE ) add_library(GENERIC_L4A6ZGTXP_usb_CDC INTERFACE) target_compile_options(GENERIC_L4A6ZGTXP_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L4A6ZGTXP_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L4A6ZGTXP_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L4A6ZGTXP_usb_HID INTERFACE) target_compile_options(GENERIC_L4A6ZGTXP_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L4A6ZGTXP_usb_none INTERFACE) target_compile_options(GENERIC_L4A6ZGTXP_usb_none INTERFACE @@ -98642,7 +98782,7 @@ set(GENERIC_L4R5VGTX_MCU cortex-m4) set(GENERIC_L4R5VGTX_FPCONF "-") add_library(GENERIC_L4R5VGTX INTERFACE) target_compile_options(GENERIC_L4R5VGTX INTERFACE - "SHELL:-DSTM32L4R5xx " + "SHELL:-DSTM32L4R5xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -98687,15 +98827,15 @@ target_compile_options(GENERIC_L4R5VGTX_serial_none INTERFACE ) add_library(GENERIC_L4R5VGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L4R5VGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L4R5VGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L4R5VGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L4R5VGTX_usb_HID INTERFACE) target_compile_options(GENERIC_L4R5VGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L4R5VGTX_usb_none INTERFACE) target_compile_options(GENERIC_L4R5VGTX_usb_none INTERFACE @@ -98724,7 +98864,7 @@ set(GENERIC_L4R5VITX_MCU cortex-m4) set(GENERIC_L4R5VITX_FPCONF "-") add_library(GENERIC_L4R5VITX INTERFACE) target_compile_options(GENERIC_L4R5VITX INTERFACE - "SHELL:-DSTM32L4R5xx " + "SHELL:-DSTM32L4R5xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -98769,15 +98909,15 @@ target_compile_options(GENERIC_L4R5VITX_serial_none INTERFACE ) add_library(GENERIC_L4R5VITX_usb_CDC INTERFACE) target_compile_options(GENERIC_L4R5VITX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L4R5VITX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L4R5VITX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L4R5VITX_usb_HID INTERFACE) target_compile_options(GENERIC_L4R5VITX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L4R5VITX_usb_none INTERFACE) target_compile_options(GENERIC_L4R5VITX_usb_none INTERFACE @@ -98806,7 +98946,7 @@ set(GENERIC_L4R5ZGTX_MCU cortex-m4) set(GENERIC_L4R5ZGTX_FPCONF "-") add_library(GENERIC_L4R5ZGTX INTERFACE) target_compile_options(GENERIC_L4R5ZGTX INTERFACE - "SHELL:-DSTM32L4R5xx " + "SHELL:-DSTM32L4R5xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -98851,15 +98991,15 @@ target_compile_options(GENERIC_L4R5ZGTX_serial_none INTERFACE ) add_library(GENERIC_L4R5ZGTX_usb_CDC INTERFACE) target_compile_options(GENERIC_L4R5ZGTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L4R5ZGTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L4R5ZGTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L4R5ZGTX_usb_HID INTERFACE) target_compile_options(GENERIC_L4R5ZGTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L4R5ZGTX_usb_none INTERFACE) target_compile_options(GENERIC_L4R5ZGTX_usb_none INTERFACE @@ -98888,7 +99028,7 @@ set(GENERIC_L4R5ZGYX_MCU cortex-m4) set(GENERIC_L4R5ZGYX_FPCONF "-") add_library(GENERIC_L4R5ZGYX INTERFACE) target_compile_options(GENERIC_L4R5ZGYX INTERFACE - "SHELL:-DSTM32L4R5xx " + "SHELL:-DSTM32L4R5xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -98933,15 +99073,15 @@ target_compile_options(GENERIC_L4R5ZGYX_serial_none INTERFACE ) add_library(GENERIC_L4R5ZGYX_usb_CDC INTERFACE) target_compile_options(GENERIC_L4R5ZGYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L4R5ZGYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L4R5ZGYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L4R5ZGYX_usb_HID INTERFACE) target_compile_options(GENERIC_L4R5ZGYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L4R5ZGYX_usb_none INTERFACE) target_compile_options(GENERIC_L4R5ZGYX_usb_none INTERFACE @@ -98970,7 +99110,7 @@ set(GENERIC_L4R5ZITX_MCU cortex-m4) set(GENERIC_L4R5ZITX_FPCONF "-") add_library(GENERIC_L4R5ZITX INTERFACE) target_compile_options(GENERIC_L4R5ZITX INTERFACE - "SHELL:-DSTM32L4R5xx " + "SHELL:-DSTM32L4R5xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -99015,15 +99155,15 @@ target_compile_options(GENERIC_L4R5ZITX_serial_none INTERFACE ) add_library(GENERIC_L4R5ZITX_usb_CDC INTERFACE) target_compile_options(GENERIC_L4R5ZITX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L4R5ZITX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L4R5ZITX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L4R5ZITX_usb_HID INTERFACE) target_compile_options(GENERIC_L4R5ZITX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L4R5ZITX_usb_none INTERFACE) target_compile_options(GENERIC_L4R5ZITX_usb_none INTERFACE @@ -99052,7 +99192,7 @@ set(GENERIC_L4R5ZITXP_MCU cortex-m4) set(GENERIC_L4R5ZITXP_FPCONF "-") add_library(GENERIC_L4R5ZITXP INTERFACE) target_compile_options(GENERIC_L4R5ZITXP INTERFACE - "SHELL:-DSTM32L4R5xx " + "SHELL:-DSTM32L4R5xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -99097,15 +99237,15 @@ target_compile_options(GENERIC_L4R5ZITXP_serial_none INTERFACE ) add_library(GENERIC_L4R5ZITXP_usb_CDC INTERFACE) target_compile_options(GENERIC_L4R5ZITXP_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L4R5ZITXP_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L4R5ZITXP_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L4R5ZITXP_usb_HID INTERFACE) target_compile_options(GENERIC_L4R5ZITXP_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L4R5ZITXP_usb_none INTERFACE) target_compile_options(GENERIC_L4R5ZITXP_usb_none INTERFACE @@ -99134,7 +99274,7 @@ set(GENERIC_L4R5ZIYX_MCU cortex-m4) set(GENERIC_L4R5ZIYX_FPCONF "-") add_library(GENERIC_L4R5ZIYX INTERFACE) target_compile_options(GENERIC_L4R5ZIYX INTERFACE - "SHELL:-DSTM32L4R5xx " + "SHELL:-DSTM32L4R5xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -99179,15 +99319,15 @@ target_compile_options(GENERIC_L4R5ZIYX_serial_none INTERFACE ) add_library(GENERIC_L4R5ZIYX_usb_CDC INTERFACE) target_compile_options(GENERIC_L4R5ZIYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L4R5ZIYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L4R5ZIYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L4R5ZIYX_usb_HID INTERFACE) target_compile_options(GENERIC_L4R5ZIYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L4R5ZIYX_usb_none INTERFACE) target_compile_options(GENERIC_L4R5ZIYX_usb_none INTERFACE @@ -99216,7 +99356,7 @@ set(GENERIC_L4R7VITX_MCU cortex-m4) set(GENERIC_L4R7VITX_FPCONF "-") add_library(GENERIC_L4R7VITX INTERFACE) target_compile_options(GENERIC_L4R7VITX INTERFACE - "SHELL:-DSTM32L4R7xx " + "SHELL:-DSTM32L4R7xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -99261,15 +99401,15 @@ target_compile_options(GENERIC_L4R7VITX_serial_none INTERFACE ) add_library(GENERIC_L4R7VITX_usb_CDC INTERFACE) target_compile_options(GENERIC_L4R7VITX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L4R7VITX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L4R7VITX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L4R7VITX_usb_HID INTERFACE) target_compile_options(GENERIC_L4R7VITX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L4R7VITX_usb_none INTERFACE) target_compile_options(GENERIC_L4R7VITX_usb_none INTERFACE @@ -99298,7 +99438,7 @@ set(GENERIC_L4R7ZITX_MCU cortex-m4) set(GENERIC_L4R7ZITX_FPCONF "-") add_library(GENERIC_L4R7ZITX INTERFACE) target_compile_options(GENERIC_L4R7ZITX INTERFACE - "SHELL:-DSTM32L4R7xx " + "SHELL:-DSTM32L4R7xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -99343,15 +99483,15 @@ target_compile_options(GENERIC_L4R7ZITX_serial_none INTERFACE ) add_library(GENERIC_L4R7ZITX_usb_CDC INTERFACE) target_compile_options(GENERIC_L4R7ZITX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L4R7ZITX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L4R7ZITX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L4R7ZITX_usb_HID INTERFACE) target_compile_options(GENERIC_L4R7ZITX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L4R7ZITX_usb_none INTERFACE) target_compile_options(GENERIC_L4R7ZITX_usb_none INTERFACE @@ -99380,7 +99520,7 @@ set(GENERIC_L4R9ZGJX_MCU cortex-m4) set(GENERIC_L4R9ZGJX_FPCONF "-") add_library(GENERIC_L4R9ZGJX INTERFACE) target_compile_options(GENERIC_L4R9ZGJX INTERFACE - "SHELL:-DSTM32L4R9xx " + "SHELL:-DSTM32L4R9xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -99425,15 +99565,15 @@ target_compile_options(GENERIC_L4R9ZGJX_serial_none INTERFACE ) add_library(GENERIC_L4R9ZGJX_usb_CDC INTERFACE) target_compile_options(GENERIC_L4R9ZGJX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L4R9ZGJX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L4R9ZGJX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L4R9ZGJX_usb_HID INTERFACE) target_compile_options(GENERIC_L4R9ZGJX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L4R9ZGJX_usb_none INTERFACE) target_compile_options(GENERIC_L4R9ZGJX_usb_none INTERFACE @@ -99462,7 +99602,7 @@ set(GENERIC_L4R9ZGYX_MCU cortex-m4) set(GENERIC_L4R9ZGYX_FPCONF "-") add_library(GENERIC_L4R9ZGYX INTERFACE) target_compile_options(GENERIC_L4R9ZGYX INTERFACE - "SHELL:-DSTM32L4R9xx " + "SHELL:-DSTM32L4R9xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -99507,15 +99647,15 @@ target_compile_options(GENERIC_L4R9ZGYX_serial_none INTERFACE ) add_library(GENERIC_L4R9ZGYX_usb_CDC INTERFACE) target_compile_options(GENERIC_L4R9ZGYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L4R9ZGYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L4R9ZGYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L4R9ZGYX_usb_HID INTERFACE) target_compile_options(GENERIC_L4R9ZGYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L4R9ZGYX_usb_none INTERFACE) target_compile_options(GENERIC_L4R9ZGYX_usb_none INTERFACE @@ -99544,7 +99684,7 @@ set(GENERIC_L4R9ZIJX_MCU cortex-m4) set(GENERIC_L4R9ZIJX_FPCONF "-") add_library(GENERIC_L4R9ZIJX INTERFACE) target_compile_options(GENERIC_L4R9ZIJX INTERFACE - "SHELL:-DSTM32L4R9xx " + "SHELL:-DSTM32L4R9xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -99589,15 +99729,15 @@ target_compile_options(GENERIC_L4R9ZIJX_serial_none INTERFACE ) add_library(GENERIC_L4R9ZIJX_usb_CDC INTERFACE) target_compile_options(GENERIC_L4R9ZIJX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L4R9ZIJX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L4R9ZIJX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L4R9ZIJX_usb_HID INTERFACE) target_compile_options(GENERIC_L4R9ZIJX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L4R9ZIJX_usb_none INTERFACE) target_compile_options(GENERIC_L4R9ZIJX_usb_none INTERFACE @@ -99626,7 +99766,7 @@ set(GENERIC_L4R9ZIYX_MCU cortex-m4) set(GENERIC_L4R9ZIYX_FPCONF "-") add_library(GENERIC_L4R9ZIYX INTERFACE) target_compile_options(GENERIC_L4R9ZIYX INTERFACE - "SHELL:-DSTM32L4R9xx " + "SHELL:-DSTM32L4R9xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -99671,15 +99811,15 @@ target_compile_options(GENERIC_L4R9ZIYX_serial_none INTERFACE ) add_library(GENERIC_L4R9ZIYX_usb_CDC INTERFACE) target_compile_options(GENERIC_L4R9ZIYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L4R9ZIYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L4R9ZIYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L4R9ZIYX_usb_HID INTERFACE) target_compile_options(GENERIC_L4R9ZIYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L4R9ZIYX_usb_none INTERFACE) target_compile_options(GENERIC_L4R9ZIYX_usb_none INTERFACE @@ -99708,7 +99848,7 @@ set(GENERIC_L4S5VITX_MCU cortex-m4) set(GENERIC_L4S5VITX_FPCONF "-") add_library(GENERIC_L4S5VITX INTERFACE) target_compile_options(GENERIC_L4S5VITX INTERFACE - "SHELL:-DSTM32L4S5xx " + "SHELL:-DSTM32L4S5xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -99753,15 +99893,15 @@ target_compile_options(GENERIC_L4S5VITX_serial_none INTERFACE ) add_library(GENERIC_L4S5VITX_usb_CDC INTERFACE) target_compile_options(GENERIC_L4S5VITX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L4S5VITX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L4S5VITX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L4S5VITX_usb_HID INTERFACE) target_compile_options(GENERIC_L4S5VITX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L4S5VITX_usb_none INTERFACE) target_compile_options(GENERIC_L4S5VITX_usb_none INTERFACE @@ -99790,7 +99930,7 @@ set(GENERIC_L4S5ZITX_MCU cortex-m4) set(GENERIC_L4S5ZITX_FPCONF "-") add_library(GENERIC_L4S5ZITX INTERFACE) target_compile_options(GENERIC_L4S5ZITX INTERFACE - "SHELL:-DSTM32L4S5xx " + "SHELL:-DSTM32L4S5xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -99835,15 +99975,15 @@ target_compile_options(GENERIC_L4S5ZITX_serial_none INTERFACE ) add_library(GENERIC_L4S5ZITX_usb_CDC INTERFACE) target_compile_options(GENERIC_L4S5ZITX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L4S5ZITX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L4S5ZITX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L4S5ZITX_usb_HID INTERFACE) target_compile_options(GENERIC_L4S5ZITX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L4S5ZITX_usb_none INTERFACE) target_compile_options(GENERIC_L4S5ZITX_usb_none INTERFACE @@ -99872,7 +100012,7 @@ set(GENERIC_L4S5ZIYX_MCU cortex-m4) set(GENERIC_L4S5ZIYX_FPCONF "-") add_library(GENERIC_L4S5ZIYX INTERFACE) target_compile_options(GENERIC_L4S5ZIYX INTERFACE - "SHELL:-DSTM32L4S5xx " + "SHELL:-DSTM32L4S5xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -99917,15 +100057,15 @@ target_compile_options(GENERIC_L4S5ZIYX_serial_none INTERFACE ) add_library(GENERIC_L4S5ZIYX_usb_CDC INTERFACE) target_compile_options(GENERIC_L4S5ZIYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L4S5ZIYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L4S5ZIYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L4S5ZIYX_usb_HID INTERFACE) target_compile_options(GENERIC_L4S5ZIYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L4S5ZIYX_usb_none INTERFACE) target_compile_options(GENERIC_L4S5ZIYX_usb_none INTERFACE @@ -99954,7 +100094,7 @@ set(GENERIC_L4S7VITX_MCU cortex-m4) set(GENERIC_L4S7VITX_FPCONF "-") add_library(GENERIC_L4S7VITX INTERFACE) target_compile_options(GENERIC_L4S7VITX INTERFACE - "SHELL:-DSTM32L4S7xx " + "SHELL:-DSTM32L4S7xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -99999,15 +100139,15 @@ target_compile_options(GENERIC_L4S7VITX_serial_none INTERFACE ) add_library(GENERIC_L4S7VITX_usb_CDC INTERFACE) target_compile_options(GENERIC_L4S7VITX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L4S7VITX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L4S7VITX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L4S7VITX_usb_HID INTERFACE) target_compile_options(GENERIC_L4S7VITX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L4S7VITX_usb_none INTERFACE) target_compile_options(GENERIC_L4S7VITX_usb_none INTERFACE @@ -100036,7 +100176,7 @@ set(GENERIC_L4S7ZITX_MCU cortex-m4) set(GENERIC_L4S7ZITX_FPCONF "-") add_library(GENERIC_L4S7ZITX INTERFACE) target_compile_options(GENERIC_L4S7ZITX INTERFACE - "SHELL:-DSTM32L4S7xx " + "SHELL:-DSTM32L4S7xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -100081,15 +100221,15 @@ target_compile_options(GENERIC_L4S7ZITX_serial_none INTERFACE ) add_library(GENERIC_L4S7ZITX_usb_CDC INTERFACE) target_compile_options(GENERIC_L4S7ZITX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L4S7ZITX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L4S7ZITX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L4S7ZITX_usb_HID INTERFACE) target_compile_options(GENERIC_L4S7ZITX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L4S7ZITX_usb_none INTERFACE) target_compile_options(GENERIC_L4S7ZITX_usb_none INTERFACE @@ -100118,7 +100258,7 @@ set(GENERIC_L4S9ZIJX_MCU cortex-m4) set(GENERIC_L4S9ZIJX_FPCONF "-") add_library(GENERIC_L4S9ZIJX INTERFACE) target_compile_options(GENERIC_L4S9ZIJX INTERFACE - "SHELL:-DSTM32L4S9xx " + "SHELL:-DSTM32L4S9xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -100163,15 +100303,15 @@ target_compile_options(GENERIC_L4S9ZIJX_serial_none INTERFACE ) add_library(GENERIC_L4S9ZIJX_usb_CDC INTERFACE) target_compile_options(GENERIC_L4S9ZIJX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L4S9ZIJX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L4S9ZIJX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L4S9ZIJX_usb_HID INTERFACE) target_compile_options(GENERIC_L4S9ZIJX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L4S9ZIJX_usb_none INTERFACE) target_compile_options(GENERIC_L4S9ZIJX_usb_none INTERFACE @@ -100200,7 +100340,7 @@ set(GENERIC_L4S9ZIYX_MCU cortex-m4) set(GENERIC_L4S9ZIYX_FPCONF "-") add_library(GENERIC_L4S9ZIYX INTERFACE) target_compile_options(GENERIC_L4S9ZIYX INTERFACE - "SHELL:-DSTM32L4S9xx " + "SHELL:-DSTM32L4S9xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -100245,15 +100385,15 @@ target_compile_options(GENERIC_L4S9ZIYX_serial_none INTERFACE ) add_library(GENERIC_L4S9ZIYX_usb_CDC INTERFACE) target_compile_options(GENERIC_L4S9ZIYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L4S9ZIYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L4S9ZIYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L4S9ZIYX_usb_HID INTERFACE) target_compile_options(GENERIC_L4S9ZIYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L4S9ZIYX_usb_none INTERFACE) target_compile_options(GENERIC_L4S9ZIYX_usb_none INTERFACE @@ -100282,7 +100422,7 @@ set(GENERIC_L552QCIXQ_MCU cortex-m33) set(GENERIC_L552QCIXQ_FPCONF "-") add_library(GENERIC_L552QCIXQ INTERFACE) target_compile_options(GENERIC_L552QCIXQ INTERFACE - "SHELL:-DSTM32L552xx " + "SHELL:-DSTM32L552xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -100327,15 +100467,15 @@ target_compile_options(GENERIC_L552QCIXQ_serial_none INTERFACE ) add_library(GENERIC_L552QCIXQ_usb_CDC INTERFACE) target_compile_options(GENERIC_L552QCIXQ_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L552QCIXQ_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L552QCIXQ_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L552QCIXQ_usb_HID INTERFACE) target_compile_options(GENERIC_L552QCIXQ_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L552QCIXQ_usb_none INTERFACE) target_compile_options(GENERIC_L552QCIXQ_usb_none INTERFACE @@ -100364,7 +100504,7 @@ set(GENERIC_L552QEIXQ_MCU cortex-m33) set(GENERIC_L552QEIXQ_FPCONF "-") add_library(GENERIC_L552QEIXQ INTERFACE) target_compile_options(GENERIC_L552QEIXQ INTERFACE - "SHELL:-DSTM32L552xx " + "SHELL:-DSTM32L552xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -100409,15 +100549,15 @@ target_compile_options(GENERIC_L552QEIXQ_serial_none INTERFACE ) add_library(GENERIC_L552QEIXQ_usb_CDC INTERFACE) target_compile_options(GENERIC_L552QEIXQ_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L552QEIXQ_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L552QEIXQ_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L552QEIXQ_usb_HID INTERFACE) target_compile_options(GENERIC_L552QEIXQ_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L552QEIXQ_usb_none INTERFACE) target_compile_options(GENERIC_L552QEIXQ_usb_none INTERFACE @@ -100446,7 +100586,7 @@ set(GENERIC_L552ZCTXQ_MCU cortex-m33) set(GENERIC_L552ZCTXQ_FPCONF "-") add_library(GENERIC_L552ZCTXQ INTERFACE) target_compile_options(GENERIC_L552ZCTXQ INTERFACE - "SHELL:-DSTM32L552xx " + "SHELL:-DSTM32L552xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -100491,15 +100631,15 @@ target_compile_options(GENERIC_L552ZCTXQ_serial_none INTERFACE ) add_library(GENERIC_L552ZCTXQ_usb_CDC INTERFACE) target_compile_options(GENERIC_L552ZCTXQ_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L552ZCTXQ_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L552ZCTXQ_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L552ZCTXQ_usb_HID INTERFACE) target_compile_options(GENERIC_L552ZCTXQ_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L552ZCTXQ_usb_none INTERFACE) target_compile_options(GENERIC_L552ZCTXQ_usb_none INTERFACE @@ -100528,7 +100668,7 @@ set(GENERIC_L552ZETXQ_MCU cortex-m33) set(GENERIC_L552ZETXQ_FPCONF "-") add_library(GENERIC_L552ZETXQ INTERFACE) target_compile_options(GENERIC_L552ZETXQ INTERFACE - "SHELL:-DSTM32L552xx " + "SHELL:-DSTM32L552xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -100573,15 +100713,15 @@ target_compile_options(GENERIC_L552ZETXQ_serial_none INTERFACE ) add_library(GENERIC_L552ZETXQ_usb_CDC INTERFACE) target_compile_options(GENERIC_L552ZETXQ_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L552ZETXQ_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L552ZETXQ_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L552ZETXQ_usb_HID INTERFACE) target_compile_options(GENERIC_L552ZETXQ_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L552ZETXQ_usb_none INTERFACE) target_compile_options(GENERIC_L552ZETXQ_usb_none INTERFACE @@ -100610,7 +100750,7 @@ set(GENERIC_L562QEIXQ_MCU cortex-m33) set(GENERIC_L562QEIXQ_FPCONF "-") add_library(GENERIC_L562QEIXQ INTERFACE) target_compile_options(GENERIC_L562QEIXQ INTERFACE - "SHELL:-DSTM32L562xx " + "SHELL:-DSTM32L562xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -100655,15 +100795,15 @@ target_compile_options(GENERIC_L562QEIXQ_serial_none INTERFACE ) add_library(GENERIC_L562QEIXQ_usb_CDC INTERFACE) target_compile_options(GENERIC_L562QEIXQ_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L562QEIXQ_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L562QEIXQ_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L562QEIXQ_usb_HID INTERFACE) target_compile_options(GENERIC_L562QEIXQ_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L562QEIXQ_usb_none INTERFACE) target_compile_options(GENERIC_L562QEIXQ_usb_none INTERFACE @@ -100692,7 +100832,7 @@ set(GENERIC_L562ZETXQ_MCU cortex-m33) set(GENERIC_L562ZETXQ_FPCONF "-") add_library(GENERIC_L562ZETXQ INTERFACE) target_compile_options(GENERIC_L562ZETXQ INTERFACE - "SHELL:-DSTM32L562xx " + "SHELL:-DSTM32L562xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -100737,15 +100877,15 @@ target_compile_options(GENERIC_L562ZETXQ_serial_none INTERFACE ) add_library(GENERIC_L562ZETXQ_usb_CDC INTERFACE) target_compile_options(GENERIC_L562ZETXQ_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_L562ZETXQ_usb_CDCgen INTERFACE) target_compile_options(GENERIC_L562ZETXQ_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_L562ZETXQ_usb_HID INTERFACE) target_compile_options(GENERIC_L562ZETXQ_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_L562ZETXQ_usb_none INTERFACE) target_compile_options(GENERIC_L562ZETXQ_usb_none INTERFACE @@ -100774,7 +100914,7 @@ set(GENERIC_NODE_SE_TTI_MCU cortex-m4) set(GENERIC_NODE_SE_TTI_FPCONF "-") add_library(GENERIC_NODE_SE_TTI INTERFACE) target_compile_options(GENERIC_NODE_SE_TTI INTERFACE - "SHELL:-DSTM32WL55xx -DUSE_CM4_STARTUP_FILE " + "SHELL:-DSTM32WL55xx -DUSE_CM4_STARTUP_FILE" "SHELL:" "SHELL:" "SHELL: " @@ -100828,7 +100968,7 @@ set(GENERIC_U073R8IX_MCU cortex-m0plus) set(GENERIC_U073R8IX_FPCONF "-") add_library(GENERIC_U073R8IX INTERFACE) target_compile_options(GENERIC_U073R8IX INTERFACE - "SHELL:-DSTM32U073xx -D__CORTEX_SC=0" + "SHELL:-DSTM32U073xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -100873,15 +101013,15 @@ target_compile_options(GENERIC_U073R8IX_serial_none INTERFACE ) add_library(GENERIC_U073R8IX_usb_CDC INTERFACE) target_compile_options(GENERIC_U073R8IX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_U073R8IX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_U073R8IX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_U073R8IX_usb_HID INTERFACE) target_compile_options(GENERIC_U073R8IX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_U073R8IX_usb_none INTERFACE) target_compile_options(GENERIC_U073R8IX_usb_none INTERFACE @@ -100898,7 +101038,7 @@ set(GENERIC_U073R8TX_MCU cortex-m0plus) set(GENERIC_U073R8TX_FPCONF "-") add_library(GENERIC_U073R8TX INTERFACE) target_compile_options(GENERIC_U073R8TX INTERFACE - "SHELL:-DSTM32U073xx -D__CORTEX_SC=0" + "SHELL:-DSTM32U073xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -100943,15 +101083,15 @@ target_compile_options(GENERIC_U073R8TX_serial_none INTERFACE ) add_library(GENERIC_U073R8TX_usb_CDC INTERFACE) target_compile_options(GENERIC_U073R8TX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_U073R8TX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_U073R8TX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_U073R8TX_usb_HID INTERFACE) target_compile_options(GENERIC_U073R8TX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_U073R8TX_usb_none INTERFACE) target_compile_options(GENERIC_U073R8TX_usb_none INTERFACE @@ -100968,7 +101108,7 @@ set(GENERIC_U073RBIX_MCU cortex-m0plus) set(GENERIC_U073RBIX_FPCONF "-") add_library(GENERIC_U073RBIX INTERFACE) target_compile_options(GENERIC_U073RBIX INTERFACE - "SHELL:-DSTM32U073xx -D__CORTEX_SC=0" + "SHELL:-DSTM32U073xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -101013,15 +101153,15 @@ target_compile_options(GENERIC_U073RBIX_serial_none INTERFACE ) add_library(GENERIC_U073RBIX_usb_CDC INTERFACE) target_compile_options(GENERIC_U073RBIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_U073RBIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_U073RBIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_U073RBIX_usb_HID INTERFACE) target_compile_options(GENERIC_U073RBIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_U073RBIX_usb_none INTERFACE) target_compile_options(GENERIC_U073RBIX_usb_none INTERFACE @@ -101038,7 +101178,7 @@ set(GENERIC_U073RBTX_MCU cortex-m0plus) set(GENERIC_U073RBTX_FPCONF "-") add_library(GENERIC_U073RBTX INTERFACE) target_compile_options(GENERIC_U073RBTX INTERFACE - "SHELL:-DSTM32U073xx -D__CORTEX_SC=0" + "SHELL:-DSTM32U073xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -101083,15 +101223,15 @@ target_compile_options(GENERIC_U073RBTX_serial_none INTERFACE ) add_library(GENERIC_U073RBTX_usb_CDC INTERFACE) target_compile_options(GENERIC_U073RBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_U073RBTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_U073RBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_U073RBTX_usb_HID INTERFACE) target_compile_options(GENERIC_U073RBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_U073RBTX_usb_none INTERFACE) target_compile_options(GENERIC_U073RBTX_usb_none INTERFACE @@ -101108,7 +101248,7 @@ set(GENERIC_U073RCIX_MCU cortex-m0plus) set(GENERIC_U073RCIX_FPCONF "-") add_library(GENERIC_U073RCIX INTERFACE) target_compile_options(GENERIC_U073RCIX INTERFACE - "SHELL:-DSTM32U073xx -D__CORTEX_SC=0" + "SHELL:-DSTM32U073xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -101153,15 +101293,15 @@ target_compile_options(GENERIC_U073RCIX_serial_none INTERFACE ) add_library(GENERIC_U073RCIX_usb_CDC INTERFACE) target_compile_options(GENERIC_U073RCIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_U073RCIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_U073RCIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_U073RCIX_usb_HID INTERFACE) target_compile_options(GENERIC_U073RCIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_U073RCIX_usb_none INTERFACE) target_compile_options(GENERIC_U073RCIX_usb_none INTERFACE @@ -101178,7 +101318,7 @@ set(GENERIC_U073RCTX_MCU cortex-m0plus) set(GENERIC_U073RCTX_FPCONF "-") add_library(GENERIC_U073RCTX INTERFACE) target_compile_options(GENERIC_U073RCTX INTERFACE - "SHELL:-DSTM32U073xx -D__CORTEX_SC=0" + "SHELL:-DSTM32U073xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -101223,15 +101363,15 @@ target_compile_options(GENERIC_U073RCTX_serial_none INTERFACE ) add_library(GENERIC_U073RCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_U073RCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_U073RCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_U073RCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_U073RCTX_usb_HID INTERFACE) target_compile_options(GENERIC_U073RCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_U073RCTX_usb_none INTERFACE) target_compile_options(GENERIC_U073RCTX_usb_none INTERFACE @@ -101248,7 +101388,7 @@ set(GENERIC_U083RCIX_MCU cortex-m0plus) set(GENERIC_U083RCIX_FPCONF "-") add_library(GENERIC_U083RCIX INTERFACE) target_compile_options(GENERIC_U083RCIX INTERFACE - "SHELL:-DSTM32U083xx -D__CORTEX_SC=0" + "SHELL:-DSTM32U083xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -101293,15 +101433,15 @@ target_compile_options(GENERIC_U083RCIX_serial_none INTERFACE ) add_library(GENERIC_U083RCIX_usb_CDC INTERFACE) target_compile_options(GENERIC_U083RCIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_U083RCIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_U083RCIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_U083RCIX_usb_HID INTERFACE) target_compile_options(GENERIC_U083RCIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_U083RCIX_usb_none INTERFACE) target_compile_options(GENERIC_U083RCIX_usb_none INTERFACE @@ -101318,7 +101458,7 @@ set(GENERIC_U083RCTX_MCU cortex-m0plus) set(GENERIC_U083RCTX_FPCONF "-") add_library(GENERIC_U083RCTX INTERFACE) target_compile_options(GENERIC_U083RCTX INTERFACE - "SHELL:-DSTM32U083xx -D__CORTEX_SC=0" + "SHELL:-DSTM32U083xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -101363,15 +101503,15 @@ target_compile_options(GENERIC_U083RCTX_serial_none INTERFACE ) add_library(GENERIC_U083RCTX_usb_CDC INTERFACE) target_compile_options(GENERIC_U083RCTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_U083RCTX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_U083RCTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_U083RCTX_usb_HID INTERFACE) target_compile_options(GENERIC_U083RCTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_U083RCTX_usb_none INTERFACE) target_compile_options(GENERIC_U083RCTX_usb_none INTERFACE @@ -101388,7 +101528,7 @@ set(GENERIC_U375RETXQ_MCU cortex-m33) set(GENERIC_U375RETXQ_FPCONF "-") add_library(GENERIC_U375RETXQ INTERFACE) target_compile_options(GENERIC_U375RETXQ INTERFACE - "SHELL:-DSTM32U375xx " + "SHELL:-DSTM32U375xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -101433,15 +101573,15 @@ target_compile_options(GENERIC_U375RETXQ_serial_none INTERFACE ) add_library(GENERIC_U375RETXQ_usb_CDC INTERFACE) target_compile_options(GENERIC_U375RETXQ_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_U375RETXQ_usb_CDCgen INTERFACE) target_compile_options(GENERIC_U375RETXQ_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_U375RETXQ_usb_HID INTERFACE) target_compile_options(GENERIC_U375RETXQ_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_U375RETXQ_usb_none INTERFACE) target_compile_options(GENERIC_U375RETXQ_usb_none INTERFACE @@ -101458,7 +101598,7 @@ set(GENERIC_U375RGTXQ_MCU cortex-m33) set(GENERIC_U375RGTXQ_FPCONF "-") add_library(GENERIC_U375RGTXQ INTERFACE) target_compile_options(GENERIC_U375RGTXQ INTERFACE - "SHELL:-DSTM32U375xx " + "SHELL:-DSTM32U375xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -101503,15 +101643,15 @@ target_compile_options(GENERIC_U375RGTXQ_serial_none INTERFACE ) add_library(GENERIC_U375RGTXQ_usb_CDC INTERFACE) target_compile_options(GENERIC_U375RGTXQ_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_U375RGTXQ_usb_CDCgen INTERFACE) target_compile_options(GENERIC_U375RGTXQ_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_U375RGTXQ_usb_HID INTERFACE) target_compile_options(GENERIC_U375RGTXQ_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_U375RGTXQ_usb_none INTERFACE) target_compile_options(GENERIC_U375RGTXQ_usb_none INTERFACE @@ -101528,7 +101668,7 @@ set(GENERIC_U375VEIX_MCU cortex-m33) set(GENERIC_U375VEIX_FPCONF "-") add_library(GENERIC_U375VEIX INTERFACE) target_compile_options(GENERIC_U375VEIX INTERFACE - "SHELL:-DSTM32U375xx " + "SHELL:-DSTM32U375xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -101573,15 +101713,15 @@ target_compile_options(GENERIC_U375VEIX_serial_none INTERFACE ) add_library(GENERIC_U375VEIX_usb_CDC INTERFACE) target_compile_options(GENERIC_U375VEIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_U375VEIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_U375VEIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_U375VEIX_usb_HID INTERFACE) target_compile_options(GENERIC_U375VEIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_U375VEIX_usb_none INTERFACE) target_compile_options(GENERIC_U375VEIX_usb_none INTERFACE @@ -101598,7 +101738,7 @@ set(GENERIC_U375VEIXQ_MCU cortex-m33) set(GENERIC_U375VEIXQ_FPCONF "-") add_library(GENERIC_U375VEIXQ INTERFACE) target_compile_options(GENERIC_U375VEIXQ INTERFACE - "SHELL:-DSTM32U375xx " + "SHELL:-DSTM32U375xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -101643,15 +101783,15 @@ target_compile_options(GENERIC_U375VEIXQ_serial_none INTERFACE ) add_library(GENERIC_U375VEIXQ_usb_CDC INTERFACE) target_compile_options(GENERIC_U375VEIXQ_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_U375VEIXQ_usb_CDCgen INTERFACE) target_compile_options(GENERIC_U375VEIXQ_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_U375VEIXQ_usb_HID INTERFACE) target_compile_options(GENERIC_U375VEIXQ_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_U375VEIXQ_usb_none INTERFACE) target_compile_options(GENERIC_U375VEIXQ_usb_none INTERFACE @@ -101668,7 +101808,7 @@ set(GENERIC_U375VGIX_MCU cortex-m33) set(GENERIC_U375VGIX_FPCONF "-") add_library(GENERIC_U375VGIX INTERFACE) target_compile_options(GENERIC_U375VGIX INTERFACE - "SHELL:-DSTM32U375xx " + "SHELL:-DSTM32U375xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -101713,15 +101853,15 @@ target_compile_options(GENERIC_U375VGIX_serial_none INTERFACE ) add_library(GENERIC_U375VGIX_usb_CDC INTERFACE) target_compile_options(GENERIC_U375VGIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_U375VGIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_U375VGIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_U375VGIX_usb_HID INTERFACE) target_compile_options(GENERIC_U375VGIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_U375VGIX_usb_none INTERFACE) target_compile_options(GENERIC_U375VGIX_usb_none INTERFACE @@ -101738,7 +101878,7 @@ set(GENERIC_U375VGIXQ_MCU cortex-m33) set(GENERIC_U375VGIXQ_FPCONF "-") add_library(GENERIC_U375VGIXQ INTERFACE) target_compile_options(GENERIC_U375VGIXQ INTERFACE - "SHELL:-DSTM32U375xx " + "SHELL:-DSTM32U375xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -101783,15 +101923,15 @@ target_compile_options(GENERIC_U375VGIXQ_serial_none INTERFACE ) add_library(GENERIC_U375VGIXQ_usb_CDC INTERFACE) target_compile_options(GENERIC_U375VGIXQ_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_U375VGIXQ_usb_CDCgen INTERFACE) target_compile_options(GENERIC_U375VGIXQ_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_U375VGIXQ_usb_HID INTERFACE) target_compile_options(GENERIC_U375VGIXQ_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_U375VGIXQ_usb_none INTERFACE) target_compile_options(GENERIC_U375VGIXQ_usb_none INTERFACE @@ -101808,7 +101948,7 @@ set(GENERIC_U385RGTXQ_MCU cortex-m33) set(GENERIC_U385RGTXQ_FPCONF "-") add_library(GENERIC_U385RGTXQ INTERFACE) target_compile_options(GENERIC_U385RGTXQ INTERFACE - "SHELL:-DSTM32U385xx " + "SHELL:-DSTM32U385xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -101853,15 +101993,15 @@ target_compile_options(GENERIC_U385RGTXQ_serial_none INTERFACE ) add_library(GENERIC_U385RGTXQ_usb_CDC INTERFACE) target_compile_options(GENERIC_U385RGTXQ_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_U385RGTXQ_usb_CDCgen INTERFACE) target_compile_options(GENERIC_U385RGTXQ_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_U385RGTXQ_usb_HID INTERFACE) target_compile_options(GENERIC_U385RGTXQ_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_U385RGTXQ_usb_none INTERFACE) target_compile_options(GENERIC_U385RGTXQ_usb_none INTERFACE @@ -101878,7 +102018,7 @@ set(GENERIC_U385VGIX_MCU cortex-m33) set(GENERIC_U385VGIX_FPCONF "-") add_library(GENERIC_U385VGIX INTERFACE) target_compile_options(GENERIC_U385VGIX INTERFACE - "SHELL:-DSTM32U385xx " + "SHELL:-DSTM32U385xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -101923,15 +102063,15 @@ target_compile_options(GENERIC_U385VGIX_serial_none INTERFACE ) add_library(GENERIC_U385VGIX_usb_CDC INTERFACE) target_compile_options(GENERIC_U385VGIX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_U385VGIX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_U385VGIX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_U385VGIX_usb_HID INTERFACE) target_compile_options(GENERIC_U385VGIX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_U385VGIX_usb_none INTERFACE) target_compile_options(GENERIC_U385VGIX_usb_none INTERFACE @@ -101948,7 +102088,7 @@ set(GENERIC_U385VGIXQ_MCU cortex-m33) set(GENERIC_U385VGIXQ_FPCONF "-") add_library(GENERIC_U385VGIXQ INTERFACE) target_compile_options(GENERIC_U385VGIXQ INTERFACE - "SHELL:-DSTM32U385xx " + "SHELL:-DSTM32U385xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -101993,15 +102133,15 @@ target_compile_options(GENERIC_U385VGIXQ_serial_none INTERFACE ) add_library(GENERIC_U385VGIXQ_usb_CDC INTERFACE) target_compile_options(GENERIC_U385VGIXQ_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_U385VGIXQ_usb_CDCgen INTERFACE) target_compile_options(GENERIC_U385VGIXQ_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_U385VGIXQ_usb_HID INTERFACE) target_compile_options(GENERIC_U385VGIXQ_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_U385VGIXQ_usb_none INTERFACE) target_compile_options(GENERIC_U385VGIXQ_usb_none INTERFACE @@ -102018,7 +102158,7 @@ set(GENERIC_U575AGIXQ_MCU cortex-m33) set(GENERIC_U575AGIXQ_FPCONF "-") add_library(GENERIC_U575AGIXQ INTERFACE) target_compile_options(GENERIC_U575AGIXQ INTERFACE - "SHELL:-DSTM32U575xx " + "SHELL:-DSTM32U575xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -102063,15 +102203,15 @@ target_compile_options(GENERIC_U575AGIXQ_serial_none INTERFACE ) add_library(GENERIC_U575AGIXQ_usb_CDC INTERFACE) target_compile_options(GENERIC_U575AGIXQ_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_U575AGIXQ_usb_CDCgen INTERFACE) target_compile_options(GENERIC_U575AGIXQ_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_U575AGIXQ_usb_HID INTERFACE) target_compile_options(GENERIC_U575AGIXQ_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_U575AGIXQ_usb_none INTERFACE) target_compile_options(GENERIC_U575AGIXQ_usb_none INTERFACE @@ -102100,7 +102240,7 @@ set(GENERIC_U575AIIXQ_MCU cortex-m33) set(GENERIC_U575AIIXQ_FPCONF "-") add_library(GENERIC_U575AIIXQ INTERFACE) target_compile_options(GENERIC_U575AIIXQ INTERFACE - "SHELL:-DSTM32U575xx " + "SHELL:-DSTM32U575xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -102145,15 +102285,15 @@ target_compile_options(GENERIC_U575AIIXQ_serial_none INTERFACE ) add_library(GENERIC_U575AIIXQ_usb_CDC INTERFACE) target_compile_options(GENERIC_U575AIIXQ_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_U575AIIXQ_usb_CDCgen INTERFACE) target_compile_options(GENERIC_U575AIIXQ_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_U575AIIXQ_usb_HID INTERFACE) target_compile_options(GENERIC_U575AIIXQ_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_U575AIIXQ_usb_none INTERFACE) target_compile_options(GENERIC_U575AIIXQ_usb_none INTERFACE @@ -102182,7 +102322,7 @@ set(GENERIC_U575CITX_MCU cortex-m33) set(GENERIC_U575CITX_FPCONF "-") add_library(GENERIC_U575CITX INTERFACE) target_compile_options(GENERIC_U575CITX INTERFACE - "SHELL:-DSTM32U575xx " + "SHELL:-DSTM32U575xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -102227,15 +102367,15 @@ target_compile_options(GENERIC_U575CITX_serial_none INTERFACE ) add_library(GENERIC_U575CITX_usb_CDC INTERFACE) target_compile_options(GENERIC_U575CITX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_U575CITX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_U575CITX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_U575CITX_usb_HID INTERFACE) target_compile_options(GENERIC_U575CITX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_U575CITX_usb_none INTERFACE) target_compile_options(GENERIC_U575CITX_usb_none INTERFACE @@ -102264,7 +102404,7 @@ set(GENERIC_U575CIUX_MCU cortex-m33) set(GENERIC_U575CIUX_FPCONF "-") add_library(GENERIC_U575CIUX INTERFACE) target_compile_options(GENERIC_U575CIUX INTERFACE - "SHELL:-DSTM32U575xx " + "SHELL:-DSTM32U575xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -102309,15 +102449,15 @@ target_compile_options(GENERIC_U575CIUX_serial_none INTERFACE ) add_library(GENERIC_U575CIUX_usb_CDC INTERFACE) target_compile_options(GENERIC_U575CIUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_U575CIUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_U575CIUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_U575CIUX_usb_HID INTERFACE) target_compile_options(GENERIC_U575CIUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_U575CIUX_usb_none INTERFACE) target_compile_options(GENERIC_U575CIUX_usb_none INTERFACE @@ -102346,7 +102486,7 @@ set(GENERIC_U575ZGTXQ_MCU cortex-m33) set(GENERIC_U575ZGTXQ_FPCONF "-") add_library(GENERIC_U575ZGTXQ INTERFACE) target_compile_options(GENERIC_U575ZGTXQ INTERFACE - "SHELL:-DSTM32U575xx " + "SHELL:-DSTM32U575xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -102391,15 +102531,15 @@ target_compile_options(GENERIC_U575ZGTXQ_serial_none INTERFACE ) add_library(GENERIC_U575ZGTXQ_usb_CDC INTERFACE) target_compile_options(GENERIC_U575ZGTXQ_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_U575ZGTXQ_usb_CDCgen INTERFACE) target_compile_options(GENERIC_U575ZGTXQ_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_U575ZGTXQ_usb_HID INTERFACE) target_compile_options(GENERIC_U575ZGTXQ_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_U575ZGTXQ_usb_none INTERFACE) target_compile_options(GENERIC_U575ZGTXQ_usb_none INTERFACE @@ -102428,7 +102568,7 @@ set(GENERIC_U575ZITXQ_MCU cortex-m33) set(GENERIC_U575ZITXQ_FPCONF "-") add_library(GENERIC_U575ZITXQ INTERFACE) target_compile_options(GENERIC_U575ZITXQ INTERFACE - "SHELL:-DSTM32U575xx " + "SHELL:-DSTM32U575xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -102473,15 +102613,15 @@ target_compile_options(GENERIC_U575ZITXQ_serial_none INTERFACE ) add_library(GENERIC_U575ZITXQ_usb_CDC INTERFACE) target_compile_options(GENERIC_U575ZITXQ_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_U575ZITXQ_usb_CDCgen INTERFACE) target_compile_options(GENERIC_U575ZITXQ_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_U575ZITXQ_usb_HID INTERFACE) target_compile_options(GENERIC_U575ZITXQ_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_U575ZITXQ_usb_none INTERFACE) target_compile_options(GENERIC_U575ZITXQ_usb_none INTERFACE @@ -102510,7 +102650,7 @@ set(GENERIC_U585AIIXQ_MCU cortex-m33) set(GENERIC_U585AIIXQ_FPCONF "-") add_library(GENERIC_U585AIIXQ INTERFACE) target_compile_options(GENERIC_U585AIIXQ INTERFACE - "SHELL:-DSTM32U585xx " + "SHELL:-DSTM32U585xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -102555,15 +102695,15 @@ target_compile_options(GENERIC_U585AIIXQ_serial_none INTERFACE ) add_library(GENERIC_U585AIIXQ_usb_CDC INTERFACE) target_compile_options(GENERIC_U585AIIXQ_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_U585AIIXQ_usb_CDCgen INTERFACE) target_compile_options(GENERIC_U585AIIXQ_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_U585AIIXQ_usb_HID INTERFACE) target_compile_options(GENERIC_U585AIIXQ_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_U585AIIXQ_usb_none INTERFACE) target_compile_options(GENERIC_U585AIIXQ_usb_none INTERFACE @@ -102592,7 +102732,7 @@ set(GENERIC_U585CITX_MCU cortex-m33) set(GENERIC_U585CITX_FPCONF "-") add_library(GENERIC_U585CITX INTERFACE) target_compile_options(GENERIC_U585CITX INTERFACE - "SHELL:-DSTM32U585xx " + "SHELL:-DSTM32U585xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -102637,15 +102777,15 @@ target_compile_options(GENERIC_U585CITX_serial_none INTERFACE ) add_library(GENERIC_U585CITX_usb_CDC INTERFACE) target_compile_options(GENERIC_U585CITX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_U585CITX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_U585CITX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_U585CITX_usb_HID INTERFACE) target_compile_options(GENERIC_U585CITX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_U585CITX_usb_none INTERFACE) target_compile_options(GENERIC_U585CITX_usb_none INTERFACE @@ -102674,7 +102814,7 @@ set(GENERIC_U585CIUX_MCU cortex-m33) set(GENERIC_U585CIUX_FPCONF "-") add_library(GENERIC_U585CIUX INTERFACE) target_compile_options(GENERIC_U585CIUX INTERFACE - "SHELL:-DSTM32U585xx " + "SHELL:-DSTM32U585xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -102719,15 +102859,15 @@ target_compile_options(GENERIC_U585CIUX_serial_none INTERFACE ) add_library(GENERIC_U585CIUX_usb_CDC INTERFACE) target_compile_options(GENERIC_U585CIUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_U585CIUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_U585CIUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_U585CIUX_usb_HID INTERFACE) target_compile_options(GENERIC_U585CIUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_U585CIUX_usb_none INTERFACE) target_compile_options(GENERIC_U585CIUX_usb_none INTERFACE @@ -102756,7 +102896,7 @@ set(GENERIC_U585ZITXQ_MCU cortex-m33) set(GENERIC_U585ZITXQ_FPCONF "-") add_library(GENERIC_U585ZITXQ INTERFACE) target_compile_options(GENERIC_U585ZITXQ INTERFACE - "SHELL:-DSTM32U585xx " + "SHELL:-DSTM32U585xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -102801,15 +102941,15 @@ target_compile_options(GENERIC_U585ZITXQ_serial_none INTERFACE ) add_library(GENERIC_U585ZITXQ_usb_CDC INTERFACE) target_compile_options(GENERIC_U585ZITXQ_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_U585ZITXQ_usb_CDCgen INTERFACE) target_compile_options(GENERIC_U585ZITXQ_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_U585ZITXQ_usb_HID INTERFACE) target_compile_options(GENERIC_U585ZITXQ_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_U585ZITXQ_usb_none INTERFACE) target_compile_options(GENERIC_U585ZITXQ_usb_none INTERFACE @@ -102838,7 +102978,7 @@ set(GENERIC_U595ZITXQ_MCU cortex-m33) set(GENERIC_U595ZITXQ_FPCONF "-") add_library(GENERIC_U595ZITXQ INTERFACE) target_compile_options(GENERIC_U595ZITXQ INTERFACE - "SHELL:-DSTM32U595xx " + "SHELL:-DSTM32U595xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -102883,15 +103023,15 @@ target_compile_options(GENERIC_U595ZITXQ_serial_none INTERFACE ) add_library(GENERIC_U595ZITXQ_usb_CDC INTERFACE) target_compile_options(GENERIC_U595ZITXQ_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_U595ZITXQ_usb_CDCgen INTERFACE) target_compile_options(GENERIC_U595ZITXQ_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_U595ZITXQ_usb_HID INTERFACE) target_compile_options(GENERIC_U595ZITXQ_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_U595ZITXQ_usb_none INTERFACE) target_compile_options(GENERIC_U595ZITXQ_usb_none INTERFACE @@ -102920,7 +103060,7 @@ set(GENERIC_U595ZJTXQ_MCU cortex-m33) set(GENERIC_U595ZJTXQ_FPCONF "-") add_library(GENERIC_U595ZJTXQ INTERFACE) target_compile_options(GENERIC_U595ZJTXQ INTERFACE - "SHELL:-DSTM32U595xx " + "SHELL:-DSTM32U595xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -102965,15 +103105,15 @@ target_compile_options(GENERIC_U595ZJTXQ_serial_none INTERFACE ) add_library(GENERIC_U595ZJTXQ_usb_CDC INTERFACE) target_compile_options(GENERIC_U595ZJTXQ_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_U595ZJTXQ_usb_CDCgen INTERFACE) target_compile_options(GENERIC_U595ZJTXQ_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_U595ZJTXQ_usb_HID INTERFACE) target_compile_options(GENERIC_U595ZJTXQ_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_U595ZJTXQ_usb_none INTERFACE) target_compile_options(GENERIC_U595ZJTXQ_usb_none INTERFACE @@ -103002,7 +103142,7 @@ set(GENERIC_U599ZITXQ_MCU cortex-m33) set(GENERIC_U599ZITXQ_FPCONF "-") add_library(GENERIC_U599ZITXQ INTERFACE) target_compile_options(GENERIC_U599ZITXQ INTERFACE - "SHELL:-DSTM32U599xx " + "SHELL:-DSTM32U599xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -103047,15 +103187,15 @@ target_compile_options(GENERIC_U599ZITXQ_serial_none INTERFACE ) add_library(GENERIC_U599ZITXQ_usb_CDC INTERFACE) target_compile_options(GENERIC_U599ZITXQ_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_U599ZITXQ_usb_CDCgen INTERFACE) target_compile_options(GENERIC_U599ZITXQ_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_U599ZITXQ_usb_HID INTERFACE) target_compile_options(GENERIC_U599ZITXQ_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_U599ZITXQ_usb_none INTERFACE) target_compile_options(GENERIC_U599ZITXQ_usb_none INTERFACE @@ -103084,7 +103224,7 @@ set(GENERIC_U599ZJTXQ_MCU cortex-m33) set(GENERIC_U599ZJTXQ_FPCONF "-") add_library(GENERIC_U599ZJTXQ INTERFACE) target_compile_options(GENERIC_U599ZJTXQ INTERFACE - "SHELL:-DSTM32U599xx " + "SHELL:-DSTM32U599xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -103129,15 +103269,15 @@ target_compile_options(GENERIC_U599ZJTXQ_serial_none INTERFACE ) add_library(GENERIC_U599ZJTXQ_usb_CDC INTERFACE) target_compile_options(GENERIC_U599ZJTXQ_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_U599ZJTXQ_usb_CDCgen INTERFACE) target_compile_options(GENERIC_U599ZJTXQ_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_U599ZJTXQ_usb_HID INTERFACE) target_compile_options(GENERIC_U599ZJTXQ_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_U599ZJTXQ_usb_none INTERFACE) target_compile_options(GENERIC_U599ZJTXQ_usb_none INTERFACE @@ -103166,7 +103306,7 @@ set(GENERIC_U5A5ZJTXQ_MCU cortex-m33) set(GENERIC_U5A5ZJTXQ_FPCONF "-") add_library(GENERIC_U5A5ZJTXQ INTERFACE) target_compile_options(GENERIC_U5A5ZJTXQ INTERFACE - "SHELL:-DSTM32U5A5xx " + "SHELL:-DSTM32U5A5xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -103211,15 +103351,15 @@ target_compile_options(GENERIC_U5A5ZJTXQ_serial_none INTERFACE ) add_library(GENERIC_U5A5ZJTXQ_usb_CDC INTERFACE) target_compile_options(GENERIC_U5A5ZJTXQ_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_U5A5ZJTXQ_usb_CDCgen INTERFACE) target_compile_options(GENERIC_U5A5ZJTXQ_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_U5A5ZJTXQ_usb_HID INTERFACE) target_compile_options(GENERIC_U5A5ZJTXQ_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_U5A5ZJTXQ_usb_none INTERFACE) target_compile_options(GENERIC_U5A5ZJTXQ_usb_none INTERFACE @@ -103248,7 +103388,7 @@ set(GENERIC_U5A9ZJTXQ_MCU cortex-m33) set(GENERIC_U5A9ZJTXQ_FPCONF "-") add_library(GENERIC_U5A9ZJTXQ INTERFACE) target_compile_options(GENERIC_U5A9ZJTXQ INTERFACE - "SHELL:-DSTM32U5A9xx " + "SHELL:-DSTM32U5A9xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -103293,15 +103433,15 @@ target_compile_options(GENERIC_U5A9ZJTXQ_serial_none INTERFACE ) add_library(GENERIC_U5A9ZJTXQ_usb_CDC INTERFACE) target_compile_options(GENERIC_U5A9ZJTXQ_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_U5A9ZJTXQ_usb_CDCgen INTERFACE) target_compile_options(GENERIC_U5A9ZJTXQ_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_U5A9ZJTXQ_usb_HID INTERFACE) target_compile_options(GENERIC_U5A9ZJTXQ_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_U5A9ZJTXQ_usb_none INTERFACE) target_compile_options(GENERIC_U5A9ZJTXQ_usb_none INTERFACE @@ -103330,7 +103470,7 @@ set(GENERIC_WB15CCUX_MCU cortex-m4) set(GENERIC_WB15CCUX_FPCONF "-") add_library(GENERIC_WB15CCUX INTERFACE) target_compile_options(GENERIC_WB15CCUX INTERFACE - "SHELL:-DSTM32WB15xx " + "SHELL:-DSTM32WB15xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -103375,15 +103515,15 @@ target_compile_options(GENERIC_WB15CCUX_serial_none INTERFACE ) add_library(GENERIC_WB15CCUX_usb_CDC INTERFACE) target_compile_options(GENERIC_WB15CCUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_WB15CCUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_WB15CCUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_WB15CCUX_usb_HID INTERFACE) target_compile_options(GENERIC_WB15CCUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_WB15CCUX_usb_none INTERFACE) target_compile_options(GENERIC_WB15CCUX_usb_none INTERFACE @@ -103412,7 +103552,7 @@ set(GENERIC_WB55CCUX_MCU cortex-m4) set(GENERIC_WB55CCUX_FPCONF "-") add_library(GENERIC_WB55CCUX INTERFACE) target_compile_options(GENERIC_WB55CCUX INTERFACE - "SHELL:-DSTM32WB55xx " + "SHELL:-DSTM32WB55xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -103457,15 +103597,15 @@ target_compile_options(GENERIC_WB55CCUX_serial_none INTERFACE ) add_library(GENERIC_WB55CCUX_usb_CDC INTERFACE) target_compile_options(GENERIC_WB55CCUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_WB55CCUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_WB55CCUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_WB55CCUX_usb_HID INTERFACE) target_compile_options(GENERIC_WB55CCUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_WB55CCUX_usb_none INTERFACE) target_compile_options(GENERIC_WB55CCUX_usb_none INTERFACE @@ -103494,7 +103634,7 @@ set(GENERIC_WB55CEUX_MCU cortex-m4) set(GENERIC_WB55CEUX_FPCONF "-") add_library(GENERIC_WB55CEUX INTERFACE) target_compile_options(GENERIC_WB55CEUX INTERFACE - "SHELL:-DSTM32WB55xx " + "SHELL:-DSTM32WB55xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -103539,15 +103679,15 @@ target_compile_options(GENERIC_WB55CEUX_serial_none INTERFACE ) add_library(GENERIC_WB55CEUX_usb_CDC INTERFACE) target_compile_options(GENERIC_WB55CEUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_WB55CEUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_WB55CEUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_WB55CEUX_usb_HID INTERFACE) target_compile_options(GENERIC_WB55CEUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_WB55CEUX_usb_none INTERFACE) target_compile_options(GENERIC_WB55CEUX_usb_none INTERFACE @@ -103576,7 +103716,7 @@ set(GENERIC_WB55CGUX_MCU cortex-m4) set(GENERIC_WB55CGUX_FPCONF "-") add_library(GENERIC_WB55CGUX INTERFACE) target_compile_options(GENERIC_WB55CGUX INTERFACE - "SHELL:-DSTM32WB55xx " + "SHELL:-DSTM32WB55xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -103621,15 +103761,15 @@ target_compile_options(GENERIC_WB55CGUX_serial_none INTERFACE ) add_library(GENERIC_WB55CGUX_usb_CDC INTERFACE) target_compile_options(GENERIC_WB55CGUX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_WB55CGUX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_WB55CGUX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_WB55CGUX_usb_HID INTERFACE) target_compile_options(GENERIC_WB55CGUX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_WB55CGUX_usb_none INTERFACE) target_compile_options(GENERIC_WB55CGUX_usb_none INTERFACE @@ -103658,7 +103798,7 @@ set(GENERIC_WB55RCVX_MCU cortex-m4) set(GENERIC_WB55RCVX_FPCONF "-") add_library(GENERIC_WB55RCVX INTERFACE) target_compile_options(GENERIC_WB55RCVX INTERFACE - "SHELL:-DSTM32WB55xx " + "SHELL:-DSTM32WB55xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -103703,15 +103843,15 @@ target_compile_options(GENERIC_WB55RCVX_serial_none INTERFACE ) add_library(GENERIC_WB55RCVX_usb_CDC INTERFACE) target_compile_options(GENERIC_WB55RCVX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_WB55RCVX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_WB55RCVX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_WB55RCVX_usb_HID INTERFACE) target_compile_options(GENERIC_WB55RCVX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_WB55RCVX_usb_none INTERFACE) target_compile_options(GENERIC_WB55RCVX_usb_none INTERFACE @@ -103740,7 +103880,7 @@ set(GENERIC_WB55REVX_MCU cortex-m4) set(GENERIC_WB55REVX_FPCONF "-") add_library(GENERIC_WB55REVX INTERFACE) target_compile_options(GENERIC_WB55REVX INTERFACE - "SHELL:-DSTM32WB55xx " + "SHELL:-DSTM32WB55xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -103785,15 +103925,15 @@ target_compile_options(GENERIC_WB55REVX_serial_none INTERFACE ) add_library(GENERIC_WB55REVX_usb_CDC INTERFACE) target_compile_options(GENERIC_WB55REVX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_WB55REVX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_WB55REVX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_WB55REVX_usb_HID INTERFACE) target_compile_options(GENERIC_WB55REVX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_WB55REVX_usb_none INTERFACE) target_compile_options(GENERIC_WB55REVX_usb_none INTERFACE @@ -103822,7 +103962,7 @@ set(GENERIC_WB55RGVX_MCU cortex-m4) set(GENERIC_WB55RGVX_FPCONF "-") add_library(GENERIC_WB55RGVX INTERFACE) target_compile_options(GENERIC_WB55RGVX INTERFACE - "SHELL:-DSTM32WB55xx " + "SHELL:-DSTM32WB55xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -103867,15 +104007,15 @@ target_compile_options(GENERIC_WB55RGVX_serial_none INTERFACE ) add_library(GENERIC_WB55RGVX_usb_CDC INTERFACE) target_compile_options(GENERIC_WB55RGVX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_WB55RGVX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_WB55RGVX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_WB55RGVX_usb_HID INTERFACE) target_compile_options(GENERIC_WB55RGVX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_WB55RGVX_usb_none INTERFACE) target_compile_options(GENERIC_WB55RGVX_usb_none INTERFACE @@ -103904,7 +104044,7 @@ set(GENERIC_WB55VCQX_MCU cortex-m4) set(GENERIC_WB55VCQX_FPCONF "-") add_library(GENERIC_WB55VCQX INTERFACE) target_compile_options(GENERIC_WB55VCQX INTERFACE - "SHELL:-DSTM32WB55xx " + "SHELL:-DSTM32WB55xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -103949,15 +104089,15 @@ target_compile_options(GENERIC_WB55VCQX_serial_none INTERFACE ) add_library(GENERIC_WB55VCQX_usb_CDC INTERFACE) target_compile_options(GENERIC_WB55VCQX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_WB55VCQX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_WB55VCQX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_WB55VCQX_usb_HID INTERFACE) target_compile_options(GENERIC_WB55VCQX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_WB55VCQX_usb_none INTERFACE) target_compile_options(GENERIC_WB55VCQX_usb_none INTERFACE @@ -103986,7 +104126,7 @@ set(GENERIC_WB55VCYX_MCU cortex-m4) set(GENERIC_WB55VCYX_FPCONF "-") add_library(GENERIC_WB55VCYX INTERFACE) target_compile_options(GENERIC_WB55VCYX INTERFACE - "SHELL:-DSTM32WB55xx " + "SHELL:-DSTM32WB55xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -104031,15 +104171,15 @@ target_compile_options(GENERIC_WB55VCYX_serial_none INTERFACE ) add_library(GENERIC_WB55VCYX_usb_CDC INTERFACE) target_compile_options(GENERIC_WB55VCYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_WB55VCYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_WB55VCYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_WB55VCYX_usb_HID INTERFACE) target_compile_options(GENERIC_WB55VCYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_WB55VCYX_usb_none INTERFACE) target_compile_options(GENERIC_WB55VCYX_usb_none INTERFACE @@ -104068,7 +104208,7 @@ set(GENERIC_WB55VEQX_MCU cortex-m4) set(GENERIC_WB55VEQX_FPCONF "-") add_library(GENERIC_WB55VEQX INTERFACE) target_compile_options(GENERIC_WB55VEQX INTERFACE - "SHELL:-DSTM32WB55xx " + "SHELL:-DSTM32WB55xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -104113,15 +104253,15 @@ target_compile_options(GENERIC_WB55VEQX_serial_none INTERFACE ) add_library(GENERIC_WB55VEQX_usb_CDC INTERFACE) target_compile_options(GENERIC_WB55VEQX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_WB55VEQX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_WB55VEQX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_WB55VEQX_usb_HID INTERFACE) target_compile_options(GENERIC_WB55VEQX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_WB55VEQX_usb_none INTERFACE) target_compile_options(GENERIC_WB55VEQX_usb_none INTERFACE @@ -104150,7 +104290,7 @@ set(GENERIC_WB55VEYX_MCU cortex-m4) set(GENERIC_WB55VEYX_FPCONF "-") add_library(GENERIC_WB55VEYX INTERFACE) target_compile_options(GENERIC_WB55VEYX INTERFACE - "SHELL:-DSTM32WB55xx " + "SHELL:-DSTM32WB55xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -104195,15 +104335,15 @@ target_compile_options(GENERIC_WB55VEYX_serial_none INTERFACE ) add_library(GENERIC_WB55VEYX_usb_CDC INTERFACE) target_compile_options(GENERIC_WB55VEYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_WB55VEYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_WB55VEYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_WB55VEYX_usb_HID INTERFACE) target_compile_options(GENERIC_WB55VEYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_WB55VEYX_usb_none INTERFACE) target_compile_options(GENERIC_WB55VEYX_usb_none INTERFACE @@ -104232,7 +104372,7 @@ set(GENERIC_WB55VGQX_MCU cortex-m4) set(GENERIC_WB55VGQX_FPCONF "-") add_library(GENERIC_WB55VGQX INTERFACE) target_compile_options(GENERIC_WB55VGQX INTERFACE - "SHELL:-DSTM32WB55xx " + "SHELL:-DSTM32WB55xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -104277,15 +104417,15 @@ target_compile_options(GENERIC_WB55VGQX_serial_none INTERFACE ) add_library(GENERIC_WB55VGQX_usb_CDC INTERFACE) target_compile_options(GENERIC_WB55VGQX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_WB55VGQX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_WB55VGQX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_WB55VGQX_usb_HID INTERFACE) target_compile_options(GENERIC_WB55VGQX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_WB55VGQX_usb_none INTERFACE) target_compile_options(GENERIC_WB55VGQX_usb_none INTERFACE @@ -104314,7 +104454,7 @@ set(GENERIC_WB55VGYX_MCU cortex-m4) set(GENERIC_WB55VGYX_FPCONF "-") add_library(GENERIC_WB55VGYX INTERFACE) target_compile_options(GENERIC_WB55VGYX INTERFACE - "SHELL:-DSTM32WB55xx " + "SHELL:-DSTM32WB55xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -104359,15 +104499,15 @@ target_compile_options(GENERIC_WB55VGYX_serial_none INTERFACE ) add_library(GENERIC_WB55VGYX_usb_CDC INTERFACE) target_compile_options(GENERIC_WB55VGYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_WB55VGYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_WB55VGYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_WB55VGYX_usb_HID INTERFACE) target_compile_options(GENERIC_WB55VGYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_WB55VGYX_usb_none INTERFACE) target_compile_options(GENERIC_WB55VGYX_usb_none INTERFACE @@ -104396,7 +104536,7 @@ set(GENERIC_WB55VYYX_MCU cortex-m4) set(GENERIC_WB55VYYX_FPCONF "-") add_library(GENERIC_WB55VYYX INTERFACE) target_compile_options(GENERIC_WB55VYYX INTERFACE - "SHELL:-DSTM32WB55xx " + "SHELL:-DSTM32WB55xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -104441,15 +104581,15 @@ target_compile_options(GENERIC_WB55VYYX_serial_none INTERFACE ) add_library(GENERIC_WB55VYYX_usb_CDC INTERFACE) target_compile_options(GENERIC_WB55VYYX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_WB55VYYX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_WB55VYYX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_WB55VYYX_usb_HID INTERFACE) target_compile_options(GENERIC_WB55VYYX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_WB55VYYX_usb_none INTERFACE) target_compile_options(GENERIC_WB55VYYX_usb_none INTERFACE @@ -104478,7 +104618,7 @@ set(GENERIC_WB5MMGHX_MCU cortex-m4) set(GENERIC_WB5MMGHX_FPCONF "-") add_library(GENERIC_WB5MMGHX INTERFACE) target_compile_options(GENERIC_WB5MMGHX INTERFACE - "SHELL:-DSTM32WB5Mxx " + "SHELL:-DSTM32WB5Mxx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -104523,15 +104663,15 @@ target_compile_options(GENERIC_WB5MMGHX_serial_none INTERFACE ) add_library(GENERIC_WB5MMGHX_usb_CDC INTERFACE) target_compile_options(GENERIC_WB5MMGHX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(GENERIC_WB5MMGHX_usb_CDCgen INTERFACE) target_compile_options(GENERIC_WB5MMGHX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(GENERIC_WB5MMGHX_usb_HID INTERFACE) target_compile_options(GENERIC_WB5MMGHX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(GENERIC_WB5MMGHX_usb_none INTERFACE) target_compile_options(GENERIC_WB5MMGHX_usb_none INTERFACE @@ -104560,7 +104700,7 @@ set(GENERIC_WBA55CEUX_MCU cortex-m33) set(GENERIC_WBA55CEUX_FPCONF "-") add_library(GENERIC_WBA55CEUX INTERFACE) target_compile_options(GENERIC_WBA55CEUX INTERFACE - "SHELL:-DSTM32WBA55xx " + "SHELL:-DSTM32WBA55xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -104614,7 +104754,7 @@ set(GENERIC_WBA55CGUX_MCU cortex-m33) set(GENERIC_WBA55CGUX_FPCONF "-") add_library(GENERIC_WBA55CGUX INTERFACE) target_compile_options(GENERIC_WBA55CGUX INTERFACE - "SHELL:-DSTM32WBA55xx " + "SHELL:-DSTM32WBA55xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -104668,7 +104808,7 @@ set(GENERIC_WL54CCUX_MCU cortex-m4) set(GENERIC_WL54CCUX_FPCONF "-") add_library(GENERIC_WL54CCUX INTERFACE) target_compile_options(GENERIC_WL54CCUX INTERFACE - "SHELL:-DSTM32WL54xx -DUSE_CM4_STARTUP_FILE " + "SHELL:-DSTM32WL54xx -DUSE_CM4_STARTUP_FILE" "SHELL:" "SHELL:" "SHELL: " @@ -104722,7 +104862,7 @@ set(GENERIC_WL54JCIX_MCU cortex-m4) set(GENERIC_WL54JCIX_FPCONF "-") add_library(GENERIC_WL54JCIX INTERFACE) target_compile_options(GENERIC_WL54JCIX INTERFACE - "SHELL:-DSTM32WL54xx -DUSE_CM4_STARTUP_FILE " + "SHELL:-DSTM32WL54xx -DUSE_CM4_STARTUP_FILE" "SHELL:" "SHELL:" "SHELL: " @@ -104776,7 +104916,7 @@ set(GENERIC_WL55CCUX_MCU cortex-m4) set(GENERIC_WL55CCUX_FPCONF "-") add_library(GENERIC_WL55CCUX INTERFACE) target_compile_options(GENERIC_WL55CCUX INTERFACE - "SHELL:-DSTM32WL55xx -DUSE_CM4_STARTUP_FILE " + "SHELL:-DSTM32WL55xx -DUSE_CM4_STARTUP_FILE" "SHELL:" "SHELL:" "SHELL: " @@ -104830,7 +104970,7 @@ set(GENERIC_WL55JCIX_MCU cortex-m4) set(GENERIC_WL55JCIX_FPCONF "-") add_library(GENERIC_WL55JCIX INTERFACE) target_compile_options(GENERIC_WL55JCIX INTERFACE - "SHELL:-DSTM32WL55xx -DUSE_CM4_STARTUP_FILE " + "SHELL:-DSTM32WL55xx -DUSE_CM4_STARTUP_FILE" "SHELL:" "SHELL:" "SHELL: " @@ -104884,7 +105024,7 @@ set(GENERIC_WLE4C8UX_MCU cortex-m4) set(GENERIC_WLE4C8UX_FPCONF "-") add_library(GENERIC_WLE4C8UX INTERFACE) target_compile_options(GENERIC_WLE4C8UX INTERFACE - "SHELL:-DSTM32WLE4xx -DUSE_CM4_STARTUP_FILE " + "SHELL:-DSTM32WLE4xx -DUSE_CM4_STARTUP_FILE" "SHELL:" "SHELL:" "SHELL: " @@ -104938,7 +105078,7 @@ set(GENERIC_WLE4CBUX_MCU cortex-m4) set(GENERIC_WLE4CBUX_FPCONF "-") add_library(GENERIC_WLE4CBUX INTERFACE) target_compile_options(GENERIC_WLE4CBUX INTERFACE - "SHELL:-DSTM32WLE4xx -DUSE_CM4_STARTUP_FILE " + "SHELL:-DSTM32WLE4xx -DUSE_CM4_STARTUP_FILE" "SHELL:" "SHELL:" "SHELL: " @@ -104992,7 +105132,7 @@ set(GENERIC_WLE4CCUX_MCU cortex-m4) set(GENERIC_WLE4CCUX_FPCONF "-") add_library(GENERIC_WLE4CCUX INTERFACE) target_compile_options(GENERIC_WLE4CCUX INTERFACE - "SHELL:-DSTM32WLE4xx -DUSE_CM4_STARTUP_FILE " + "SHELL:-DSTM32WLE4xx -DUSE_CM4_STARTUP_FILE" "SHELL:" "SHELL:" "SHELL: " @@ -105046,7 +105186,7 @@ set(GENERIC_WLE4J8IX_MCU cortex-m4) set(GENERIC_WLE4J8IX_FPCONF "-") add_library(GENERIC_WLE4J8IX INTERFACE) target_compile_options(GENERIC_WLE4J8IX INTERFACE - "SHELL:-DSTM32WLE4xx -DUSE_CM4_STARTUP_FILE " + "SHELL:-DSTM32WLE4xx -DUSE_CM4_STARTUP_FILE" "SHELL:" "SHELL:" "SHELL: " @@ -105100,7 +105240,7 @@ set(GENERIC_WLE4JBIX_MCU cortex-m4) set(GENERIC_WLE4JBIX_FPCONF "-") add_library(GENERIC_WLE4JBIX INTERFACE) target_compile_options(GENERIC_WLE4JBIX INTERFACE - "SHELL:-DSTM32WLE4xx -DUSE_CM4_STARTUP_FILE " + "SHELL:-DSTM32WLE4xx -DUSE_CM4_STARTUP_FILE" "SHELL:" "SHELL:" "SHELL: " @@ -105154,7 +105294,7 @@ set(GENERIC_WLE4JCIX_MCU cortex-m4) set(GENERIC_WLE4JCIX_FPCONF "-") add_library(GENERIC_WLE4JCIX INTERFACE) target_compile_options(GENERIC_WLE4JCIX INTERFACE - "SHELL:-DSTM32WLE4xx -DUSE_CM4_STARTUP_FILE " + "SHELL:-DSTM32WLE4xx -DUSE_CM4_STARTUP_FILE" "SHELL:" "SHELL:" "SHELL: " @@ -105208,7 +105348,7 @@ set(GENERIC_WLE5C8UX_MCU cortex-m4) set(GENERIC_WLE5C8UX_FPCONF "-") add_library(GENERIC_WLE5C8UX INTERFACE) target_compile_options(GENERIC_WLE5C8UX INTERFACE - "SHELL:-DSTM32WLE5xx -DUSE_CM4_STARTUP_FILE " + "SHELL:-DSTM32WLE5xx -DUSE_CM4_STARTUP_FILE" "SHELL:" "SHELL:" "SHELL: " @@ -105262,7 +105402,7 @@ set(GENERIC_WLE5CBUX_MCU cortex-m4) set(GENERIC_WLE5CBUX_FPCONF "-") add_library(GENERIC_WLE5CBUX INTERFACE) target_compile_options(GENERIC_WLE5CBUX INTERFACE - "SHELL:-DSTM32WLE5xx -DUSE_CM4_STARTUP_FILE " + "SHELL:-DSTM32WLE5xx -DUSE_CM4_STARTUP_FILE" "SHELL:" "SHELL:" "SHELL: " @@ -105316,7 +105456,7 @@ set(GENERIC_WLE5CCUX_MCU cortex-m4) set(GENERIC_WLE5CCUX_FPCONF "-") add_library(GENERIC_WLE5CCUX INTERFACE) target_compile_options(GENERIC_WLE5CCUX INTERFACE - "SHELL:-DSTM32WLE5xx -DUSE_CM4_STARTUP_FILE " + "SHELL:-DSTM32WLE5xx -DUSE_CM4_STARTUP_FILE" "SHELL:" "SHELL:" "SHELL: " @@ -105370,7 +105510,7 @@ set(GENERIC_WLE5J8IX_MCU cortex-m4) set(GENERIC_WLE5J8IX_FPCONF "-") add_library(GENERIC_WLE5J8IX INTERFACE) target_compile_options(GENERIC_WLE5J8IX INTERFACE - "SHELL:-DSTM32WLE5xx -DUSE_CM4_STARTUP_FILE " + "SHELL:-DSTM32WLE5xx -DUSE_CM4_STARTUP_FILE" "SHELL:" "SHELL:" "SHELL: " @@ -105424,7 +105564,7 @@ set(GENERIC_WLE5JBIX_MCU cortex-m4) set(GENERIC_WLE5JBIX_FPCONF "-") add_library(GENERIC_WLE5JBIX INTERFACE) target_compile_options(GENERIC_WLE5JBIX INTERFACE - "SHELL:-DSTM32WLE5xx -DUSE_CM4_STARTUP_FILE " + "SHELL:-DSTM32WLE5xx -DUSE_CM4_STARTUP_FILE" "SHELL:" "SHELL:" "SHELL: " @@ -105478,7 +105618,7 @@ set(GENERIC_WLE5JCIX_MCU cortex-m4) set(GENERIC_WLE5JCIX_FPCONF "-") add_library(GENERIC_WLE5JCIX INTERFACE) target_compile_options(GENERIC_WLE5JCIX INTERFACE - "SHELL:-DSTM32WLE5xx -DUSE_CM4_STARTUP_FILE " + "SHELL:-DSTM32WLE5xx -DUSE_CM4_STARTUP_FILE" "SHELL:" "SHELL:" "SHELL: " @@ -105532,7 +105672,7 @@ set(HY_TINYSTM103TB_MCU cortex-m3) set(HY_TINYSTM103TB_FPCONF "-") add_library(HY_TINYSTM103TB INTERFACE) target_compile_options(HY_TINYSTM103TB INTERFACE - "SHELL:-DSTM32F103xB " + "SHELL:-DSTM32F103xB" "SHELL:" "SHELL:" "SHELL: " @@ -105577,15 +105717,15 @@ target_compile_options(HY_TINYSTM103TB_serial_none INTERFACE ) add_library(HY_TINYSTM103TB_usb_CDC INTERFACE) target_compile_options(HY_TINYSTM103TB_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(HY_TINYSTM103TB_usb_CDCgen INTERFACE) target_compile_options(HY_TINYSTM103TB_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(HY_TINYSTM103TB_usb_HID INTERFACE) target_compile_options(HY_TINYSTM103TB_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(HY_TINYSTM103TB_usb_none INTERFACE) target_compile_options(HY_TINYSTM103TB_usb_none INTERFACE @@ -105614,7 +105754,7 @@ set(HY_TINYSTM103TB_dfu2_MCU cortex-m3) set(HY_TINYSTM103TB_dfu2_FPCONF "-") add_library(HY_TINYSTM103TB_dfu2 INTERFACE) target_compile_options(HY_TINYSTM103TB_dfu2 INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -105656,7 +105796,7 @@ set(HY_TINYSTM103TB_dfuo_MCU cortex-m3) set(HY_TINYSTM103TB_dfuo_FPCONF "-") add_library(HY_TINYSTM103TB_dfuo INTERFACE) target_compile_options(HY_TINYSTM103TB_dfuo INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -105698,7 +105838,7 @@ set(HY_TINYSTM103TB_hid_MCU cortex-m3) set(HY_TINYSTM103TB_hid_FPCONF "-") add_library(HY_TINYSTM103TB_hid INTERFACE) target_compile_options(HY_TINYSTM103TB_hid INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -105740,7 +105880,7 @@ set(LEAFONY_AP03_MCU cortex-m4) set(LEAFONY_AP03_FPCONF "-") add_library(LEAFONY_AP03 INTERFACE) target_compile_options(LEAFONY_AP03 INTERFACE - "SHELL:-DSTM32L452xx " + "SHELL:-DSTM32L452xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -105785,15 +105925,15 @@ target_compile_options(LEAFONY_AP03_serial_none INTERFACE ) add_library(LEAFONY_AP03_usb_CDC INTERFACE) target_compile_options(LEAFONY_AP03_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(LEAFONY_AP03_usb_CDCgen INTERFACE) target_compile_options(LEAFONY_AP03_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(LEAFONY_AP03_usb_HID INTERFACE) target_compile_options(LEAFONY_AP03_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(LEAFONY_AP03_usb_none INTERFACE) target_compile_options(LEAFONY_AP03_usb_none INTERFACE @@ -105822,7 +105962,7 @@ set(LORA_E5_MINI_MCU cortex-m4) set(LORA_E5_MINI_FPCONF "-") add_library(LORA_E5_MINI INTERFACE) target_compile_options(LORA_E5_MINI INTERFACE - "SHELL:-DSTM32WLE5xx " + "SHELL:-DSTM32WLE5xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL: " @@ -105876,7 +106016,7 @@ set(MALYANM200_F070CB_MCU cortex-m0) set(MALYANM200_F070CB_FPCONF "-") add_library(MALYANM200_F070CB INTERFACE) target_compile_options(MALYANM200_F070CB INTERFACE - "SHELL:-DSTM32F070xB " + "SHELL:-DSTM32F070xB" "SHELL:" "SHELL:-DCUSTOM_STARTUP_FILE" "SHELL: " @@ -105921,11 +106061,11 @@ target_compile_options(MALYANM200_F070CB_serial_none INTERFACE ) add_library(MALYANM200_F070CB_usb_CDC INTERFACE) target_compile_options(MALYANM200_F070CB_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(MALYANM200_F070CB_usb_CDCgen INTERFACE) target_compile_options(MALYANM200_F070CB_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(MALYANM200_F070CB_usb_none INTERFACE) target_compile_options(MALYANM200_F070CB_usb_none INTERFACE @@ -105954,7 +106094,7 @@ set(MALYANM200_F103CB_MCU cortex-m3) set(MALYANM200_F103CB_FPCONF "-") add_library(MALYANM200_F103CB INTERFACE) target_compile_options(MALYANM200_F103CB INTERFACE - "SHELL:-DSTM32F103xB " + "SHELL:-DSTM32F103xB" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:-DCUSTOM_STARTUP_FILE" "SHELL: " @@ -105999,11 +106139,11 @@ target_compile_options(MALYANM200_F103CB_serial_none INTERFACE ) add_library(MALYANM200_F103CB_usb_CDC INTERFACE) target_compile_options(MALYANM200_F103CB_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(MALYANM200_F103CB_usb_CDCgen INTERFACE) target_compile_options(MALYANM200_F103CB_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(MALYANM200_F103CB_usb_none INTERFACE) target_compile_options(MALYANM200_F103CB_usb_none INTERFACE @@ -106032,7 +106172,7 @@ set(MALYANM300_F070CB_MCU cortex-m0) set(MALYANM300_F070CB_FPCONF "-") add_library(MALYANM300_F070CB INTERFACE) target_compile_options(MALYANM300_F070CB INTERFACE - "SHELL:-DSTM32F070xB " + "SHELL:-DSTM32F070xB" "SHELL:" "SHELL:-DCUSTOM_STARTUP_FILE" "SHELL: " @@ -106077,11 +106217,11 @@ target_compile_options(MALYANM300_F070CB_serial_none INTERFACE ) add_library(MALYANM300_F070CB_usb_CDC INTERFACE) target_compile_options(MALYANM300_F070CB_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(MALYANM300_F070CB_usb_CDCgen INTERFACE) target_compile_options(MALYANM300_F070CB_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(MALYANM300_F070CB_usb_none INTERFACE) target_compile_options(MALYANM300_F070CB_usb_none INTERFACE @@ -106110,7 +106250,7 @@ set(MAPLEMINI_F103CB_MCU cortex-m3) set(MAPLEMINI_F103CB_FPCONF "-") add_library(MAPLEMINI_F103CB INTERFACE) target_compile_options(MAPLEMINI_F103CB INTERFACE - "SHELL:-DSTM32F103xB " + "SHELL:-DSTM32F103xB" "SHELL:" "SHELL:" "SHELL: " @@ -106155,15 +106295,15 @@ target_compile_options(MAPLEMINI_F103CB_serial_none INTERFACE ) add_library(MAPLEMINI_F103CB_usb_CDC INTERFACE) target_compile_options(MAPLEMINI_F103CB_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(MAPLEMINI_F103CB_usb_CDCgen INTERFACE) target_compile_options(MAPLEMINI_F103CB_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(MAPLEMINI_F103CB_usb_HID INTERFACE) target_compile_options(MAPLEMINI_F103CB_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(MAPLEMINI_F103CB_usb_none INTERFACE) target_compile_options(MAPLEMINI_F103CB_usb_none INTERFACE @@ -106192,7 +106332,7 @@ set(MAPLEMINI_F103CB_dfu2_MCU cortex-m3) set(MAPLEMINI_F103CB_dfu2_FPCONF "-") add_library(MAPLEMINI_F103CB_dfu2 INTERFACE) target_compile_options(MAPLEMINI_F103CB_dfu2 INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -106234,7 +106374,7 @@ set(MAPLEMINI_F103CB_dfuo_MCU cortex-m3) set(MAPLEMINI_F103CB_dfuo_FPCONF "-") add_library(MAPLEMINI_F103CB_dfuo INTERFACE) target_compile_options(MAPLEMINI_F103CB_dfuo INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -106276,7 +106416,7 @@ set(MAPLEMINI_F103CB_hid_MCU cortex-m3) set(MAPLEMINI_F103CB_hid_FPCONF "-") add_library(MAPLEMINI_F103CB_hid INTERFACE) target_compile_options(MAPLEMINI_F103CB_hid INTERFACE - "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -106318,7 +106458,7 @@ set(MICROMOD_F405_MCU cortex-m4) set(MICROMOD_F405_FPCONF "fpv4-sp-d16-hard") add_library(MICROMOD_F405 INTERFACE) target_compile_options(MICROMOD_F405 INTERFACE - "SHELL:-DSTM32F405xx " + "SHELL:-DSTM32F405xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -106363,15 +106503,15 @@ target_compile_options(MICROMOD_F405_serial_none INTERFACE ) add_library(MICROMOD_F405_usb_CDC INTERFACE) target_compile_options(MICROMOD_F405_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x1B4F -DUSBD_PID=0x0029 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x1B4F -DUSBD_PID=0x0029 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(MICROMOD_F405_usb_CDCgen INTERFACE) target_compile_options(MICROMOD_F405_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x1B4F -DUSBD_PID=0x0029 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x1B4F -DUSBD_PID=0x0029 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(MICROMOD_F405_usb_HID INTERFACE) target_compile_options(MICROMOD_F405_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x1B4F -DUSBD_PID=0x0029 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x1B4F -DUSBD_PID=0x0029 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(MICROMOD_F405_usb_none INTERFACE) target_compile_options(MICROMOD_F405_usb_none INTERFACE @@ -106400,7 +106540,7 @@ set(MKR_SHARKY_MCU cortex-m4) set(MKR_SHARKY_FPCONF "fpv4-sp-d16-hard") add_library(MKR_SHARKY INTERFACE) target_compile_options(MKR_SHARKY INTERFACE - "SHELL:-DSTM32WB55xx " + "SHELL:-DSTM32WB55xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -106445,15 +106585,15 @@ target_compile_options(MKR_SHARKY_serial_none INTERFACE ) add_library(MKR_SHARKY_usb_CDC INTERFACE) target_compile_options(MKR_SHARKY_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(MKR_SHARKY_usb_CDCgen INTERFACE) target_compile_options(MKR_SHARKY_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(MKR_SHARKY_usb_HID INTERFACE) target_compile_options(MKR_SHARKY_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(MKR_SHARKY_usb_none INTERFACE) target_compile_options(MKR_SHARKY_usb_none INTERFACE @@ -106482,7 +106622,7 @@ set(NUCLEO_C031C6_MCU cortex-m0plus) set(NUCLEO_C031C6_FPCONF "-") add_library(NUCLEO_C031C6 INTERFACE) target_compile_options(NUCLEO_C031C6 INTERFACE - "SHELL:-DSTM32C031xx -D__CORTEX_SC=0" + "SHELL:-DSTM32C031xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -106527,15 +106667,15 @@ target_compile_options(NUCLEO_C031C6_serial_none INTERFACE ) add_library(NUCLEO_C031C6_usb_CDC INTERFACE) target_compile_options(NUCLEO_C031C6_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_C031C6_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_C031C6_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_C031C6_usb_HID INTERFACE) target_compile_options(NUCLEO_C031C6_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_C031C6_usb_none INTERFACE) target_compile_options(NUCLEO_C031C6_usb_none INTERFACE @@ -106564,7 +106704,7 @@ set(NUCLEO_C071RB_MCU cortex-m0plus) set(NUCLEO_C071RB_FPCONF "-") add_library(NUCLEO_C071RB INTERFACE) target_compile_options(NUCLEO_C071RB INTERFACE - "SHELL:-DSTM32C071xx -D__CORTEX_SC=0" + "SHELL:-DSTM32C071xx -D__CORTEX_SC=0" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL: " @@ -106609,15 +106749,15 @@ target_compile_options(NUCLEO_C071RB_serial_none INTERFACE ) add_library(NUCLEO_C071RB_usb_CDC INTERFACE) target_compile_options(NUCLEO_C071RB_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_C071RB_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_C071RB_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_C071RB_usb_HID INTERFACE) target_compile_options(NUCLEO_C071RB_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_C071RB_usb_none INTERFACE) target_compile_options(NUCLEO_C071RB_usb_none INTERFACE @@ -106646,7 +106786,7 @@ set(NUCLEO_F030R8_MCU cortex-m0) set(NUCLEO_F030R8_FPCONF "-") add_library(NUCLEO_F030R8 INTERFACE) target_compile_options(NUCLEO_F030R8 INTERFACE - "SHELL:-DSTM32F030x8 " + "SHELL:-DSTM32F030x8" "SHELL:" "SHELL:" "SHELL: " @@ -106691,15 +106831,15 @@ target_compile_options(NUCLEO_F030R8_serial_none INTERFACE ) add_library(NUCLEO_F030R8_usb_CDC INTERFACE) target_compile_options(NUCLEO_F030R8_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_F030R8_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_F030R8_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_F030R8_usb_HID INTERFACE) target_compile_options(NUCLEO_F030R8_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_F030R8_usb_none INTERFACE) target_compile_options(NUCLEO_F030R8_usb_none INTERFACE @@ -106728,7 +106868,7 @@ set(NUCLEO_F031K6_MCU cortex-m0) set(NUCLEO_F031K6_FPCONF "-") add_library(NUCLEO_F031K6 INTERFACE) target_compile_options(NUCLEO_F031K6 INTERFACE - "SHELL:-DSTM32F031x6 " + "SHELL:-DSTM32F031x6" "SHELL:" "SHELL:" "SHELL: " @@ -106773,15 +106913,15 @@ target_compile_options(NUCLEO_F031K6_serial_none INTERFACE ) add_library(NUCLEO_F031K6_usb_CDC INTERFACE) target_compile_options(NUCLEO_F031K6_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_F031K6_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_F031K6_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_F031K6_usb_HID INTERFACE) target_compile_options(NUCLEO_F031K6_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_F031K6_usb_none INTERFACE) target_compile_options(NUCLEO_F031K6_usb_none INTERFACE @@ -106810,7 +106950,7 @@ set(NUCLEO_F042K6_MCU cortex-m0) set(NUCLEO_F042K6_FPCONF "-") add_library(NUCLEO_F042K6 INTERFACE) target_compile_options(NUCLEO_F042K6 INTERFACE - "SHELL:-DSTM32F042x6 " + "SHELL:-DSTM32F042x6" "SHELL:" "SHELL:" "SHELL: " @@ -106855,15 +106995,15 @@ target_compile_options(NUCLEO_F042K6_serial_none INTERFACE ) add_library(NUCLEO_F042K6_usb_CDC INTERFACE) target_compile_options(NUCLEO_F042K6_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_F042K6_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_F042K6_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_F042K6_usb_HID INTERFACE) target_compile_options(NUCLEO_F042K6_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_F042K6_usb_none INTERFACE) target_compile_options(NUCLEO_F042K6_usb_none INTERFACE @@ -106892,7 +107032,7 @@ set(NUCLEO_F070RB_MCU cortex-m0) set(NUCLEO_F070RB_FPCONF "-") add_library(NUCLEO_F070RB INTERFACE) target_compile_options(NUCLEO_F070RB INTERFACE - "SHELL:-DSTM32F070xB " + "SHELL:-DSTM32F070xB" "SHELL:" "SHELL:" "SHELL: " @@ -106937,15 +107077,15 @@ target_compile_options(NUCLEO_F070RB_serial_none INTERFACE ) add_library(NUCLEO_F070RB_usb_CDC INTERFACE) target_compile_options(NUCLEO_F070RB_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_F070RB_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_F070RB_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_F070RB_usb_HID INTERFACE) target_compile_options(NUCLEO_F070RB_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_F070RB_usb_none INTERFACE) target_compile_options(NUCLEO_F070RB_usb_none INTERFACE @@ -106974,7 +107114,7 @@ set(NUCLEO_F072RB_MCU cortex-m0) set(NUCLEO_F072RB_FPCONF "-") add_library(NUCLEO_F072RB INTERFACE) target_compile_options(NUCLEO_F072RB INTERFACE - "SHELL:-DSTM32F072xB " + "SHELL:-DSTM32F072xB" "SHELL:" "SHELL:" "SHELL: " @@ -107019,15 +107159,15 @@ target_compile_options(NUCLEO_F072RB_serial_none INTERFACE ) add_library(NUCLEO_F072RB_usb_CDC INTERFACE) target_compile_options(NUCLEO_F072RB_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_F072RB_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_F072RB_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_F072RB_usb_HID INTERFACE) target_compile_options(NUCLEO_F072RB_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_F072RB_usb_none INTERFACE) target_compile_options(NUCLEO_F072RB_usb_none INTERFACE @@ -107056,7 +107196,7 @@ set(NUCLEO_F091RC_MCU cortex-m0) set(NUCLEO_F091RC_FPCONF "-") add_library(NUCLEO_F091RC INTERFACE) target_compile_options(NUCLEO_F091RC INTERFACE - "SHELL:-DSTM32F091xC " + "SHELL:-DSTM32F091xC" "SHELL:" "SHELL:" "SHELL: " @@ -107101,15 +107241,15 @@ target_compile_options(NUCLEO_F091RC_serial_none INTERFACE ) add_library(NUCLEO_F091RC_usb_CDC INTERFACE) target_compile_options(NUCLEO_F091RC_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_F091RC_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_F091RC_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_F091RC_usb_HID INTERFACE) target_compile_options(NUCLEO_F091RC_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_F091RC_usb_none INTERFACE) target_compile_options(NUCLEO_F091RC_usb_none INTERFACE @@ -107138,7 +107278,7 @@ set(NUCLEO_F103RB_MCU cortex-m3) set(NUCLEO_F103RB_FPCONF "-") add_library(NUCLEO_F103RB INTERFACE) target_compile_options(NUCLEO_F103RB INTERFACE - "SHELL:-DSTM32F103xB " + "SHELL:-DSTM32F103xB" "SHELL:" "SHELL:" "SHELL: " @@ -107183,15 +107323,15 @@ target_compile_options(NUCLEO_F103RB_serial_none INTERFACE ) add_library(NUCLEO_F103RB_usb_CDC INTERFACE) target_compile_options(NUCLEO_F103RB_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_F103RB_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_F103RB_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_F103RB_usb_HID INTERFACE) target_compile_options(NUCLEO_F103RB_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_F103RB_usb_none INTERFACE) target_compile_options(NUCLEO_F103RB_usb_none INTERFACE @@ -107220,7 +107360,7 @@ set(NUCLEO_F207ZG_MCU cortex-m3) set(NUCLEO_F207ZG_FPCONF "-") add_library(NUCLEO_F207ZG INTERFACE) target_compile_options(NUCLEO_F207ZG INTERFACE - "SHELL:-DSTM32F207xx " + "SHELL:-DSTM32F207xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL: " @@ -107265,15 +107405,15 @@ target_compile_options(NUCLEO_F207ZG_serial_none INTERFACE ) add_library(NUCLEO_F207ZG_usb_CDC INTERFACE) target_compile_options(NUCLEO_F207ZG_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_F207ZG_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_F207ZG_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_F207ZG_usb_HID INTERFACE) target_compile_options(NUCLEO_F207ZG_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_F207ZG_usb_none INTERFACE) target_compile_options(NUCLEO_F207ZG_usb_none INTERFACE @@ -107302,7 +107442,7 @@ set(NUCLEO_F302R8_MCU cortex-m4) set(NUCLEO_F302R8_FPCONF "fpv4-sp-d16-hard") add_library(NUCLEO_F302R8 INTERFACE) target_compile_options(NUCLEO_F302R8 INTERFACE - "SHELL:-DSTM32F302x8 " + "SHELL:-DSTM32F302x8" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -107347,15 +107487,15 @@ target_compile_options(NUCLEO_F302R8_serial_none INTERFACE ) add_library(NUCLEO_F302R8_usb_CDC INTERFACE) target_compile_options(NUCLEO_F302R8_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_F302R8_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_F302R8_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_F302R8_usb_HID INTERFACE) target_compile_options(NUCLEO_F302R8_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_F302R8_usb_none INTERFACE) target_compile_options(NUCLEO_F302R8_usb_none INTERFACE @@ -107384,7 +107524,7 @@ set(NUCLEO_F303K8_MCU cortex-m4) set(NUCLEO_F303K8_FPCONF "fpv4-sp-d16-hard") add_library(NUCLEO_F303K8 INTERFACE) target_compile_options(NUCLEO_F303K8 INTERFACE - "SHELL:-DSTM32F303x8 " + "SHELL:-DSTM32F303x8" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -107429,15 +107569,15 @@ target_compile_options(NUCLEO_F303K8_serial_none INTERFACE ) add_library(NUCLEO_F303K8_usb_CDC INTERFACE) target_compile_options(NUCLEO_F303K8_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_F303K8_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_F303K8_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_F303K8_usb_HID INTERFACE) target_compile_options(NUCLEO_F303K8_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_F303K8_usb_none INTERFACE) target_compile_options(NUCLEO_F303K8_usb_none INTERFACE @@ -107466,7 +107606,7 @@ set(NUCLEO_F303RE_MCU cortex-m4) set(NUCLEO_F303RE_FPCONF "fpv4-sp-d16-hard") add_library(NUCLEO_F303RE INTERFACE) target_compile_options(NUCLEO_F303RE INTERFACE - "SHELL:-DSTM32F303xE " + "SHELL:-DSTM32F303xE" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -107511,15 +107651,15 @@ target_compile_options(NUCLEO_F303RE_serial_none INTERFACE ) add_library(NUCLEO_F303RE_usb_CDC INTERFACE) target_compile_options(NUCLEO_F303RE_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_F303RE_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_F303RE_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_F303RE_usb_HID INTERFACE) target_compile_options(NUCLEO_F303RE_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_F303RE_usb_none INTERFACE) target_compile_options(NUCLEO_F303RE_usb_none INTERFACE @@ -107548,7 +107688,7 @@ set(NUCLEO_F401RE_MCU cortex-m4) set(NUCLEO_F401RE_FPCONF "fpv4-sp-d16-hard") add_library(NUCLEO_F401RE INTERFACE) target_compile_options(NUCLEO_F401RE INTERFACE - "SHELL:-DSTM32F401xE " + "SHELL:-DSTM32F401xE" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -107593,15 +107733,15 @@ target_compile_options(NUCLEO_F401RE_serial_none INTERFACE ) add_library(NUCLEO_F401RE_usb_CDC INTERFACE) target_compile_options(NUCLEO_F401RE_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_F401RE_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_F401RE_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_F401RE_usb_HID INTERFACE) target_compile_options(NUCLEO_F401RE_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_F401RE_usb_none INTERFACE) target_compile_options(NUCLEO_F401RE_usb_none INTERFACE @@ -107630,7 +107770,7 @@ set(NUCLEO_F410RB_MCU cortex-m4) set(NUCLEO_F410RB_FPCONF "fpv4-sp-d16-hard") add_library(NUCLEO_F410RB INTERFACE) target_compile_options(NUCLEO_F410RB INTERFACE - "SHELL:-DSTM32F410Rx " + "SHELL:-DSTM32F410Rx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -107675,15 +107815,15 @@ target_compile_options(NUCLEO_F410RB_serial_none INTERFACE ) add_library(NUCLEO_F410RB_usb_CDC INTERFACE) target_compile_options(NUCLEO_F410RB_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_F410RB_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_F410RB_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_F410RB_usb_HID INTERFACE) target_compile_options(NUCLEO_F410RB_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_F410RB_usb_none INTERFACE) target_compile_options(NUCLEO_F410RB_usb_none INTERFACE @@ -107712,7 +107852,7 @@ set(NUCLEO_F411RE_MCU cortex-m4) set(NUCLEO_F411RE_FPCONF "fpv4-sp-d16-hard") add_library(NUCLEO_F411RE INTERFACE) target_compile_options(NUCLEO_F411RE INTERFACE - "SHELL:-DSTM32F411xE " + "SHELL:-DSTM32F411xE" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -107757,15 +107897,15 @@ target_compile_options(NUCLEO_F411RE_serial_none INTERFACE ) add_library(NUCLEO_F411RE_usb_CDC INTERFACE) target_compile_options(NUCLEO_F411RE_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_F411RE_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_F411RE_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_F411RE_usb_HID INTERFACE) target_compile_options(NUCLEO_F411RE_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_F411RE_usb_none INTERFACE) target_compile_options(NUCLEO_F411RE_usb_none INTERFACE @@ -107794,7 +107934,7 @@ set(NUCLEO_F412ZG_MCU cortex-m4) set(NUCLEO_F412ZG_FPCONF "fpv4-sp-d16-hard") add_library(NUCLEO_F412ZG INTERFACE) target_compile_options(NUCLEO_F412ZG INTERFACE - "SHELL:-DSTM32F412Zx " + "SHELL:-DSTM32F412Zx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -107839,15 +107979,15 @@ target_compile_options(NUCLEO_F412ZG_serial_none INTERFACE ) add_library(NUCLEO_F412ZG_usb_CDC INTERFACE) target_compile_options(NUCLEO_F412ZG_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_F412ZG_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_F412ZG_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_F412ZG_usb_HID INTERFACE) target_compile_options(NUCLEO_F412ZG_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_F412ZG_usb_none INTERFACE) target_compile_options(NUCLEO_F412ZG_usb_none INTERFACE @@ -107876,7 +108016,7 @@ set(NUCLEO_F413ZH_MCU cortex-m4) set(NUCLEO_F413ZH_FPCONF "fpv4-sp-d16-hard") add_library(NUCLEO_F413ZH INTERFACE) target_compile_options(NUCLEO_F413ZH INTERFACE - "SHELL:-DSTM32F413xx " + "SHELL:-DSTM32F413xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -107921,15 +108061,15 @@ target_compile_options(NUCLEO_F413ZH_serial_none INTERFACE ) add_library(NUCLEO_F413ZH_usb_CDC INTERFACE) target_compile_options(NUCLEO_F413ZH_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_F413ZH_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_F413ZH_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_F413ZH_usb_HID INTERFACE) target_compile_options(NUCLEO_F413ZH_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_F413ZH_usb_none INTERFACE) target_compile_options(NUCLEO_F413ZH_usb_none INTERFACE @@ -107958,7 +108098,7 @@ set(NUCLEO_F429ZI_MCU cortex-m4) set(NUCLEO_F429ZI_FPCONF "fpv4-sp-d16-hard") add_library(NUCLEO_F429ZI INTERFACE) target_compile_options(NUCLEO_F429ZI INTERFACE - "SHELL:-DSTM32F429xx " + "SHELL:-DSTM32F429xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -108003,15 +108143,15 @@ target_compile_options(NUCLEO_F429ZI_serial_none INTERFACE ) add_library(NUCLEO_F429ZI_usb_CDC INTERFACE) target_compile_options(NUCLEO_F429ZI_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_F429ZI_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_F429ZI_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_F429ZI_usb_HID INTERFACE) target_compile_options(NUCLEO_F429ZI_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_F429ZI_usb_none INTERFACE) target_compile_options(NUCLEO_F429ZI_usb_none INTERFACE @@ -108040,7 +108180,7 @@ set(NUCLEO_F439ZI_MCU cortex-m4) set(NUCLEO_F439ZI_FPCONF "fpv4-sp-d16-hard") add_library(NUCLEO_F439ZI INTERFACE) target_compile_options(NUCLEO_F439ZI INTERFACE - "SHELL:-DSTM32F439xx " + "SHELL:-DSTM32F439xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -108085,15 +108225,15 @@ target_compile_options(NUCLEO_F439ZI_serial_none INTERFACE ) add_library(NUCLEO_F439ZI_usb_CDC INTERFACE) target_compile_options(NUCLEO_F439ZI_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_F439ZI_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_F439ZI_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_F439ZI_usb_HID INTERFACE) target_compile_options(NUCLEO_F439ZI_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_F439ZI_usb_none INTERFACE) target_compile_options(NUCLEO_F439ZI_usb_none INTERFACE @@ -108122,7 +108262,7 @@ set(NUCLEO_F446RE_MCU cortex-m4) set(NUCLEO_F446RE_FPCONF "fpv4-sp-d16-hard") add_library(NUCLEO_F446RE INTERFACE) target_compile_options(NUCLEO_F446RE INTERFACE - "SHELL:-DSTM32F446xx " + "SHELL:-DSTM32F446xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -108167,15 +108307,15 @@ target_compile_options(NUCLEO_F446RE_serial_none INTERFACE ) add_library(NUCLEO_F446RE_usb_CDC INTERFACE) target_compile_options(NUCLEO_F446RE_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_F446RE_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_F446RE_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_F446RE_usb_HID INTERFACE) target_compile_options(NUCLEO_F446RE_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_F446RE_usb_none INTERFACE) target_compile_options(NUCLEO_F446RE_usb_none INTERFACE @@ -108204,7 +108344,7 @@ set(NUCLEO_F446ZE_MCU cortex-m4) set(NUCLEO_F446ZE_FPCONF "fpv4-sp-d16-hard") add_library(NUCLEO_F446ZE INTERFACE) target_compile_options(NUCLEO_F446ZE INTERFACE - "SHELL:-DSTM32F446xx " + "SHELL:-DSTM32F446xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -108249,15 +108389,15 @@ target_compile_options(NUCLEO_F446ZE_serial_none INTERFACE ) add_library(NUCLEO_F446ZE_usb_CDC INTERFACE) target_compile_options(NUCLEO_F446ZE_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_F446ZE_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_F446ZE_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_F446ZE_usb_HID INTERFACE) target_compile_options(NUCLEO_F446ZE_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_F446ZE_usb_none INTERFACE) target_compile_options(NUCLEO_F446ZE_usb_none INTERFACE @@ -108286,7 +108426,7 @@ set(NUCLEO_F722ZE_MCU cortex-m7) set(NUCLEO_F722ZE_FPCONF "-") add_library(NUCLEO_F722ZE INTERFACE) target_compile_options(NUCLEO_F722ZE INTERFACE - "SHELL:-DSTM32F722xx " + "SHELL:-DSTM32F722xx" "SHELL:" "SHELL:" "SHELL: " @@ -108331,15 +108471,15 @@ target_compile_options(NUCLEO_F722ZE_serial_none INTERFACE ) add_library(NUCLEO_F722ZE_usb_CDC INTERFACE) target_compile_options(NUCLEO_F722ZE_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_F722ZE_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_F722ZE_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_F722ZE_usb_HID INTERFACE) target_compile_options(NUCLEO_F722ZE_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_F722ZE_usb_none INTERFACE) target_compile_options(NUCLEO_F722ZE_usb_none INTERFACE @@ -108368,7 +108508,7 @@ set(NUCLEO_F746ZG_MCU cortex-m7) set(NUCLEO_F746ZG_FPCONF "fpv4-sp-d16-hard") add_library(NUCLEO_F746ZG INTERFACE) target_compile_options(NUCLEO_F746ZG INTERFACE - "SHELL:-DSTM32F746xx " + "SHELL:-DSTM32F746xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -108413,15 +108553,15 @@ target_compile_options(NUCLEO_F746ZG_serial_none INTERFACE ) add_library(NUCLEO_F746ZG_usb_CDC INTERFACE) target_compile_options(NUCLEO_F746ZG_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_F746ZG_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_F746ZG_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_F746ZG_usb_HID INTERFACE) target_compile_options(NUCLEO_F746ZG_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_F746ZG_usb_none INTERFACE) target_compile_options(NUCLEO_F746ZG_usb_none INTERFACE @@ -108450,7 +108590,7 @@ set(NUCLEO_F756ZG_MCU cortex-m7) set(NUCLEO_F756ZG_FPCONF "fpv4-sp-d16-hard") add_library(NUCLEO_F756ZG INTERFACE) target_compile_options(NUCLEO_F756ZG INTERFACE - "SHELL:-DSTM32F756xx " + "SHELL:-DSTM32F756xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -108495,15 +108635,15 @@ target_compile_options(NUCLEO_F756ZG_serial_none INTERFACE ) add_library(NUCLEO_F756ZG_usb_CDC INTERFACE) target_compile_options(NUCLEO_F756ZG_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_F756ZG_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_F756ZG_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_F756ZG_usb_HID INTERFACE) target_compile_options(NUCLEO_F756ZG_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_F756ZG_usb_none INTERFACE) target_compile_options(NUCLEO_F756ZG_usb_none INTERFACE @@ -108532,7 +108672,7 @@ set(NUCLEO_F767ZI_MCU cortex-m7) set(NUCLEO_F767ZI_FPCONF "fpv4-sp-d16-hard") add_library(NUCLEO_F767ZI INTERFACE) target_compile_options(NUCLEO_F767ZI INTERFACE - "SHELL:-DSTM32F767xx " + "SHELL:-DSTM32F767xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -108577,15 +108717,15 @@ target_compile_options(NUCLEO_F767ZI_serial_none INTERFACE ) add_library(NUCLEO_F767ZI_usb_CDC INTERFACE) target_compile_options(NUCLEO_F767ZI_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_F767ZI_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_F767ZI_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_F767ZI_usb_HID INTERFACE) target_compile_options(NUCLEO_F767ZI_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_F767ZI_usb_none INTERFACE) target_compile_options(NUCLEO_F767ZI_usb_none INTERFACE @@ -108614,7 +108754,7 @@ set(NUCLEO_G031K8_MCU cortex-m0plus) set(NUCLEO_G031K8_FPCONF "-") add_library(NUCLEO_G031K8 INTERFACE) target_compile_options(NUCLEO_G031K8 INTERFACE - "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -108659,15 +108799,15 @@ target_compile_options(NUCLEO_G031K8_serial_none INTERFACE ) add_library(NUCLEO_G031K8_usb_CDC INTERFACE) target_compile_options(NUCLEO_G031K8_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_G031K8_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_G031K8_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_G031K8_usb_HID INTERFACE) target_compile_options(NUCLEO_G031K8_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_G031K8_usb_none INTERFACE) target_compile_options(NUCLEO_G031K8_usb_none INTERFACE @@ -108696,7 +108836,7 @@ set(NUCLEO_G070RB_MCU cortex-m0plus) set(NUCLEO_G070RB_FPCONF "-") add_library(NUCLEO_G070RB INTERFACE) target_compile_options(NUCLEO_G070RB INTERFACE - "SHELL:-DSTM32G070xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G070xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -108741,15 +108881,15 @@ target_compile_options(NUCLEO_G070RB_serial_none INTERFACE ) add_library(NUCLEO_G070RB_usb_CDC INTERFACE) target_compile_options(NUCLEO_G070RB_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_G070RB_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_G070RB_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_G070RB_usb_HID INTERFACE) target_compile_options(NUCLEO_G070RB_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_G070RB_usb_none INTERFACE) target_compile_options(NUCLEO_G070RB_usb_none INTERFACE @@ -108778,7 +108918,7 @@ set(NUCLEO_G071RB_MCU cortex-m0plus) set(NUCLEO_G071RB_FPCONF "-") add_library(NUCLEO_G071RB INTERFACE) target_compile_options(NUCLEO_G071RB INTERFACE - "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -108823,15 +108963,15 @@ target_compile_options(NUCLEO_G071RB_serial_none INTERFACE ) add_library(NUCLEO_G071RB_usb_CDC INTERFACE) target_compile_options(NUCLEO_G071RB_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_G071RB_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_G071RB_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_G071RB_usb_HID INTERFACE) target_compile_options(NUCLEO_G071RB_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_G071RB_usb_none INTERFACE) target_compile_options(NUCLEO_G071RB_usb_none INTERFACE @@ -108860,7 +109000,7 @@ set(NUCLEO_G0B1RE_MCU cortex-m0plus) set(NUCLEO_G0B1RE_FPCONF "-") add_library(NUCLEO_G0B1RE INTERFACE) target_compile_options(NUCLEO_G0B1RE INTERFACE - "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -108905,15 +109045,15 @@ target_compile_options(NUCLEO_G0B1RE_serial_none INTERFACE ) add_library(NUCLEO_G0B1RE_usb_CDC INTERFACE) target_compile_options(NUCLEO_G0B1RE_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_G0B1RE_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_G0B1RE_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_G0B1RE_usb_HID INTERFACE) target_compile_options(NUCLEO_G0B1RE_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_G0B1RE_usb_none INTERFACE) target_compile_options(NUCLEO_G0B1RE_usb_none INTERFACE @@ -108942,7 +109082,7 @@ set(NUCLEO_G431KB_MCU cortex-m4) set(NUCLEO_G431KB_FPCONF "fpv4-sp-d16-hard") add_library(NUCLEO_G431KB INTERFACE) target_compile_options(NUCLEO_G431KB INTERFACE - "SHELL:-DSTM32G431xx " + "SHELL:-DSTM32G431xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -108987,15 +109127,15 @@ target_compile_options(NUCLEO_G431KB_serial_none INTERFACE ) add_library(NUCLEO_G431KB_usb_CDC INTERFACE) target_compile_options(NUCLEO_G431KB_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_G431KB_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_G431KB_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_G431KB_usb_HID INTERFACE) target_compile_options(NUCLEO_G431KB_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_G431KB_usb_none INTERFACE) target_compile_options(NUCLEO_G431KB_usb_none INTERFACE @@ -109024,7 +109164,7 @@ set(NUCLEO_G431RB_MCU cortex-m4) set(NUCLEO_G431RB_FPCONF "fpv4-sp-d16-hard") add_library(NUCLEO_G431RB INTERFACE) target_compile_options(NUCLEO_G431RB INTERFACE - "SHELL:-DSTM32G431xx " + "SHELL:-DSTM32G431xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -109069,15 +109209,15 @@ target_compile_options(NUCLEO_G431RB_serial_none INTERFACE ) add_library(NUCLEO_G431RB_usb_CDC INTERFACE) target_compile_options(NUCLEO_G431RB_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_G431RB_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_G431RB_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_G431RB_usb_HID INTERFACE) target_compile_options(NUCLEO_G431RB_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_G431RB_usb_none INTERFACE) target_compile_options(NUCLEO_G431RB_usb_none INTERFACE @@ -109106,7 +109246,7 @@ set(NUCLEO_G474RE_MCU cortex-m4) set(NUCLEO_G474RE_FPCONF "fpv4-sp-d16-hard") add_library(NUCLEO_G474RE INTERFACE) target_compile_options(NUCLEO_G474RE INTERFACE - "SHELL:-DSTM32G474xx " + "SHELL:-DSTM32G474xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -109151,15 +109291,15 @@ target_compile_options(NUCLEO_G474RE_serial_none INTERFACE ) add_library(NUCLEO_G474RE_usb_CDC INTERFACE) target_compile_options(NUCLEO_G474RE_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_G474RE_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_G474RE_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_G474RE_usb_HID INTERFACE) target_compile_options(NUCLEO_G474RE_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_G474RE_usb_none INTERFACE) target_compile_options(NUCLEO_G474RE_usb_none INTERFACE @@ -109188,7 +109328,7 @@ set(NUCLEO_H503RB_MCU cortex-m33) set(NUCLEO_H503RB_FPCONF "fpv4-sp-d16-hard") add_library(NUCLEO_H503RB INTERFACE) target_compile_options(NUCLEO_H503RB INTERFACE - "SHELL:-DSTM32H503xx " + "SHELL:-DSTM32H503xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -109233,15 +109373,15 @@ target_compile_options(NUCLEO_H503RB_serial_none INTERFACE ) add_library(NUCLEO_H503RB_usb_CDC INTERFACE) target_compile_options(NUCLEO_H503RB_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_H503RB_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_H503RB_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_H503RB_usb_HID INTERFACE) target_compile_options(NUCLEO_H503RB_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_H503RB_usb_none INTERFACE) target_compile_options(NUCLEO_H503RB_usb_none INTERFACE @@ -109270,7 +109410,7 @@ set(NUCLEO_H563ZI_MCU cortex-m33) set(NUCLEO_H563ZI_FPCONF "fpv4-sp-d16-hard") add_library(NUCLEO_H563ZI INTERFACE) target_compile_options(NUCLEO_H563ZI INTERFACE - "SHELL:-DSTM32H563xx " + "SHELL:-DSTM32H563xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -109315,15 +109455,15 @@ target_compile_options(NUCLEO_H563ZI_serial_none INTERFACE ) add_library(NUCLEO_H563ZI_usb_CDC INTERFACE) target_compile_options(NUCLEO_H563ZI_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_H563ZI_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_H563ZI_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_H563ZI_usb_HID INTERFACE) target_compile_options(NUCLEO_H563ZI_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_H563ZI_usb_none INTERFACE) target_compile_options(NUCLEO_H563ZI_usb_none INTERFACE @@ -109352,7 +109492,7 @@ set(NUCLEO_H723ZG_MCU cortex-m7) set(NUCLEO_H723ZG_FPCONF "fpv4-sp-d16-hard") add_library(NUCLEO_H723ZG INTERFACE) target_compile_options(NUCLEO_H723ZG INTERFACE - "SHELL:-DSTM32H723xx " + "SHELL:-DSTM32H723xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -109397,15 +109537,15 @@ target_compile_options(NUCLEO_H723ZG_serial_none INTERFACE ) add_library(NUCLEO_H723ZG_usb_CDC INTERFACE) target_compile_options(NUCLEO_H723ZG_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_H723ZG_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_H723ZG_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_H723ZG_usb_HID INTERFACE) target_compile_options(NUCLEO_H723ZG_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_H723ZG_usb_none INTERFACE) target_compile_options(NUCLEO_H723ZG_usb_none INTERFACE @@ -109434,7 +109574,7 @@ set(NUCLEO_H743ZI_MCU cortex-m7) set(NUCLEO_H743ZI_FPCONF "fpv4-sp-d16-hard") add_library(NUCLEO_H743ZI INTERFACE) target_compile_options(NUCLEO_H743ZI INTERFACE - "SHELL:-DSTM32H743xx " + "SHELL:-DSTM32H743xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -109479,15 +109619,15 @@ target_compile_options(NUCLEO_H743ZI_serial_none INTERFACE ) add_library(NUCLEO_H743ZI_usb_CDC INTERFACE) target_compile_options(NUCLEO_H743ZI_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_H743ZI_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_H743ZI_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_H743ZI_usb_HID INTERFACE) target_compile_options(NUCLEO_H743ZI_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_H743ZI_usb_none INTERFACE) target_compile_options(NUCLEO_H743ZI_usb_none INTERFACE @@ -109516,7 +109656,7 @@ set(NUCLEO_H743ZI2_MCU cortex-m7) set(NUCLEO_H743ZI2_FPCONF "fpv4-sp-d16-hard") add_library(NUCLEO_H743ZI2 INTERFACE) target_compile_options(NUCLEO_H743ZI2 INTERFACE - "SHELL:-DSTM32H743xx " + "SHELL:-DSTM32H743xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -109561,15 +109701,15 @@ target_compile_options(NUCLEO_H743ZI2_serial_none INTERFACE ) add_library(NUCLEO_H743ZI2_usb_CDC INTERFACE) target_compile_options(NUCLEO_H743ZI2_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_H743ZI2_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_H743ZI2_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_H743ZI2_usb_HID INTERFACE) target_compile_options(NUCLEO_H743ZI2_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_H743ZI2_usb_none INTERFACE) target_compile_options(NUCLEO_H743ZI2_usb_none INTERFACE @@ -109598,7 +109738,7 @@ set(NUCLEO_H753ZI_MCU cortex-m7) set(NUCLEO_H753ZI_FPCONF "fpv4-sp-d16-hard") add_library(NUCLEO_H753ZI INTERFACE) target_compile_options(NUCLEO_H753ZI INTERFACE - "SHELL:-DSTM32H753xx " + "SHELL:-DSTM32H753xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -109643,15 +109783,15 @@ target_compile_options(NUCLEO_H753ZI_serial_none INTERFACE ) add_library(NUCLEO_H753ZI_usb_CDC INTERFACE) target_compile_options(NUCLEO_H753ZI_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_H753ZI_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_H753ZI_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_H753ZI_usb_HID INTERFACE) target_compile_options(NUCLEO_H753ZI_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_H753ZI_usb_none INTERFACE) target_compile_options(NUCLEO_H753ZI_usb_none INTERFACE @@ -109680,7 +109820,7 @@ set(NUCLEO_H7A3ZI_Q_MCU cortex-m7) set(NUCLEO_H7A3ZI_Q_FPCONF "fpv4-sp-d16-hard") add_library(NUCLEO_H7A3ZI_Q INTERFACE) target_compile_options(NUCLEO_H7A3ZI_Q INTERFACE - "SHELL:-DSTM32H7A3xxQ " + "SHELL:-DSTM32H7A3xxQ" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -109725,15 +109865,15 @@ target_compile_options(NUCLEO_H7A3ZI_Q_serial_none INTERFACE ) add_library(NUCLEO_H7A3ZI_Q_usb_CDC INTERFACE) target_compile_options(NUCLEO_H7A3ZI_Q_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_H7A3ZI_Q_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_H7A3ZI_Q_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_H7A3ZI_Q_usb_HID INTERFACE) target_compile_options(NUCLEO_H7A3ZI_Q_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_H7A3ZI_Q_usb_none INTERFACE) target_compile_options(NUCLEO_H7A3ZI_Q_usb_none INTERFACE @@ -109762,7 +109902,7 @@ set(NUCLEO_L010RB_MCU cortex-m0plus) set(NUCLEO_L010RB_FPCONF "-") add_library(NUCLEO_L010RB INTERFACE) target_compile_options(NUCLEO_L010RB INTERFACE - "SHELL:-DSTM32L010xB -D__CORTEX_SC=0" + "SHELL:-DSTM32L010xB -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -109807,15 +109947,15 @@ target_compile_options(NUCLEO_L010RB_serial_none INTERFACE ) add_library(NUCLEO_L010RB_usb_CDC INTERFACE) target_compile_options(NUCLEO_L010RB_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_L010RB_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_L010RB_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_L010RB_usb_HID INTERFACE) target_compile_options(NUCLEO_L010RB_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_L010RB_usb_none INTERFACE) target_compile_options(NUCLEO_L010RB_usb_none INTERFACE @@ -109844,7 +109984,7 @@ set(NUCLEO_L031K6_MCU cortex-m0plus) set(NUCLEO_L031K6_FPCONF "-") add_library(NUCLEO_L031K6 INTERFACE) target_compile_options(NUCLEO_L031K6 INTERFACE - "SHELL:-DSTM32L031xx " + "SHELL:-DSTM32L031xx" "SHELL:" "SHELL:" "SHELL: " @@ -109889,15 +110029,15 @@ target_compile_options(NUCLEO_L031K6_serial_none INTERFACE ) add_library(NUCLEO_L031K6_usb_CDC INTERFACE) target_compile_options(NUCLEO_L031K6_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_L031K6_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_L031K6_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_L031K6_usb_HID INTERFACE) target_compile_options(NUCLEO_L031K6_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_L031K6_usb_none INTERFACE) target_compile_options(NUCLEO_L031K6_usb_none INTERFACE @@ -109926,7 +110066,7 @@ set(NUCLEO_L053R8_MCU cortex-m0plus) set(NUCLEO_L053R8_FPCONF "-") add_library(NUCLEO_L053R8 INTERFACE) target_compile_options(NUCLEO_L053R8 INTERFACE - "SHELL:-DSTM32L053xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L053xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -109971,15 +110111,15 @@ target_compile_options(NUCLEO_L053R8_serial_none INTERFACE ) add_library(NUCLEO_L053R8_usb_CDC INTERFACE) target_compile_options(NUCLEO_L053R8_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_L053R8_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_L053R8_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_L053R8_usb_HID INTERFACE) target_compile_options(NUCLEO_L053R8_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_L053R8_usb_none INTERFACE) target_compile_options(NUCLEO_L053R8_usb_none INTERFACE @@ -110008,7 +110148,7 @@ set(NUCLEO_L073RZ_MCU cortex-m0plus) set(NUCLEO_L073RZ_FPCONF "-") add_library(NUCLEO_L073RZ INTERFACE) target_compile_options(NUCLEO_L073RZ INTERFACE - "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -110053,15 +110193,15 @@ target_compile_options(NUCLEO_L073RZ_serial_none INTERFACE ) add_library(NUCLEO_L073RZ_usb_CDC INTERFACE) target_compile_options(NUCLEO_L073RZ_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_L073RZ_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_L073RZ_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_L073RZ_usb_HID INTERFACE) target_compile_options(NUCLEO_L073RZ_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_L073RZ_usb_none INTERFACE) target_compile_options(NUCLEO_L073RZ_usb_none INTERFACE @@ -110090,7 +110230,7 @@ set(NUCLEO_L152RE_MCU cortex-m3) set(NUCLEO_L152RE_FPCONF "-") add_library(NUCLEO_L152RE INTERFACE) target_compile_options(NUCLEO_L152RE INTERFACE - "SHELL:-DSTM32L152xE " + "SHELL:-DSTM32L152xE" "SHELL:" "SHELL:" "SHELL: " @@ -110135,15 +110275,15 @@ target_compile_options(NUCLEO_L152RE_serial_none INTERFACE ) add_library(NUCLEO_L152RE_usb_CDC INTERFACE) target_compile_options(NUCLEO_L152RE_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_L152RE_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_L152RE_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_L152RE_usb_HID INTERFACE) target_compile_options(NUCLEO_L152RE_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_L152RE_usb_none INTERFACE) target_compile_options(NUCLEO_L152RE_usb_none INTERFACE @@ -110172,7 +110312,7 @@ set(NUCLEO_L412KB_MCU cortex-m4) set(NUCLEO_L412KB_FPCONF "fpv4-sp-d16-hard") add_library(NUCLEO_L412KB INTERFACE) target_compile_options(NUCLEO_L412KB INTERFACE - "SHELL:-DSTM32L412xx " + "SHELL:-DSTM32L412xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -110217,15 +110357,15 @@ target_compile_options(NUCLEO_L412KB_serial_none INTERFACE ) add_library(NUCLEO_L412KB_usb_CDC INTERFACE) target_compile_options(NUCLEO_L412KB_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_L412KB_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_L412KB_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_L412KB_usb_HID INTERFACE) target_compile_options(NUCLEO_L412KB_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_L412KB_usb_none INTERFACE) target_compile_options(NUCLEO_L412KB_usb_none INTERFACE @@ -110254,7 +110394,7 @@ set(NUCLEO_L412RB_P_MCU cortex-m4) set(NUCLEO_L412RB_P_FPCONF "fpv4-sp-d16-hard") add_library(NUCLEO_L412RB_P INTERFACE) target_compile_options(NUCLEO_L412RB_P INTERFACE - "SHELL:-DSTM32L412xx " + "SHELL:-DSTM32L412xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -110299,15 +110439,15 @@ target_compile_options(NUCLEO_L412RB_P_serial_none INTERFACE ) add_library(NUCLEO_L412RB_P_usb_CDC INTERFACE) target_compile_options(NUCLEO_L412RB_P_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_L412RB_P_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_L412RB_P_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_L412RB_P_usb_HID INTERFACE) target_compile_options(NUCLEO_L412RB_P_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_L412RB_P_usb_none INTERFACE) target_compile_options(NUCLEO_L412RB_P_usb_none INTERFACE @@ -110336,7 +110476,7 @@ set(NUCLEO_L432KC_MCU cortex-m4) set(NUCLEO_L432KC_FPCONF "fpv4-sp-d16-hard") add_library(NUCLEO_L432KC INTERFACE) target_compile_options(NUCLEO_L432KC INTERFACE - "SHELL:-DSTM32L432xx " + "SHELL:-DSTM32L432xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -110381,15 +110521,15 @@ target_compile_options(NUCLEO_L432KC_serial_none INTERFACE ) add_library(NUCLEO_L432KC_usb_CDC INTERFACE) target_compile_options(NUCLEO_L432KC_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_L432KC_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_L432KC_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_L432KC_usb_HID INTERFACE) target_compile_options(NUCLEO_L432KC_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_L432KC_usb_none INTERFACE) target_compile_options(NUCLEO_L432KC_usb_none INTERFACE @@ -110418,7 +110558,7 @@ set(NUCLEO_L433RC_P_MCU cortex-m4) set(NUCLEO_L433RC_P_FPCONF "fpv4-sp-d16-hard") add_library(NUCLEO_L433RC_P INTERFACE) target_compile_options(NUCLEO_L433RC_P INTERFACE - "SHELL:-DSTM32L433xx " + "SHELL:-DSTM32L433xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -110463,15 +110603,15 @@ target_compile_options(NUCLEO_L433RC_P_serial_none INTERFACE ) add_library(NUCLEO_L433RC_P_usb_CDC INTERFACE) target_compile_options(NUCLEO_L433RC_P_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_L433RC_P_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_L433RC_P_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_L433RC_P_usb_HID INTERFACE) target_compile_options(NUCLEO_L433RC_P_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_L433RC_P_usb_none INTERFACE) target_compile_options(NUCLEO_L433RC_P_usb_none INTERFACE @@ -110500,7 +110640,7 @@ set(NUCLEO_L452RE_MCU cortex-m4) set(NUCLEO_L452RE_FPCONF "fpv4-sp-d16-hard") add_library(NUCLEO_L452RE INTERFACE) target_compile_options(NUCLEO_L452RE INTERFACE - "SHELL:-DSTM32L452xx " + "SHELL:-DSTM32L452xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -110545,15 +110685,15 @@ target_compile_options(NUCLEO_L452RE_serial_none INTERFACE ) add_library(NUCLEO_L452RE_usb_CDC INTERFACE) target_compile_options(NUCLEO_L452RE_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_L452RE_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_L452RE_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_L452RE_usb_HID INTERFACE) target_compile_options(NUCLEO_L452RE_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_L452RE_usb_none INTERFACE) target_compile_options(NUCLEO_L452RE_usb_none INTERFACE @@ -110582,7 +110722,7 @@ set(NUCLEO_L452REP_MCU cortex-m4) set(NUCLEO_L452REP_FPCONF "fpv4-sp-d16-hard") add_library(NUCLEO_L452REP INTERFACE) target_compile_options(NUCLEO_L452REP INTERFACE - "SHELL:-DSTM32L452xx " + "SHELL:-DSTM32L452xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -110627,15 +110767,15 @@ target_compile_options(NUCLEO_L452REP_serial_none INTERFACE ) add_library(NUCLEO_L452REP_usb_CDC INTERFACE) target_compile_options(NUCLEO_L452REP_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_L452REP_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_L452REP_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_L452REP_usb_HID INTERFACE) target_compile_options(NUCLEO_L452REP_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_L452REP_usb_none INTERFACE) target_compile_options(NUCLEO_L452REP_usb_none INTERFACE @@ -110664,7 +110804,7 @@ set(NUCLEO_L476RG_MCU cortex-m4) set(NUCLEO_L476RG_FPCONF "fpv4-sp-d16-hard") add_library(NUCLEO_L476RG INTERFACE) target_compile_options(NUCLEO_L476RG INTERFACE - "SHELL:-DSTM32L476xx " + "SHELL:-DSTM32L476xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -110709,15 +110849,15 @@ target_compile_options(NUCLEO_L476RG_serial_none INTERFACE ) add_library(NUCLEO_L476RG_usb_CDC INTERFACE) target_compile_options(NUCLEO_L476RG_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_L476RG_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_L476RG_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_L476RG_usb_HID INTERFACE) target_compile_options(NUCLEO_L476RG_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_L476RG_usb_none INTERFACE) target_compile_options(NUCLEO_L476RG_usb_none INTERFACE @@ -110746,7 +110886,7 @@ set(NUCLEO_L496ZG_MCU cortex-m4) set(NUCLEO_L496ZG_FPCONF "fpv4-sp-d16-hard") add_library(NUCLEO_L496ZG INTERFACE) target_compile_options(NUCLEO_L496ZG INTERFACE - "SHELL:-DSTM32L496xx " + "SHELL:-DSTM32L496xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -110791,15 +110931,15 @@ target_compile_options(NUCLEO_L496ZG_serial_none INTERFACE ) add_library(NUCLEO_L496ZG_usb_CDC INTERFACE) target_compile_options(NUCLEO_L496ZG_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_L496ZG_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_L496ZG_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_L496ZG_usb_HID INTERFACE) target_compile_options(NUCLEO_L496ZG_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_L496ZG_usb_none INTERFACE) target_compile_options(NUCLEO_L496ZG_usb_none INTERFACE @@ -110828,7 +110968,7 @@ set(NUCLEO_L496ZG-P_MCU cortex-m4) set(NUCLEO_L496ZG-P_FPCONF "fpv4-sp-d16-hard") add_library(NUCLEO_L496ZG-P INTERFACE) target_compile_options(NUCLEO_L496ZG-P INTERFACE - "SHELL:-DSTM32L496xx " + "SHELL:-DSTM32L496xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -110873,15 +111013,15 @@ target_compile_options(NUCLEO_L496ZG-P_serial_none INTERFACE ) add_library(NUCLEO_L496ZG-P_usb_CDC INTERFACE) target_compile_options(NUCLEO_L496ZG-P_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_L496ZG-P_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_L496ZG-P_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_L496ZG-P_usb_HID INTERFACE) target_compile_options(NUCLEO_L496ZG-P_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_L496ZG-P_usb_none INTERFACE) target_compile_options(NUCLEO_L496ZG-P_usb_none INTERFACE @@ -110910,7 +111050,7 @@ set(NUCLEO_L4R5ZI_MCU cortex-m4) set(NUCLEO_L4R5ZI_FPCONF "fpv4-sp-d16-hard") add_library(NUCLEO_L4R5ZI INTERFACE) target_compile_options(NUCLEO_L4R5ZI INTERFACE - "SHELL:-DSTM32L4R5xx " + "SHELL:-DSTM32L4R5xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -110955,15 +111095,15 @@ target_compile_options(NUCLEO_L4R5ZI_serial_none INTERFACE ) add_library(NUCLEO_L4R5ZI_usb_CDC INTERFACE) target_compile_options(NUCLEO_L4R5ZI_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_L4R5ZI_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_L4R5ZI_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_L4R5ZI_usb_HID INTERFACE) target_compile_options(NUCLEO_L4R5ZI_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_L4R5ZI_usb_none INTERFACE) target_compile_options(NUCLEO_L4R5ZI_usb_none INTERFACE @@ -110992,7 +111132,7 @@ set(NUCLEO_L4R5ZI_P_MCU cortex-m4) set(NUCLEO_L4R5ZI_P_FPCONF "fpv4-sp-d16-hard") add_library(NUCLEO_L4R5ZI_P INTERFACE) target_compile_options(NUCLEO_L4R5ZI_P INTERFACE - "SHELL:-DSTM32L4R5xx " + "SHELL:-DSTM32L4R5xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -111037,15 +111177,15 @@ target_compile_options(NUCLEO_L4R5ZI_P_serial_none INTERFACE ) add_library(NUCLEO_L4R5ZI_P_usb_CDC INTERFACE) target_compile_options(NUCLEO_L4R5ZI_P_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_L4R5ZI_P_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_L4R5ZI_P_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_L4R5ZI_P_usb_HID INTERFACE) target_compile_options(NUCLEO_L4R5ZI_P_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_L4R5ZI_P_usb_none INTERFACE) target_compile_options(NUCLEO_L4R5ZI_P_usb_none INTERFACE @@ -111074,7 +111214,7 @@ set(NUCLEO_L552ZE_Q_MCU cortex-m33) set(NUCLEO_L552ZE_Q_FPCONF "fpv4-sp-d16-hard") add_library(NUCLEO_L552ZE_Q INTERFACE) target_compile_options(NUCLEO_L552ZE_Q INTERFACE - "SHELL:-DSTM32L552xx " + "SHELL:-DSTM32L552xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -111119,15 +111259,15 @@ target_compile_options(NUCLEO_L552ZE_Q_serial_none INTERFACE ) add_library(NUCLEO_L552ZE_Q_usb_CDC INTERFACE) target_compile_options(NUCLEO_L552ZE_Q_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_L552ZE_Q_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_L552ZE_Q_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_L552ZE_Q_usb_HID INTERFACE) target_compile_options(NUCLEO_L552ZE_Q_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_L552ZE_Q_usb_none INTERFACE) target_compile_options(NUCLEO_L552ZE_Q_usb_none INTERFACE @@ -111156,7 +111296,7 @@ set(NUCLEO_U083RC_MCU cortex-m0plus) set(NUCLEO_U083RC_FPCONF "-") add_library(NUCLEO_U083RC INTERFACE) target_compile_options(NUCLEO_U083RC INTERFACE - "SHELL:-DSTM32U083xx -D__CORTEX_SC=0" + "SHELL:-DSTM32U083xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -111201,15 +111341,15 @@ target_compile_options(NUCLEO_U083RC_serial_none INTERFACE ) add_library(NUCLEO_U083RC_usb_CDC INTERFACE) target_compile_options(NUCLEO_U083RC_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_U083RC_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_U083RC_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_U083RC_usb_HID INTERFACE) target_compile_options(NUCLEO_U083RC_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_U083RC_usb_none INTERFACE) target_compile_options(NUCLEO_U083RC_usb_none INTERFACE @@ -111238,7 +111378,7 @@ set(NUCLEO_U385RG_Q_MCU cortex-m33) set(NUCLEO_U385RG_Q_FPCONF "fpv4-sp-d16-hard") add_library(NUCLEO_U385RG_Q INTERFACE) target_compile_options(NUCLEO_U385RG_Q INTERFACE - "SHELL:-DSTM32U385xx " + "SHELL:-DSTM32U385xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -111283,15 +111423,15 @@ target_compile_options(NUCLEO_U385RG_Q_serial_none INTERFACE ) add_library(NUCLEO_U385RG_Q_usb_CDC INTERFACE) target_compile_options(NUCLEO_U385RG_Q_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_U385RG_Q_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_U385RG_Q_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_U385RG_Q_usb_HID INTERFACE) target_compile_options(NUCLEO_U385RG_Q_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_U385RG_Q_usb_none INTERFACE) target_compile_options(NUCLEO_U385RG_Q_usb_none INTERFACE @@ -111320,7 +111460,7 @@ set(NUCLEO_U575ZI_Q_MCU cortex-m33) set(NUCLEO_U575ZI_Q_FPCONF "fpv4-sp-d16-hard") add_library(NUCLEO_U575ZI_Q INTERFACE) target_compile_options(NUCLEO_U575ZI_Q INTERFACE - "SHELL:-DSTM32U575xx " + "SHELL:-DSTM32U575xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -111365,15 +111505,15 @@ target_compile_options(NUCLEO_U575ZI_Q_serial_none INTERFACE ) add_library(NUCLEO_U575ZI_Q_usb_CDC INTERFACE) target_compile_options(NUCLEO_U575ZI_Q_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_U575ZI_Q_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_U575ZI_Q_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_U575ZI_Q_usb_HID INTERFACE) target_compile_options(NUCLEO_U575ZI_Q_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_U575ZI_Q_usb_none INTERFACE) target_compile_options(NUCLEO_U575ZI_Q_usb_none INTERFACE @@ -111402,7 +111542,7 @@ set(NUCLEO_U5A5ZJ_Q_MCU cortex-m33) set(NUCLEO_U5A5ZJ_Q_FPCONF "fpv4-sp-d16-hard") add_library(NUCLEO_U5A5ZJ_Q INTERFACE) target_compile_options(NUCLEO_U5A5ZJ_Q INTERFACE - "SHELL:-DSTM32U5A5xx " + "SHELL:-DSTM32U5A5xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -111447,15 +111587,15 @@ target_compile_options(NUCLEO_U5A5ZJ_Q_serial_none INTERFACE ) add_library(NUCLEO_U5A5ZJ_Q_usb_CDC INTERFACE) target_compile_options(NUCLEO_U5A5ZJ_Q_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_U5A5ZJ_Q_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_U5A5ZJ_Q_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_U5A5ZJ_Q_usb_HID INTERFACE) target_compile_options(NUCLEO_U5A5ZJ_Q_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_U5A5ZJ_Q_usb_none INTERFACE) target_compile_options(NUCLEO_U5A5ZJ_Q_usb_none INTERFACE @@ -111484,7 +111624,7 @@ set(NUCLEO_WB15CC_MCU cortex-m4) set(NUCLEO_WB15CC_FPCONF "fpv4-sp-d16-hard") add_library(NUCLEO_WB15CC INTERFACE) target_compile_options(NUCLEO_WB15CC INTERFACE - "SHELL:-DSTM32WB15xx " + "SHELL:-DSTM32WB15xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -111529,15 +111669,15 @@ target_compile_options(NUCLEO_WB15CC_serial_none INTERFACE ) add_library(NUCLEO_WB15CC_usb_CDC INTERFACE) target_compile_options(NUCLEO_WB15CC_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_WB15CC_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_WB15CC_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_WB15CC_usb_HID INTERFACE) target_compile_options(NUCLEO_WB15CC_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_WB15CC_usb_none INTERFACE) target_compile_options(NUCLEO_WB15CC_usb_none INTERFACE @@ -111566,7 +111706,7 @@ set(NUCLEO_WBA55CG_MCU cortex-m33) set(NUCLEO_WBA55CG_FPCONF "fpv4-sp-d16-hard") add_library(NUCLEO_WBA55CG INTERFACE) target_compile_options(NUCLEO_WBA55CG INTERFACE - "SHELL:-DSTM32WBA55xx " + "SHELL:-DSTM32WBA55xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -111611,15 +111751,15 @@ target_compile_options(NUCLEO_WBA55CG_serial_none INTERFACE ) add_library(NUCLEO_WBA55CG_usb_CDC INTERFACE) target_compile_options(NUCLEO_WBA55CG_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_WBA55CG_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_WBA55CG_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_WBA55CG_usb_HID INTERFACE) target_compile_options(NUCLEO_WBA55CG_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_WBA55CG_usb_none INTERFACE) target_compile_options(NUCLEO_WBA55CG_usb_none INTERFACE @@ -111648,7 +111788,7 @@ set(NUCLEO_WL55JC1_MCU cortex-m4) set(NUCLEO_WL55JC1_FPCONF "-") add_library(NUCLEO_WL55JC1 INTERFACE) target_compile_options(NUCLEO_WL55JC1 INTERFACE - "SHELL:-DSTM32WLE5xx -DUSE_CM4_STARTUP_FILE " + "SHELL:-DSTM32WLE5xx -DUSE_CM4_STARTUP_FILE" "SHELL:" "SHELL:" "SHELL: " @@ -111693,15 +111833,15 @@ target_compile_options(NUCLEO_WL55JC1_serial_none INTERFACE ) add_library(NUCLEO_WL55JC1_usb_CDC INTERFACE) target_compile_options(NUCLEO_WL55JC1_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(NUCLEO_WL55JC1_usb_CDCgen INTERFACE) target_compile_options(NUCLEO_WL55JC1_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(NUCLEO_WL55JC1_usb_HID INTERFACE) target_compile_options(NUCLEO_WL55JC1_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(NUCLEO_WL55JC1_usb_none INTERFACE) target_compile_options(NUCLEO_WL55JC1_usb_none INTERFACE @@ -111730,7 +111870,7 @@ set(OLIMEXINO_STM32F3_MCU cortex-m4) set(OLIMEXINO_STM32F3_FPCONF "-") add_library(OLIMEXINO_STM32F3 INTERFACE) target_compile_options(OLIMEXINO_STM32F3 INTERFACE - "SHELL:-DSTM32F303xC " + "SHELL:-DSTM32F303xC" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -111775,15 +111915,15 @@ target_compile_options(OLIMEXINO_STM32F3_serial_none INTERFACE ) add_library(OLIMEXINO_STM32F3_usb_CDC INTERFACE) target_compile_options(OLIMEXINO_STM32F3_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(OLIMEXINO_STM32F3_usb_CDCgen INTERFACE) target_compile_options(OLIMEXINO_STM32F3_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(OLIMEXINO_STM32F3_usb_HID INTERFACE) target_compile_options(OLIMEXINO_STM32F3_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(OLIMEXINO_STM32F3_usb_none INTERFACE) target_compile_options(OLIMEXINO_STM32F3_usb_none INTERFACE @@ -111812,7 +111952,7 @@ set(P_NUCLEO_WB55_USB_DONGLE_MCU cortex-m4) set(P_NUCLEO_WB55_USB_DONGLE_FPCONF "fpv4-sp-d16-hard") add_library(P_NUCLEO_WB55_USB_DONGLE INTERFACE) target_compile_options(P_NUCLEO_WB55_USB_DONGLE INTERFACE - "SHELL:-DSTM32WB55xx " + "SHELL:-DSTM32WB55xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -111857,15 +111997,15 @@ target_compile_options(P_NUCLEO_WB55_USB_DONGLE_serial_none INTERFACE ) add_library(P_NUCLEO_WB55_USB_DONGLE_usb_CDC INTERFACE) target_compile_options(P_NUCLEO_WB55_USB_DONGLE_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(P_NUCLEO_WB55_USB_DONGLE_usb_CDCgen INTERFACE) target_compile_options(P_NUCLEO_WB55_USB_DONGLE_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(P_NUCLEO_WB55_USB_DONGLE_usb_HID INTERFACE) target_compile_options(P_NUCLEO_WB55_USB_DONGLE_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(P_NUCLEO_WB55_USB_DONGLE_usb_none INTERFACE) target_compile_options(P_NUCLEO_WB55_USB_DONGLE_usb_none INTERFACE @@ -111894,7 +112034,7 @@ set(P_NUCLEO_WB55RG_MCU cortex-m4) set(P_NUCLEO_WB55RG_FPCONF "fpv4-sp-d16-hard") add_library(P_NUCLEO_WB55RG INTERFACE) target_compile_options(P_NUCLEO_WB55RG INTERFACE - "SHELL:-DSTM32WB55xx " + "SHELL:-DSTM32WB55xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -111939,15 +112079,15 @@ target_compile_options(P_NUCLEO_WB55RG_serial_none INTERFACE ) add_library(P_NUCLEO_WB55RG_usb_CDC INTERFACE) target_compile_options(P_NUCLEO_WB55RG_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(P_NUCLEO_WB55RG_usb_CDCgen INTERFACE) target_compile_options(P_NUCLEO_WB55RG_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(P_NUCLEO_WB55RG_usb_HID INTERFACE) target_compile_options(P_NUCLEO_WB55RG_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(P_NUCLEO_WB55RG_usb_none INTERFACE) target_compile_options(P_NUCLEO_WB55RG_usb_none INTERFACE @@ -111976,7 +112116,7 @@ set(PRNTR_V1_MCU cortex-m4) set(PRNTR_V1_FPCONF "fpv4-sp-d16-hard") add_library(PRNTR_V1 INTERFACE) target_compile_options(PRNTR_V1 INTERFACE - "SHELL:-DSTM32F407xx " + "SHELL:-DSTM32F407xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -112021,11 +112161,11 @@ target_compile_options(PRNTR_V1_serial_none INTERFACE ) add_library(PRNTR_V1_usb_CDC INTERFACE) target_compile_options(PRNTR_V1_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(PRNTR_V1_usb_CDCgen INTERFACE) target_compile_options(PRNTR_V1_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(PRNTR_V1_usb_none INTERFACE) target_compile_options(PRNTR_V1_usb_none INTERFACE @@ -112054,7 +112194,7 @@ set(PRNTR_V2_MCU cortex-m4) set(PRNTR_V2_FPCONF "fpv4-sp-d16-hard") add_library(PRNTR_V2 INTERFACE) target_compile_options(PRNTR_V2 INTERFACE - "SHELL:-DSTM32F407xx " + "SHELL:-DSTM32F407xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -112099,11 +112239,11 @@ target_compile_options(PRNTR_V2_serial_none INTERFACE ) add_library(PRNTR_V2_usb_CDC INTERFACE) target_compile_options(PRNTR_V2_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(PRNTR_V2_usb_CDCgen INTERFACE) target_compile_options(PRNTR_V2_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(PRNTR_V2_usb_none INTERFACE) target_compile_options(PRNTR_V2_usb_none INTERFACE @@ -112132,7 +112272,7 @@ set(PX_HER0_MCU cortex-m0plus) set(PX_HER0_FPCONF "-") add_library(PX_HER0 INTERFACE) target_compile_options(PX_HER0 INTERFACE - "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL: " @@ -112177,15 +112317,15 @@ target_compile_options(PX_HER0_serial_none INTERFACE ) add_library(PX_HER0_usb_CDC INTERFACE) target_compile_options(PX_HER0_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(PX_HER0_usb_CDCgen INTERFACE) target_compile_options(PX_HER0_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(PX_HER0_usb_HID INTERFACE) target_compile_options(PX_HER0_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(PX_HER0_usb_none INTERFACE) target_compile_options(PX_HER0_usb_none INTERFACE @@ -112202,7 +112342,7 @@ set(PYBSTICK26_DUINO_MCU cortex-m0) set(PYBSTICK26_DUINO_FPCONF "-") add_library(PYBSTICK26_DUINO INTERFACE) target_compile_options(PYBSTICK26_DUINO INTERFACE - "SHELL:-DSTM32F072xB " + "SHELL:-DSTM32F072xB" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL: " @@ -112247,15 +112387,15 @@ target_compile_options(PYBSTICK26_DUINO_serial_none INTERFACE ) add_library(PYBSTICK26_DUINO_usb_CDC INTERFACE) target_compile_options(PYBSTICK26_DUINO_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(PYBSTICK26_DUINO_usb_CDCgen INTERFACE) target_compile_options(PYBSTICK26_DUINO_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(PYBSTICK26_DUINO_usb_HID INTERFACE) target_compile_options(PYBSTICK26_DUINO_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(PYBSTICK26_DUINO_usb_none INTERFACE) target_compile_options(PYBSTICK26_DUINO_usb_none INTERFACE @@ -112272,7 +112412,7 @@ set(PYBSTICK26_LITE_MCU cortex-m4) set(PYBSTICK26_LITE_FPCONF "fpv4-sp-d16-hard") add_library(PYBSTICK26_LITE INTERFACE) target_compile_options(PYBSTICK26_LITE INTERFACE - "SHELL:-DSTM32F401xE " + "SHELL:-DSTM32F401xE" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -112317,15 +112457,15 @@ target_compile_options(PYBSTICK26_LITE_serial_none INTERFACE ) add_library(PYBSTICK26_LITE_usb_CDC INTERFACE) target_compile_options(PYBSTICK26_LITE_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(PYBSTICK26_LITE_usb_CDCgen INTERFACE) target_compile_options(PYBSTICK26_LITE_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(PYBSTICK26_LITE_usb_HID INTERFACE) target_compile_options(PYBSTICK26_LITE_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(PYBSTICK26_LITE_usb_none INTERFACE) target_compile_options(PYBSTICK26_LITE_usb_none INTERFACE @@ -112342,7 +112482,7 @@ set(PYBSTICK26_PRO_MCU cortex-m4) set(PYBSTICK26_PRO_FPCONF "fpv4-sp-d16-hard") add_library(PYBSTICK26_PRO INTERFACE) target_compile_options(PYBSTICK26_PRO INTERFACE - "SHELL:-DSTM32F412Rx " + "SHELL:-DSTM32F412Rx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -112387,15 +112527,15 @@ target_compile_options(PYBSTICK26_PRO_serial_none INTERFACE ) add_library(PYBSTICK26_PRO_usb_CDC INTERFACE) target_compile_options(PYBSTICK26_PRO_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(PYBSTICK26_PRO_usb_CDCgen INTERFACE) target_compile_options(PYBSTICK26_PRO_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(PYBSTICK26_PRO_usb_HID INTERFACE) target_compile_options(PYBSTICK26_PRO_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(PYBSTICK26_PRO_usb_none INTERFACE) target_compile_options(PYBSTICK26_PRO_usb_none INTERFACE @@ -112412,7 +112552,7 @@ set(PYBSTICK26_STD_MCU cortex-m4) set(PYBSTICK26_STD_FPCONF "fpv4-sp-d16-hard") add_library(PYBSTICK26_STD INTERFACE) target_compile_options(PYBSTICK26_STD INTERFACE - "SHELL:-DSTM32F411xE " + "SHELL:-DSTM32F411xE" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -112457,15 +112597,15 @@ target_compile_options(PYBSTICK26_STD_serial_none INTERFACE ) add_library(PYBSTICK26_STD_usb_CDC INTERFACE) target_compile_options(PYBSTICK26_STD_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(PYBSTICK26_STD_usb_CDCgen INTERFACE) target_compile_options(PYBSTICK26_STD_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(PYBSTICK26_STD_usb_HID INTERFACE) target_compile_options(PYBSTICK26_STD_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(PYBSTICK26_STD_usb_none INTERFACE) target_compile_options(PYBSTICK26_STD_usb_none INTERFACE @@ -112482,7 +112622,7 @@ set(RAK3172_MODULE_MCU cortex-m4) set(RAK3172_MODULE_FPCONF "-") add_library(RAK3172_MODULE INTERFACE) target_compile_options(RAK3172_MODULE INTERFACE - "SHELL:-DSTM32WLE5xx " + "SHELL:-DSTM32WLE5xx" "SHELL:" "SHELL:" "SHELL: " @@ -112536,7 +112676,7 @@ set(RAK3172T_MODULE_MCU cortex-m4) set(RAK3172T_MODULE_FPCONF "-") add_library(RAK3172T_MODULE INTERFACE) target_compile_options(RAK3172T_MODULE INTERFACE - "SHELL:-DSTM32WLE5xx " + "SHELL:-DSTM32WLE5xx" "SHELL:" "SHELL:" "SHELL: " @@ -112590,7 +112730,7 @@ set(RAK811_TRACKER_MCU cortex-m3) set(RAK811_TRACKER_FPCONF "-") add_library(RAK811_TRACKER INTERFACE) target_compile_options(RAK811_TRACKER INTERFACE - "SHELL:-DSTM32L151xB " + "SHELL:-DSTM32L151xB" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL: " @@ -112644,7 +112784,7 @@ set(RAK811_TRACKERA_MCU cortex-m3) set(RAK811_TRACKERA_FPCONF "-") add_library(RAK811_TRACKERA INTERFACE) target_compile_options(RAK811_TRACKERA INTERFACE - "SHELL:-DSTM32L151xBA " + "SHELL:-DSTM32L151xBA" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL: " @@ -112698,7 +112838,7 @@ set(REMRAM_V1_MCU cortex-m7) set(REMRAM_V1_FPCONF "fpv4-sp-d16-hard") add_library(REMRAM_V1 INTERFACE) target_compile_options(REMRAM_V1 INTERFACE - "SHELL:-DSTM32F765xx " + "SHELL:-DSTM32F765xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -112743,11 +112883,11 @@ target_compile_options(REMRAM_V1_serial_none INTERFACE ) add_library(REMRAM_V1_usb_CDC INTERFACE) target_compile_options(REMRAM_V1_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(REMRAM_V1_usb_CDCgen INTERFACE) target_compile_options(REMRAM_V1_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(REMRAM_V1_usb_none INTERFACE) target_compile_options(REMRAM_V1_usb_none INTERFACE @@ -112776,7 +112916,7 @@ set(RHF76_052_MCU cortex-m0plus) set(RHF76_052_FPCONF "-") add_library(RHF76_052 INTERFACE) target_compile_options(RHF76_052 INTERFACE - "SHELL:-DSTM32L051xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L051xx -D__CORTEX_SC=0" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL: " @@ -112830,7 +112970,7 @@ set(RUMBA32_MCU cortex-m4) set(RUMBA32_FPCONF "fpv4-sp-d16-hard") add_library(RUMBA32 INTERFACE) target_compile_options(RUMBA32 INTERFACE - "SHELL:-DSTM32F446xx " + "SHELL:-DSTM32F446xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -112875,11 +113015,11 @@ target_compile_options(RUMBA32_serial_none INTERFACE ) add_library(RUMBA32_usb_CDC INTERFACE) target_compile_options(RUMBA32_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(RUMBA32_usb_CDCgen INTERFACE) target_compile_options(RUMBA32_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(RUMBA32_usb_none INTERFACE) target_compile_options(RUMBA32_usb_none INTERFACE @@ -112908,7 +113048,7 @@ set(SFE_MMPB_STM32WB5MMG_MCU cortex-m4) set(SFE_MMPB_STM32WB5MMG_FPCONF "fpv4-sp-d16-hard") add_library(SFE_MMPB_STM32WB5MMG INTERFACE) target_compile_options(SFE_MMPB_STM32WB5MMG INTERFACE - "SHELL:-DSTM32WB5Mxx " + "SHELL:-DSTM32WB5Mxx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -112953,15 +113093,15 @@ target_compile_options(SFE_MMPB_STM32WB5MMG_serial_none INTERFACE ) add_library(SFE_MMPB_STM32WB5MMG_usb_CDC INTERFACE) target_compile_options(SFE_MMPB_STM32WB5MMG_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x1B4F -DUSBD_PID=0x0034 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x1B4F -DUSBD_PID=0x0034 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(SFE_MMPB_STM32WB5MMG_usb_CDCgen INTERFACE) target_compile_options(SFE_MMPB_STM32WB5MMG_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x1B4F -DUSBD_PID=0x0034 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x1B4F -DUSBD_PID=0x0034 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(SFE_MMPB_STM32WB5MMG_usb_HID INTERFACE) target_compile_options(SFE_MMPB_STM32WB5MMG_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x1B4F -DUSBD_PID=0x0034 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x1B4F -DUSBD_PID=0x0034 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(SFE_MMPB_STM32WB5MMG_usb_none INTERFACE) target_compile_options(SFE_MMPB_STM32WB5MMG_usb_none INTERFACE @@ -112990,7 +113130,7 @@ set(Sparky_V1_MCU cortex-m4) set(Sparky_V1_FPCONF "fpv4-sp-d16-hard") add_library(Sparky_V1 INTERFACE) target_compile_options(Sparky_V1 INTERFACE - "SHELL:-DSTM32F303xC " + "SHELL:-DSTM32F303xC" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -113035,15 +113175,15 @@ target_compile_options(Sparky_V1_serial_none INTERFACE ) add_library(Sparky_V1_usb_CDC INTERFACE) target_compile_options(Sparky_V1_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(Sparky_V1_usb_CDCgen INTERFACE) target_compile_options(Sparky_V1_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(Sparky_V1_usb_HID INTERFACE) target_compile_options(Sparky_V1_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(Sparky_V1_usb_none INTERFACE) target_compile_options(Sparky_V1_usb_none INTERFACE @@ -113072,7 +113212,7 @@ set(Sparky_V1_dfu2_MCU cortex-m4) set(Sparky_V1_dfu2_FPCONF "fpv4-sp-d16-hard") add_library(Sparky_V1_dfu2 INTERFACE) target_compile_options(Sparky_V1_dfu2 INTERFACE - "SHELL:-DSTM32F303xC -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F303xC -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -113114,7 +113254,7 @@ set(Sparky_V1_dfuo_MCU cortex-m4) set(Sparky_V1_dfuo_FPCONF "fpv4-sp-d16-hard") add_library(Sparky_V1_dfuo INTERFACE) target_compile_options(Sparky_V1_dfuo INTERFACE - "SHELL:-DSTM32F303xC -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F303xC -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -113156,7 +113296,7 @@ set(Sparky_V1_hid_MCU cortex-m4) set(Sparky_V1_hid_FPCONF "fpv4-sp-d16-hard") add_library(Sparky_V1_hid INTERFACE) target_compile_options(Sparky_V1_hid INTERFACE - "SHELL:-DSTM32F303xC -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F303xC -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -113198,7 +113338,7 @@ set(ST3DP001_EVAL_MCU cortex-m4) set(ST3DP001_EVAL_FPCONF "fpv4-sp-d16-hard") add_library(ST3DP001_EVAL INTERFACE) target_compile_options(ST3DP001_EVAL INTERFACE - "SHELL:-DSTM32F401xE " + "SHELL:-DSTM32F401xE" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -113243,11 +113383,11 @@ target_compile_options(ST3DP001_EVAL_serial_none INTERFACE ) add_library(ST3DP001_EVAL_usb_CDC INTERFACE) target_compile_options(ST3DP001_EVAL_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(ST3DP001_EVAL_usb_CDCgen INTERFACE) target_compile_options(ST3DP001_EVAL_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(ST3DP001_EVAL_usb_none INTERFACE) target_compile_options(ST3DP001_EVAL_usb_none INTERFACE @@ -113276,7 +113416,7 @@ set(STEAM32_WB55RG_MCU cortex-m4) set(STEAM32_WB55RG_FPCONF "fpv4-sp-d16-hard") add_library(STEAM32_WB55RG INTERFACE) target_compile_options(STEAM32_WB55RG INTERFACE - "SHELL:-DSTM32WB55xx " + "SHELL:-DSTM32WB55xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -113330,7 +113470,7 @@ set(STEVAL_MKBOXPRO_MCU cortex-m33) set(STEVAL_MKBOXPRO_FPCONF "fpv4-sp-d16-hard") add_library(STEVAL_MKBOXPRO INTERFACE) target_compile_options(STEVAL_MKBOXPRO INTERFACE - "SHELL:-DSTM32U585xx " + "SHELL:-DSTM32U585xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -113375,15 +113515,15 @@ target_compile_options(STEVAL_MKBOXPRO_serial_none INTERFACE ) add_library(STEVAL_MKBOXPRO_usb_CDC INTERFACE) target_compile_options(STEVAL_MKBOXPRO_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(STEVAL_MKBOXPRO_usb_CDCgen INTERFACE) target_compile_options(STEVAL_MKBOXPRO_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(STEVAL_MKBOXPRO_usb_HID INTERFACE) target_compile_options(STEVAL_MKBOXPRO_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(STEVAL_MKBOXPRO_usb_none INTERFACE) target_compile_options(STEVAL_MKBOXPRO_usb_none INTERFACE @@ -113412,7 +113552,7 @@ set(STEVAL_MKSBOX1V1_MCU cortex-m4) set(STEVAL_MKSBOX1V1_FPCONF "fpv4-sp-d16-hard") add_library(STEVAL_MKSBOX1V1 INTERFACE) target_compile_options(STEVAL_MKSBOX1V1 INTERFACE - "SHELL:-DSTM32L4R9xx " + "SHELL:-DSTM32L4R9xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -113457,15 +113597,15 @@ target_compile_options(STEVAL_MKSBOX1V1_serial_none INTERFACE ) add_library(STEVAL_MKSBOX1V1_usb_CDC INTERFACE) target_compile_options(STEVAL_MKSBOX1V1_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(STEVAL_MKSBOX1V1_usb_CDCgen INTERFACE) target_compile_options(STEVAL_MKSBOX1V1_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(STEVAL_MKSBOX1V1_usb_HID INTERFACE) target_compile_options(STEVAL_MKSBOX1V1_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(STEVAL_MKSBOX1V1_usb_none INTERFACE) target_compile_options(STEVAL_MKSBOX1V1_usb_none INTERFACE @@ -113494,7 +113634,7 @@ set(STM32C0116_DK_MCU cortex-m0plus) set(STM32C0116_DK_FPCONF "-") add_library(STM32C0116_DK INTERFACE) target_compile_options(STM32C0116_DK INTERFACE - "SHELL:-DSTM32C011xx -D__CORTEX_SC=0" + "SHELL:-DSTM32C011xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -113539,15 +113679,15 @@ target_compile_options(STM32C0116_DK_serial_none INTERFACE ) add_library(STM32C0116_DK_usb_CDC INTERFACE) target_compile_options(STM32C0116_DK_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(STM32C0116_DK_usb_CDCgen INTERFACE) target_compile_options(STM32C0116_DK_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(STM32C0116_DK_usb_HID INTERFACE) target_compile_options(STM32C0116_DK_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(STM32C0116_DK_usb_none INTERFACE) target_compile_options(STM32C0116_DK_usb_none INTERFACE @@ -113576,7 +113716,7 @@ set(STM32C0316_DK_MCU cortex-m0plus) set(STM32C0316_DK_FPCONF "-") add_library(STM32C0316_DK INTERFACE) target_compile_options(STM32C0316_DK INTERFACE - "SHELL:-DSTM32C031xx -D__CORTEX_SC=0" + "SHELL:-DSTM32C031xx -D__CORTEX_SC=0" "SHELL:" "SHELL:" "SHELL: " @@ -113621,15 +113761,15 @@ target_compile_options(STM32C0316_DK_serial_none INTERFACE ) add_library(STM32C0316_DK_usb_CDC INTERFACE) target_compile_options(STM32C0316_DK_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(STM32C0316_DK_usb_CDCgen INTERFACE) target_compile_options(STM32C0316_DK_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(STM32C0316_DK_usb_HID INTERFACE) target_compile_options(STM32C0316_DK_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(STM32C0316_DK_usb_none INTERFACE) target_compile_options(STM32C0316_DK_usb_none INTERFACE @@ -113658,7 +113798,7 @@ set(STM32H573I_DK_MCU cortex-m33) set(STM32H573I_DK_FPCONF "fpv4-sp-d16-hard") add_library(STM32H573I_DK INTERFACE) target_compile_options(STM32H573I_DK INTERFACE - "SHELL:-DSTM32H573xx " + "SHELL:-DSTM32H573xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -113703,15 +113843,15 @@ target_compile_options(STM32H573I_DK_serial_none INTERFACE ) add_library(STM32H573I_DK_usb_CDC INTERFACE) target_compile_options(STM32H573I_DK_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(STM32H573I_DK_usb_CDCgen INTERFACE) target_compile_options(STM32H573I_DK_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(STM32H573I_DK_usb_HID INTERFACE) target_compile_options(STM32H573I_DK_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(STM32H573I_DK_usb_none INTERFACE) target_compile_options(STM32H573I_DK_usb_none INTERFACE @@ -113740,7 +113880,7 @@ set(STM32H747I_DISCO_MCU cortex-m7) set(STM32H747I_DISCO_FPCONF "fpv4-sp-d16-hard") add_library(STM32H747I_DISCO INTERFACE) target_compile_options(STM32H747I_DISCO INTERFACE - "SHELL:-DSTM32H747xx -DCORE_CM7" + "SHELL:-DSTM32H747xx -DCORE_CM7" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -113785,15 +113925,15 @@ target_compile_options(STM32H747I_DISCO_serial_none INTERFACE ) add_library(STM32H747I_DISCO_usb_CDC INTERFACE) target_compile_options(STM32H747I_DISCO_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(STM32H747I_DISCO_usb_CDCgen INTERFACE) target_compile_options(STM32H747I_DISCO_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(STM32H747I_DISCO_usb_HID INTERFACE) target_compile_options(STM32H747I_DISCO_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(STM32H747I_DISCO_usb_none INTERFACE) target_compile_options(STM32H747I_DISCO_usb_none INTERFACE @@ -113822,7 +113962,7 @@ set(STM32L562E_DK_MCU cortex-m33) set(STM32L562E_DK_FPCONF "fpv4-sp-d16-hard") add_library(STM32L562E_DK INTERFACE) target_compile_options(STM32L562E_DK INTERFACE - "SHELL:-DSTM32L562xx " + "SHELL:-DSTM32L562xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -113867,15 +114007,15 @@ target_compile_options(STM32L562E_DK_serial_none INTERFACE ) add_library(STM32L562E_DK_usb_CDC INTERFACE) target_compile_options(STM32L562E_DK_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(STM32L562E_DK_usb_CDCgen INTERFACE) target_compile_options(STM32L562E_DK_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(STM32L562E_DK_usb_HID INTERFACE) target_compile_options(STM32L562E_DK_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(STM32L562E_DK_usb_none INTERFACE) target_compile_options(STM32L562E_DK_usb_none INTERFACE @@ -113904,7 +114044,7 @@ set(STM32MP157A_DK1_MCU cortex-m4) set(STM32MP157A_DK1_FPCONF "-") add_library(STM32MP157A_DK1 INTERFACE) target_compile_options(STM32MP157A_DK1 INTERFACE - "SHELL:-DCORE_CM4 -DSTM32MP157Axx " + "SHELL:-DCORE_CM4 -DSTM32MP157Axx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -113970,7 +114110,7 @@ set(STM32MP157C_DK2_MCU cortex-m4) set(STM32MP157C_DK2_FPCONF "-") add_library(STM32MP157C_DK2 INTERFACE) target_compile_options(STM32MP157C_DK2 INTERFACE - "SHELL:-DCORE_CM4 -DSTM32MP157Cxx " + "SHELL:-DCORE_CM4 -DSTM32MP157Cxx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -114036,7 +114176,7 @@ set(STM32WB5MM_DK_MCU cortex-m4) set(STM32WB5MM_DK_FPCONF "fpv4-sp-d16-hard") add_library(STM32WB5MM_DK INTERFACE) target_compile_options(STM32WB5MM_DK INTERFACE - "SHELL:-DSTM32WB5Mxx " + "SHELL:-DSTM32WB5Mxx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -114081,15 +114221,15 @@ target_compile_options(STM32WB5MM_DK_serial_none INTERFACE ) add_library(STM32WB5MM_DK_usb_CDC INTERFACE) target_compile_options(STM32WB5MM_DK_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(STM32WB5MM_DK_usb_CDCgen INTERFACE) target_compile_options(STM32WB5MM_DK_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(STM32WB5MM_DK_usb_HID INTERFACE) target_compile_options(STM32WB5MM_DK_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(STM32WB5MM_DK_usb_none INTERFACE) target_compile_options(STM32WB5MM_DK_usb_none INTERFACE @@ -114118,7 +114258,7 @@ set(STORM32_V1_31_RC_MCU cortex-m3) set(STORM32_V1_31_RC_FPCONF "-") add_library(STORM32_V1_31_RC INTERFACE) target_compile_options(STORM32_V1_31_RC INTERFACE - "SHELL:-DSTM32F103xE " + "SHELL:-DSTM32F103xE" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL: " @@ -114163,11 +114303,11 @@ target_compile_options(STORM32_V1_31_RC_serial_none INTERFACE ) add_library(STORM32_V1_31_RC_usb_CDC INTERFACE) target_compile_options(STORM32_V1_31_RC_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(STORM32_V1_31_RC_usb_CDCgen INTERFACE) target_compile_options(STORM32_V1_31_RC_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(STORM32_V1_31_RC_usb_none INTERFACE) target_compile_options(STORM32_V1_31_RC_usb_none INTERFACE @@ -114196,7 +114336,7 @@ set(SWAN_R5_MCU cortex-m4) set(SWAN_R5_FPCONF "fpv4-sp-d16-hard") add_library(SWAN_R5 INTERFACE) target_compile_options(SWAN_R5 INTERFACE - "SHELL:-DSTM32L4R5xx " + "SHELL:-DSTM32L4R5xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -114241,15 +114381,15 @@ target_compile_options(SWAN_R5_serial_none INTERFACE ) add_library(SWAN_R5_usb_CDC INTERFACE) target_compile_options(SWAN_R5_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x30A4 -DUSBD_PID=0x0002 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x30A4 -DUSBD_PID=0x0002 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(SWAN_R5_usb_CDCgen INTERFACE) target_compile_options(SWAN_R5_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x30A4 -DUSBD_PID=0x0002 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x30A4 -DUSBD_PID=0x0002 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(SWAN_R5_usb_HID INTERFACE) target_compile_options(SWAN_R5_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x30A4 -DUSBD_PID=0x0002 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x30A4 -DUSBD_PID=0x0002 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(SWAN_R5_usb_none INTERFACE) target_compile_options(SWAN_R5_usb_none INTERFACE @@ -114278,7 +114418,7 @@ set(THUNDERPACK_F411_MCU cortex-m4) set(THUNDERPACK_F411_FPCONF "-") add_library(THUNDERPACK_F411 INTERFACE) target_compile_options(THUNDERPACK_F411 INTERFACE - "SHELL:-DSTM32F411xE " + "SHELL:-DSTM32F411xE" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -114323,15 +114463,15 @@ target_compile_options(THUNDERPACK_F411_serial_none INTERFACE ) add_library(THUNDERPACK_F411_usb_CDC INTERFACE) target_compile_options(THUNDERPACK_F411_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(THUNDERPACK_F411_usb_CDCgen INTERFACE) target_compile_options(THUNDERPACK_F411_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(THUNDERPACK_F411_usb_HID INTERFACE) target_compile_options(THUNDERPACK_F411_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(THUNDERPACK_F411_usb_none INTERFACE) target_compile_options(THUNDERPACK_F411_usb_none INTERFACE @@ -114360,7 +114500,7 @@ set(THUNDERPACK_F411_hid_MCU cortex-m4) set(THUNDERPACK_F411_hid_FPCONF "-") add_library(THUNDERPACK_F411_hid INTERFACE) target_compile_options(THUNDERPACK_F411_hid INTERFACE - "SHELL:-DSTM32F411xE -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F411xE -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -114402,7 +114542,7 @@ set(THUNDERPACK_L072_MCU cortex-m0plus) set(THUNDERPACK_L072_FPCONF "-") add_library(THUNDERPACK_L072 INTERFACE) target_compile_options(THUNDERPACK_L072 INTERFACE - "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL: " @@ -114447,15 +114587,15 @@ target_compile_options(THUNDERPACK_L072_serial_none INTERFACE ) add_library(THUNDERPACK_L072_usb_CDC INTERFACE) target_compile_options(THUNDERPACK_L072_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(THUNDERPACK_L072_usb_CDCgen INTERFACE) target_compile_options(THUNDERPACK_L072_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(THUNDERPACK_L072_usb_HID INTERFACE) target_compile_options(THUNDERPACK_L072_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(THUNDERPACK_L072_usb_none INTERFACE) target_compile_options(THUNDERPACK_L072_usb_none INTERFACE @@ -114472,7 +114612,7 @@ set(VAKE_V1_MCU cortex-m4) set(VAKE_V1_FPCONF "fpv4-sp-d16-hard") add_library(VAKE_V1 INTERFACE) target_compile_options(VAKE_V1 INTERFACE - "SHELL:-DSTM32F446xx " + "SHELL:-DSTM32F446xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -114517,11 +114657,11 @@ target_compile_options(VAKE_V1_serial_none INTERFACE ) add_library(VAKE_V1_usb_CDC INTERFACE) target_compile_options(VAKE_V1_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(VAKE_V1_usb_CDCgen INTERFACE) target_compile_options(VAKE_V1_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(VAKE_V1_usb_none INTERFACE) target_compile_options(VAKE_V1_usb_none INTERFACE @@ -114550,7 +114690,7 @@ set(VCCGND_F103ZET6_MCU cortex-m3) set(VCCGND_F103ZET6_FPCONF "-") add_library(VCCGND_F103ZET6 INTERFACE) target_compile_options(VCCGND_F103ZET6 INTERFACE - "SHELL:-DSTM32F103xE " + "SHELL:-DSTM32F103xE" "SHELL:" "SHELL:" "SHELL: " @@ -114595,15 +114735,15 @@ target_compile_options(VCCGND_F103ZET6_serial_none INTERFACE ) add_library(VCCGND_F103ZET6_usb_CDC INTERFACE) target_compile_options(VCCGND_F103ZET6_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(VCCGND_F103ZET6_usb_CDCgen INTERFACE) target_compile_options(VCCGND_F103ZET6_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(VCCGND_F103ZET6_usb_HID INTERFACE) target_compile_options(VCCGND_F103ZET6_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(VCCGND_F103ZET6_usb_none INTERFACE) target_compile_options(VCCGND_F103ZET6_usb_none INTERFACE @@ -114632,7 +114772,7 @@ set(VCCGND_F103ZET6_dfu2_MCU cortex-m3) set(VCCGND_F103ZET6_dfu2_FPCONF "-") add_library(VCCGND_F103ZET6_dfu2 INTERFACE) target_compile_options(VCCGND_F103ZET6_dfu2 INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -114674,7 +114814,7 @@ set(VCCGND_F103ZET6_dfuo_MCU cortex-m3) set(VCCGND_F103ZET6_dfuo_FPCONF "-") add_library(VCCGND_F103ZET6_dfuo INTERFACE) target_compile_options(VCCGND_F103ZET6_dfuo INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -114716,7 +114856,7 @@ set(VCCGND_F103ZET6_hid_MCU cortex-m3) set(VCCGND_F103ZET6_hid_FPCONF "-") add_library(VCCGND_F103ZET6_hid INTERFACE) target_compile_options(VCCGND_F103ZET6_hid INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -114758,7 +114898,7 @@ set(VCCGND_F103ZET6_MINI_MCU cortex-m3) set(VCCGND_F103ZET6_MINI_FPCONF "-") add_library(VCCGND_F103ZET6_MINI INTERFACE) target_compile_options(VCCGND_F103ZET6_MINI INTERFACE - "SHELL:-DSTM32F103xE " + "SHELL:-DSTM32F103xE" "SHELL:" "SHELL:" "SHELL: " @@ -114803,15 +114943,15 @@ target_compile_options(VCCGND_F103ZET6_MINI_serial_none INTERFACE ) add_library(VCCGND_F103ZET6_MINI_usb_CDC INTERFACE) target_compile_options(VCCGND_F103ZET6_MINI_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(VCCGND_F103ZET6_MINI_usb_CDCgen INTERFACE) target_compile_options(VCCGND_F103ZET6_MINI_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(VCCGND_F103ZET6_MINI_usb_HID INTERFACE) target_compile_options(VCCGND_F103ZET6_MINI_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(VCCGND_F103ZET6_MINI_usb_none INTERFACE) target_compile_options(VCCGND_F103ZET6_MINI_usb_none INTERFACE @@ -114840,7 +114980,7 @@ set(VCCGND_F103ZET6_MINI_dfu2_MCU cortex-m3) set(VCCGND_F103ZET6_MINI_dfu2_FPCONF "-") add_library(VCCGND_F103ZET6_MINI_dfu2 INTERFACE) target_compile_options(VCCGND_F103ZET6_MINI_dfu2 INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -114882,7 +115022,7 @@ set(VCCGND_F103ZET6_MINI_dfuo_MCU cortex-m3) set(VCCGND_F103ZET6_MINI_dfuo_FPCONF "-") add_library(VCCGND_F103ZET6_MINI_dfuo INTERFACE) target_compile_options(VCCGND_F103ZET6_MINI_dfuo INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF" "SHELL:" "SHELL:" "SHELL: " @@ -114924,7 +115064,7 @@ set(VCCGND_F103ZET6_MINI_hid_MCU cortex-m3) set(VCCGND_F103ZET6_MINI_hid_FPCONF "-") add_library(VCCGND_F103ZET6_MINI_hid INTERFACE) target_compile_options(VCCGND_F103ZET6_MINI_hid INTERFACE - "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:" "SHELL:" "SHELL: " @@ -114966,7 +115106,7 @@ set(VCCGND_F407ZG_MINI_MCU cortex-m4) set(VCCGND_F407ZG_MINI_FPCONF "-") add_library(VCCGND_F407ZG_MINI INTERFACE) target_compile_options(VCCGND_F407ZG_MINI INTERFACE - "SHELL:-DSTM32F407xx " + "SHELL:-DSTM32F407xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -115011,15 +115151,15 @@ target_compile_options(VCCGND_F407ZG_MINI_serial_none INTERFACE ) add_library(VCCGND_F407ZG_MINI_usb_CDC INTERFACE) target_compile_options(VCCGND_F407ZG_MINI_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(VCCGND_F407ZG_MINI_usb_CDCgen INTERFACE) target_compile_options(VCCGND_F407ZG_MINI_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(VCCGND_F407ZG_MINI_usb_HID INTERFACE) target_compile_options(VCCGND_F407ZG_MINI_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(VCCGND_F407ZG_MINI_usb_none INTERFACE) target_compile_options(VCCGND_F407ZG_MINI_usb_none INTERFACE @@ -115048,7 +115188,7 @@ set(VCCGND_F407ZG_MINI_hid_MCU cortex-m4) set(VCCGND_F407ZG_MINI_hid_FPCONF "-") add_library(VCCGND_F407ZG_MINI_hid INTERFACE) target_compile_options(VCCGND_F407ZG_MINI_hid INTERFACE - "SHELL:-DSTM32F407xx -DHAL_UART_MODULE_ENABLED -DBL_HID" + "SHELL:-DSTM32F407xx -DHAL_UART_MODULE_ENABLED -DBL_HID" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -115090,7 +115230,7 @@ set(WEACT_G474CE_MCU cortex-m4) set(WEACT_G474CE_FPCONF "-") add_library(WEACT_G474CE INTERFACE) target_compile_options(WEACT_G474CE INTERFACE - "SHELL:-DSTM32G474xx " + "SHELL:-DSTM32G474xx" "SHELL:" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -115135,15 +115275,15 @@ target_compile_options(WEACT_G474CE_serial_none INTERFACE ) add_library(WEACT_G474CE_usb_CDC INTERFACE) target_compile_options(WEACT_G474CE_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(WEACT_G474CE_usb_CDCgen INTERFACE) target_compile_options(WEACT_G474CE_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(WEACT_G474CE_usb_HID INTERFACE) target_compile_options(WEACT_G474CE_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(WEACT_G474CE_usb_none INTERFACE) target_compile_options(WEACT_G474CE_usb_none INTERFACE @@ -115172,7 +115312,7 @@ set(WEACT_H562RG_MCU cortex-m33) set(WEACT_H562RG_FPCONF "-") add_library(WEACT_H562RG INTERFACE) target_compile_options(WEACT_H562RG INTERFACE - "SHELL:-DSTM32H562xx " + "SHELL:-DSTM32H562xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -115217,15 +115357,15 @@ target_compile_options(WEACT_H562RG_serial_none INTERFACE ) add_library(WEACT_H562RG_usb_CDC INTERFACE) target_compile_options(WEACT_H562RG_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(WEACT_H562RG_usb_CDCgen INTERFACE) target_compile_options(WEACT_H562RG_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(WEACT_H562RG_usb_HID INTERFACE) target_compile_options(WEACT_H562RG_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(WEACT_H562RG_usb_none INTERFACE) target_compile_options(WEACT_H562RG_usb_none INTERFACE @@ -115254,7 +115394,7 @@ set(WeActMiniH743VITX_MCU cortex-m7) set(WeActMiniH743VITX_FPCONF "-") add_library(WeActMiniH743VITX INTERFACE) target_compile_options(WeActMiniH743VITX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H743xx " + "SHELL:-DCORE_CM7 -DSTM32H743xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -115299,15 +115439,15 @@ target_compile_options(WeActMiniH743VITX_serial_none INTERFACE ) add_library(WeActMiniH743VITX_usb_CDC INTERFACE) target_compile_options(WeActMiniH743VITX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(WeActMiniH743VITX_usb_CDCgen INTERFACE) target_compile_options(WeActMiniH743VITX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(WeActMiniH743VITX_usb_HID INTERFACE) target_compile_options(WeActMiniH743VITX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(WeActMiniH743VITX_usb_none INTERFACE) target_compile_options(WeActMiniH743VITX_usb_none INTERFACE @@ -115336,7 +115476,7 @@ set(WeActMiniH750VBTX_MCU cortex-m7) set(WeActMiniH750VBTX_FPCONF "-") add_library(WeActMiniH750VBTX INTERFACE) target_compile_options(WeActMiniH750VBTX INTERFACE - "SHELL:-DCORE_CM7 -DSTM32H750xx " + "SHELL:-DCORE_CM7 -DSTM32H750xx" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -115381,15 +115521,15 @@ target_compile_options(WeActMiniH750VBTX_serial_none INTERFACE ) add_library(WeActMiniH750VBTX_usb_CDC INTERFACE) target_compile_options(WeActMiniH750VBTX_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(WeActMiniH750VBTX_usb_CDCgen INTERFACE) target_compile_options(WeActMiniH750VBTX_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(WeActMiniH750VBTX_usb_HID INTERFACE) target_compile_options(WeActMiniH750VBTX_usb_HID INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" ) add_library(WeActMiniH750VBTX_usb_none INTERFACE) target_compile_options(WeActMiniH750VBTX_usb_none INTERFACE @@ -115418,7 +115558,7 @@ set(WRAITH32_V1_MCU cortex-m0) set(WRAITH32_V1_FPCONF "-") add_library(WRAITH32_V1 INTERFACE) target_compile_options(WRAITH32_V1 INTERFACE - "SHELL:-DSTM32F051x8 " + "SHELL:-DSTM32F051x8" "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL: " @@ -115463,11 +115603,11 @@ target_compile_options(WRAITH32_V1_serial_none INTERFACE ) add_library(WRAITH32_V1_usb_CDC INTERFACE) target_compile_options(WRAITH32_V1_usb_CDC INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" ) add_library(WRAITH32_V1_usb_CDCgen INTERFACE) target_compile_options(WRAITH32_V1_usb_CDCgen INTERFACE - "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" ) add_library(WRAITH32_V1_usb_none INTERFACE) target_compile_options(WRAITH32_V1_usb_none INTERFACE From ad684301182020a3b18c054a16442957324701c9 Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Mon, 26 May 2025 16:51:24 +0200 Subject: [PATCH 38/44] system(f7) update STM32F7xx HAL Drivers to v1.3.2 Included in STM32CubeF7 FW v1.17.3 Signed-off-by: Frederic Pillon --- .../Inc/Legacy/stm32_hal_legacy.h | 99 +++- .../Inc/stm32f7xx_hal_adc.h | 2 +- .../Inc/stm32f7xx_hal_cryp.h | 10 +- .../Inc/stm32f7xx_hal_dcmi.h | 2 +- .../Inc/stm32f7xx_hal_dma2d.h | 8 +- .../Inc/stm32f7xx_hal_eth.h | 8 +- .../Inc/stm32f7xx_hal_hash.h | 82 +-- .../Inc/stm32f7xx_hal_hash_ex.h | 74 +-- .../Inc/stm32f7xx_hal_i2s.h | 4 +- .../Inc/stm32f7xx_hal_ltdc.h | 7 +- .../Inc/stm32f7xx_hal_nand.h | 2 +- .../Inc/stm32f7xx_hal_pcd_ex.h | 1 - .../Inc/stm32f7xx_hal_rcc.h | 4 +- .../Inc/stm32f7xx_hal_rtc.h | 4 +- .../Inc/stm32f7xx_hal_rtc_ex.h | 8 +- .../Inc/stm32f7xx_hal_sdram.h | 2 +- .../Inc/stm32f7xx_hal_spi.h | 46 +- .../Inc/stm32f7xx_hal_tim.h | 53 +- .../Inc/stm32f7xx_hal_uart.h | 4 + .../Inc/stm32f7xx_hal_uart_ex.h | 2 + .../Inc/stm32f7xx_hal_usart.h | 1 - .../Inc/stm32f7xx_hal_wwdg.h | 2 +- .../Inc/stm32f7xx_ll_dma.h | 2 +- .../Inc/stm32f7xx_ll_dma2d.h | 111 ++-- .../Inc/stm32f7xx_ll_fmc.h | 55 +- .../Inc/stm32f7xx_ll_iwdg.h | 14 +- .../Inc/stm32f7xx_ll_rcc.h | 4 +- .../Inc/stm32f7xx_ll_rtc.h | 4 +- .../Inc/stm32f7xx_ll_sdmmc.h | 8 +- .../Inc/stm32f7xx_ll_spi.h | 167 +++--- .../Inc/stm32f7xx_ll_wwdg.h | 12 +- .../STM32F7xx_HAL_Driver/Release_Notes.html | 86 +++- .../STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c | 4 +- .../Src/stm32f7xx_hal_adc.c | 9 +- .../Src/stm32f7xx_hal_adc_ex.c | 5 +- .../Src/stm32f7xx_hal_can.c | 4 +- .../Src/stm32f7xx_hal_crc.c | 8 +- .../Src/stm32f7xx_hal_crc_ex.c | 2 - .../Src/stm32f7xx_hal_cryp.c | 159 +++--- .../Src/stm32f7xx_hal_cryp_ex.c | 1 - .../Src/stm32f7xx_hal_dcmi.c | 10 +- .../Src/stm32f7xx_hal_dma.c | 2 +- .../Src/stm32f7xx_hal_dma2d.c | 13 +- .../Src/stm32f7xx_hal_eth.c | 88 +++- .../Src/stm32f7xx_hal_flash.c | 2 +- .../Src/stm32f7xx_hal_flash_ex.c | 2 +- .../Src/stm32f7xx_hal_hash.c | 145 +++--- .../Src/stm32f7xx_hal_hash_ex.c | 79 ++- .../Src/stm32f7xx_hal_i2c.c | 79 ++- .../Src/stm32f7xx_hal_i2s.c | 82 ++- .../Src/stm32f7xx_hal_iwdg.c | 3 +- .../Src/stm32f7xx_hal_ltdc.c | 28 +- .../Src/stm32f7xx_hal_mmc.c | 30 +- .../Src/stm32f7xx_hal_nand.c | 10 +- .../Src/stm32f7xx_hal_pcd.c | 9 +- .../Src/stm32f7xx_hal_qspi.c | 53 +- .../Src/stm32f7xx_hal_rcc.c | 4 +- .../Src/stm32f7xx_hal_rtc.c | 112 +++-- .../Src/stm32f7xx_hal_rtc_ex.c | 35 +- .../Src/stm32f7xx_hal_sai.c | 78 ++- .../Src/stm32f7xx_hal_sd.c | 13 +- .../Src/stm32f7xx_hal_sdram.c | 5 +- .../Src/stm32f7xx_hal_smartcard.c | 2 +- .../Src/stm32f7xx_hal_smbus.c | 4 +- .../Src/stm32f7xx_hal_spi.c | 474 +++++++++--------- .../Src/stm32f7xx_hal_sram.c | 3 + .../Src/stm32f7xx_hal_tim.c | 13 +- .../Src/stm32f7xx_hal_uart.c | 162 ++++-- .../Src/stm32f7xx_hal_uart_ex.c | 42 +- .../Src/stm32f7xx_hal_usart.c | 16 +- .../Src/stm32f7xx_hal_wwdg.c | 11 +- .../Src/stm32f7xx_ll_dma2d.c | 10 +- .../Src/stm32f7xx_ll_fmc.c | 54 +- .../Src/stm32f7xx_ll_spi.c | 9 +- .../Src/stm32f7xx_ll_usb.c | 39 +- .../Drivers/STM32YYxx_HAL_Driver_version.md | 2 +- 76 files changed, 1640 insertions(+), 1163 deletions(-) diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h b/system/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h index b4dbed31c1..36cbbaf5db 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h +++ b/system/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h @@ -472,7 +472,9 @@ extern "C" { #define TYPEPROGRAMDATA_FASTBYTE FLASH_TYPEPROGRAMDATA_FASTBYTE #define TYPEPROGRAMDATA_FASTHALFWORD FLASH_TYPEPROGRAMDATA_FASTHALFWORD #define TYPEPROGRAMDATA_FASTWORD FLASH_TYPEPROGRAMDATA_FASTWORD +#if !defined(STM32F2) && !defined(STM32F4) && !defined(STM32F7) && !defined(STM32H7) && !defined(STM32H5) #define PAGESIZE FLASH_PAGE_SIZE +#endif /* STM32F2 && STM32F4 && STM32F7 && STM32H7 && STM32H5 */ #define TYPEPROGRAM_FASTBYTE FLASH_TYPEPROGRAM_BYTE #define TYPEPROGRAM_FASTHALFWORD FLASH_TYPEPROGRAM_HALFWORD #define TYPEPROGRAM_FASTWORD FLASH_TYPEPROGRAM_WORD @@ -536,6 +538,10 @@ extern "C" { #define FLASH_FLAG_WDW FLASH_FLAG_WBNE #define OB_WRP_SECTOR_All OB_WRP_SECTOR_ALL #endif /* STM32H7 */ +#if defined(STM32H7RS) +#define FLASH_OPTKEY1 FLASH_OPT_KEY1 +#define FLASH_OPTKEY2 FLASH_OPT_KEY2 +#endif /* STM32H7RS */ #if defined(STM32U5) #define OB_USER_nRST_STOP OB_USER_NRST_STOP #define OB_USER_nRST_STDBY OB_USER_NRST_STDBY @@ -601,6 +607,15 @@ extern "C" { #define HAL_SYSCFG_DisableIOAnalogSwitchVDD HAL_SYSCFG_DisableIOSwitchVDD #endif /* STM32G4 */ +#if defined(STM32U5) + +#define HAL_SYSCFG_EnableIOAnalogSwitchBooster HAL_SYSCFG_EnableIOAnalogBooster +#define HAL_SYSCFG_DisableIOAnalogSwitchBooster HAL_SYSCFG_DisableIOAnalogBooster +#define HAL_SYSCFG_EnableIOAnalogSwitchVoltageSelection HAL_SYSCFG_EnableIOAnalogVoltageSelection +#define HAL_SYSCFG_DisableIOAnalogSwitchVoltageSelection HAL_SYSCFG_DisableIOAnalogVoltageSelection + +#endif /* STM32U5 */ + #if defined(STM32H5) #define SYSCFG_IT_FPU_IOC SBS_IT_FPU_IOC #define SYSCFG_IT_FPU_DZC SBS_IT_FPU_DZC @@ -806,6 +821,21 @@ extern "C" { #define GPIO_AF0_S2DSTOP GPIO_AF0_SRDSTOP #define GPIO_AF11_LPGPIO GPIO_AF11_LPGPIO1 #endif /* STM32U5 */ + +#if defined(STM32WBA) +#define GPIO_AF11_RF_ANTSW0 GPIO_AF11_RF +#define GPIO_AF11_RF_ANTSW1 GPIO_AF11_RF +#define GPIO_AF11_RF_ANTSW2 GPIO_AF11_RF +#define GPIO_AF11_RF_IO1 GPIO_AF11_RF +#define GPIO_AF11_RF_IO2 GPIO_AF11_RF +#define GPIO_AF11_RF_IO3 GPIO_AF11_RF +#define GPIO_AF11_RF_IO4 GPIO_AF11_RF +#define GPIO_AF11_RF_IO5 GPIO_AF11_RF +#define GPIO_AF11_RF_IO6 GPIO_AF11_RF +#define GPIO_AF11_RF_IO7 GPIO_AF11_RF +#define GPIO_AF11_RF_IO8 GPIO_AF11_RF +#define GPIO_AF11_RF_IO9 GPIO_AF11_RF +#endif /* STM32WBA */ /** * @} */ @@ -860,6 +890,10 @@ extern "C" { #define __HAL_HRTIM_SetCompare __HAL_HRTIM_SETCOMPARE #define __HAL_HRTIM_GetCompare __HAL_HRTIM_GETCOMPARE +#if defined(STM32F3) || defined(STM32G4) || defined(STM32H7) +#define HRTIMInterruptResquests HRTIMInterruptRequests +#endif /* STM32F3 || STM32G4 || STM32H7 */ + #if defined(STM32G4) #define HAL_HRTIM_ExternalEventCounterConfig HAL_HRTIM_ExtEventCounterConfig #define HAL_HRTIM_ExternalEventCounterEnable HAL_HRTIM_ExtEventCounterEnable @@ -997,8 +1031,8 @@ extern "C" { #define HRTIM_CALIBRATIONRATE_910 (HRTIM_DLLCR_CALRTE_0) #define HRTIM_CALIBRATIONRATE_114 (HRTIM_DLLCR_CALRTE_1) #define HRTIM_CALIBRATIONRATE_14 (HRTIM_DLLCR_CALRTE_1 | HRTIM_DLLCR_CALRTE_0) - #endif /* STM32F3 */ + /** * @} */ @@ -1249,10 +1283,10 @@ extern "C" { #define RTC_TAMPERPIN_PA0 RTC_TAMPERPIN_POS1 #define RTC_TAMPERPIN_PI8 RTC_TAMPERPIN_POS1 -#if defined(STM32H5) || defined(STM32H7RS) +#if defined(STM32H5) || defined(STM32H7RS) || defined(STM32N6) #define TAMP_SECRETDEVICE_ERASE_NONE TAMP_DEVICESECRETS_ERASE_NONE #define TAMP_SECRETDEVICE_ERASE_BKP_SRAM TAMP_DEVICESECRETS_ERASE_BKPSRAM -#endif /* STM32H5 || STM32H7RS */ +#endif /* STM32H5 || STM32H7RS || STM32N6 */ #if defined(STM32WBA) #define TAMP_SECRETDEVICE_ERASE_NONE TAMP_DEVICESECRETS_ERASE_NONE @@ -1264,27 +1298,27 @@ extern "C" { #define TAMP_SECRETDEVICE_ERASE_ALL TAMP_DEVICESECRETS_ERASE_ALL #endif /* STM32WBA */ -#if defined(STM32H5) || defined(STM32WBA) || defined(STM32H7RS) +#if defined(STM32H5) || defined(STM32WBA) || defined(STM32H7RS) || defined(STM32N6) #define TAMP_SECRETDEVICE_ERASE_DISABLE TAMP_DEVICESECRETS_ERASE_NONE #define TAMP_SECRETDEVICE_ERASE_ENABLE TAMP_SECRETDEVICE_ERASE_ALL -#endif /* STM32H5 || STM32WBA || STM32H7RS */ +#endif /* STM32H5 || STM32WBA || STM32H7RS || STM32N6 */ -#if defined(STM32F7) +#if defined(STM32F7) || defined(STM32WB) #define RTC_TAMPCR_TAMPXE RTC_TAMPER_ENABLE_BITS_MASK #define RTC_TAMPCR_TAMPXIE RTC_TAMPER_IT_ENABLE_BITS_MASK -#endif /* STM32F7 */ +#endif /* STM32F7 || STM32WB */ #if defined(STM32H7) #define RTC_TAMPCR_TAMPXE RTC_TAMPER_X #define RTC_TAMPCR_TAMPXIE RTC_TAMPER_X_INTERRUPT #endif /* STM32H7 */ -#if defined(STM32F7) || defined(STM32H7) || defined(STM32L0) +#if defined(STM32F7) || defined(STM32H7) || defined(STM32L0) || defined(STM32WB) #define RTC_TAMPER1_INTERRUPT RTC_IT_TAMP1 #define RTC_TAMPER2_INTERRUPT RTC_IT_TAMP2 #define RTC_TAMPER3_INTERRUPT RTC_IT_TAMP3 #define RTC_ALL_TAMPER_INTERRUPT RTC_IT_TAMP -#endif /* STM32F7 || STM32H7 || STM32L0 */ +#endif /* STM32F7 || STM32H7 || STM32L0 || STM32WB */ /** * @} @@ -1451,7 +1485,7 @@ extern "C" { #define TIM_TIM3_TI1_COMP1COMP2_OUT TIM_TIM3_TI1_COMP1_COMP2 #endif -#if defined(STM32U5) +#if defined(STM32U5) || defined(STM32MP2) #define OCREF_CLEAR_SELECT_Pos OCREF_CLEAR_SELECT_POS #define OCREF_CLEAR_SELECT_Msk OCREF_CLEAR_SELECT_MSK #endif @@ -1817,7 +1851,7 @@ extern "C" { #define HAL_FMPI2CEx_AnalogFilter_Config HAL_FMPI2CEx_ConfigAnalogFilter #define HAL_FMPI2CEx_DigitalFilter_Config HAL_FMPI2CEx_ConfigDigitalFilter -#define HAL_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus, cmd) ((cmd == ENABLE)? \ +#define HAL_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus, cmd) (((cmd) == ENABLE)? \ HAL_I2CEx_EnableFastModePlus(SYSCFG_I2CFastModePlus): \ HAL_I2CEx_DisableFastModePlus(SYSCFG_I2CFastModePlus)) @@ -1999,12 +2033,12 @@ extern "C" { /** @defgroup HAL_RTC_Aliased_Functions HAL RTC Aliased Functions maintained for legacy purpose * @{ */ -#if defined(STM32H5) || defined(STM32WBA) || defined(STM32H7RS) +#if defined(STM32H5) || defined(STM32WBA) || defined(STM32H7RS) || defined(STM32N6) #define HAL_RTCEx_SetBoothardwareKey HAL_RTCEx_LockBootHardwareKey #define HAL_RTCEx_BKUPBlock_Enable HAL_RTCEx_BKUPBlock #define HAL_RTCEx_BKUPBlock_Disable HAL_RTCEx_BKUPUnblock #define HAL_RTCEx_Erase_SecretDev_Conf HAL_RTCEx_ConfigEraseDeviceSecrets -#endif /* STM32H5 || STM32WBA || STM32H7RS */ +#endif /* STM32H5 || STM32WBA || STM32H7RS || STM32N6 */ /** * @} @@ -2731,6 +2765,12 @@ extern "C" { #define __APB1_RELEASE_RESET __HAL_RCC_APB1_RELEASE_RESET #define __APB2_FORCE_RESET __HAL_RCC_APB2_FORCE_RESET #define __APB2_RELEASE_RESET __HAL_RCC_APB2_RELEASE_RESET +#if defined(STM32C0) +#define __HAL_RCC_APB1_FORCE_RESET __HAL_RCC_APB1_GRP1_FORCE_RESET +#define __HAL_RCC_APB1_RELEASE_RESET __HAL_RCC_APB1_GRP1_RELEASE_RESET +#define __HAL_RCC_APB2_FORCE_RESET __HAL_RCC_APB1_GRP2_FORCE_RESET +#define __HAL_RCC_APB2_RELEASE_RESET __HAL_RCC_APB1_GRP2_RELEASE_RESET +#endif /* STM32C0 */ #define __BKP_CLK_DISABLE __HAL_RCC_BKP_CLK_DISABLE #define __BKP_CLK_ENABLE __HAL_RCC_BKP_CLK_ENABLE #define __BKP_FORCE_RESET __HAL_RCC_BKP_FORCE_RESET @@ -3659,7 +3699,8 @@ extern "C" { #endif #if defined(STM32L4) || defined(STM32WB) || defined(STM32G0) || defined(STM32G4) || defined(STM32L5) || \ - defined(STM32WL) || defined(STM32C0) || defined(STM32H7RS) || defined(STM32U0) + defined(STM32WL) || defined(STM32C0) || defined(STM32N6) || defined(STM32H7RS) || \ + defined(STM32U0) #define RCC_RTCCLKSOURCE_NO_CLK RCC_RTCCLKSOURCE_NONE #else #define RCC_RTCCLKSOURCE_NONE RCC_RTCCLKSOURCE_NO_CLK @@ -3910,7 +3951,8 @@ extern "C" { */ #if defined (STM32G0) || defined (STM32L5) || defined (STM32L412xx) || defined (STM32L422xx) || \ defined (STM32L4P5xx)|| defined (STM32L4Q5xx) || defined (STM32G4) || defined (STM32WL) || defined (STM32U5) || \ - defined (STM32WBA) || defined (STM32H5) || defined (STM32C0) || defined (STM32H7RS) || defined (STM32U0) + defined (STM32WBA) || defined (STM32H5) || \ + defined (STM32C0) || defined (STM32N6) || defined (STM32H7RS) || defined (STM32U0) || defined (STM32U3) #else #define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG #endif @@ -4204,6 +4246,33 @@ extern "C" { #define HAL_PCD_SetTxFiFo HAL_PCDEx_SetTxFiFo #define HAL_PCD_SetRxFiFo HAL_PCDEx_SetRxFiFo +#if defined(STM32U5) +#define USB_OTG_GOTGCTL_BSESVLD USB_OTG_GOTGCTL_BSVLD +#define USB_OTG_GAHBCFG_GINT USB_OTG_GAHBCFG_GINTMSK +#define USB_OTG_GUSBCFG_PHYLPCS USB_OTG_GUSBCFG_PHYLPC +#define USB_OTG_GRSTCTL_HSRST USB_OTG_GRSTCTL_PSRST +#define USB_OTG_GINTSTS_BOUTNAKEFF USB_OTG_GINTSTS_GONAKEFF +#define USB_OTG_GINTSTS_WKUINT USB_OTG_GINTSTS_WKUPINT +#define USB_OTG_GINTMSK_PXFRM_IISOOXFRM USB_OTG_GINTMSK_IPXFRM_IISOOXFRM +#define USB_OTG_GRXSTSP_EPNUM USB_OTG_GRXSTSP_EPNUM_CHNUM +#define USB_OTG_GLPMCFG_L1ResumeOK USB_OTG_GLPMCFG_L1RSMOK +#define USB_OTG_HPTXFSIZ_PTXFD USB_OTG_HPTXFSIZ_PTXFSIZ +#define USB_OTG_HCCHAR_MC USB_OTG_HCCHAR_MCNT +#define USB_OTG_HCCHAR_MC_0 USB_OTG_HCCHAR_MCNT_0 +#define USB_OTG_HCCHAR_MC_1 USB_OTG_HCCHAR_MCNT_1 +#define USB_OTG_HCINTMSK_AHBERR USB_OTG_HCINTMSK_AHBERRM +#define USB_OTG_HCTSIZ_DOPING USB_OTG_HCTSIZ_DOPNG +#define USB_OTG_DOEPMSK_OPEM USB_OTG_DOEPMSK_OUTPKTERRM +#define USB_OTG_DIEPCTL_SODDFRM USB_OTG_DIEPCTL_SD1PID_SODDFRM +#define USB_OTG_DIEPTSIZ_MULCNT USB_OTG_DIEPTSIZ_MCNT +#define USB_OTG_DOEPCTL_SODDFRM USB_OTG_DOEPCTL_SD1PID_SODDFRM +#define USB_OTG_DOEPCTL_DPID USB_OTG_DOEPCTL_DPID_EONUM +#define USB_OTG_DOEPTSIZ_STUPCNT USB_OTG_DOEPTSIZ_RXDPID +#define USB_OTG_DOEPTSIZ_STUPCNT_0 USB_OTG_DOEPTSIZ_RXDPID_0 +#define USB_OTG_DOEPTSIZ_STUPCNT_1 USB_OTG_DOEPTSIZ_RXDPID_1 +#define USB_OTG_PCGCCTL_STOPCLK USB_OTG_PCGCCTL_STPPCLK +#define USB_OTG_PCGCCTL_GATECLK USB_OTG_PCGCCTL_GATEHCLK +#endif /** * @} */ diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h index d4867b7207..533f0a64ad 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h +++ b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h @@ -859,7 +859,7 @@ uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc); * @param _CHANNELNB_ Channel number. * @retval None */ -#define ADC_SMPR2(_SAMPLETIME_, _CHANNELNB_) ((_SAMPLETIME_) << (3 * ((uint32_t)((uint16_t)(_CHANNELNB_))))) +#define ADC_SMPR2(_SAMPLETIME_, _CHANNELNB_) ((_SAMPLETIME_) << ((3UL * ((uint32_t)((uint16_t)(_CHANNELNB_)))) & 0x1FUL)) /** * @brief Set the selected regular channel rank for rank between 1 and 6. diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cryp.h b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cryp.h index 1c65f62037..9fa448a5d6 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cryp.h +++ b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cryp.h @@ -51,7 +51,8 @@ typedef struct uint32_t DataType; /*!< 32-bit data, 16-bit data, 8-bit data or 1-bit string. This parameter can be a value of @ref CRYP_Data_Type */ uint32_t KeySize; /*!< Used only in AES mode : 128, 192 or 256 bit key length in CRYP1. - 128 or 256 bit key length in TinyAES This parameter can be a value of @ref CRYP_Key_Size */ + 128 or 256 bit key length in TinyAES This parameter can be a value + of @ref CRYP_Key_Size */ uint32_t *pKey; /*!< The key used for encryption/decryption */ uint32_t *pInitVect; /*!< The initialization vector used also as initialization counter in CTR mode */ @@ -402,8 +403,11 @@ typedef void (*pCRYP_CallbackTypeDef)(CRYP_HandleTypeDef *hcryp); /*!< point */ #define CRYP_FLAG_MASK 0x0000001FU #if defined(CRYP) -#define __HAL_CRYP_GET_FLAG(__HANDLE__, __FLAG__) ((((uint8_t)((__FLAG__) >> 24)) == 0x01U)?((((__HANDLE__)->Instance->RISR) & ((__FLAG__) & CRYP_FLAG_MASK)) == ((__FLAG__) & CRYP_FLAG_MASK)): \ - ((((__HANDLE__)->Instance->RISR) & ((__FLAG__) & CRYP_FLAG_MASK)) == ((__FLAG__) & CRYP_FLAG_MASK))) +#define __HAL_CRYP_GET_FLAG(__HANDLE__, __FLAG__) ((((uint8_t)((__FLAG__) >> 24)) == 0x01U)? \ + ((((__HANDLE__)->Instance->RISR) & ((__FLAG__) \ + & CRYP_FLAG_MASK)) == ((__FLAG__) & CRYP_FLAG_MASK)): \ + ((((__HANDLE__)->Instance->RISR) & ((__FLAG__) & CRYP_FLAG_MASK))\ + == ((__FLAG__) & CRYP_FLAG_MASK))) #else /* AES*/ #define __HAL_CRYP_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) #endif /* End AES or CRYP */ diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dcmi.h b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dcmi.h index 0caf02699b..2df3848c57 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dcmi.h +++ b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dcmi.h @@ -577,7 +577,7 @@ HAL_StatusTypeDef HAL_DCMI_ConfigCrop(DCMI_HandleTypeDef *hdcmi, uint32_t X0 uint32_t YSize); HAL_StatusTypeDef HAL_DCMI_EnableCrop(DCMI_HandleTypeDef *hdcmi); HAL_StatusTypeDef HAL_DCMI_DisableCrop(DCMI_HandleTypeDef *hdcmi); -HAL_StatusTypeDef HAL_DCMI_ConfigSyncUnmask(DCMI_HandleTypeDef *hdcmi, DCMI_SyncUnmaskTypeDef *SyncUnmask); +HAL_StatusTypeDef HAL_DCMI_ConfigSyncUnmask(DCMI_HandleTypeDef *hdcmi, const DCMI_SyncUnmaskTypeDef *SyncUnmask); /** * @} diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h index c60365eaa2..12b7b7ed9e 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h +++ b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h @@ -484,9 +484,9 @@ HAL_StatusTypeDef HAL_DMA2D_Suspend(DMA2D_HandleTypeDef *hdma2d); HAL_StatusTypeDef HAL_DMA2D_Resume(DMA2D_HandleTypeDef *hdma2d); HAL_StatusTypeDef HAL_DMA2D_Abort(DMA2D_HandleTypeDef *hdma2d); HAL_StatusTypeDef HAL_DMA2D_EnableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx); -HAL_StatusTypeDef HAL_DMA2D_CLUTStartLoad(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef *CLUTCfg, +HAL_StatusTypeDef HAL_DMA2D_CLUTStartLoad(DMA2D_HandleTypeDef *hdma2d, const DMA2D_CLUTCfgTypeDef *CLUTCfg, uint32_t LayerIdx); -HAL_StatusTypeDef HAL_DMA2D_CLUTStartLoad_IT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef *CLUTCfg, +HAL_StatusTypeDef HAL_DMA2D_CLUTStartLoad_IT(DMA2D_HandleTypeDef *hdma2d, const DMA2D_CLUTCfgTypeDef *CLUTCfg, uint32_t LayerIdx); HAL_StatusTypeDef HAL_DMA2D_CLUTLoad(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx); HAL_StatusTypeDef HAL_DMA2D_CLUTLoad_IT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx); @@ -523,8 +523,8 @@ HAL_StatusTypeDef HAL_DMA2D_ConfigDeadTime(DMA2D_HandleTypeDef *hdma2d, uint8_t */ /* Peripheral State functions ***************************************************/ -HAL_DMA2D_StateTypeDef HAL_DMA2D_GetState(DMA2D_HandleTypeDef *hdma2d); -uint32_t HAL_DMA2D_GetError(DMA2D_HandleTypeDef *hdma2d); +HAL_DMA2D_StateTypeDef HAL_DMA2D_GetState(const DMA2D_HandleTypeDef *hdma2d); +uint32_t HAL_DMA2D_GetError(const DMA2D_HandleTypeDef *hdma2d); /** * @} diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h index 3c7035d82e..d7df00da4b 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h +++ b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h @@ -98,7 +98,7 @@ typedef struct uint32_t *PacketAddress[ETH_TX_DESC_CNT]; /*Instance->DMASR = ( __FLAG__)) - /** * @brief Checks whether the specified ETHERNET MAC flag is set or not. * @param __HANDLE__: ETH Handle @@ -1992,6 +1991,7 @@ uint32_t HAL_ETH_GetError(const ETH_HandleTypeDef *heth); uint32_t HAL_ETH_GetDMAError(const ETH_HandleTypeDef *heth); uint32_t HAL_ETH_GetMACError(const ETH_HandleTypeDef *heth); uint32_t HAL_ETH_GetMACWakeUpSource(const ETH_HandleTypeDef *heth); +uint32_t HAL_ETH_GetTxBuffersNumber(const ETH_HandleTypeDef *heth); /** * @} */ diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_hash.h b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_hash.h index 1cd5448bf3..8cecfa220e 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_hash.h +++ b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_hash.h @@ -117,13 +117,13 @@ typedef struct { HASH_InitTypeDef Init; /*!< HASH required parameters */ - uint8_t *pHashInBuffPtr; /*!< Pointer to input buffer */ + uint8_t const *pHashInBuffPtr; /*!< Pointer to input buffer */ uint8_t *pHashOutBuffPtr; /*!< Pointer to output buffer (digest) */ uint8_t *pHashKeyBuffPtr; /*!< Pointer to key buffer (HMAC only) */ - uint8_t *pHashMsgBuffPtr; /*!< Pointer to message buffer (HMAC only) */ + uint8_t const *pHashMsgBuffPtr; /*!< Pointer to message buffer (HMAC only) */ uint32_t HashBuffSize; /*!< Size of buffer to be processed */ @@ -476,15 +476,17 @@ HAL_StatusTypeDef HAL_HASH_UnRegisterCallback(HASH_HandleTypeDef *hhash, HAL_HAS /* HASH processing using polling *********************************************/ -HAL_StatusTypeDef HAL_HASH_SHA1_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t *pOutBuffer, +HAL_StatusTypeDef HAL_HASH_SHA1_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, + uint8_t *pOutBuffer, uint32_t Timeout); -HAL_StatusTypeDef HAL_HASH_MD5_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t *pOutBuffer, +HAL_StatusTypeDef HAL_HASH_MD5_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, + uint8_t *pOutBuffer, uint32_t Timeout); -HAL_StatusTypeDef HAL_HASH_MD5_Accmlt(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); -HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); -HAL_StatusTypeDef HAL_HASH_MD5_Accmlt_End(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASH_MD5_Accmlt(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); +HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); +HAL_StatusTypeDef HAL_HASH_MD5_Accmlt_End(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer, uint32_t Timeout); -HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt_End(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt_End(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer, uint32_t Timeout); @@ -497,15 +499,15 @@ HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt_End(HASH_HandleTypeDef *hhash, uint8_t *p */ /* HASH processing using IT **************************************************/ -HAL_StatusTypeDef HAL_HASH_SHA1_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASH_SHA1_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer); -HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); -HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt_End_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); +HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt_End_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer); -HAL_StatusTypeDef HAL_HASH_MD5_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASH_MD5_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer); -HAL_StatusTypeDef HAL_HASH_MD5_Accmlt_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); -HAL_StatusTypeDef HAL_HASH_MD5_Accmlt_End_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASH_MD5_Accmlt_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); +HAL_StatusTypeDef HAL_HASH_MD5_Accmlt_End_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer); void HAL_HASH_IRQHandler(HASH_HandleTypeDef *hhash); /** @@ -517,9 +519,9 @@ void HAL_HASH_IRQHandler(HASH_HandleTypeDef *hhash); */ /* HASH processing using DMA *************************************************/ -HAL_StatusTypeDef HAL_HASH_SHA1_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); +HAL_StatusTypeDef HAL_HASH_SHA1_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); HAL_StatusTypeDef HAL_HASH_SHA1_Finish(HASH_HandleTypeDef *hhash, uint8_t *pOutBuffer, uint32_t Timeout); -HAL_StatusTypeDef HAL_HASH_MD5_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); +HAL_StatusTypeDef HAL_HASH_MD5_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); HAL_StatusTypeDef HAL_HASH_MD5_Finish(HASH_HandleTypeDef *hhash, uint8_t *pOutBuffer, uint32_t Timeout); /** @@ -531,9 +533,11 @@ HAL_StatusTypeDef HAL_HASH_MD5_Finish(HASH_HandleTypeDef *hhash, uint8_t *pOutBu */ /* HASH-MAC processing using polling *****************************************/ -HAL_StatusTypeDef HAL_HMAC_SHA1_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t *pOutBuffer, +HAL_StatusTypeDef HAL_HMAC_SHA1_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, + uint8_t *pOutBuffer, uint32_t Timeout); -HAL_StatusTypeDef HAL_HMAC_MD5_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t *pOutBuffer, +HAL_StatusTypeDef HAL_HMAC_MD5_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, + uint8_t *pOutBuffer, uint32_t Timeout); /** @@ -544,9 +548,9 @@ HAL_StatusTypeDef HAL_HMAC_MD5_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuff * @{ */ -HAL_StatusTypeDef HAL_HMAC_MD5_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HMAC_MD5_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer); -HAL_StatusTypeDef HAL_HMAC_SHA1_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HMAC_SHA1_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer); /** @@ -558,8 +562,8 @@ HAL_StatusTypeDef HAL_HMAC_SHA1_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pIn */ /* HASH-HMAC processing using DMA ********************************************/ -HAL_StatusTypeDef HAL_HMAC_SHA1_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); -HAL_StatusTypeDef HAL_HMAC_MD5_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); +HAL_StatusTypeDef HAL_HMAC_SHA1_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); +HAL_StatusTypeDef HAL_HMAC_MD5_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); /** * @} @@ -571,13 +575,13 @@ HAL_StatusTypeDef HAL_HMAC_MD5_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pIn /* Peripheral State methods **************************************************/ -HAL_HASH_StateTypeDef HAL_HASH_GetState(HASH_HandleTypeDef *hhash); -HAL_StatusTypeDef HAL_HASH_GetStatus(HASH_HandleTypeDef *hhash); -void HAL_HASH_ContextSaving(HASH_HandleTypeDef *hhash, uint8_t *pMemBuffer); -void HAL_HASH_ContextRestoring(HASH_HandleTypeDef *hhash, uint8_t *pMemBuffer); +HAL_HASH_StateTypeDef HAL_HASH_GetState(const HASH_HandleTypeDef *hhash); +HAL_StatusTypeDef HAL_HASH_GetStatus(const HASH_HandleTypeDef *hhash); +void HAL_HASH_ContextSaving(const HASH_HandleTypeDef *hhash, const uint8_t *pMemBuffer); +void HAL_HASH_ContextRestoring(HASH_HandleTypeDef *hhash, const uint8_t *pMemBuffer); void HAL_HASH_SwFeed_ProcessSuspend(HASH_HandleTypeDef *hhash); HAL_StatusTypeDef HAL_HASH_DMAFeed_ProcessSuspend(HASH_HandleTypeDef *hhash); -uint32_t HAL_HASH_GetError(HASH_HandleTypeDef *hhash); +uint32_t HAL_HASH_GetError(const HASH_HandleTypeDef *hhash); /** * @} @@ -594,19 +598,27 @@ uint32_t HAL_HASH_GetError(HASH_HandleTypeDef *hhash); */ /* Private functions */ -HAL_StatusTypeDef HASH_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t *pOutBuffer, +HAL_StatusTypeDef HASH_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, + uint8_t *pOutBuffer, uint32_t Timeout, uint32_t Algorithm); -HAL_StatusTypeDef HASH_Accumulate(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint32_t Algorithm); -HAL_StatusTypeDef HASH_Accumulate_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint32_t Algorithm); -HAL_StatusTypeDef HASH_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t *pOutBuffer, +HAL_StatusTypeDef HASH_Accumulate(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, + uint32_t Algorithm); +HAL_StatusTypeDef HASH_Accumulate_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, + uint32_t Algorithm); +HAL_StatusTypeDef HASH_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, + uint8_t *pOutBuffer, uint32_t Algorithm); -HAL_StatusTypeDef HASH_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint32_t Algorithm); +HAL_StatusTypeDef HASH_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, + uint32_t Algorithm); HAL_StatusTypeDef HASH_Finish(HASH_HandleTypeDef *hhash, uint8_t *pOutBuffer, uint32_t Timeout); -HAL_StatusTypeDef HMAC_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t *pOutBuffer, +HAL_StatusTypeDef HMAC_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, + uint8_t *pOutBuffer, uint32_t Timeout, uint32_t Algorithm); -HAL_StatusTypeDef HMAC_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t *pOutBuffer, +HAL_StatusTypeDef HMAC_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, + uint8_t *pOutBuffer, uint32_t Algorithm); -HAL_StatusTypeDef HMAC_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint32_t Algorithm); +HAL_StatusTypeDef HMAC_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, + uint32_t Algorithm); /** * @} diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_hash_ex.h b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_hash_ex.h index 69018bb8a5..29bddd2710 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_hash_ex.h +++ b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_hash_ex.h @@ -50,15 +50,15 @@ extern "C" { * @{ */ -HAL_StatusTypeDef HAL_HASHEx_SHA224_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASHEx_SHA224_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer, uint32_t Timeout); -HAL_StatusTypeDef HAL_HASHEx_SHA224_Accmlt(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); -HAL_StatusTypeDef HAL_HASHEx_SHA224_Accmlt_End(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASHEx_SHA224_Accmlt(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); +HAL_StatusTypeDef HAL_HASHEx_SHA224_Accmlt_End(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer, uint32_t Timeout); -HAL_StatusTypeDef HAL_HASHEx_SHA256_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASHEx_SHA256_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer, uint32_t Timeout); -HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); -HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt_End(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); +HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt_End(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer, uint32_t Timeout); /** @@ -69,15 +69,17 @@ HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt_End(HASH_HandleTypeDef *hhash, uint8_ * @{ */ -HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer); -HAL_StatusTypeDef HAL_HASHEx_SHA224_Accmlt_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); -HAL_StatusTypeDef HAL_HASHEx_SHA224_Accmlt_End_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASHEx_SHA224_Accmlt_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); +HAL_StatusTypeDef HAL_HASHEx_SHA224_Accmlt_End_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, + uint32_t Size, uint8_t *pOutBuffer); -HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer); -HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); -HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt_End_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); +HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt_End_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, + uint32_t Size, uint8_t *pOutBuffer); /** @@ -87,9 +89,9 @@ HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt_End_IT(HASH_HandleTypeDef *hhash, uin /** @addtogroup HASHEx_Exported_Functions_Group3 HASH extended processing functions in DMA mode * @{ */ -HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); +HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); HAL_StatusTypeDef HAL_HASHEx_SHA224_Finish(HASH_HandleTypeDef *hhash, uint8_t *pOutBuffer, uint32_t Timeout); -HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); +HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); HAL_StatusTypeDef HAL_HASHEx_SHA256_Finish(HASH_HandleTypeDef *hhash, uint8_t *pOutBuffer, uint32_t Timeout); /** @@ -99,9 +101,9 @@ HAL_StatusTypeDef HAL_HASHEx_SHA256_Finish(HASH_HandleTypeDef *hhash, uint8_t *p /** @addtogroup HASHEx_Exported_Functions_Group4 HMAC extended processing functions in polling mode * @{ */ -HAL_StatusTypeDef HAL_HMACEx_SHA224_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HMACEx_SHA224_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer, uint32_t Timeout); -HAL_StatusTypeDef HAL_HMACEx_SHA256_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HMACEx_SHA256_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer, uint32_t Timeout); /** * @} @@ -111,9 +113,9 @@ HAL_StatusTypeDef HAL_HMACEx_SHA256_Start(HASH_HandleTypeDef *hhash, uint8_t *pI * @{ */ -HAL_StatusTypeDef HAL_HMACEx_SHA224_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HMACEx_SHA224_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer); -HAL_StatusTypeDef HAL_HMACEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HMACEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer); /** @@ -124,8 +126,8 @@ HAL_StatusTypeDef HAL_HMACEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, uint8_t * @{ */ -HAL_StatusTypeDef HAL_HMACEx_SHA224_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); -HAL_StatusTypeDef HAL_HMACEx_SHA256_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); +HAL_StatusTypeDef HAL_HMACEx_SHA224_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); +HAL_StatusTypeDef HAL_HMACEx_SHA256_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); /** * @} @@ -135,20 +137,24 @@ HAL_StatusTypeDef HAL_HMACEx_SHA256_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t * @{ */ -HAL_StatusTypeDef HAL_HMACEx_MD5_Step1_2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); -HAL_StatusTypeDef HAL_HMACEx_MD5_Step2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); -HAL_StatusTypeDef HAL_HMACEx_MD5_Step2_3_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); - -HAL_StatusTypeDef HAL_HMACEx_SHA1_Step1_2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); -HAL_StatusTypeDef HAL_HMACEx_SHA1_Step2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); -HAL_StatusTypeDef HAL_HMACEx_SHA1_Step2_3_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); -HAL_StatusTypeDef HAL_HMACEx_SHA224_Step1_2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); -HAL_StatusTypeDef HAL_HMACEx_SHA224_Step2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); -HAL_StatusTypeDef HAL_HMACEx_SHA224_Step2_3_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); - -HAL_StatusTypeDef HAL_HMACEx_SHA256_Step1_2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); -HAL_StatusTypeDef HAL_HMACEx_SHA256_Step2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); -HAL_StatusTypeDef HAL_HMACEx_SHA256_Step2_3_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); +HAL_StatusTypeDef HAL_HMACEx_MD5_Step1_2_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); +HAL_StatusTypeDef HAL_HMACEx_MD5_Step2_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); +HAL_StatusTypeDef HAL_HMACEx_MD5_Step2_3_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); + +HAL_StatusTypeDef HAL_HMACEx_SHA1_Step1_2_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); +HAL_StatusTypeDef HAL_HMACEx_SHA1_Step2_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); +HAL_StatusTypeDef HAL_HMACEx_SHA1_Step2_3_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); +HAL_StatusTypeDef HAL_HMACEx_SHA224_Step1_2_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, + uint32_t Size); +HAL_StatusTypeDef HAL_HMACEx_SHA224_Step2_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); +HAL_StatusTypeDef HAL_HMACEx_SHA224_Step2_3_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, + uint32_t Size); + +HAL_StatusTypeDef HAL_HMACEx_SHA256_Step1_2_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, + uint32_t Size); +HAL_StatusTypeDef HAL_HMACEx_SHA256_Step2_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); +HAL_StatusTypeDef HAL_HMACEx_SHA256_Step2_3_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, + uint32_t Size); /** * @} */ diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2s.h b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2s.h index 7bc04272c6..525e3a44aa 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2s.h +++ b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2s.h @@ -462,8 +462,8 @@ void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s); * @{ */ /* Peripheral Control and State functions ************************************/ -HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s); -uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s); +HAL_I2S_StateTypeDef HAL_I2S_GetState(const I2S_HandleTypeDef *hi2s); +uint32_t HAL_I2S_GetError(const I2S_HandleTypeDef *hi2s); /** * @} */ diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h index a4dc28ef97..96a425d66e 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h +++ b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h @@ -592,7 +592,8 @@ HAL_StatusTypeDef HAL_LTDC_SetAlpha(LTDC_HandleTypeDef *hltdc, uint32_t Alpha, u HAL_StatusTypeDef HAL_LTDC_SetAddress(LTDC_HandleTypeDef *hltdc, uint32_t Address, uint32_t LayerIdx); HAL_StatusTypeDef HAL_LTDC_SetPitch(LTDC_HandleTypeDef *hltdc, uint32_t LinePitchInPixels, uint32_t LayerIdx); HAL_StatusTypeDef HAL_LTDC_ConfigColorKeying(LTDC_HandleTypeDef *hltdc, uint32_t RGBValue, uint32_t LayerIdx); -HAL_StatusTypeDef HAL_LTDC_ConfigCLUT(LTDC_HandleTypeDef *hltdc, uint32_t *pCLUT, uint32_t CLUTSize, uint32_t LayerIdx); +HAL_StatusTypeDef HAL_LTDC_ConfigCLUT(LTDC_HandleTypeDef *hltdc, const uint32_t *pCLUT, uint32_t CLUTSize, + uint32_t LayerIdx); HAL_StatusTypeDef HAL_LTDC_EnableColorKeying(LTDC_HandleTypeDef *hltdc, uint32_t LayerIdx); HAL_StatusTypeDef HAL_LTDC_DisableColorKeying(LTDC_HandleTypeDef *hltdc, uint32_t LayerIdx); HAL_StatusTypeDef HAL_LTDC_EnableCLUT(LTDC_HandleTypeDef *hltdc, uint32_t LayerIdx); @@ -625,8 +626,8 @@ HAL_StatusTypeDef HAL_LTDC_DisableCLUT_NoReload(LTDC_HandleTypeDef *hltdc, uint3 * @{ */ /* Peripheral State functions *************************************************/ -HAL_LTDC_StateTypeDef HAL_LTDC_GetState(LTDC_HandleTypeDef *hltdc); -uint32_t HAL_LTDC_GetError(LTDC_HandleTypeDef *hltdc); +HAL_LTDC_StateTypeDef HAL_LTDC_GetState(const LTDC_HandleTypeDef *hltdc); +uint32_t HAL_LTDC_GetError(const LTDC_HandleTypeDef *hltdc); /** * @} */ diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_nand.h b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_nand.h index 3a573eaef0..3079a2cbd9 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_nand.h +++ b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_nand.h @@ -193,7 +193,7 @@ HAL_StatusTypeDef HAL_NAND_Init(NAND_HandleTypeDef *hnand, FMC_NAND_PCC_TimingT FMC_NAND_PCC_TimingTypeDef *AttSpace_Timing); HAL_StatusTypeDef HAL_NAND_DeInit(NAND_HandleTypeDef *hnand); -HAL_StatusTypeDef HAL_NAND_ConfigDevice(NAND_HandleTypeDef *hnand, NAND_DeviceConfigTypeDef *pDeviceConfig); +HAL_StatusTypeDef HAL_NAND_ConfigDevice(NAND_HandleTypeDef *hnand, const NAND_DeviceConfigTypeDef *pDeviceConfig); HAL_StatusTypeDef HAL_NAND_Read_ID(NAND_HandleTypeDef *hnand, NAND_IDTypeDef *pNAND_ID); diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pcd_ex.h b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pcd_ex.h index 24f3d7341e..33bec1e074 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pcd_ex.h +++ b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pcd_ex.h @@ -45,7 +45,6 @@ extern "C" { /** @addtogroup PCDEx_Exported_Functions_Group1 Peripheral Control functions * @{ */ - #if defined (USB_OTG_FS) || defined (USB_OTG_HS) HAL_StatusTypeDef HAL_PCDEx_SetTxFiFo(PCD_HandleTypeDef *hpcd, uint8_t fifo, uint16_t size); HAL_StatusTypeDef HAL_PCDEx_SetRxFiFo(PCD_HandleTypeDef *hpcd, uint16_t size); diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h index 35503197de..afbd810d94 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h +++ b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h @@ -1133,8 +1133,8 @@ typedef struct */ /* Initialization and de-initialization functions ******************************/ HAL_StatusTypeDef HAL_RCC_DeInit(void); -HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct); -HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency); +HAL_StatusTypeDef HAL_RCC_OscConfig(const RCC_OscInitTypeDef *RCC_OscInitStruct); +HAL_StatusTypeDef HAL_RCC_ClockConfig(const RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency); /** * @} */ diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h index 22479b2166..2c6afaae61 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h +++ b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h @@ -262,7 +262,7 @@ typedef void (*pRTC_CallbackTypeDef)(RTC_HandleTypeDef *hrtc); /*!< pointer to * @{ */ #define RTC_OUTPUT_TYPE_OPENDRAIN 0x00000000U -#define RTC_OUTPUT_TYPE_PUSHPULL RTC_OR_ALARMTYPE +#define RTC_OUTPUT_TYPE_PUSHPULL RTC_OR_ALARMOUTTYPE /** * @} */ @@ -790,7 +790,7 @@ HAL_RTCStateTypeDef HAL_RTC_GetState(RTC_HandleTypeDef *hrtc); #define RTC_TIMEOUT_VALUE 1000U -#define RTC_EXTI_LINE_ALARM_EVENT EXTI_IMR_IM17 /*!< External interrupt line 17 Connected to the RTC Alarm event */ +#define RTC_EXTI_LINE_ALARM_EVENT EXTI_IMR_IM17 /*!< External interrupt line 17 connected to the RTC Alarm event */ /** * @} */ diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h index 427d06b4a2..51d8e1eb6c 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h +++ b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h @@ -60,7 +60,7 @@ typedef struct This parameter can be a value of @ref RTCEx_Tamper_EraseBackUp_Definitions */ uint32_t MaskFlag; /*!< Specifies the Tamper Flag masking. - This parameter can be a value of @ref RTCEx_Tamper_MaskFlag_Definitions */ + This parameter can be a value of @ref RTCEx_Tamper_MaskFlag_Definitions */ uint32_t Filter; /*!< Specifies the RTC Filter Tamper. This parameter can be a value of @ref RTCEx_Tamper_Filter_Definitions */ @@ -773,13 +773,13 @@ typedef struct * @brief Enable event on the RTC Tamper and Timestamp associated EXTI line. * @retval None. */ -#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_EVENT() (EXTI->EMR |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT) +#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_EVENT() (EXTI->EMR |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT) /** * @brief Disable event on the RTC Tamper and Timestamp associated EXTI line. * @retval None. */ -#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT) +#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT) /** * @brief Enable falling edge trigger on the RTC Tamper and Timestamp associated EXTI line. @@ -968,7 +968,7 @@ HAL_StatusTypeDef HAL_RTCEx_DisableBypassShadow(RTC_HandleTypeDef *hrtc); * @{ */ /* Extended RTC features functions *******************************************/ -void HAL_RTCEx_AlarmBEventCallback(RTC_HandleTypeDef *hrtc); +void HAL_RTCEx_AlarmBEventCallback(RTC_HandleTypeDef *hrtc); HAL_StatusTypeDef HAL_RTCEx_PollForAlarmBEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout); /** * @} diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h index dd5930fdc9..1a7eb445d0 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h +++ b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h @@ -211,7 +211,7 @@ uint32_t HAL_SDRAM_GetModeStatus(SDRAM_HandleTypeDef *hsdram); * @{ */ /* SDRAM State functions ********************************************************/ -HAL_SDRAM_StateTypeDef HAL_SDRAM_GetState(SDRAM_HandleTypeDef *hsdram); +HAL_SDRAM_StateTypeDef HAL_SDRAM_GetState(const SDRAM_HandleTypeDef *hsdram); /** * @} */ diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h index c97856fe74..6d062f0f67 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h +++ b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h @@ -118,7 +118,7 @@ typedef struct __SPI_HandleTypeDef SPI_InitTypeDef Init; /*!< SPI communication parameters */ - uint8_t *pTxBuffPtr; /*!< Pointer to SPI Tx transfer Buffer */ + const uint8_t *pTxBuffPtr; /*!< Pointer to SPI Tx transfer Buffer */ uint16_t TxXferSize; /*!< SPI Tx Transfer size */ @@ -426,11 +426,12 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to * @retval None */ #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) -#define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) do{ \ - (__HANDLE__)->State = HAL_SPI_STATE_RESET; \ - (__HANDLE__)->MspInitCallback = NULL; \ - (__HANDLE__)->MspDeInitCallback = NULL; \ - } while(0) +#define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) \ + do{ \ + (__HANDLE__)->State = HAL_SPI_STATE_RESET; \ + (__HANDLE__)->MspInitCallback = NULL; \ + (__HANDLE__)->MspDeInitCallback = NULL; \ + } while(0) #else #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET) #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ @@ -533,7 +534,7 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to __IO uint32_t tmpreg_fre = 0x00U; \ tmpreg_fre = (__HANDLE__)->Instance->SR; \ UNUSED(tmpreg_fre); \ - }while(0U) + } while(0U) /** @brief Enable the SPI peripheral. * @param __HANDLE__ specifies the SPI Handle. @@ -577,8 +578,11 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. * @retval None */ -#define SPI_RESET_CRC(__HANDLE__) do{CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);\ - SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);}while(0U) +#define SPI_RESET_CRC(__HANDLE__) \ + do{ \ + CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN); \ + SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN); \ + } while(0U) /** @brief Check whether the specified SPI flag is set or not. * @param __SR__ copy of SPI SR register. @@ -596,7 +600,7 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to * @retval SET or RESET. */ #define SPI_CHECK_FLAG(__SR__, __FLAG__) ((((__SR__) & ((__FLAG__) & SPI_FLAG_MASK)) == \ - ((__FLAG__) & SPI_FLAG_MASK)) ? SET : RESET) + ((__FLAG__) & SPI_FLAG_MASK)) ? SET : RESET) /** @brief Check whether the specified SPI Interrupt is set or not. * @param __CR2__ copy of SPI CR2 register. @@ -608,7 +612,7 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to * @retval SET or RESET. */ #define SPI_CHECK_IT_SOURCE(__CR2__, __INTERRUPT__) ((((__CR2__) & (__INTERRUPT__)) == \ - (__INTERRUPT__)) ? SET : RESET) + (__INTERRUPT__)) ? SET : RESET) /** @brief Checks if SPI Mode parameter is in allowed range. * @param __MODE__ specifies the SPI Mode. @@ -746,7 +750,7 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to */ #define IS_SPI_CRC_POLYNOMIAL(__POLYNOMIAL__) (((__POLYNOMIAL__) >= 0x1U) && \ ((__POLYNOMIAL__) <= 0xFFFFU) && \ - (((__POLYNOMIAL__)&0x1U) != 0U)) + (((__POLYNOMIAL__)&0x1U) != 0U)) /** @brief Checks if DMA handle is valid. * @param __HANDLE__ specifies a DMA Handle. @@ -789,17 +793,17 @@ HAL_StatusTypeDef HAL_SPI_UnRegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_Ca * @{ */ /* I/O operation functions ***************************************************/ -HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout); +HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, const uint8_t *pData, uint16_t Size, uint32_t Timeout); HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout); -HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, - uint32_t Timeout); -HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); +HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, const uint8_t *pTxData, uint8_t *pRxData, + uint16_t Size, uint32_t Timeout); +HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, const uint8_t *pData, uint16_t Size); HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, +HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, const uint8_t *pTxData, uint8_t *pRxData, uint16_t Size); -HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); +HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, const uint8_t *pData, uint16_t Size); HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, +HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, const uint8_t *pTxData, uint8_t *pRxData, uint16_t Size); HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi); HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi); @@ -825,8 +829,8 @@ void HAL_SPI_AbortCpltCallback(SPI_HandleTypeDef *hspi); * @{ */ /* Peripheral State and Error functions ***************************************/ -HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi); -uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi); +HAL_SPI_StateTypeDef HAL_SPI_GetState(const SPI_HandleTypeDef *hspi); +uint32_t HAL_SPI_GetError(const SPI_HandleTypeDef *hspi); /** * @} */ diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h index 2b13a3bf54..4899e43975 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h +++ b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h @@ -1729,7 +1729,8 @@ mode. */ /* The counter of a timer instance is disabled only if all the CCx and CCxN channels have been disabled */ -#define TIM_CCER_CCxE_MASK ((uint32_t)(TIM_CCER_CC1E | TIM_CCER_CC2E | TIM_CCER_CC3E | TIM_CCER_CC4E)) +#define TIM_CCER_CCxE_MASK ((uint32_t)(TIM_CCER_CC1E | TIM_CCER_CC2E | TIM_CCER_CC3E | TIM_CCER_CC4E | \ + TIM_CCER_CC5E | TIM_CCER_CC6E)) #define TIM_CCER_CCxNE_MASK ((uint32_t)(TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) /** * @} @@ -2095,20 +2096,21 @@ mode. ((__CHANNEL__) == TIM_CHANNEL_5) ? ((__HANDLE__)->ChannelState[4] = (__CHANNEL_STATE__)) :\ ((__HANDLE__)->ChannelState[5] = (__CHANNEL_STATE__))) -#define TIM_CHANNEL_STATE_SET_ALL(__HANDLE__, __CHANNEL_STATE__) do { \ - (__HANDLE__)->ChannelState[0] = \ - (__CHANNEL_STATE__); \ - (__HANDLE__)->ChannelState[1] = \ - (__CHANNEL_STATE__); \ - (__HANDLE__)->ChannelState[2] = \ - (__CHANNEL_STATE__); \ - (__HANDLE__)->ChannelState[3] = \ - (__CHANNEL_STATE__); \ - (__HANDLE__)->ChannelState[4] = \ - (__CHANNEL_STATE__); \ - (__HANDLE__)->ChannelState[5] = \ - (__CHANNEL_STATE__); \ - } while(0) +#define TIM_CHANNEL_STATE_SET_ALL(__HANDLE__, __CHANNEL_STATE__)\ + do {\ + (__HANDLE__)->ChannelState[0] = \ + (__CHANNEL_STATE__); \ + (__HANDLE__)->ChannelState[1] = \ + (__CHANNEL_STATE__); \ + (__HANDLE__)->ChannelState[2] = \ + (__CHANNEL_STATE__); \ + (__HANDLE__)->ChannelState[3] = \ + (__CHANNEL_STATE__); \ + (__HANDLE__)->ChannelState[4] = \ + (__CHANNEL_STATE__); \ + (__HANDLE__)->ChannelState[5] = \ + (__CHANNEL_STATE__); \ + } while(0) #define TIM_CHANNEL_N_STATE_GET(__HANDLE__, __CHANNEL__)\ (((__CHANNEL__) == TIM_CHANNEL_1) ? (__HANDLE__)->ChannelNState[0] :\ @@ -2122,16 +2124,17 @@ mode. ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->ChannelNState[2] = (__CHANNEL_STATE__)) :\ ((__HANDLE__)->ChannelNState[3] = (__CHANNEL_STATE__))) -#define TIM_CHANNEL_N_STATE_SET_ALL(__HANDLE__, __CHANNEL_STATE__) do { \ - (__HANDLE__)->ChannelNState[0] = \ - (__CHANNEL_STATE__); \ - (__HANDLE__)->ChannelNState[1] = \ - (__CHANNEL_STATE__); \ - (__HANDLE__)->ChannelNState[2] = \ - (__CHANNEL_STATE__); \ - (__HANDLE__)->ChannelNState[3] = \ - (__CHANNEL_STATE__); \ - } while(0) +#define TIM_CHANNEL_N_STATE_SET_ALL(__HANDLE__, __CHANNEL_STATE__)\ + do {\ + (__HANDLE__)->ChannelNState[0] = \ + (__CHANNEL_STATE__); \ + (__HANDLE__)->ChannelNState[1] = \ + (__CHANNEL_STATE__); \ + (__HANDLE__)->ChannelNState[2] = \ + (__CHANNEL_STATE__); \ + (__HANDLE__)->ChannelNState[3] = \ + (__CHANNEL_STATE__); \ + } while(0) /** * @} diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h index f32ca19491..e45f0a3c25 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h +++ b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h @@ -289,7 +289,11 @@ typedef enum HAL_UART_ABORT_COMPLETE_CB_ID = 0x05U, /*!< UART Abort Complete Callback ID */ HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID = 0x06U, /*!< UART Abort Transmit Complete Callback ID */ HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID = 0x07U, /*!< UART Abort Receive Complete Callback ID */ +#if defined(USART_CR1_UESM) +#if defined(USART_CR3_WUFIE) HAL_UART_WAKEUP_CB_ID = 0x08U, /*!< UART Wakeup Callback ID */ +#endif /* USART_CR3_WUFIE */ +#endif /* USART_CR1_UESM */ HAL_UART_MSPINIT_CB_ID = 0x0BU, /*!< UART MspInit callback ID */ HAL_UART_MSPDEINIT_CB_ID = 0x0CU /*!< UART MspDeInit callback ID */ diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h index 6bfd5af26b..65ee218bc1 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h +++ b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h @@ -113,8 +113,10 @@ HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, */ #if defined(USART_CR1_UESM) +#if defined(USART_CR3_WUFIE) void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart); +#endif /* USART_CR3_WUFIE */ #endif /* USART_CR1_UESM */ /** * @} diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_usart.h b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_usart.h index e0e8447c93..a8b049e480 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_usart.h +++ b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_usart.h @@ -454,7 +454,6 @@ typedef void (*pUSART_CallbackTypeDef)(USART_HandleTypeDef *husart); /*!< poin #define __HAL_USART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_IDLEF) - /** @brief Enable the specified USART interrupt. * @param __HANDLE__ specifies the USART Handle. * @param __INTERRUPT__ specifies the USART interrupt source to enable. diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_wwdg.h b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_wwdg.h index 6c5b408553..ecac25a1d3 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_wwdg.h +++ b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_wwdg.h @@ -183,7 +183,7 @@ typedef void (*pWWDG_CallbackTypeDef)(WWDG_HandleTypeDef *hppp); /*!< pointer t /** * @brief Enable the WWDG early wakeup interrupt. - * @param __HANDLE__ WWDG handle + * @param __HANDLE__ WWDG handle * @param __INTERRUPT__ specifies the interrupt to enable. * This parameter can be one of the following values: * @arg WWDG_IT_EWI: Early wakeup interrupt diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h index 2596be8932..55b89ddcdf 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h +++ b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h @@ -1632,7 +1632,7 @@ __STATIC_INLINE uint32_t LL_DMA_GetM2MDstAddress(DMA_TypeDef* DMAx, uint32_t Str */ __STATIC_INLINE void LL_DMA_SetMemory1Address(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Address) { - MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->M1AR, DMA_SxM1AR_M1A, Address); + WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->M1AR, Address); } /** diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma2d.h b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma2d.h index aa70980b7f..93d6b880f2 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma2d.h +++ b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma2d.h @@ -544,7 +544,7 @@ __STATIC_INLINE void LL_DMA2D_Start(DMA2D_TypeDef *DMA2Dx) * @param DMA2Dx DMA2D Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMA2D_IsTransferOngoing(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_IsTransferOngoing(const DMA2D_TypeDef *DMA2Dx) { return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_START) == (DMA2D_CR_START)) ? 1UL : 0UL); } @@ -581,7 +581,7 @@ __STATIC_INLINE void LL_DMA2D_Resume(DMA2D_TypeDef *DMA2Dx) * @param DMA2Dx DMA2D Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMA2D_IsSuspended(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_IsSuspended(const DMA2D_TypeDef *DMA2Dx) { return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_SUSP) == (DMA2D_CR_SUSP)) ? 1UL : 0UL); } @@ -606,7 +606,7 @@ __STATIC_INLINE void LL_DMA2D_Abort(DMA2D_TypeDef *DMA2Dx) * @param DMA2Dx DMA2D Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMA2D_IsAborted(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_IsAborted(const DMA2D_TypeDef *DMA2Dx) { return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_ABORT) == (DMA2D_CR_ABORT)) ? 1UL : 0UL); } @@ -637,7 +637,7 @@ __STATIC_INLINE void LL_DMA2D_SetMode(DMA2D_TypeDef *DMA2Dx, uint32_t Mode) * @arg @ref LL_DMA2D_MODE_M2M_BLEND * @arg @ref LL_DMA2D_MODE_R2M */ -__STATIC_INLINE uint32_t LL_DMA2D_GetMode(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_GetMode(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->CR, DMA2D_CR_MODE)); } @@ -670,7 +670,7 @@ __STATIC_INLINE void LL_DMA2D_SetOutputColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444 */ -__STATIC_INLINE uint32_t LL_DMA2D_GetOutputColorMode(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_GetOutputColorMode(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM)); } @@ -752,7 +752,7 @@ __STATIC_INLINE void LL_DMA2D_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t Line * @param DMA2Dx DMA2D Instance * @retval Line offset value between Min_Data=0 and Max_Data=0x3FFF */ -__STATIC_INLINE uint32_t LL_DMA2D_GetLineOffset(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_GetLineOffset(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->OOR, DMA2D_OOR_LO)); } @@ -775,7 +775,7 @@ __STATIC_INLINE void LL_DMA2D_SetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx, uint * @param DMA2Dx DMA2D Instance * @retval Number of pixels per lines value between Min_Data=0 and Max_Data=0x3FFF */ -__STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfPixelsPerLines(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_PL) >> DMA2D_NLR_PL_Pos); } @@ -798,7 +798,7 @@ __STATIC_INLINE void LL_DMA2D_SetNbrOfLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrO * @param DMA2Dx DMA2D Instance * @retval Number of lines value between Min_Data=0 and Max_Data=0xFFFF */ -__STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfLines(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfLines(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_NL)); } @@ -821,7 +821,7 @@ __STATIC_INLINE void LL_DMA2D_SetOutputMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t O * @param DMA2Dx DMA2D Instance * @retval Output memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF */ -__STATIC_INLINE uint32_t LL_DMA2D_GetOutputMemAddr(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_GetOutputMemAddr(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, OMAR)); } @@ -842,8 +842,7 @@ __STATIC_INLINE uint32_t LL_DMA2D_GetOutputMemAddr(DMA2D_TypeDef *DMA2Dx) */ __STATIC_INLINE void LL_DMA2D_SetOutputColor(DMA2D_TypeDef *DMA2Dx, uint32_t OutputColor) { - MODIFY_REG(DMA2Dx->OCOLR, (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1), \ - OutputColor); + WRITE_REG(DMA2Dx->OCOLR, OutputColor); } /** @@ -858,7 +857,7 @@ __STATIC_INLINE void LL_DMA2D_SetOutputColor(DMA2D_TypeDef *DMA2Dx, uint32_t Out * @param DMA2Dx DMA2D Instance * @retval Output color value between Min_Data=0 and Max_Data=0xFFFFFFFF */ -__STATIC_INLINE uint32_t LL_DMA2D_GetOutputColor(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_GetOutputColor(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->OCOLR, \ (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1))); @@ -882,7 +881,7 @@ __STATIC_INLINE void LL_DMA2D_SetLineWatermark(DMA2D_TypeDef *DMA2Dx, uint32_t L * @param DMA2Dx DMA2D Instance * @retval Line watermark value between Min_Data=0 and Max_Data=0xFFFF */ -__STATIC_INLINE uint32_t LL_DMA2D_GetLineWatermark(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_GetLineWatermark(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->LWR, DMA2D_LWR_LW)); } @@ -905,7 +904,7 @@ __STATIC_INLINE void LL_DMA2D_SetDeadTime(DMA2D_TypeDef *DMA2Dx, uint32_t DeadTi * @param DMA2Dx DMA2D Instance * @retval Dead time value between Min_Data=0 and Max_Data=0xFF */ -__STATIC_INLINE uint32_t LL_DMA2D_GetDeadTime(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_GetDeadTime(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_DT) >> DMA2D_AMTCR_DT_Pos); } @@ -938,7 +937,7 @@ __STATIC_INLINE void LL_DMA2D_DisableDeadTime(DMA2D_TypeDef *DMA2Dx) * @param DMA2Dx DMA2D Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledDeadTime(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledDeadTime(const DMA2D_TypeDef *DMA2Dx) { return ((READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN) == (DMA2D_AMTCR_EN)) ? 1UL : 0UL); } @@ -965,7 +964,7 @@ __STATIC_INLINE void LL_DMA2D_FGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t Me * @param DMA2Dx DMA2D Instance * @retval Foreground memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF */ -__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetMemAddr(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGMAR)); } @@ -987,7 +986,7 @@ __STATIC_INLINE void LL_DMA2D_FGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx) * @param DMA2Dx DMA2D Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMA2D_FGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_FGND_IsEnabledCLUTLoad(const DMA2D_TypeDef *DMA2Dx) { return ((READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START) == (DMA2D_FGPFCCR_START)) ? 1UL : 0UL); } @@ -1032,7 +1031,7 @@ __STATIC_INLINE void LL_DMA2D_FGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t * @arg @ref LL_DMA2D_INPUT_MODE_A8 * @arg @ref LL_DMA2D_INPUT_MODE_A4 */ -__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetColorMode(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetColorMode(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM)); } @@ -1061,7 +1060,7 @@ __STATIC_INLINE void LL_DMA2D_FGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE */ -__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlphaMode(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM)); } @@ -1084,7 +1083,7 @@ __STATIC_INLINE void LL_DMA2D_FGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alph * @param DMA2Dx DMA2D Instance * @retval Alpha value between Min_Data=0 and Max_Data=0xFF */ -__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlpha(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlpha(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA) >> DMA2D_FGPFCCR_ALPHA_Pos); } @@ -1164,7 +1163,7 @@ __STATIC_INLINE void LL_DMA2D_FGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t * @param DMA2Dx DMA2D Instance * @retval Foreground line offset value between Min_Data=0 and Max_Data=0x3FF */ -__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetLineOffset(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->FGOR, DMA2D_FGOR_LO)); } @@ -1204,7 +1203,7 @@ __STATIC_INLINE void LL_DMA2D_FGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t R * @param DMA2Dx DMA2D Instance * @retval Red color value between Min_Data=0 and Max_Data=0xFF */ -__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetRedColor(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetRedColor(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED) >> DMA2D_FGCOLR_RED_Pos); } @@ -1227,7 +1226,7 @@ __STATIC_INLINE void LL_DMA2D_FGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t * @param DMA2Dx DMA2D Instance * @retval Green color value between Min_Data=0 and Max_Data=0xFF */ -__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetGreenColor(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN) >> DMA2D_FGCOLR_GREEN_Pos); } @@ -1250,7 +1249,7 @@ __STATIC_INLINE void LL_DMA2D_FGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t * @param DMA2Dx DMA2D Instance * @retval Blue color value between Min_Data=0 and Max_Data=0xFF */ -__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetBlueColor(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE)); } @@ -1273,7 +1272,7 @@ __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_ * @param DMA2Dx DMA2D Instance * @retval Foreground CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF */ -__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTMemAddr(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGCMAR)); } @@ -1296,7 +1295,7 @@ __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t C * @param DMA2Dx DMA2D Instance * @retval Foreground CLUT size value between Min_Data=0 and Max_Data=0xFF */ -__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTSize(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS) >> DMA2D_FGPFCCR_CS_Pos); } @@ -1323,7 +1322,7 @@ __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint3 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888 */ -__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTColorMode(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM)); } @@ -1354,7 +1353,7 @@ __STATIC_INLINE void LL_DMA2D_BGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t Me * @param DMA2Dx DMA2D Instance * @retval Background memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF */ -__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetMemAddr(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGMAR)); } @@ -1376,7 +1375,7 @@ __STATIC_INLINE void LL_DMA2D_BGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx) * @param DMA2Dx DMA2D Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMA2D_BGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_BGND_IsEnabledCLUTLoad(const DMA2D_TypeDef *DMA2Dx) { return ((READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START) == (DMA2D_BGPFCCR_START)) ? 1UL : 0UL); } @@ -1421,7 +1420,7 @@ __STATIC_INLINE void LL_DMA2D_BGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t * @arg @ref LL_DMA2D_INPUT_MODE_A8 * @arg @ref LL_DMA2D_INPUT_MODE_A4 */ -__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetColorMode(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetColorMode(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM)); } @@ -1450,7 +1449,7 @@ __STATIC_INLINE void LL_DMA2D_BGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE */ -__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlphaMode(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM)); } @@ -1473,7 +1472,7 @@ __STATIC_INLINE void LL_DMA2D_BGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alph * @param DMA2Dx DMA2D Instance * @retval Alpha value between Min_Data=0 and Max_Data=0xFF */ -__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlpha(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlpha(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA) >> DMA2D_BGPFCCR_ALPHA_Pos); } @@ -1553,7 +1552,7 @@ __STATIC_INLINE void LL_DMA2D_BGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t * @param DMA2Dx DMA2D Instance * @retval Background line offset value between Min_Data=0 and Max_Data=0x3FF */ -__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetLineOffset(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->BGOR, DMA2D_BGOR_LO)); } @@ -1593,7 +1592,7 @@ __STATIC_INLINE void LL_DMA2D_BGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t R * @param DMA2Dx DMA2D Instance * @retval Red color value between Min_Data=0 and Max_Data=0xFF */ -__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetRedColor(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetRedColor(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED) >> DMA2D_BGCOLR_RED_Pos); } @@ -1616,7 +1615,7 @@ __STATIC_INLINE void LL_DMA2D_BGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t * @param DMA2Dx DMA2D Instance * @retval Green color value between Min_Data=0 and Max_Data=0xFF */ -__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetGreenColor(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN) >> DMA2D_BGCOLR_GREEN_Pos); } @@ -1639,7 +1638,7 @@ __STATIC_INLINE void LL_DMA2D_BGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t * @param DMA2Dx DMA2D Instance * @retval Blue color value between Min_Data=0 and Max_Data=0xFF */ -__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetBlueColor(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE)); } @@ -1662,7 +1661,7 @@ __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_ * @param DMA2Dx DMA2D Instance * @retval Background CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF */ -__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTMemAddr(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGCMAR)); } @@ -1685,7 +1684,7 @@ __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t C * @param DMA2Dx DMA2D Instance * @retval Background CLUT size value between Min_Data=0 and Max_Data=0xFF */ -__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTSize(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS) >> DMA2D_BGPFCCR_CS_Pos); } @@ -1712,7 +1711,7 @@ __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint3 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888 */ -__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTColorMode(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM)); } @@ -1736,7 +1735,7 @@ __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx) * @param DMA2Dx DMA2D Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CE(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CE(const DMA2D_TypeDef *DMA2Dx) { return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CEIF) == (DMA2D_ISR_CEIF)) ? 1UL : 0UL); } @@ -1747,7 +1746,7 @@ __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CE(DMA2D_TypeDef *DMA2Dx) * @param DMA2Dx DMA2D Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CTC(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CTC(const DMA2D_TypeDef *DMA2Dx) { return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CTCIF) == (DMA2D_ISR_CTCIF)) ? 1UL : 0UL); } @@ -1758,7 +1757,7 @@ __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CTC(DMA2D_TypeDef *DMA2Dx) * @param DMA2Dx DMA2D Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CAE(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CAE(const DMA2D_TypeDef *DMA2Dx) { return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CAEIF) == (DMA2D_ISR_CAEIF)) ? 1UL : 0UL); } @@ -1769,7 +1768,7 @@ __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CAE(DMA2D_TypeDef *DMA2Dx) * @param DMA2Dx DMA2D Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TW(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TW(const DMA2D_TypeDef *DMA2Dx) { return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TWIF) == (DMA2D_ISR_TWIF)) ? 1UL : 0UL); } @@ -1780,7 +1779,7 @@ __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TW(DMA2D_TypeDef *DMA2Dx) * @param DMA2Dx DMA2D Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TC(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TC(const DMA2D_TypeDef *DMA2Dx) { return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TCIF) == (DMA2D_ISR_TCIF)) ? 1UL : 0UL); } @@ -1791,7 +1790,7 @@ __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TC(DMA2D_TypeDef *DMA2Dx) * @param DMA2Dx DMA2D Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TE(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TE(const DMA2D_TypeDef *DMA2Dx) { return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TEIF) == (DMA2D_ISR_TEIF)) ? 1UL : 0UL); } @@ -2008,7 +2007,7 @@ __STATIC_INLINE void LL_DMA2D_DisableIT_TE(DMA2D_TypeDef *DMA2Dx) * @param DMA2Dx DMA2D Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CE(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CE(const DMA2D_TypeDef *DMA2Dx) { return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CEIE) == (DMA2D_CR_CEIE)) ? 1UL : 0UL); } @@ -2019,7 +2018,7 @@ __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CE(DMA2D_TypeDef *DMA2Dx) * @param DMA2Dx DMA2D Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CTC(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CTC(const DMA2D_TypeDef *DMA2Dx) { return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE) == (DMA2D_CR_CTCIE)) ? 1UL : 0UL); } @@ -2030,7 +2029,7 @@ __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CTC(DMA2D_TypeDef *DMA2Dx) * @param DMA2Dx DMA2D Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CAE(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CAE(const DMA2D_TypeDef *DMA2Dx) { return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE) == (DMA2D_CR_CAEIE)) ? 1UL : 0UL); } @@ -2041,7 +2040,7 @@ __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CAE(DMA2D_TypeDef *DMA2Dx) * @param DMA2Dx DMA2D Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TW(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TW(const DMA2D_TypeDef *DMA2Dx) { return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TWIE) == (DMA2D_CR_TWIE)) ? 1UL : 0UL); } @@ -2052,7 +2051,7 @@ __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TW(DMA2D_TypeDef *DMA2Dx) * @param DMA2Dx DMA2D Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TC(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TC(const DMA2D_TypeDef *DMA2Dx) { return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TCIE) == (DMA2D_CR_TCIE)) ? 1UL : 0UL); } @@ -2063,7 +2062,7 @@ __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TC(DMA2D_TypeDef *DMA2Dx) * @param DMA2Dx DMA2D Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TE(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TE(const DMA2D_TypeDef *DMA2Dx) { return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TEIE) == (DMA2D_CR_TEIE)) ? 1UL : 0UL); } @@ -2079,16 +2078,16 @@ __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TE(DMA2D_TypeDef *DMA2Dx) * @{ */ -ErrorStatus LL_DMA2D_DeInit(DMA2D_TypeDef *DMA2Dx); +ErrorStatus LL_DMA2D_DeInit(const DMA2D_TypeDef *DMA2Dx); ErrorStatus LL_DMA2D_Init(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_InitTypeDef *DMA2D_InitStruct); void LL_DMA2D_StructInit(LL_DMA2D_InitTypeDef *DMA2D_InitStruct); void LL_DMA2D_ConfigLayer(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg, uint32_t LayerIdx); void LL_DMA2D_LayerCfgStructInit(LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg); void LL_DMA2D_ConfigOutputColor(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_ColorTypeDef *DMA2D_ColorStruct); -uint32_t LL_DMA2D_GetOutputBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode); -uint32_t LL_DMA2D_GetOutputGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode); -uint32_t LL_DMA2D_GetOutputRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode); -uint32_t LL_DMA2D_GetOutputAlphaColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode); +uint32_t LL_DMA2D_GetOutputBlueColor(const DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode); +uint32_t LL_DMA2D_GetOutputGreenColor(const DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode); +uint32_t LL_DMA2D_GetOutputRedColor(const DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode); +uint32_t LL_DMA2D_GetOutputAlphaColor(const DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode); void LL_DMA2D_ConfigSize(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines, uint32_t NbrOfPixelsPerLines); /** diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h index 58f48b2a89..7e1dbe6f4f 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h +++ b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h @@ -190,61 +190,62 @@ extern "C" { typedef struct { uint32_t NSBank; /*!< Specifies the NORSRAM memory device that will be used. - This parameter can be a value of @ref FMC_NORSRAM_Bank */ + This parameter can be a value of @ref FMC_NORSRAM_Bank */ uint32_t DataAddressMux; /*!< Specifies whether the address and data values are multiplexed on the data bus or not. - This parameter can be a value of @ref FMC_Data_Address_Bus_Multiplexing */ + This parameter can be a value of @ref FMC_Data_Address_Bus_Multiplexing*/ uint32_t MemoryType; /*!< Specifies the type of external memory attached to the corresponding memory device. - This parameter can be a value of @ref FMC_Memory_Type */ + This parameter can be a value of @ref FMC_Memory_Type */ uint32_t MemoryDataWidth; /*!< Specifies the external memory device width. - This parameter can be a value of @ref FMC_NORSRAM_Data_Width */ + This parameter can be a value of @ref FMC_NORSRAM_Data_Width */ uint32_t BurstAccessMode; /*!< Enables or disables the burst access mode for Flash memory, valid only with synchronous burst Flash memories. - This parameter can be a value of @ref FMC_Burst_Access_Mode */ + This parameter can be a value of @ref FMC_Burst_Access_Mode */ uint32_t WaitSignalPolarity; /*!< Specifies the wait signal polarity, valid only when accessing the Flash memory in burst mode. - This parameter can be a value of @ref FMC_Wait_Signal_Polarity */ + This parameter can be a value of @ref FMC_Wait_Signal_Polarity */ uint32_t WaitSignalActive; /*!< Specifies if the wait signal is asserted by the memory one clock cycle before the wait state or during the wait state, valid only when accessing memories in burst mode. - This parameter can be a value of @ref FMC_Wait_Timing */ + This parameter can be a value of @ref FMC_Wait_Timing */ - uint32_t WriteOperation; /*!< Enables or disables the write operation in the selected device by the FMC. - This parameter can be a value of @ref FMC_Write_Operation */ + uint32_t WriteOperation; /*!< Enables or disables the write operation in the selected device + by the FMC. + This parameter can be a value of @ref FMC_Write_Operation */ uint32_t WaitSignal; /*!< Enables or disables the wait state insertion via wait signal, valid for Flash memory access in burst mode. - This parameter can be a value of @ref FMC_Wait_Signal */ + This parameter can be a value of @ref FMC_Wait_Signal */ uint32_t ExtendedMode; /*!< Enables or disables the extended mode. - This parameter can be a value of @ref FMC_Extended_Mode */ + This parameter can be a value of @ref FMC_Extended_Mode */ uint32_t AsynchronousWait; /*!< Enables or disables wait signal during asynchronous transfers, valid only with asynchronous Flash memories. - This parameter can be a value of @ref FMC_AsynchronousWait */ + This parameter can be a value of @ref FMC_AsynchronousWait */ uint32_t WriteBurst; /*!< Enables or disables the write burst operation. - This parameter can be a value of @ref FMC_Write_Burst */ + This parameter can be a value of @ref FMC_Write_Burst */ uint32_t ContinuousClock; /*!< Enables or disables the FMC clock output to external memory devices. This parameter is only enabled through the FMC_BCR1 register, and don't care through FMC_BCR2..4 registers. - This parameter can be a value of @ref FMC_Continous_Clock */ + This parameter can be a value of @ref FMC_Continous_Clock */ uint32_t WriteFifo; /*!< Enables or disables the write FIFO used by the FMC controller. This parameter is only enabled through the FMC_BCR1 register, and don't care through FMC_BCR2..4 registers. - This parameter can be a value of @ref FMC_Write_FIFO */ + This parameter can be a value of @ref FMC_Write_FIFO */ uint32_t PageSize; /*!< Specifies the memory page size. - This parameter can be a value of @ref FMC_Page_Size */ + This parameter can be a value of @ref FMC_Page_Size */ } FMC_NORSRAM_InitTypeDef; /** @@ -288,7 +289,7 @@ typedef struct in NOR Flash memories with synchronous burst mode enable */ uint32_t AccessMode; /*!< Specifies the asynchronous access mode. - This parameter can be a value of @ref FMC_Access_Mode */ + This parameter can be a value of @ref FMC_Access_Mode */ } FMC_NORSRAM_TimingTypeDef; /** @@ -1045,11 +1046,11 @@ typedef struct * @{ */ HAL_StatusTypeDef FMC_NORSRAM_Init(FMC_NORSRAM_TypeDef *Device, - FMC_NORSRAM_InitTypeDef *Init); + const FMC_NORSRAM_InitTypeDef *Init); HAL_StatusTypeDef FMC_NORSRAM_Timing_Init(FMC_NORSRAM_TypeDef *Device, - FMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank); + const FMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank); HAL_StatusTypeDef FMC_NORSRAM_Extended_Timing_Init(FMC_NORSRAM_EXTENDED_TypeDef *Device, - FMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank, + const FMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank, uint32_t ExtendedMode); HAL_StatusTypeDef FMC_NORSRAM_DeInit(FMC_NORSRAM_TypeDef *Device, FMC_NORSRAM_EXTENDED_TypeDef *ExDevice, uint32_t Bank); @@ -1075,11 +1076,11 @@ HAL_StatusTypeDef FMC_NORSRAM_WriteOperation_Disable(FMC_NORSRAM_TypeDef *Devic /** @defgroup FMC_LL_NAND_Private_Functions_Group1 NAND Initialization/de-initialization functions * @{ */ -HAL_StatusTypeDef FMC_NAND_Init(FMC_NAND_TypeDef *Device, FMC_NAND_InitTypeDef *Init); +HAL_StatusTypeDef FMC_NAND_Init(FMC_NAND_TypeDef *Device, const FMC_NAND_InitTypeDef *Init); HAL_StatusTypeDef FMC_NAND_CommonSpace_Timing_Init(FMC_NAND_TypeDef *Device, - FMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank); + const FMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank); HAL_StatusTypeDef FMC_NAND_AttributeSpace_Timing_Init(FMC_NAND_TypeDef *Device, - FMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank); + const FMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank); HAL_StatusTypeDef FMC_NAND_DeInit(FMC_NAND_TypeDef *Device, uint32_t Bank); /** * @} @@ -1090,7 +1091,7 @@ HAL_StatusTypeDef FMC_NAND_DeInit(FMC_NAND_TypeDef *Device, uint32_t Bank); */ HAL_StatusTypeDef FMC_NAND_ECC_Enable(FMC_NAND_TypeDef *Device, uint32_t Bank); HAL_StatusTypeDef FMC_NAND_ECC_Disable(FMC_NAND_TypeDef *Device, uint32_t Bank); -HAL_StatusTypeDef FMC_NAND_GetECC(FMC_NAND_TypeDef *Device, uint32_t *ECCval, uint32_t Bank, +HAL_StatusTypeDef FMC_NAND_GetECC(const FMC_NAND_TypeDef *Device, uint32_t *ECCval, uint32_t Bank, uint32_t Timeout); /** * @} @@ -1106,9 +1107,9 @@ HAL_StatusTypeDef FMC_NAND_GetECC(FMC_NAND_TypeDef *Device, uint32_t *ECCval, u /** @defgroup FMC_LL_SDRAM_Private_Functions_Group1 SDRAM Initialization/de-initialization functions * @{ */ -HAL_StatusTypeDef FMC_SDRAM_Init(FMC_SDRAM_TypeDef *Device, FMC_SDRAM_InitTypeDef *Init); +HAL_StatusTypeDef FMC_SDRAM_Init(FMC_SDRAM_TypeDef *Device, const FMC_SDRAM_InitTypeDef *Init); HAL_StatusTypeDef FMC_SDRAM_Timing_Init(FMC_SDRAM_TypeDef *Device, - FMC_SDRAM_TimingTypeDef *Timing, uint32_t Bank); + const FMC_SDRAM_TimingTypeDef *Timing, uint32_t Bank); HAL_StatusTypeDef FMC_SDRAM_DeInit(FMC_SDRAM_TypeDef *Device, uint32_t Bank); /** * @} @@ -1120,7 +1121,7 @@ HAL_StatusTypeDef FMC_SDRAM_DeInit(FMC_SDRAM_TypeDef *Device, uint32_t Bank); HAL_StatusTypeDef FMC_SDRAM_WriteProtection_Enable(FMC_SDRAM_TypeDef *Device, uint32_t Bank); HAL_StatusTypeDef FMC_SDRAM_WriteProtection_Disable(FMC_SDRAM_TypeDef *Device, uint32_t Bank); HAL_StatusTypeDef FMC_SDRAM_SendCommand(FMC_SDRAM_TypeDef *Device, - FMC_SDRAM_CommandTypeDef *Command, uint32_t Timeout); + const FMC_SDRAM_CommandTypeDef *Command, uint32_t Timeout); HAL_StatusTypeDef FMC_SDRAM_ProgramRefreshRate(FMC_SDRAM_TypeDef *Device, uint32_t RefreshRate); HAL_StatusTypeDef FMC_SDRAM_SetAutoRefreshNumber(FMC_SDRAM_TypeDef *Device, uint32_t AutoRefreshNumber); diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_iwdg.h b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_iwdg.h index 61b73a45ab..2902d54876 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_iwdg.h +++ b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_iwdg.h @@ -208,7 +208,7 @@ __STATIC_INLINE void LL_IWDG_SetPrescaler(IWDG_TypeDef *IWDGx, uint32_t Prescale * @arg @ref LL_IWDG_PRESCALER_128 * @arg @ref LL_IWDG_PRESCALER_256 */ -__STATIC_INLINE uint32_t LL_IWDG_GetPrescaler(IWDG_TypeDef *IWDGx) +__STATIC_INLINE uint32_t LL_IWDG_GetPrescaler(const IWDG_TypeDef *IWDGx) { return (READ_REG(IWDGx->PR)); } @@ -231,7 +231,7 @@ __STATIC_INLINE void LL_IWDG_SetReloadCounter(IWDG_TypeDef *IWDGx, uint32_t Coun * @param IWDGx IWDG Instance * @retval Value between Min_Data=0 and Max_Data=0x0FFF */ -__STATIC_INLINE uint32_t LL_IWDG_GetReloadCounter(IWDG_TypeDef *IWDGx) +__STATIC_INLINE uint32_t LL_IWDG_GetReloadCounter(const IWDG_TypeDef *IWDGx) { return (READ_REG(IWDGx->RLR)); } @@ -254,7 +254,7 @@ __STATIC_INLINE void LL_IWDG_SetWindow(IWDG_TypeDef *IWDGx, uint32_t Window) * @param IWDGx IWDG Instance * @retval Value between Min_Data=0 and Max_Data=0x0FFF */ -__STATIC_INLINE uint32_t LL_IWDG_GetWindow(IWDG_TypeDef *IWDGx) +__STATIC_INLINE uint32_t LL_IWDG_GetWindow(const IWDG_TypeDef *IWDGx) { return (READ_REG(IWDGx->WINR)); } @@ -273,7 +273,7 @@ __STATIC_INLINE uint32_t LL_IWDG_GetWindow(IWDG_TypeDef *IWDGx) * @param IWDGx IWDG Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_PVU(IWDG_TypeDef *IWDGx) +__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_PVU(const IWDG_TypeDef *IWDGx) { return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU) == (IWDG_SR_PVU)) ? 1UL : 0UL); } @@ -284,7 +284,7 @@ __STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_PVU(IWDG_TypeDef *IWDGx) * @param IWDGx IWDG Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_RVU(IWDG_TypeDef *IWDGx) +__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_RVU(const IWDG_TypeDef *IWDGx) { return ((READ_BIT(IWDGx->SR, IWDG_SR_RVU) == (IWDG_SR_RVU)) ? 1UL : 0UL); } @@ -295,7 +295,7 @@ __STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_RVU(IWDG_TypeDef *IWDGx) * @param IWDGx IWDG Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_WVU(IWDG_TypeDef *IWDGx) +__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_WVU(const IWDG_TypeDef *IWDGx) { return ((READ_BIT(IWDGx->SR, IWDG_SR_WVU) == (IWDG_SR_WVU)) ? 1UL : 0UL); } @@ -308,7 +308,7 @@ __STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_WVU(IWDG_TypeDef *IWDGx) * @param IWDGx IWDG Instance * @retval State of bits (1 or 0). */ -__STATIC_INLINE uint32_t LL_IWDG_IsReady(IWDG_TypeDef *IWDGx) +__STATIC_INLINE uint32_t LL_IWDG_IsReady(const IWDG_TypeDef *IWDGx) { return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU | IWDG_SR_WVU) == 0U) ? 1UL : 0UL); } diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h index 18e66301c7..8206a839af 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h +++ b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h @@ -42,9 +42,9 @@ extern "C" { * @{ */ -#if defined(RCC_DCKCFGR1_PLLSAIDIVR) +#if defined(LTDC) static const uint8_t aRCC_PLLSAIDIVRPrescTable[4] = {2, 4, 8, 16}; -#endif /* RCC_DCKCFGR1_PLLSAIDIVR */ +#endif /* LTDC */ /** * @} diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rtc.h b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rtc.h index d84c466115..8266750bab 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rtc.h +++ b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rtc.h @@ -407,8 +407,8 @@ typedef struct /** @defgroup RTC_LL_EC_TIMESTAMP_EDGE TIMESTAMP EDGE * @{ */ -#define LL_RTC_TIMESTAMP_EDGE_RISING 0x00000000U /*!< RTC_TS input rising edge generates a time-stamp event */ -#define LL_RTC_TIMESTAMP_EDGE_FALLING RTC_CR_TSEDGE /*!< RTC_TS input falling edge generates a time-stamp even */ +#define LL_RTC_TIMESTAMP_EDGE_RISING 0x00000000U /*!< RTC_TS input rising edge generates a time-stamp event */ +#define LL_RTC_TIMESTAMP_EDGE_FALLING RTC_CR_TSEDGE /*!< RTC_TS input falling edge generates a time-stamp event */ /** * @} */ diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_sdmmc.h b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_sdmmc.h index 59beb9f186..cdb1fa81ad 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_sdmmc.h +++ b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_sdmmc.h @@ -300,10 +300,14 @@ typedef struct #define SDMMC_SINGLE_BUS_SUPPORT 0x00010000U #define SDMMC_CARD_LOCKED 0x02000000U -#ifndef SDMMC_DATATIMEOUT -#define SDMMC_DATATIMEOUT 0xFFFFFFFFU +#ifndef SDMMC_DATATIMEOUT /*Hardware Data Timeout (ms) */ +#define SDMMC_DATATIMEOUT ((uint32_t)0xFFFFFFFFU) #endif /* SDMMC_DATATIMEOUT */ +#ifndef SDMMC_SWDATATIMEOUT /*Software Data Timeout (ms) */ +#define SDMMC_SWDATATIMEOUT SDMMC_DATATIMEOUT +#endif /* SDMMC_SWDATATIMEOUT */ + #define SDMMC_0TO7BITS 0x000000FFU #define SDMMC_8TO15BITS 0x0000FF00U #define SDMMC_16TO23BITS 0x00FF0000U diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h index 09cc3e5daa..f5f24a70a4 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h +++ b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h @@ -55,53 +55,66 @@ typedef struct uint32_t TransferDirection; /*!< Specifies the SPI unidirectional or bidirectional data mode. This parameter can be a value of @ref SPI_LL_EC_TRANSFER_MODE. - This feature can be modified afterwards using unitary function @ref LL_SPI_SetTransferDirection().*/ + This feature can be modified afterwards using unitary + function @ref LL_SPI_SetTransferDirection().*/ uint32_t Mode; /*!< Specifies the SPI mode (Master/Slave). This parameter can be a value of @ref SPI_LL_EC_MODE. - This feature can be modified afterwards using unitary function @ref LL_SPI_SetMode().*/ + This feature can be modified afterwards using unitary + function @ref LL_SPI_SetMode().*/ uint32_t DataWidth; /*!< Specifies the SPI data width. This parameter can be a value of @ref SPI_LL_EC_DATAWIDTH. - This feature can be modified afterwards using unitary function @ref LL_SPI_SetDataWidth().*/ + This feature can be modified afterwards using unitary + function @ref LL_SPI_SetDataWidth().*/ uint32_t ClockPolarity; /*!< Specifies the serial clock steady state. This parameter can be a value of @ref SPI_LL_EC_POLARITY. - This feature can be modified afterwards using unitary function @ref LL_SPI_SetClockPolarity().*/ + This feature can be modified afterwards using unitary + function @ref LL_SPI_SetClockPolarity().*/ uint32_t ClockPhase; /*!< Specifies the clock active edge for the bit capture. This parameter can be a value of @ref SPI_LL_EC_PHASE. - This feature can be modified afterwards using unitary function @ref LL_SPI_SetClockPhase().*/ + This feature can be modified afterwards using unitary + function @ref LL_SPI_SetClockPhase().*/ - uint32_t NSS; /*!< Specifies whether the NSS signal is managed by hardware (NSS pin) or by software using the SSI bit. + uint32_t NSS; /*!< Specifies whether the NSS signal is managed by hardware (NSS pin) + or by software using the SSI bit. This parameter can be a value of @ref SPI_LL_EC_NSS_MODE. - This feature can be modified afterwards using unitary function @ref LL_SPI_SetNSSMode().*/ + This feature can be modified afterwards using unitary + function @ref LL_SPI_SetNSSMode().*/ - uint32_t BaudRate; /*!< Specifies the BaudRate prescaler value which will be used to configure the transmit and receive SCK clock. + uint32_t BaudRate; /*!< Specifies the BaudRate prescaler value which will be used + to configure the transmit and receive SCK clock. This parameter can be a value of @ref SPI_LL_EC_BAUDRATEPRESCALER. - @note The communication clock is derived from the master clock. The slave clock does not need to be set. + @note The communication clock is derived from the master clock. + The slave clock does not need to be set. - This feature can be modified afterwards using unitary function @ref LL_SPI_SetBaudRatePrescaler().*/ + This feature can be modified afterwards using unitary + function @ref LL_SPI_SetBaudRatePrescaler().*/ uint32_t BitOrder; /*!< Specifies whether data transfers start from MSB or LSB bit. This parameter can be a value of @ref SPI_LL_EC_BIT_ORDER. - This feature can be modified afterwards using unitary function @ref LL_SPI_SetTransferBitOrder().*/ + This feature can be modified afterwards using unitary + function @ref LL_SPI_SetTransferBitOrder().*/ uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not. This parameter can be a value of @ref SPI_LL_EC_CRC_CALCULATION. - This feature can be modified afterwards using unitary functions @ref LL_SPI_EnableCRC() and @ref LL_SPI_DisableCRC().*/ + This feature can be modified afterwards using unitary + functions @ref LL_SPI_EnableCRC() and @ref LL_SPI_DisableCRC().*/ uint32_t CRCPoly; /*!< Specifies the polynomial used for the CRC calculation. This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFFFF. - This feature can be modified afterwards using unitary function @ref LL_SPI_SetCRCPolynomial().*/ + This feature can be modified afterwards using unitary + function @ref LL_SPI_SetCRCPolynomial().*/ } LL_SPI_InitTypeDef; @@ -378,7 +391,7 @@ __STATIC_INLINE void LL_SPI_Disable(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_SPI_IsEnabled(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_IsEnabled(const SPI_TypeDef *SPIx) { return ((READ_BIT(SPIx->CR1, SPI_CR1_SPE) == (SPI_CR1_SPE)) ? 1UL : 0UL); } @@ -408,7 +421,7 @@ __STATIC_INLINE void LL_SPI_SetMode(SPI_TypeDef *SPIx, uint32_t Mode) * @arg @ref LL_SPI_MODE_MASTER * @arg @ref LL_SPI_MODE_SLAVE */ -__STATIC_INLINE uint32_t LL_SPI_GetMode(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_GetMode(const SPI_TypeDef *SPIx) { return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_MSTR | SPI_CR1_SSI)); } @@ -436,7 +449,7 @@ __STATIC_INLINE void LL_SPI_SetStandard(SPI_TypeDef *SPIx, uint32_t Standard) * @arg @ref LL_SPI_PROTOCOL_MOTOROLA * @arg @ref LL_SPI_PROTOCOL_TI */ -__STATIC_INLINE uint32_t LL_SPI_GetStandard(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_GetStandard(const SPI_TypeDef *SPIx) { return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_FRF)); } @@ -465,7 +478,7 @@ __STATIC_INLINE void LL_SPI_SetClockPhase(SPI_TypeDef *SPIx, uint32_t ClockPhase * @arg @ref LL_SPI_PHASE_1EDGE * @arg @ref LL_SPI_PHASE_2EDGE */ -__STATIC_INLINE uint32_t LL_SPI_GetClockPhase(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_GetClockPhase(const SPI_TypeDef *SPIx) { return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_CPHA)); } @@ -494,7 +507,7 @@ __STATIC_INLINE void LL_SPI_SetClockPolarity(SPI_TypeDef *SPIx, uint32_t ClockPo * @arg @ref LL_SPI_POLARITY_LOW * @arg @ref LL_SPI_POLARITY_HIGH */ -__STATIC_INLINE uint32_t LL_SPI_GetClockPolarity(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_GetClockPolarity(const SPI_TypeDef *SPIx) { return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_CPOL)); } @@ -534,7 +547,7 @@ __STATIC_INLINE void LL_SPI_SetBaudRatePrescaler(SPI_TypeDef *SPIx, uint32_t Bau * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV128 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV256 */ -__STATIC_INLINE uint32_t LL_SPI_GetBaudRatePrescaler(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_GetBaudRatePrescaler(const SPI_TypeDef *SPIx) { return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_BR)); } @@ -562,7 +575,7 @@ __STATIC_INLINE void LL_SPI_SetTransferBitOrder(SPI_TypeDef *SPIx, uint32_t BitO * @arg @ref LL_SPI_LSB_FIRST * @arg @ref LL_SPI_MSB_FIRST */ -__STATIC_INLINE uint32_t LL_SPI_GetTransferBitOrder(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_GetTransferBitOrder(const SPI_TypeDef *SPIx) { return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_LSBFIRST)); } @@ -599,7 +612,7 @@ __STATIC_INLINE void LL_SPI_SetTransferDirection(SPI_TypeDef *SPIx, uint32_t Tra * @arg @ref LL_SPI_HALF_DUPLEX_RX * @arg @ref LL_SPI_HALF_DUPLEX_TX */ -__STATIC_INLINE uint32_t LL_SPI_GetTransferDirection(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_GetTransferDirection(const SPI_TypeDef *SPIx) { return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_RXONLY | SPI_CR1_BIDIMODE | SPI_CR1_BIDIOE)); } @@ -648,7 +661,7 @@ __STATIC_INLINE void LL_SPI_SetDataWidth(SPI_TypeDef *SPIx, uint32_t DataWidth) * @arg @ref LL_SPI_DATAWIDTH_15BIT * @arg @ref LL_SPI_DATAWIDTH_16BIT */ -__STATIC_INLINE uint32_t LL_SPI_GetDataWidth(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_GetDataWidth(const SPI_TypeDef *SPIx) { return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_DS)); } @@ -675,7 +688,7 @@ __STATIC_INLINE void LL_SPI_SetRxFIFOThreshold(SPI_TypeDef *SPIx, uint32_t Thres * @arg @ref LL_SPI_RX_FIFO_TH_HALF * @arg @ref LL_SPI_RX_FIFO_TH_QUARTER */ -__STATIC_INLINE uint32_t LL_SPI_GetRxFIFOThreshold(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_GetRxFIFOThreshold(const SPI_TypeDef *SPIx) { return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_FRXTH)); } @@ -719,7 +732,7 @@ __STATIC_INLINE void LL_SPI_DisableCRC(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_SPI_IsEnabledCRC(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_IsEnabledCRC(const SPI_TypeDef *SPIx) { return ((READ_BIT(SPIx->CR1, SPI_CR1_CRCEN) == (SPI_CR1_CRCEN)) ? 1UL : 0UL); } @@ -747,7 +760,7 @@ __STATIC_INLINE void LL_SPI_SetCRCWidth(SPI_TypeDef *SPIx, uint32_t CRCLength) * @arg @ref LL_SPI_CRC_8BIT * @arg @ref LL_SPI_CRC_16BIT */ -__STATIC_INLINE uint32_t LL_SPI_GetCRCWidth(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_GetCRCWidth(const SPI_TypeDef *SPIx) { return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_CRCL)); } @@ -782,7 +795,7 @@ __STATIC_INLINE void LL_SPI_SetCRCPolynomial(SPI_TypeDef *SPIx, uint32_t CRCPoly * @param SPIx SPI Instance * @retval Returned value is a number between Min_Data = 0x00 and Max_Data = 0xFFFF */ -__STATIC_INLINE uint32_t LL_SPI_GetCRCPolynomial(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_GetCRCPolynomial(const SPI_TypeDef *SPIx) { return (uint32_t)(READ_REG(SPIx->CRCPR)); } @@ -793,7 +806,7 @@ __STATIC_INLINE uint32_t LL_SPI_GetCRCPolynomial(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval Returned value is a number between Min_Data = 0x00 and Max_Data = 0xFFFF */ -__STATIC_INLINE uint32_t LL_SPI_GetRxCRC(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_GetRxCRC(const SPI_TypeDef *SPIx) { return (uint32_t)(READ_REG(SPIx->RXCRCR)); } @@ -804,7 +817,7 @@ __STATIC_INLINE uint32_t LL_SPI_GetRxCRC(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval Returned value is a number between Min_Data = 0x00 and Max_Data = 0xFFFF */ -__STATIC_INLINE uint32_t LL_SPI_GetTxCRC(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_GetTxCRC(const SPI_TypeDef *SPIx) { return (uint32_t)(READ_REG(SPIx->TXCRCR)); } @@ -845,7 +858,7 @@ __STATIC_INLINE void LL_SPI_SetNSSMode(SPI_TypeDef *SPIx, uint32_t NSS) * @arg @ref LL_SPI_NSS_HARD_INPUT * @arg @ref LL_SPI_NSS_HARD_OUTPUT */ -__STATIC_INLINE uint32_t LL_SPI_GetNSSMode(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_GetNSSMode(const SPI_TypeDef *SPIx) { uint32_t Ssm = (READ_BIT(SPIx->CR1, SPI_CR1_SSM)); uint32_t Ssoe = (READ_BIT(SPIx->CR2, SPI_CR2_SSOE) << 16U); @@ -883,7 +896,7 @@ __STATIC_INLINE void LL_SPI_DisableNSSPulseMgt(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_SPI_IsEnabledNSSPulse(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_IsEnabledNSSPulse(const SPI_TypeDef *SPIx) { return ((READ_BIT(SPIx->CR2, SPI_CR2_NSSP) == (SPI_CR2_NSSP)) ? 1UL : 0UL); } @@ -902,7 +915,7 @@ __STATIC_INLINE uint32_t LL_SPI_IsEnabledNSSPulse(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_RXNE(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_RXNE(const SPI_TypeDef *SPIx) { return ((READ_BIT(SPIx->SR, SPI_SR_RXNE) == (SPI_SR_RXNE)) ? 1UL : 0UL); } @@ -913,7 +926,7 @@ __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_RXNE(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_TXE(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_TXE(const SPI_TypeDef *SPIx) { return ((READ_BIT(SPIx->SR, SPI_SR_TXE) == (SPI_SR_TXE)) ? 1UL : 0UL); } @@ -924,7 +937,7 @@ __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_TXE(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_CRCERR(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_CRCERR(const SPI_TypeDef *SPIx) { return ((READ_BIT(SPIx->SR, SPI_SR_CRCERR) == (SPI_SR_CRCERR)) ? 1UL : 0UL); } @@ -935,7 +948,7 @@ __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_CRCERR(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_MODF(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_MODF(const SPI_TypeDef *SPIx) { return ((READ_BIT(SPIx->SR, SPI_SR_MODF) == (SPI_SR_MODF)) ? 1UL : 0UL); } @@ -946,7 +959,7 @@ __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_MODF(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_OVR(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_OVR(const SPI_TypeDef *SPIx) { return ((READ_BIT(SPIx->SR, SPI_SR_OVR) == (SPI_SR_OVR)) ? 1UL : 0UL); } @@ -964,7 +977,7 @@ __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_OVR(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_BSY(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_BSY(const SPI_TypeDef *SPIx) { return ((READ_BIT(SPIx->SR, SPI_SR_BSY) == (SPI_SR_BSY)) ? 1UL : 0UL); } @@ -975,7 +988,7 @@ __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_BSY(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_FRE(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_FRE(const SPI_TypeDef *SPIx) { return ((READ_BIT(SPIx->SR, SPI_SR_FRE) == (SPI_SR_FRE)) ? 1UL : 0UL); } @@ -990,7 +1003,7 @@ __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_FRE(SPI_TypeDef *SPIx) * @arg @ref LL_SPI_RX_FIFO_HALF_FULL * @arg @ref LL_SPI_RX_FIFO_FULL */ -__STATIC_INLINE uint32_t LL_SPI_GetRxFIFOLevel(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_GetRxFIFOLevel(const SPI_TypeDef *SPIx) { return (uint32_t)(READ_BIT(SPIx->SR, SPI_SR_FRLVL)); } @@ -1005,7 +1018,7 @@ __STATIC_INLINE uint32_t LL_SPI_GetRxFIFOLevel(SPI_TypeDef *SPIx) * @arg @ref LL_SPI_TX_FIFO_HALF_FULL * @arg @ref LL_SPI_TX_FIFO_FULL */ -__STATIC_INLINE uint32_t LL_SPI_GetTxFIFOLevel(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_GetTxFIFOLevel(const SPI_TypeDef *SPIx) { return (uint32_t)(READ_BIT(SPIx->SR, SPI_SR_FTLVL)); } @@ -1045,7 +1058,7 @@ __STATIC_INLINE void LL_SPI_ClearFlag_MODF(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval None */ -__STATIC_INLINE void LL_SPI_ClearFlag_OVR(SPI_TypeDef *SPIx) +__STATIC_INLINE void LL_SPI_ClearFlag_OVR(const SPI_TypeDef *SPIx) { __IO uint32_t tmpreg; tmpreg = SPIx->DR; @@ -1061,7 +1074,7 @@ __STATIC_INLINE void LL_SPI_ClearFlag_OVR(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval None */ -__STATIC_INLINE void LL_SPI_ClearFlag_FRE(SPI_TypeDef *SPIx) +__STATIC_INLINE void LL_SPI_ClearFlag_FRE(const SPI_TypeDef *SPIx) { __IO uint32_t tmpreg; tmpreg = SPIx->SR; @@ -1078,7 +1091,8 @@ __STATIC_INLINE void LL_SPI_ClearFlag_FRE(SPI_TypeDef *SPIx) /** * @brief Enable error interrupt - * @note This bit controls the generation of an interrupt when an error condition occurs (CRCERR, OVR, MODF in SPI mode, FRE at TI mode). + * @note This bit controls the generation of an interrupt when an error condition + * occurs (CRCERR, OVR, MODF in SPI mode, FRE at TI mode). * @rmtoll CR2 ERRIE LL_SPI_EnableIT_ERR * @param SPIx SPI Instance * @retval None @@ -1112,7 +1126,8 @@ __STATIC_INLINE void LL_SPI_EnableIT_TXE(SPI_TypeDef *SPIx) /** * @brief Disable error interrupt - * @note This bit controls the generation of an interrupt when an error condition occurs (CRCERR, OVR, MODF in SPI mode, FRE at TI mode). + * @note This bit controls the generation of an interrupt when an error condition + * occurs (CRCERR, OVR, MODF in SPI mode, FRE at TI mode). * @rmtoll CR2 ERRIE LL_SPI_DisableIT_ERR * @param SPIx SPI Instance * @retval None @@ -1150,7 +1165,7 @@ __STATIC_INLINE void LL_SPI_DisableIT_TXE(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_ERR(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_ERR(const SPI_TypeDef *SPIx) { return ((READ_BIT(SPIx->CR2, SPI_CR2_ERRIE) == (SPI_CR2_ERRIE)) ? 1UL : 0UL); } @@ -1161,7 +1176,7 @@ __STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_ERR(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_RXNE(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_RXNE(const SPI_TypeDef *SPIx) { return ((READ_BIT(SPIx->CR2, SPI_CR2_RXNEIE) == (SPI_CR2_RXNEIE)) ? 1UL : 0UL); } @@ -1172,7 +1187,7 @@ __STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_RXNE(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_TXE(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_TXE(const SPI_TypeDef *SPIx) { return ((READ_BIT(SPIx->CR2, SPI_CR2_TXEIE) == (SPI_CR2_TXEIE)) ? 1UL : 0UL); } @@ -1213,7 +1228,7 @@ __STATIC_INLINE void LL_SPI_DisableDMAReq_RX(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_SPI_IsEnabledDMAReq_RX(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_IsEnabledDMAReq_RX(const SPI_TypeDef *SPIx) { return ((READ_BIT(SPIx->CR2, SPI_CR2_RXDMAEN) == (SPI_CR2_RXDMAEN)) ? 1UL : 0UL); } @@ -1246,7 +1261,7 @@ __STATIC_INLINE void LL_SPI_DisableDMAReq_TX(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_SPI_IsEnabledDMAReq_TX(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_IsEnabledDMAReq_TX(const SPI_TypeDef *SPIx) { return ((READ_BIT(SPIx->CR2, SPI_CR2_TXDMAEN) == (SPI_CR2_TXDMAEN)) ? 1UL : 0UL); } @@ -1273,7 +1288,7 @@ __STATIC_INLINE void LL_SPI_SetDMAParity_RX(SPI_TypeDef *SPIx, uint32_t Parity) * @arg @ref LL_SPI_DMA_PARITY_ODD * @arg @ref LL_SPI_DMA_PARITY_EVEN */ -__STATIC_INLINE uint32_t LL_SPI_GetDMAParity_RX(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_GetDMAParity_RX(const SPI_TypeDef *SPIx) { return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_LDMARX) >> SPI_CR2_LDMARX_Pos); } @@ -1300,7 +1315,7 @@ __STATIC_INLINE void LL_SPI_SetDMAParity_TX(SPI_TypeDef *SPIx, uint32_t Parity) * @arg @ref LL_SPI_DMA_PARITY_ODD * @arg @ref LL_SPI_DMA_PARITY_EVEN */ -__STATIC_INLINE uint32_t LL_SPI_GetDMAParity_TX(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_GetDMAParity_TX(const SPI_TypeDef *SPIx) { return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_LDMATX) >> SPI_CR2_LDMATX_Pos); } @@ -1311,7 +1326,7 @@ __STATIC_INLINE uint32_t LL_SPI_GetDMAParity_TX(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval Address of data register */ -__STATIC_INLINE uint32_t LL_SPI_DMA_GetRegAddr(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_SPI_DMA_GetRegAddr(const SPI_TypeDef *SPIx) { return (uint32_t) &(SPIx->DR); } @@ -1388,7 +1403,7 @@ __STATIC_INLINE void LL_SPI_TransmitData16(SPI_TypeDef *SPIx, uint16_t TxData) * @{ */ -ErrorStatus LL_SPI_DeInit(SPI_TypeDef *SPIx); +ErrorStatus LL_SPI_DeInit(const SPI_TypeDef *SPIx); ErrorStatus LL_SPI_Init(SPI_TypeDef *SPIx, LL_SPI_InitTypeDef *SPI_InitStruct); void LL_SPI_StructInit(LL_SPI_InitTypeDef *SPI_InitStruct); @@ -1655,7 +1670,7 @@ __STATIC_INLINE void LL_I2S_Disable(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_I2S_IsEnabled(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_I2S_IsEnabled(const SPI_TypeDef *SPIx) { return ((READ_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_I2SE) == (SPI_I2SCFGR_I2SE)) ? 1UL : 0UL); } @@ -1688,7 +1703,7 @@ __STATIC_INLINE void LL_I2S_SetDataFormat(SPI_TypeDef *SPIx, uint32_t DataFormat * @arg @ref LL_I2S_DATAFORMAT_24B * @arg @ref LL_I2S_DATAFORMAT_32B */ -__STATIC_INLINE uint32_t LL_I2S_GetDataFormat(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_I2S_GetDataFormat(const SPI_TypeDef *SPIx) { return (uint32_t)(READ_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)); } @@ -1715,7 +1730,7 @@ __STATIC_INLINE void LL_I2S_SetClockPolarity(SPI_TypeDef *SPIx, uint32_t ClockPo * @arg @ref LL_I2S_POLARITY_LOW * @arg @ref LL_I2S_POLARITY_HIGH */ -__STATIC_INLINE uint32_t LL_I2S_GetClockPolarity(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_I2S_GetClockPolarity(const SPI_TypeDef *SPIx) { return (uint32_t)(READ_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_CKPOL)); } @@ -1750,7 +1765,7 @@ __STATIC_INLINE void LL_I2S_SetStandard(SPI_TypeDef *SPIx, uint32_t Standard) * @arg @ref LL_I2S_STANDARD_PCM_SHORT * @arg @ref LL_I2S_STANDARD_PCM_LONG */ -__STATIC_INLINE uint32_t LL_I2S_GetStandard(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_I2S_GetStandard(const SPI_TypeDef *SPIx) { return (uint32_t)(READ_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_I2SSTD | SPI_I2SCFGR_PCMSYNC)); } @@ -1781,7 +1796,7 @@ __STATIC_INLINE void LL_I2S_SetTransferMode(SPI_TypeDef *SPIx, uint32_t Mode) * @arg @ref LL_I2S_MODE_MASTER_TX * @arg @ref LL_I2S_MODE_MASTER_RX */ -__STATIC_INLINE uint32_t LL_I2S_GetTransferMode(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_I2S_GetTransferMode(const SPI_TypeDef *SPIx) { return (uint32_t)(READ_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_I2SCFG)); } @@ -1804,7 +1819,7 @@ __STATIC_INLINE void LL_I2S_SetPrescalerLinear(SPI_TypeDef *SPIx, uint8_t Presca * @param SPIx SPI Instance * @retval PrescalerLinear Value between Min_Data=0x02 and Max_Data=0xFF */ -__STATIC_INLINE uint32_t LL_I2S_GetPrescalerLinear(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_I2S_GetPrescalerLinear(const SPI_TypeDef *SPIx) { return (uint32_t)(READ_BIT(SPIx->I2SPR, SPI_I2SPR_I2SDIV)); } @@ -1831,7 +1846,7 @@ __STATIC_INLINE void LL_I2S_SetPrescalerParity(SPI_TypeDef *SPIx, uint32_t Presc * @arg @ref LL_I2S_PRESCALER_PARITY_EVEN * @arg @ref LL_I2S_PRESCALER_PARITY_ODD */ -__STATIC_INLINE uint32_t LL_I2S_GetPrescalerParity(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_I2S_GetPrescalerParity(const SPI_TypeDef *SPIx) { return (uint32_t)(READ_BIT(SPIx->I2SPR, SPI_I2SPR_ODD) >> 8U); } @@ -1864,7 +1879,7 @@ __STATIC_INLINE void LL_I2S_DisableMasterClock(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_I2S_IsEnabledMasterClock(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_I2S_IsEnabledMasterClock(const SPI_TypeDef *SPIx) { return ((READ_BIT(SPIx->I2SPR, SPI_I2SPR_MCKOE) == (SPI_I2SPR_MCKOE)) ? 1UL : 0UL); } @@ -1898,7 +1913,7 @@ __STATIC_INLINE void LL_I2S_DisableAsyncStart(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_I2S_IsEnabledAsyncStart(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_I2S_IsEnabledAsyncStart(const SPI_TypeDef *SPIx) { return ((READ_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_ASTRTEN) == (SPI_I2SCFGR_ASTRTEN)) ? 1UL : 0UL); } @@ -1918,7 +1933,7 @@ __STATIC_INLINE uint32_t LL_I2S_IsEnabledAsyncStart(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_RXNE(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_RXNE(const SPI_TypeDef *SPIx) { return LL_SPI_IsActiveFlag_RXNE(SPIx); } @@ -1929,7 +1944,7 @@ __STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_RXNE(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_TXE(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_TXE(const SPI_TypeDef *SPIx) { return LL_SPI_IsActiveFlag_TXE(SPIx); } @@ -1940,7 +1955,7 @@ __STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_TXE(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_BSY(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_BSY(const SPI_TypeDef *SPIx) { return LL_SPI_IsActiveFlag_BSY(SPIx); } @@ -1951,7 +1966,7 @@ __STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_BSY(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_OVR(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_OVR(const SPI_TypeDef *SPIx) { return LL_SPI_IsActiveFlag_OVR(SPIx); } @@ -1962,7 +1977,7 @@ __STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_OVR(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_UDR(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_UDR(const SPI_TypeDef *SPIx) { return ((READ_BIT(SPIx->SR, SPI_SR_UDR) == (SPI_SR_UDR)) ? 1UL : 0UL); } @@ -1973,7 +1988,7 @@ __STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_UDR(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_FRE(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_FRE(const SPI_TypeDef *SPIx) { return LL_SPI_IsActiveFlag_FRE(SPIx); } @@ -1987,7 +2002,7 @@ __STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_FRE(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_CHSIDE(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_CHSIDE(const SPI_TypeDef *SPIx) { return ((READ_BIT(SPIx->SR, SPI_SR_CHSIDE) == (SPI_SR_CHSIDE)) ? 1UL : 0UL); } @@ -2009,7 +2024,7 @@ __STATIC_INLINE void LL_I2S_ClearFlag_OVR(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval None */ -__STATIC_INLINE void LL_I2S_ClearFlag_UDR(SPI_TypeDef *SPIx) +__STATIC_INLINE void LL_I2S_ClearFlag_UDR(const SPI_TypeDef *SPIx) { __IO uint32_t tmpreg; tmpreg = SPIx->SR; @@ -2022,7 +2037,7 @@ __STATIC_INLINE void LL_I2S_ClearFlag_UDR(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval None */ -__STATIC_INLINE void LL_I2S_ClearFlag_FRE(SPI_TypeDef *SPIx) +__STATIC_INLINE void LL_I2S_ClearFlag_FRE(const SPI_TypeDef *SPIx) { LL_SPI_ClearFlag_FRE(SPIx); } @@ -2109,7 +2124,7 @@ __STATIC_INLINE void LL_I2S_DisableIT_TXE(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_I2S_IsEnabledIT_ERR(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_I2S_IsEnabledIT_ERR(const SPI_TypeDef *SPIx) { return LL_SPI_IsEnabledIT_ERR(SPIx); } @@ -2120,7 +2135,7 @@ __STATIC_INLINE uint32_t LL_I2S_IsEnabledIT_ERR(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_I2S_IsEnabledIT_RXNE(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_I2S_IsEnabledIT_RXNE(const SPI_TypeDef *SPIx) { return LL_SPI_IsEnabledIT_RXNE(SPIx); } @@ -2131,7 +2146,7 @@ __STATIC_INLINE uint32_t LL_I2S_IsEnabledIT_RXNE(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_I2S_IsEnabledIT_TXE(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_I2S_IsEnabledIT_TXE(const SPI_TypeDef *SPIx) { return LL_SPI_IsEnabledIT_TXE(SPIx); } @@ -2172,7 +2187,7 @@ __STATIC_INLINE void LL_I2S_DisableDMAReq_RX(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_I2S_IsEnabledDMAReq_RX(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_I2S_IsEnabledDMAReq_RX(const SPI_TypeDef *SPIx) { return LL_SPI_IsEnabledDMAReq_RX(SPIx); } @@ -2205,7 +2220,7 @@ __STATIC_INLINE void LL_I2S_DisableDMAReq_TX(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_I2S_IsEnabledDMAReq_TX(SPI_TypeDef *SPIx) +__STATIC_INLINE uint32_t LL_I2S_IsEnabledDMAReq_TX(const SPI_TypeDef *SPIx) { return LL_SPI_IsEnabledDMAReq_TX(SPIx); } @@ -2250,7 +2265,7 @@ __STATIC_INLINE void LL_I2S_TransmitData16(SPI_TypeDef *SPIx, uint16_t TxData) * @{ */ -ErrorStatus LL_I2S_DeInit(SPI_TypeDef *SPIx); +ErrorStatus LL_I2S_DeInit(const SPI_TypeDef *SPIx); ErrorStatus LL_I2S_Init(SPI_TypeDef *SPIx, LL_I2S_InitTypeDef *I2S_InitStruct); void LL_I2S_StructInit(LL_I2S_InitTypeDef *I2S_InitStruct); void LL_I2S_ConfigPrescaler(SPI_TypeDef *SPIx, uint32_t PrescalerLinear, uint32_t PrescalerParity); diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_wwdg.h b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_wwdg.h index 8d9096fc60..cb99986771 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_wwdg.h +++ b/system/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_wwdg.h @@ -131,7 +131,7 @@ __STATIC_INLINE void LL_WWDG_Enable(WWDG_TypeDef *WWDGx) * @param WWDGx WWDG Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_WWDG_IsEnabled(WWDG_TypeDef *WWDGx) +__STATIC_INLINE uint32_t LL_WWDG_IsEnabled(const WWDG_TypeDef *WWDGx) { return ((READ_BIT(WWDGx->CR, WWDG_CR_WDGA) == (WWDG_CR_WDGA)) ? 1UL : 0UL); } @@ -158,7 +158,7 @@ __STATIC_INLINE void LL_WWDG_SetCounter(WWDG_TypeDef *WWDGx, uint32_t Counter) * @param WWDGx WWDG Instance * @retval 7 bit Watchdog Counter value */ -__STATIC_INLINE uint32_t LL_WWDG_GetCounter(WWDG_TypeDef *WWDGx) +__STATIC_INLINE uint32_t LL_WWDG_GetCounter(const WWDG_TypeDef *WWDGx) { return (READ_BIT(WWDGx->CR, WWDG_CR_T)); } @@ -191,7 +191,7 @@ __STATIC_INLINE void LL_WWDG_SetPrescaler(WWDG_TypeDef *WWDGx, uint32_t Prescale * @arg @ref LL_WWDG_PRESCALER_4 * @arg @ref LL_WWDG_PRESCALER_8 */ -__STATIC_INLINE uint32_t LL_WWDG_GetPrescaler(WWDG_TypeDef *WWDGx) +__STATIC_INLINE uint32_t LL_WWDG_GetPrescaler(const WWDG_TypeDef *WWDGx) { return (READ_BIT(WWDGx->CFR, WWDG_CFR_WDGTB)); } @@ -223,7 +223,7 @@ __STATIC_INLINE void LL_WWDG_SetWindow(WWDG_TypeDef *WWDGx, uint32_t Window) * @param WWDGx WWDG Instance * @retval 7 bit Watchdog Window value */ -__STATIC_INLINE uint32_t LL_WWDG_GetWindow(WWDG_TypeDef *WWDGx) +__STATIC_INLINE uint32_t LL_WWDG_GetWindow(const WWDG_TypeDef *WWDGx) { return (READ_BIT(WWDGx->CFR, WWDG_CFR_W)); } @@ -244,7 +244,7 @@ __STATIC_INLINE uint32_t LL_WWDG_GetWindow(WWDG_TypeDef *WWDGx) * @param WWDGx WWDG Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_WWDG_IsActiveFlag_EWKUP(WWDG_TypeDef *WWDGx) +__STATIC_INLINE uint32_t LL_WWDG_IsActiveFlag_EWKUP(const WWDG_TypeDef *WWDGx) { return ((READ_BIT(WWDGx->SR, WWDG_SR_EWIF) == (WWDG_SR_EWIF)) ? 1UL : 0UL); } @@ -286,7 +286,7 @@ __STATIC_INLINE void LL_WWDG_EnableIT_EWKUP(WWDG_TypeDef *WWDGx) * @param WWDGx WWDG Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_WWDG_IsEnabledIT_EWKUP(WWDG_TypeDef *WWDGx) +__STATIC_INLINE uint32_t LL_WWDG_IsEnabledIT_EWKUP(const WWDG_TypeDef *WWDGx) { return ((READ_BIT(WWDGx->CFR, WWDG_CFR_EWI) == (WWDG_CFR_EWI)) ? 1UL : 0UL); } diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Release_Notes.html b/system/Drivers/STM32F7xx_HAL_Driver/Release_Notes.html index 3536a0c36f..e137e2a5a3 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Release_Notes.html +++ b/system/Drivers/STM32F7xx_HAL_Driver/Release_Notes.html @@ -32,7 +32,91 @@

                                                                                                Purpose

                                                                                                Update History

                                                                                                - + +
                                                                                                +

                                                                                                Main Changes

                                                                                                +
                                                                                                  +
                                                                                                • Enhance HAL code quality for MISRA-C 2012 Rule-8.13 by adding const qualifiers.
                                                                                                  • +
                                                                                                • HAL RTC +
                                                                                                    +
                                                                                                  • Expand the cast of ‘RTC_CR_BYPSHAD’ to 32 bits when writing to the CR register in HAL_RTCEx_DisableBypassShadow() API to avoid overwriting its upper bits.
                                                                                                    • +
                                                                                                  • +
                                                                                                • HAL HASH +
                                                                                                    +
                                                                                                  • Code quality enhancement : Fix MISRA-C 2012 Rule-10.7, Rule-10.6, Rule-10.4, Rule-11.5 and Rule-12.1.
                                                                                                    • +
                                                                                                  • +
                                                                                                • HAL TIM +
                                                                                                    +
                                                                                                  • Update TIM_CCER_CCxE_MASK to support internal TIM Channel5 and TIM Channel6.
                                                                                                    • +
                                                                                                  • Fix update flag (UIF) clearing in TIM_Base_SetConfig() function.
                                                                                                    • +
                                                                                                  • +
                                                                                                • HAL I2C +
                                                                                                    +
                                                                                                  • Move variable tmp declaration at the beginning in I2C_TransferCofig() function.
                                                                                                    • +
                                                                                                  • Remove extra parenthesis in c files for driver HAL I2C driver.
                                                                                                    • +
                                                                                                  • Update HAL_I2C_IsDeviceReady() API to take into account the number of trials.
                                                                                                    • +
                                                                                                  • +
                                                                                                • HAL SPI +
                                                                                                    +
                                                                                                  • Update HAL I2S driver to remove ‘go to’ instruction.
                                                                                                    • +
                                                                                                  • Add note to clarify HAL_SPI_Receive() API behavior in master mode.
                                                                                                    • +
                                                                                                  • Add units to physical measurements.
                                                                                                    • +
                                                                                                  • Check data size before changing state in reception API.
                                                                                                    • +
                                                                                                  • Fix INTEGER_OVERFLOW Coverity warning.
                                                                                                    • +
                                                                                                  • Move a variable declaration before an executable instruction.
                                                                                                    • +
                                                                                                  • +
                                                                                                • HAL SMBUS +
                                                                                                    +
                                                                                                  • Remove extra parenthesis in c files for driver HAL SMBUS.
                                                                                                    • +
                                                                                                  • +
                                                                                                • HAL I2S +
                                                                                                    +
                                                                                                  • Update HAL I2S driver to remove ‘go to’ instruction.
                                                                                                    • +
                                                                                                  • +
                                                                                                • HAL QSPI +
                                                                                                    +
                                                                                                  • Clear AR register after CCR to avoid new transfer when address is not needed.
                                                                                                    • +
                                                                                                  • +
                                                                                                • HAL UART +
                                                                                                    +
                                                                                                  • Add HAL_UART_RXEVENT_IDLE event notification to user in case of HAL_UARTEx_ReceiveToIdle_DMA() API use with Circular DMA, even if occurring just after TC event.
                                                                                                    • +
                                                                                                  • Correct DMA Rx abort procedure impact on ongoing Tx transfer in polling mode.
                                                                                                    • +
                                                                                                  • Correct references to HAL_UARTEx_WakeupCallback() API and to HAL_UART_WAKEUP_CB_ID define, according to series capabilities.
                                                                                                    • +
                                                                                                  • Provide accurate position in RxEventCallback() when ReceptionToIdle mode is used with DMA, when UART and DMA interrupts process is delayed.
                                                                                                    • +
                                                                                                  • +
                                                                                                • HAL USART +
                                                                                                    +
                                                                                                  • Improve the visibility of the SPI feature support in HAL USART description.
                                                                                                    • +
                                                                                                  • +
                                                                                                • HAL CAN +
                                                                                                    +
                                                                                                  • Fix UNUSED_VALUE coverity warning in HAL_CAN_ConfigFilter() API.
                                                                                                    • +
                                                                                                  • +
                                                                                                • HAL ETH +
                                                                                                    +
                                                                                                  • Fix identical definitions of the ETH state code.
                                                                                                    • +
                                                                                                  • Fix the calculation of the tail pointer so that it points to the last updated descriptor.
                                                                                                    • +
                                                                                                  • Update the HAL_ETH_PTP_SetConfig() API to comply with the steps described in the reference manual guidelines.
                                                                                                    • +
                                                                                                  • +
                                                                                                • HAL FMC +
                                                                                                    +
                                                                                                  • Change “deviceaddress” variable as volatile in HAL_NAND_Read_Page_8b(), HAL_NAND_Read_SpareArea_8b(), HAL_NAND_Read_Page_16b() and HAL_NAND_Read_SpareArea_16b() APIs to avoid compiler optimizations and ensure correct data reads .
                                                                                                    • +
                                                                                                  • +
                                                                                                • HAL SDMMC +
                                                                                                    +
                                                                                                  • Update SDMMC_DATATIMEOUT definition used with two different clock situations.
                                                                                                    • +
                                                                                                  • Remove Redundant Condition from HAL_SD_InitCard() API.
                                                                                                    • +
                                                                                                  • Add a check condition before aborting DMA in HAL_MMC_IRQHandler() API.
                                                                                                    • +
                                                                                                  • +
                                                                                                • HAL USB +
                                                                                                    +
                                                                                                  • hal_hcd.c: ensure to reactivate the usb channel in case of transfer error.
                                                                                                    • +
                                                                                                  • +
                                                                                                +
                                                                                                +
                                                                                                +
                                                                                                +

                                                                                                Main Changes

                                                                                                  diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c index dacd613725..ecfa0196f2 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c +++ b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c @@ -50,11 +50,11 @@ * @{ */ /** - * @brief STM32F7xx HAL Driver version number V1.3.1 + * @brief STM32F7xx HAL Driver version number V1.3.2 */ #define __STM32F7xx_HAL_VERSION_MAIN (0x01) /*!< [31:24] main version */ #define __STM32F7xx_HAL_VERSION_SUB1 (0x03) /*!< [23:16] sub1 version */ -#define __STM32F7xx_HAL_VERSION_SUB2 (0x01) /*!< [15:8] sub2 version */ +#define __STM32F7xx_HAL_VERSION_SUB2 (0x02) /*!< [15:8] sub2 version */ #define __STM32F7xx_HAL_VERSION_RC (0x00) /*!< [7:0] release candidate */ #define __STM32F7xx_HAL_VERSION ((__STM32F7xx_HAL_VERSION_MAIN << 24)\ |(__STM32F7xx_HAL_VERSION_SUB1 << 16)\ diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c index ab5655f766..3da628396f 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c +++ b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c @@ -1305,9 +1305,9 @@ void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc) /* Conversion complete callback */ #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) - hadc->InjectedConvCpltCallback(hadc); + hadc->InjectedConvCpltCallback(hadc); #else - HAL_ADCEx_InjectedConvCpltCallback(hadc); + HAL_ADCEx_InjectedConvCpltCallback(hadc); #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ /* Clear injected group conversion flag */ @@ -1374,6 +1374,7 @@ void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc) */ HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length) { + HAL_StatusTypeDef status = HAL_OK; __IO uint32_t counter = 0; /* Check the parameters */ @@ -1458,7 +1459,7 @@ HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, ui hadc->Instance->CR2 |= ADC_CR2_DMA; /* Start the DMA channel */ - HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length); + status = HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length); /* Check if Multimode enabled */ if(HAL_IS_BIT_CLR(ADC->CCR, ADC_CCR_MULTI)) @@ -1501,7 +1502,7 @@ HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, ui } /* Return function status */ - return HAL_OK; + return status; } /** diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c index fd430fdfe9..d1d6c95988 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c +++ b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c @@ -586,6 +586,7 @@ uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRa */ HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length) { + HAL_StatusTypeDef tmp_hal_status = HAL_OK; __IO uint32_t counter = 0; /* Check the parameters */ @@ -677,7 +678,7 @@ HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef* hadc, uint32_t } /* Enable the DMA Stream */ - HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&ADC->CDR, (uint32_t)pData, Length); + tmp_hal_status = HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&ADC->CDR, (uint32_t)pData, Length); /* if no external trigger present enable software conversion of regular channels */ if((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET) @@ -696,7 +697,7 @@ HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef* hadc, uint32_t } /* Return function status */ - return HAL_OK; + return tmp_hal_status; } /** diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_can.c b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_can.c index 98ab37fdf6..b815cdb566 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_can.c +++ b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_can.c @@ -840,7 +840,7 @@ HAL_StatusTypeDef HAL_CAN_UnRegisterCallback(CAN_HandleTypeDef *hcan, HAL_CAN_Ca HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef *hcan, const CAN_FilterTypeDef *sFilterConfig) { uint32_t filternbrbitpos; - CAN_TypeDef *can_ip = hcan->Instance; + CAN_TypeDef *can_ip; HAL_CAN_StateTypeDef state = hcan->State; if ((state == HAL_CAN_STATE_READY) || @@ -861,6 +861,7 @@ HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef *hcan, const CAN_Filter if (hcan->Instance == CAN3) { /* CAN3 is single instance with 14 dedicated filters banks */ + can_ip = hcan->Instance; /* Check the parameters */ assert_param(IS_CAN_FILTER_BANK_SINGLE(sFilterConfig->FilterBank)); @@ -885,6 +886,7 @@ HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef *hcan, const CAN_Filter assert_param(IS_CAN_FILTER_BANK_DUAL(sFilterConfig->SlaveStartFilterBank)); #else /* CAN1 is single instance with 14 dedicated filters banks */ + can_ip = hcan->Instance; /* Check the parameters */ assert_param(IS_CAN_FILTER_BANK_SINGLE(sFilterConfig->FilterBank)); diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.c b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.c index e7056fac64..6055cb4702 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.c +++ b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.c @@ -452,13 +452,13 @@ static uint32_t CRC_Handle_8(CRC_HandleTypeDef *hcrc, uint8_t pBuffer[], uint32_ { *(__IO uint8_t *)(__IO void *)(&hcrc->Instance->DR) = pBuffer[4U * i]; /* Derogation MisraC2012 R.11.5 */ } - if ((BufferLength % 4U) == 2U) + else if ((BufferLength % 4U) == 2U) { data = ((uint16_t)(pBuffer[4U * i]) << 8U) | (uint16_t)pBuffer[(4U * i) + 1U]; pReg = (__IO uint16_t *)(__IO void *)(&hcrc->Instance->DR); /* Derogation MisraC2012 R.11.5 */ *pReg = data; } - if ((BufferLength % 4U) == 3U) + else if ((BufferLength % 4U) == 3U) { data = ((uint16_t)(pBuffer[4U * i]) << 8U) | (uint16_t)pBuffer[(4U * i) + 1U]; pReg = (__IO uint16_t *)(__IO void *)(&hcrc->Instance->DR); /* Derogation MisraC2012 R.11.5 */ @@ -466,6 +466,10 @@ static uint32_t CRC_Handle_8(CRC_HandleTypeDef *hcrc, uint8_t pBuffer[], uint32_ *(__IO uint8_t *)(__IO void *)(&hcrc->Instance->DR) = pBuffer[(4U * i) + 2U]; /* Derogation MisraC2012 R.11.5 */ } + else + { + /* Nothing to do */ + } } /* Return the CRC computed value */ diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.c b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.c index 167505fba7..6455eaadd1 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.c +++ b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.c @@ -210,8 +210,6 @@ HAL_StatusTypeDef HAL_CRCEx_Output_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_ } - - /** * @} */ diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cryp.c b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cryp.c index fa5040adcc..c75743a509 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cryp.c +++ b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cryp.c @@ -30,7 +30,8 @@ The CRYP HAL driver can be used in CRYP or TinyAES IP as follows: (#)Initialize the CRYP low level resources by implementing the HAL_CRYP_MspInit(): - (##) Enable the CRYP interface clock using __HAL_RCC_CRYP_CLK_ENABLE()or __HAL_RCC_AES_CLK_ENABLE for TinyAES IP + (##) Enable the CRYP interface clock using __HAL_RCC_CRYP_CLK_ENABLE()or + __HAL_RCC_AES_CLK_ENABLE for TinyAES IP (##) In case of using interrupts (e.g. HAL_CRYP_Encrypt_IT()) (+++) Configure the CRYP interrupt priority using HAL_NVIC_SetPriority() (+++) Enable the CRYP IRQ handler using HAL_NVIC_EnableIRQ() @@ -71,7 +72,7 @@ the CRYP peripheral is configured and processes the buffer in input. At second call, no need to Initialize the CRYP, user have to get current configuration via HAL_CRYP_GetConfig() API, then only HAL_CRYP_SetConfig() is requested to set - new parametres, finally user can start encryption/decryption. + new parameters, finally user can start encryption/decryption. (#)Call HAL_CRYP_DeInit() to deinitialize the CRYP peripheral. @@ -277,7 +278,8 @@ * @{ */ #define CRYP_TIMEOUT_KEYPREPARATION 82U /*The latency of key preparation operation is 82 clock cycles.*/ -#define CRYP_TIMEOUT_GCMCCMINITPHASE 299U /* The latency of GCM/CCM init phase to prepare hash subkey is 299 clock cycles.*/ +#define CRYP_TIMEOUT_GCMCCMINITPHASE 299U /* The latency of GCM/CCM init phase to prepare hash subkey + is 299 clock cycles.*/ #define CRYP_TIMEOUT_GCMCCMHEADERPHASE 290U /* The latency of GCM/CCM header phase is 290 clock cycles.*/ #define CRYP_PHASE_READY 0x00000001U /*!< CRYP peripheral is ready for initialization. */ @@ -1806,7 +1808,8 @@ HAL_StatusTypeDef HAL_CRYP_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint32_t *Inpu hcryp->Phase = CRYP_PHASE_PROCESS; /* Start DMA process transfer for AES */ - CRYP_SetDMAConfig(hcryp, (uint32_t)(hcryp->pCrypInBuffPtr), (hcryp->Size / 4U), (uint32_t)(hcryp->pCrypOutBuffPtr)); + CRYP_SetDMAConfig(hcryp, (uint32_t)(hcryp->pCrypInBuffPtr), (hcryp->Size / 4U), + (uint32_t)(hcryp->pCrypOutBuffPtr)); break; case CRYP_AES_GCM_GMAC: @@ -2268,7 +2271,8 @@ static HAL_StatusTypeDef CRYP_TDES_Process(CRYP_HandleTypeDef *hcryp, uint32_t T if (((hcryp->Instance->SR & CRYP_FLAG_OFNE) != 0x0U) && (outcount < (hcryp->Size / 4U))) { - /* Read the output block from the Output FIFO and put them in temporary Buffer then get CrypOutBuff from temporary buffer */ + /* Read the output block from the Output FIFO and put them in temporary Buffer + then get CrypOutBuff from temporary buffer */ for (i = 0U; i < 2U; i++) { temp[i] = hcryp->Instance->DOUT; @@ -2337,7 +2341,8 @@ static void CRYP_TDES_IT(CRYP_HandleTypeDef *hcryp) { if (__HAL_CRYP_GET_FLAG(hcryp, CRYP_FLAG_OUTRIS) != 0x0U) { - /* Read the output block from the Output FIFO and put them in temporary Buffer then get CrypOutBuff from temporary buffer */ + /* Read the output block from the Output FIFO and put them in temporary Buffer + then get CrypOutBuff from temporary buffer */ for (i = 0U; i < 2U; i++) { temp[i] = hcryp->Instance->DOUT; @@ -2782,8 +2787,7 @@ static HAL_StatusTypeDef CRYP_AES_Decrypt_IT(CRYP_HandleTypeDef *hcryp) __HAL_UNLOCK(hcryp); return HAL_ERROR; } - } - while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)); + } while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)); /* Clear CCF Flag */ __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR); @@ -2825,8 +2829,7 @@ static HAL_StatusTypeDef CRYP_AES_Decrypt_IT(CRYP_HandleTypeDef *hcryp) __HAL_UNLOCK(hcryp); return HAL_ERROR; } - } - while (HAL_IS_BIT_SET(hcryp->Instance->SR, CRYP_FLAG_BUSY)); + } while (HAL_IS_BIT_SET(hcryp->Instance->SR, CRYP_FLAG_BUSY)); /* Turn back to ALGOMODE of the configuration */ MODIFY_REG(hcryp->Instance->CR, CRYP_CR_ALGOMODE, hcryp->Init.Algorithm); @@ -2967,8 +2970,7 @@ static HAL_StatusTypeDef CRYP_AES_Decrypt_DMA(CRYP_HandleTypeDef *hcryp) __HAL_UNLOCK(hcryp); return HAL_ERROR; } - } - while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)); + } while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)); /* Clear CCF Flag */ __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR); @@ -3012,8 +3014,7 @@ static HAL_StatusTypeDef CRYP_AES_Decrypt_DMA(CRYP_HandleTypeDef *hcryp) __HAL_UNLOCK(hcryp); return HAL_ERROR; } - } - while (HAL_IS_BIT_SET(hcryp->Instance->SR, CRYP_FLAG_BUSY)); + } while (HAL_IS_BIT_SET(hcryp->Instance->SR, CRYP_FLAG_BUSY)); /* Turn back to ALGOMODE of the configuration */ MODIFY_REG(hcryp->Instance->CR, CRYP_CR_ALGOMODE, hcryp->Init.Algorithm); @@ -3317,7 +3318,7 @@ static void CRYP_AES_ProcessData(CRYP_HandleTypeDef *hcryp, uint32_t Timeout) #if defined (CRYP) uint16_t incount; /* Temporary CrypInCount Value */ uint16_t outcount; /* Temporary CrypOutCount Value */ -#endif +#endif /* CRYP */ #if defined (CRYP) @@ -3363,7 +3364,8 @@ static void CRYP_AES_ProcessData(CRYP_HandleTypeDef *hcryp, uint32_t Timeout) if (((hcryp->Instance->SR & CRYP_FLAG_OFNE) != 0x0U) && (outcount < (hcryp->Size / 4U))) { - /* Read the output block from the Output FIFO and put them in temporary buffer then get CrypOutBuff from temporary buffer */ + /* Read the output block from the Output FIFO and put them in temporary buffer + then get CrypOutBuff from temporary buffer */ for (i = 0U; i < 4U; i++) { temp[i] = hcryp->Instance->DOUT; @@ -3413,7 +3415,8 @@ static void CRYP_AES_ProcessData(CRYP_HandleTypeDef *hcryp, uint32_t Timeout) /* Clear CCF Flag */ __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR); - /* Read the output block from the output FIFO and put them in temporary buffer then get CrypOutBuff from temporary buffer*/ + /* Read the output block from the output FIFO and put them in temporary buffer + then get CrypOutBuff from temporary buffer*/ for (i = 0U; i < 4U; i++) { temp[i] = hcryp->Instance->DOUTR; @@ -3431,7 +3434,8 @@ static void CRYP_AES_ProcessData(CRYP_HandleTypeDef *hcryp, uint32_t Timeout) /** * @brief Handle CRYP block input/output data handling under interruption. * @note The function is called under interruption only, once - * interruptions have been enabled by HAL_CRYP_Encrypt_IT or HAL_CRYP_Decrypt_IT. + * interruptions have been enabled by HAL_CRYP_Encrypt_IT + * or HAL_CRYP_Decrypt_IT. * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains * the configuration information for CRYP module. * @retval HAL status @@ -3443,7 +3447,7 @@ static void CRYP_AES_IT(CRYP_HandleTypeDef *hcryp) #if defined (CRYP) uint16_t incount; /* Temporary CrypInCount Value */ uint16_t outcount; /* Temporary CrypOutCount Value */ -#endif +#endif /* CRYP */ if (hcryp->State == HAL_CRYP_STATE_BUSY) { @@ -3482,7 +3486,8 @@ static void CRYP_AES_IT(CRYP_HandleTypeDef *hcryp) if (((hcryp->Instance->SR & CRYP_FLAG_OFNE) != 0x0U) && (outcount < (hcryp->Size / 4U))) { - /* Read the output block from the output FIFO and put them in temporary buffer then get CrypOutBuff from temporary buffer */ + /* Read the output block from the output FIFO and put them in temporary buffer + then get CrypOutBuff from temporary buffer */ for (i = 0U; i < 4U; i++) { temp[i] = hcryp->Instance->DOUT; @@ -3521,7 +3526,8 @@ static void CRYP_AES_IT(CRYP_HandleTypeDef *hcryp) #else /*AES*/ - /* Read the output block from the output FIFO and put them in temporary buffer then get CrypOutBuff from temporary buffer*/ + /* Read the output block from the output FIFO and put them in temporary buffer + then get CrypOutBuff from temporary buffer*/ for (i = 0U; i < 4U; i++) { temp[i] = hcryp->Instance->DOUTR; @@ -3945,8 +3951,7 @@ static HAL_StatusTypeDef CRYP_AESGCM_Process_IT(CRYP_HandleTypeDef *hcryp) __HAL_UNLOCK(hcryp); return HAL_ERROR; } - } - while ((hcryp->Instance->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN); + } while ((hcryp->Instance->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN); #else /* AES */ @@ -3983,8 +3988,7 @@ static HAL_StatusTypeDef CRYP_AESGCM_Process_IT(CRYP_HandleTypeDef *hcryp) __HAL_UNLOCK(hcryp); return HAL_ERROR; } - } - while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)); + } while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)); /* Clear CCF flag */ __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR); @@ -4222,8 +4226,7 @@ static HAL_StatusTypeDef CRYP_AESGCM_Process_DMA(CRYP_HandleTypeDef *hcryp) __HAL_UNLOCK(hcryp); return HAL_ERROR; } - } - while ((hcryp->Instance->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN); + } while ((hcryp->Instance->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN); #else /* AES */ @@ -4260,8 +4263,7 @@ static HAL_StatusTypeDef CRYP_AESGCM_Process_DMA(CRYP_HandleTypeDef *hcryp) __HAL_UNLOCK(hcryp); return HAL_ERROR; } - } - while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)); + } while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)); /* Clear CCF flag */ __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR); @@ -4294,13 +4296,15 @@ static HAL_StatusTypeDef CRYP_AESGCM_Process_DMA(CRYP_HandleTypeDef *hcryp) if (hcryp->Size != 0U) { - /* CRYP1 IP V < 2.2.1 Size should be %4 otherwise Tag will be incorrectly generated for GCM Encryption: + /* CRYP1 IP V < 2.2.1 Size should be %4 otherwise Tag will be + incorrectly generated for GCM Encryption: Workaround is implemented in polling mode, so if last block of payload <128bit don't use DMA mode otherwise TAG is incorrectly generated . */ /* Set the input and output addresses and start DMA transfer */ if ((hcryp->Size % 16U) == 0U) { - CRYP_SetDMAConfig(hcryp, (uint32_t)(hcryp->pCrypInBuffPtr), (hcryp->Size / 4U), (uint32_t)(hcryp->pCrypOutBuffPtr)); + CRYP_SetDMAConfig(hcryp, (uint32_t)(hcryp->pCrypInBuffPtr), (hcryp->Size / 4U), + (uint32_t)(hcryp->pCrypOutBuffPtr)); } else /*to compute last word<128bits, otherwise it will not be encrypted/decrypted */ { @@ -4529,7 +4533,8 @@ static HAL_StatusTypeDef CRYP_AESCCM_Process(CRYP_HandleTypeDef *hcryp, uint32_t else { /*Write Header block in the IN FIFO without last block */ - for (loopcounter = 0U; (loopcounter < ((hcryp->Init.HeaderSize) - (hcryp->Init.HeaderSize % 4U))); loopcounter += 4U) + for (loopcounter = 0U; (loopcounter < ((hcryp->Init.HeaderSize) - (hcryp->Init.HeaderSize % 4U))); + loopcounter += 4U) { /* Write the input block in the data input register */ hcryp->Instance->DINR = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount); @@ -4742,8 +4747,9 @@ static HAL_StatusTypeDef CRYP_AESCCM_Process(CRYP_HandleTypeDef *hcryp, uint32_t if ((hcryp->Size % 16U) != 0U) { - /* CRYP Workaround : CRYP1 generates correct TAG during CCM decryption only when ciphertext blocks size is multiple of - 128 bits. If lthe size of the last block of payload is inferior to 128 bits, when CCM decryption + /* CRYP Workaround : CRYP1 generates correct TAG during CCM decryption + only when ciphertext blocks size is multiple of128 bits. If lthe size of + the last block of payload is inferior to 128 bits, when CCM decryption is selected, then the TAG message will be wrong.*/ CRYP_Workaround(hcryp, Timeout); } @@ -4861,8 +4867,7 @@ static HAL_StatusTypeDef CRYP_AESCCM_Process_IT(CRYP_HandleTypeDef *hcryp) __HAL_UNLOCK(hcryp); return HAL_ERROR; } - } - while ((hcryp->Instance->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN); + } while ((hcryp->Instance->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN); /* Select header phase */ CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); @@ -4926,7 +4931,7 @@ static HAL_StatusTypeDef CRYP_AESCCM_Process_DMA(CRYP_HandleTypeDef *hcryp) uint32_t loopcounter; uint32_t npblb; uint32_t lastwordsize; -#endif +#endif /* AES */ if (hcryp->Init.KeyIVConfigSkip == CRYP_KEYIVCONFIG_ONCE) { @@ -5023,8 +5028,7 @@ static HAL_StatusTypeDef CRYP_AESCCM_Process_DMA(CRYP_HandleTypeDef *hcryp) __HAL_UNLOCK(hcryp); return HAL_ERROR; } - } - while ((hcryp->Instance->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN); + } while ((hcryp->Instance->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN); #else /* AES */ @@ -5070,8 +5074,7 @@ static HAL_StatusTypeDef CRYP_AESCCM_Process_DMA(CRYP_HandleTypeDef *hcryp) __HAL_UNLOCK(hcryp); return HAL_ERROR; } - } - while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)); + } while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)); /* Clear CCF flag */ __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR); @@ -5116,8 +5119,7 @@ static HAL_StatusTypeDef CRYP_AESCCM_Process_DMA(CRYP_HandleTypeDef *hcryp) __HAL_UNLOCK(hcryp); return HAL_ERROR; } - } - while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)); + } while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)); /* Clear CCF flag */ __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR); } @@ -5125,7 +5127,8 @@ static HAL_StatusTypeDef CRYP_AESCCM_Process_DMA(CRYP_HandleTypeDef *hcryp) else { /*Write Header block in the IN FIFO without last block */ - for (loopcounter = 0U; (loopcounter < ((hcryp->Init.HeaderSize) - (hcryp->Init.HeaderSize % 4U))); loopcounter += 4U) + for (loopcounter = 0U; (loopcounter < ((hcryp->Init.HeaderSize) - (hcryp->Init.HeaderSize % 4U))); + loopcounter += 4U) { /* Write the input block in the data input register */ hcryp->Instance->DINR = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount); @@ -5154,8 +5157,7 @@ static HAL_StatusTypeDef CRYP_AESCCM_Process_DMA(CRYP_HandleTypeDef *hcryp) __HAL_UNLOCK(hcryp); return HAL_ERROR; } - } - while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)); + } while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)); /* Clear CCF flag */ __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR); } @@ -5189,8 +5191,7 @@ static HAL_StatusTypeDef CRYP_AESCCM_Process_DMA(CRYP_HandleTypeDef *hcryp) __HAL_UNLOCK(hcryp); return HAL_ERROR; } - } - while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)); + } while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)); /* Clear CCF flag */ __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR); } @@ -5204,7 +5205,8 @@ static HAL_StatusTypeDef CRYP_AESCCM_Process_DMA(CRYP_HandleTypeDef *hcryp) { if ((hcryp->Size % 16U) == 0U) { - CRYP_SetDMAConfig(hcryp, (uint32_t)(hcryp->pCrypInBuffPtr), (hcryp->Size / 4U), (uint32_t)(hcryp->pCrypOutBuffPtr)); + CRYP_SetDMAConfig(hcryp, (uint32_t)(hcryp->pCrypInBuffPtr), (hcryp->Size / 4U), + (uint32_t)(hcryp->pCrypOutBuffPtr)); } else /*to compute last word<128bits, otherwise it will not be encrypted/decrypted */ { @@ -5259,8 +5261,7 @@ static HAL_StatusTypeDef CRYP_AESCCM_Process_DMA(CRYP_HandleTypeDef *hcryp) __HAL_UNLOCK(hcryp); return HAL_ERROR; } - } - while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)); + } while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)); /* Clear CCF flag */ __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR); @@ -5391,7 +5392,8 @@ static void CRYP_GCMCCM_SetPayloadPhase_IT(CRYP_HandleTypeDef *hcryp) } if (hcryp->CrypOutCount < (hcryp->Size / 4U)) { - /* Read the output block from the Output FIFO and put them in temporary buffer then get CrypOutBuff from temporary buffer */ + /* Read the output block from the Output FIFO and put them in temporary buffer then + get CrypOutBuff from temporary buffer */ for (i = 0U; i < 4U; i++) { temp[i] = hcryp->Instance->DOUT; @@ -5430,7 +5432,8 @@ static void CRYP_GCMCCM_SetPayloadPhase_IT(CRYP_HandleTypeDef *hcryp) } else if ((hcryp->Size % 16U) != 0U) { - /* Size should be %4 in word and %16 in byte otherwise TAG will be incorrectly generated for GCM Encryption & CCM Decryption + /* Size should be %4 in word and %16 in byte otherwise TAG will + be incorrectly generated for GCM Encryption & CCM Decryption Workaround is implemented in polling mode, so if last block of payload <128bit don't use CRYP_AESGCM_Encrypt_IT otherwise TAG is incorrectly generated. */ @@ -5510,7 +5513,8 @@ static void CRYP_GCMCCM_SetPayloadPhase_IT(CRYP_HandleTypeDef *hcryp) } #else /* AES */ - /* Read the output block from the output FIFO and put them in temporary buffer then get CrypOutBuff from temporary buffer*/ + /* Read the output block from the output FIFO and put them in temporary buffer + then get CrypOutBuff from temporary buffer*/ for (i = 0U; i < 4U; i++) { temp[i] = hcryp->Instance->DOUTR; @@ -5572,8 +5576,9 @@ static void CRYP_GCMCCM_SetPayloadPhase_IT(CRYP_HandleTypeDef *hcryp) else /* Last block of payload < 128bit*/ { /* Workaround not implemented, Size should be %4 otherwise Tag will be incorrectly - generated for GCM Encryption & CCM Decryption. Workaround is implemented in polling mode, so if last block of - payload <128bit don't use CRYP_Encrypt_IT otherwise TAG is incorrectly generated for GCM Encryption & CCM Decryption. */ + generated for GCM Encryption & CCM Decryption. Workaround is implemented in polling mode, + so if last block of payload <128bit don't use CRYP_Encrypt_IT otherwise TAG is incorrectly + generated for GCM Encryption & CCM Decryption. */ /* Compute the number of padding bytes in last block of payload */ npblb = ((((uint32_t)(hcryp->Size) / 16U) + 1U) * 16U) - (uint32_t)(hcryp->Size); @@ -5620,7 +5625,8 @@ static HAL_StatusTypeDef CRYP_GCMCCM_SetHeaderPhase(CRYP_HandleTypeDef *hcryp, u uint32_t tmp; uint32_t mask[12] = {0x0U, 0xFF000000U, 0xFFFF0000U, 0xFFFFFF00U, /* 32-bit data type */ 0x0U, 0x0000FF00U, 0x0000FFFFU, 0xFF00FFFFU, /* 16-bit data type */ - 0x0U, 0x000000FFU, 0x0000FFFFU, 0x00FFFFFFU}; /* 8-bit data type */ + 0x0U, 0x000000FFU, 0x0000FFFFU, 0x00FFFFFFU + }; /* 8-bit data type */ /***************************** Header phase for GCM/GMAC or CCM *********************************/ @@ -5723,7 +5729,7 @@ static HAL_StatusTypeDef CRYP_GCMCCM_SetHeaderPhase(CRYP_HandleTypeDef *hcryp, u { /* Enter last bytes, padded with zeroes */ tmp = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount); - tmp &= mask[(hcryp->Init.DataType * 2U) + (size_in_bytes % 4U)]; + tmp &= mask[(((hcryp->Init.DataType) >> 5) * 2U) + (size_in_bytes % 4U)]; hcryp->Instance->DIN = tmp; loopcounter++; /* Pad the data with zeros to have a complete block */ @@ -5924,7 +5930,8 @@ static HAL_StatusTypeDef CRYP_GCMCCM_SetHeaderPhase_DMA(CRYP_HandleTypeDef *hcry uint32_t tmp; uint32_t mask[12] = {0x0U, 0xFF000000U, 0xFFFF0000U, 0xFFFFFF00U, /* 32-bit data type */ 0x0U, 0x0000FF00U, 0x0000FFFFU, 0xFF00FFFFU, /* 16-bit data type */ - 0x0U, 0x000000FFU, 0x0000FFFFU, 0x00FFFFFFU}; /* 8-bit data type */ + 0x0U, 0x000000FFU, 0x0000FFFFU, 0x00FFFFFFU + }; /* 8-bit data type */ /***************************** Header phase for GCM/GMAC or CCM *********************************/ if (hcryp->Init.HeaderWidthUnit == CRYP_HEADERWIDTHUNIT_WORD) @@ -5979,8 +5986,7 @@ static HAL_StatusTypeDef CRYP_GCMCCM_SetHeaderPhase_DMA(CRYP_HandleTypeDef *hcry __HAL_UNLOCK(hcryp); return HAL_ERROR; } - } - while (HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_IFEM)); + } while (HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_IFEM)); } } else @@ -6015,8 +6021,7 @@ static HAL_StatusTypeDef CRYP_GCMCCM_SetHeaderPhase_DMA(CRYP_HandleTypeDef *hcry __HAL_UNLOCK(hcryp); return HAL_ERROR; } - } - while (HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_IFEM)); + } while (HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_IFEM)); } /* Last block optionally pad the data with zeros*/ for (loopcounter = 0U; (loopcounter < ((headersize_in_bytes / 4U) % 4U)); loopcounter++) @@ -6038,7 +6043,7 @@ static HAL_StatusTypeDef CRYP_GCMCCM_SetHeaderPhase_DMA(CRYP_HandleTypeDef *hcry { /* Enter last bytes, padded with zeroes */ tmp = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount); - tmp &= mask[(hcryp->Init.DataType * 2U) + (headersize_in_bytes % 4U)]; + tmp &= mask[(((hcryp->Init.DataType) >> 5) * 2U) + (headersize_in_bytes % 4U)]; hcryp->Instance->DIN = tmp; loopcounter++; /* Pad the data with zeros to have a complete block */ @@ -6066,8 +6071,7 @@ static HAL_StatusTypeDef CRYP_GCMCCM_SetHeaderPhase_DMA(CRYP_HandleTypeDef *hcry __HAL_UNLOCK(hcryp); return HAL_ERROR; } - } - while (HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_IFEM)); + } while (HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_IFEM)); } /* Wait until the complete message has been processed */ count = CRYP_TIMEOUT_GCMCCMHEADERPHASE; @@ -6087,8 +6091,7 @@ static HAL_StatusTypeDef CRYP_GCMCCM_SetHeaderPhase_DMA(CRYP_HandleTypeDef *hcry __HAL_UNLOCK(hcryp); return HAL_ERROR; } - } - while (HAL_IS_BIT_SET(hcryp->Instance->SR, CRYP_FLAG_BUSY)); + } while (HAL_IS_BIT_SET(hcryp->Instance->SR, CRYP_FLAG_BUSY)); #else /* AES */ @@ -6136,8 +6139,7 @@ static HAL_StatusTypeDef CRYP_GCMCCM_SetHeaderPhase_DMA(CRYP_HandleTypeDef *hcry __HAL_UNLOCK(hcryp); return HAL_ERROR; } - } - while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)); + } while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)); /* Clear CCF flag */ __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR); @@ -6176,8 +6178,7 @@ static HAL_StatusTypeDef CRYP_GCMCCM_SetHeaderPhase_DMA(CRYP_HandleTypeDef *hcry __HAL_UNLOCK(hcryp); return HAL_ERROR; } - } - while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)); + } while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)); /* Clear CCF flag */ __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR); @@ -6230,8 +6231,7 @@ static HAL_StatusTypeDef CRYP_GCMCCM_SetHeaderPhase_DMA(CRYP_HandleTypeDef *hcry __HAL_UNLOCK(hcryp); return HAL_ERROR; } - } - while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)); + } while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)); /* Clear CCF flag */ __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR); @@ -6267,15 +6267,16 @@ static HAL_StatusTypeDef CRYP_GCMCCM_SetHeaderPhase_DMA(CRYP_HandleTypeDef *hcry static void CRYP_GCMCCM_SetHeaderPhase_IT(CRYP_HandleTypeDef *hcryp) { uint32_t loopcounter; + uint32_t headersize_in_bytes; #if defined(AES) uint32_t lastwordsize; uint32_t npblb; -#endif - uint32_t headersize_in_bytes; +#endif /* AES */ uint32_t tmp; uint32_t mask[12] = {0x0U, 0xFF000000U, 0xFFFF0000U, 0xFFFFFF00U, /* 32-bit data type */ 0x0U, 0x0000FF00U, 0x0000FFFFU, 0xFF00FFFFU, /* 16-bit data type */ - 0x0U, 0x000000FFU, 0x0000FFFFU, 0x00FFFFFFU}; /* 8-bit data type */ + 0x0U, 0x000000FFU, 0x0000FFFFU, 0x00FFFFFFU + }; /* 8-bit data type */ if (hcryp->Init.HeaderWidthUnit == CRYP_HEADERWIDTHUNIT_WORD) { @@ -6344,7 +6345,7 @@ static void CRYP_GCMCCM_SetHeaderPhase_IT(CRYP_HandleTypeDef *hcryp) { /* Enter last bytes, padded with zeros */ tmp = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount); - tmp &= mask[(hcryp->Init.DataType * 2U) + (headersize_in_bytes % 4U)]; + tmp &= mask[(((hcryp->Init.DataType) >> 5) * 2U) + (headersize_in_bytes % 4U)]; hcryp->Instance->DIN = tmp; loopcounter++; hcryp->CrypHeaderCount++; @@ -7129,8 +7130,6 @@ static HAL_StatusTypeDef CRYP_WaitOnCCFlag(CRYP_HandleTypeDef *hcryp, uint32_t T * @} */ - - /** * @} */ diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cryp_ex.c b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cryp_ex.c index 0170632384..7f0a2e02dd 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cryp_ex.c +++ b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cryp_ex.c @@ -93,7 +93,6 @@ /* Private function prototypes -----------------------------------------------*/ - /* Exported functions---------------------------------------------------------*/ /** @addtogroup CRYPEx_Exported_Functions * @{ diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dcmi.c b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dcmi.c index 2ce3477fbd..bbf9a90eff 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dcmi.c +++ b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dcmi.c @@ -86,7 +86,7 @@ and a pointer to the user callback function. Use function HAL_DCMI_UnRegisterCallback() to reset a callback to the default - weak (surcharged) function. + weak (overridden) function. HAL_DCMI_UnRegisterCallback() takes as parameters the HAL peripheral handle, and the callback ID. This function allows to reset following callbacks: @@ -98,10 +98,10 @@ (+) MspDeInitCallback : callback for DCMI MspDeInit. By default, after the HAL_DCMI_Init and if the state is HAL_DCMI_STATE_RESET - all callbacks are reset to the corresponding legacy weak (surcharged) functions: + all callbacks are reset to the corresponding legacy weak (overridden) functions: examples FrameEventCallback(), HAL_DCMI_ErrorCallback(). Exception done for MspInit and MspDeInit callbacks that are respectively - reset to the legacy weak (surcharged) functions in the HAL_DCMI_Init + reset to the legacy weak (overridden) functions in the HAL_DCMI_Init and HAL_DCMI_DeInit only when these callbacks are null (not registered beforehand). If not, MspInit or MspDeInit are not null, the HAL_DCMI_Init and HAL_DCMI_DeInit keep and use the user MspInit/MspDeInit callbacks (registered beforehand). @@ -116,7 +116,7 @@ When the compilation define USE_HAL_DCMI_REGISTER_CALLBACKS is set to 0 or not defined, the callback registering feature is not available - and weak (surcharged) callbacks are used. + and weak (overridden) callbacks are used. @endverbatim ****************************************************************************** @@ -902,7 +902,7 @@ HAL_StatusTypeDef HAL_DCMI_EnableCrop(DCMI_HandleTypeDef *hdcmi) * the embedded synchronization delimiters unmasks. * @retval HAL status */ -HAL_StatusTypeDef HAL_DCMI_ConfigSyncUnmask(DCMI_HandleTypeDef *hdcmi, DCMI_SyncUnmaskTypeDef *SyncUnmask) +HAL_StatusTypeDef HAL_DCMI_ConfigSyncUnmask(DCMI_HandleTypeDef *hdcmi, const DCMI_SyncUnmaskTypeDef *SyncUnmask) { /* Process Locked */ __HAL_LOCK(hdcmi); diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c index 278d204e97..b7f70c524c 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c +++ b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c @@ -706,7 +706,7 @@ HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, HAL_DMA_Level { if((hdma->ErrorCode & HAL_DMA_ERROR_TE) != RESET) { - HAL_DMA_Abort(hdma); + (void)HAL_DMA_Abort(hdma); /* Clear the half transfer and transfer complete flags */ regs->IFCR = (DMA_FLAG_HTIF0_4 | DMA_FLAG_TCIF0_4) << hdma->StreamIndex; diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.c b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.c index 34117efa96..3e87186621 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.c +++ b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.c @@ -324,7 +324,7 @@ HAL_StatusTypeDef HAL_DMA2D_DeInit(DMA2D_HandleTypeDef *hdma2d) /* Before aborting any DMA2D transfer or CLUT loading, check first whether or not DMA2D clock is enabled */ - if (__HAL_RCC_DMA2D_IS_CLK_ENABLED()) + if (__HAL_RCC_DMA2D_IS_CLK_ENABLED() == 1U) { /* Abort DMA2D transfer if any */ if ((hdma2d->Instance->CR & DMA2D_CR_START) == DMA2D_CR_START) @@ -981,7 +981,8 @@ HAL_StatusTypeDef HAL_DMA2D_EnableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t Lay * DMA2D_BACKGROUND_LAYER(0) / DMA2D_FOREGROUND_LAYER(1) * @retval HAL status */ -HAL_StatusTypeDef HAL_DMA2D_CLUTStartLoad(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef *CLUTCfg, uint32_t LayerIdx) +HAL_StatusTypeDef HAL_DMA2D_CLUTStartLoad(DMA2D_HandleTypeDef *hdma2d, const DMA2D_CLUTCfgTypeDef *CLUTCfg, + uint32_t LayerIdx) { /* Check the parameters */ assert_param(IS_DMA2D_LAYER(LayerIdx)); @@ -1035,7 +1036,7 @@ HAL_StatusTypeDef HAL_DMA2D_CLUTStartLoad(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLU * DMA2D_BACKGROUND_LAYER(0) / DMA2D_FOREGROUND_LAYER(1) * @retval HAL status */ -HAL_StatusTypeDef HAL_DMA2D_CLUTStartLoad_IT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef *CLUTCfg, +HAL_StatusTypeDef HAL_DMA2D_CLUTStartLoad_IT(DMA2D_HandleTypeDef *hdma2d, const DMA2D_CLUTCfgTypeDef *CLUTCfg, uint32_t LayerIdx) { /* Check the parameters */ @@ -1738,7 +1739,7 @@ __weak void HAL_DMA2D_CLUTLoadingCpltCallback(DMA2D_HandleTypeDef *hdma2d) */ HAL_StatusTypeDef HAL_DMA2D_ConfigLayer(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx) { - DMA2D_LayerCfgTypeDef *pLayerCfg; + const DMA2D_LayerCfgTypeDef *pLayerCfg; uint32_t regMask; uint32_t regValue; @@ -2027,7 +2028,7 @@ HAL_StatusTypeDef HAL_DMA2D_ConfigDeadTime(DMA2D_HandleTypeDef *hdma2d, uint8_t * the configuration information for the DMA2D. * @retval HAL state */ -HAL_DMA2D_StateTypeDef HAL_DMA2D_GetState(DMA2D_HandleTypeDef *hdma2d) +HAL_DMA2D_StateTypeDef HAL_DMA2D_GetState(const DMA2D_HandleTypeDef *hdma2d) { return hdma2d->State; } @@ -2038,7 +2039,7 @@ HAL_DMA2D_StateTypeDef HAL_DMA2D_GetState(DMA2D_HandleTypeDef *hdma2d) * the configuration information for DMA2D. * @retval DMA2D Error Code */ -uint32_t HAL_DMA2D_GetError(DMA2D_HandleTypeDef *hdma2d) +uint32_t HAL_DMA2D_GetError(const DMA2D_HandleTypeDef *hdma2d) { return hdma2d->ErrorCode; } diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.c b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.c index 77d6f84e62..73f72d1e2e 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.c +++ b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.c @@ -83,6 +83,7 @@ (##) HAL_ETH_PTP_GetTime(): Get Seconds and Nanoseconds for the Ethernet PTP registers (##) HAL_ETH_PTP_SetTime(): Set Seconds and Nanoseconds for the Ethernet PTP registers (##) HAL_ETH_PTP_AddTimeOffset(): Add Seconds and Nanoseconds offset for the Ethernet PTP registers + (##) HAL_ETH_PTP_AddendUpdate(): Update the Addend register (##) HAL_ETH_PTP_InsertTxTimestamp(): Insert Timestamp in transmission (##) HAL_ETH_PTP_GetTxTimestamp(): Get transmission timestamp (##) HAL_ETH_PTP_GetRxTimestamp(): Get reception timestamp @@ -290,6 +291,11 @@ static void ETH_MACAddressConfig(ETH_HandleTypeDef *heth, uint32_t MacAddr, uint #if (USE_HAL_ETH_REGISTER_CALLBACKS == 1) static void ETH_InitCallbacksToDefault(ETH_HandleTypeDef *heth); #endif /* USE_HAL_ETH_REGISTER_CALLBACKS */ + +#ifdef HAL_ETH_USE_PTP +static HAL_StatusTypeDef HAL_ETH_PTP_AddendUpdate(ETH_HandleTypeDef *heth, int32_t timeoffset); +#endif /* HAL_ETH_USE_PTP */ + /** * @} */ @@ -1124,7 +1130,7 @@ HAL_StatusTypeDef HAL_ETH_ReadData(ETH_HandleTypeDef *heth, void **pAppBuff) heth->RxDescList.RxDataLength = 0; } - /* Get the Frame Length of the received packet: substruct 4 bytes of the CRC */ + /* Get the Frame Length of the received packet */ bufflength = ((dmarxdesc->DESC0 & ETH_DMARXDESC_FL) >> ETH_DMARXDESC_FRAMELENGTHSHIFT); /* Check if last descriptor */ @@ -1254,7 +1260,7 @@ static void ETH_UpdateDescriptor(ETH_HandleTypeDef *heth) if (heth->RxDescList.RxBuildDescCnt != desccount) { /* Set the tail pointer index */ - tailidx = (descidx + 1U) % ETH_RX_DESC_CNT; + tailidx = (ETH_RX_DESC_CNT + descidx - 1U) % ETH_RX_DESC_CNT; /* DMB instruction to avoid race condition */ __DMB(); @@ -1472,8 +1478,8 @@ HAL_StatusTypeDef HAL_ETH_ReleaseTxPacket(ETH_HandleTypeDef *heth) if ((heth->Init.TxDesc[idx].DESC0 & ETH_DMATXDESC_OWN) == 0U) { #ifdef HAL_ETH_USE_PTP - if ((heth->Init.TxDesc[idx].DESC3 & ETH_DMATXDESC_LS) - && (heth->Init.TxDesc[idx].DESC3 & ETH_DMATXDESC_TTSS)) + if ((heth->Init.TxDesc[idx].DESC0 & ETH_DMATXDESC_LS) + && (heth->Init.TxDesc[idx].DESC0 & ETH_DMATXDESC_TTSS)) { /* Get timestamp low */ timestamp->TimeStampLow = heth->Init.TxDesc[idx].DESC6; @@ -1547,6 +1553,9 @@ HAL_StatusTypeDef HAL_ETH_PTP_SetConfig(ETH_HandleTypeDef *heth, ETH_PTP_ConfigT return HAL_ERROR; } + /* Mask the Timestamp Trigger interrupt */ + CLEAR_BIT(heth->Instance->MACIMR, ETH_MACIMR_TSTIM); + tmpTSCR = ptpconfig->Timestamp | ((uint32_t)ptpconfig->TimestampUpdate << ETH_PTPTSCR_TSFCU_Pos) | ((uint32_t)ptpconfig->TimestampAll << ETH_PTPTSCR_TSSARFE_Pos) | @@ -1578,8 +1587,11 @@ HAL_StatusTypeDef HAL_ETH_PTP_SetConfig(ETH_HandleTypeDef *heth, ETH_PTP_ConfigT } } - /* Ptp Init */ - SET_BIT(heth->Instance->PTPTSCR, ETH_PTPTSCR_TSSTI); + /* Enable Update mode */ + if (ptpconfig->TimestampUpdateMode == ENABLE) + { + SET_BIT(heth->Instance->PTPTSCR, ETH_PTPTSCR_TSFCU); + } /* Set PTP Configuration done */ heth->IsPtpConfigured = HAL_ETH_PTP_CONFIGURED; @@ -1591,6 +1603,9 @@ HAL_StatusTypeDef HAL_ETH_PTP_SetConfig(ETH_HandleTypeDef *heth, ETH_PTP_ConfigT HAL_ETH_PTP_SetTime(heth, &time); + /* Ptp Init */ + SET_BIT(heth->Instance->PTPTSCR, ETH_PTPTSCR_TSSTI); + /* Return function status */ return HAL_OK; } @@ -1708,6 +1723,7 @@ HAL_StatusTypeDef HAL_ETH_PTP_GetTime(ETH_HandleTypeDef *heth, ETH_TimeTypeDef * HAL_StatusTypeDef HAL_ETH_PTP_AddTimeOffset(ETH_HandleTypeDef *heth, ETH_PtpUpdateTypeDef ptpoffsettype, ETH_TimeTypeDef *timeoffset) { + int32_t addendtime ; if (heth->IsPtpConfigured == HAL_ETH_PTP_CONFIGURED) { if (ptpoffsettype == HAL_ETH_PTP_NEGATIVE_UPDATE) @@ -1724,6 +1740,11 @@ HAL_StatusTypeDef HAL_ETH_PTP_AddTimeOffset(ETH_HandleTypeDef *heth, ETH_PtpUpda { heth->Instance->PTPTSLUR = ETH_PTPTSHR_VALUE - timeoffset->NanoSeconds + 1U; } + + /* adjust negative addend register */ + addendtime = - timeoffset->NanoSeconds; + HAL_ETH_PTP_AddendUpdate(heth, addendtime); + } else { @@ -1731,6 +1752,11 @@ HAL_StatusTypeDef HAL_ETH_PTP_AddTimeOffset(ETH_HandleTypeDef *heth, ETH_PtpUpda heth->Instance->PTPTSHUR = timeoffset->Seconds; /* Set nanoSeconds update */ heth->Instance->PTPTSLUR = timeoffset->NanoSeconds; + + /* adjust positive addend register */ + addendtime = timeoffset->NanoSeconds; + HAL_ETH_PTP_AddendUpdate(heth, addendtime); + } SET_BIT(heth->Instance->PTPTSCR, ETH_PTPTSCR_TSSTU); @@ -1745,6 +1771,40 @@ HAL_StatusTypeDef HAL_ETH_PTP_AddTimeOffset(ETH_HandleTypeDef *heth, ETH_PtpUpda } } +/** + * @brief Update the Addend register + * @param heth: Pointer to a ETH_HandleTypeDef structure that contains + * the configuration information for ETHERNET module + * @param timeoffset: The value of the time offset to be added to + * the addend register in Nanoseconds + * @retval HAL status + */ +static HAL_StatusTypeDef HAL_ETH_PTP_AddendUpdate(ETH_HandleTypeDef *heth, int32_t timeoffset) +{ + uint32_t tmpreg; + if (heth->IsPtpConfigured == HAL_ETH_PTP_CONFIGURED) + { + /* update the addend register */ + + tmpreg = READ_REG(heth->Instance->PTPTSAR); + tmpreg += timeoffset ; + WRITE_REG(heth->Instance->PTPTSAR, tmpreg); + + SET_BIT(heth->Instance->PTPTSCR, ETH_PTPTSCR_TSARU); + while ((heth->Instance->PTPTSCR & ETH_PTPTSCR_TSARU) != 0) + { + + } + + /* Return function status */ + return HAL_OK; + } + else + { + /* Return function status */ + return HAL_ERROR; + } +} /** * @brief Insert Timestamp in transmission. * @param heth: pointer to a ETH_HandleTypeDef structure that contains @@ -2398,7 +2458,7 @@ HAL_StatusTypeDef HAL_ETH_SetMACFilterConfig(ETH_HandleTypeDef *heth, const ETH_ ((uint32_t)pFilterConfig->HashMulticast << 2) | ((uint32_t)pFilterConfig->DestAddrInverseFiltering << 3) | ((uint32_t)pFilterConfig->PassAllMulticast << 4) | - ((uint32_t)((pFilterConfig->BroadcastFilter == DISABLE) ? 1U : 0U) << 5) | + ((uint32_t)((pFilterConfig->BroadcastFilter == ENABLE) ? 1U : 0U) << 5) | ((uint32_t)pFilterConfig->SrcAddrInverseFiltering << 8) | ((uint32_t)pFilterConfig->SrcAddrFiltering << 9) | ((uint32_t)pFilterConfig->HachOrPerfectFilter << 10) | @@ -2437,7 +2497,7 @@ HAL_StatusTypeDef HAL_ETH_GetMACFilterConfig(const ETH_HandleTypeDef *heth, ETH_ pFilterConfig->DestAddrInverseFiltering = ((READ_BIT(heth->Instance->MACFFR, ETH_MACFFR_DAIF) >> 3) > 0U) ? ENABLE : DISABLE; pFilterConfig->PassAllMulticast = ((READ_BIT(heth->Instance->MACFFR, ETH_MACFFR_PAM) >> 4) > 0U) ? ENABLE : DISABLE; - pFilterConfig->BroadcastFilter = ((READ_BIT(heth->Instance->MACFFR, ETH_MACFFR_BFD) >> 5) == 0U) ? ENABLE : DISABLE; + pFilterConfig->BroadcastFilter = ((READ_BIT(heth->Instance->MACFFR, ETH_MACFFR_BFD) >> 5) > 0U) ? ENABLE : DISABLE; pFilterConfig->ControlPacketsFilter = READ_BIT(heth->Instance->MACFFR, ETH_MACFFR_PCF); pFilterConfig->SrcAddrInverseFiltering = ((READ_BIT(heth->Instance->MACFFR, ETH_MACFFR_SAIF) >> 8) > 0U) ? ENABLE : DISABLE; @@ -2714,6 +2774,16 @@ uint32_t HAL_ETH_GetMACWakeUpSource(const ETH_HandleTypeDef *heth) return heth->MACWakeUpEvent; } +/** + * @brief Returns the ETH Tx Buffers in use number + * @param heth: pointer to a ETH_HandleTypeDef structure that contains + * the configuration information for ETHERNET module + * @retval ETH Tx Buffers in use number + */ +uint32_t HAL_ETH_GetTxBuffersNumber(const ETH_HandleTypeDef *heth) +{ + return heth->TxDescList.BuffersInUse; +} /** * @} */ @@ -3046,7 +3116,7 @@ static void ETH_DMARxDescListInit(ETH_HandleTypeDef *heth) * @param heth: pointer to a ETH_HandleTypeDef structure that contains * the configuration information for ETHERNET module * @param pTxConfig: Tx packet configuration - * @param ItMode: Enable or disable Tx EOT interrept + * @param ItMode: Enable or disable Tx EOT interrupt * @retval Status */ static uint32_t ETH_Prepare_Tx_Descriptors(ETH_HandleTypeDef *heth, const ETH_TxPacketConfigTypeDef *pTxConfig, diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c index 60176b4bca..d7be4a69d3 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c +++ b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c @@ -161,7 +161,7 @@ HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout); */ HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data) { - HAL_StatusTypeDef status = HAL_ERROR; + HAL_StatusTypeDef status; /* Process Locked */ __HAL_LOCK(&pFlash); diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c index a704a979c2..0383b4337c 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c +++ b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c @@ -155,7 +155,7 @@ extern HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout); */ HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *SectorError) { - HAL_StatusTypeDef status = HAL_ERROR; + HAL_StatusTypeDef status; uint32_t index = 0; /* Process Locked */ diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_hash.c b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_hash.c index 1f6ab5bfa8..6836734cba 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_hash.c +++ b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_hash.c @@ -272,10 +272,10 @@ */ static void HASH_DMAXferCplt(DMA_HandleTypeDef *hdma); static void HASH_DMAError(DMA_HandleTypeDef *hdma); -static void HASH_GetDigest(uint8_t *pMsgDigest, uint8_t Size); +static void HASH_GetDigest(const uint8_t *pMsgDigest, uint8_t Size); static HAL_StatusTypeDef HASH_WaitOnFlagUntilTimeout(HASH_HandleTypeDef *hhash, uint32_t Flag, FlagStatus Status, uint32_t Timeout); -static HAL_StatusTypeDef HASH_WriteData(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); +static HAL_StatusTypeDef HASH_WriteData(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); static HAL_StatusTypeDef HASH_IT(HASH_HandleTypeDef *hhash); static uint32_t HASH_Write_Block_Data(HASH_HandleTypeDef *hhash); static HAL_StatusTypeDef HMAC_Processing(HASH_HandleTypeDef *hhash, uint32_t Timeout); @@ -764,7 +764,8 @@ HAL_StatusTypeDef HAL_HASH_UnRegisterCallback(HASH_HandleTypeDef *hhash, HAL_HAS * @param Timeout Timeout value * @retval HAL status */ -HAL_StatusTypeDef HAL_HASH_MD5_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t *pOutBuffer, +HAL_StatusTypeDef HAL_HASH_MD5_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, + uint8_t *pOutBuffer, uint32_t Timeout) { return HASH_Start(hhash, pInBuffer, Size, pOutBuffer, Timeout, HASH_ALGOSELECTION_MD5); @@ -790,7 +791,7 @@ HAL_StatusTypeDef HAL_HASH_MD5_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuff * @param Size length of the input buffer in bytes, must be a multiple of 4. * @retval HAL status */ -HAL_StatusTypeDef HAL_HASH_MD5_Accmlt(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HASH_MD5_Accmlt(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { return HASH_Accumulate(hhash, pInBuffer, Size, HASH_ALGOSELECTION_MD5); } @@ -805,7 +806,7 @@ HAL_StatusTypeDef HAL_HASH_MD5_Accmlt(HASH_HandleTypeDef *hhash, uint8_t *pInBuf * @param Timeout Timeout value * @retval HAL status */ -HAL_StatusTypeDef HAL_HASH_MD5_Accmlt_End(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASH_MD5_Accmlt_End(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer, uint32_t Timeout) { return HASH_Start(hhash, pInBuffer, Size, pOutBuffer, Timeout, HASH_ALGOSELECTION_MD5); @@ -822,7 +823,8 @@ HAL_StatusTypeDef HAL_HASH_MD5_Accmlt_End(HASH_HandleTypeDef *hhash, uint8_t *pI * @param Timeout Timeout value * @retval HAL status */ -HAL_StatusTypeDef HAL_HASH_SHA1_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t *pOutBuffer, +HAL_StatusTypeDef HAL_HASH_SHA1_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, + uint8_t *pOutBuffer, uint32_t Timeout) { return HASH_Start(hhash, pInBuffer, Size, pOutBuffer, Timeout, HASH_ALGOSELECTION_SHA1); @@ -848,7 +850,7 @@ HAL_StatusTypeDef HAL_HASH_SHA1_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuf * @param Size length of the input buffer in bytes, must be a multiple of 4. * @retval HAL status */ -HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { return HASH_Accumulate(hhash, pInBuffer, Size, HASH_ALGOSELECTION_SHA1); } @@ -863,7 +865,7 @@ HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt(HASH_HandleTypeDef *hhash, uint8_t *pInBu * @param Timeout Timeout value * @retval HAL status */ -HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt_End(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt_End(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer, uint32_t Timeout) { return HASH_Start(hhash, pInBuffer, Size, pOutBuffer, Timeout, HASH_ALGOSELECTION_SHA1); @@ -911,7 +913,7 @@ HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt_End(HASH_HandleTypeDef *hhash, uint8_t *p * @param pOutBuffer pointer to the computed digest. Digest size is 16 bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HASH_MD5_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASH_MD5_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer) { return HASH_Start_IT(hhash, pInBuffer, Size, pOutBuffer, HASH_ALGOSELECTION_MD5); @@ -935,7 +937,7 @@ HAL_StatusTypeDef HAL_HASH_MD5_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInB * @param Size length of the input buffer in bytes, must be a multiple of 4. * @retval HAL status */ -HAL_StatusTypeDef HAL_HASH_MD5_Accmlt_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HASH_MD5_Accmlt_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { return HASH_Accumulate_IT(hhash, pInBuffer, Size, HASH_ALGOSELECTION_MD5); } @@ -949,7 +951,7 @@ HAL_StatusTypeDef HAL_HASH_MD5_Accmlt_IT(HASH_HandleTypeDef *hhash, uint8_t *pIn * @param pOutBuffer pointer to the computed digest. Digest size is 16 bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HASH_MD5_Accmlt_End_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASH_MD5_Accmlt_End_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer) { return HASH_Start_IT(hhash, pInBuffer, Size, pOutBuffer, HASH_ALGOSELECTION_MD5); @@ -965,7 +967,7 @@ HAL_StatusTypeDef HAL_HASH_MD5_Accmlt_End_IT(HASH_HandleTypeDef *hhash, uint8_t * @param pOutBuffer pointer to the computed digest. Digest size is 20 bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HASH_SHA1_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASH_SHA1_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer) { return HASH_Start_IT(hhash, pInBuffer, Size, pOutBuffer, HASH_ALGOSELECTION_SHA1); @@ -990,7 +992,7 @@ HAL_StatusTypeDef HAL_HASH_SHA1_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pIn * @param Size length of the input buffer in bytes, must be a multiple of 4. * @retval HAL status */ -HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { return HASH_Accumulate_IT(hhash, pInBuffer, Size, HASH_ALGOSELECTION_SHA1); } @@ -1004,7 +1006,7 @@ HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt_IT(HASH_HandleTypeDef *hhash, uint8_t *pI * @param pOutBuffer pointer to the computed digest. Digest size is 20 bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt_End_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt_End_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer) { return HASH_Start_IT(hhash, pInBuffer, Size, pOutBuffer, HASH_ALGOSELECTION_SHA1); @@ -1077,7 +1079,7 @@ void HAL_HASH_IRQHandler(HASH_HandleTypeDef *hhash) * @param Size length of the input buffer in bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HASH_MD5_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HASH_MD5_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { return HASH_Start_DMA(hhash, pInBuffer, Size, HASH_ALGOSELECTION_MD5); } @@ -1107,7 +1109,7 @@ HAL_StatusTypeDef HAL_HASH_MD5_Finish(HASH_HandleTypeDef *hhash, uint8_t *pOutBu * @param Size length of the input buffer in bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HASH_SHA1_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HASH_SHA1_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { return HASH_Start_DMA(hhash, pInBuffer, Size, HASH_ALGOSELECTION_SHA1); } @@ -1164,7 +1166,8 @@ HAL_StatusTypeDef HAL_HASH_SHA1_Finish(HASH_HandleTypeDef *hhash, uint8_t *pOutB * @param Timeout Timeout value. * @retval HAL status */ -HAL_StatusTypeDef HAL_HMAC_MD5_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t *pOutBuffer, +HAL_StatusTypeDef HAL_HMAC_MD5_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, + uint8_t *pOutBuffer, uint32_t Timeout) { return HMAC_Start(hhash, pInBuffer, Size, pOutBuffer, Timeout, HASH_ALGOSELECTION_MD5); @@ -1183,7 +1186,8 @@ HAL_StatusTypeDef HAL_HMAC_MD5_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuff * @param Timeout Timeout value. * @retval HAL status */ -HAL_StatusTypeDef HAL_HMAC_SHA1_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t *pOutBuffer, +HAL_StatusTypeDef HAL_HMAC_SHA1_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, + uint8_t *pOutBuffer, uint32_t Timeout) { return HMAC_Start(hhash, pInBuffer, Size, pOutBuffer, Timeout, HASH_ALGOSELECTION_SHA1); @@ -1225,7 +1229,7 @@ HAL_StatusTypeDef HAL_HMAC_SHA1_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuf * @param pOutBuffer pointer to the computed digest. Digest size is 16 bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HMAC_MD5_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HMAC_MD5_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer) { return HMAC_Start_IT(hhash, pInBuffer, Size, pOutBuffer, HASH_ALGOSELECTION_MD5); @@ -1243,7 +1247,7 @@ HAL_StatusTypeDef HAL_HMAC_MD5_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInB * @param pOutBuffer pointer to the computed digest. Digest size is 20 bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HMAC_SHA1_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HMAC_SHA1_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer) { return HMAC_Start_IT(hhash, pInBuffer, Size, pOutBuffer, HASH_ALGOSELECTION_SHA1); @@ -1254,7 +1258,6 @@ HAL_StatusTypeDef HAL_HMAC_SHA1_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pIn */ - /** @defgroup HASH_Exported_Functions_Group7 HMAC processing functions in DMA mode * @brief HMAC processing functions using DMA modes. * @@ -1297,7 +1300,7 @@ HAL_StatusTypeDef HAL_HMAC_SHA1_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pIn * @param Size length of the input buffer in bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HMAC_MD5_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HMAC_MD5_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { return HMAC_Start_DMA(hhash, pInBuffer, Size, HASH_ALGOSELECTION_MD5); } @@ -1322,7 +1325,7 @@ HAL_StatusTypeDef HAL_HMAC_MD5_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pIn * @param Size length of the input buffer in bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HMAC_SHA1_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HMAC_SHA1_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { return HMAC_Start_DMA(hhash, pInBuffer, Size, HASH_ALGOSELECTION_SHA1); } @@ -1369,7 +1372,7 @@ HAL_StatusTypeDef HAL_HMAC_SHA1_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pI * @param hhash HASH handle. * @retval HAL HASH state */ -HAL_HASH_StateTypeDef HAL_HASH_GetState(HASH_HandleTypeDef *hhash) +HAL_HASH_StateTypeDef HAL_HASH_GetState(const HASH_HandleTypeDef *hhash) { return hhash->State; } @@ -1382,7 +1385,7 @@ HAL_HASH_StateTypeDef HAL_HASH_GetState(HASH_HandleTypeDef *hhash) * @param hhash HASH handle. * @retval HAL status */ -HAL_StatusTypeDef HAL_HASH_GetStatus(HASH_HandleTypeDef *hhash) +HAL_StatusTypeDef HAL_HASH_GetStatus(const HASH_HandleTypeDef *hhash) { return hhash->Status; } @@ -1400,7 +1403,7 @@ HAL_StatusTypeDef HAL_HASH_GetStatus(HASH_HandleTypeDef *hhash) * must be at least (HASH_NUMBER_OF_CSR_REGISTERS + 3) * 4 uint8 long. * @retval None */ -void HAL_HASH_ContextSaving(HASH_HandleTypeDef *hhash, uint8_t *pMemBuffer) +void HAL_HASH_ContextSaving(const HASH_HandleTypeDef *hhash, const uint8_t *pMemBuffer) { uint32_t mem_ptr = (uint32_t)pMemBuffer; uint32_t csr_ptr = (uint32_t)HASH->CSR; @@ -1441,7 +1444,7 @@ void HAL_HASH_ContextSaving(HASH_HandleTypeDef *hhash, uint8_t *pMemBuffer) * beforehand). * @retval None */ -void HAL_HASH_ContextRestoring(HASH_HandleTypeDef *hhash, uint8_t *pMemBuffer) +void HAL_HASH_ContextRestoring(HASH_HandleTypeDef *hhash, const uint8_t *pMemBuffer) { uint32_t mem_ptr = (uint32_t)pMemBuffer; uint32_t csr_ptr = (uint32_t)HASH->CSR; @@ -1620,7 +1623,7 @@ HAL_StatusTypeDef HAL_HASH_DMAFeed_ProcessSuspend(HASH_HandleTypeDef *hhash) * @param hhash pointer to a HASH_HandleTypeDef structure. * @retval HASH Error Code */ -uint32_t HAL_HASH_GetError(HASH_HandleTypeDef *hhash) +uint32_t HAL_HASH_GetError(const HASH_HandleTypeDef *hhash) { /* Return HASH Error Code */ return hhash->ErrorCode; @@ -1821,13 +1824,13 @@ static void HASH_DMAError(DMA_HandleTypeDef *hdma) * suspension time is stored in the handle for resumption later on. * @retval HAL status */ -static HAL_StatusTypeDef HASH_WriteData(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +static HAL_StatusTypeDef HASH_WriteData(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { uint32_t buffercounter; __IO uint32_t inputaddr = (uint32_t) pInBuffer; uint32_t tmp; - for (buffercounter = 0U; buffercounter < Size / 4U; buffercounter++) + for (buffercounter = 0U; buffercounter < (Size / 4U); buffercounter++) { /* Write input data 4 bytes at a time */ HASH->DIN = *(uint32_t *)inputaddr; @@ -1835,10 +1838,10 @@ static HAL_StatusTypeDef HASH_WriteData(HASH_HandleTypeDef *hhash, uint8_t *pInB /* If the suspension flag has been raised and if the processing is not about to end, suspend processing */ - if ((hhash->SuspendRequest == HAL_HASH_SUSPEND) && ((buffercounter * 4 + 4U) < Size)) + if ((hhash->SuspendRequest == HAL_HASH_SUSPEND) && (((buffercounter * 4U) + 4U) < Size)) { /* wait for flag BUSY not set before Wait for DINIS = 1*/ - if (buffercounter * 4 >= 64U) + if ((buffercounter * 4U) >= 64U) { if (HASH_WaitOnFlagUntilTimeout(hhash, HASH_FLAG_BUSY, SET, HASH_TIMEOUTVALUE) != HAL_OK) { @@ -1859,14 +1862,14 @@ static HAL_StatusTypeDef HASH_WriteData(HASH_HandleTypeDef *hhash, uint8_t *pInB /* Save current reading and writing locations of Input and Output buffers */ hhash->pHashInBuffPtr = (uint8_t *)inputaddr; /* Save the number of bytes that remain to be processed at this point */ - hhash->HashInCount = Size - (buffercounter * 4 + 4U); + hhash->HashInCount = Size - ((buffercounter * 4U) + 4U); } else if ((hhash->Phase == HAL_HASH_PHASE_HMAC_STEP_1) || (hhash->Phase == HAL_HASH_PHASE_HMAC_STEP_3)) { /* Save current reading and writing locations of Input and Output buffers */ hhash->pHashKeyBuffPtr = (uint8_t *)inputaddr; /* Save the number of bytes that remain to be processed at this point */ - hhash->HashKeyCount = Size - (buffercounter * 4 + 4U); + hhash->HashKeyCount = Size - ((buffercounter * 4U) + 4U); } else { @@ -1886,17 +1889,17 @@ static HAL_StatusTypeDef HASH_WriteData(HASH_HandleTypeDef *hhash, uint8_t *pInB /* At this point, all the data have been entered to the Peripheral: exit */ - if (Size % 4U != 0U) + if ((Size % 4U) != 0U) { if (hhash->Init.DataType == HASH_DATATYPE_16B) { /* Write remaining input data */ - if (Size % 4U <= 2) + if ((Size % 4U) <= 2U) { HASH->DIN = (uint32_t) * (uint16_t *)inputaddr; } - if (Size % 4U == 3) + if ((Size % 4U) == 3U) { HASH->DIN = *(uint32_t *)inputaddr; } @@ -1906,19 +1909,19 @@ static HAL_StatusTypeDef HASH_WriteData(HASH_HandleTypeDef *hhash, uint8_t *pInB || (hhash->Init.DataType == HASH_DATATYPE_1B)) /* byte swap or bit swap or */ { /* Write remaining input data */ - if (Size % 4U == 1) + if ((Size % 4U) == 1U) { HASH->DIN = (uint32_t) * (uint8_t *)inputaddr; } - if (Size % 4U == 2) + if ((Size % 4U) == 2U) { HASH->DIN = (uint32_t) * (uint16_t *)inputaddr; } - if (Size % 4U == 3) + if ((Size % 4U) == 3U) { tmp = *(uint8_t *)inputaddr; - tmp |= *(uint8_t *)(inputaddr + 1U) << 8U ; - tmp |= *(uint8_t *)(inputaddr + 2U) << 16U; + tmp |= (uint32_t) * (uint8_t *)(inputaddr + 1U) << 8U; + tmp |= (uint32_t) * (uint8_t *)(inputaddr + 2U) << 16U; HASH->DIN = tmp; } @@ -1927,7 +1930,6 @@ static HAL_StatusTypeDef HASH_WriteData(HASH_HandleTypeDef *hhash, uint8_t *pInB { HASH->DIN = *(uint32_t *)inputaddr; } - /*hhash->HashInCount += 4U;*/ } @@ -1940,7 +1942,7 @@ static HAL_StatusTypeDef HASH_WriteData(HASH_HandleTypeDef *hhash, uint8_t *pInB * @param Size message digest size in bytes. * @retval None */ -static void HASH_GetDigest(uint8_t *pMsgDigest, uint8_t Size) +static void HASH_GetDigest(const uint8_t *pMsgDigest, uint8_t Size) { uint32_t msgdigest = (uint32_t)pMsgDigest; @@ -2005,7 +2007,6 @@ static void HASH_GetDigest(uint8_t *pMsgDigest, uint8_t Size) } - /** * @brief Handle HASH processing Timeout. * @param hhash HASH handle. @@ -2491,10 +2492,11 @@ static HAL_StatusTypeDef HMAC_Processing(HASH_HandleTypeDef *hhash, uint32_t Tim * @param Algorithm HASH algorithm. * @retval HAL status */ -HAL_StatusTypeDef HASH_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t *pOutBuffer, +HAL_StatusTypeDef HASH_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, + uint8_t *pOutBuffer, uint32_t Timeout, uint32_t Algorithm) { - uint8_t *pInBuffer_tmp; /* input data address, input parameter of HASH_WriteData() */ + const uint8_t *pInBuffer_tmp; /* input data address, input parameter of HASH_WriteData() */ uint32_t Size_tmp; /* input data size (in bytes), input parameter of HASH_WriteData() */ HAL_HASH_StateTypeDef State_tmp = hhash->State; @@ -2526,7 +2528,7 @@ HAL_StatusTypeDef HASH_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint /* pInBuffer_tmp and Size_tmp are initialized to be used afterwards as input parameters of HASH_WriteData() */ - pInBuffer_tmp = pInBuffer; /* pInBuffer_tmp is set to the input data address */ + pInBuffer_tmp = (const uint8_t *)pInBuffer; /* pInBuffer_tmp is set to the input data address */ Size_tmp = Size; /* Size_tmp contains the input data size in bytes */ /* Set the phase */ @@ -2542,7 +2544,7 @@ HAL_StatusTypeDef HASH_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint /* Since this is resumption, pInBuffer_tmp and Size_tmp are not set to the API input parameters but to those saved beforehand by HASH_WriteData() when the processing was suspended */ - pInBuffer_tmp = hhash->pHashInBuffPtr; + pInBuffer_tmp = (const uint8_t *)hhash->pHashInBuffPtr; Size_tmp = hhash->HashInCount; } /* ... or multi-buffer HASH processing end */ @@ -2550,7 +2552,7 @@ HAL_StatusTypeDef HASH_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint { /* pInBuffer_tmp and Size_tmp are initialized to be used afterwards as input parameters of HASH_WriteData() */ - pInBuffer_tmp = pInBuffer; + pInBuffer_tmp = (const uint8_t *)pInBuffer; Size_tmp = Size; /* Configure the number of valid bits in last word of the message */ __HAL_HASH_SET_NBVALIDBITS(Size); @@ -2628,9 +2630,10 @@ HAL_StatusTypeDef HASH_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint * @param Algorithm HASH algorithm. * @retval HAL status */ -HAL_StatusTypeDef HASH_Accumulate(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint32_t Algorithm) +HAL_StatusTypeDef HASH_Accumulate(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, + uint32_t Algorithm) { - uint8_t *pInBuffer_tmp; /* input data address, input parameter of HASH_WriteData() */ + const uint8_t *pInBuffer_tmp; /* input data address, input parameter of HASH_WriteData() */ uint32_t Size_tmp; /* input data size (in bytes), input parameter of HASH_WriteData() */ HAL_HASH_StateTypeDef State_tmp = hhash->State; @@ -2662,7 +2665,7 @@ HAL_StatusTypeDef HASH_Accumulate(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, /* Since this is resumption, pInBuffer_tmp and Size_tmp are not set to the API input parameters but to those saved beforehand by HASH_WriteData() when the processing was suspended */ - pInBuffer_tmp = hhash->pHashInBuffPtr; /* pInBuffer_tmp is set to the input data address */ + pInBuffer_tmp = (const uint8_t *)hhash->pHashInBuffPtr; /* pInBuffer_tmp is set to the input data address */ Size_tmp = hhash->HashInCount; /* Size_tmp contains the input data size in bytes */ } @@ -2673,7 +2676,7 @@ HAL_StatusTypeDef HASH_Accumulate(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, /* pInBuffer_tmp and Size_tmp are initialized to be used afterwards as input parameters of HASH_WriteData() */ - pInBuffer_tmp = pInBuffer; /* pInBuffer_tmp is set to the input data address */ + pInBuffer_tmp = (const uint8_t *)pInBuffer; /* pInBuffer_tmp is set to the input data address */ Size_tmp = Size; /* Size_tmp contains the input data size in bytes */ /* Check if initialization phase has already be performed */ @@ -2731,7 +2734,8 @@ HAL_StatusTypeDef HASH_Accumulate(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, * @param Algorithm HASH algorithm. * @retval HAL status */ -HAL_StatusTypeDef HASH_Accumulate_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint32_t Algorithm) +HAL_StatusTypeDef HASH_Accumulate_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, + uint32_t Algorithm) { HAL_HASH_StateTypeDef State_tmp = hhash->State; __IO uint32_t inputaddr = (uint32_t) pInBuffer; @@ -2841,7 +2845,6 @@ HAL_StatusTypeDef HASH_Accumulate_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuff } - /** * @brief Initialize the HASH peripheral, next process pInBuffer then * read the computed digest in interruption mode. @@ -2853,7 +2856,8 @@ HAL_StatusTypeDef HASH_Accumulate_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuff * @param Algorithm HASH algorithm. * @retval HAL status */ -HAL_StatusTypeDef HASH_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t *pOutBuffer, +HAL_StatusTypeDef HASH_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, + uint8_t *pOutBuffer, uint32_t Algorithm) { HAL_HASH_StateTypeDef State_tmp = hhash->State; @@ -2902,6 +2906,19 @@ HAL_StatusTypeDef HASH_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, u hhash->pHashOutBuffPtr = pOutBuffer; /* Points at the computed digest */ } + else if ((hhash->Phase == HAL_HASH_PHASE_PROCESS) && (SizeVar < 4U)) + { + if (__HAL_HASH_GET_FLAG(HASH_FLAG_DINIS)) + { + /* It remains data to enter and the Peripheral is ready to trigger DINIE,carry on as usual. + Update HashInCount and pHashInBuffPtr accordingly. */ + hhash->HashInCount = SizeVar; + hhash->pHashInBuffPtr = (uint8_t *)inputaddr; + /* Update the configuration of the number of valid bits in last word of the message */ + __HAL_HASH_SET_NBVALIDBITS(SizeVar); + hhash->pHashOutBuffPtr = pOutBuffer; /* Points at the computed digest */ + } + } else { initialization_skipped = 1; /* info user later on in case of multi-buffer */ @@ -3011,7 +3028,8 @@ HAL_StatusTypeDef HASH_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, u * @param Algorithm HASH algorithm. * @retval HAL status */ -HAL_StatusTypeDef HASH_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint32_t Algorithm) +HAL_StatusTypeDef HASH_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, + uint32_t Algorithm) { uint32_t inputaddr; uint32_t inputSize; @@ -3188,7 +3206,8 @@ HAL_StatusTypeDef HASH_Finish(HASH_HandleTypeDef *hhash, uint8_t *pOutBuffer, ui * @param Algorithm HASH algorithm. * @retval HAL status */ -HAL_StatusTypeDef HMAC_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t *pOutBuffer, +HAL_StatusTypeDef HMAC_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, + uint8_t *pOutBuffer, uint32_t Timeout, uint32_t Algorithm) { HAL_HASH_StateTypeDef State_tmp = hhash->State; @@ -3252,7 +3271,6 @@ HAL_StatusTypeDef HMAC_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint } - /** * @brief Initialize the HASH peripheral in HMAC mode, next process pInBuffer then * read the computed digest in interruption mode. @@ -3266,7 +3284,8 @@ HAL_StatusTypeDef HMAC_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint * @param Algorithm HASH algorithm. * @retval HAL status */ -HAL_StatusTypeDef HMAC_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t *pOutBuffer, +HAL_StatusTypeDef HMAC_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, + uint8_t *pOutBuffer, uint32_t Algorithm) { HAL_HASH_StateTypeDef State_tmp = hhash->State; @@ -3361,7 +3380,6 @@ HAL_StatusTypeDef HMAC_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, u } - /** * @brief Initialize the HASH peripheral in HMAC mode then initiate the required * DMA transfers to feed the key and the input buffer to the Peripheral. @@ -3377,7 +3395,8 @@ HAL_StatusTypeDef HMAC_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, u * @param Algorithm HASH algorithm. * @retval HAL status */ -HAL_StatusTypeDef HMAC_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint32_t Algorithm) +HAL_StatusTypeDef HMAC_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, + uint32_t Algorithm) { uint32_t inputaddr; uint32_t inputSize; diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_hash_ex.c b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_hash_ex.c index e6e606315d..de3013ce67 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_hash_ex.c +++ b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_hash_ex.c @@ -86,8 +86,6 @@ #include "stm32f7xx_hal.h" - - /** @addtogroup STM32F7xx_HAL_Driver * @{ */ @@ -148,7 +146,7 @@ * @param Timeout Timeout value * @retval HAL status */ -HAL_StatusTypeDef HAL_HASHEx_SHA224_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASHEx_SHA224_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer, uint32_t Timeout) { return HASH_Start(hhash, pInBuffer, Size, pOutBuffer, Timeout, HASH_ALGOSELECTION_SHA224); @@ -174,7 +172,7 @@ HAL_StatusTypeDef HAL_HASHEx_SHA224_Start(HASH_HandleTypeDef *hhash, uint8_t *pI * @param Size length of the input buffer in bytes, must be a multiple of 4. * @retval HAL status */ -HAL_StatusTypeDef HAL_HASHEx_SHA224_Accmlt(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HASHEx_SHA224_Accmlt(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { return HASH_Accumulate(hhash, pInBuffer, Size, HASH_ALGOSELECTION_SHA224); } @@ -189,7 +187,7 @@ HAL_StatusTypeDef HAL_HASHEx_SHA224_Accmlt(HASH_HandleTypeDef *hhash, uint8_t *p * @param Timeout Timeout value * @retval HAL status */ -HAL_StatusTypeDef HAL_HASHEx_SHA224_Accmlt_End(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASHEx_SHA224_Accmlt_End(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer, uint32_t Timeout) { return HASH_Start(hhash, pInBuffer, Size, pOutBuffer, Timeout, HASH_ALGOSELECTION_SHA224); @@ -206,7 +204,7 @@ HAL_StatusTypeDef HAL_HASHEx_SHA224_Accmlt_End(HASH_HandleTypeDef *hhash, uint8_ * @param Timeout Timeout value * @retval HAL status */ -HAL_StatusTypeDef HAL_HASHEx_SHA256_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASHEx_SHA256_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer, uint32_t Timeout) { return HASH_Start(hhash, pInBuffer, Size, pOutBuffer, Timeout, HASH_ALGOSELECTION_SHA256); @@ -232,7 +230,7 @@ HAL_StatusTypeDef HAL_HASHEx_SHA256_Start(HASH_HandleTypeDef *hhash, uint8_t *pI * @param Size length of the input buffer in bytes, must be a multiple of 4. * @retval HAL status */ -HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { return HASH_Accumulate(hhash, pInBuffer, Size, HASH_ALGOSELECTION_SHA256); } @@ -247,7 +245,7 @@ HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt(HASH_HandleTypeDef *hhash, uint8_t *p * @param Timeout Timeout value * @retval HAL status */ -HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt_End(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt_End(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer, uint32_t Timeout) { return HASH_Start(hhash, pInBuffer, Size, pOutBuffer, Timeout, HASH_ALGOSELECTION_SHA256); @@ -290,7 +288,7 @@ HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt_End(HASH_HandleTypeDef *hhash, uint8_ * @param pOutBuffer pointer to the computed digest. Digest size is 28 bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer) { return HASH_Start_IT(hhash, pInBuffer, Size, pOutBuffer, HASH_ALGOSELECTION_SHA224); @@ -314,7 +312,7 @@ HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_IT(HASH_HandleTypeDef *hhash, uint8_t * @param Size length of the input buffer in bytes, must be a multiple of 4. * @retval HAL status */ -HAL_StatusTypeDef HAL_HASHEx_SHA224_Accmlt_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HASHEx_SHA224_Accmlt_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { return HASH_Accumulate_IT(hhash, pInBuffer, Size, HASH_ALGOSELECTION_SHA224); } @@ -328,7 +326,8 @@ HAL_StatusTypeDef HAL_HASHEx_SHA224_Accmlt_IT(HASH_HandleTypeDef *hhash, uint8_t * @param pOutBuffer pointer to the computed digest. Digest size is 28 bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HASHEx_SHA224_Accmlt_End_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASHEx_SHA224_Accmlt_End_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, + uint32_t Size, uint8_t *pOutBuffer) { return HASH_Start_IT(hhash, pInBuffer, Size, pOutBuffer, HASH_ALGOSELECTION_SHA224); @@ -344,7 +343,7 @@ HAL_StatusTypeDef HAL_HASHEx_SHA224_Accmlt_End_IT(HASH_HandleTypeDef *hhash, uin * @param pOutBuffer pointer to the computed digest. Digest size is 32 bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer) { return HASH_Start_IT(hhash, pInBuffer, Size, pOutBuffer, HASH_ALGOSELECTION_SHA256); @@ -368,7 +367,7 @@ HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, uint8_t * @param Size length of the input buffer in bytes, must be a multiple of 4. * @retval HAL status */ -HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { return HASH_Accumulate_IT(hhash, pInBuffer, Size, HASH_ALGOSELECTION_SHA256); } @@ -382,7 +381,8 @@ HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt_IT(HASH_HandleTypeDef *hhash, uint8_t * @param pOutBuffer pointer to the computed digest. Digest size is 32 bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt_End_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt_End_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, + uint32_t Size, uint8_t *pOutBuffer) { return HASH_Start_IT(hhash, pInBuffer, Size, pOutBuffer, HASH_ALGOSELECTION_SHA256); @@ -422,8 +422,6 @@ HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt_End_IT(HASH_HandleTypeDef *hhash, uin */ - - /** * @brief Initialize the HASH peripheral in SHA224 mode then initiate a DMA transfer * to feed the input buffer to the Peripheral. @@ -434,7 +432,7 @@ HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt_End_IT(HASH_HandleTypeDef *hhash, uin * @param Size length of the input buffer in bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { return HASH_Start_DMA(hhash, pInBuffer, Size, HASH_ALGOSELECTION_SHA224); } @@ -464,7 +462,7 @@ HAL_StatusTypeDef HAL_HASHEx_SHA224_Finish(HASH_HandleTypeDef *hhash, uint8_t *p * @param Size length of the input buffer in bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { return HASH_Start_DMA(hhash, pInBuffer, Size, HASH_ALGOSELECTION_SHA256); } @@ -507,7 +505,6 @@ HAL_StatusTypeDef HAL_HASHEx_SHA256_Finish(HASH_HandleTypeDef *hhash, uint8_t *p */ - /** * @brief Initialize the HASH peripheral in HMAC SHA224 mode, next process pInBuffer then * read the computed digest. @@ -521,7 +518,7 @@ HAL_StatusTypeDef HAL_HASHEx_SHA256_Finish(HASH_HandleTypeDef *hhash, uint8_t *p * @param Timeout Timeout value. * @retval HAL status */ -HAL_StatusTypeDef HAL_HMACEx_SHA224_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HMACEx_SHA224_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer, uint32_t Timeout) { return HMAC_Start(hhash, pInBuffer, Size, pOutBuffer, Timeout, HASH_ALGOSELECTION_SHA224); @@ -540,7 +537,7 @@ HAL_StatusTypeDef HAL_HMACEx_SHA224_Start(HASH_HandleTypeDef *hhash, uint8_t *pI * @param Timeout Timeout value. * @retval HAL status */ -HAL_StatusTypeDef HAL_HMACEx_SHA256_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HMACEx_SHA256_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer, uint32_t Timeout) { return HMAC_Start(hhash, pInBuffer, Size, pOutBuffer, Timeout, HASH_ALGOSELECTION_SHA256); @@ -570,7 +567,6 @@ HAL_StatusTypeDef HAL_HMACEx_SHA256_Start(HASH_HandleTypeDef *hhash, uint8_t *pI */ - /** * @brief Initialize the HASH peripheral in HMAC SHA224 mode, next process pInBuffer then * read the computed digest in interrupt mode. @@ -583,7 +579,7 @@ HAL_StatusTypeDef HAL_HMACEx_SHA256_Start(HASH_HandleTypeDef *hhash, uint8_t *pI * @param pOutBuffer pointer to the computed digest. Digest size is 28 bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HMACEx_SHA224_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HMACEx_SHA224_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer) { return HMAC_Start_IT(hhash, pInBuffer, Size, pOutBuffer, HASH_ALGOSELECTION_SHA224); @@ -601,15 +597,13 @@ HAL_StatusTypeDef HAL_HMACEx_SHA224_Start_IT(HASH_HandleTypeDef *hhash, uint8_t * @param pOutBuffer pointer to the computed digest. Digest size is 32 bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HMACEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HMACEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer) { return HMAC_Start_IT(hhash, pInBuffer, Size, pOutBuffer, HASH_ALGOSELECTION_SHA256); } - - /** * @} */ @@ -639,7 +633,6 @@ HAL_StatusTypeDef HAL_HMACEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, uint8_t */ - /** * @brief Initialize the HASH peripheral in HMAC SHA224 mode then initiate the required * DMA transfers to feed the key and the input buffer to the Peripheral. @@ -659,7 +652,7 @@ HAL_StatusTypeDef HAL_HMACEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, uint8_t * @param Size length of the input buffer in bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HMACEx_SHA224_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HMACEx_SHA224_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { return HMAC_Start_DMA(hhash, pInBuffer, Size, HASH_ALGOSELECTION_SHA224); } @@ -683,7 +676,7 @@ HAL_StatusTypeDef HAL_HMACEx_SHA224_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t * @param Size length of the input buffer in bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HMACEx_SHA256_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HMACEx_SHA256_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { return HMAC_Start_DMA(hhash, pInBuffer, Size, HASH_ALGOSELECTION_SHA256); } @@ -759,7 +752,7 @@ HAL_StatusTypeDef HAL_HMACEx_SHA256_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t * @param Size length of the input buffer in bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HMACEx_MD5_Step1_2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HMACEx_MD5_Step1_2_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { hhash->DigestCalculationDisable = SET; return HMAC_Start_DMA(hhash, pInBuffer, Size, HASH_ALGOSELECTION_MD5); @@ -780,7 +773,7 @@ HAL_StatusTypeDef HAL_HMACEx_MD5_Step1_2_DMA(HASH_HandleTypeDef *hhash, uint8_t * @param Size length of the input buffer in bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HMACEx_MD5_Step2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HMACEx_MD5_Step2_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { if (hhash->DigestCalculationDisable != SET) { @@ -806,7 +799,7 @@ HAL_StatusTypeDef HAL_HMACEx_MD5_Step2_DMA(HASH_HandleTypeDef *hhash, uint8_t *p * @param Size length of the input buffer in bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HMACEx_MD5_Step2_3_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HMACEx_MD5_Step2_3_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { hhash->DigestCalculationDisable = RESET; return HMAC_Start_DMA(hhash, pInBuffer, Size, HASH_ALGOSELECTION_MD5); @@ -829,7 +822,7 @@ HAL_StatusTypeDef HAL_HMACEx_MD5_Step2_3_DMA(HASH_HandleTypeDef *hhash, uint8_t * @param Size length of the input buffer in bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HMACEx_SHA1_Step1_2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HMACEx_SHA1_Step1_2_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { hhash->DigestCalculationDisable = SET; return HMAC_Start_DMA(hhash, pInBuffer, Size, HASH_ALGOSELECTION_SHA1); @@ -850,7 +843,7 @@ HAL_StatusTypeDef HAL_HMACEx_SHA1_Step1_2_DMA(HASH_HandleTypeDef *hhash, uint8_t * @param Size length of the input buffer in bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HMACEx_SHA1_Step2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HMACEx_SHA1_Step2_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { if (hhash->DigestCalculationDisable != SET) { @@ -876,7 +869,7 @@ HAL_StatusTypeDef HAL_HMACEx_SHA1_Step2_DMA(HASH_HandleTypeDef *hhash, uint8_t * * @param Size length of the input buffer in bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HMACEx_SHA1_Step2_3_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HMACEx_SHA1_Step2_3_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { hhash->DigestCalculationDisable = RESET; return HMAC_Start_DMA(hhash, pInBuffer, Size, HASH_ALGOSELECTION_SHA1); @@ -898,7 +891,8 @@ HAL_StatusTypeDef HAL_HMACEx_SHA1_Step2_3_DMA(HASH_HandleTypeDef *hhash, uint8_t * @param Size length of the input buffer in bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HMACEx_SHA224_Step1_2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HMACEx_SHA224_Step1_2_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, + uint32_t Size) { hhash->DigestCalculationDisable = SET; return HMAC_Start_DMA(hhash, pInBuffer, Size, HASH_ALGOSELECTION_SHA224); @@ -919,7 +913,7 @@ HAL_StatusTypeDef HAL_HMACEx_SHA224_Step1_2_DMA(HASH_HandleTypeDef *hhash, uint8 * @param Size length of the input buffer in bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HMACEx_SHA224_Step2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HMACEx_SHA224_Step2_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { if (hhash->DigestCalculationDisable != SET) { @@ -945,7 +939,8 @@ HAL_StatusTypeDef HAL_HMACEx_SHA224_Step2_DMA(HASH_HandleTypeDef *hhash, uint8_t * @param Size length of the input buffer in bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HMACEx_SHA224_Step2_3_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HMACEx_SHA224_Step2_3_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, + uint32_t Size) { hhash->DigestCalculationDisable = RESET; return HMAC_Start_DMA(hhash, pInBuffer, Size, HASH_ALGOSELECTION_SHA224); @@ -967,7 +962,8 @@ HAL_StatusTypeDef HAL_HMACEx_SHA224_Step2_3_DMA(HASH_HandleTypeDef *hhash, uint8 * @param Size length of the input buffer in bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HMACEx_SHA256_Step1_2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HMACEx_SHA256_Step1_2_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, + uint32_t Size) { hhash->DigestCalculationDisable = SET; return HMAC_Start_DMA(hhash, pInBuffer, Size, HASH_ALGOSELECTION_SHA256); @@ -988,7 +984,7 @@ HAL_StatusTypeDef HAL_HMACEx_SHA256_Step1_2_DMA(HASH_HandleTypeDef *hhash, uint8 * @param Size length of the input buffer in bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HMACEx_SHA256_Step2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HMACEx_SHA256_Step2_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { if (hhash->DigestCalculationDisable != SET) { @@ -1014,7 +1010,8 @@ HAL_StatusTypeDef HAL_HMACEx_SHA256_Step2_DMA(HASH_HandleTypeDef *hhash, uint8_t * @param Size length of the input buffer in bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HMACEx_SHA256_Step2_3_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HMACEx_SHA256_Step2_3_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, + uint32_t Size) { hhash->DigestCalculationDisable = RESET; return HMAC_Start_DMA(hhash, pInBuffer, Size, HASH_ALGOSELECTION_SHA256); diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c index b34d31aa41..67a712c2fa 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c +++ b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c @@ -3267,6 +3267,8 @@ HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAdd __IO uint32_t I2C_Trials = 0UL; + HAL_StatusTypeDef status = HAL_OK; + FlagStatus tmp1; FlagStatus tmp2; @@ -3324,37 +3326,64 @@ HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAdd /* Wait until STOPF flag is reset */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK) { - return HAL_ERROR; + /* A non acknowledge appear during STOP Flag waiting process, a new trial must be performed */ + if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) + { + /* Clear STOP Flag */ + __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); + + /* Reset the error code for next trial */ + hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + } + else + { + status = HAL_ERROR; + } } + else + { + /* A acknowledge appear during STOP Flag waiting process, this mean that device respond to its address */ - /* Clear STOP Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); + /* Clear STOP Flag */ + __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); - /* Device is ready */ - hi2c->State = HAL_I2C_STATE_READY; + /* Device is ready */ + hi2c->State = HAL_I2C_STATE_READY; - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); + /* Process Unlocked */ + __HAL_UNLOCK(hi2c); - return HAL_OK; + return HAL_OK; + } } else { - /* Wait until STOPF flag is reset */ - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK) - { - return HAL_ERROR; - } + /* A non acknowledge is detected, this mean that device not respond to its address, + a new trial must be performed */ /* Clear NACK Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - /* Clear STOP Flag, auto generated with autoend*/ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); + /* Wait until STOPF flag is reset */ + if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK) + { + status = HAL_ERROR; + } + else + { + /* Clear STOP Flag, auto generated with autoend*/ + __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); + } } /* Increment Trials */ I2C_Trials++; + + if ((I2C_Trials < Trials) && (status == HAL_ERROR)) + { + status = HAL_OK; + } + } while (I2C_Trials < Trials); /* Update I2C state */ @@ -6397,7 +6426,7 @@ static void I2C_ITSlaveCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) /* Increment Buffer pointer */ hi2c->pBuffPtr++; - if ((hi2c->XferSize > 0U)) + if (hi2c->XferSize > 0U) { hi2c->XferSize--; hi2c->XferCount--; @@ -6553,7 +6582,7 @@ static void I2C_ITListenCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) /* Increment Buffer pointer */ hi2c->pBuffPtr++; - if ((hi2c->XferSize > 0U)) + if (hi2c->XferSize > 0U) { hi2c->XferSize--; hi2c->XferCount--; @@ -7030,7 +7059,7 @@ static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uin { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) { - if ((__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)) + if (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status) { hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; hi2c->State = HAL_I2C_STATE_READY; @@ -7070,7 +7099,7 @@ static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) { - if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET)) + if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET) { hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; hi2c->State = HAL_I2C_STATE_READY; @@ -7109,7 +7138,7 @@ static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, /* Check for the Timeout */ if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) { - if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)) + if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) { hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; hi2c->State = HAL_I2C_STATE_READY; @@ -7187,7 +7216,7 @@ static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, /* Check for the Timeout */ if ((((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) && (status == HAL_OK)) { - if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)) + if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET) { hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; hi2c->State = HAL_I2C_STATE_READY; @@ -7354,15 +7383,17 @@ static HAL_StatusTypeDef I2C_IsErrorOccurred(I2C_HandleTypeDef *hi2c, uint32_t T static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request) { + uint32_t tmp; + /* Check the parameters */ assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); assert_param(IS_TRANSFER_MODE(Mode)); assert_param(IS_TRANSFER_REQUEST(Request)); /* Declaration of tmp to prevent undefined behavior of volatile usage */ - uint32_t tmp = ((uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | \ - (((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | \ - (uint32_t)Mode | (uint32_t)Request) & (~0x80000000U)); + tmp = ((uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | \ + (((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | \ + (uint32_t)Mode | (uint32_t)Request) & (~0x80000000U)); /* update CR2 register */ MODIFY_REG(hi2c->Instance->CR2, \ diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2s.c b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2s.c index 621563facd..9113b66d51 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2s.c +++ b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2s.c @@ -767,15 +767,14 @@ HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uin return HAL_ERROR; } - /* Process Locked */ - __HAL_LOCK(hi2s); - if (hi2s->State != HAL_I2S_STATE_READY) { - __HAL_UNLOCK(hi2s); return HAL_BUSY; } + /* Process Locked */ + __HAL_LOCK(hi2s); + /* Set state and reset error code */ hi2s->State = HAL_I2S_STATE_BUSY_TX; hi2s->ErrorCode = HAL_I2S_ERROR_NONE; @@ -886,15 +885,14 @@ HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint return HAL_ERROR; } - /* Process Locked */ - __HAL_LOCK(hi2s); - if (hi2s->State != HAL_I2S_STATE_READY) { - __HAL_UNLOCK(hi2s); return HAL_BUSY; } + /* Process Locked */ + __HAL_LOCK(hi2s); + /* Set state and reset error code */ hi2s->State = HAL_I2S_STATE_BUSY_RX; hi2s->ErrorCode = HAL_I2S_ERROR_NONE; @@ -984,15 +982,14 @@ HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, return HAL_ERROR; } - /* Process Locked */ - __HAL_LOCK(hi2s); - if (hi2s->State != HAL_I2S_STATE_READY) { - __HAL_UNLOCK(hi2s); return HAL_BUSY; } + /* Process Locked */ + __HAL_LOCK(hi2s); + /* Set state and reset error code */ hi2s->State = HAL_I2S_STATE_BUSY_TX; hi2s->ErrorCode = HAL_I2S_ERROR_NONE; @@ -1011,6 +1008,8 @@ HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, hi2s->TxXferCount = Size; } + __HAL_UNLOCK(hi2s); + /* Enable TXE and ERR interrupt */ __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR)); @@ -1021,7 +1020,6 @@ HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, __HAL_I2S_ENABLE(hi2s); } - __HAL_UNLOCK(hi2s); return HAL_OK; } @@ -1050,15 +1048,14 @@ HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, u return HAL_ERROR; } - /* Process Locked */ - __HAL_LOCK(hi2s); - if (hi2s->State != HAL_I2S_STATE_READY) { - __HAL_UNLOCK(hi2s); return HAL_BUSY; } + /* Process Locked */ + __HAL_LOCK(hi2s); + /* Set state and reset error code */ hi2s->State = HAL_I2S_STATE_BUSY_RX; hi2s->ErrorCode = HAL_I2S_ERROR_NONE; @@ -1077,6 +1074,8 @@ HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, u hi2s->RxXferCount = Size; } + __HAL_UNLOCK(hi2s); + /* Enable RXNE and ERR interrupt */ __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR)); @@ -1087,7 +1086,6 @@ HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, u __HAL_I2S_ENABLE(hi2s); } - __HAL_UNLOCK(hi2s); return HAL_OK; } @@ -1114,15 +1112,14 @@ HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, return HAL_ERROR; } - /* Process Locked */ - __HAL_LOCK(hi2s); - if (hi2s->State != HAL_I2S_STATE_READY) { - __HAL_UNLOCK(hi2s); return HAL_BUSY; } + /* Process Locked */ + __HAL_LOCK(hi2s); + /* Set state and reset error code */ hi2s->State = HAL_I2S_STATE_BUSY_TX; hi2s->ErrorCode = HAL_I2S_ERROR_NONE; @@ -1164,12 +1161,7 @@ HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, return HAL_ERROR; } - /* Check if the I2S is already enabled */ - if (HAL_IS_BIT_CLR(hi2s->Instance->I2SCFGR, SPI_I2SCFGR_I2SE)) - { - /* Enable I2S peripheral */ - __HAL_I2S_ENABLE(hi2s); - } + __HAL_UNLOCK(hi2s); /* Check if the I2S Tx request is already enabled */ if (HAL_IS_BIT_CLR(hi2s->Instance->CR2, SPI_CR2_TXDMAEN)) @@ -1178,7 +1170,13 @@ HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, SET_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN); } - __HAL_UNLOCK(hi2s); + /* Check if the I2S is already enabled */ + if (HAL_IS_BIT_CLR(hi2s->Instance->I2SCFGR, SPI_I2SCFGR_I2SE)) + { + /* Enable I2S peripheral */ + __HAL_I2S_ENABLE(hi2s); + } + return HAL_OK; } @@ -1205,15 +1203,14 @@ HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, return HAL_ERROR; } - /* Process Locked */ - __HAL_LOCK(hi2s); - if (hi2s->State != HAL_I2S_STATE_READY) { - __HAL_UNLOCK(hi2s); return HAL_BUSY; } + /* Process Locked */ + __HAL_LOCK(hi2s); + /* Set state and reset error code */ hi2s->State = HAL_I2S_STATE_BUSY_RX; hi2s->ErrorCode = HAL_I2S_ERROR_NONE; @@ -1261,12 +1258,7 @@ HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, return HAL_ERROR; } - /* Check if the I2S is already enabled */ - if (HAL_IS_BIT_CLR(hi2s->Instance->I2SCFGR, SPI_I2SCFGR_I2SE)) - { - /* Enable I2S peripheral */ - __HAL_I2S_ENABLE(hi2s); - } + __HAL_UNLOCK(hi2s); /* Check if the I2S Rx request is already enabled */ if (HAL_IS_BIT_CLR(hi2s->Instance->CR2, SPI_CR2_RXDMAEN)) @@ -1275,7 +1267,13 @@ HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, SET_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN); } - __HAL_UNLOCK(hi2s); + /* Check if the I2S is already enabled */ + if (HAL_IS_BIT_CLR(hi2s->Instance->I2SCFGR, SPI_I2SCFGR_I2SE)) + { + /* Enable I2S peripheral */ + __HAL_I2S_ENABLE(hi2s); + } + return HAL_OK; } @@ -1616,7 +1614,7 @@ __weak void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s) * the configuration information for I2S module * @retval HAL state */ -HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s) +HAL_I2S_StateTypeDef HAL_I2S_GetState(const I2S_HandleTypeDef *hi2s) { return hi2s->State; } @@ -1627,7 +1625,7 @@ HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s) * the configuration information for I2S module * @retval I2S Error Code */ -uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s) +uint32_t HAL_I2S_GetError(const I2S_HandleTypeDef *hi2s) { return hi2s->ErrorCode; } diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_iwdg.c b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_iwdg.c index c7b8064836..0261a969db 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_iwdg.c +++ b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_iwdg.c @@ -126,7 +126,8 @@ The timeout value is multiplied by 1000 to be converted in milliseconds. LSI startup time is also considered here by adding LSI_STARTUP_TIME converted in milliseconds. */ -#define HAL_IWDG_DEFAULT_TIMEOUT (((6UL * 256UL * 1000UL) / LSI_VALUE) + ((LSI_STARTUP_TIME / 1000UL) + 1UL)) +#define HAL_IWDG_DEFAULT_TIMEOUT (((6UL * 256UL * 1000UL) / (LSI_VALUE / 128U)) + \ + ((LSI_STARTUP_TIME / 1000UL) + 1UL)) #define IWDG_KERNEL_UPDATE_FLAGS (IWDG_SR_WVU | IWDG_SR_RVU | IWDG_SR_PVU) /** * @} diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.c b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.c index 7a0a89da23..dff9a6803d 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.c +++ b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.c @@ -279,24 +279,20 @@ HAL_StatusTypeDef HAL_LTDC_Init(LTDC_HandleTypeDef *hltdc) hltdc->Init.DEPolarity | hltdc->Init.PCPolarity); /* Set Synchronization size */ - hltdc->Instance->SSCR &= ~(LTDC_SSCR_VSH | LTDC_SSCR_HSW); tmp = (hltdc->Init.HorizontalSync << 16U); - hltdc->Instance->SSCR |= (tmp | hltdc->Init.VerticalSync); + WRITE_REG(hltdc->Instance->SSCR, (tmp | hltdc->Init.VerticalSync)); /* Set Accumulated Back porch */ - hltdc->Instance->BPCR &= ~(LTDC_BPCR_AVBP | LTDC_BPCR_AHBP); tmp = (hltdc->Init.AccumulatedHBP << 16U); - hltdc->Instance->BPCR |= (tmp | hltdc->Init.AccumulatedVBP); + WRITE_REG(hltdc->Instance->BPCR, (tmp | hltdc->Init.AccumulatedVBP)); /* Set Accumulated Active Width */ - hltdc->Instance->AWCR &= ~(LTDC_AWCR_AAH | LTDC_AWCR_AAW); tmp = (hltdc->Init.AccumulatedActiveW << 16U); - hltdc->Instance->AWCR |= (tmp | hltdc->Init.AccumulatedActiveH); + WRITE_REG(hltdc->Instance->AWCR, (tmp | hltdc->Init.AccumulatedActiveH)); /* Set Total Width */ - hltdc->Instance->TWCR &= ~(LTDC_TWCR_TOTALH | LTDC_TWCR_TOTALW); tmp = (hltdc->Init.TotalWidth << 16U); - hltdc->Instance->TWCR |= (tmp | hltdc->Init.TotalHeigh); + WRITE_REG(hltdc->Instance->TWCR, (tmp | hltdc->Init.TotalHeigh)); /* Set the background color value */ tmp = ((uint32_t)(hltdc->Init.Backcolor.Green) << 8U); @@ -916,11 +912,12 @@ HAL_StatusTypeDef HAL_LTDC_ConfigColorKeying(LTDC_HandleTypeDef *hltdc, uint32_t * LTDC_LAYER_1 (0) or LTDC_LAYER_2 (1) * @retval HAL status */ -HAL_StatusTypeDef HAL_LTDC_ConfigCLUT(LTDC_HandleTypeDef *hltdc, uint32_t *pCLUT, uint32_t CLUTSize, uint32_t LayerIdx) +HAL_StatusTypeDef HAL_LTDC_ConfigCLUT(LTDC_HandleTypeDef *hltdc, const uint32_t *pCLUT, uint32_t CLUTSize, + uint32_t LayerIdx) { uint32_t tmp; uint32_t counter; - uint32_t *pcolorlut = pCLUT; + const uint32_t *pcolorlut = pCLUT; /* Check the parameters */ assert_param(IS_LTDC_LAYER(LayerIdx)); @@ -2092,7 +2089,7 @@ HAL_StatusTypeDef HAL_LTDC_DisableCLUT_NoReload(LTDC_HandleTypeDef *hltdc, uint3 * the configuration information for the LTDC. * @retval HAL state */ -HAL_LTDC_StateTypeDef HAL_LTDC_GetState(LTDC_HandleTypeDef *hltdc) +HAL_LTDC_StateTypeDef HAL_LTDC_GetState(const LTDC_HandleTypeDef *hltdc) { return hltdc->State; } @@ -2103,7 +2100,7 @@ HAL_LTDC_StateTypeDef HAL_LTDC_GetState(LTDC_HandleTypeDef *hltdc) * the configuration information for the LTDC. * @retval LTDC Error Code */ -uint32_t HAL_LTDC_GetError(LTDC_HandleTypeDef *hltdc) +uint32_t HAL_LTDC_GetError(const LTDC_HandleTypeDef *hltdc) { return hltdc->ErrorCode; } @@ -2154,9 +2151,7 @@ static void LTDC_SetConfig(LTDC_HandleTypeDef *hltdc, LTDC_LayerCfgTypeDef *pLay tmp = ((uint32_t)(pLayerCfg->Backcolor.Green) << 8U); tmp1 = ((uint32_t)(pLayerCfg->Backcolor.Red) << 16U); tmp2 = (pLayerCfg->Alpha0 << 24U); - LTDC_LAYER(hltdc, LayerIdx)->DCCR &= ~(LTDC_LxDCCR_DCBLUE | LTDC_LxDCCR_DCGREEN | LTDC_LxDCCR_DCRED | - LTDC_LxDCCR_DCALPHA); - LTDC_LAYER(hltdc, LayerIdx)->DCCR = (pLayerCfg->Backcolor.Blue | tmp | tmp1 | tmp2); + WRITE_REG(LTDC_LAYER(hltdc, LayerIdx)->DCCR, (pLayerCfg->Backcolor.Blue | tmp | tmp1 | tmp2)); /* Specifies the constant alpha value */ LTDC_LAYER(hltdc, LayerIdx)->CACR &= ~(LTDC_LxCACR_CONSTA); @@ -2167,8 +2162,7 @@ static void LTDC_SetConfig(LTDC_HandleTypeDef *hltdc, LTDC_LayerCfgTypeDef *pLay LTDC_LAYER(hltdc, LayerIdx)->BFCR = (pLayerCfg->BlendingFactor1 | pLayerCfg->BlendingFactor2); /* Configure the color frame buffer start address */ - LTDC_LAYER(hltdc, LayerIdx)->CFBAR &= ~(LTDC_LxCFBAR_CFBADD); - LTDC_LAYER(hltdc, LayerIdx)->CFBAR = (pLayerCfg->FBStartAdress); + WRITE_REG(LTDC_LAYER(hltdc, LayerIdx)->CFBAR, pLayerCfg->FBStartAdress); if (pLayerCfg->PixelFormat == LTDC_PIXEL_FORMAT_ARGB8888) { diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_mmc.c b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_mmc.c index 4c0c056417..635bed26a1 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_mmc.c +++ b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_mmc.c @@ -1628,24 +1628,30 @@ void HAL_MMC_IRQHandler(MMC_HandleTypeDef *hmmc) else if((context & MMC_CONTEXT_DMA) != 0U) { /* Abort the MMC DMA Streams */ - if(hmmc->hdmatx != NULL) + if(((context & MMC_CONTEXT_WRITE_SINGLE_BLOCK) != 0U) || ((context & MMC_CONTEXT_WRITE_MULTIPLE_BLOCK) != 0U)) { - /* Set the DMA Tx abort callback */ - hmmc->hdmatx->XferAbortCallback = MMC_DMATxAbort; - /* Abort DMA in IT mode */ - if(HAL_DMA_Abort_IT(hmmc->hdmatx) != HAL_OK) + if(hmmc->hdmatx != NULL) { - MMC_DMATxAbort(hmmc->hdmatx); + /* Set the DMA Tx abort callback */ + hmmc->hdmatx->XferAbortCallback = MMC_DMATxAbort; + /* Abort DMA in IT mode */ + if(HAL_DMA_Abort_IT(hmmc->hdmatx) != HAL_OK) + { + MMC_DMATxAbort(hmmc->hdmatx); + } } } - else if(hmmc->hdmarx != NULL) + else if(((context & SD_CONTEXT_READ_SINGLE_BLOCK) != 0U) || ((context & SD_CONTEXT_READ_MULTIPLE_BLOCK) != 0U)) { - /* Set the DMA Rx abort callback */ - hmmc->hdmarx->XferAbortCallback = MMC_DMARxAbort; - /* Abort DMA in IT mode */ - if(HAL_DMA_Abort_IT(hmmc->hdmarx) != HAL_OK) + if(hmmc->hdmarx != NULL) { - MMC_DMARxAbort(hmmc->hdmarx); + /* Set the DMA Rx abort callback */ + hmmc->hdmarx->XferAbortCallback = MMC_DMARxAbort; + /* Abort DMA in IT mode */ + if(HAL_DMA_Abort_IT(hmmc->hdmarx) != HAL_OK) + { + MMC_DMARxAbort(hmmc->hdmarx); + } } } else diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_nand.c b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_nand.c index 00d780a59d..b5212893e1 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_nand.c +++ b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_nand.c @@ -492,7 +492,7 @@ HAL_StatusTypeDef HAL_NAND_Reset(NAND_HandleTypeDef *hnand) * @param pDeviceConfig pointer to NAND_DeviceConfigTypeDef structure * @retval HAL status */ -HAL_StatusTypeDef HAL_NAND_ConfigDevice(NAND_HandleTypeDef *hnand, NAND_DeviceConfigTypeDef *pDeviceConfig) +HAL_StatusTypeDef HAL_NAND_ConfigDevice(NAND_HandleTypeDef *hnand, const NAND_DeviceConfigTypeDef *pDeviceConfig) { hnand->Config.PageSize = pDeviceConfig->PageSize; hnand->Config.SpareAreaSize = pDeviceConfig->SpareAreaSize; @@ -635,7 +635,7 @@ HAL_StatusTypeDef HAL_NAND_Read_Page_8b(NAND_HandleTypeDef *hnand, const NAND_Ad /* Get Data into Buffer */ for (index = 0U; index < hnand->Config.PageSize; index++) { - *buff = *(uint8_t *)deviceaddress; + *buff = *(__IO uint8_t *)deviceaddress; buff++; } @@ -803,7 +803,7 @@ HAL_StatusTypeDef HAL_NAND_Read_Page_16b(NAND_HandleTypeDef *hnand, const NAND_A /* Get Data into Buffer */ for (index = 0U; index < hnand->Config.PageSize; index++) { - *buff = *(uint16_t *)deviceaddress; + *buff = *(__IO uint16_t *)deviceaddress; buff++; } @@ -1285,7 +1285,7 @@ HAL_StatusTypeDef HAL_NAND_Read_SpareArea_8b(NAND_HandleTypeDef *hnand, const NA /* Get Data into Buffer */ for (index = 0U; index < hnand->Config.SpareAreaSize; index++) { - *buff = *(uint8_t *)deviceaddress; + *buff = *(__IO uint8_t *)deviceaddress; buff++; } @@ -1450,7 +1450,7 @@ HAL_StatusTypeDef HAL_NAND_Read_SpareArea_16b(NAND_HandleTypeDef *hnand, const N /* Get Data into Buffer */ for (index = 0U; index < hnand->Config.SpareAreaSize; index++) { - *buff = *(uint16_t *)deviceaddress; + *buff = *(__IO uint16_t *)deviceaddress; buff++; } diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pcd.c b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pcd.c index 97584aa9bb..1ba42aa196 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pcd.c +++ b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pcd.c @@ -1374,7 +1374,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) if ((hpcd->OUT_ep[epnum].type == EP_TYPE_ISOC) && ((RegVal & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA) && - ((RegVal & (0x1U << 16)) == (hpcd->FrameNumber & 0x1U))) + (((RegVal & (0x1U << 16)) >> 16U) == (hpcd->FrameNumber & 0x1U))) { hpcd->OUT_ep[epnum].is_iso_incomplete = 1U; @@ -1693,7 +1693,7 @@ HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address) HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type) { - HAL_StatusTypeDef ret = HAL_OK; + HAL_StatusTypeDef ret = HAL_OK; PCD_EPTypeDef *ep; if ((ep_addr & 0x80U) == 0x80U) @@ -1708,7 +1708,7 @@ HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, } ep->num = ep_addr & EP_ADDR_MSK; - ep->maxpacket = ep_mps; + ep->maxpacket = (uint32_t)ep_mps & 0x7FFU; ep->type = ep_type; if (ep->is_in != 0U) @@ -2028,6 +2028,7 @@ HAL_StatusTypeDef HAL_PCD_SetTestMode(const PCD_HandleTypeDef *hpcd, uint8_t tes case TEST_SE0_NAK: case TEST_PACKET: case TEST_FORCE_EN: + USBx_DEVICE->DCTL &= ~(0x7U << 4); USBx_DEVICE->DCTL |= (uint32_t)testmode << 4; break; @@ -2258,13 +2259,11 @@ static HAL_StatusTypeDef PCD_EP_OutSetupPacket_int(PCD_HandleTypeDef *hpcd, uint } #endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */ - /** * @} */ #endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */ #endif /* HAL_PCD_MODULE_ENABLED */ - /** * @} */ diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_qspi.c b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_qspi.c index b8314254da..c1aa250858 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_qspi.c +++ b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_qspi.c @@ -574,7 +574,7 @@ void HAL_QSPI_IRQHandler(QSPI_HandleTypeDef *hqspi) #if defined(QSPI1_V1_0) /* Clear Busy bit */ - HAL_QSPI_Abort_IT(hqspi); + (void)HAL_QSPI_Abort_IT(hqspi); #endif /* Change state of QSPI */ @@ -619,7 +619,7 @@ void HAL_QSPI_IRQHandler(QSPI_HandleTypeDef *hqspi) #if defined(QSPI1_V1_0) /* Workaround - Extra data written in the FIFO at the end of a read transfer */ - HAL_QSPI_Abort_IT(hqspi); + (void)HAL_QSPI_Abort_IT(hqspi); #endif /* Change state of QSPI */ @@ -1364,20 +1364,24 @@ HAL_StatusTypeDef HAL_QSPI_Transmit_DMA(QSPI_HandleTypeDef *hqspi, uint8_t *pDat hqspi->hdma->Init.Direction = DMA_MEMORY_TO_PERIPH; MODIFY_REG(hqspi->hdma->Instance->CR, DMA_SxCR_DIR, hqspi->hdma->Init.Direction); + /* Enable the QSPI transfer error Interrupt */ + __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TE); + + /* Enable the DMA transfer by setting the DMAEN bit in the QSPI CR register */ + SET_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN); + + /* Enable the QSPI transmit DMA Channel */ if (HAL_DMA_Start_IT(hqspi->hdma, (uint32_t)pData, (uint32_t)&hqspi->Instance->DR, hqspi->TxXferSize) == HAL_OK) { /* Process unlocked */ __HAL_UNLOCK(hqspi); - - /* Enable the QSPI transfer error Interrupt */ - __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TE); - - /* Enable the DMA transfer by setting the DMAEN bit in the QSPI CR register */ - SET_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN); } else { + /* Disable the DMA transfer by clearing the DMAEN bit in the QSPI CR register */ + CLEAR_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN); + status = HAL_ERROR; hqspi->ErrorCode |= HAL_QSPI_ERROR_DMA; hqspi->State = HAL_QSPI_STATE_READY; @@ -1515,17 +1519,20 @@ HAL_StatusTypeDef HAL_QSPI_Receive_DMA(QSPI_HandleTypeDef *hqspi, uint8_t *pData /* Start the transfer by re-writing the address in AR register */ WRITE_REG(hqspi->Instance->AR, addr_reg); - /* Process unlocked */ - __HAL_UNLOCK(hqspi); + /* Enable the QSPI transfer error Interrupt */ + __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TE); - /* Enable the QSPI transfer error Interrupt */ - __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TE); + /* Enable the DMA transfer by setting the DMAEN bit in the QSPI CR register */ + SET_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN); - /* Enable the DMA transfer by setting the DMAEN bit in the QSPI CR register */ - SET_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN); + /* Process unlocked */ + __HAL_UNLOCK(hqspi); } else { + /* Disable the DMA transfer by clearing the DMAEN bit in the QSPI CR register */ + CLEAR_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN); + status = HAL_ERROR; hqspi->ErrorCode |= HAL_QSPI_ERROR_DMA; hqspi->State = HAL_QSPI_STATE_READY; @@ -1776,7 +1783,7 @@ HAL_StatusTypeDef HAL_QSPI_MemoryMapped(QSPI_HandleTypeDef *hqspi, QSPI_CommandT assert_param(IS_QSPI_INSTRUCTION_MODE(cmd->InstructionMode)); if (cmd->InstructionMode != QSPI_INSTRUCTION_NONE) { - assert_param(IS_QSPI_INSTRUCTION(cmd->Instruction)); + assert_param(IS_QSPI_INSTRUCTION(cmd->Instruction)); } assert_param(IS_QSPI_ADDRESS_MODE(cmd->AddressMode)); @@ -1816,9 +1823,9 @@ HAL_StatusTypeDef HAL_QSPI_MemoryMapped(QSPI_HandleTypeDef *hqspi, QSPI_CommandT if (status == HAL_OK) { /* Configure QSPI: CR register with timeout counter enable */ - MODIFY_REG(hqspi->Instance->CR, QUADSPI_CR_TCEN, cfg->TimeOutActivation); + MODIFY_REG(hqspi->Instance->CR, QUADSPI_CR_TCEN, cfg->TimeOutActivation); - if (cfg->TimeOutActivation == QSPI_TIMEOUT_COUNTER_ENABLE) + if (cfg->TimeOutActivation == QSPI_TIMEOUT_COUNTER_ENABLE) { assert_param(IS_QSPI_TIMEOUT_PERIOD(cfg->TimeOutPeriod)); @@ -2724,6 +2731,9 @@ static void QSPI_Config(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, uin cmd->AlternateBytesSize | cmd->AlternateByteMode | cmd->AddressMode | cmd->InstructionMode | cmd->Instruction | FunctionalMode)); + + /* Clear AR register */ + CLEAR_REG(hqspi->Instance->AR); } } else @@ -2751,6 +2761,9 @@ static void QSPI_Config(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, uin cmd->DataMode | (cmd->DummyCycles << QUADSPI_CCR_DCYC_Pos) | cmd->AlternateByteMode | cmd->AddressMode | cmd->InstructionMode | cmd->Instruction | FunctionalMode)); + + /* Clear AR register */ + CLEAR_REG(hqspi->Instance->AR); } } } @@ -2785,6 +2798,9 @@ static void QSPI_Config(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, uin cmd->DataMode | (cmd->DummyCycles << QUADSPI_CCR_DCYC_Pos) | cmd->AlternateBytesSize | cmd->AlternateByteMode | cmd->AddressMode | cmd->InstructionMode | FunctionalMode)); + + /* Clear AR register */ + CLEAR_REG(hqspi->Instance->AR); } } else @@ -2814,6 +2830,9 @@ static void QSPI_Config(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, uin cmd->DataMode | (cmd->DummyCycles << QUADSPI_CCR_DCYC_Pos) | cmd->AlternateByteMode | cmd->AddressMode | cmd->InstructionMode | FunctionalMode)); + + /* Clear AR register */ + CLEAR_REG(hqspi->Instance->AR); } } } diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c index 1a6de8dada..49b94e9b5c 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c +++ b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c @@ -339,7 +339,7 @@ HAL_StatusTypeDef HAL_RCC_DeInit(void) * first and then HSE On or HSE Bypass. * @retval HAL status */ -HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) +HAL_StatusTypeDef HAL_RCC_OscConfig(const RCC_OscInitTypeDef *RCC_OscInitStruct) { uint32_t tickstart; uint32_t pll_config; @@ -719,7 +719,7 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) * (for more details refer to section above "Initialization/de-initialization functions") * @retval None */ -HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) +HAL_StatusTypeDef HAL_RCC_ClockConfig(const RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) { uint32_t tickstart = 0; diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.c b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.c index aff44e8aa3..dddc5d84c9 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.c +++ b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.c @@ -6,8 +6,8 @@ * This file provides firmware functions to manage the following * functionalities of the Real-Time Clock (RTC) peripheral: * + Initialization and de-initialization functions - * + RTC Calendar (Time and Date) configuration functions - * + RTC Alarms (Alarm A and Alarm B) configuration functions + * + Calendar (Time and Date) configuration functions + * + Alarms (Alarm A and Alarm B) configuration functions * + Peripheral Control functions * + Peripheral State functions * @@ -127,6 +127,12 @@ *** Callback registration *** ============================================= [..] + When the compilation define USE_HAL_RTC_REGISTER_CALLBACKS is set to 0 or + not defined, the callback registration feature is not available and all + callbacks are set to the corresponding weak functions. + This is the recommended configuration in order to optimize memory/code + consumption footprint/performances. + [..] The compilation define USE_HAL_RTC_REGISTER_CALLBACKS when set to 1 allows the user to configure dynamically the driver callbacks. Use Function HAL_RTC_RegisterCallback() to register an interrupt callback. @@ -162,25 +168,21 @@ [..] By default, after the HAL_RTC_Init() and when the state is HAL_RTC_STATE_RESET, all callbacks are set to the corresponding weak functions: - examples AlarmAEventCallback(), WakeUpTimerEventCallback(). + examples AlarmAEventCallback(), TimeStampEventCallback(). Exception done for MspInit() and MspDeInit() callbacks that are reset to the - legacy weak function in the HAL_RTC_Init()/HAL_RTC_DeInit() only - when these callbacks are null (not registered beforehand). + legacy weak function in the HAL_RTC_Init()/HAL_RTC_DeInit() only when these + callbacks are null (not registered beforehand). If not, MspInit() or MspDeInit() are not null, HAL_RTC_Init()/HAL_RTC_DeInit() keep and use the user MspInit()/MspDeInit() callbacks (registered beforehand). [..] Callbacks can be registered/unregistered in HAL_RTC_STATE_READY state only. - Exception done MspInit()/MspDeInit() that can be registered/unregistered + Exception done for MspInit() and MspDeInit() that can be registered/unregistered in HAL_RTC_STATE_READY or HAL_RTC_STATE_RESET state. Thus registered (user) MspInit()/MspDeInit() callbacks can be used during the Init/DeInit. - In that case first register the MspInit()/MspDeInit() user callbacks - using HAL_RTC_RegisterCallback() before calling HAL_RTC_DeInit() - or HAL_RTC_Init() functions. - [..] - When The compilation define USE_HAL_RTC_REGISTER_CALLBACKS is set to 0 or - not defined, the callback registration feature is not available and all - callbacks are set to the corresponding weak functions. + In that case first register the MspInit()/MspDeInit() user callbacks using + HAL_RTC_RegisterCallback() before calling HAL_RTC_DeInit() or HAL_RTC_Init() + functions. @endverbatim ****************************************************************************** @@ -253,7 +255,7 @@ */ HAL_StatusTypeDef HAL_RTC_Init(RTC_HandleTypeDef *hrtc) { - HAL_StatusTypeDef status = HAL_ERROR; + HAL_StatusTypeDef status; /* Check RTC handler validity */ if (hrtc == NULL) @@ -366,7 +368,7 @@ HAL_StatusTypeDef HAL_RTC_Init(RTC_HandleTypeDef *hrtc) */ HAL_StatusTypeDef HAL_RTC_DeInit(RTC_HandleTypeDef *hrtc) { - HAL_StatusTypeDef status = HAL_ERROR; + HAL_StatusTypeDef status; /* Check the parameters */ assert_param(IS_RTC_ALL_INSTANCE(hrtc->Instance)); @@ -385,7 +387,7 @@ HAL_StatusTypeDef HAL_RTC_DeInit(RTC_HandleTypeDef *hrtc) /* Reset RTC registers */ hrtc->Instance->TR = 0x00000000U; hrtc->Instance->DR = (RTC_DR_WDU_0 | RTC_DR_MU_0 | RTC_DR_DU_0); - hrtc->Instance->CR &= 0x00000000U; + hrtc->Instance->CR = 0x00000000U; hrtc->Instance->WUTR = RTC_WUTR_WUT; hrtc->Instance->PRER = (uint32_t)(RTC_PRER_PREDIV_A | 0x000000FFU); hrtc->Instance->ALRMAR = 0x00000000U; @@ -444,11 +446,11 @@ HAL_StatusTypeDef HAL_RTC_DeInit(RTC_HandleTypeDef *hrtc) * @arg @ref HAL_RTC_ALARM_B_EVENT_CB_ID Alarm B Event Callback ID * @arg @ref HAL_RTC_TIMESTAMP_EVENT_CB_ID Timestamp Event Callback ID * @arg @ref HAL_RTC_WAKEUPTIMER_EVENT_CB_ID Wakeup Timer Event Callback ID - * @arg @ref HAL_RTC_TAMPER1_EVENT_CB_ID Tamper 1 Callback ID - * @arg @ref HAL_RTC_TAMPER2_EVENT_CB_ID Tamper 2 Callback ID - * @arg @ref HAL_RTC_TAMPER3_EVENT_CB_ID Tamper 3 Callback ID - * @arg @ref HAL_RTC_MSPINIT_CB_ID Msp Init callback ID - * @arg @ref HAL_RTC_MSPDEINIT_CB_ID Msp DeInit callback ID + * @arg @ref HAL_RTC_TAMPER1_EVENT_CB_ID Tamper 1 Event Callback ID + * @arg @ref HAL_RTC_TAMPER2_EVENT_CB_ID Tamper 2 Event Callback ID + * @arg @ref HAL_RTC_TAMPER3_EVENT_CB_ID Tamper 3 Event Callback ID + * @arg @ref HAL_RTC_MSPINIT_CB_ID MSP Init callback ID + * @arg @ref HAL_RTC_MSPDEINIT_CB_ID MSP DeInit callback ID * @param pCallback pointer to the Callback function * @retval HAL status */ @@ -551,11 +553,11 @@ HAL_StatusTypeDef HAL_RTC_RegisterCallback(RTC_HandleTypeDef *hrtc, HAL_RTC_Call * @arg @ref HAL_RTC_ALARM_B_EVENT_CB_ID Alarm B Event Callback ID * @arg @ref HAL_RTC_TIMESTAMP_EVENT_CB_ID Timestamp Event Callback ID * @arg @ref HAL_RTC_WAKEUPTIMER_EVENT_CB_ID Wakeup Timer Event Callback ID - * @arg @ref HAL_RTC_TAMPER1_EVENT_CB_ID Tamper 1 Callback ID - * @arg @ref HAL_RTC_TAMPER2_EVENT_CB_ID Tamper 2 Callback ID - * @arg @ref HAL_RTC_TAMPER3_EVENT_CB_ID Tamper 3 Callback ID - * @arg @ref HAL_RTC_MSPINIT_CB_ID Msp Init callback ID - * @arg @ref HAL_RTC_MSPDEINIT_CB_ID Msp DeInit callback ID + * @arg @ref HAL_RTC_TAMPER1_EVENT_CB_ID Tamper 1 Event Callback ID + * @arg @ref HAL_RTC_TAMPER2_EVENT_CB_ID Tamper 2 Event Callback ID + * @arg @ref HAL_RTC_TAMPER3_EVENT_CB_ID Tamper 3 Event Callback ID + * @arg @ref HAL_RTC_MSPINIT_CB_ID MSP Init callback ID + * @arg @ref HAL_RTC_MSPDEINIT_CB_ID MSP DeInit callback ID * @retval HAL status */ HAL_StatusTypeDef HAL_RTC_UnRegisterCallback(RTC_HandleTypeDef *hrtc, HAL_RTC_CallbackIDTypeDef CallbackID) @@ -1060,7 +1062,7 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sA tmpreg = (((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Hours) << RTC_ALRMAR_HU_Pos) | \ ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Minutes) << RTC_ALRMAR_MNU_Pos) | \ ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Seconds)) | \ - ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << RTC_TR_PM_Pos) | \ + ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << RTC_ALRMAR_PM_Pos) | \ ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmDateWeekDay) << RTC_ALRMAR_DU_Pos) | \ ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \ ((uint32_t)sAlarm->AlarmMask)); @@ -1093,7 +1095,7 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sA tmpreg = (((uint32_t)(sAlarm->AlarmTime.Hours) << RTC_ALRMAR_HU_Pos) | \ ((uint32_t)(sAlarm->AlarmTime.Minutes) << RTC_ALRMAR_MNU_Pos) | \ ((uint32_t) sAlarm->AlarmTime.Seconds) | \ - ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << RTC_TR_PM_Pos) | \ + ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << RTC_ALRMAR_PM_Pos) | \ ((uint32_t)(sAlarm->AlarmDateWeekDay) << RTC_ALRMAR_DU_Pos) | \ ((uint32_t) sAlarm->AlarmDateWeekDaySel) | \ ((uint32_t) sAlarm->AlarmMask)); @@ -1106,16 +1108,15 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sA /* Disable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - /* Configure the Alarm register */ if (sAlarm->Alarm == RTC_ALARM_A) { - /* Disable the Alarm A */ + /* Disable Alarm A */ __HAL_RTC_ALARMA_DISABLE(hrtc); /* In case interrupt mode is used, the interrupt source must be disabled */ __HAL_RTC_ALARM_DISABLE_IT(hrtc, RTC_IT_ALRA); - /* Clear the Alarm flag */ + /* Clear Alarm A flag */ __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRAF); /* Get tick */ @@ -1138,21 +1139,22 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sA } } + /* Configure Alarm A register */ hrtc->Instance->ALRMAR = (uint32_t)tmpreg; - /* Configure the Alarm A Subseconds register */ + /* Configure Alarm A Subseconds register */ hrtc->Instance->ALRMASSR = subsecondtmpreg; - /* Configure the Alarm state: Enable Alarm */ + /* Enable Alarm A */ __HAL_RTC_ALARMA_ENABLE(hrtc); } else { - /* Disable the Alarm B */ + /* Disable Alarm B */ __HAL_RTC_ALARMB_DISABLE(hrtc); /* In case interrupt mode is used, the interrupt source must be disabled */ __HAL_RTC_ALARM_DISABLE_IT(hrtc, RTC_IT_ALRB); - /* Clear the Alarm flag */ + /* Clear Alarm B flag */ __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRBF); /* Get tick */ @@ -1175,10 +1177,11 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sA } } + /* Configure Alarm B register */ hrtc->Instance->ALRMBR = (uint32_t)tmpreg; - /* Configure the Alarm B Subseconds register */ + /* Configure Alarm B Subseconds register */ hrtc->Instance->ALRMBSSR = subsecondtmpreg; - /* Configure the Alarm state: Enable Alarm */ + /* Enable Alarm B */ __HAL_RTC_ALARMB_ENABLE(hrtc); } @@ -1257,7 +1260,7 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef tmpreg = (((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Hours) << RTC_ALRMAR_HU_Pos) | \ ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Minutes) << RTC_ALRMAR_MNU_Pos) | \ ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Seconds)) | \ - ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << RTC_TR_PM_Pos) | \ + ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << RTC_ALRMAR_PM_Pos) | \ ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmDateWeekDay) << RTC_ALRMAR_DU_Pos) | \ ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \ ((uint32_t)sAlarm->AlarmMask)); @@ -1290,7 +1293,7 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef tmpreg = (((uint32_t)(sAlarm->AlarmTime.Hours) << RTC_ALRMAR_HU_Pos) | \ ((uint32_t)(sAlarm->AlarmTime.Minutes) << RTC_ALRMAR_MNU_Pos) | \ ((uint32_t) sAlarm->AlarmTime.Seconds) | \ - ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << RTC_TR_PM_Pos) | \ + ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << RTC_ALRMAR_PM_Pos) | \ ((uint32_t)(sAlarm->AlarmDateWeekDay) << RTC_ALRMAR_DU_Pos) | \ ((uint32_t) sAlarm->AlarmDateWeekDaySel) | \ ((uint32_t) sAlarm->AlarmMask)); @@ -1303,13 +1306,12 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef /* Disable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - /* Configure the Alarm register */ if (sAlarm->Alarm == RTC_ALARM_A) { - /* Disable the Alarm A */ + /* Disable Alarm A */ __HAL_RTC_ALARMA_DISABLE(hrtc); - /* Clear the Alarm flag */ + /* Clear Alarm A flag */ __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRAF); /* Wait till RTC ALRAWF flag is set and if timeout is reached exit */ @@ -1330,20 +1332,21 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef } } while (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAWF) == 0U); + /* Configure Alarm A register */ hrtc->Instance->ALRMAR = (uint32_t)tmpreg; - /* Configure the Alarm A Subseconds register */ + /* Configure Alarm A Subseconds register */ hrtc->Instance->ALRMASSR = subsecondtmpreg; - /* Configure the Alarm state: Enable Alarm */ + /* Enable Alarm A */ __HAL_RTC_ALARMA_ENABLE(hrtc); - /* Configure the Alarm interrupt */ + /* Enable Alarm A interrupt */ __HAL_RTC_ALARM_ENABLE_IT(hrtc, RTC_IT_ALRA); } else { - /* Disable the Alarm B */ + /* Disable Alarm B */ __HAL_RTC_ALARMB_DISABLE(hrtc); - /* Clear the Alarm flag */ + /* Clear Alarm B flag */ __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRBF); /* Reload the counter */ @@ -1367,16 +1370,17 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef } } while (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBWF) == 0U); + /* Configure Alarm B register */ hrtc->Instance->ALRMBR = (uint32_t)tmpreg; - /* Configure the Alarm B Subseconds register */ + /* Configure Alarm B Subseconds register */ hrtc->Instance->ALRMBSSR = subsecondtmpreg; - /* Configure the Alarm state: Enable Alarm */ + /* Enable Alarm B */ __HAL_RTC_ALARMB_ENABLE(hrtc); - /* Configure the Alarm interrupt */ + /* Enable Alarm B interrupt */ __HAL_RTC_ALARM_ENABLE_IT(hrtc, RTC_IT_ALRB); } - /* RTC Alarm Interrupt Configuration: EXTI configuration */ + /* Enable and configure the EXTI line associated to the RTC Alarm interrupt */ __HAL_RTC_ALARM_EXTI_ENABLE_IT(); __HAL_RTC_ALARM_EXTI_ENABLE_RISING_EDGE(); @@ -1428,7 +1432,7 @@ HAL_StatusTypeDef HAL_RTC_DeactivateAlarm(RTC_HandleTypeDef *hrtc, uint32_t Alar /* Get tick */ tickstart = HAL_GetTick(); - /* Wait till RTC ALRxWF flag is set and if timeout is reached exit */ + /* Wait till RTC ALRAWF flag is set and if timeout is reached exit */ while (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAWF) == 0U) { if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE) @@ -1456,7 +1460,7 @@ HAL_StatusTypeDef HAL_RTC_DeactivateAlarm(RTC_HandleTypeDef *hrtc, uint32_t Alar /* Get tick */ tickstart = HAL_GetTick(); - /* Wait till RTC ALRxWF flag is set and if timeout is reached exit */ + /* Wait till RTC ALRBWF flag is set and if timeout is reached exit */ while (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBWF) == 0U) { if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE) @@ -1553,7 +1557,7 @@ HAL_StatusTypeDef HAL_RTC_GetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sA */ void HAL_RTC_AlarmIRQHandler(RTC_HandleTypeDef *hrtc) { - /* Clear the EXTI's line Flag for RTC Alarm */ + /* Clear the EXTI flag associated to the RTC Alarm interrupt */ __HAL_RTC_ALARM_EXTI_CLEAR_FLAG(); /* Get the Alarm A interrupt source enable status */ diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.c b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.c index 2acb1de28c..ce83c3dbb8 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.c +++ b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.c @@ -58,7 +58,7 @@ *** Internal Timestamp configuration *** =============================== [..] - (+) To Enable the RTC internal Timestamp use the HAL_RTCEx_SetInternalTimeStamp() + (+) To enable the RTC internal Timestamp use the HAL_RTCEx_SetInternalTimeStamp() function. (+) To read the RTC Timestamp Time and Date register, use the HAL_RTCEx_GetTimeStamp() function. @@ -66,7 +66,7 @@ *** Tamper configuration *** ============================ [..] - (+) To Enable the RTC Tamper and configure the Tamper filter count, trigger + (+) To enable the RTC Tamper and configure the Tamper filter count, trigger Edge or Level according to the Tamper filter value (if equal to 0 Edge else Level), sampling frequency, NoErase, MaskFlag, precharge or discharge and Pull-UP use the HAL_RTCEx_SetTamper() function. @@ -98,9 +98,9 @@ This cycle is maintained by a 20-bit counter clocked by RTCCLK. (+) The smooth calibration register (RTC_CALR) specifies the number of RTCCLK clock cycles to be masked during the 32-second cycle. - (+) The RTC Smooth Digital Calibration value and the corresponding calibration - cycle period (32s, 16s, or 8s) can be calibrated using the - HAL_RTCEx_SetSmoothCalib() function. + (+) To configure the RTC Smooth Digital Calibration value and the corresponding + calibration cycle period (32s,16s and 8s) use the HAL_RTCEx_SetSmoothCalib() + function. @endverbatim ****************************************************************************** @@ -277,7 +277,7 @@ HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp_IT(RTC_HandleTypeDef *hrtc, uint32_t RT /* Enable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - /* RTC Timestamp Interrupt Configuration: EXTI configuration */ + /* Enable and configure the EXTI line associated to the RTC Timestamp and Tamper interrupts */ __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT(); __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_EDGE(); @@ -308,7 +308,7 @@ HAL_StatusTypeDef HAL_RTCEx_DeactivateTimeStamp(RTC_HandleTypeDef *hrtc) /* Disable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - /* In case of interrupt mode is used, the interrupt source must disabled */ + /* In case interrupt mode is used, the interrupt source must disabled */ __HAL_RTC_TIMESTAMP_DISABLE_IT(hrtc, RTC_IT_TS); /* Get the RTC_CR register and clear the bits to be configured */ @@ -345,6 +345,9 @@ HAL_StatusTypeDef HAL_RTCEx_SetInternalTimeStamp(RTC_HandleTypeDef *hrtc) /* Disable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); + /* Clear the internal Timestamp flag */ + __HAL_RTC_INTERNAL_TIMESTAMP_CLEAR_FLAG(hrtc, RTC_FLAG_ITSF); + /* Configure the internal Timestamp Enable bits */ __HAL_RTC_INTERNAL_TIMESTAMP_ENABLE(hrtc); @@ -739,7 +742,7 @@ HAL_StatusTypeDef HAL_RTCEx_SetTamper_IT(RTC_HandleTypeDef *hrtc, RTC_TamperType /* Copy desired configuration into configuration register */ hrtc->Instance->TAMPCR = tmpreg; - /* RTC Tamper Interrupt Configuration: EXTI configuration */ + /* Enable and configure the EXTI line associated to the RTC Timestamp and Tamper interrupts */ __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT(); __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_EDGE(); @@ -807,7 +810,7 @@ HAL_StatusTypeDef HAL_RTCEx_DeactivateTamper(RTC_HandleTypeDef *hrtc, uint32_t T */ void HAL_RTCEx_TamperTimeStampIRQHandler(RTC_HandleTypeDef *hrtc) { - /* Clear the EXTI's Flag for RTC Timestamp and Tamper */ + /* Clear the EXTI flag associated to the RTC Timestamp and Tamper interrupts */ __HAL_RTC_TAMPER_TIMESTAMP_EXTI_CLEAR_FLAG(); /* Get the Timestamp interrupt source enable status */ @@ -1295,7 +1298,7 @@ HAL_StatusTypeDef HAL_RTCEx_SetWakeUpTimer_IT(RTC_HandleTypeDef *hrtc, uint32_t /* Configure the Wakeup Timer counter */ hrtc->Instance->WUTR = (uint32_t)WakeUpCounter; - /* RTC wakeup timer Interrupt Configuration: EXTI configuration */ + /* Enable and configure the EXTI line associated to the RTC Wakeup Timer interrupt */ __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_IT(); __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE(); @@ -1337,7 +1340,7 @@ HAL_StatusTypeDef HAL_RTCEx_DeactivateWakeUpTimer(RTC_HandleTypeDef *hrtc) /* Disable the Wakeup Timer */ __HAL_RTC_WAKEUPTIMER_DISABLE(hrtc); - /* In case of interrupt mode is used, the interrupt source must disabled */ + /* In case interrupt mode is used, the interrupt source must disabled */ __HAL_RTC_WAKEUPTIMER_DISABLE_IT(hrtc, RTC_IT_WUT); /* Get tick */ @@ -1396,7 +1399,7 @@ uint32_t HAL_RTCEx_GetWakeUpTimer(RTC_HandleTypeDef *hrtc) */ void HAL_RTCEx_WakeUpTimerIRQHandler(RTC_HandleTypeDef *hrtc) { - /* Clear the EXTI's line Flag for RTC WakeUpTimer */ + /* Clear the EXTI flag associated to the RTC Wakeup Timer interrupt */ __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG(); /* Get the pending status of the Wakeup timer Interrupt */ @@ -1513,7 +1516,7 @@ void HAL_RTCEx_BKUPWrite(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister, uint3 /* Check the parameters */ assert_param(IS_RTC_BKP(BackupRegister)); - tmp = (uint32_t) & (hrtc->Instance->BKP0R); + tmp = (uint32_t) &(hrtc->Instance->BKP0R); tmp += (BackupRegister * 4U); /* Write the specified register */ @@ -1536,7 +1539,7 @@ uint32_t HAL_RTCEx_BKUPRead(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister) /* Check the parameters */ assert_param(IS_RTC_BKP(BackupRegister)); - tmp = (uint32_t) & (hrtc->Instance->BKP0R); + tmp = (uint32_t) &(hrtc->Instance->BKP0R); tmp += (BackupRegister * 4U); /* Read the specified register */ @@ -1900,7 +1903,7 @@ HAL_StatusTypeDef HAL_RTCEx_EnableBypassShadow(RTC_HandleTypeDef *hrtc) __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); /* Set the BYPSHAD bit */ - hrtc->Instance->CR |= (uint8_t)RTC_CR_BYPSHAD; + hrtc->Instance->CR |= (uint32_t)RTC_CR_BYPSHAD; /* Enable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); @@ -1933,7 +1936,7 @@ HAL_StatusTypeDef HAL_RTCEx_DisableBypassShadow(RTC_HandleTypeDef *hrtc) __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); /* Reset the BYPSHAD bit */ - hrtc->Instance->CR &= (uint8_t)~RTC_CR_BYPSHAD; + hrtc->Instance->CR &= (uint32_t)~RTC_CR_BYPSHAD; /* Enable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sai.c b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sai.c index 74a9755a8a..952ed7730a 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sai.c +++ b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sai.c @@ -1679,14 +1679,36 @@ void HAL_SAI_IRQHandler(SAI_HandleTypeDef *hsai) hsai->hdmatx->XferAbortCallback = SAI_DMAAbort; /* Abort DMA in IT mode */ - HAL_DMA_Abort_IT(hsai->hdmatx); + if (HAL_DMA_Abort_IT(hsai->hdmatx) != HAL_OK) + { + /* Update SAI error code */ + hsai->ErrorCode |= HAL_SAI_ERROR_DMA; + + /* Call SAI error callback */ +#if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) + hsai->ErrorCallback(hsai); +#else + HAL_SAI_ErrorCallback(hsai); +#endif /* USE_HAL_SAI_REGISTER_CALLBACKS */ + } } else if (hsai->hdmarx != NULL) { /* Set the DMA Rx abort callback */ hsai->hdmarx->XferAbortCallback = SAI_DMAAbort; /* Abort DMA in IT mode */ - HAL_DMA_Abort_IT(hsai->hdmarx); + if (HAL_DMA_Abort_IT(hsai->hdmarx) != HAL_OK) + { + /* Update SAI error code */ + hsai->ErrorCode |= HAL_SAI_ERROR_DMA; + + /* Call SAI error callback */ +#if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) + hsai->ErrorCallback(hsai); +#else + HAL_SAI_ErrorCallback(hsai); +#endif /* USE_HAL_SAI_REGISTER_CALLBACKS */ + } } } else @@ -1720,14 +1742,36 @@ void HAL_SAI_IRQHandler(SAI_HandleTypeDef *hsai) /* Set the DMA Tx abort callback */ hsai->hdmatx->XferAbortCallback = SAI_DMAAbort; /* Abort DMA in IT mode */ - HAL_DMA_Abort_IT(hsai->hdmatx); + if (HAL_DMA_Abort_IT(hsai->hdmatx) != HAL_OK) + { + /* Update SAI error code */ + hsai->ErrorCode |= HAL_SAI_ERROR_DMA; + + /* Call SAI error callback */ +#if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) + hsai->ErrorCallback(hsai); +#else + HAL_SAI_ErrorCallback(hsai); +#endif /* USE_HAL_SAI_REGISTER_CALLBACKS */ + } } else if (hsai->hdmarx != NULL) { /* Set the DMA Rx abort callback */ hsai->hdmarx->XferAbortCallback = SAI_DMAAbort; /* Abort DMA in IT mode */ - HAL_DMA_Abort_IT(hsai->hdmarx); + if (HAL_DMA_Abort_IT(hsai->hdmarx) != HAL_OK) + { + /* Update SAI error code */ + hsai->ErrorCode |= HAL_SAI_ERROR_DMA; + + /* Call SAI error callback */ +#if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) + hsai->ErrorCallback(hsai); +#else + HAL_SAI_ErrorCallback(hsai); +#endif /* USE_HAL_SAI_REGISTER_CALLBACKS */ + } } } else @@ -1758,14 +1802,36 @@ void HAL_SAI_IRQHandler(SAI_HandleTypeDef *hsai) /* Set the DMA Tx abort callback */ hsai->hdmatx->XferAbortCallback = SAI_DMAAbort; /* Abort DMA in IT mode */ - HAL_DMA_Abort_IT(hsai->hdmatx); + if (HAL_DMA_Abort_IT(hsai->hdmatx) != HAL_OK) + { + /* Update SAI error code */ + hsai->ErrorCode |= HAL_SAI_ERROR_DMA; + + /* Call SAI error callback */ +#if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) + hsai->ErrorCallback(hsai); +#else + HAL_SAI_ErrorCallback(hsai); +#endif /* USE_HAL_SAI_REGISTER_CALLBACKS */ + } } else if (hsai->hdmarx != NULL) { /* Set the DMA Rx abort callback */ hsai->hdmarx->XferAbortCallback = SAI_DMAAbort; /* Abort DMA in IT mode */ - HAL_DMA_Abort_IT(hsai->hdmarx); + if (HAL_DMA_Abort_IT(hsai->hdmarx) != HAL_OK) + { + /* Update SAI error code */ + hsai->ErrorCode |= HAL_SAI_ERROR_DMA; + + /* Call SAI error callback */ +#if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) + hsai->ErrorCallback(hsai); +#else + HAL_SAI_ErrorCallback(hsai); +#endif /* USE_HAL_SAI_REGISTER_CALLBACKS */ + } } else { diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c index 3d16f9b979..cd8414d807 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c +++ b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c @@ -403,7 +403,6 @@ HAL_StatusTypeDef HAL_SD_Init(SD_HandleTypeDef *hsd) HAL_StatusTypeDef HAL_SD_InitCard(SD_HandleTypeDef *hsd) { uint32_t errorstate; - HAL_StatusTypeDef status; SD_InitTypeDef Init; /* Default SDMMC peripheral configuration for SD card initialization */ @@ -415,11 +414,7 @@ HAL_StatusTypeDef HAL_SD_InitCard(SD_HandleTypeDef *hsd) Init.ClockDiv = SDMMC_INIT_CLK_DIV; /* Initialize SDMMC peripheral interface with default configuration */ - status = SDMMC_Init(hsd->Instance, Init); - if(status != HAL_OK) - { - return HAL_ERROR; - } + SDMMC_Init(hsd->Instance, Init); /* Disable SDMMC Clock */ __HAL_SD_DISABLE(hsd); @@ -2868,7 +2863,7 @@ static uint32_t SD_SendSDStatus(SD_HandleTypeDef *hsd, uint32_t *pSDstatus) } } - if((HAL_GetTick() - tickstart) >= SDMMC_DATATIMEOUT) + if((HAL_GetTick() - tickstart) >= SDMMC_SWDATATIMEOUT) { return HAL_SD_ERROR_TIMEOUT; } @@ -2896,7 +2891,7 @@ static uint32_t SD_SendSDStatus(SD_HandleTypeDef *hsd, uint32_t *pSDstatus) *pData = SDMMC_ReadFIFO(hsd->Instance); pData++; - if((HAL_GetTick() - tickstart) >= SDMMC_DATATIMEOUT) + if((HAL_GetTick() - tickstart) >= SDMMC_SWDATATIMEOUT) { return HAL_SD_ERROR_TIMEOUT; } @@ -3088,7 +3083,7 @@ static uint32_t SD_FindSCR(SD_HandleTypeDef *hsd, uint32_t *pSCR) break; } - if((HAL_GetTick() - tickstart) >= SDMMC_DATATIMEOUT) + if((HAL_GetTick() - tickstart) >= SDMMC_SWDATATIMEOUT) { return HAL_SD_ERROR_TIMEOUT; } diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.c b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.c index f4bb9871b3..80165ff0ea 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.c +++ b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.c @@ -1211,7 +1211,7 @@ uint32_t HAL_SDRAM_GetModeStatus(SDRAM_HandleTypeDef *hsdram) * the configuration information for SDRAM module. * @retval HAL state */ -HAL_SDRAM_StateTypeDef HAL_SDRAM_GetState(SDRAM_HandleTypeDef *hsdram) +HAL_SDRAM_StateTypeDef HAL_SDRAM_GetState(const SDRAM_HandleTypeDef *hsdram) { return hsdram->State; } @@ -1234,6 +1234,7 @@ HAL_SDRAM_StateTypeDef HAL_SDRAM_GetState(SDRAM_HandleTypeDef *hsdram) */ static void SDRAM_DMACplt(DMA_HandleTypeDef *hdma) { + /* Derogation MISRAC2012-Rule-11.5 */ SDRAM_HandleTypeDef *hsdram = (SDRAM_HandleTypeDef *)(hdma->Parent); /* Disable the DMA channel */ @@ -1256,6 +1257,7 @@ static void SDRAM_DMACplt(DMA_HandleTypeDef *hdma) */ static void SDRAM_DMACpltProt(DMA_HandleTypeDef *hdma) { + /* Derogation MISRAC2012-Rule-11.5 */ SDRAM_HandleTypeDef *hsdram = (SDRAM_HandleTypeDef *)(hdma->Parent); /* Disable the DMA channel */ @@ -1278,6 +1280,7 @@ static void SDRAM_DMACpltProt(DMA_HandleTypeDef *hdma) */ static void SDRAM_DMAError(DMA_HandleTypeDef *hdma) { + /* Derogation MISRAC2012-Rule-11.5 */ SDRAM_HandleTypeDef *hsdram = (SDRAM_HandleTypeDef *)(hdma->Parent); /* Disable the DMA channel */ diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_smartcard.c b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_smartcard.c index eadeacb940..2378a890ac 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_smartcard.c +++ b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_smartcard.c @@ -2282,7 +2282,7 @@ static HAL_StatusTypeDef SMARTCARD_SetConfig(SMARTCARD_HandleTypeDef *hsmartcard assert_param(IS_SMARTCARD_TIMEOUT_VALUE(hsmartcard->Init.TimeOutValue)); tmpreg |= (uint32_t) hsmartcard->Init.TimeOutValue; } - MODIFY_REG(hsmartcard->Instance->RTOR, (USART_RTOR_RTO | USART_RTOR_BLEN), tmpreg); + WRITE_REG(hsmartcard->Instance->RTOR, tmpreg); /*-------------------------- USART BRR Configuration -----------------------*/ SMARTCARD_GETCLOCKSOURCE(hsmartcard, clocksource); diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_smbus.c b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_smbus.c index 0ee33b51f8..38e1aacb17 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_smbus.c +++ b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_smbus.c @@ -1959,7 +1959,7 @@ static HAL_StatusTypeDef SMBUS_Master_ISR(SMBUS_HandleTypeDef *hsmbus, uint32_t /* Increment Buffer pointer */ hsmbus->pBuffPtr++; - if ((hsmbus->XferSize > 0U)) + if (hsmbus->XferSize > 0U) { hsmbus->XferSize--; hsmbus->XferCount--; @@ -2387,7 +2387,7 @@ static HAL_StatusTypeDef SMBUS_Slave_ISR(SMBUS_HandleTypeDef *hsmbus, uint32_t S /* Increment Buffer pointer */ hsmbus->pBuffPtr++; - if ((hsmbus->XferSize > 0U)) + if (hsmbus->XferSize > 0U) { hsmbus->XferSize--; hsmbus->XferCount--; diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.c b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.c index 61a06ea68f..bd12c67cae 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.c +++ b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.c @@ -44,7 +44,8 @@ (+++) Configure the DMA handle parameters (+++) Configure the DMA Tx or Rx Stream/Channel (+++) Associate the initialized hdma_tx(or _rx) handle to the hspi DMA Tx or Rx handle - (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx or Rx Stream/Channel + (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx + or Rx Stream/Channel (#) Program the Mode, BidirectionalMode , Data size, Baudrate Prescaler, NSS management, Clock polarity and phase, FirstBit and CRC configuration in the hspi Init structure. @@ -190,7 +191,8 @@ @note The max SPI frequency depend on SPI data size (4bits, 5bits,..., 8bits,...15bits, 16bits), SPI mode(2 Lines fullduplex, 2 lines RxOnly, 1 line TX/RX) and Process mode (Polling, IT, DMA). @note - (#) TX/RX processes are HAL_SPI_TransmitReceive(), HAL_SPI_TransmitReceive_IT() and HAL_SPI_TransmitReceive_DMA() + (#) TX/RX processes are HAL_SPI_TransmitReceive(), HAL_SPI_TransmitReceive_IT() and + HAL_SPI_TransmitReceive_DMA() (#) RX processes are HAL_SPI_Receive(), HAL_SPI_Receive_IT() and HAL_SPI_Receive_DMA() (#) TX processes are HAL_SPI_Transmit(), HAL_SPI_Transmit_IT() and HAL_SPI_Transmit_DMA() @@ -215,7 +217,7 @@ * @{ */ #define SPI_DEFAULT_TIMEOUT 100U -#define SPI_BSY_FLAG_WORKAROUND_TIMEOUT 1000U /*!< Timeout 1000 µs */ +#define SPI_BSY_FLAG_WORKAROUND_TIMEOUT 1000U /*!< Timeout 1000 us */ /** * @} */ @@ -814,43 +816,40 @@ HAL_StatusTypeDef HAL_SPI_UnRegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_Ca * @brief Transmit an amount of data in blocking mode. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. - * @param pData pointer to data buffer - * @param Size amount of data to be sent - * @param Timeout Timeout duration + * @param pData pointer to data buffer (u8 or u16 data elements) + * @param Size amount of data elements (u8 or u16) to be sent + * @param Timeout Timeout duration in ms * @retval HAL status */ -HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout) +HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, const uint8_t *pData, uint16_t Size, uint32_t Timeout) { uint32_t tickstart; - HAL_StatusTypeDef errorcode = HAL_OK; uint16_t initial_TxXferCount; /* Check Direction parameter */ assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction)); - /* Process Locked */ - __HAL_LOCK(hspi); - /* Init tickstart for timeout management*/ tickstart = HAL_GetTick(); initial_TxXferCount = Size; if (hspi->State != HAL_SPI_STATE_READY) { - errorcode = HAL_BUSY; - goto error; + return HAL_BUSY; } if ((pData == NULL) || (Size == 0U)) { - errorcode = HAL_ERROR; - goto error; + return HAL_ERROR; } + /* Process Locked */ + __HAL_LOCK(hspi); + /* Set the transaction information */ hspi->State = HAL_SPI_STATE_BUSY_TX; hspi->ErrorCode = HAL_SPI_ERROR_NONE; - hspi->pTxBuffPtr = (uint8_t *)pData; + hspi->pTxBuffPtr = (const uint8_t *)pData; hspi->TxXferSize = Size; hspi->TxXferCount = Size; @@ -889,7 +888,7 @@ HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint { if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U)) { - hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); + hspi->Instance->DR = *((const uint16_t *)hspi->pTxBuffPtr); hspi->pTxBuffPtr += sizeof(uint16_t); hspi->TxXferCount--; } @@ -899,7 +898,7 @@ HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint /* Wait until TXE flag is set to send data */ if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) { - hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); + hspi->Instance->DR = *((const uint16_t *)hspi->pTxBuffPtr); hspi->pTxBuffPtr += sizeof(uint16_t); hspi->TxXferCount--; } @@ -908,9 +907,9 @@ HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint /* Timeout management */ if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U)) { - errorcode = HAL_TIMEOUT; hspi->State = HAL_SPI_STATE_READY; - goto error; + __HAL_UNLOCK(hspi); + return HAL_TIMEOUT; } } } @@ -923,13 +922,13 @@ HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint if (hspi->TxXferCount > 1U) { /* write on the data register in packing mode */ - hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); + hspi->Instance->DR = *((const uint16_t *)hspi->pTxBuffPtr); hspi->pTxBuffPtr += sizeof(uint16_t); hspi->TxXferCount -= 2U; } else { - *((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr); + *((__IO uint8_t *)&hspi->Instance->DR) = *((const uint8_t *)hspi->pTxBuffPtr); hspi->pTxBuffPtr ++; hspi->TxXferCount--; } @@ -942,13 +941,13 @@ HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint if (hspi->TxXferCount > 1U) { /* write on the data register in packing mode */ - hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); + hspi->Instance->DR = *((const uint16_t *)hspi->pTxBuffPtr); hspi->pTxBuffPtr += sizeof(uint16_t); hspi->TxXferCount -= 2U; } else { - *((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr); + *((__IO uint8_t *)&hspi->Instance->DR) = *((const uint8_t *)hspi->pTxBuffPtr); hspi->pTxBuffPtr++; hspi->TxXferCount--; } @@ -958,9 +957,9 @@ HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint /* Timeout management */ if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U)) { - errorcode = HAL_TIMEOUT; hspi->State = HAL_SPI_STATE_READY; - goto error; + __HAL_UNLOCK(hspi); + return HAL_TIMEOUT; } } } @@ -985,29 +984,31 @@ HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint __HAL_SPI_CLEAR_OVRFLAG(hspi); } + hspi->State = HAL_SPI_STATE_READY; + /* Process Unlocked */ + __HAL_UNLOCK(hspi); + if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) { - errorcode = HAL_ERROR; + return HAL_ERROR; } else { - hspi->State = HAL_SPI_STATE_READY; + return HAL_OK; } - -error: - /* Process Unlocked */ - __HAL_UNLOCK(hspi); - return errorcode; } /** * @brief Receive an amount of data in blocking mode. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. - * @param pData pointer to data buffer - * @param Size amount of data to be received - * @param Timeout Timeout duration + * @param pData pointer to data buffer (u8 or u16 data elements) + * @param Size amount of data elements (u8 or u16) to be received + * @param Timeout Timeout duration in ms * @retval HAL status + * @note In master mode, if the direction is set to SPI_DIRECTION_2LINES + * the receive buffer is written to data register (DR) to generate + * clock pulses and receive data */ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout) { @@ -1017,12 +1018,15 @@ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint1 __IO uint8_t tmpreg8 = 0; #endif /* USE_SPI_CRC */ uint32_t tickstart; - HAL_StatusTypeDef errorcode = HAL_OK; if (hspi->State != HAL_SPI_STATE_READY) { - errorcode = HAL_BUSY; - goto error; + return HAL_BUSY; + } + + if ((pData == NULL) || (Size == 0U)) + { + return HAL_ERROR; } if ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES)) @@ -1032,17 +1036,11 @@ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint1 return HAL_SPI_TransmitReceive(hspi, pData, pData, Size, Timeout); } - /* Process Locked */ - __HAL_LOCK(hspi); - /* Init tickstart for timeout management*/ tickstart = HAL_GetTick(); - if ((pData == NULL) || (Size == 0U)) - { - errorcode = HAL_ERROR; - goto error; - } + /* Process Locked */ + __HAL_LOCK(hspi); /* Set the transaction information */ hspi->State = HAL_SPI_STATE_BUSY_RX; @@ -1114,9 +1112,9 @@ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint1 /* Timeout management */ if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U)) { - errorcode = HAL_TIMEOUT; hspi->State = HAL_SPI_STATE_READY; - goto error; + __HAL_UNLOCK(hspi); + return HAL_TIMEOUT; } } } @@ -1138,9 +1136,9 @@ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint1 /* Timeout management */ if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U)) { - errorcode = HAL_TIMEOUT; hspi->State = HAL_SPI_STATE_READY; - goto error; + __HAL_UNLOCK(hspi); + return HAL_TIMEOUT; } } } @@ -1157,8 +1155,8 @@ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint1 if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SET, Timeout, tickstart) != HAL_OK) { /* the latest data has not been received */ - errorcode = HAL_TIMEOUT; - goto error; + __HAL_UNLOCK(hspi); + return HAL_TIMEOUT; } /* Receive last data in 16 Bit mode */ @@ -1176,8 +1174,9 @@ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint1 if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SET, Timeout, tickstart) != HAL_OK) { SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); - errorcode = HAL_TIMEOUT; - goto error; + hspi->State = HAL_SPI_STATE_READY; + __HAL_UNLOCK(hspi); + return HAL_TIMEOUT; } /* Read CRC to Flush DR and RXNE flag */ @@ -1203,8 +1202,9 @@ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint1 { /* Error on the CRC reception */ SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); - errorcode = HAL_TIMEOUT; - goto error; + hspi->State = HAL_SPI_STATE_READY; + __HAL_UNLOCK(hspi); + return HAL_TIMEOUT; } /* Read 8bit CRC again in case of 16bit CRC in 8bit Data mode */ tmpreg8 = *ptmpreg8; @@ -1230,32 +1230,31 @@ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint1 } #endif /* USE_SPI_CRC */ + hspi->State = HAL_SPI_STATE_READY; + /* Unlock the process */ + __HAL_UNLOCK(hspi); if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) { - errorcode = HAL_ERROR; + return HAL_ERROR; } else { - hspi->State = HAL_SPI_STATE_READY; + return HAL_OK; } - -error : - __HAL_UNLOCK(hspi); - return errorcode; } /** * @brief Transmit and Receive an amount of data in blocking mode. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. - * @param pTxData pointer to transmission data buffer - * @param pRxData pointer to reception data buffer - * @param Size amount of data to be sent and received - * @param Timeout Timeout duration + * @param pTxData pointer to transmission data buffer (u8 or u16 data elements) + * @param pRxData pointer to reception data buffer (u8 or u16 data elements) + * @param Size amount of data elements (u8 or u16) to be sent and received + * @param Timeout Timeout duration in ms * @retval HAL status */ -HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, - uint32_t Timeout) +HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, const uint8_t *pTxData, uint8_t *pRxData, + uint16_t Size, uint32_t Timeout) { uint16_t initial_TxXferCount; uint16_t initial_RxXferCount; @@ -1272,14 +1271,10 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD /* Variable used to alternate Rx and Tx during transfer */ uint32_t txallowed = 1U; - HAL_StatusTypeDef errorcode = HAL_OK; /* Check Direction parameter */ assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction)); - /* Process Locked */ - __HAL_LOCK(hspi); - /* Init tickstart for timeout management*/ tickstart = HAL_GetTick(); @@ -1294,18 +1289,20 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD #endif /* USE_SPI_CRC */ if (!((tmp_state == HAL_SPI_STATE_READY) || \ - ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_state == HAL_SPI_STATE_BUSY_RX)))) + ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && + (tmp_state == HAL_SPI_STATE_BUSY_RX)))) { - errorcode = HAL_BUSY; - goto error; + return HAL_BUSY; } if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U)) { - errorcode = HAL_ERROR; - goto error; + return HAL_ERROR; } + /* Process Locked */ + __HAL_LOCK(hspi); + /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */ if (hspi->State != HAL_SPI_STATE_BUSY_RX) { @@ -1317,7 +1314,7 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD hspi->pRxBuffPtr = (uint8_t *)pRxData; hspi->RxXferCount = Size; hspi->RxXferSize = Size; - hspi->pTxBuffPtr = (uint8_t *)pTxData; + hspi->pTxBuffPtr = (const uint8_t *)pTxData; hspi->TxXferCount = Size; hspi->TxXferSize = Size; @@ -1357,7 +1354,7 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD { if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U)) { - hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); + hspi->Instance->DR = *((const uint16_t *)hspi->pTxBuffPtr); hspi->pTxBuffPtr += sizeof(uint16_t); hspi->TxXferCount--; @@ -1380,7 +1377,7 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD /* Check TXE flag */ if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) && (hspi->TxXferCount > 0U) && (txallowed == 1U)) { - hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); + hspi->Instance->DR = *((const uint16_t *)hspi->pTxBuffPtr); hspi->pTxBuffPtr += sizeof(uint16_t); hspi->TxXferCount--; /* Next Data is a reception (Rx). Tx not allowed */ @@ -1411,9 +1408,9 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD } if (((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) { - errorcode = HAL_TIMEOUT; hspi->State = HAL_SPI_STATE_READY; - goto error; + __HAL_UNLOCK(hspi); + return HAL_TIMEOUT; } } } @@ -1424,13 +1421,13 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD { if (hspi->TxXferCount > 1U) { - hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); + hspi->Instance->DR = *((const uint16_t *)hspi->pTxBuffPtr); hspi->pTxBuffPtr += sizeof(uint16_t); hspi->TxXferCount -= 2U; } else { - *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr); + *(__IO uint8_t *)&hspi->Instance->DR = *((const uint8_t *)hspi->pTxBuffPtr); hspi->pTxBuffPtr++; hspi->TxXferCount--; @@ -1455,13 +1452,13 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD { if (hspi->TxXferCount > 1U) { - hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); + hspi->Instance->DR = *((const uint16_t *)hspi->pTxBuffPtr); hspi->pTxBuffPtr += sizeof(uint16_t); hspi->TxXferCount -= 2U; } else { - *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr); + *(__IO uint8_t *)&hspi->Instance->DR = *((const uint8_t *)hspi->pTxBuffPtr); hspi->pTxBuffPtr++; hspi->TxXferCount--; } @@ -1507,9 +1504,9 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD } if ((((HAL_GetTick() - tickstart) >= Timeout) && ((Timeout != HAL_MAX_DELAY))) || (Timeout == 0U)) { - errorcode = HAL_TIMEOUT; hspi->State = HAL_SPI_STATE_READY; - goto error; + __HAL_UNLOCK(hspi); + return HAL_TIMEOUT; } } } @@ -1523,8 +1520,9 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD { /* Error on the CRC reception */ SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); - errorcode = HAL_TIMEOUT; - goto error; + hspi->State = HAL_SPI_STATE_READY; + __HAL_UNLOCK(hspi); + return HAL_TIMEOUT; } /* Read CRC */ if (hspi->Init.DataSize == SPI_DATASIZE_16BIT) @@ -1549,8 +1547,9 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD { /* Error on the CRC reception */ SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); - errorcode = HAL_TIMEOUT; - goto error; + hspi->State = HAL_SPI_STATE_READY; + __HAL_UNLOCK(hspi); + return HAL_TIMEOUT; } /* Read 8bit CRC again in case of 16bit CRC in 8bit Data mode */ tmpreg8 = *ptmpreg8; @@ -1566,43 +1565,44 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); /* Clear CRC Flag */ __HAL_SPI_CLEAR_CRCERRFLAG(hspi); - - errorcode = HAL_ERROR; + __HAL_UNLOCK(hspi); + return HAL_ERROR; } #endif /* USE_SPI_CRC */ /* Check the end of the transaction */ if (SPI_EndRxTxTransaction(hspi, Timeout, tickstart) != HAL_OK) { - errorcode = HAL_ERROR; hspi->ErrorCode = HAL_SPI_ERROR_FLAG; + __HAL_UNLOCK(hspi); + return HAL_ERROR; } + + hspi->State = HAL_SPI_STATE_READY; + /* Unlock the process */ + __HAL_UNLOCK(hspi); + if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) { - errorcode = HAL_ERROR; + return HAL_ERROR; } else { - hspi->State = HAL_SPI_STATE_READY; + return HAL_OK; } - -error : - __HAL_UNLOCK(hspi); - return errorcode; } /** * @brief Transmit an amount of data in non-blocking mode with Interrupt. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. - * @param pData pointer to data buffer - * @param Size amount of data to be sent + * @param pData pointer to data buffer (u8 or u16 data elements) + * @param Size amount of data elements (u8 or u16) to be sent * @retval HAL status */ -HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size) +HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, const uint8_t *pData, uint16_t Size) { - HAL_StatusTypeDef errorcode = HAL_OK; /* Check Direction parameter */ assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction)); @@ -1610,14 +1610,12 @@ HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, u if ((pData == NULL) || (Size == 0U)) { - errorcode = HAL_ERROR; - goto error; + return HAL_ERROR; } if (hspi->State != HAL_SPI_STATE_READY) { - errorcode = HAL_BUSY; - goto error; + return HAL_BUSY; } /* Process Locked */ @@ -1626,7 +1624,7 @@ HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, u /* Set the transaction information */ hspi->State = HAL_SPI_STATE_BUSY_TX; hspi->ErrorCode = HAL_SPI_ERROR_NONE; - hspi->pTxBuffPtr = (uint8_t *)pData; + hspi->pTxBuffPtr = (const uint8_t *)pData; hspi->TxXferSize = Size; hspi->TxXferCount = Size; @@ -1674,27 +1672,28 @@ HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, u /* Enable TXE and ERR interrupt */ __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_ERR)); -error : - return errorcode; + return HAL_OK; } /** * @brief Receive an amount of data in non-blocking mode with Interrupt. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. - * @param pData pointer to data buffer - * @param Size amount of data to be sent + * @param pData pointer to data buffer (u8 or u16 data elements) + * @param Size amount of data elements (u8 or u16) to be received * @retval HAL status */ HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size) { - HAL_StatusTypeDef errorcode = HAL_OK; - if (hspi->State != HAL_SPI_STATE_READY) { - errorcode = HAL_BUSY; - goto error; + return HAL_BUSY; + } + + if ((pData == NULL) || (Size == 0U)) + { + return HAL_ERROR; } if ((hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->Init.Mode == SPI_MODE_MASTER)) @@ -1705,12 +1704,6 @@ HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, ui } - if ((pData == NULL) || (Size == 0U)) - { - errorcode = HAL_ERROR; - goto error; - } - /* Process Locked */ __HAL_LOCK(hspi); @@ -1782,24 +1775,23 @@ HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, ui /* Enable RXNE and ERR interrupt */ __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR)); -error : - return errorcode; + return HAL_OK; } /** * @brief Transmit and Receive an amount of data in non-blocking mode with Interrupt. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. - * @param pTxData pointer to transmission data buffer - * @param pRxData pointer to reception data buffer - * @param Size amount of data to be sent and received + * @param pTxData pointer to transmission data buffer (u8 or u16 data elements) + * @param pRxData pointer to reception data buffer (u8 or u16 data elements) + * @param Size amount of data elements (u8 or u16) to be sent and received * @retval HAL status */ -HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size) +HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, const uint8_t *pTxData, uint8_t *pRxData, + uint16_t Size) { uint32_t tmp_mode; HAL_SPI_StateTypeDef tmp_state; - HAL_StatusTypeDef errorcode = HAL_OK; /* Check Direction parameter */ assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction)); @@ -1809,16 +1801,15 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *p tmp_mode = hspi->Init.Mode; if (!((tmp_state == HAL_SPI_STATE_READY) || \ - ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_state == HAL_SPI_STATE_BUSY_RX)))) + ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && + (tmp_state == HAL_SPI_STATE_BUSY_RX)))) { - errorcode = HAL_BUSY; - goto error; + return HAL_BUSY; } if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U)) { - errorcode = HAL_ERROR; - goto error; + return HAL_ERROR; } /* Process locked */ @@ -1832,7 +1823,7 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *p /* Set the transaction information */ hspi->ErrorCode = HAL_SPI_ERROR_NONE; - hspi->pTxBuffPtr = (uint8_t *)pTxData; + hspi->pTxBuffPtr = (const uint8_t *)pTxData; hspi->TxXferSize = Size; hspi->TxXferCount = Size; hspi->pRxBuffPtr = (uint8_t *)pRxData; @@ -1893,21 +1884,19 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *p /* Enable TXE, RXNE and ERR interrupt */ __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR)); -error : - return errorcode; + return HAL_OK; } /** * @brief Transmit an amount of data in non-blocking mode with DMA. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. - * @param pData pointer to data buffer - * @param Size amount of data to be sent + * @param pData pointer to data buffer (u8 or u16 data elements) + * @param Size amount of data elements (u8 or u16) to be sent * @retval HAL status */ -HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size) +HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, const uint8_t *pData, uint16_t Size) { - HAL_StatusTypeDef errorcode = HAL_OK; /* Check tx dma handle */ assert_param(IS_SPI_DMA_HANDLE(hspi->hdmatx)); @@ -1915,25 +1904,23 @@ HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, /* Check Direction parameter */ assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction)); - /* Process Locked */ - __HAL_LOCK(hspi); - if (hspi->State != HAL_SPI_STATE_READY) { - errorcode = HAL_BUSY; - goto error; + return HAL_BUSY; } if ((pData == NULL) || (Size == 0U)) { - errorcode = HAL_ERROR; - goto error; + return HAL_ERROR; } + /* Process Locked */ + __HAL_LOCK(hspi); + /* Set the transaction information */ hspi->State = HAL_SPI_STATE_BUSY_TX; hspi->ErrorCode = HAL_SPI_ERROR_NONE; - hspi->pTxBuffPtr = (uint8_t *)pData; + hspi->pTxBuffPtr = (const uint8_t *)pData; hspi->TxXferSize = Size; hspi->TxXferCount = Size; @@ -1995,9 +1982,9 @@ HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, { /* Update SPI error code */ SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA); - errorcode = HAL_ERROR; - - goto error; + /* Process Unlocked */ + __HAL_UNLOCK(hspi); + return HAL_ERROR; } /* Check if the SPI is already enabled */ @@ -2007,16 +1994,16 @@ HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, __HAL_SPI_ENABLE(hspi); } + /* Process Unlocked */ + __HAL_UNLOCK(hspi); + /* Enable the SPI Error Interrupt Bit */ __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_ERR)); /* Enable Tx DMA Request */ SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN); -error : - /* Process Unlocked */ - __HAL_UNLOCK(hspi); - return errorcode; + return HAL_OK; } /** @@ -2024,22 +2011,24 @@ error : * @note In case of MASTER mode and SPI_DIRECTION_2LINES direction, hdmatx shall be defined. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. - * @param pData pointer to data buffer + * @param pData pointer to data buffer (u8 or u16 data elements) * @note When the CRC feature is enabled the pData Length must be Size + 1. - * @param Size amount of data to be sent + * @param Size amount of data elements (u8 or u16) to be received * @retval HAL status */ HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size) { - HAL_StatusTypeDef errorcode = HAL_OK; - /* Check rx dma handle */ assert_param(IS_SPI_DMA_HANDLE(hspi->hdmarx)); if (hspi->State != HAL_SPI_STATE_READY) { - errorcode = HAL_BUSY; - goto error; + return HAL_BUSY; + } + + if ((pData == NULL) || (Size == 0U)) + { + return HAL_ERROR; } if ((hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->Init.Mode == SPI_MODE_MASTER)) @@ -2056,12 +2045,6 @@ HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, u /* Process Locked */ __HAL_LOCK(hspi); - if ((pData == NULL) || (Size == 0U)) - { - errorcode = HAL_ERROR; - goto error; - } - /* Set the transaction information */ hspi->State = HAL_SPI_STATE_BUSY_RX; hspi->ErrorCode = HAL_SPI_ERROR_NONE; @@ -2139,9 +2122,9 @@ HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, u { /* Update SPI error code */ SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA); - errorcode = HAL_ERROR; - - goto error; + /* Process Unlocked */ + __HAL_UNLOCK(hspi); + return HAL_ERROR; } /* Check if the SPI is already enabled */ @@ -2151,34 +2134,33 @@ HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, u __HAL_SPI_ENABLE(hspi); } + /* Process Unlocked */ + __HAL_UNLOCK(hspi); + /* Enable the SPI Error Interrupt Bit */ __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_ERR)); /* Enable Rx DMA Request */ SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN); -error: - /* Process Unlocked */ - __HAL_UNLOCK(hspi); - return errorcode; + return HAL_OK; } /** * @brief Transmit and Receive an amount of data in non-blocking mode with DMA. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. - * @param pTxData pointer to transmission data buffer - * @param pRxData pointer to reception data buffer + * @param pTxData pointer to transmission data buffer (u8 or u16 data elements) + * @param pRxData pointer to reception data buffer (u8 or u16 data elements) * @note When the CRC feature is enabled the pRxData Length must be Size + 1 - * @param Size amount of data to be sent + * @param Size amount of data elements (u8 or u16) to be sent and received * @retval HAL status */ -HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, +HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, const uint8_t *pTxData, uint8_t *pRxData, uint16_t Size) { uint32_t tmp_mode; HAL_SPI_StateTypeDef tmp_state; - HAL_StatusTypeDef errorcode = HAL_OK; /* Check rx & tx dma handles */ assert_param(IS_SPI_DMA_HANDLE(hspi->hdmarx)); @@ -2187,26 +2169,25 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t * /* Check Direction parameter */ assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction)); - /* Process locked */ - __HAL_LOCK(hspi); - /* Init temporary variables */ tmp_state = hspi->State; tmp_mode = hspi->Init.Mode; if (!((tmp_state == HAL_SPI_STATE_READY) || - ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_state == HAL_SPI_STATE_BUSY_RX)))) + ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && + (tmp_state == HAL_SPI_STATE_BUSY_RX)))) { - errorcode = HAL_BUSY; - goto error; + return HAL_BUSY; } if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U)) { - errorcode = HAL_ERROR; - goto error; + return HAL_ERROR; } + /* Process locked */ + __HAL_LOCK(hspi); + /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */ if (hspi->State != HAL_SPI_STATE_BUSY_RX) { @@ -2215,7 +2196,7 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t * /* Set the transaction information */ hspi->ErrorCode = HAL_SPI_ERROR_NONE; - hspi->pTxBuffPtr = (uint8_t *)pTxData; + hspi->pTxBuffPtr = (const uint8_t *)pTxData; hspi->TxXferSize = Size; hspi->TxXferCount = Size; hspi->pRxBuffPtr = (uint8_t *)pRxData; @@ -2306,9 +2287,9 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t * { /* Update SPI error code */ SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA); - errorcode = HAL_ERROR; - - goto error; + /* Process Unlocked */ + __HAL_UNLOCK(hspi); + return HAL_ERROR; } /* Enable Rx DMA Request */ @@ -2327,9 +2308,9 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t * { /* Update SPI error code */ SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA); - errorcode = HAL_ERROR; - - goto error; + /* Process Unlocked */ + __HAL_UNLOCK(hspi); + return HAL_ERROR; } /* Check if the SPI is already enabled */ @@ -2338,16 +2319,17 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t * /* Enable SPI peripheral */ __HAL_SPI_ENABLE(hspi); } + + /* Process Unlocked */ + __HAL_UNLOCK(hspi); + /* Enable the SPI Error Interrupt Bit */ __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_ERR)); /* Enable Tx DMA Request */ SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN); -error : - /* Process Unlocked */ - __HAL_UNLOCK(hspi); - return errorcode; + return HAL_OK; } /** @@ -2440,7 +2422,8 @@ HAL_StatusTypeDef HAL_SPI_Abort(SPI_HandleTypeDef *hspi) __HAL_SPI_DISABLE(hspi); /* Empty the FRLVL fifo */ - if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK) + if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, SPI_DEFAULT_TIMEOUT, + HAL_GetTick()) != HAL_OK) { hspi->ErrorCode = HAL_SPI_ERROR_ABORT; } @@ -2473,7 +2456,8 @@ HAL_StatusTypeDef HAL_SPI_Abort(SPI_HandleTypeDef *hspi) } /* Empty the FRLVL fifo */ - if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK) + if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, SPI_DEFAULT_TIMEOUT, + HAL_GetTick()) != HAL_OK) { hspi->ErrorCode = HAL_SPI_ERROR_ABORT; } @@ -2728,9 +2712,11 @@ HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi) { HAL_StatusTypeDef errorcode = HAL_OK; /* The Lock is not implemented on this API to allow the user application - to call the HAL SPI API under callbacks HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback(): + to call the HAL SPI API under callbacks HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or + HAL_SPI_TxRxCpltCallback(): when calling HAL_DMA_Abort() API the DMA TX/RX Transfer complete interrupt is generated - and the correspond call back is executed HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback() + and the correspond call back is executed HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or + HAL_SPI_TxRxCpltCallback() */ /* Abort the SPI DMA tx Stream/Channel */ @@ -3020,7 +3006,7 @@ __weak void HAL_SPI_AbortCpltCallback(SPI_HandleTypeDef *hspi) * the configuration information for SPI module. * @retval SPI state */ -HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi) +HAL_SPI_StateTypeDef HAL_SPI_GetState(const SPI_HandleTypeDef *hspi) { /* Return SPI handle state */ return hspi->State; @@ -3032,7 +3018,7 @@ HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi) * the configuration information for SPI module. * @retval SPI error code in bitmap format */ -uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi) +uint32_t HAL_SPI_GetError(const SPI_HandleTypeDef *hspi) { /* Return SPI ErrorCode */ return hspi->ErrorCode; @@ -3059,7 +3045,7 @@ uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi) */ static void SPI_DMATransmitCplt(DMA_HandleTypeDef *hdma) { - SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */ + SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); uint32_t tickstart; /* Init tickstart for timeout management*/ @@ -3116,7 +3102,7 @@ static void SPI_DMATransmitCplt(DMA_HandleTypeDef *hdma) */ static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma) { - SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */ + SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); uint32_t tickstart; #if (USE_SPI_CRC != 0U) __IO uint32_t tmpreg = 0U; @@ -3233,7 +3219,7 @@ static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma) */ static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma) { - SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */ + SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); uint32_t tickstart; #if (USE_SPI_CRC != 0U) __IO uint32_t tmpreg = 0U; @@ -3271,7 +3257,8 @@ static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma) } else { - if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_HALF_FULL, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK) + if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_HALF_FULL, SPI_DEFAULT_TIMEOUT, + tickstart) != HAL_OK) { /* Error on the CRC reception */ SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); @@ -3333,7 +3320,7 @@ static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma) */ static void SPI_DMAHalfTransmitCplt(DMA_HandleTypeDef *hdma) { - SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */ + SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Call user Tx half complete callback */ #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) @@ -3351,7 +3338,7 @@ static void SPI_DMAHalfTransmitCplt(DMA_HandleTypeDef *hdma) */ static void SPI_DMAHalfReceiveCplt(DMA_HandleTypeDef *hdma) { - SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */ + SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Call user Rx half complete callback */ #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) @@ -3369,7 +3356,7 @@ static void SPI_DMAHalfReceiveCplt(DMA_HandleTypeDef *hdma) */ static void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef *hdma) { - SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */ + SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Call user TxRx half complete callback */ #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) @@ -3387,7 +3374,7 @@ static void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef *hdma) */ static void SPI_DMAError(DMA_HandleTypeDef *hdma) { - SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */ + SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Stop the disable DMA transfer on SPI side */ CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN); @@ -3410,7 +3397,7 @@ static void SPI_DMAError(DMA_HandleTypeDef *hdma) */ static void SPI_DMAAbortOnError(DMA_HandleTypeDef *hdma) { - SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */ + SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); hspi->RxXferCount = 0U; hspi->TxXferCount = 0U; @@ -3432,7 +3419,7 @@ static void SPI_DMAAbortOnError(DMA_HandleTypeDef *hdma) */ static void SPI_DMATxAbortCallback(DMA_HandleTypeDef *hdma) { - SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */ + SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); hspi->hdmatx->XferAbortCallback = NULL; @@ -3448,7 +3435,8 @@ static void SPI_DMATxAbortCallback(DMA_HandleTypeDef *hdma) __HAL_SPI_DISABLE(hspi); /* Empty the FRLVL fifo */ - if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK) + if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, SPI_DEFAULT_TIMEOUT, + HAL_GetTick()) != HAL_OK) { hspi->ErrorCode = HAL_SPI_ERROR_ABORT; } @@ -3498,7 +3486,7 @@ static void SPI_DMATxAbortCallback(DMA_HandleTypeDef *hdma) */ static void SPI_DMARxAbortCallback(DMA_HandleTypeDef *hdma) { - SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */ + SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Disable SPI Peripheral */ __HAL_SPI_DISABLE(hspi); @@ -3515,7 +3503,8 @@ static void SPI_DMARxAbortCallback(DMA_HandleTypeDef *hdma) } /* Empty the FRLVL fifo */ - if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK) + if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, SPI_DEFAULT_TIMEOUT, + HAL_GetTick()) != HAL_OK) { hspi->ErrorCode = HAL_SPI_ERROR_ABORT; } @@ -3651,14 +3640,14 @@ static void SPI_2linesTxISR_8BIT(struct __SPI_HandleTypeDef *hspi) /* Transmit data in packing Bit mode */ if (hspi->TxXferCount >= 2U) { - hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); + hspi->Instance->DR = *((const uint16_t *)hspi->pTxBuffPtr); hspi->pTxBuffPtr += sizeof(uint16_t); hspi->TxXferCount -= 2U; } /* Transmit data in 8 Bit mode */ else { - *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr); + *(__IO uint8_t *)&hspi->Instance->DR = *((const uint8_t *)hspi->pTxBuffPtr); hspi->pTxBuffPtr++; hspi->TxXferCount--; } @@ -3752,7 +3741,7 @@ static void SPI_2linesRxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi) static void SPI_2linesTxISR_16BIT(struct __SPI_HandleTypeDef *hspi) { /* Transmit data in 16 Bit mode */ - hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); + hspi->Instance->DR = *((const uint16_t *)hspi->pTxBuffPtr); hspi->pTxBuffPtr += sizeof(uint16_t); hspi->TxXferCount--; @@ -3905,7 +3894,7 @@ static void SPI_RxISR_16BIT(struct __SPI_HandleTypeDef *hspi) */ static void SPI_TxISR_8BIT(struct __SPI_HandleTypeDef *hspi) { - *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr); + *(__IO uint8_t *)&hspi->Instance->DR = *((const uint8_t *)hspi->pTxBuffPtr); hspi->pTxBuffPtr++; hspi->TxXferCount--; @@ -3931,7 +3920,7 @@ static void SPI_TxISR_8BIT(struct __SPI_HandleTypeDef *hspi) static void SPI_TxISR_16BIT(struct __SPI_HandleTypeDef *hspi) { /* Transmit data in 16 Bit mode */ - hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); + hspi->Instance->DR = *((const uint16_t *)hspi->pTxBuffPtr); hspi->pTxBuffPtr += sizeof(uint16_t); hspi->TxXferCount--; @@ -4010,7 +3999,10 @@ static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi, { tmp_timeout = 0U; } - count--; + else + { + count--; + } } } @@ -4033,7 +4025,7 @@ static HAL_StatusTypeDef SPI_WaitFifoStateUntilTimeout(SPI_HandleTypeDef *hspi, __IO uint32_t count; uint32_t tmp_timeout; uint32_t tmp_tickstart; - __IO uint8_t *ptmpreg8; + __IO const uint8_t *ptmpreg8; __IO uint8_t tmpreg8 = 0; /* Adjust Timeout value in case of end of transfer */ @@ -4092,7 +4084,10 @@ static HAL_StatusTypeDef SPI_WaitFifoStateUntilTimeout(SPI_HandleTypeDef *hspi, { tmp_timeout = 0U; } - count--; + else + { + count--; + } } } @@ -4109,6 +4104,8 @@ static HAL_StatusTypeDef SPI_WaitFifoStateUntilTimeout(SPI_HandleTypeDef *hspi, */ static HAL_StatusTypeDef SPI_EndRxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart) { + __IO uint32_t count; + if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE) || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY))) { @@ -4128,8 +4125,8 @@ static HAL_StatusTypeDef SPI_EndRxTransaction(SPI_HandleTypeDef *hspi, uint32_t } else /* SPI_MODE_SLAVE */ { - /* Timeout in µs */ - __IO uint32_t count = SPI_BSY_FLAG_WORKAROUND_TIMEOUT * (SystemCoreClock / 24U / 1000000U); + /* Timeout in us */ + count = SPI_BSY_FLAG_WORKAROUND_TIMEOUT * (SystemCoreClock / 24U / 1000000U); /* Wait BSY flag during 1 Byte time transfer in case of Rx transfer * If Timeout is reached, the transfer is considered as finish. @@ -4168,6 +4165,8 @@ static HAL_StatusTypeDef SPI_EndRxTransaction(SPI_HandleTypeDef *hspi, uint32_t */ static HAL_StatusTypeDef SPI_EndRxTxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart) { + __IO uint32_t count; + /* Control if the TX fifo is empty */ if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FTLVL, SPI_FTLVL_EMPTY, Timeout, Tickstart) != HAL_OK) { @@ -4175,8 +4174,8 @@ static HAL_StatusTypeDef SPI_EndRxTxTransaction(SPI_HandleTypeDef *hspi, uint32_ return HAL_TIMEOUT; } - /* Timeout in µs */ - __IO uint32_t count = SPI_BSY_FLAG_WORKAROUND_TIMEOUT * (SystemCoreClock / 24U / 1000000U); + /* Timeout in us */ + count = SPI_BSY_FLAG_WORKAROUND_TIMEOUT * (SystemCoreClock / 24U / 1000000U); /* Erratasheet: BSY bit may stay high at the end of a data transfer in Slave mode */ if (hspi->Init.Mode == SPI_MODE_MASTER) { @@ -4434,7 +4433,8 @@ static void SPI_AbortRx_ISR(SPI_HandleTypeDef *hspi) } /* Empty the FRLVL fifo */ - if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK) + if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, SPI_DEFAULT_TIMEOUT, + HAL_GetTick()) != HAL_OK) { hspi->ErrorCode = HAL_SPI_ERROR_ABORT; } @@ -4477,7 +4477,8 @@ static void SPI_AbortTx_ISR(SPI_HandleTypeDef *hspi) __HAL_SPI_DISABLE(hspi); /* Empty the FRLVL fifo */ - if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK) + if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, SPI_DEFAULT_TIMEOUT, + HAL_GetTick()) != HAL_OK) { hspi->ErrorCode = HAL_SPI_ERROR_ABORT; } @@ -4506,7 +4507,8 @@ static void SPI_AbortTx_ISR(SPI_HandleTypeDef *hspi) } /* Empty the FRLVL fifo */ - if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK) + if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, SPI_DEFAULT_TIMEOUT, + HAL_GetTick()) != HAL_OK) { hspi->ErrorCode = HAL_SPI_ERROR_ABORT; } diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sram.c b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sram.c index fcf70e37b5..46651e2a2c 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sram.c +++ b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sram.c @@ -1037,6 +1037,7 @@ HAL_SRAM_StateTypeDef HAL_SRAM_GetState(const SRAM_HandleTypeDef *hsram) */ static void SRAM_DMACplt(DMA_HandleTypeDef *hdma) { + /* Derogation MISRAC2012-Rule-11.5 */ SRAM_HandleTypeDef *hsram = (SRAM_HandleTypeDef *)(hdma->Parent); /* Disable the DMA channel */ @@ -1059,6 +1060,7 @@ static void SRAM_DMACplt(DMA_HandleTypeDef *hdma) */ static void SRAM_DMACpltProt(DMA_HandleTypeDef *hdma) { + /* Derogation MISRAC2012-Rule-11.5 */ SRAM_HandleTypeDef *hsram = (SRAM_HandleTypeDef *)(hdma->Parent); /* Disable the DMA channel */ @@ -1081,6 +1083,7 @@ static void SRAM_DMACpltProt(DMA_HandleTypeDef *hdma) */ static void SRAM_DMAError(DMA_HandleTypeDef *hdma) { + /* Derogation MISRAC2012-Rule-11.5 */ SRAM_HandleTypeDef *hsram = (SRAM_HandleTypeDef *)(hdma->Parent); /* Disable the DMA channel */ diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c index 1f8452b8de..43cac113d9 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c +++ b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c @@ -6950,8 +6950,6 @@ void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure /* Set the auto-reload preload */ MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); - TIMx->CR1 = tmpcr1; - /* Set the Autoreload value */ TIMx->ARR = (uint32_t)Structure->Period ; @@ -6964,16 +6962,15 @@ void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure TIMx->RCR = Structure->RepetitionCounter; } + /* Disable Update Event (UEV) with Update Generation (UG) + by changing Update Request Source (URS) to avoid Update flag (UIF) */ + SET_BIT(TIMx->CR1, TIM_CR1_URS); + /* Generate an update event to reload the Prescaler and the repetition counter (only for advanced timer) value immediately */ TIMx->EGR = TIM_EGR_UG; - /* Check if the update flag is set after the Update Generation, if so clear the UIF flag */ - if (HAL_IS_BIT_SET(TIMx->SR, TIM_FLAG_UPDATE)) - { - /* Clear the update flag */ - CLEAR_BIT(TIMx->SR, TIM_FLAG_UPDATE); - } + TIMx->CR1 = tmpcr1; } /** diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c index 7aa52620c6..49599d9f95 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c +++ b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c @@ -701,7 +701,11 @@ __weak void HAL_UART_MspDeInit(UART_HandleTypeDef *huart) * @arg @ref HAL_UART_ABORT_COMPLETE_CB_ID Abort Complete Callback ID * @arg @ref HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID Abort Transmit Complete Callback ID * @arg @ref HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID Abort Receive Complete Callback ID +#if defined(USART_CR1_UESM) +#if defined(USART_CR3_WUFIE) * @arg @ref HAL_UART_WAKEUP_CB_ID Wakeup Callback ID +#endif +#endif * @arg @ref HAL_UART_MSPINIT_CB_ID MspInit Callback ID * @arg @ref HAL_UART_MSPDEINIT_CB_ID MspDeInit Callback ID * @param pCallback pointer to the Callback function @@ -825,7 +829,11 @@ HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_ * @arg @ref HAL_UART_ABORT_COMPLETE_CB_ID Abort Complete Callback ID * @arg @ref HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID Abort Transmit Complete Callback ID * @arg @ref HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID Abort Receive Complete Callback ID +#if defined(USART_CR1_UESM) +#if defined(USART_CR3_WUFIE) * @arg @ref HAL_UART_WAKEUP_CB_ID Wakeup Callback ID +#endif +#endif * @arg @ref HAL_UART_MSPINIT_CB_ID MspInit Callback ID * @arg @ref HAL_UART_MSPDEINIT_CB_ID MspDeInit Callback ID * @retval HAL status @@ -993,80 +1001,83 @@ HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart) =============================================================================== ##### IO operation functions ##### =============================================================================== + [..] This subsection provides a set of functions allowing to manage the UART asynchronous and Half duplex data transfers. - (#) There are two mode of transfer: - (+) Blocking mode: The communication is performed in polling mode. - The HAL status of all data processing is returned by the same function - after finishing transfer. - (+) Non-Blocking mode: The communication is performed using Interrupts - or DMA, These API's return the HAL status. - The end of the data processing will be indicated through the - dedicated UART IRQ when using Interrupt mode or the DMA IRQ when - using DMA mode. - The HAL_UART_TxCpltCallback(), HAL_UART_RxCpltCallback() user callbacks - will be executed respectively at the end of the transmit or Receive process - The HAL_UART_ErrorCallback()user callback will be executed when a communication error is detected + (#) There are two modes of transfer: + (++) Blocking mode: The communication is performed in polling mode. + The HAL status of all data processing is returned by the same function + after finishing transfer. + (++) Non-Blocking mode: The communication is performed using Interrupts + or DMA, These API's return the HAL status. + The end of the data processing will be indicated through the + dedicated UART IRQ when using Interrupt mode or the DMA IRQ when + using DMA mode. + The HAL_UART_TxCpltCallback(), HAL_UART_RxCpltCallback() user callbacks + will be executed respectively at the end of the transmit or Receive process + The HAL_UART_ErrorCallback()user callback will be executed when a communication error is detected (#) Blocking mode API's are : - (+) HAL_UART_Transmit() - (+) HAL_UART_Receive() + (++) HAL_UART_Transmit() + (++) HAL_UART_Receive() (#) Non-Blocking mode API's with Interrupt are : - (+) HAL_UART_Transmit_IT() - (+) HAL_UART_Receive_IT() - (+) HAL_UART_IRQHandler() + (++) HAL_UART_Transmit_IT() + (++) HAL_UART_Receive_IT() + (++) HAL_UART_IRQHandler() (#) Non-Blocking mode API's with DMA are : - (+) HAL_UART_Transmit_DMA() - (+) HAL_UART_Receive_DMA() - (+) HAL_UART_DMAPause() - (+) HAL_UART_DMAResume() - (+) HAL_UART_DMAStop() + (++) HAL_UART_Transmit_DMA() + (++) HAL_UART_Receive_DMA() + (++) HAL_UART_DMAPause() + (++) HAL_UART_DMAResume() + (++) HAL_UART_DMAStop() (#) A set of Transfer Complete Callbacks are provided in Non_Blocking mode: - (+) HAL_UART_TxHalfCpltCallback() - (+) HAL_UART_TxCpltCallback() - (+) HAL_UART_RxHalfCpltCallback() - (+) HAL_UART_RxCpltCallback() - (+) HAL_UART_ErrorCallback() + (++) HAL_UART_TxHalfCpltCallback() + (++) HAL_UART_TxCpltCallback() + (++) HAL_UART_RxHalfCpltCallback() + (++) HAL_UART_RxCpltCallback() + (++) HAL_UART_ErrorCallback() (#) Non-Blocking mode transfers could be aborted using Abort API's : - (+) HAL_UART_Abort() - (+) HAL_UART_AbortTransmit() - (+) HAL_UART_AbortReceive() - (+) HAL_UART_Abort_IT() - (+) HAL_UART_AbortTransmit_IT() - (+) HAL_UART_AbortReceive_IT() + (++) HAL_UART_Abort() + (++) HAL_UART_AbortTransmit() + (++) HAL_UART_AbortReceive() + (++) HAL_UART_Abort_IT() + (++) HAL_UART_AbortTransmit_IT() + (++) HAL_UART_AbortReceive_IT() (#) For Abort services based on interrupts (HAL_UART_Abortxxx_IT), a set of Abort Complete Callbacks are provided: - (+) HAL_UART_AbortCpltCallback() - (+) HAL_UART_AbortTransmitCpltCallback() - (+) HAL_UART_AbortReceiveCpltCallback() + (++) HAL_UART_AbortCpltCallback() + (++) HAL_UART_AbortTransmitCpltCallback() + (++) HAL_UART_AbortReceiveCpltCallback() (#) A Rx Event Reception Callback (Rx event notification) is available for Non_Blocking modes of enhanced reception services: - (+) HAL_UARTEx_RxEventCallback() + (++) HAL_UARTEx_RxEventCallback() #if defined(USART_CR1_UESM) +#if defined(USART_CR3_WUFIE) (#) Wakeup from Stop mode Callback: - (+) HAL_UARTEx_WakeupCallback() + (++) HAL_UARTEx_WakeupCallback() +#endif #endif (#) In Non-Blocking mode transfers, possible errors are split into 2 categories. Errors are handled as follows : - (+) Error is considered as Recoverable and non blocking : Transfer could go till end, but error severity is - to be evaluated by user : this concerns Frame Error, Parity Error or Noise Error - in Interrupt mode reception . - Received character is then retrieved and stored in Rx buffer, Error code is set to allow user - to identify error type, and HAL_UART_ErrorCallback() user callback is executed. - Transfer is kept ongoing on UART side. - If user wants to abort it, Abort services should be called by user. - (+) Error is considered as Blocking : Transfer could not be completed properly and is aborted. - This concerns Overrun Error In Interrupt mode reception and all errors in DMA mode. - Error code is set to allow user to identify error type, and HAL_UART_ErrorCallback() - user callback is executed. + (++) Error is considered as Recoverable and non blocking : Transfer could go till end, but error severity is + to be evaluated by user : this concerns Frame Error, Parity Error or Noise Error + in Interrupt mode reception . + Received character is then retrieved and stored in Rx buffer, Error code is set to allow user + to identify error type, and HAL_UART_ErrorCallback() user callback is executed. + Transfer is kept ongoing on UART side. + If user wants to abort it, Abort services should be called by user. + (++) Error is considered as Blocking : Transfer could not be completed properly and is aborted. + This concerns Overrun Error In Interrupt mode reception and all errors in DMA mode. + Error code is set to allow user to identify error type, and HAL_UART_ErrorCallback() + user callback is executed. -@- In the Half duplex communication, it is forbidden to run the transmit and receive process in parallel, the UART state HAL_UART_STATE_BUSY_TX_RX can't be useful. @@ -2342,6 +2353,28 @@ void HAL_UART_IRQHandler(UART_HandleTypeDef *huart) HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ } + else + { + /* If DMA is in Circular mode, Idle event is to be reported to user + even if occurring after a Transfer Complete event from DMA */ + if (nb_remaining_rx_data == huart->RxXferSize) + { + if (huart->hdmarx->Init.Mode == DMA_CIRCULAR) + { + /* Initialize type of RxEvent that correspond to RxEvent callback execution; + In this case, Rx Event type is Idle Event */ + huart->RxEventType = HAL_UART_RXEVENT_IDLE; + +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + /*Call registered Rx Event callback*/ + huart->RxEventCallback(huart, huart->RxXferSize); +#else + /*Call legacy weak Rx Event callback*/ + HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize); +#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ + } + } + } return; } else @@ -3489,12 +3522,24 @@ static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma) If Reception till IDLE event has been selected : use Rx Event callback */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) { + huart->RxXferCount = 0; + + /* Check current nb of data still to be received on DMA side. + DMA Normal mode, remaining nb of data will be 0 + DMA Circular mode, remaining nb of data is reset to RxXferSize */ + uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(hdma); + if (nb_remaining_rx_data < huart->RxXferSize) + { + /* Update nb of remaining data */ + huart->RxXferCount = nb_remaining_rx_data; + } + #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx Event callback*/ - huart->RxEventCallback(huart, huart->RxXferSize); + huart->RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); #else /*Call legacy weak Rx Event callback*/ - HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize); + HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } else @@ -3527,12 +3572,22 @@ static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma) If Reception till IDLE event has been selected : use Rx Event callback */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) { + huart->RxXferCount = huart->RxXferSize / 2U; + + /* Check current nb of data still to be received on DMA side. */ + uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(hdma); + if (nb_remaining_rx_data <= huart->RxXferSize) + { + /* Update nb of remaining data */ + huart->RxXferCount = nb_remaining_rx_data; + } + #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx Event callback*/ - huart->RxEventCallback(huart, huart->RxXferSize / 2U); + huart->RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); #else /*Call legacy weak Rx Event callback*/ - HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize / 2U); + HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } else @@ -3597,7 +3652,6 @@ static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma) { UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); huart->RxXferCount = 0U; - huart->TxXferCount = 0U; #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c index 668958c702..e47b49b268 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c +++ b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c @@ -24,7 +24,7 @@ ============================================================================== ##### UART peripheral extended features ##### ============================================================================== - + [..] (#) Declare a UART_HandleTypeDef handle structure. (#) For the UART RS485 Driver Enable mode, initialize the UART registers @@ -257,19 +257,19 @@ HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, (#) Compared to standard reception services which only consider number of received data elements as reception completion criteria, these functions also consider additional events as triggers for updating reception status to caller : - (+) Detection of inactivity period (RX line has not been active for a given period). - (++) RX inactivity detected by IDLE event, i.e. RX line has been in idle state (normally high state) + (++) Detection of inactivity period (RX line has not been active for a given period). + (+++) RX inactivity detected by IDLE event, i.e. RX line has been in idle state (normally high state) for 1 frame time, after last received byte. - (++) RX inactivity detected by RTO, i.e. line has been in idle state + (+++) RX inactivity detected by RTO, i.e. line has been in idle state for a programmable time, after last received byte. - (+) Detection that a specific character has been received. + (++) Detection that a specific character has been received. - (#) There are two mode of transfer: - (+) Blocking mode: The reception is performed in polling mode, until either expected number of data is received, + (#) There are two modes of transfer: + (++) Blocking mode: The reception is performed in polling mode, until either expected number of data is received, or till IDLE event occurs. Reception is handled only during function execution. When function exits, no data reception could occur. HAL status and number of actually received data elements, are returned by function after finishing transfer. - (+) Non-Blocking mode: The reception is performed using Interrupts or DMA. + (++) Non-Blocking mode: The reception is performed using Interrupts or DMA. These API's return the HAL status. The end of the data processing will be indicated through the dedicated UART IRQ when using Interrupt mode or the DMA IRQ when using DMA mode. @@ -277,13 +277,13 @@ HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, The HAL_UART_ErrorCallback()user callback will be executed when a reception error is detected. (#) Blocking mode API: - (+) HAL_UARTEx_ReceiveToIdle() + (++) HAL_UARTEx_ReceiveToIdle() (#) Non-Blocking mode API with Interrupt: - (+) HAL_UARTEx_ReceiveToIdle_IT() + (++) HAL_UARTEx_ReceiveToIdle_IT() (#) Non-Blocking mode API with DMA: - (+) HAL_UARTEx_ReceiveToIdle_DMA() + (++) HAL_UARTEx_ReceiveToIdle_DMA() @endverbatim * @{ @@ -725,17 +725,15 @@ HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_ * Half Transfer, or Transfer Complete), this function allows to retrieve the Rx Event type that has lead * to Rx Event callback execution. * @note This function is expected to be called within the user implementation of Rx Event Callback, - * in order to provide the accurate value : - * In Interrupt Mode : - * - HAL_UART_RXEVENT_TC : when Reception has been completed (expected nb of data has been received) - * - HAL_UART_RXEVENT_IDLE : when Idle event occurred prior reception has been completed (nb of - * received data is lower than expected one) - * In DMA Mode : - * - HAL_UART_RXEVENT_TC : when Reception has been completed (expected nb of data has been received) - * - HAL_UART_RXEVENT_HT : when half of expected nb of data has been received - * - HAL_UART_RXEVENT_IDLE : when Idle event occurred prior reception has been completed (nb of - * received data is lower than expected one). - * In DMA mode, RxEvent callback could be called several times; + * in order to provide the accurate value. + * @note In Interrupt Mode: + * - HAL_UART_RXEVENT_TC : when Reception has been completed (expected nb of data has been received). + * - HAL_UART_RXEVENT_IDLE : when Idle event occurred prior reception has been completed. + * @note In DMA Mode: + * - HAL_UART_RXEVENT_TC : when Reception has been completed (expected nb of data has been received). + * - HAL_UART_RXEVENT_HT : when half of expected nb of data has been received. + * - HAL_UART_RXEVENT_IDLE : when Idle event occurred prior reception has been completed. + * @note In DMA mode, RxEvent callback could be called several times; * When DMA is configured in Normal Mode, HT event does not stop Reception process; * When DMA is configured in Circular Mode, HT, TC or IDLE events don't stop Reception process; * @param huart UART handle. diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_usart.c b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_usart.c index f3f46ea0ad..5df28a6841 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_usart.c +++ b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_usart.c @@ -140,7 +140,7 @@ */ /** @defgroup USART USART - * @brief HAL USART Synchronous module driver + * @brief HAL USART Synchronous SPI module driver * @{ */ @@ -212,8 +212,8 @@ static void USART_RxISR_16BIT(USART_HandleTypeDef *husart); =============================================================================== [..] This subsection provides a set of functions allowing to initialize the USART - in asynchronous and in synchronous modes. - (+) For the asynchronous mode only these parameters can be configured: + in synchronous SPI master mode. + (+) For the synchronous SPI mode only these parameters can be configured: (++) Baud Rate (++) Word Length (++) Stop Bit @@ -225,7 +225,7 @@ static void USART_RxISR_16BIT(USART_HandleTypeDef *husart); (++) Receiver/transmitter modes [..] - The HAL_USART_Init() function follows the USART synchronous configuration + The HAL_USART_Init() function follows the USART synchronous SPI configuration procedure (details for the procedure are available in reference manual). @endverbatim @@ -303,7 +303,7 @@ HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart) return HAL_ERROR; } - /* In Synchronous mode, the following bits must be kept cleared: + /* In Synchronous SPI mode, the following bits must be kept cleared: - LINEN bit in the USART_CR2 register - HDSEL, SCEN and IREN bits in the USART_CR3 register. */ @@ -626,10 +626,10 @@ HAL_StatusTypeDef HAL_USART_UnRegisterCallback(USART_HandleTypeDef *husart, HAL_ =============================================================================== ##### IO operation functions ##### =============================================================================== - [..] This subsection provides a set of functions allowing to manage the USART synchronous + [..] This subsection provides a set of functions allowing to manage the USART synchronous SPI data transfers. - [..] The USART supports master mode only: it cannot receive or send data related to an input + [..] The USART Synchronous SPI supports master mode only: it cannot receive or send data related to an input clock (SCLK is always an output). [..] @@ -2719,7 +2719,7 @@ static HAL_StatusTypeDef USART_SetConfig(USART_HandleTypeDef *husart) /* Clear and configure the USART Clock, CPOL, CPHA, LBCL and STOP bits: * set CPOL bit according to husart->Init.CLKPolarity value * set CPHA bit according to husart->Init.CLKPhase value - * set LBCL bit according to husart->Init.CLKLastBit value (used in SPI master mode only) + * set LBCL bit according to husart->Init.CLKLastBit value (used in USART Synchronous SPI master mode only) * set STOP[13:12] bits according to husart->Init.StopBits value */ tmpreg = (uint32_t)(USART_CLOCK_ENABLE); tmpreg |= (uint32_t)husart->Init.CLKLastBit; diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_wwdg.c b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_wwdg.c index 896f60cd93..cd563dba2a 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_wwdg.c +++ b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_wwdg.c @@ -95,7 +95,7 @@ and a pointer to the user callback function. (+) Use function HAL_WWDG_UnRegisterCallback() to reset a callback to - the default weak (surcharged) function. HAL_WWDG_UnRegisterCallback() + the default weak function. HAL_WWDG_UnRegisterCallback() takes as parameters the HAL peripheral handle and the Callback ID. This function allows to reset following callbacks: (++) EwiCallback : callback for Early WakeUp Interrupt. @@ -103,14 +103,14 @@ [..] When calling HAL_WWDG_Init function, callbacks are reset to the - corresponding legacy weak (surcharged) functions: + corresponding legacy weak functions: HAL_WWDG_EarlyWakeupCallback() and HAL_WWDG_MspInit() only if they have not been registered before. [..] When compilation define USE_HAL_WWDG_REGISTER_CALLBACKS is set to 0 or not defined, the callback registering feature is not available - and weak (surcharged) callbacks are used. + and weak (overridden) callbacks are used. *** WWDG HAL driver macros list *** =================================== @@ -122,7 +122,6 @@ (+) __HAL_WWDG_ENABLE_IT: Enable the WWDG early wakeup interrupt @endverbatim - ****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ @@ -241,7 +240,7 @@ __weak void HAL_WWDG_MspInit(WWDG_HandleTypeDef *hwwdg) #if (USE_HAL_WWDG_REGISTER_CALLBACKS == 1) /** * @brief Register a User WWDG Callback - * To be used instead of the weak (surcharged) predefined callback + * To be used instead of the weak (overridden) predefined callback * @param hwwdg WWDG handle * @param CallbackID ID of the callback to be registered * This parameter can be one of the following values: @@ -283,7 +282,7 @@ HAL_StatusTypeDef HAL_WWDG_RegisterCallback(WWDG_HandleTypeDef *hwwdg, HAL_WWDG_ /** * @brief Unregister a WWDG Callback - * WWDG Callback is redirected to the weak (surcharged) predefined callback + * WWDG Callback is redirected to the weak (overridden) predefined callback * @param hwwdg WWDG handle * @param CallbackID ID of the callback to be registered * This parameter can be one of the following values: diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma2d.c b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma2d.c index 30a0407e58..fa19295848 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma2d.c +++ b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma2d.c @@ -129,7 +129,7 @@ * - SUCCESS: DMA2D registers are de-initialized * - ERROR: DMA2D registers are not de-initialized */ -ErrorStatus LL_DMA2D_DeInit(DMA2D_TypeDef *DMA2Dx) +ErrorStatus LL_DMA2D_DeInit(const DMA2D_TypeDef *DMA2Dx) { ErrorStatus status = SUCCESS; @@ -450,7 +450,7 @@ void LL_DMA2D_ConfigOutputColor(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_ColorTypeDef *DM * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444 * @retval Output Blue color value between Min_Data=0 and Max_Data=0xFF */ -uint32_t LL_DMA2D_GetOutputBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode) +uint32_t LL_DMA2D_GetOutputBlueColor(const DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode) { uint32_t color; @@ -494,7 +494,7 @@ uint32_t LL_DMA2D_GetOutputBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode) * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444 * @retval Output Green color value between Min_Data=0 and Max_Data=0xFF */ -uint32_t LL_DMA2D_GetOutputGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode) +uint32_t LL_DMA2D_GetOutputGreenColor(const DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode) { uint32_t color; @@ -538,7 +538,7 @@ uint32_t LL_DMA2D_GetOutputGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode) * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444 * @retval Output Red color value between Min_Data=0 and Max_Data=0xFF */ -uint32_t LL_DMA2D_GetOutputRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode) +uint32_t LL_DMA2D_GetOutputRedColor(const DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode) { uint32_t color; @@ -582,7 +582,7 @@ uint32_t LL_DMA2D_GetOutputRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode) * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444 * @retval Output Alpha color value between Min_Data=0 and Max_Data=0xFF */ -uint32_t LL_DMA2D_GetOutputAlphaColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode) +uint32_t LL_DMA2D_GetOutputAlphaColor(const DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode) { uint32_t color; diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.c b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.c index 76ca1b6d3d..2e9e04e196 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.c +++ b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.c @@ -61,7 +61,7 @@ * @{ */ #if defined(HAL_NOR_MODULE_ENABLED) || defined(HAL_NAND_MODULE_ENABLED) || defined(HAL_SDRAM_MODULE_ENABLED)\ - || defined(HAL_SRAM_MODULE_ENABLED) + || defined(HAL_SRAM_MODULE_ENABLED) /** @defgroup FMC_LL FMC Low Layer * @brief FMC driver modules @@ -188,7 +188,7 @@ * @retval HAL status */ HAL_StatusTypeDef FMC_NORSRAM_Init(FMC_NORSRAM_TypeDef *Device, - FMC_NORSRAM_InitTypeDef *Init) + const FMC_NORSRAM_InitTypeDef *Init) { uint32_t flashaccess; uint32_t btcr_reg; @@ -322,7 +322,7 @@ HAL_StatusTypeDef FMC_NORSRAM_DeInit(FMC_NORSRAM_TypeDef *Device, * @retval HAL status */ HAL_StatusTypeDef FMC_NORSRAM_Timing_Init(FMC_NORSRAM_TypeDef *Device, - FMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank) + const FMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank) { uint32_t tmpr; @@ -338,13 +338,14 @@ HAL_StatusTypeDef FMC_NORSRAM_Timing_Init(FMC_NORSRAM_TypeDef *Device, assert_param(IS_FMC_NORSRAM_BANK(Bank)); /* Set FMC_NORSRAM device timing parameters */ - MODIFY_REG(Device->BTCR[Bank + 1U], BTR_CLEAR_MASK, (Timing->AddressSetupTime | - ((Timing->AddressHoldTime) << FMC_BTR1_ADDHLD_Pos) | - ((Timing->DataSetupTime) << FMC_BTR1_DATAST_Pos) | - ((Timing->BusTurnAroundDuration) << FMC_BTR1_BUSTURN_Pos) | - (((Timing->CLKDivision) - 1U) << FMC_BTR1_CLKDIV_Pos) | - (((Timing->DataLatency) - 2U) << FMC_BTR1_DATLAT_Pos) | - (Timing->AccessMode))); + Device->BTCR[Bank + 1U] = + (Timing->AddressSetupTime << FMC_BTR1_ADDSET_Pos) | + (Timing->AddressHoldTime << FMC_BTR1_ADDHLD_Pos) | + (Timing->DataSetupTime << FMC_BTR1_DATAST_Pos) | + (Timing->BusTurnAroundDuration << FMC_BTR1_BUSTURN_Pos) | + ((Timing->CLKDivision - 1U) << FMC_BTR1_CLKDIV_Pos) | + ((Timing->DataLatency - 2U) << FMC_BTR1_DATLAT_Pos) | + Timing->AccessMode; /* Configure Clock division value (in NORSRAM bank 1) when continuous clock is enabled */ if (HAL_IS_BIT_SET(Device->BTCR[FMC_NORSRAM_BANK1], FMC_BCR1_CCLKEN)) @@ -370,7 +371,7 @@ HAL_StatusTypeDef FMC_NORSRAM_Timing_Init(FMC_NORSRAM_TypeDef *Device, * @retval HAL status */ HAL_StatusTypeDef FMC_NORSRAM_Extended_Timing_Init(FMC_NORSRAM_EXTENDED_TypeDef *Device, - FMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank, + const FMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank, uint32_t ExtendedMode) { /* Check the parameters */ @@ -515,7 +516,7 @@ HAL_StatusTypeDef FMC_NORSRAM_WriteOperation_Disable(FMC_NORSRAM_TypeDef *Device * @param Init Pointer to NAND Initialization structure * @retval HAL status */ -HAL_StatusTypeDef FMC_NAND_Init(FMC_NAND_TypeDef *Device, FMC_NAND_InitTypeDef *Init) +HAL_StatusTypeDef FMC_NAND_Init(FMC_NAND_TypeDef *Device, const FMC_NAND_InitTypeDef *Init) { /* Check the parameters */ assert_param(IS_FMC_NAND_DEVICE(Device)); @@ -548,7 +549,7 @@ HAL_StatusTypeDef FMC_NAND_Init(FMC_NAND_TypeDef *Device, FMC_NAND_InitTypeDef * * @retval HAL status */ HAL_StatusTypeDef FMC_NAND_CommonSpace_Timing_Init(FMC_NAND_TypeDef *Device, - FMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank) + const FMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank) { /* Check the parameters */ assert_param(IS_FMC_NAND_DEVICE(Device)); @@ -562,10 +563,10 @@ HAL_StatusTypeDef FMC_NAND_CommonSpace_Timing_Init(FMC_NAND_TypeDef *Device, UNUSED(Bank); /* NAND bank 3 registers configuration */ - MODIFY_REG(Device->PMEM, PMEM_CLEAR_MASK, (Timing->SetupTime | - ((Timing->WaitSetupTime) << FMC_PMEM_MEMWAIT3_Pos) | - ((Timing->HoldSetupTime) << FMC_PMEM_MEMHOLD3_Pos) | - ((Timing->HiZSetupTime) << FMC_PMEM_MEMHIZ3_Pos))); + Device->PMEM = (Timing->SetupTime | + ((Timing->WaitSetupTime) << FMC_PMEM_MEMWAIT3_Pos) | + ((Timing->HoldSetupTime) << FMC_PMEM_MEMHOLD3_Pos) | + ((Timing->HiZSetupTime) << FMC_PMEM_MEMHIZ3_Pos)); return HAL_OK; } @@ -579,7 +580,7 @@ HAL_StatusTypeDef FMC_NAND_CommonSpace_Timing_Init(FMC_NAND_TypeDef *Device, * @retval HAL status */ HAL_StatusTypeDef FMC_NAND_AttributeSpace_Timing_Init(FMC_NAND_TypeDef *Device, - FMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank) + const FMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank) { /* Check the parameters */ assert_param(IS_FMC_NAND_DEVICE(Device)); @@ -593,10 +594,10 @@ HAL_StatusTypeDef FMC_NAND_AttributeSpace_Timing_Init(FMC_NAND_TypeDef *Device, UNUSED(Bank); /* NAND bank 3 registers configuration */ - MODIFY_REG(Device->PATT, PATT_CLEAR_MASK, (Timing->SetupTime | - ((Timing->WaitSetupTime) << FMC_PATT_ATTWAIT3_Pos) | - ((Timing->HoldSetupTime) << FMC_PATT_ATTHOLD3_Pos) | - ((Timing->HiZSetupTime) << FMC_PATT_ATTHIZ3_Pos))); + Device->PATT = (Timing->SetupTime | + ((Timing->WaitSetupTime) << FMC_PATT_ATTWAIT3_Pos) | + ((Timing->HoldSetupTime) << FMC_PATT_ATTHOLD3_Pos) | + ((Timing->HiZSetupTime) << FMC_PATT_ATTHIZ3_Pos)); return HAL_OK; } @@ -700,7 +701,7 @@ HAL_StatusTypeDef FMC_NAND_ECC_Disable(FMC_NAND_TypeDef *Device, uint32_t Bank) * @param Timeout Timeout wait value * @retval HAL status */ -HAL_StatusTypeDef FMC_NAND_GetECC(FMC_NAND_TypeDef *Device, uint32_t *ECCval, uint32_t Bank, +HAL_StatusTypeDef FMC_NAND_GetECC(const FMC_NAND_TypeDef *Device, uint32_t *ECCval, uint32_t Bank, uint32_t Timeout) { uint32_t tickstart; @@ -739,7 +740,6 @@ HAL_StatusTypeDef FMC_NAND_GetECC(FMC_NAND_TypeDef *Device, uint32_t *ECCval, ui */ - /** @defgroup FMC_LL_SDRAM * @brief SDRAM Controller functions * @@ -786,7 +786,7 @@ HAL_StatusTypeDef FMC_NAND_GetECC(FMC_NAND_TypeDef *Device, uint32_t *ECCval, ui * @param Init Pointer to SDRAM Initialization structure * @retval HAL status */ -HAL_StatusTypeDef FMC_SDRAM_Init(FMC_SDRAM_TypeDef *Device, FMC_SDRAM_InitTypeDef *Init) +HAL_StatusTypeDef FMC_SDRAM_Init(FMC_SDRAM_TypeDef *Device, const FMC_SDRAM_InitTypeDef *Init) { /* Check the parameters */ assert_param(IS_FMC_SDRAM_DEVICE(Device)); @@ -849,7 +849,7 @@ HAL_StatusTypeDef FMC_SDRAM_Init(FMC_SDRAM_TypeDef *Device, FMC_SDRAM_InitTypeDe * @retval HAL status */ HAL_StatusTypeDef FMC_SDRAM_Timing_Init(FMC_SDRAM_TypeDef *Device, - FMC_SDRAM_TimingTypeDef *Timing, uint32_t Bank) + const FMC_SDRAM_TimingTypeDef *Timing, uint32_t Bank) { /* Check the parameters */ assert_param(IS_FMC_SDRAM_DEVICE(Device)); @@ -979,7 +979,7 @@ HAL_StatusTypeDef FMC_SDRAM_WriteProtection_Disable(FMC_SDRAM_TypeDef *Device, u * @retval HAL state */ HAL_StatusTypeDef FMC_SDRAM_SendCommand(FMC_SDRAM_TypeDef *Device, - FMC_SDRAM_CommandTypeDef *Command, uint32_t Timeout) + const FMC_SDRAM_CommandTypeDef *Command, uint32_t Timeout) { /* Check the parameters */ assert_param(IS_FMC_SDRAM_DEVICE(Device)); diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c index 16fd78a908..911ab42d6f 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c +++ b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c @@ -130,7 +130,7 @@ * - SUCCESS: SPI registers are de-initialized * - ERROR: SPI registers are not de-initialized */ -ErrorStatus LL_SPI_DeInit(SPI_TypeDef *SPIx) +ErrorStatus LL_SPI_DeInit(const SPI_TypeDef *SPIx) { ErrorStatus status = ERROR; @@ -215,8 +215,9 @@ ErrorStatus LL_SPI_DeInit(SPI_TypeDef *SPIx) /** * @brief Initialize the SPI registers according to the specified parameters in SPI_InitStruct. - * @note As some bits in SPI configuration registers can only be written when the SPI is disabled (SPI_CR1_SPE bit =0), - * SPI peripheral should be in disabled state prior calling this function. Otherwise, ERROR result will be returned. + * @note As some bits in SPI configuration registers can only be written when the + * SPI is disabled (SPI_CR1_SPE bit = 0), SPI peripheral should be in disabled state prior + * calling this function. Otherwise, ERROR result will be returned. * @param SPIx SPI Instance * @param SPI_InitStruct pointer to a @ref LL_SPI_InitTypeDef structure * @retval An ErrorStatus enumeration value. (Return always SUCCESS) @@ -400,7 +401,7 @@ void LL_SPI_StructInit(LL_SPI_InitTypeDef *SPI_InitStruct) * - SUCCESS: SPI registers are de-initialized * - ERROR: SPI registers are not de-initialized */ -ErrorStatus LL_I2S_DeInit(SPI_TypeDef *SPIx) +ErrorStatus LL_I2S_DeInit(const SPI_TypeDef *SPIx) { return LL_SPI_DeInit(SPIx); } diff --git a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usb.c b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usb.c index 35ddbfb8d6..9b4673d9b5 100644 --- a/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usb.c +++ b/system/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usb.c @@ -828,17 +828,17 @@ HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef } else { - USBx_INEP(epnum)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & - (((ep->xfer_len + ep->maxpacket - 1U) / ep->maxpacket) << 19)); + pktcnt = (uint16_t)((ep->xfer_len + ep->maxpacket - 1U) / ep->maxpacket); + USBx_INEP(epnum)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & ((uint32_t)pktcnt << 19)); + + if (ep->type == EP_TYPE_ISOC) + { + USBx_INEP(epnum)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_MULCNT); + USBx_INEP(epnum)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_MULCNT & ((uint32_t)pktcnt << 29)); + } } USBx_INEP(epnum)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_XFRSIZ & ep->xfer_len); - - if (ep->type == EP_TYPE_ISOC) - { - USBx_INEP(epnum)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_MULCNT); - USBx_INEP(epnum)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_MULCNT & (1U << 29)); - } } if (dma == 1U) @@ -1365,8 +1365,8 @@ void USB_ClearInterrupts(USB_OTG_GlobalTypeDef *USBx, uint32_t interrupt) * @param USBx Selected device * @retval return core mode : Host or Device * This parameter can be one of these values: - * 0 : Host - * 1 : Device + * 1 : Host + * 0 : Device */ uint32_t USB_GetMode(const USB_OTG_GlobalTypeDef *USBx) { @@ -1448,8 +1448,15 @@ static HAL_StatusTypeDef USB_CoreReset(USB_OTG_GlobalTypeDef *USBx) } } while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_AHBIDL) == 0U); + count = 10U; + + /* few cycles before setting core reset */ + while (count > 0U) + { + count--; + } + /* Core Soft Reset */ - count = 0U; USBx->GRSTCTL |= USB_OTG_GRSTCTL_CSRST; do @@ -1717,13 +1724,13 @@ HAL_StatusTypeDef USB_DriveVbus(const USB_OTG_GlobalTypeDef *USBx, uint8_t state } /** - * @brief Return Host Core speed + * @brief Return Host Port speed * @param USBx Selected device - * @retval speed : Host speed + * @retval speed : Host port device speed * This parameter can be one of these values: - * @arg HCD_SPEED_HIGH: High speed mode - * @arg HCD_SPEED_FULL: Full speed mode - * @arg HCD_SPEED_LOW: Low speed mode + * @arg HCD_DEVICE_SPEED_HIGH: High speed mode + * @arg HCD_DEVICE_SPEED_FULL: Full speed mode + * @arg HCD_DEVICE_SPEED_LOW: Low speed mode */ uint32_t USB_GetHostSpeed(USB_OTG_GlobalTypeDef const *USBx) { diff --git a/system/Drivers/STM32YYxx_HAL_Driver_version.md b/system/Drivers/STM32YYxx_HAL_Driver_version.md index 1159a67d87..15152f4b0b 100644 --- a/system/Drivers/STM32YYxx_HAL_Driver_version.md +++ b/system/Drivers/STM32YYxx_HAL_Driver_version.md @@ -6,7 +6,7 @@ * STM32F2: 1.2.9 * STM32F3: 1.5.8 * STM32F4: 1.8.3 - * STM32F7: 1.3.1 + * STM32F7: 1.3.2 * STM32G0: 1.4.6 * STM32G4: 1.2.5 * STM32H5: 1.5.0 From f72d2a17cec716c0c5ffdaf07cb9146faae7bef0 Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Mon, 26 May 2025 16:51:24 +0200 Subject: [PATCH 39/44] system(f7): update STM32F7xx CMSIS Drivers to v1.2.10 Included in STM32CubeF7 FW v1.17.3 Signed-off-by: Frederic Pillon --- .../CMSIS/Device/ST/STM32F7xx/Include/stm32f722xx.h | 2 +- .../CMSIS/Device/ST/STM32F7xx/Include/stm32f723xx.h | 2 +- .../CMSIS/Device/ST/STM32F7xx/Include/stm32f730xx.h | 2 +- .../CMSIS/Device/ST/STM32F7xx/Include/stm32f732xx.h | 2 +- .../CMSIS/Device/ST/STM32F7xx/Include/stm32f733xx.h | 2 +- .../CMSIS/Device/ST/STM32F7xx/Include/stm32f745xx.h | 2 +- .../CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h | 2 +- .../CMSIS/Device/ST/STM32F7xx/Include/stm32f750xx.h | 2 +- .../CMSIS/Device/ST/STM32F7xx/Include/stm32f756xx.h | 2 +- .../CMSIS/Device/ST/STM32F7xx/Include/stm32f765xx.h | 2 +- .../CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h | 2 +- .../CMSIS/Device/ST/STM32F7xx/Include/stm32f769xx.h | 2 +- .../CMSIS/Device/ST/STM32F7xx/Include/stm32f777xx.h | 2 +- .../CMSIS/Device/ST/STM32F7xx/Include/stm32f779xx.h | 2 +- .../CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h | 4 ++-- .../CMSIS/Device/ST/STM32F7xx/Release_Notes.html | 11 ++++++++++- .../ST/STM32F7xx/Source/Templates/system_stm32f7xx.c | 10 +++++----- .../CMSIS/Device/ST/STM32YYxx_CMSIS_version.md | 2 +- 18 files changed, 32 insertions(+), 23 deletions(-) diff --git a/system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f722xx.h b/system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f722xx.h index 1ed0c3fea3..b28b18bb45 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f722xx.h +++ b/system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f722xx.h @@ -12824,7 +12824,7 @@ typedef struct /******************* Bit definition for TIM_CCR5 register *******************/ #define TIM_CCR5_CCR5_Pos (0U) -#define TIM_CCR5_CCR5_Msk (0xFFFFFFFFUL << TIM_CCR5_CCR5_Pos) /*!< 0xFFFFFFFF */ +#define TIM_CCR5_CCR5_Msk (0xFFFFUL << TIM_CCR5_CCR5_Pos) /*!< 0xFFFF */ #define TIM_CCR5_CCR5 TIM_CCR5_CCR5_Msk /*!Release Notes for STM32F7xx C

                                                                                                  Update History

                                                                                                  - + +
                                                                                                  +
                                                                                                    +
                                                                                                  • Allow redefinition of the macro ‘VECT_TAB_OFFSET’ externally from the IDE, makefile, or command line.
                                                                                                    • +
                                                                                                  • Fix Capture Compare register TIMx_CCR5 defintion.
                                                                                                    • +
                                                                                                  +
                                                                                                  +
                                                                                                  +
                                                                                                  +
                                                                                                  • Update GCC start-up files to call SystemInit() API @Reset_Handler step: alignment with EWARM and MDK-ARM start-up files.
                                                                                                    • diff --git a/system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/system_stm32f7xx.c b/system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/system_stm32f7xx.c index c004f47cd0..1387051c97 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/system_stm32f7xx.c +++ b/system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/system_stm32f7xx.c @@ -86,14 +86,14 @@ #if defined(VECT_TAB_SRAM) #define VECT_TAB_BASE_ADDRESS RAMDTCM_BASE /*!< Vector Table base address field. This value must be a multiple of 0x200. */ -#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field. - This value must be a multiple of 0x200. */ #else #define VECT_TAB_BASE_ADDRESS FLASH_BASE /*!< Vector Table base address field. This value must be a multiple of 0x200. */ -#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field. - This value must be a multiple of 0x200. */ #endif /* VECT_TAB_SRAM */ +#if !defined(VECT_TAB_OFFSET) +#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table offset field. + This value must be a multiple of 0x200. */ +#endif /* VECT_TAB_OFFSET */ #endif /* USER_VECT_TAB_ADDRESS */ /******************************************************************************/ @@ -199,7 +199,7 @@ void SystemInit(void) */ void SystemCoreClockUpdate(void) { - uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2; + uint32_t tmp, pllvco, pllp, pllsource, pllm; /* Get SYSCLK source -------------------------------------------------------*/ tmp = RCC->CFGR & RCC_CFGR_SWS; diff --git a/system/Drivers/CMSIS/Device/ST/STM32YYxx_CMSIS_version.md b/system/Drivers/CMSIS/Device/ST/STM32YYxx_CMSIS_version.md index f2e4cc5252..2cfef5be44 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32YYxx_CMSIS_version.md +++ b/system/Drivers/CMSIS/Device/ST/STM32YYxx_CMSIS_version.md @@ -6,7 +6,7 @@ * STM32F2: 2.2.6 * STM32F3: 2.3.8 * STM32F4: 2.6.10 - * STM32F7: 1.2.9 + * STM32F7: 1.2.10 * STM32G0: 1.4.4 * STM32G4: 1.2.5 * STM32H5: 1.4.0 From 8df1389d06800cb7e7b4a0f738e8a7d22407aa2d Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Mon, 26 May 2025 17:17:02 +0200 Subject: [PATCH 40/44] system(f7): update STM32F7xx system Signed-off-by: Frederic Pillon --- system/STM32F7xx/system_stm32f7xx.c | 61 ++++++++++++++--------------- 1 file changed, 30 insertions(+), 31 deletions(-) diff --git a/system/STM32F7xx/system_stm32f7xx.c b/system/STM32F7xx/system_stm32f7xx.c index eae63fbd99..ed10030696 100644 --- a/system/STM32F7xx/system_stm32f7xx.c +++ b/system/STM32F7xx/system_stm32f7xx.c @@ -4,16 +4,16 @@ * @author MCD Application Team * @brief CMSIS Cortex-M7 Device Peripheral Access Layer System Source File. * - * This file provides two functions and one global variable to be called from + * This file provides two functions and one global variable to be called from * user application: - * - SystemInit(): This function is called at startup just after reset and + * - SystemInit(): This function is called at startup just after reset and * before branch to main program. This call is made inside * the "startup_stm32f7xx.s" file. * * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used - * by the user application to setup the SysTick + * by the user application to setup the SysTick * timer or configure other parameters. - * + * * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must * be called whenever the core clock is changed * during program execution. @@ -38,8 +38,8 @@ /** @addtogroup stm32f7xx_system * @{ - */ - + */ + /** @addtogroup STM32F7xx_System_Private_Includes * @{ */ @@ -65,13 +65,12 @@ /************************* Miscellaneous Configuration ************************/ /* Note: Following vector table addresses must be defined in line with linker configuration. */ - /*!< Uncomment the following line and change the address if you need to relocate your vector Table at a custom base address (+ VECT_TAB_OFFSET) */ /* #define VECT_TAB_BASE_ADDRESS 0x08000000 */ /*!< Uncomment the following line if you need to relocate your vector Table - in Sram else user remap will be done by default in Flash. */ + in Sram else user remap will be done in Flash. */ /* #define VECT_TAB_SRAM */ #ifndef VECT_TAB_OFFSET @@ -110,7 +109,7 @@ /* This variable is updated in three ways: 1) by calling CMSIS function SystemCoreClockUpdate() 2) by calling HAL API function HAL_RCC_GetHCLKFreq() - 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency + 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency Note: If you use this function to configure the system clock; then there is no need to call the 2 first functions listed above, since SystemCoreClock variable is updated automatically. @@ -137,7 +136,7 @@ /** * @brief Setup the microcontroller system - * Initialize the Embedded Flash Interface, the PLL and update the + * Initialize the Embedded Flash Interface, the PLL and update the * SystemFrequency variable. * @param None * @retval None @@ -177,41 +176,41 @@ void SystemInit(void) * The SystemCoreClock variable contains the core clock (HCLK), it can * be used by the user application to setup the SysTick timer or configure * other parameters. - * + * * @note Each time the core clock (HCLK) changes, this function must be called * to update SystemCoreClock variable value. Otherwise, any configuration - * based on this variable will be incorrect. - * - * @note - The system frequency computed by this function is not the real - * frequency in the chip. It is calculated based on the predefined + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined * constant and the selected clock source: - * + * * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) - * + * * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) - * - * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) + * + * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) * or HSI_VALUE(*) multiplied/divided by the PLL factors. - * + * * (*) HSI_VALUE is a constant defined in stm32f7xx_hal_conf.h file (default value * 16 MHz) but the real value may vary depending on the variations - * in voltage and temperature. - * + * in voltage and temperature. + * * (**) HSE_VALUE is a constant defined in stm32f7xx_hal_conf.h file (default value * 25 MHz), user has to ensure that HSE_VALUE is same as the real * frequency of the crystal used. Otherwise, this function may * have wrong result. - * + * * - The result of this function could be not correct when using fractional * value for HSE crystal. - * + * * @param None * @retval None */ void SystemCoreClockUpdate(void) { - uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2; - + uint32_t tmp, pllvco, pllp, pllsource, pllm; + /* Get SYSCLK source -------------------------------------------------------*/ tmp = RCC->CFGR & RCC_CFGR_SWS; @@ -227,10 +226,10 @@ void SystemCoreClockUpdate(void) /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N SYSCLK = PLL_VCO / PLL_P - */ + */ pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22; pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM; - + if (pllsource != 0) { /* HSE used as PLL clock source */ @@ -239,7 +238,7 @@ void SystemCoreClockUpdate(void) else { /* HSI used as PLL clock source */ - pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6); + pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6); } pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2; @@ -263,7 +262,7 @@ void SystemCoreClockUpdate(void) /** * @} */ - + /** * @} - */ + */ From 9e0d259693a0d0d7f6c0b10e24afc79d44c26448 Mon Sep 17 00:00:00 2001 From: Avamander Date: Sun, 25 May 2025 02:25:29 +0300 Subject: [PATCH 41/44] Annotate Error_Handler with noreturn to help analysis Signed-off-by: Avamander --- libraries/SrcWrapper/src/stm32/stm32_def.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/libraries/SrcWrapper/src/stm32/stm32_def.c b/libraries/SrcWrapper/src/stm32/stm32_def.c index 3c12041914..c53b5096dd 100644 --- a/libraries/SrcWrapper/src/stm32/stm32_def.c +++ b/libraries/SrcWrapper/src/stm32/stm32_def.c @@ -11,7 +11,7 @@ extern "C" { * @retval None */ #if !defined(NDEBUG) -WEAK void _Error_Handler(const char *msg, int val) +__attribute__((noreturn)) WEAK void _Error_Handler(const char *msg, int val) { /* User can add his own implementation to report the HAL error return state */ core_debug("Error: %s (%i)\n", msg, val); From b27287a6dbba2f98e6f014e6b85d9d74ca0caaa0 Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Tue, 27 May 2025 10:19:06 +0200 Subject: [PATCH 42/44] system(f4) update STM32F4xx HAL Drivers to v1.8.4 Included in STM32CubeF4 FW v1.28.2 Signed-off-by: Frederic Pillon --- .../Inc/Legacy/stm32_hal_legacy.h | 93 +++++++-- .../Inc/stm32f4xx_hal_cryp.h | 10 +- .../Inc/stm32f4xx_hal_dma2d.h | 8 +- .../Inc/stm32f4xx_hal_eth.h | 8 +- .../Inc/stm32f4xx_hal_hash.h | 82 ++++---- .../Inc/stm32f4xx_hal_hash_ex.h | 74 +++---- .../Inc/stm32f4xx_hal_i2s.h | 4 +- .../Inc/stm32f4xx_hal_ltdc.h | 7 +- .../Inc/stm32f4xx_hal_nand.h | 4 +- .../Inc/stm32f4xx_hal_pccard.h | 13 +- .../Inc/stm32f4xx_hal_rcc.h | 4 +- .../Inc/stm32f4xx_hal_rtc.h | 2 +- .../Inc/stm32f4xx_hal_rtc_ex.h | 16 +- .../Inc/stm32f4xx_hal_sdram.h | 2 +- .../Inc/stm32f4xx_hal_spi.h | 26 ++- .../Inc/stm32f4xx_hal_tim.h | 34 ++-- .../Inc/stm32f4xx_hal_tim_ex.h | 2 + .../Inc/stm32f4xx_hal_wwdg.h | 2 +- .../Inc/stm32f4xx_ll_dma.h | 2 +- .../Inc/stm32f4xx_ll_dma2d.h | 111 +++++----- .../Inc/stm32f4xx_ll_fmc.h | 111 +++++----- .../Inc/stm32f4xx_ll_fsmc.h | 179 ++++++++-------- .../Inc/stm32f4xx_ll_iwdg.h | 10 +- .../Inc/stm32f4xx_ll_rcc.h | 4 +- .../Inc/stm32f4xx_ll_rtc.h | 4 +- .../Inc/stm32f4xx_ll_spi.h | 53 +++-- .../Inc/stm32f4xx_ll_wwdg.h | 12 +- .../STM32F4xx_HAL_Driver/Release_Notes.html | 143 ++++++++++--- .../STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c | 4 +- .../Src/stm32f4xx_hal_adc.c | 6 +- .../Src/stm32f4xx_hal_adc_ex.c | 6 +- .../Src/stm32f4xx_hal_can.c | 4 +- .../Src/stm32f4xx_hal_cryp.c | 191 +++++++++--------- .../Src/stm32f4xx_hal_cryp_ex.c | 1 - .../Src/stm32f4xx_hal_dac.c | 4 + .../Src/stm32f4xx_hal_dcmi.c | 18 +- .../Src/stm32f4xx_hal_dma2d.c | 13 +- .../Src/stm32f4xx_hal_eth.c | 88 +++++++- .../Src/stm32f4xx_hal_flash.c | 2 +- .../Src/stm32f4xx_hal_flash_ex.c | 8 +- .../Src/stm32f4xx_hal_hash.c | 149 ++++++++------ .../Src/stm32f4xx_hal_hash_ex.c | 79 ++++---- .../Src/stm32f4xx_hal_i2c.c | 6 +- .../Src/stm32f4xx_hal_i2s.c | 4 +- .../Src/stm32f4xx_hal_i2s_ex.c | 11 +- .../Src/stm32f4xx_hal_irda.c | 76 ++++--- .../Src/stm32f4xx_hal_iwdg.c | 3 +- .../Src/stm32f4xx_hal_ltdc.c | 28 +-- .../Src/stm32f4xx_hal_mmc.c | 32 +-- .../Src/stm32f4xx_hal_nand.c | 10 +- .../Src/stm32f4xx_hal_pccard.c | 49 +++-- .../Src/stm32f4xx_hal_pcd.c | 3 +- .../Src/stm32f4xx_hal_qspi.c | 68 ++++--- .../Src/stm32f4xx_hal_rcc.c | 4 +- .../Src/stm32f4xx_hal_rcc_ex.c | 2 +- .../Src/stm32f4xx_hal_rtc.c | 124 ++++++------ .../Src/stm32f4xx_hal_rtc_ex.c | 39 ++-- .../Src/stm32f4xx_hal_sai.c | 78 ++++++- .../Src/stm32f4xx_hal_sd.c | 7 +- .../Src/stm32f4xx_hal_sdram.c | 5 +- .../Src/stm32f4xx_hal_smartcard.c | 72 +++++-- .../Src/stm32f4xx_hal_spi.c | 137 +++++++------ .../Src/stm32f4xx_hal_sram.c | 3 + .../Src/stm32f4xx_hal_tim.c | 13 +- .../Src/stm32f4xx_hal_uart.c | 80 ++++++-- .../Src/stm32f4xx_hal_usart.c | 179 ++++++++++------ .../Src/stm32f4xx_hal_wwdg.c | 11 +- .../Src/stm32f4xx_ll_dma2d.c | 10 +- .../Src/stm32f4xx_ll_fmc.c | 144 +++++++------ .../Src/stm32f4xx_ll_fsmc.c | 114 +++++------ .../Src/stm32f4xx_ll_spi.c | 5 +- .../Src/stm32f4xx_ll_usb.c | 27 ++- .../Drivers/STM32YYxx_HAL_Driver_version.md | 2 +- 73 files changed, 1754 insertions(+), 1185 deletions(-) diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h b/system/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h index bcc3face8a..36cbbaf5db 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h +++ b/system/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h @@ -472,7 +472,9 @@ extern "C" { #define TYPEPROGRAMDATA_FASTBYTE FLASH_TYPEPROGRAMDATA_FASTBYTE #define TYPEPROGRAMDATA_FASTHALFWORD FLASH_TYPEPROGRAMDATA_FASTHALFWORD #define TYPEPROGRAMDATA_FASTWORD FLASH_TYPEPROGRAMDATA_FASTWORD +#if !defined(STM32F2) && !defined(STM32F4) && !defined(STM32F7) && !defined(STM32H7) && !defined(STM32H5) #define PAGESIZE FLASH_PAGE_SIZE +#endif /* STM32F2 && STM32F4 && STM32F7 && STM32H7 && STM32H5 */ #define TYPEPROGRAM_FASTBYTE FLASH_TYPEPROGRAM_BYTE #define TYPEPROGRAM_FASTHALFWORD FLASH_TYPEPROGRAM_HALFWORD #define TYPEPROGRAM_FASTWORD FLASH_TYPEPROGRAM_WORD @@ -536,6 +538,10 @@ extern "C" { #define FLASH_FLAG_WDW FLASH_FLAG_WBNE #define OB_WRP_SECTOR_All OB_WRP_SECTOR_ALL #endif /* STM32H7 */ +#if defined(STM32H7RS) +#define FLASH_OPTKEY1 FLASH_OPT_KEY1 +#define FLASH_OPTKEY2 FLASH_OPT_KEY2 +#endif /* STM32H7RS */ #if defined(STM32U5) #define OB_USER_nRST_STOP OB_USER_NRST_STOP #define OB_USER_nRST_STDBY OB_USER_NRST_STDBY @@ -601,6 +607,15 @@ extern "C" { #define HAL_SYSCFG_DisableIOAnalogSwitchVDD HAL_SYSCFG_DisableIOSwitchVDD #endif /* STM32G4 */ +#if defined(STM32U5) + +#define HAL_SYSCFG_EnableIOAnalogSwitchBooster HAL_SYSCFG_EnableIOAnalogBooster +#define HAL_SYSCFG_DisableIOAnalogSwitchBooster HAL_SYSCFG_DisableIOAnalogBooster +#define HAL_SYSCFG_EnableIOAnalogSwitchVoltageSelection HAL_SYSCFG_EnableIOAnalogVoltageSelection +#define HAL_SYSCFG_DisableIOAnalogSwitchVoltageSelection HAL_SYSCFG_DisableIOAnalogVoltageSelection + +#endif /* STM32U5 */ + #if defined(STM32H5) #define SYSCFG_IT_FPU_IOC SBS_IT_FPU_IOC #define SYSCFG_IT_FPU_DZC SBS_IT_FPU_DZC @@ -806,6 +821,21 @@ extern "C" { #define GPIO_AF0_S2DSTOP GPIO_AF0_SRDSTOP #define GPIO_AF11_LPGPIO GPIO_AF11_LPGPIO1 #endif /* STM32U5 */ + +#if defined(STM32WBA) +#define GPIO_AF11_RF_ANTSW0 GPIO_AF11_RF +#define GPIO_AF11_RF_ANTSW1 GPIO_AF11_RF +#define GPIO_AF11_RF_ANTSW2 GPIO_AF11_RF +#define GPIO_AF11_RF_IO1 GPIO_AF11_RF +#define GPIO_AF11_RF_IO2 GPIO_AF11_RF +#define GPIO_AF11_RF_IO3 GPIO_AF11_RF +#define GPIO_AF11_RF_IO4 GPIO_AF11_RF +#define GPIO_AF11_RF_IO5 GPIO_AF11_RF +#define GPIO_AF11_RF_IO6 GPIO_AF11_RF +#define GPIO_AF11_RF_IO7 GPIO_AF11_RF +#define GPIO_AF11_RF_IO8 GPIO_AF11_RF +#define GPIO_AF11_RF_IO9 GPIO_AF11_RF +#endif /* STM32WBA */ /** * @} */ @@ -860,6 +890,10 @@ extern "C" { #define __HAL_HRTIM_SetCompare __HAL_HRTIM_SETCOMPARE #define __HAL_HRTIM_GetCompare __HAL_HRTIM_GETCOMPARE +#if defined(STM32F3) || defined(STM32G4) || defined(STM32H7) +#define HRTIMInterruptResquests HRTIMInterruptRequests +#endif /* STM32F3 || STM32G4 || STM32H7 */ + #if defined(STM32G4) #define HAL_HRTIM_ExternalEventCounterConfig HAL_HRTIM_ExtEventCounterConfig #define HAL_HRTIM_ExternalEventCounterEnable HAL_HRTIM_ExtEventCounterEnable @@ -997,8 +1031,8 @@ extern "C" { #define HRTIM_CALIBRATIONRATE_910 (HRTIM_DLLCR_CALRTE_0) #define HRTIM_CALIBRATIONRATE_114 (HRTIM_DLLCR_CALRTE_1) #define HRTIM_CALIBRATIONRATE_14 (HRTIM_DLLCR_CALRTE_1 | HRTIM_DLLCR_CALRTE_0) - #endif /* STM32F3 */ + /** * @} */ @@ -1249,10 +1283,10 @@ extern "C" { #define RTC_TAMPERPIN_PA0 RTC_TAMPERPIN_POS1 #define RTC_TAMPERPIN_PI8 RTC_TAMPERPIN_POS1 -#if defined(STM32H5) || defined(STM32H7RS) +#if defined(STM32H5) || defined(STM32H7RS) || defined(STM32N6) #define TAMP_SECRETDEVICE_ERASE_NONE TAMP_DEVICESECRETS_ERASE_NONE #define TAMP_SECRETDEVICE_ERASE_BKP_SRAM TAMP_DEVICESECRETS_ERASE_BKPSRAM -#endif /* STM32H5 || STM32H7RS */ +#endif /* STM32H5 || STM32H7RS || STM32N6 */ #if defined(STM32WBA) #define TAMP_SECRETDEVICE_ERASE_NONE TAMP_DEVICESECRETS_ERASE_NONE @@ -1264,27 +1298,27 @@ extern "C" { #define TAMP_SECRETDEVICE_ERASE_ALL TAMP_DEVICESECRETS_ERASE_ALL #endif /* STM32WBA */ -#if defined(STM32H5) || defined(STM32WBA) || defined(STM32H7RS) +#if defined(STM32H5) || defined(STM32WBA) || defined(STM32H7RS) || defined(STM32N6) #define TAMP_SECRETDEVICE_ERASE_DISABLE TAMP_DEVICESECRETS_ERASE_NONE #define TAMP_SECRETDEVICE_ERASE_ENABLE TAMP_SECRETDEVICE_ERASE_ALL -#endif /* STM32H5 || STM32WBA || STM32H7RS */ +#endif /* STM32H5 || STM32WBA || STM32H7RS || STM32N6 */ -#if defined(STM32F7) +#if defined(STM32F7) || defined(STM32WB) #define RTC_TAMPCR_TAMPXE RTC_TAMPER_ENABLE_BITS_MASK #define RTC_TAMPCR_TAMPXIE RTC_TAMPER_IT_ENABLE_BITS_MASK -#endif /* STM32F7 */ +#endif /* STM32F7 || STM32WB */ #if defined(STM32H7) #define RTC_TAMPCR_TAMPXE RTC_TAMPER_X #define RTC_TAMPCR_TAMPXIE RTC_TAMPER_X_INTERRUPT #endif /* STM32H7 */ -#if defined(STM32F7) || defined(STM32H7) || defined(STM32L0) +#if defined(STM32F7) || defined(STM32H7) || defined(STM32L0) || defined(STM32WB) #define RTC_TAMPER1_INTERRUPT RTC_IT_TAMP1 #define RTC_TAMPER2_INTERRUPT RTC_IT_TAMP2 #define RTC_TAMPER3_INTERRUPT RTC_IT_TAMP3 #define RTC_ALL_TAMPER_INTERRUPT RTC_IT_TAMP -#endif /* STM32F7 || STM32H7 || STM32L0 */ +#endif /* STM32F7 || STM32H7 || STM32L0 || STM32WB */ /** * @} @@ -1451,7 +1485,7 @@ extern "C" { #define TIM_TIM3_TI1_COMP1COMP2_OUT TIM_TIM3_TI1_COMP1_COMP2 #endif -#if defined(STM32U5) +#if defined(STM32U5) || defined(STM32MP2) #define OCREF_CLEAR_SELECT_Pos OCREF_CLEAR_SELECT_POS #define OCREF_CLEAR_SELECT_Msk OCREF_CLEAR_SELECT_MSK #endif @@ -1999,12 +2033,12 @@ extern "C" { /** @defgroup HAL_RTC_Aliased_Functions HAL RTC Aliased Functions maintained for legacy purpose * @{ */ -#if defined(STM32H5) || defined(STM32WBA) || defined(STM32H7RS) +#if defined(STM32H5) || defined(STM32WBA) || defined(STM32H7RS) || defined(STM32N6) #define HAL_RTCEx_SetBoothardwareKey HAL_RTCEx_LockBootHardwareKey #define HAL_RTCEx_BKUPBlock_Enable HAL_RTCEx_BKUPBlock #define HAL_RTCEx_BKUPBlock_Disable HAL_RTCEx_BKUPUnblock #define HAL_RTCEx_Erase_SecretDev_Conf HAL_RTCEx_ConfigEraseDeviceSecrets -#endif /* STM32H5 || STM32WBA || STM32H7RS */ +#endif /* STM32H5 || STM32WBA || STM32H7RS || STM32N6 */ /** * @} @@ -3664,8 +3698,9 @@ extern "C" { #define RCC_SYSCLKSOURCE_STATUS_PLLR RCC_SYSCLKSOURCE_STATUS_PLLCLK #endif -#if defined(STM32L4) || defined(STM32WB) || defined(STM32G0) || defined(STM32G4) || defined(STM32L5) || \ - defined(STM32WL) || defined(STM32C0) || defined(STM32H7RS) || defined(STM32U0) +#if defined(STM32L4) || defined(STM32WB) || defined(STM32G0) || defined(STM32G4) || defined(STM32L5) || \ + defined(STM32WL) || defined(STM32C0) || defined(STM32N6) || defined(STM32H7RS) || \ + defined(STM32U0) #define RCC_RTCCLKSOURCE_NO_CLK RCC_RTCCLKSOURCE_NONE #else #define RCC_RTCCLKSOURCE_NONE RCC_RTCCLKSOURCE_NO_CLK @@ -3916,7 +3951,8 @@ extern "C" { */ #if defined (STM32G0) || defined (STM32L5) || defined (STM32L412xx) || defined (STM32L422xx) || \ defined (STM32L4P5xx)|| defined (STM32L4Q5xx) || defined (STM32G4) || defined (STM32WL) || defined (STM32U5) || \ - defined (STM32WBA) || defined (STM32H5) || defined (STM32C0) || defined (STM32H7RS) || defined (STM32U0) + defined (STM32WBA) || defined (STM32H5) || \ + defined (STM32C0) || defined (STM32N6) || defined (STM32H7RS) || defined (STM32U0) || defined (STM32U3) #else #define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG #endif @@ -4210,6 +4246,33 @@ extern "C" { #define HAL_PCD_SetTxFiFo HAL_PCDEx_SetTxFiFo #define HAL_PCD_SetRxFiFo HAL_PCDEx_SetRxFiFo +#if defined(STM32U5) +#define USB_OTG_GOTGCTL_BSESVLD USB_OTG_GOTGCTL_BSVLD +#define USB_OTG_GAHBCFG_GINT USB_OTG_GAHBCFG_GINTMSK +#define USB_OTG_GUSBCFG_PHYLPCS USB_OTG_GUSBCFG_PHYLPC +#define USB_OTG_GRSTCTL_HSRST USB_OTG_GRSTCTL_PSRST +#define USB_OTG_GINTSTS_BOUTNAKEFF USB_OTG_GINTSTS_GONAKEFF +#define USB_OTG_GINTSTS_WKUINT USB_OTG_GINTSTS_WKUPINT +#define USB_OTG_GINTMSK_PXFRM_IISOOXFRM USB_OTG_GINTMSK_IPXFRM_IISOOXFRM +#define USB_OTG_GRXSTSP_EPNUM USB_OTG_GRXSTSP_EPNUM_CHNUM +#define USB_OTG_GLPMCFG_L1ResumeOK USB_OTG_GLPMCFG_L1RSMOK +#define USB_OTG_HPTXFSIZ_PTXFD USB_OTG_HPTXFSIZ_PTXFSIZ +#define USB_OTG_HCCHAR_MC USB_OTG_HCCHAR_MCNT +#define USB_OTG_HCCHAR_MC_0 USB_OTG_HCCHAR_MCNT_0 +#define USB_OTG_HCCHAR_MC_1 USB_OTG_HCCHAR_MCNT_1 +#define USB_OTG_HCINTMSK_AHBERR USB_OTG_HCINTMSK_AHBERRM +#define USB_OTG_HCTSIZ_DOPING USB_OTG_HCTSIZ_DOPNG +#define USB_OTG_DOEPMSK_OPEM USB_OTG_DOEPMSK_OUTPKTERRM +#define USB_OTG_DIEPCTL_SODDFRM USB_OTG_DIEPCTL_SD1PID_SODDFRM +#define USB_OTG_DIEPTSIZ_MULCNT USB_OTG_DIEPTSIZ_MCNT +#define USB_OTG_DOEPCTL_SODDFRM USB_OTG_DOEPCTL_SD1PID_SODDFRM +#define USB_OTG_DOEPCTL_DPID USB_OTG_DOEPCTL_DPID_EONUM +#define USB_OTG_DOEPTSIZ_STUPCNT USB_OTG_DOEPTSIZ_RXDPID +#define USB_OTG_DOEPTSIZ_STUPCNT_0 USB_OTG_DOEPTSIZ_RXDPID_0 +#define USB_OTG_DOEPTSIZ_STUPCNT_1 USB_OTG_DOEPTSIZ_RXDPID_1 +#define USB_OTG_PCGCCTL_STOPCLK USB_OTG_PCGCCTL_STPPCLK +#define USB_OTG_PCGCCTL_GATECLK USB_OTG_PCGCCTL_GATEHCLK +#endif /** * @} */ diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cryp.h b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cryp.h index ff3aad1488..d453f46379 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cryp.h +++ b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cryp.h @@ -51,7 +51,8 @@ typedef struct uint32_t DataType; /*!< 32-bit data, 16-bit data, 8-bit data or 1-bit string. This parameter can be a value of @ref CRYP_Data_Type */ uint32_t KeySize; /*!< Used only in AES mode : 128, 192 or 256 bit key length in CRYP1. - 128 or 256 bit key length in TinyAES This parameter can be a value of @ref CRYP_Key_Size */ + 128 or 256 bit key length in TinyAES This parameter can be a value of + @ref CRYP_Key_Size */ uint32_t *pKey; /*!< The key used for encryption/decryption */ uint32_t *pInitVect; /*!< The initialization vector used also as initialization counter in CTR mode */ @@ -402,8 +403,11 @@ typedef void (*pCRYP_CallbackTypeDef)(CRYP_HandleTypeDef *hcryp); /*!< point */ #define CRYP_FLAG_MASK 0x0000001FU #if defined(CRYP) -#define __HAL_CRYP_GET_FLAG(__HANDLE__, __FLAG__) ((((uint8_t)((__FLAG__) >> 24)) == 0x01U)?((((__HANDLE__)->Instance->RISR) & ((__FLAG__) & CRYP_FLAG_MASK)) == ((__FLAG__) & CRYP_FLAG_MASK)): \ - ((((__HANDLE__)->Instance->RISR) & ((__FLAG__) & CRYP_FLAG_MASK)) == ((__FLAG__) & CRYP_FLAG_MASK))) +#define __HAL_CRYP_GET_FLAG(__HANDLE__, __FLAG__) ((((uint8_t)((__FLAG__) >> 24)) == 0x01U)? \ + ((((__HANDLE__)->Instance->RISR) & ((__FLAG__) \ + & CRYP_FLAG_MASK)) == ((__FLAG__) & CRYP_FLAG_MASK)): \ + ((((__HANDLE__)->Instance->RISR) & ((__FLAG__) & CRYP_FLAG_MASK))\ + == ((__FLAG__) & CRYP_FLAG_MASK))) #else /* AES*/ #define __HAL_CRYP_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) #endif /* End AES or CRYP */ diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h index 896714137b..b09e831b8c 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h +++ b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h @@ -448,9 +448,9 @@ HAL_StatusTypeDef HAL_DMA2D_Suspend(DMA2D_HandleTypeDef *hdma2d); HAL_StatusTypeDef HAL_DMA2D_Resume(DMA2D_HandleTypeDef *hdma2d); HAL_StatusTypeDef HAL_DMA2D_Abort(DMA2D_HandleTypeDef *hdma2d); HAL_StatusTypeDef HAL_DMA2D_EnableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx); -HAL_StatusTypeDef HAL_DMA2D_CLUTStartLoad(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef *CLUTCfg, +HAL_StatusTypeDef HAL_DMA2D_CLUTStartLoad(DMA2D_HandleTypeDef *hdma2d, const DMA2D_CLUTCfgTypeDef *CLUTCfg, uint32_t LayerIdx); -HAL_StatusTypeDef HAL_DMA2D_CLUTStartLoad_IT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef *CLUTCfg, +HAL_StatusTypeDef HAL_DMA2D_CLUTStartLoad_IT(DMA2D_HandleTypeDef *hdma2d, const DMA2D_CLUTCfgTypeDef *CLUTCfg, uint32_t LayerIdx); HAL_StatusTypeDef HAL_DMA2D_CLUTLoad(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx); HAL_StatusTypeDef HAL_DMA2D_CLUTLoad_IT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx); @@ -487,8 +487,8 @@ HAL_StatusTypeDef HAL_DMA2D_ConfigDeadTime(DMA2D_HandleTypeDef *hdma2d, uint8_t */ /* Peripheral State functions ***************************************************/ -HAL_DMA2D_StateTypeDef HAL_DMA2D_GetState(DMA2D_HandleTypeDef *hdma2d); -uint32_t HAL_DMA2D_GetError(DMA2D_HandleTypeDef *hdma2d); +HAL_DMA2D_StateTypeDef HAL_DMA2D_GetState(const DMA2D_HandleTypeDef *hdma2d); +uint32_t HAL_DMA2D_GetError(const DMA2D_HandleTypeDef *hdma2d); /** * @} diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_eth.h b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_eth.h index 9024fff0b4..0e75b6d243 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_eth.h +++ b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_eth.h @@ -98,7 +98,7 @@ typedef struct uint32_t *PacketAddress[ETH_TX_DESC_CNT]; /*Instance->DMASR = ( __FLAG__)) - /** * @brief Checks whether the specified ETHERNET MAC flag is set or not. * @param __HANDLE__: ETH Handle @@ -1992,6 +1991,7 @@ uint32_t HAL_ETH_GetError(const ETH_HandleTypeDef *heth); uint32_t HAL_ETH_GetDMAError(const ETH_HandleTypeDef *heth); uint32_t HAL_ETH_GetMACError(const ETH_HandleTypeDef *heth); uint32_t HAL_ETH_GetMACWakeUpSource(const ETH_HandleTypeDef *heth); +uint32_t HAL_ETH_GetTxBuffersNumber(const ETH_HandleTypeDef *heth); /** * @} */ diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hash.h b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hash.h index 9a93fbbc06..5fb9b8d5f7 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hash.h +++ b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hash.h @@ -117,13 +117,13 @@ typedef struct { HASH_InitTypeDef Init; /*!< HASH required parameters */ - uint8_t *pHashInBuffPtr; /*!< Pointer to input buffer */ + uint8_t const *pHashInBuffPtr; /*!< Pointer to input buffer */ uint8_t *pHashOutBuffPtr; /*!< Pointer to output buffer (digest) */ uint8_t *pHashKeyBuffPtr; /*!< Pointer to key buffer (HMAC only) */ - uint8_t *pHashMsgBuffPtr; /*!< Pointer to message buffer (HMAC only) */ + uint8_t const *pHashMsgBuffPtr; /*!< Pointer to message buffer (HMAC only) */ uint32_t HashBuffSize; /*!< Size of buffer to be processed */ @@ -480,15 +480,17 @@ HAL_StatusTypeDef HAL_HASH_UnRegisterCallback(HASH_HandleTypeDef *hhash, HAL_HAS /* HASH processing using polling *********************************************/ -HAL_StatusTypeDef HAL_HASH_SHA1_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t *pOutBuffer, +HAL_StatusTypeDef HAL_HASH_SHA1_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, + uint8_t *pOutBuffer, uint32_t Timeout); -HAL_StatusTypeDef HAL_HASH_MD5_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t *pOutBuffer, +HAL_StatusTypeDef HAL_HASH_MD5_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, + uint8_t *pOutBuffer, uint32_t Timeout); -HAL_StatusTypeDef HAL_HASH_MD5_Accmlt(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); -HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); -HAL_StatusTypeDef HAL_HASH_MD5_Accmlt_End(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASH_MD5_Accmlt(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); +HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); +HAL_StatusTypeDef HAL_HASH_MD5_Accmlt_End(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer, uint32_t Timeout); -HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt_End(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt_End(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer, uint32_t Timeout); @@ -501,15 +503,15 @@ HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt_End(HASH_HandleTypeDef *hhash, uint8_t *p */ /* HASH processing using IT **************************************************/ -HAL_StatusTypeDef HAL_HASH_SHA1_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASH_SHA1_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer); -HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); -HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt_End_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); +HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt_End_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer); -HAL_StatusTypeDef HAL_HASH_MD5_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASH_MD5_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer); -HAL_StatusTypeDef HAL_HASH_MD5_Accmlt_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); -HAL_StatusTypeDef HAL_HASH_MD5_Accmlt_End_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASH_MD5_Accmlt_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); +HAL_StatusTypeDef HAL_HASH_MD5_Accmlt_End_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer); void HAL_HASH_IRQHandler(HASH_HandleTypeDef *hhash); /** @@ -521,9 +523,9 @@ void HAL_HASH_IRQHandler(HASH_HandleTypeDef *hhash); */ /* HASH processing using DMA *************************************************/ -HAL_StatusTypeDef HAL_HASH_SHA1_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); +HAL_StatusTypeDef HAL_HASH_SHA1_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); HAL_StatusTypeDef HAL_HASH_SHA1_Finish(HASH_HandleTypeDef *hhash, uint8_t *pOutBuffer, uint32_t Timeout); -HAL_StatusTypeDef HAL_HASH_MD5_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); +HAL_StatusTypeDef HAL_HASH_MD5_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); HAL_StatusTypeDef HAL_HASH_MD5_Finish(HASH_HandleTypeDef *hhash, uint8_t *pOutBuffer, uint32_t Timeout); /** @@ -535,9 +537,11 @@ HAL_StatusTypeDef HAL_HASH_MD5_Finish(HASH_HandleTypeDef *hhash, uint8_t *pOutBu */ /* HASH-MAC processing using polling *****************************************/ -HAL_StatusTypeDef HAL_HMAC_SHA1_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t *pOutBuffer, +HAL_StatusTypeDef HAL_HMAC_SHA1_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, + uint8_t *pOutBuffer, uint32_t Timeout); -HAL_StatusTypeDef HAL_HMAC_MD5_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t *pOutBuffer, +HAL_StatusTypeDef HAL_HMAC_MD5_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, + uint8_t *pOutBuffer, uint32_t Timeout); /** @@ -548,9 +552,9 @@ HAL_StatusTypeDef HAL_HMAC_MD5_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuff * @{ */ -HAL_StatusTypeDef HAL_HMAC_MD5_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HMAC_MD5_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer); -HAL_StatusTypeDef HAL_HMAC_SHA1_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HMAC_SHA1_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer); /** @@ -562,8 +566,8 @@ HAL_StatusTypeDef HAL_HMAC_SHA1_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pIn */ /* HASH-HMAC processing using DMA ********************************************/ -HAL_StatusTypeDef HAL_HMAC_SHA1_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); -HAL_StatusTypeDef HAL_HMAC_MD5_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); +HAL_StatusTypeDef HAL_HMAC_SHA1_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); +HAL_StatusTypeDef HAL_HMAC_MD5_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); /** * @} @@ -575,13 +579,13 @@ HAL_StatusTypeDef HAL_HMAC_MD5_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pIn /* Peripheral State methods **************************************************/ -HAL_HASH_StateTypeDef HAL_HASH_GetState(HASH_HandleTypeDef *hhash); -HAL_StatusTypeDef HAL_HASH_GetStatus(HASH_HandleTypeDef *hhash); -void HAL_HASH_ContextSaving(HASH_HandleTypeDef *hhash, uint8_t *pMemBuffer); -void HAL_HASH_ContextRestoring(HASH_HandleTypeDef *hhash, uint8_t *pMemBuffer); +HAL_HASH_StateTypeDef HAL_HASH_GetState(const HASH_HandleTypeDef *hhash); +HAL_StatusTypeDef HAL_HASH_GetStatus(const HASH_HandleTypeDef *hhash); +void HAL_HASH_ContextSaving(const HASH_HandleTypeDef *hhash, const uint8_t *pMemBuffer); +void HAL_HASH_ContextRestoring(HASH_HandleTypeDef *hhash, const uint8_t *pMemBuffer); void HAL_HASH_SwFeed_ProcessSuspend(HASH_HandleTypeDef *hhash); HAL_StatusTypeDef HAL_HASH_DMAFeed_ProcessSuspend(HASH_HandleTypeDef *hhash); -uint32_t HAL_HASH_GetError(HASH_HandleTypeDef *hhash); +uint32_t HAL_HASH_GetError(const HASH_HandleTypeDef *hhash); /** * @} @@ -598,19 +602,27 @@ uint32_t HAL_HASH_GetError(HASH_HandleTypeDef *hhash); */ /* Private functions */ -HAL_StatusTypeDef HASH_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t *pOutBuffer, +HAL_StatusTypeDef HASH_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, + uint8_t *pOutBuffer, uint32_t Timeout, uint32_t Algorithm); -HAL_StatusTypeDef HASH_Accumulate(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint32_t Algorithm); -HAL_StatusTypeDef HASH_Accumulate_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint32_t Algorithm); -HAL_StatusTypeDef HASH_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t *pOutBuffer, +HAL_StatusTypeDef HASH_Accumulate(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, + uint32_t Algorithm); +HAL_StatusTypeDef HASH_Accumulate_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, + uint32_t Algorithm); +HAL_StatusTypeDef HASH_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, + uint8_t *pOutBuffer, uint32_t Algorithm); -HAL_StatusTypeDef HASH_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint32_t Algorithm); +HAL_StatusTypeDef HASH_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, + uint32_t Algorithm); HAL_StatusTypeDef HASH_Finish(HASH_HandleTypeDef *hhash, uint8_t *pOutBuffer, uint32_t Timeout); -HAL_StatusTypeDef HMAC_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t *pOutBuffer, +HAL_StatusTypeDef HMAC_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, + uint8_t *pOutBuffer, uint32_t Timeout, uint32_t Algorithm); -HAL_StatusTypeDef HMAC_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t *pOutBuffer, +HAL_StatusTypeDef HMAC_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, + uint8_t *pOutBuffer, uint32_t Algorithm); -HAL_StatusTypeDef HMAC_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint32_t Algorithm); +HAL_StatusTypeDef HMAC_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, + uint32_t Algorithm); /** * @} diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hash_ex.h b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hash_ex.h index 91e65dca2a..ef13fe57c7 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hash_ex.h +++ b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hash_ex.h @@ -50,15 +50,15 @@ extern "C" { * @{ */ -HAL_StatusTypeDef HAL_HASHEx_SHA224_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASHEx_SHA224_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer, uint32_t Timeout); -HAL_StatusTypeDef HAL_HASHEx_SHA224_Accmlt(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); -HAL_StatusTypeDef HAL_HASHEx_SHA224_Accmlt_End(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASHEx_SHA224_Accmlt(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); +HAL_StatusTypeDef HAL_HASHEx_SHA224_Accmlt_End(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer, uint32_t Timeout); -HAL_StatusTypeDef HAL_HASHEx_SHA256_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASHEx_SHA256_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer, uint32_t Timeout); -HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); -HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt_End(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); +HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt_End(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer, uint32_t Timeout); /** @@ -69,15 +69,17 @@ HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt_End(HASH_HandleTypeDef *hhash, uint8_ * @{ */ -HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer); -HAL_StatusTypeDef HAL_HASHEx_SHA224_Accmlt_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); -HAL_StatusTypeDef HAL_HASHEx_SHA224_Accmlt_End_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASHEx_SHA224_Accmlt_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); +HAL_StatusTypeDef HAL_HASHEx_SHA224_Accmlt_End_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, + uint32_t Size, uint8_t *pOutBuffer); -HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer); -HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); -HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt_End_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); +HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt_End_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, + uint32_t Size, uint8_t *pOutBuffer); /** @@ -87,9 +89,9 @@ HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt_End_IT(HASH_HandleTypeDef *hhash, uin /** @addtogroup HASHEx_Exported_Functions_Group3 HASH extended processing functions in DMA mode * @{ */ -HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); +HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); HAL_StatusTypeDef HAL_HASHEx_SHA224_Finish(HASH_HandleTypeDef *hhash, uint8_t *pOutBuffer, uint32_t Timeout); -HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); +HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); HAL_StatusTypeDef HAL_HASHEx_SHA256_Finish(HASH_HandleTypeDef *hhash, uint8_t *pOutBuffer, uint32_t Timeout); /** @@ -99,9 +101,9 @@ HAL_StatusTypeDef HAL_HASHEx_SHA256_Finish(HASH_HandleTypeDef *hhash, uint8_t *p /** @addtogroup HASHEx_Exported_Functions_Group4 HMAC extended processing functions in polling mode * @{ */ -HAL_StatusTypeDef HAL_HMACEx_SHA224_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HMACEx_SHA224_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer, uint32_t Timeout); -HAL_StatusTypeDef HAL_HMACEx_SHA256_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HMACEx_SHA256_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer, uint32_t Timeout); /** * @} @@ -111,9 +113,9 @@ HAL_StatusTypeDef HAL_HMACEx_SHA256_Start(HASH_HandleTypeDef *hhash, uint8_t *pI * @{ */ -HAL_StatusTypeDef HAL_HMACEx_SHA224_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HMACEx_SHA224_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer); -HAL_StatusTypeDef HAL_HMACEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HMACEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer); /** @@ -124,8 +126,8 @@ HAL_StatusTypeDef HAL_HMACEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, uint8_t * @{ */ -HAL_StatusTypeDef HAL_HMACEx_SHA224_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); -HAL_StatusTypeDef HAL_HMACEx_SHA256_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); +HAL_StatusTypeDef HAL_HMACEx_SHA224_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); +HAL_StatusTypeDef HAL_HMACEx_SHA256_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); /** * @} @@ -135,20 +137,24 @@ HAL_StatusTypeDef HAL_HMACEx_SHA256_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t * @{ */ -HAL_StatusTypeDef HAL_HMACEx_MD5_Step1_2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); -HAL_StatusTypeDef HAL_HMACEx_MD5_Step2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); -HAL_StatusTypeDef HAL_HMACEx_MD5_Step2_3_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); - -HAL_StatusTypeDef HAL_HMACEx_SHA1_Step1_2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); -HAL_StatusTypeDef HAL_HMACEx_SHA1_Step2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); -HAL_StatusTypeDef HAL_HMACEx_SHA1_Step2_3_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); -HAL_StatusTypeDef HAL_HMACEx_SHA224_Step1_2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); -HAL_StatusTypeDef HAL_HMACEx_SHA224_Step2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); -HAL_StatusTypeDef HAL_HMACEx_SHA224_Step2_3_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); - -HAL_StatusTypeDef HAL_HMACEx_SHA256_Step1_2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); -HAL_StatusTypeDef HAL_HMACEx_SHA256_Step2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); -HAL_StatusTypeDef HAL_HMACEx_SHA256_Step2_3_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); +HAL_StatusTypeDef HAL_HMACEx_MD5_Step1_2_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); +HAL_StatusTypeDef HAL_HMACEx_MD5_Step2_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); +HAL_StatusTypeDef HAL_HMACEx_MD5_Step2_3_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); + +HAL_StatusTypeDef HAL_HMACEx_SHA1_Step1_2_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); +HAL_StatusTypeDef HAL_HMACEx_SHA1_Step2_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); +HAL_StatusTypeDef HAL_HMACEx_SHA1_Step2_3_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); +HAL_StatusTypeDef HAL_HMACEx_SHA224_Step1_2_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, + uint32_t Size); +HAL_StatusTypeDef HAL_HMACEx_SHA224_Step2_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); +HAL_StatusTypeDef HAL_HMACEx_SHA224_Step2_3_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, + uint32_t Size); + +HAL_StatusTypeDef HAL_HMACEx_SHA256_Step1_2_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, + uint32_t Size); +HAL_StatusTypeDef HAL_HMACEx_SHA256_Step2_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); +HAL_StatusTypeDef HAL_HMACEx_SHA256_Step2_3_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, + uint32_t Size); /** * @} */ diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2s.h b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2s.h index 66cee01b26..2a940b8991 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2s.h +++ b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2s.h @@ -496,8 +496,8 @@ void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s); * @{ */ /* Peripheral Control and State functions ************************************/ -HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s); -uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s); +HAL_I2S_StateTypeDef HAL_I2S_GetState(const I2S_HandleTypeDef *hi2s); +uint32_t HAL_I2S_GetError(const I2S_HandleTypeDef *hi2s); /** * @} */ diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h index 78349ebbf4..7165690fb8 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h +++ b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h @@ -592,7 +592,8 @@ HAL_StatusTypeDef HAL_LTDC_SetAlpha(LTDC_HandleTypeDef *hltdc, uint32_t Alpha, u HAL_StatusTypeDef HAL_LTDC_SetAddress(LTDC_HandleTypeDef *hltdc, uint32_t Address, uint32_t LayerIdx); HAL_StatusTypeDef HAL_LTDC_SetPitch(LTDC_HandleTypeDef *hltdc, uint32_t LinePitchInPixels, uint32_t LayerIdx); HAL_StatusTypeDef HAL_LTDC_ConfigColorKeying(LTDC_HandleTypeDef *hltdc, uint32_t RGBValue, uint32_t LayerIdx); -HAL_StatusTypeDef HAL_LTDC_ConfigCLUT(LTDC_HandleTypeDef *hltdc, uint32_t *pCLUT, uint32_t CLUTSize, uint32_t LayerIdx); +HAL_StatusTypeDef HAL_LTDC_ConfigCLUT(LTDC_HandleTypeDef *hltdc, const uint32_t *pCLUT, uint32_t CLUTSize, + uint32_t LayerIdx); HAL_StatusTypeDef HAL_LTDC_EnableColorKeying(LTDC_HandleTypeDef *hltdc, uint32_t LayerIdx); HAL_StatusTypeDef HAL_LTDC_DisableColorKeying(LTDC_HandleTypeDef *hltdc, uint32_t LayerIdx); HAL_StatusTypeDef HAL_LTDC_EnableCLUT(LTDC_HandleTypeDef *hltdc, uint32_t LayerIdx); @@ -625,8 +626,8 @@ HAL_StatusTypeDef HAL_LTDC_DisableCLUT_NoReload(LTDC_HandleTypeDef *hltdc, uint3 * @{ */ /* Peripheral State functions *************************************************/ -HAL_LTDC_StateTypeDef HAL_LTDC_GetState(LTDC_HandleTypeDef *hltdc); -uint32_t HAL_LTDC_GetError(LTDC_HandleTypeDef *hltdc); +HAL_LTDC_StateTypeDef HAL_LTDC_GetState(const LTDC_HandleTypeDef *hltdc); +uint32_t HAL_LTDC_GetError(const LTDC_HandleTypeDef *hltdc); /** * @} */ diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_nand.h b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_nand.h index 9fc12a0189..9db3882aa9 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_nand.h +++ b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_nand.h @@ -198,7 +198,7 @@ HAL_StatusTypeDef HAL_NAND_Init(NAND_HandleTypeDef *hnand, FMC_NAND_PCC_TimingT FMC_NAND_PCC_TimingTypeDef *AttSpace_Timing); HAL_StatusTypeDef HAL_NAND_DeInit(NAND_HandleTypeDef *hnand); -HAL_StatusTypeDef HAL_NAND_ConfigDevice(NAND_HandleTypeDef *hnand, NAND_DeviceConfigTypeDef *pDeviceConfig); +HAL_StatusTypeDef HAL_NAND_ConfigDevice(NAND_HandleTypeDef *hnand, const NAND_DeviceConfigTypeDef *pDeviceConfig); HAL_StatusTypeDef HAL_NAND_Read_ID(NAND_HandleTypeDef *hnand, NAND_IDTypeDef *pNAND_ID); @@ -289,7 +289,7 @@ uint32_t HAL_NAND_Read_Status(const NAND_HandleTypeDef *hnand); #define NAND_DEVICE2 0x80000000UL #else #define NAND_DEVICE 0x80000000UL -#endif /* NAND_SECOND_BANK */ +#endif /* FMC_Bank2_3 */ #define NAND_WRITE_TIMEOUT 0x01000000UL #define CMD_AREA (1UL<<16U) /* A16 = CLE high */ diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pccard.h b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pccard.h index 47fbb262ff..0be5de5175 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pccard.h +++ b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pccard.h @@ -72,7 +72,7 @@ typedef enum typedef struct __PCCARD_HandleTypeDef #else typedef struct -#endif /* USE_HAL_PCCARD_REGISTER_CALLBACKS */ +#endif /* USE_HAL_PCCARD_REGISTER_CALLBACKS */ { FMC_PCCARD_TypeDef *Instance; /*!< Register base address for PCCARD device */ @@ -86,7 +86,7 @@ typedef struct void (* MspInitCallback)(struct __PCCARD_HandleTypeDef *hpccard); /*!< PCCARD Msp Init callback */ void (* MspDeInitCallback)(struct __PCCARD_HandleTypeDef *hpccard); /*!< PCCARD Msp DeInit callback */ void (* ItCallback)(struct __PCCARD_HandleTypeDef *hpccard); /*!< PCCARD IT callback */ -#endif +#endif /* USE_HAL_PCCARD_REGISTER_CALLBACKS */ } PCCARD_HandleTypeDef; #if (USE_HAL_PCCARD_REGISTER_CALLBACKS == 1) @@ -104,7 +104,7 @@ typedef enum * @brief HAL PCCARD Callback pointer definition */ typedef void (*pPCCARD_CallbackTypeDef)(PCCARD_HandleTypeDef *hpccard); -#endif +#endif /* USE_HAL_PCCARD_REGISTER_CALLBACKS */ /** * @} */ @@ -126,7 +126,7 @@ typedef void (*pPCCARD_CallbackTypeDef)(PCCARD_HandleTypeDef *hpccard); } while(0) #else #define __HAL_PCCARD_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_PCCARD_STATE_RESET) -#endif +#endif /* USE_HAL_PCCARD_REGISTER_CALLBACKS */ /** * @} */ @@ -141,7 +141,8 @@ typedef void (*pPCCARD_CallbackTypeDef)(PCCARD_HandleTypeDef *hpccard); */ /* Initialization/de-initialization functions **********************************/ HAL_StatusTypeDef HAL_PCCARD_Init(PCCARD_HandleTypeDef *hpccard, FMC_NAND_PCC_TimingTypeDef *ComSpaceTiming, - FMC_NAND_PCC_TimingTypeDef *AttSpaceTiming, FMC_NAND_PCC_TimingTypeDef *IOSpaceTiming); + FMC_NAND_PCC_TimingTypeDef *AttSpaceTiming, + FMC_NAND_PCC_TimingTypeDef *IOSpaceTiming); HAL_StatusTypeDef HAL_PCCARD_DeInit(PCCARD_HandleTypeDef *hpccard); void HAL_PCCARD_MspInit(PCCARD_HandleTypeDef *hpccard); void HAL_PCCARD_MspDeInit(PCCARD_HandleTypeDef *hpccard); @@ -169,7 +170,7 @@ HAL_StatusTypeDef HAL_PCCARD_RegisterCallback(PCCARD_HandleTypeDef *hpccard, HA pPCCARD_CallbackTypeDef pCallback); HAL_StatusTypeDef HAL_PCCARD_UnRegisterCallback(PCCARD_HandleTypeDef *hpccard, HAL_PCCARD_CallbackIDTypeDef CallbackId); -#endif +#endif /* USE_HAL_PCCARD_REGISTER_CALLBACKS */ /** * @} */ diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h index cf01e51475..2e3909ada8 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h +++ b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h @@ -1242,8 +1242,8 @@ typedef struct */ /* Initialization and de-initialization functions ******************************/ HAL_StatusTypeDef HAL_RCC_DeInit(void); -HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct); -HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency); +HAL_StatusTypeDef HAL_RCC_OscConfig(const RCC_OscInitTypeDef *RCC_OscInitStruct); +HAL_StatusTypeDef HAL_RCC_ClockConfig(const RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency); /** * @} */ diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rtc.h b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rtc.h index 9d58161fe0..d787b4b948 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rtc.h +++ b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rtc.h @@ -791,7 +791,7 @@ HAL_RTCStateTypeDef HAL_RTC_GetState(RTC_HandleTypeDef *hrtc); #define RTC_TIMEOUT_VALUE 1000U -#define RTC_EXTI_LINE_ALARM_EVENT EXTI_IMR_MR17 /*!< External interrupt line 17 Connected to the RTC Alarm event */ +#define RTC_EXTI_LINE_ALARM_EVENT EXTI_IMR_MR17 /*!< External interrupt line 17 connected to the RTC Alarm event */ /** * @} */ diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rtc_ex.h b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rtc_ex.h index bee4e320bc..dbedc866dc 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rtc_ex.h +++ b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rtc_ex.h @@ -651,8 +651,9 @@ typedef struct * @param __FLAG__ specifies the RTC Tamper flag to be checked. * This parameter can be: * @arg RTC_FLAG_TAMP1F: Tamper 1 interrupt flag - * @arg RTC_FLAG_TAMP2F: Tamper 2 interrupt flag - * @note RTC_FLAG_TAMP2F is not applicable to all devices. + * @arg RTC_FLAG_TAMP2F: Tamper 2 interrupt flag (*) + * + * (*) value not applicable to all devices. * @retval None */ #define __HAL_RTC_TAMPER_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != 0U)? 1U : 0U) @@ -663,8 +664,9 @@ typedef struct * @param __FLAG__ specifies the RTC Tamper Flag to clear. * This parameter can be: * @arg RTC_FLAG_TAMP1F: Tamper 1 interrupt flag - * @arg RTC_FLAG_TAMP2F: Tamper 2 interrupt flag - * @note RTC_FLAG_TAMP2F is not applicable to all devices. + * @arg RTC_FLAG_TAMP2F: Tamper 2 interrupt flag (*) + * + * (*) value not applicable to all devices. * @retval None */ #define __HAL_RTC_TAMPER_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR) = (~((__FLAG__) | RTC_ISR_INIT)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT)) @@ -693,13 +695,13 @@ typedef struct * @brief Enable event on the RTC Tamper and Timestamp associated EXTI line. * @retval None. */ -#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_EVENT() (EXTI->EMR |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT) +#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_EVENT() (EXTI->EMR |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT) /** * @brief Disable event on the RTC Tamper and Timestamp associated EXTI line. * @retval None. */ -#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT) +#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT) /** * @brief Enable falling edge trigger on the RTC Tamper and Timestamp associated EXTI line. @@ -904,7 +906,7 @@ HAL_StatusTypeDef HAL_RTCEx_DisableBypassShadow(RTC_HandleTypeDef *hrtc); * @{ */ /* Extended RTC features functions *******************************************/ -void HAL_RTCEx_AlarmBEventCallback(RTC_HandleTypeDef *hrtc); +void HAL_RTCEx_AlarmBEventCallback(RTC_HandleTypeDef *hrtc); HAL_StatusTypeDef HAL_RTCEx_PollForAlarmBEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout); /** * @} diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h index 3d450a0387..856772dd0e 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h +++ b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h @@ -212,7 +212,7 @@ uint32_t HAL_SDRAM_GetModeStatus(SDRAM_HandleTypeDef *hsdram); * @{ */ /* SDRAM State functions ********************************************************/ -HAL_SDRAM_StateTypeDef HAL_SDRAM_GetState(SDRAM_HandleTypeDef *hsdram); +HAL_SDRAM_StateTypeDef HAL_SDRAM_GetState(const SDRAM_HandleTypeDef *hsdram); /** * @} */ diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h index 8563149481..84d1b51535 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h +++ b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h @@ -339,11 +339,12 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to * @retval None */ #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) -#define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) do{ \ - (__HANDLE__)->State = HAL_SPI_STATE_RESET; \ - (__HANDLE__)->MspInitCallback = NULL; \ - (__HANDLE__)->MspDeInitCallback = NULL; \ - } while(0) +#define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) \ + do{ \ + (__HANDLE__)->State = HAL_SPI_STATE_RESET; \ + (__HANDLE__)->MspInitCallback = NULL; \ + (__HANDLE__)->MspDeInitCallback = NULL; \ + } while(0) #else #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET) #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ @@ -444,7 +445,7 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to __IO uint32_t tmpreg_fre = 0x00U; \ tmpreg_fre = (__HANDLE__)->Instance->SR; \ UNUSED(tmpreg_fre); \ - }while(0U) + } while(0U) /** @brief Enable the SPI peripheral. * @param __HANDLE__ specifies the SPI Handle. @@ -488,8 +489,11 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. * @retval None */ -#define SPI_RESET_CRC(__HANDLE__) do{CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);\ - SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);}while(0U) +#define SPI_RESET_CRC(__HANDLE__) \ + do{ \ + CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN); \ + SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN); \ + } while(0U) /** @brief Check whether the specified SPI flag is set or not. * @param __SR__ copy of SPI SR register. @@ -505,7 +509,7 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to * @retval SET or RESET. */ #define SPI_CHECK_FLAG(__SR__, __FLAG__) ((((__SR__) & ((__FLAG__) & SPI_FLAG_MASK)) == \ - ((__FLAG__) & SPI_FLAG_MASK)) ? SET : RESET) + ((__FLAG__) & SPI_FLAG_MASK)) ? SET : RESET) /** @brief Check whether the specified SPI Interrupt is set or not. * @param __CR2__ copy of SPI CR2 register. @@ -517,7 +521,7 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to * @retval SET or RESET. */ #define SPI_CHECK_IT_SOURCE(__CR2__, __INTERRUPT__) ((((__CR2__) & (__INTERRUPT__)) == \ - (__INTERRUPT__)) ? SET : RESET) + (__INTERRUPT__)) ? SET : RESET) /** @brief Checks if SPI Mode parameter is in allowed range. * @param __MODE__ specifies the SPI Mode. @@ -627,7 +631,7 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to */ #define IS_SPI_CRC_POLYNOMIAL(__POLYNOMIAL__) (((__POLYNOMIAL__) >= 0x1U) && \ ((__POLYNOMIAL__) <= 0xFFFFU) && \ - (((__POLYNOMIAL__)&0x1U) != 0U)) + (((__POLYNOMIAL__)&0x1U) != 0U)) /** @brief Checks if DMA handle is valid. * @param __HANDLE__ specifies a DMA Handle. diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h index 1a8357cddb..53c9bf6687 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h +++ b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h @@ -1839,12 +1839,13 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->ChannelState[2] = (__CHANNEL_STATE__)) :\ ((__HANDLE__)->ChannelState[3] = (__CHANNEL_STATE__))) -#define TIM_CHANNEL_STATE_SET_ALL(__HANDLE__, __CHANNEL_STATE__) do { \ - (__HANDLE__)->ChannelState[0] = (__CHANNEL_STATE__); \ - (__HANDLE__)->ChannelState[1] = (__CHANNEL_STATE__); \ - (__HANDLE__)->ChannelState[2] = (__CHANNEL_STATE__); \ - (__HANDLE__)->ChannelState[3] = (__CHANNEL_STATE__); \ - } while(0) +#define TIM_CHANNEL_STATE_SET_ALL(__HANDLE__, __CHANNEL_STATE__)\ + do {\ + (__HANDLE__)->ChannelState[0] = (__CHANNEL_STATE__);\ + (__HANDLE__)->ChannelState[1] = (__CHANNEL_STATE__);\ + (__HANDLE__)->ChannelState[2] = (__CHANNEL_STATE__);\ + (__HANDLE__)->ChannelState[3] = (__CHANNEL_STATE__);\ + } while(0) #define TIM_CHANNEL_N_STATE_GET(__HANDLE__, __CHANNEL__)\ (((__CHANNEL__) == TIM_CHANNEL_1) ? (__HANDLE__)->ChannelNState[0] :\ @@ -1858,16 +1859,17 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->ChannelNState[2] = (__CHANNEL_STATE__)) :\ ((__HANDLE__)->ChannelNState[3] = (__CHANNEL_STATE__))) -#define TIM_CHANNEL_N_STATE_SET_ALL(__HANDLE__, __CHANNEL_STATE__) do { \ - (__HANDLE__)->ChannelNState[0] = \ - (__CHANNEL_STATE__); \ - (__HANDLE__)->ChannelNState[1] = \ - (__CHANNEL_STATE__); \ - (__HANDLE__)->ChannelNState[2] = \ - (__CHANNEL_STATE__); \ - (__HANDLE__)->ChannelNState[3] = \ - (__CHANNEL_STATE__); \ - } while(0) +#define TIM_CHANNEL_N_STATE_SET_ALL(__HANDLE__, __CHANNEL_STATE__)\ + do {\ + (__HANDLE__)->ChannelNState[0] = \ + (__CHANNEL_STATE__); \ + (__HANDLE__)->ChannelNState[1] = \ + (__CHANNEL_STATE__); \ + (__HANDLE__)->ChannelNState[2] = \ + (__CHANNEL_STATE__); \ + (__HANDLE__)->ChannelNState[3] = \ + (__CHANNEL_STATE__); \ + } while(0) /** * @} diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h index 561e9bbe87..4f1d01b07d 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h +++ b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h @@ -142,6 +142,7 @@ typedef struct #if defined(LPTIM_OR_TIM1_ITR2_RMP) && defined(LPTIM_OR_TIM5_ITR1_RMP) && defined(LPTIM_OR_TIM5_ITR1_RMP) #define IS_TIM_REMAP(INSTANCE, TIM_REMAP) \ ((((INSTANCE) == TIM2) && (((TIM_REMAP) == TIM_TIM2_TIM8_TRGO) || \ + ((TIM_REMAP) == TIM_TIM2_ETH_PTP) || \ ((TIM_REMAP) == TIM_TIM2_USBFS_SOF) || \ ((TIM_REMAP) == TIM_TIM2_USBHS_SOF))) || \ (((INSTANCE) == TIM5) && (((TIM_REMAP) == TIM_TIM5_GPIO) || \ @@ -159,6 +160,7 @@ typedef struct #elif defined(TIM8) #define IS_TIM_REMAP(INSTANCE, TIM_REMAP) \ ((((INSTANCE) == TIM2) && (((TIM_REMAP) == TIM_TIM2_TIM8_TRGO) || \ + ((TIM_REMAP) == TIM_TIM2_ETH_PTP) || \ ((TIM_REMAP) == TIM_TIM2_USBFS_SOF) || \ ((TIM_REMAP) == TIM_TIM2_USBHS_SOF))) || \ (((INSTANCE) == TIM5) && (((TIM_REMAP) == TIM_TIM5_GPIO) || \ diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_wwdg.h b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_wwdg.h index ab8b1ead41..6221e2e77f 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_wwdg.h +++ b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_wwdg.h @@ -183,7 +183,7 @@ typedef void (*pWWDG_CallbackTypeDef)(WWDG_HandleTypeDef *hppp); /*!< pointer t /** * @brief Enable the WWDG early wakeup interrupt. - * @param __HANDLE__ WWDG handle + * @param __HANDLE__ WWDG handle * @param __INTERRUPT__ specifies the interrupt to enable. * This parameter can be one of the following values: * @arg WWDG_IT_EWI: Early wakeup interrupt diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_dma.h b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_dma.h index 53e88138a7..a8e49a5118 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_dma.h +++ b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_dma.h @@ -1609,7 +1609,7 @@ __STATIC_INLINE uint32_t LL_DMA_GetM2MDstAddress(DMA_TypeDef* DMAx, uint32_t Str */ __STATIC_INLINE void LL_DMA_SetMemory1Address(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Address) { - MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->M1AR, DMA_SxM1AR_M1A, Address); + WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->M1AR, Address); } /** diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_dma2d.h b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_dma2d.h index 64c57b0ee4..9715c87b20 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_dma2d.h +++ b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_dma2d.h @@ -496,7 +496,7 @@ __STATIC_INLINE void LL_DMA2D_Start(DMA2D_TypeDef *DMA2Dx) * @param DMA2Dx DMA2D Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMA2D_IsTransferOngoing(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_IsTransferOngoing(const DMA2D_TypeDef *DMA2Dx) { return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_START) == (DMA2D_CR_START)) ? 1UL : 0UL); } @@ -533,7 +533,7 @@ __STATIC_INLINE void LL_DMA2D_Resume(DMA2D_TypeDef *DMA2Dx) * @param DMA2Dx DMA2D Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMA2D_IsSuspended(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_IsSuspended(const DMA2D_TypeDef *DMA2Dx) { return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_SUSP) == (DMA2D_CR_SUSP)) ? 1UL : 0UL); } @@ -558,7 +558,7 @@ __STATIC_INLINE void LL_DMA2D_Abort(DMA2D_TypeDef *DMA2Dx) * @param DMA2Dx DMA2D Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMA2D_IsAborted(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_IsAborted(const DMA2D_TypeDef *DMA2Dx) { return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_ABORT) == (DMA2D_CR_ABORT)) ? 1UL : 0UL); } @@ -589,7 +589,7 @@ __STATIC_INLINE void LL_DMA2D_SetMode(DMA2D_TypeDef *DMA2Dx, uint32_t Mode) * @arg @ref LL_DMA2D_MODE_M2M_BLEND * @arg @ref LL_DMA2D_MODE_R2M */ -__STATIC_INLINE uint32_t LL_DMA2D_GetMode(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_GetMode(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->CR, DMA2D_CR_MODE)); } @@ -622,7 +622,7 @@ __STATIC_INLINE void LL_DMA2D_SetOutputColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444 */ -__STATIC_INLINE uint32_t LL_DMA2D_GetOutputColorMode(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_GetOutputColorMode(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM)); } @@ -648,7 +648,7 @@ __STATIC_INLINE void LL_DMA2D_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t Line * @param DMA2Dx DMA2D Instance * @retval Line offset value between Min_Data=0 and Max_Data=0x3FFF */ -__STATIC_INLINE uint32_t LL_DMA2D_GetLineOffset(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_GetLineOffset(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->OOR, DMA2D_OOR_LO)); } @@ -671,7 +671,7 @@ __STATIC_INLINE void LL_DMA2D_SetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx, uint * @param DMA2Dx DMA2D Instance * @retval Number of pixels per lines value between Min_Data=0 and Max_Data=0x3FFF */ -__STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfPixelsPerLines(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_PL) >> DMA2D_NLR_PL_Pos); } @@ -694,7 +694,7 @@ __STATIC_INLINE void LL_DMA2D_SetNbrOfLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrO * @param DMA2Dx DMA2D Instance * @retval Number of lines value between Min_Data=0 and Max_Data=0xFFFF */ -__STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfLines(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfLines(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_NL)); } @@ -717,7 +717,7 @@ __STATIC_INLINE void LL_DMA2D_SetOutputMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t O * @param DMA2Dx DMA2D Instance * @retval Output memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF */ -__STATIC_INLINE uint32_t LL_DMA2D_GetOutputMemAddr(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_GetOutputMemAddr(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, OMAR)); } @@ -738,8 +738,7 @@ __STATIC_INLINE uint32_t LL_DMA2D_GetOutputMemAddr(DMA2D_TypeDef *DMA2Dx) */ __STATIC_INLINE void LL_DMA2D_SetOutputColor(DMA2D_TypeDef *DMA2Dx, uint32_t OutputColor) { - MODIFY_REG(DMA2Dx->OCOLR, (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1), \ - OutputColor); + WRITE_REG(DMA2Dx->OCOLR, OutputColor); } /** @@ -754,7 +753,7 @@ __STATIC_INLINE void LL_DMA2D_SetOutputColor(DMA2D_TypeDef *DMA2Dx, uint32_t Out * @param DMA2Dx DMA2D Instance * @retval Output color value between Min_Data=0 and Max_Data=0xFFFFFFFF */ -__STATIC_INLINE uint32_t LL_DMA2D_GetOutputColor(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_GetOutputColor(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->OCOLR, \ (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1))); @@ -778,7 +777,7 @@ __STATIC_INLINE void LL_DMA2D_SetLineWatermark(DMA2D_TypeDef *DMA2Dx, uint32_t L * @param DMA2Dx DMA2D Instance * @retval Line watermark value between Min_Data=0 and Max_Data=0xFFFF */ -__STATIC_INLINE uint32_t LL_DMA2D_GetLineWatermark(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_GetLineWatermark(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->LWR, DMA2D_LWR_LW)); } @@ -801,7 +800,7 @@ __STATIC_INLINE void LL_DMA2D_SetDeadTime(DMA2D_TypeDef *DMA2Dx, uint32_t DeadTi * @param DMA2Dx DMA2D Instance * @retval Dead time value between Min_Data=0 and Max_Data=0xFF */ -__STATIC_INLINE uint32_t LL_DMA2D_GetDeadTime(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_GetDeadTime(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_DT) >> DMA2D_AMTCR_DT_Pos); } @@ -834,7 +833,7 @@ __STATIC_INLINE void LL_DMA2D_DisableDeadTime(DMA2D_TypeDef *DMA2Dx) * @param DMA2Dx DMA2D Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledDeadTime(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledDeadTime(const DMA2D_TypeDef *DMA2Dx) { return ((READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN) == (DMA2D_AMTCR_EN)) ? 1UL : 0UL); } @@ -861,7 +860,7 @@ __STATIC_INLINE void LL_DMA2D_FGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t Me * @param DMA2Dx DMA2D Instance * @retval Foreground memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF */ -__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetMemAddr(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGMAR)); } @@ -883,7 +882,7 @@ __STATIC_INLINE void LL_DMA2D_FGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx) * @param DMA2Dx DMA2D Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMA2D_FGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_FGND_IsEnabledCLUTLoad(const DMA2D_TypeDef *DMA2Dx) { return ((READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START) == (DMA2D_FGPFCCR_START)) ? 1UL : 0UL); } @@ -928,7 +927,7 @@ __STATIC_INLINE void LL_DMA2D_FGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t * @arg @ref LL_DMA2D_INPUT_MODE_A8 * @arg @ref LL_DMA2D_INPUT_MODE_A4 */ -__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetColorMode(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetColorMode(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM)); } @@ -957,7 +956,7 @@ __STATIC_INLINE void LL_DMA2D_FGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE */ -__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlphaMode(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM)); } @@ -980,7 +979,7 @@ __STATIC_INLINE void LL_DMA2D_FGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alph * @param DMA2Dx DMA2D Instance * @retval Alpha value between Min_Data=0 and Max_Data=0xFF */ -__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlpha(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlpha(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA) >> DMA2D_FGPFCCR_ALPHA_Pos); } @@ -1004,7 +1003,7 @@ __STATIC_INLINE void LL_DMA2D_FGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t * @param DMA2Dx DMA2D Instance * @retval Foreground line offset value between Min_Data=0 and Max_Data=0x3FF */ -__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetLineOffset(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->FGOR, DMA2D_FGOR_LO)); } @@ -1044,7 +1043,7 @@ __STATIC_INLINE void LL_DMA2D_FGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t R * @param DMA2Dx DMA2D Instance * @retval Red color value between Min_Data=0 and Max_Data=0xFF */ -__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetRedColor(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetRedColor(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED) >> DMA2D_FGCOLR_RED_Pos); } @@ -1067,7 +1066,7 @@ __STATIC_INLINE void LL_DMA2D_FGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t * @param DMA2Dx DMA2D Instance * @retval Green color value between Min_Data=0 and Max_Data=0xFF */ -__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetGreenColor(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN) >> DMA2D_FGCOLR_GREEN_Pos); } @@ -1090,7 +1089,7 @@ __STATIC_INLINE void LL_DMA2D_FGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t * @param DMA2Dx DMA2D Instance * @retval Blue color value between Min_Data=0 and Max_Data=0xFF */ -__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetBlueColor(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE)); } @@ -1113,7 +1112,7 @@ __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_ * @param DMA2Dx DMA2D Instance * @retval Foreground CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF */ -__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTMemAddr(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGCMAR)); } @@ -1136,7 +1135,7 @@ __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t C * @param DMA2Dx DMA2D Instance * @retval Foreground CLUT size value between Min_Data=0 and Max_Data=0xFF */ -__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTSize(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS) >> DMA2D_FGPFCCR_CS_Pos); } @@ -1163,7 +1162,7 @@ __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint3 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888 */ -__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTColorMode(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM)); } @@ -1194,7 +1193,7 @@ __STATIC_INLINE void LL_DMA2D_BGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t Me * @param DMA2Dx DMA2D Instance * @retval Background memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF */ -__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetMemAddr(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGMAR)); } @@ -1216,7 +1215,7 @@ __STATIC_INLINE void LL_DMA2D_BGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx) * @param DMA2Dx DMA2D Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMA2D_BGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_BGND_IsEnabledCLUTLoad(const DMA2D_TypeDef *DMA2Dx) { return ((READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START) == (DMA2D_BGPFCCR_START)) ? 1UL : 0UL); } @@ -1261,7 +1260,7 @@ __STATIC_INLINE void LL_DMA2D_BGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t * @arg @ref LL_DMA2D_INPUT_MODE_A8 * @arg @ref LL_DMA2D_INPUT_MODE_A4 */ -__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetColorMode(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetColorMode(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM)); } @@ -1290,7 +1289,7 @@ __STATIC_INLINE void LL_DMA2D_BGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE */ -__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlphaMode(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM)); } @@ -1313,7 +1312,7 @@ __STATIC_INLINE void LL_DMA2D_BGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alph * @param DMA2Dx DMA2D Instance * @retval Alpha value between Min_Data=0 and Max_Data=0xFF */ -__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlpha(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlpha(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA) >> DMA2D_BGPFCCR_ALPHA_Pos); } @@ -1337,7 +1336,7 @@ __STATIC_INLINE void LL_DMA2D_BGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t * @param DMA2Dx DMA2D Instance * @retval Background line offset value between Min_Data=0 and Max_Data=0x3FF */ -__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetLineOffset(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->BGOR, DMA2D_BGOR_LO)); } @@ -1377,7 +1376,7 @@ __STATIC_INLINE void LL_DMA2D_BGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t R * @param DMA2Dx DMA2D Instance * @retval Red color value between Min_Data=0 and Max_Data=0xFF */ -__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetRedColor(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetRedColor(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED) >> DMA2D_BGCOLR_RED_Pos); } @@ -1400,7 +1399,7 @@ __STATIC_INLINE void LL_DMA2D_BGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t * @param DMA2Dx DMA2D Instance * @retval Green color value between Min_Data=0 and Max_Data=0xFF */ -__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetGreenColor(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN) >> DMA2D_BGCOLR_GREEN_Pos); } @@ -1423,7 +1422,7 @@ __STATIC_INLINE void LL_DMA2D_BGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t * @param DMA2Dx DMA2D Instance * @retval Blue color value between Min_Data=0 and Max_Data=0xFF */ -__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetBlueColor(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE)); } @@ -1446,7 +1445,7 @@ __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_ * @param DMA2Dx DMA2D Instance * @retval Background CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF */ -__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTMemAddr(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGCMAR)); } @@ -1469,7 +1468,7 @@ __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t C * @param DMA2Dx DMA2D Instance * @retval Background CLUT size value between Min_Data=0 and Max_Data=0xFF */ -__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTSize(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS) >> DMA2D_BGPFCCR_CS_Pos); } @@ -1496,7 +1495,7 @@ __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint3 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888 */ -__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTColorMode(const DMA2D_TypeDef *DMA2Dx) { return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM)); } @@ -1520,7 +1519,7 @@ __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx) * @param DMA2Dx DMA2D Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CE(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CE(const DMA2D_TypeDef *DMA2Dx) { return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CEIF) == (DMA2D_ISR_CEIF)) ? 1UL : 0UL); } @@ -1531,7 +1530,7 @@ __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CE(DMA2D_TypeDef *DMA2Dx) * @param DMA2Dx DMA2D Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CTC(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CTC(const DMA2D_TypeDef *DMA2Dx) { return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CTCIF) == (DMA2D_ISR_CTCIF)) ? 1UL : 0UL); } @@ -1542,7 +1541,7 @@ __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CTC(DMA2D_TypeDef *DMA2Dx) * @param DMA2Dx DMA2D Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CAE(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CAE(const DMA2D_TypeDef *DMA2Dx) { return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CAEIF) == (DMA2D_ISR_CAEIF)) ? 1UL : 0UL); } @@ -1553,7 +1552,7 @@ __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CAE(DMA2D_TypeDef *DMA2Dx) * @param DMA2Dx DMA2D Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TW(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TW(const DMA2D_TypeDef *DMA2Dx) { return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TWIF) == (DMA2D_ISR_TWIF)) ? 1UL : 0UL); } @@ -1564,7 +1563,7 @@ __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TW(DMA2D_TypeDef *DMA2Dx) * @param DMA2Dx DMA2D Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TC(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TC(const DMA2D_TypeDef *DMA2Dx) { return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TCIF) == (DMA2D_ISR_TCIF)) ? 1UL : 0UL); } @@ -1575,7 +1574,7 @@ __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TC(DMA2D_TypeDef *DMA2Dx) * @param DMA2Dx DMA2D Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TE(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TE(const DMA2D_TypeDef *DMA2Dx) { return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TEIF) == (DMA2D_ISR_TEIF)) ? 1UL : 0UL); } @@ -1792,7 +1791,7 @@ __STATIC_INLINE void LL_DMA2D_DisableIT_TE(DMA2D_TypeDef *DMA2Dx) * @param DMA2Dx DMA2D Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CE(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CE(const DMA2D_TypeDef *DMA2Dx) { return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CEIE) == (DMA2D_CR_CEIE)) ? 1UL : 0UL); } @@ -1803,7 +1802,7 @@ __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CE(DMA2D_TypeDef *DMA2Dx) * @param DMA2Dx DMA2D Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CTC(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CTC(const DMA2D_TypeDef *DMA2Dx) { return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE) == (DMA2D_CR_CTCIE)) ? 1UL : 0UL); } @@ -1814,7 +1813,7 @@ __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CTC(DMA2D_TypeDef *DMA2Dx) * @param DMA2Dx DMA2D Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CAE(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CAE(const DMA2D_TypeDef *DMA2Dx) { return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE) == (DMA2D_CR_CAEIE)) ? 1UL : 0UL); } @@ -1825,7 +1824,7 @@ __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CAE(DMA2D_TypeDef *DMA2Dx) * @param DMA2Dx DMA2D Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TW(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TW(const DMA2D_TypeDef *DMA2Dx) { return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TWIE) == (DMA2D_CR_TWIE)) ? 1UL : 0UL); } @@ -1836,7 +1835,7 @@ __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TW(DMA2D_TypeDef *DMA2Dx) * @param DMA2Dx DMA2D Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TC(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TC(const DMA2D_TypeDef *DMA2Dx) { return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TCIE) == (DMA2D_CR_TCIE)) ? 1UL : 0UL); } @@ -1847,7 +1846,7 @@ __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TC(DMA2D_TypeDef *DMA2Dx) * @param DMA2Dx DMA2D Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TE(DMA2D_TypeDef *DMA2Dx) +__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TE(const DMA2D_TypeDef *DMA2Dx) { return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TEIE) == (DMA2D_CR_TEIE)) ? 1UL : 0UL); } @@ -1863,16 +1862,16 @@ __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TE(DMA2D_TypeDef *DMA2Dx) * @{ */ -ErrorStatus LL_DMA2D_DeInit(DMA2D_TypeDef *DMA2Dx); +ErrorStatus LL_DMA2D_DeInit(const DMA2D_TypeDef *DMA2Dx); ErrorStatus LL_DMA2D_Init(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_InitTypeDef *DMA2D_InitStruct); void LL_DMA2D_StructInit(LL_DMA2D_InitTypeDef *DMA2D_InitStruct); void LL_DMA2D_ConfigLayer(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg, uint32_t LayerIdx); void LL_DMA2D_LayerCfgStructInit(LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg); void LL_DMA2D_ConfigOutputColor(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_ColorTypeDef *DMA2D_ColorStruct); -uint32_t LL_DMA2D_GetOutputBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode); -uint32_t LL_DMA2D_GetOutputGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode); -uint32_t LL_DMA2D_GetOutputRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode); -uint32_t LL_DMA2D_GetOutputAlphaColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode); +uint32_t LL_DMA2D_GetOutputBlueColor(const DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode); +uint32_t LL_DMA2D_GetOutputGreenColor(const DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode); +uint32_t LL_DMA2D_GetOutputRedColor(const DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode); +uint32_t LL_DMA2D_GetOutputAlphaColor(const DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode); void LL_DMA2D_ConfigSize(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines, uint32_t NbrOfPixelsPerLines); /** diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h index dda9d895a4..1085d81173 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h +++ b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h @@ -70,7 +70,7 @@ extern "C" { #define IS_FMC_WAIT_POLARITY(__POLARITY__) (((__POLARITY__) == FMC_WAIT_SIGNAL_POLARITY_LOW) || \ ((__POLARITY__) == FMC_WAIT_SIGNAL_POLARITY_HIGH)) #define IS_FMC_WRAP_MODE(__MODE__) (((__MODE__) == FMC_WRAP_MODE_DISABLE) || \ - ((__MODE__) == FMC_WRAP_MODE_ENABLE)) + ((__MODE__) == FMC_WRAP_MODE_ENABLE)) #define IS_FMC_WAIT_SIGNAL_ACTIVE(__ACTIVE__) (((__ACTIVE__) == FMC_WAIT_TIMING_BEFORE_WS) || \ ((__ACTIVE__) == FMC_WAIT_TIMING_DURING_WS)) #define IS_FMC_WRITE_OPERATION(__OPERATION__) (((__OPERATION__) == FMC_WRITE_OPERATION_DISABLE) || \ @@ -100,14 +100,14 @@ extern "C" { #if defined(FMC_Bank2_3) #define IS_FMC_NAND_BANK(__BANK__) (((__BANK__) == FMC_NAND_BANK2) || \ - ((__BANK__) == FMC_NAND_BANK3)) + ((__BANK__) == FMC_NAND_BANK3)) #else #define IS_FMC_NAND_BANK(__BANK__) ((__BANK__) == FMC_NAND_BANK3) #endif /* FMC_Bank2_3 */ #define IS_FMC_WAIT_FEATURE(__FEATURE__) (((__FEATURE__) == FMC_NAND_PCC_WAIT_FEATURE_DISABLE) || \ - ((__FEATURE__) == FMC_NAND_PCC_WAIT_FEATURE_ENABLE)) + ((__FEATURE__) == FMC_NAND_PCC_WAIT_FEATURE_ENABLE)) #define IS_FMC_NAND_MEMORY_WIDTH(__WIDTH__) (((__WIDTH__) == FMC_NAND_PCC_MEM_BUS_WIDTH_8) || \ - ((__WIDTH__) == FMC_NAND_PCC_MEM_BUS_WIDTH_16)) + ((__WIDTH__) == FMC_NAND_PCC_MEM_BUS_WIDTH_16)) #define IS_FMC_ECC_STATE(__STATE__) (((__STATE__) == FMC_NAND_ECC_DISABLE) || \ ((__STATE__) == FMC_NAND_ECC_ENABLE)) @@ -232,67 +232,68 @@ extern "C" { typedef struct { uint32_t NSBank; /*!< Specifies the NORSRAM memory device that will be used. - This parameter can be a value of @ref FMC_NORSRAM_Bank */ + This parameter can be a value of @ref FMC_NORSRAM_Bank */ uint32_t DataAddressMux; /*!< Specifies whether the address and data values are multiplexed on the data bus or not. - This parameter can be a value of @ref FMC_Data_Address_Bus_Multiplexing */ + This parameter can be a value of @ref FMC_Data_Address_Bus_Multiplexing*/ uint32_t MemoryType; /*!< Specifies the type of external memory attached to the corresponding memory device. - This parameter can be a value of @ref FMC_Memory_Type */ + This parameter can be a value of @ref FMC_Memory_Type */ uint32_t MemoryDataWidth; /*!< Specifies the external memory device width. - This parameter can be a value of @ref FMC_NORSRAM_Data_Width */ + This parameter can be a value of @ref FMC_NORSRAM_Data_Width */ uint32_t BurstAccessMode; /*!< Enables or disables the burst access mode for Flash memory, valid only with synchronous burst Flash memories. - This parameter can be a value of @ref FMC_Burst_Access_Mode */ + This parameter can be a value of @ref FMC_Burst_Access_Mode */ uint32_t WaitSignalPolarity; /*!< Specifies the wait signal polarity, valid only when accessing the Flash memory in burst mode. - This parameter can be a value of @ref FMC_Wait_Signal_Polarity */ + This parameter can be a value of @ref FMC_Wait_Signal_Polarity */ uint32_t WrapMode; /*!< Enables or disables the Wrapped burst access mode for Flash memory, valid only when accessing Flash memories in burst mode. This parameter can be a value of @ref FMC_Wrap_Mode - This mode is not available for the STM32F446/467/479xx devices */ + This mode is not available for the STM32F446/467/479xx devices */ uint32_t WaitSignalActive; /*!< Specifies if the wait signal is asserted by the memory one clock cycle before the wait state or during the wait state, valid only when accessing memories in burst mode. - This parameter can be a value of @ref FMC_Wait_Timing */ + This parameter can be a value of @ref FMC_Wait_Timing */ - uint32_t WriteOperation; /*!< Enables or disables the write operation in the selected device by the FMC. - This parameter can be a value of @ref FMC_Write_Operation */ + uint32_t WriteOperation; /*!< Enables or disables the write operation in the selected device + by the FMC. + This parameter can be a value of @ref FMC_Write_Operation */ uint32_t WaitSignal; /*!< Enables or disables the wait state insertion via wait signal, valid for Flash memory access in burst mode. - This parameter can be a value of @ref FMC_Wait_Signal */ + This parameter can be a value of @ref FMC_Wait_Signal */ uint32_t ExtendedMode; /*!< Enables or disables the extended mode. - This parameter can be a value of @ref FMC_Extended_Mode */ + This parameter can be a value of @ref FMC_Extended_Mode */ uint32_t AsynchronousWait; /*!< Enables or disables wait signal during asynchronous transfers, valid only with asynchronous Flash memories. - This parameter can be a value of @ref FMC_AsynchronousWait */ + This parameter can be a value of @ref FMC_AsynchronousWait */ uint32_t WriteBurst; /*!< Enables or disables the write burst operation. - This parameter can be a value of @ref FMC_Write_Burst */ + This parameter can be a value of @ref FMC_Write_Burst */ uint32_t ContinuousClock; /*!< Enables or disables the FMC clock output to external memory devices. This parameter is only enabled through the FMC_BCR1 register, and don't care through FMC_BCR2..4 registers. - This parameter can be a value of @ref FMC_Continous_Clock */ + This parameter can be a value of @ref FMC_Continous_Clock */ uint32_t WriteFifo; /*!< Enables or disables the write FIFO used by the FMC controller. This parameter is only enabled through the FMC_BCR1 register, and don't care through FMC_BCR2..4 registers. This parameter can be a value of @ref FMC_Write_FIFO - This mode is available only for the STM32F446/469/479xx devices */ + This mode is available only for the STM32F446/469/479xx devices */ uint32_t PageSize; /*!< Specifies the memory page size. - This parameter can be a value of @ref FMC_Page_Size */ + This parameter can be a value of @ref FMC_Page_Size */ } FMC_NORSRAM_InitTypeDef; /** @@ -336,7 +337,7 @@ typedef struct in NOR Flash memories with synchronous burst mode enable */ uint32_t AccessMode; /*!< Specifies the asynchronous access mode. - This parameter can be a value of @ref FMC_Access_Mode */ + This parameter can be a value of @ref FMC_Access_Mode */ } FMC_NORSRAM_TimingTypeDef; #endif /* FMC_Bank1 */ @@ -420,7 +421,7 @@ typedef struct uint32_t TARSetupTime; /*!< Defines the number of HCLK cycles to configure the delay between ALE low and RE low. This parameter can be a number between Min_Data = 0 and Max_Data = 255 */ -}FMC_PCCARD_InitTypeDef; +} FMC_PCCARD_InitTypeDef; #endif /* FMC_Bank4 */ #if defined(FMC_Bank5_6) @@ -719,7 +720,7 @@ typedef struct */ #if defined(FMC_Bank2_3) #define FMC_NAND_BANK2 (0x00000010U) -#endif +#endif /* FMC_Bank2_3 */ #define FMC_NAND_BANK3 (0x00000100U) /** * @} @@ -1012,8 +1013,9 @@ typedef struct #if defined (FMC_PCR_PBKEN) #define __FMC_NAND_ENABLE(__INSTANCE__) ((__INSTANCE__)->PCR |= FMC_PCR_PBKEN) #else -#define __FMC_NAND_ENABLE(__INSTANCE__, __BANK__) (((__BANK__) == FMC_NAND_BANK2)? ((__INSTANCE__)->PCR2 |= FMC_PCR2_PBKEN): \ - ((__INSTANCE__)->PCR3 |= FMC_PCR3_PBKEN)) +#define __FMC_NAND_ENABLE(__INSTANCE__, __BANK__) (((__BANK__) == FMC_NAND_BANK2) ? \ + ((__INSTANCE__)->PCR2 |= FMC_PCR2_PBKEN) : \ + ((__INSTANCE__)->PCR3 |= FMC_PCR3_PBKEN)) #endif /* FMC_PCR_PBKEN */ #else #define __FMC_NAND_ENABLE(__INSTANCE__) ((__INSTANCE__)->PCR |= FMC_PCR_PBKEN) @@ -1029,8 +1031,9 @@ typedef struct #if defined (FMC_PCR_PBKEN) #define __FMC_NAND_DISABLE(__INSTANCE__, __BANK__) CLEAR_BIT((__INSTANCE__)->PCR, FMC_PCR_PBKEN) #else -#define __FMC_NAND_DISABLE(__INSTANCE__, __BANK__) (((__BANK__) == FMC_NAND_BANK2)? CLEAR_BIT((__INSTANCE__)->PCR2, FMC_PCR2_PBKEN): \ - CLEAR_BIT((__INSTANCE__)->PCR3, FMC_PCR3_PBKEN)) +#define __FMC_NAND_DISABLE(__INSTANCE__, __BANK__) (((__BANK__) == FMC_NAND_BANK2) ? \ + CLEAR_BIT((__INSTANCE__)->PCR2, FMC_PCR2_PBKEN) : \ + CLEAR_BIT((__INSTANCE__)->PCR3, FMC_PCR3_PBKEN)) #endif /* FMC_PCR_PBKEN */ #else #define __FMC_NAND_DISABLE(__INSTANCE__, __BANK__) CLEAR_BIT((__INSTANCE__)->PCR, FMC_PCR_PBKEN) @@ -1063,7 +1066,7 @@ typedef struct * @} */ -#endif +#endif /* FMC_Bank4 */ #if defined(FMC_Bank3) || defined(FMC_Bank2_3) /** @defgroup FMC_LL_NAND_Interrupt FMC NAND Interrupt * @brief macros to handle NAND interrupts @@ -1082,8 +1085,9 @@ typedef struct * @retval None */ #if defined(FMC_Bank2_3) -#define __FMC_NAND_ENABLE_IT(__INSTANCE__, __BANK__, __INTERRUPT__) (((__BANK__) == FMC_NAND_BANK2)? ((__INSTANCE__)->SR2 |= (__INTERRUPT__)): \ - ((__INSTANCE__)->SR3 |= (__INTERRUPT__))) +#define __FMC_NAND_ENABLE_IT(__INSTANCE__, __BANK__, __INTERRUPT__) (((__BANK__) == FMC_NAND_BANK2) ? \ + ((__INSTANCE__)->SR2 |= (__INTERRUPT__)) : \ + ((__INSTANCE__)->SR3 |= (__INTERRUPT__))) #else #define __FMC_NAND_ENABLE_IT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->SR |= (__INTERRUPT__)) #endif /* FMC_Bank2_3 */ @@ -1100,8 +1104,9 @@ typedef struct * @retval None */ #if defined(FMC_Bank2_3) -#define __FMC_NAND_DISABLE_IT(__INSTANCE__, __BANK__, __INTERRUPT__) (((__BANK__) == FMC_NAND_BANK2)? ((__INSTANCE__)->SR2 &= ~(__INTERRUPT__)): \ - ((__INSTANCE__)->SR3 &= ~(__INTERRUPT__))) +#define __FMC_NAND_DISABLE_IT(__INSTANCE__, __BANK__, __INTERRUPT__) (((__BANK__) == FMC_NAND_BANK2) ? \ + ((__INSTANCE__)->SR2 &= ~(__INTERRUPT__)) : \ + ((__INSTANCE__)->SR3 &= ~(__INTERRUPT__))) #else #define __FMC_NAND_DISABLE_IT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->SR &= ~(__INTERRUPT__)) #endif /* FMC_Bank2_3 */ @@ -1119,8 +1124,9 @@ typedef struct * @retval The state of FLAG (SET or RESET). */ #if defined(FMC_Bank2_3) -#define __FMC_NAND_GET_FLAG(__INSTANCE__, __BANK__, __FLAG__) (((__BANK__) == FMC_NAND_BANK2)? (((__INSTANCE__)->SR2 &(__FLAG__)) == (__FLAG__)): \ - (((__INSTANCE__)->SR3 &(__FLAG__)) == (__FLAG__))) +#define __FMC_NAND_GET_FLAG(__INSTANCE__, __BANK__, __FLAG__) (((__BANK__) == FMC_NAND_BANK2) ? \ + (((__INSTANCE__)->SR2 &(__FLAG__)) == (__FLAG__)) : \ + (((__INSTANCE__)->SR3 &(__FLAG__)) == (__FLAG__))) #else #define __FMC_NAND_GET_FLAG(__INSTANCE__, __BANK__, __FLAG__) (((__INSTANCE__)->SR &(__FLAG__)) == (__FLAG__)) #endif /* FMC_Bank2_3 */ @@ -1138,8 +1144,9 @@ typedef struct * @retval None */ #if defined(FMC_Bank2_3) -#define __FMC_NAND_CLEAR_FLAG(__INSTANCE__, __BANK__, __FLAG__) (((__BANK__) == FMC_NAND_BANK2)? ((__INSTANCE__)->SR2 &= ~(__FLAG__)): \ - ((__INSTANCE__)->SR3 &= ~(__FLAG__))) +#define __FMC_NAND_CLEAR_FLAG(__INSTANCE__, __BANK__, __FLAG__) (((__BANK__) == FMC_NAND_BANK2) ? \ + ((__INSTANCE__)->SR2 &= ~(__FLAG__)) : \ + ((__INSTANCE__)->SR3 &= ~(__FLAG__))) #else #define __FMC_NAND_CLEAR_FLAG(__INSTANCE__, __FLAG__) ((__INSTANCE__)->SR &= ~(__FLAG__)) #endif /* FMC_Bank2_3 */ @@ -1208,7 +1215,7 @@ typedef struct /** * @} */ -#endif +#endif /* FMC_Bank4 */ #if defined(FMC_Bank5_6) /** @defgroup FMC_LL_SDRAM_Interrupt FMC SDRAM Interrupt @@ -1283,11 +1290,11 @@ typedef struct * @{ */ HAL_StatusTypeDef FMC_NORSRAM_Init(FMC_NORSRAM_TypeDef *Device, - FMC_NORSRAM_InitTypeDef *Init); + const FMC_NORSRAM_InitTypeDef *Init); HAL_StatusTypeDef FMC_NORSRAM_Timing_Init(FMC_NORSRAM_TypeDef *Device, - FMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank); + const FMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank); HAL_StatusTypeDef FMC_NORSRAM_Extended_Timing_Init(FMC_NORSRAM_EXTENDED_TypeDef *Device, - FMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank, + const FMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank, uint32_t ExtendedMode); HAL_StatusTypeDef FMC_NORSRAM_DeInit(FMC_NORSRAM_TypeDef *Device, FMC_NORSRAM_EXTENDED_TypeDef *ExDevice, uint32_t Bank); @@ -1315,11 +1322,11 @@ HAL_StatusTypeDef FMC_NORSRAM_WriteOperation_Disable(FMC_NORSRAM_TypeDef *Devic /** @defgroup FMC_LL_NAND_Private_Functions_Group1 NAND Initialization/de-initialization functions * @{ */ -HAL_StatusTypeDef FMC_NAND_Init(FMC_NAND_TypeDef *Device, FMC_NAND_InitTypeDef *Init); +HAL_StatusTypeDef FMC_NAND_Init(FMC_NAND_TypeDef *Device, const FMC_NAND_InitTypeDef *Init); HAL_StatusTypeDef FMC_NAND_CommonSpace_Timing_Init(FMC_NAND_TypeDef *Device, - FMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank); + const FMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank); HAL_StatusTypeDef FMC_NAND_AttributeSpace_Timing_Init(FMC_NAND_TypeDef *Device, - FMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank); + const FMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank); HAL_StatusTypeDef FMC_NAND_DeInit(FMC_NAND_TypeDef *Device, uint32_t Bank); /** * @} @@ -1330,7 +1337,7 @@ HAL_StatusTypeDef FMC_NAND_DeInit(FMC_NAND_TypeDef *Device, uint32_t Bank); */ HAL_StatusTypeDef FMC_NAND_ECC_Enable(FMC_NAND_TypeDef *Device, uint32_t Bank); HAL_StatusTypeDef FMC_NAND_ECC_Disable(FMC_NAND_TypeDef *Device, uint32_t Bank); -HAL_StatusTypeDef FMC_NAND_GetECC(FMC_NAND_TypeDef *Device, uint32_t *ECCval, uint32_t Bank, +HAL_StatusTypeDef FMC_NAND_GetECC(const FMC_NAND_TypeDef *Device, uint32_t *ECCval, uint32_t Bank, uint32_t Timeout); /** * @} @@ -1347,13 +1354,13 @@ HAL_StatusTypeDef FMC_NAND_GetECC(FMC_NAND_TypeDef *Device, uint32_t *ECCval, u /** @defgroup FMC_LL_PCCARD_Private_Functions_Group1 PCCARD Initialization/de-initialization functions * @{ */ -HAL_StatusTypeDef FMC_PCCARD_Init(FMC_PCCARD_TypeDef *Device, FMC_PCCARD_InitTypeDef *Init); +HAL_StatusTypeDef FMC_PCCARD_Init(FMC_PCCARD_TypeDef *Device, const FMC_PCCARD_InitTypeDef *Init); HAL_StatusTypeDef FMC_PCCARD_CommonSpace_Timing_Init(FMC_PCCARD_TypeDef *Device, - FMC_NAND_PCC_TimingTypeDef *Timing); + const FMC_NAND_PCC_TimingTypeDef *Timing); HAL_StatusTypeDef FMC_PCCARD_AttributeSpace_Timing_Init(FMC_PCCARD_TypeDef *Device, - FMC_NAND_PCC_TimingTypeDef *Timing); + const FMC_NAND_PCC_TimingTypeDef *Timing); HAL_StatusTypeDef FMC_PCCARD_IOSpace_Timing_Init(FMC_PCCARD_TypeDef *Device, - FMC_NAND_PCC_TimingTypeDef *Timing); + const FMC_NAND_PCC_TimingTypeDef *Timing); HAL_StatusTypeDef FMC_PCCARD_DeInit(FMC_PCCARD_TypeDef *Device); /** * @} @@ -1370,9 +1377,9 @@ HAL_StatusTypeDef FMC_PCCARD_DeInit(FMC_PCCARD_TypeDef *Device); /** @defgroup FMC_LL_SDRAM_Private_Functions_Group1 SDRAM Initialization/de-initialization functions * @{ */ -HAL_StatusTypeDef FMC_SDRAM_Init(FMC_SDRAM_TypeDef *Device, FMC_SDRAM_InitTypeDef *Init); +HAL_StatusTypeDef FMC_SDRAM_Init(FMC_SDRAM_TypeDef *Device, const FMC_SDRAM_InitTypeDef *Init); HAL_StatusTypeDef FMC_SDRAM_Timing_Init(FMC_SDRAM_TypeDef *Device, - FMC_SDRAM_TimingTypeDef *Timing, uint32_t Bank); + const FMC_SDRAM_TimingTypeDef *Timing, uint32_t Bank); HAL_StatusTypeDef FMC_SDRAM_DeInit(FMC_SDRAM_TypeDef *Device, uint32_t Bank); /** * @} @@ -1384,7 +1391,7 @@ HAL_StatusTypeDef FMC_SDRAM_DeInit(FMC_SDRAM_TypeDef *Device, uint32_t Bank); HAL_StatusTypeDef FMC_SDRAM_WriteProtection_Enable(FMC_SDRAM_TypeDef *Device, uint32_t Bank); HAL_StatusTypeDef FMC_SDRAM_WriteProtection_Disable(FMC_SDRAM_TypeDef *Device, uint32_t Bank); HAL_StatusTypeDef FMC_SDRAM_SendCommand(FMC_SDRAM_TypeDef *Device, - FMC_SDRAM_CommandTypeDef *Command, uint32_t Timeout); + const FMC_SDRAM_CommandTypeDef *Command, uint32_t Timeout); HAL_StatusTypeDef FMC_SDRAM_ProgramRefreshRate(FMC_SDRAM_TypeDef *Device, uint32_t RefreshRate); HAL_StatusTypeDef FMC_SDRAM_SetAutoRefreshNumber(FMC_SDRAM_TypeDef *Device, uint32_t AutoRefreshNumber); diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fsmc.h b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fsmc.h index 5fb1c4f256..ebfee7547b 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fsmc.h +++ b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fsmc.h @@ -41,51 +41,51 @@ extern "C" { #if defined(FSMC_Bank1) #define IS_FSMC_NORSRAM_BANK(__BANK__) (((__BANK__) == FSMC_NORSRAM_BANK1) || \ - ((__BANK__) == FSMC_NORSRAM_BANK2) || \ - ((__BANK__) == FSMC_NORSRAM_BANK3) || \ - ((__BANK__) == FSMC_NORSRAM_BANK4)) + ((__BANK__) == FSMC_NORSRAM_BANK2) || \ + ((__BANK__) == FSMC_NORSRAM_BANK3) || \ + ((__BANK__) == FSMC_NORSRAM_BANK4)) #define IS_FSMC_MUX(__MUX__) (((__MUX__) == FSMC_DATA_ADDRESS_MUX_DISABLE) || \ - ((__MUX__) == FSMC_DATA_ADDRESS_MUX_ENABLE)) + ((__MUX__) == FSMC_DATA_ADDRESS_MUX_ENABLE)) #define IS_FSMC_MEMORY(__MEMORY__) (((__MEMORY__) == FSMC_MEMORY_TYPE_SRAM) || \ - ((__MEMORY__) == FSMC_MEMORY_TYPE_PSRAM)|| \ - ((__MEMORY__) == FSMC_MEMORY_TYPE_NOR)) + ((__MEMORY__) == FSMC_MEMORY_TYPE_PSRAM)|| \ + ((__MEMORY__) == FSMC_MEMORY_TYPE_NOR)) #define IS_FSMC_NORSRAM_MEMORY_WIDTH(__WIDTH__) (((__WIDTH__) == FSMC_NORSRAM_MEM_BUS_WIDTH_8) || \ - ((__WIDTH__) == FSMC_NORSRAM_MEM_BUS_WIDTH_16) || \ - ((__WIDTH__) == FSMC_NORSRAM_MEM_BUS_WIDTH_32)) + ((__WIDTH__) == FSMC_NORSRAM_MEM_BUS_WIDTH_16) || \ + ((__WIDTH__) == FSMC_NORSRAM_MEM_BUS_WIDTH_32)) #define IS_FSMC_PAGESIZE(__SIZE__) (((__SIZE__) == FSMC_PAGE_SIZE_NONE) || \ - ((__SIZE__) == FSMC_PAGE_SIZE_128) || \ - ((__SIZE__) == FSMC_PAGE_SIZE_256) || \ - ((__SIZE__) == FSMC_PAGE_SIZE_512) || \ - ((__SIZE__) == FSMC_PAGE_SIZE_1024)) + ((__SIZE__) == FSMC_PAGE_SIZE_128) || \ + ((__SIZE__) == FSMC_PAGE_SIZE_256) || \ + ((__SIZE__) == FSMC_PAGE_SIZE_512) || \ + ((__SIZE__) == FSMC_PAGE_SIZE_1024)) #if defined(FSMC_BCR1_WFDIS) #define IS_FSMC_WRITE_FIFO(__FIFO__) (((__FIFO__) == FSMC_WRITE_FIFO_DISABLE) || \ - ((__FIFO__) == FSMC_WRITE_FIFO_ENABLE)) + ((__FIFO__) == FSMC_WRITE_FIFO_ENABLE)) #endif /* FSMC_BCR1_WFDIS */ #define IS_FSMC_ACCESS_MODE(__MODE__) (((__MODE__) == FSMC_ACCESS_MODE_A) || \ - ((__MODE__) == FSMC_ACCESS_MODE_B) || \ - ((__MODE__) == FSMC_ACCESS_MODE_C) || \ - ((__MODE__) == FSMC_ACCESS_MODE_D)) + ((__MODE__) == FSMC_ACCESS_MODE_B) || \ + ((__MODE__) == FSMC_ACCESS_MODE_C) || \ + ((__MODE__) == FSMC_ACCESS_MODE_D)) #define IS_FSMC_BURSTMODE(__STATE__) (((__STATE__) == FSMC_BURST_ACCESS_MODE_DISABLE) || \ - ((__STATE__) == FSMC_BURST_ACCESS_MODE_ENABLE)) + ((__STATE__) == FSMC_BURST_ACCESS_MODE_ENABLE)) #define IS_FSMC_WAIT_POLARITY(__POLARITY__) (((__POLARITY__) == FSMC_WAIT_SIGNAL_POLARITY_LOW) || \ - ((__POLARITY__) == FSMC_WAIT_SIGNAL_POLARITY_HIGH)) + ((__POLARITY__) == FSMC_WAIT_SIGNAL_POLARITY_HIGH)) #define IS_FSMC_WRAP_MODE(__MODE__) (((__MODE__) == FSMC_WRAP_MODE_DISABLE) || \ - ((__MODE__) == FSMC_WRAP_MODE_ENABLE)) + ((__MODE__) == FSMC_WRAP_MODE_ENABLE)) #define IS_FSMC_WAIT_SIGNAL_ACTIVE(__ACTIVE__) (((__ACTIVE__) == FSMC_WAIT_TIMING_BEFORE_WS) || \ - ((__ACTIVE__) == FSMC_WAIT_TIMING_DURING_WS)) + ((__ACTIVE__) == FSMC_WAIT_TIMING_DURING_WS)) #define IS_FSMC_WRITE_OPERATION(__OPERATION__) (((__OPERATION__) == FSMC_WRITE_OPERATION_DISABLE) || \ - ((__OPERATION__) == FSMC_WRITE_OPERATION_ENABLE)) + ((__OPERATION__) == FSMC_WRITE_OPERATION_ENABLE)) #define IS_FSMC_WAITE_SIGNAL(__SIGNAL__) (((__SIGNAL__) == FSMC_WAIT_SIGNAL_DISABLE) || \ - ((__SIGNAL__) == FSMC_WAIT_SIGNAL_ENABLE)) + ((__SIGNAL__) == FSMC_WAIT_SIGNAL_ENABLE)) #define IS_FSMC_EXTENDED_MODE(__MODE__) (((__MODE__) == FSMC_EXTENDED_MODE_DISABLE) || \ - ((__MODE__) == FSMC_EXTENDED_MODE_ENABLE)) + ((__MODE__) == FSMC_EXTENDED_MODE_ENABLE)) #define IS_FSMC_ASYNWAIT(__STATE__) (((__STATE__) == FSMC_ASYNCHRONOUS_WAIT_DISABLE) || \ - ((__STATE__) == FSMC_ASYNCHRONOUS_WAIT_ENABLE)) + ((__STATE__) == FSMC_ASYNCHRONOUS_WAIT_ENABLE)) #define IS_FSMC_DATA_LATENCY(__LATENCY__) (((__LATENCY__) > 1U) && ((__LATENCY__) <= 17U)) #define IS_FSMC_WRITE_BURST(__BURST__) (((__BURST__) == FSMC_WRITE_BURST_DISABLE) || \ - ((__BURST__) == FSMC_WRITE_BURST_ENABLE)) + ((__BURST__) == FSMC_WRITE_BURST_ENABLE)) #define IS_FSMC_CONTINOUS_CLOCK(__CCLOCK__) (((__CCLOCK__) == FSMC_CONTINUOUS_CLOCK_SYNC_ONLY) || \ - ((__CCLOCK__) == FSMC_CONTINUOUS_CLOCK_SYNC_ASYNC)) + ((__CCLOCK__) == FSMC_CONTINUOUS_CLOCK_SYNC_ASYNC)) #define IS_FSMC_ADDRESS_SETUP_TIME(__TIME__) ((__TIME__) <= 15U) #define IS_FSMC_ADDRESS_HOLD_TIME(__TIME__) (((__TIME__) > 0U) && ((__TIME__) <= 15U)) #define IS_FSMC_DATASETUP_TIME(__TIME__) (((__TIME__) > 0U) && ((__TIME__) <= 255U)) @@ -99,20 +99,20 @@ extern "C" { #if defined(FSMC_Bank2_3) #define IS_FSMC_NAND_BANK(__BANK__) (((__BANK__) == FSMC_NAND_BANK2) || \ - ((__BANK__) == FSMC_NAND_BANK3)) + ((__BANK__) == FSMC_NAND_BANK3)) #define IS_FSMC_WAIT_FEATURE(__FEATURE__) (((__FEATURE__) == FSMC_NAND_PCC_WAIT_FEATURE_DISABLE) || \ - ((__FEATURE__) == FSMC_NAND_PCC_WAIT_FEATURE_ENABLE)) + ((__FEATURE__) == FSMC_NAND_PCC_WAIT_FEATURE_ENABLE)) #define IS_FSMC_NAND_MEMORY_WIDTH(__WIDTH__) (((__WIDTH__) == FSMC_NAND_PCC_MEM_BUS_WIDTH_8) || \ - ((__WIDTH__) == FSMC_NAND_PCC_MEM_BUS_WIDTH_16)) + ((__WIDTH__) == FSMC_NAND_PCC_MEM_BUS_WIDTH_16)) #define IS_FSMC_ECC_STATE(__STATE__) (((__STATE__) == FSMC_NAND_ECC_DISABLE) || \ - ((__STATE__) == FSMC_NAND_ECC_ENABLE)) + ((__STATE__) == FSMC_NAND_ECC_ENABLE)) #define IS_FSMC_ECCPAGE_SIZE(__SIZE__) (((__SIZE__) == FSMC_NAND_ECC_PAGE_SIZE_256BYTE) || \ - ((__SIZE__) == FSMC_NAND_ECC_PAGE_SIZE_512BYTE) || \ - ((__SIZE__) == FSMC_NAND_ECC_PAGE_SIZE_1024BYTE) || \ - ((__SIZE__) == FSMC_NAND_ECC_PAGE_SIZE_2048BYTE) || \ - ((__SIZE__) == FSMC_NAND_ECC_PAGE_SIZE_4096BYTE) || \ - ((__SIZE__) == FSMC_NAND_ECC_PAGE_SIZE_8192BYTE)) + ((__SIZE__) == FSMC_NAND_ECC_PAGE_SIZE_512BYTE) || \ + ((__SIZE__) == FSMC_NAND_ECC_PAGE_SIZE_1024BYTE) || \ + ((__SIZE__) == FSMC_NAND_ECC_PAGE_SIZE_2048BYTE) || \ + ((__SIZE__) == FSMC_NAND_ECC_PAGE_SIZE_4096BYTE) || \ + ((__SIZE__) == FSMC_NAND_ECC_PAGE_SIZE_8192BYTE)) #define IS_FSMC_TCLR_TIME(__TIME__) ((__TIME__) <= 255U) #define IS_FSMC_TAR_TIME(__TIME__) ((__TIME__) <= 255U) #define IS_FSMC_SETUP_TIME(__TIME__) ((__TIME__) <= 254U) @@ -166,68 +166,69 @@ extern "C" { typedef struct { uint32_t NSBank; /*!< Specifies the NORSRAM memory device that will be used. - This parameter can be a value of @ref FSMC_NORSRAM_Bank */ + This parameter can be a value of @ref FSMC_NORSRAM_Bank */ uint32_t DataAddressMux; /*!< Specifies whether the address and data values are multiplexed on the data bus or not. - This parameter can be a value of @ref FSMC_Data_Address_Bus_Multiplexing */ + This parameter can be a value of @ref FSMC_Data_Address_Bus_Multiplexing*/ uint32_t MemoryType; /*!< Specifies the type of external memory attached to the corresponding memory device. - This parameter can be a value of @ref FSMC_Memory_Type */ + This parameter can be a value of @ref FSMC_Memory_Type */ uint32_t MemoryDataWidth; /*!< Specifies the external memory device width. - This parameter can be a value of @ref FSMC_NORSRAM_Data_Width */ + This parameter can be a value of @ref FSMC_NORSRAM_Data_Width */ uint32_t BurstAccessMode; /*!< Enables or disables the burst access mode for Flash memory, valid only with synchronous burst Flash memories. - This parameter can be a value of @ref FSMC_Burst_Access_Mode */ + This parameter can be a value of @ref FSMC_Burst_Access_Mode */ uint32_t WaitSignalPolarity; /*!< Specifies the wait signal polarity, valid only when accessing the Flash memory in burst mode. - This parameter can be a value of @ref FSMC_Wait_Signal_Polarity */ + This parameter can be a value of @ref FSMC_Wait_Signal_Polarity */ uint32_t WrapMode; /*!< Enables or disables the Wrapped burst access mode for Flash memory, valid only when accessing Flash memories in burst mode. This parameter can be a value of @ref FSMC_Wrap_Mode - This mode is available only for the STM32F405/407/4015/417xx devices */ + This mode is available only for the STM32F405/407/4015/417xx devices */ uint32_t WaitSignalActive; /*!< Specifies if the wait signal is asserted by the memory one clock cycle before the wait state or during the wait state, valid only when accessing memories in burst mode. - This parameter can be a value of @ref FSMC_Wait_Timing */ + This parameter can be a value of @ref FSMC_Wait_Timing */ - uint32_t WriteOperation; /*!< Enables or disables the write operation in the selected device by the FSMC. - This parameter can be a value of @ref FSMC_Write_Operation */ + uint32_t WriteOperation; /*!< Enables or disables the write operation in the selected device + by the FSMC. + This parameter can be a value of @ref FSMC_Write_Operation */ uint32_t WaitSignal; /*!< Enables or disables the wait state insertion via wait signal, valid for Flash memory access in burst mode. - This parameter can be a value of @ref FSMC_Wait_Signal */ + This parameter can be a value of @ref FSMC_Wait_Signal */ uint32_t ExtendedMode; /*!< Enables or disables the extended mode. - This parameter can be a value of @ref FSMC_Extended_Mode */ + This parameter can be a value of @ref FSMC_Extended_Mode */ uint32_t AsynchronousWait; /*!< Enables or disables wait signal during asynchronous transfers, valid only with asynchronous Flash memories. - This parameter can be a value of @ref FSMC_AsynchronousWait */ + This parameter can be a value of @ref FSMC_AsynchronousWait */ uint32_t WriteBurst; /*!< Enables or disables the write burst operation. - This parameter can be a value of @ref FSMC_Write_Burst */ + This parameter can be a value of @ref FSMC_Write_Burst */ uint32_t ContinuousClock; /*!< Enables or disables the FSMC clock output to external memory devices. This parameter is only enabled through the FSMC_BCR1 register, and don't care through FSMC_BCR2..4 registers. This parameter can be a value of @ref FSMC_Continous_Clock - This mode is available only for the STM32F412Vx/Zx/Rx devices */ + This mode is available only for the STM32F412Vx/Zx/Rx devices */ uint32_t WriteFifo; /*!< Enables or disables the write FIFO used by the FSMC controller. This parameter is only enabled through the FSMC_BCR1 register, and don't care through FSMC_BCR2..4 registers. This parameter can be a value of @ref FSMC_Write_FIFO - This mode is available only for the STM32F412Vx/Vx devices */ + This mode is available only for the STM32F412Vx/Vx devices */ uint32_t PageSize; /*!< Specifies the memory page size. - This parameter can be a value of @ref FSMC_Page_Size */ + This parameter can be a value of @ref FSMC_Page_Size */ } FSMC_NORSRAM_InitTypeDef; /** @@ -271,7 +272,7 @@ typedef struct in NOR Flash memories with synchronous burst mode enable */ uint32_t AccessMode; /*!< Specifies the asynchronous access mode. - This parameter can be a value of @ref FSMC_Access_Mode */ + This parameter can be a value of @ref FSMC_Access_Mode */ } FSMC_NORSRAM_TimingTypeDef; #endif /* FSMC_Bank1 */ @@ -355,7 +356,7 @@ typedef struct uint32_t TARSetupTime; /*!< Defines the number of HCLK cycles to configure the delay between ALE low and RE low. This parameter can be a number between Min_Data = 0 and Max_Data = 255 */ -}FSMC_PCCARD_InitTypeDef; +} FSMC_PCCARD_InitTypeDef; #endif /* FSMC_Bank4 */ /** @@ -501,7 +502,7 @@ typedef struct #define FSMC_PAGE_SIZE_128 FSMC_BCR1_CPSIZE_0 #define FSMC_PAGE_SIZE_256 FSMC_BCR1_CPSIZE_1 #define FSMC_PAGE_SIZE_512 (FSMC_BCR1_CPSIZE_0\ - | FSMC_BCR1_CPSIZE_1) + | FSMC_BCR1_CPSIZE_1) #define FSMC_PAGE_SIZE_1024 FSMC_BCR1_CPSIZE_2 /** * @} @@ -564,7 +565,7 @@ typedef struct */ #if defined(FSMC_Bank2_3) #define FSMC_NAND_BANK2 (0x00000010U) -#endif +#endif /* FSMC_Bank2_3 */ #define FSMC_NAND_BANK3 (0x00000100U) /** * @} @@ -767,7 +768,7 @@ typedef struct * @retval None */ #define __FSMC_NORSRAM_ENABLE(__INSTANCE__, __BANK__) ((__INSTANCE__)->BTCR[(__BANK__)]\ - |= FSMC_BCR1_MBKEN) + |= FSMC_BCR1_MBKEN) /** * @brief Disable the NORSRAM device access. @@ -776,7 +777,7 @@ typedef struct * @retval None */ #define __FSMC_NORSRAM_DISABLE(__INSTANCE__, __BANK__) ((__INSTANCE__)->BTCR[(__BANK__)]\ - &= ~FSMC_BCR1_MBKEN) + &= ~FSMC_BCR1_MBKEN) /** * @} @@ -795,8 +796,9 @@ typedef struct * @param __BANK__ FSMC_NAND Bank * @retval None */ -#define __FSMC_NAND_ENABLE(__INSTANCE__, __BANK__) (((__BANK__) == FSMC_NAND_BANK2)? ((__INSTANCE__)->PCR2 |= FSMC_PCR2_PBKEN): \ - ((__INSTANCE__)->PCR3 |= FSMC_PCR3_PBKEN)) +#define __FSMC_NAND_ENABLE(__INSTANCE__, __BANK__) (((__BANK__) == FSMC_NAND_BANK2) ? \ + ((__INSTANCE__)->PCR2 |= FSMC_PCR2_PBKEN) : \ + ((__INSTANCE__)->PCR3 |= FSMC_PCR3_PBKEN)) /** * @brief Disable the NAND device access. @@ -804,8 +806,9 @@ typedef struct * @param __BANK__ FSMC_NAND Bank * @retval None */ -#define __FSMC_NAND_DISABLE(__INSTANCE__, __BANK__) (((__BANK__) == FSMC_NAND_BANK2)? CLEAR_BIT((__INSTANCE__)->PCR2, FSMC_PCR2_PBKEN): \ - CLEAR_BIT((__INSTANCE__)->PCR3, FSMC_PCR3_PBKEN)) +#define __FSMC_NAND_DISABLE(__INSTANCE__, __BANK__) (((__BANK__) == FSMC_NAND_BANK2) ? \ + CLEAR_BIT((__INSTANCE__)->PCR2, FSMC_PCR2_PBKEN) : \ + CLEAR_BIT((__INSTANCE__)->PCR3, FSMC_PCR3_PBKEN)) /** * @} @@ -834,7 +837,7 @@ typedef struct * @} */ -#endif +#endif /* FSMC_Bank4 */ #if defined(FSMC_Bank2_3) /** @defgroup FSMC_LL_NAND_Interrupt FSMC NAND Interrupt * @brief macros to handle NAND interrupts @@ -852,8 +855,9 @@ typedef struct * @arg FSMC_IT_FALLING_EDGE: Interrupt falling edge. * @retval None */ -#define __FSMC_NAND_ENABLE_IT(__INSTANCE__, __BANK__, __INTERRUPT__) (((__BANK__) == FSMC_NAND_BANK2)? ((__INSTANCE__)->SR2 |= (__INTERRUPT__)): \ - ((__INSTANCE__)->SR3 |= (__INTERRUPT__))) +#define __FSMC_NAND_ENABLE_IT(__INSTANCE__, __BANK__, __INTERRUPT__) (((__BANK__) == FSMC_NAND_BANK2) ? \ + ((__INSTANCE__)->SR2 |= (__INTERRUPT__)) : \ + ((__INSTANCE__)->SR3 |= (__INTERRUPT__))) /** * @brief Disable the NAND device interrupt. @@ -866,8 +870,9 @@ typedef struct * @arg FSMC_IT_FALLING_EDGE: Interrupt falling edge. * @retval None */ -#define __FSMC_NAND_DISABLE_IT(__INSTANCE__, __BANK__, __INTERRUPT__) (((__BANK__) == FSMC_NAND_BANK2)? ((__INSTANCE__)->SR2 &= ~(__INTERRUPT__)): \ - ((__INSTANCE__)->SR3 &= ~(__INTERRUPT__))) +#define __FSMC_NAND_DISABLE_IT(__INSTANCE__, __BANK__, __INTERRUPT__) (((__BANK__) == FSMC_NAND_BANK2) ? \ + ((__INSTANCE__)->SR2 &= ~(__INTERRUPT__)) : \ + ((__INSTANCE__)->SR3 &= ~(__INTERRUPT__))) /** * @brief Get flag status of the NAND device. @@ -881,8 +886,9 @@ typedef struct * @arg FSMC_FLAG_FEMPT: FIFO empty flag. * @retval The state of FLAG (SET or RESET). */ -#define __FSMC_NAND_GET_FLAG(__INSTANCE__, __BANK__, __FLAG__) (((__BANK__) == FSMC_NAND_BANK2)? (((__INSTANCE__)->SR2 &(__FLAG__)) == (__FLAG__)): \ - (((__INSTANCE__)->SR3 &(__FLAG__)) == (__FLAG__))) +#define __FSMC_NAND_GET_FLAG(__INSTANCE__, __BANK__, __FLAG__) (((__BANK__) == FSMC_NAND_BANK2) ? \ + (((__INSTANCE__)->SR2 &(__FLAG__)) == (__FLAG__)) : \ + (((__INSTANCE__)->SR3 &(__FLAG__)) == (__FLAG__))) /** * @brief Clear flag status of the NAND device. @@ -896,8 +902,9 @@ typedef struct * @arg FSMC_FLAG_FEMPT: FIFO empty flag. * @retval None */ -#define __FSMC_NAND_CLEAR_FLAG(__INSTANCE__, __BANK__, __FLAG__) (((__BANK__) == FSMC_NAND_BANK2)? ((__INSTANCE__)->SR2 &= ~(__FLAG__)): \ - ((__INSTANCE__)->SR3 &= ~(__FLAG__))) +#define __FSMC_NAND_CLEAR_FLAG(__INSTANCE__, __BANK__, __FLAG__) (((__BANK__) == FSMC_NAND_BANK2) ? \ + ((__INSTANCE__)->SR2 &= ~(__FLAG__)) : \ + ((__INSTANCE__)->SR3 &= ~(__FLAG__))) /** * @} @@ -963,7 +970,7 @@ typedef struct /** * @} */ -#endif +#endif /* FSMC_Bank4 */ /** * @} @@ -986,14 +993,14 @@ typedef struct * @{ */ HAL_StatusTypeDef FSMC_NORSRAM_Init(FSMC_NORSRAM_TypeDef *Device, - FSMC_NORSRAM_InitTypeDef *Init); + const FSMC_NORSRAM_InitTypeDef *Init); HAL_StatusTypeDef FSMC_NORSRAM_Timing_Init(FSMC_NORSRAM_TypeDef *Device, - FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank); + const FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank); HAL_StatusTypeDef FSMC_NORSRAM_Extended_Timing_Init(FSMC_NORSRAM_EXTENDED_TypeDef *Device, - FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank, - uint32_t ExtendedMode); + const FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank, + uint32_t ExtendedMode); HAL_StatusTypeDef FSMC_NORSRAM_DeInit(FSMC_NORSRAM_TypeDef *Device, - FSMC_NORSRAM_EXTENDED_TypeDef *ExDevice, uint32_t Bank); + FSMC_NORSRAM_EXTENDED_TypeDef *ExDevice, uint32_t Bank); /** * @} */ @@ -1018,11 +1025,11 @@ HAL_StatusTypeDef FSMC_NORSRAM_WriteOperation_Disable(FSMC_NORSRAM_TypeDef *Dev /** @defgroup FSMC_LL_NAND_Private_Functions_Group1 NAND Initialization/de-initialization functions * @{ */ -HAL_StatusTypeDef FSMC_NAND_Init(FSMC_NAND_TypeDef *Device, FSMC_NAND_InitTypeDef *Init); +HAL_StatusTypeDef FSMC_NAND_Init(FSMC_NAND_TypeDef *Device, const FSMC_NAND_InitTypeDef *Init); HAL_StatusTypeDef FSMC_NAND_CommonSpace_Timing_Init(FSMC_NAND_TypeDef *Device, - FSMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank); + const FSMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank); HAL_StatusTypeDef FSMC_NAND_AttributeSpace_Timing_Init(FSMC_NAND_TypeDef *Device, - FSMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank); + const FSMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank); HAL_StatusTypeDef FSMC_NAND_DeInit(FSMC_NAND_TypeDef *Device, uint32_t Bank); /** * @} @@ -1033,8 +1040,8 @@ HAL_StatusTypeDef FSMC_NAND_DeInit(FSMC_NAND_TypeDef *Device, uint32_t Bank); */ HAL_StatusTypeDef FSMC_NAND_ECC_Enable(FSMC_NAND_TypeDef *Device, uint32_t Bank); HAL_StatusTypeDef FSMC_NAND_ECC_Disable(FSMC_NAND_TypeDef *Device, uint32_t Bank); -HAL_StatusTypeDef FSMC_NAND_GetECC(FSMC_NAND_TypeDef *Device, uint32_t *ECCval, uint32_t Bank, - uint32_t Timeout); +HAL_StatusTypeDef FSMC_NAND_GetECC(const FSMC_NAND_TypeDef *Device, uint32_t *ECCval, uint32_t Bank, + uint32_t Timeout); /** * @} */ @@ -1050,13 +1057,13 @@ HAL_StatusTypeDef FSMC_NAND_GetECC(FSMC_NAND_TypeDef *Device, uint32_t *ECCval, /** @defgroup FSMC_LL_PCCARD_Private_Functions_Group1 PCCARD Initialization/de-initialization functions * @{ */ -HAL_StatusTypeDef FSMC_PCCARD_Init(FSMC_PCCARD_TypeDef *Device, FSMC_PCCARD_InitTypeDef *Init); +HAL_StatusTypeDef FSMC_PCCARD_Init(FSMC_PCCARD_TypeDef *Device, const FSMC_PCCARD_InitTypeDef *Init); HAL_StatusTypeDef FSMC_PCCARD_CommonSpace_Timing_Init(FSMC_PCCARD_TypeDef *Device, - FSMC_NAND_PCC_TimingTypeDef *Timing); + const FSMC_NAND_PCC_TimingTypeDef *Timing); HAL_StatusTypeDef FSMC_PCCARD_AttributeSpace_Timing_Init(FSMC_PCCARD_TypeDef *Device, - FSMC_NAND_PCC_TimingTypeDef *Timing); + const FSMC_NAND_PCC_TimingTypeDef *Timing); HAL_StatusTypeDef FSMC_PCCARD_IOSpace_Timing_Init(FSMC_PCCARD_TypeDef *Device, - FSMC_NAND_PCC_TimingTypeDef *Timing); + const FSMC_NAND_PCC_TimingTypeDef *Timing); HAL_StatusTypeDef FSMC_PCCARD_DeInit(FSMC_PCCARD_TypeDef *Device); /** * @} diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_iwdg.h b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_iwdg.h index 4158363d1c..c035298906 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_iwdg.h +++ b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_iwdg.h @@ -207,7 +207,7 @@ __STATIC_INLINE void LL_IWDG_SetPrescaler(IWDG_TypeDef *IWDGx, uint32_t Prescale * @arg @ref LL_IWDG_PRESCALER_128 * @arg @ref LL_IWDG_PRESCALER_256 */ -__STATIC_INLINE uint32_t LL_IWDG_GetPrescaler(IWDG_TypeDef *IWDGx) +__STATIC_INLINE uint32_t LL_IWDG_GetPrescaler(const IWDG_TypeDef *IWDGx) { return (READ_REG(IWDGx->PR)); } @@ -230,7 +230,7 @@ __STATIC_INLINE void LL_IWDG_SetReloadCounter(IWDG_TypeDef *IWDGx, uint32_t Coun * @param IWDGx IWDG Instance * @retval Value between Min_Data=0 and Max_Data=0x0FFF */ -__STATIC_INLINE uint32_t LL_IWDG_GetReloadCounter(IWDG_TypeDef *IWDGx) +__STATIC_INLINE uint32_t LL_IWDG_GetReloadCounter(const IWDG_TypeDef *IWDGx) { return (READ_REG(IWDGx->RLR)); } @@ -249,7 +249,7 @@ __STATIC_INLINE uint32_t LL_IWDG_GetReloadCounter(IWDG_TypeDef *IWDGx) * @param IWDGx IWDG Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_PVU(IWDG_TypeDef *IWDGx) +__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_PVU(const IWDG_TypeDef *IWDGx) { return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU) == (IWDG_SR_PVU)) ? 1UL : 0UL); } @@ -260,7 +260,7 @@ __STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_PVU(IWDG_TypeDef *IWDGx) * @param IWDGx IWDG Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_RVU(IWDG_TypeDef *IWDGx) +__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_RVU(const IWDG_TypeDef *IWDGx) { return ((READ_BIT(IWDGx->SR, IWDG_SR_RVU) == (IWDG_SR_RVU)) ? 1UL : 0UL); } @@ -272,7 +272,7 @@ __STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_RVU(IWDG_TypeDef *IWDGx) * @param IWDGx IWDG Instance * @retval State of bits (1 or 0). */ -__STATIC_INLINE uint32_t LL_IWDG_IsReady(IWDG_TypeDef *IWDGx) +__STATIC_INLINE uint32_t LL_IWDG_IsReady(const IWDG_TypeDef *IWDGx) { return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU) == 0U) ? 1UL : 0UL); } diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_rcc.h b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_rcc.h index 796f06d862..0a6a5b9286 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_rcc.h +++ b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_rcc.h @@ -42,9 +42,9 @@ extern "C" { * @{ */ -#if defined(RCC_DCKCFGR_PLLSAIDIVR) +#if defined(RCC_PLLSAI_SUPPORT) && defined(LTDC) static const uint8_t aRCC_PLLSAIDIVRPrescTable[4] = {2, 4, 8, 16}; -#endif /* RCC_DCKCFGR_PLLSAIDIVR */ +#endif /* RCC_PLLSAI_SUPPORT && LTDC */ /** * @} diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_rtc.h b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_rtc.h index 74a0aee089..8f4ac94be6 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_rtc.h +++ b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_rtc.h @@ -404,8 +404,8 @@ typedef struct /** @defgroup RTC_LL_EC_TIMESTAMP_EDGE TIMESTAMP EDGE * @{ */ -#define LL_RTC_TIMESTAMP_EDGE_RISING 0x00000000U /*!< RTC_TS input rising edge generates a time-stamp event */ -#define LL_RTC_TIMESTAMP_EDGE_FALLING RTC_CR_TSEDGE /*!< RTC_TS input falling edge generates a time-stamp even */ +#define LL_RTC_TIMESTAMP_EDGE_RISING 0x00000000U /*!< RTC_TS input rising edge generates a time-stamp event */ +#define LL_RTC_TIMESTAMP_EDGE_FALLING RTC_CR_TSEDGE /*!< RTC_TS input falling edge generates a time-stamp event */ /** * @} */ diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_spi.h b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_spi.h index 371383e0d7..164cbb9433 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_spi.h +++ b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_spi.h @@ -55,53 +55,66 @@ typedef struct uint32_t TransferDirection; /*!< Specifies the SPI unidirectional or bidirectional data mode. This parameter can be a value of @ref SPI_LL_EC_TRANSFER_MODE. - This feature can be modified afterwards using unitary function @ref LL_SPI_SetTransferDirection().*/ + This feature can be modified afterwards using unitary + function @ref LL_SPI_SetTransferDirection().*/ uint32_t Mode; /*!< Specifies the SPI mode (Master/Slave). This parameter can be a value of @ref SPI_LL_EC_MODE. - This feature can be modified afterwards using unitary function @ref LL_SPI_SetMode().*/ + This feature can be modified afterwards using unitary + function @ref LL_SPI_SetMode().*/ uint32_t DataWidth; /*!< Specifies the SPI data width. This parameter can be a value of @ref SPI_LL_EC_DATAWIDTH. - This feature can be modified afterwards using unitary function @ref LL_SPI_SetDataWidth().*/ + This feature can be modified afterwards using unitary + function @ref LL_SPI_SetDataWidth().*/ uint32_t ClockPolarity; /*!< Specifies the serial clock steady state. This parameter can be a value of @ref SPI_LL_EC_POLARITY. - This feature can be modified afterwards using unitary function @ref LL_SPI_SetClockPolarity().*/ + This feature can be modified afterwards using unitary + function @ref LL_SPI_SetClockPolarity().*/ uint32_t ClockPhase; /*!< Specifies the clock active edge for the bit capture. This parameter can be a value of @ref SPI_LL_EC_PHASE. - This feature can be modified afterwards using unitary function @ref LL_SPI_SetClockPhase().*/ + This feature can be modified afterwards using unitary + function @ref LL_SPI_SetClockPhase().*/ - uint32_t NSS; /*!< Specifies whether the NSS signal is managed by hardware (NSS pin) or by software using the SSI bit. + uint32_t NSS; /*!< Specifies whether the NSS signal is managed by hardware (NSS pin) + or by software using the SSI bit. This parameter can be a value of @ref SPI_LL_EC_NSS_MODE. - This feature can be modified afterwards using unitary function @ref LL_SPI_SetNSSMode().*/ + This feature can be modified afterwards using unitary + function @ref LL_SPI_SetNSSMode().*/ - uint32_t BaudRate; /*!< Specifies the BaudRate prescaler value which will be used to configure the transmit and receive SCK clock. + uint32_t BaudRate; /*!< Specifies the BaudRate prescaler value which will be used + to configure the transmit and receive SCK clock. This parameter can be a value of @ref SPI_LL_EC_BAUDRATEPRESCALER. - @note The communication clock is derived from the master clock. The slave clock does not need to be set. + @note The communication clock is derived from the master clock. + The slave clock does not need to be set. - This feature can be modified afterwards using unitary function @ref LL_SPI_SetBaudRatePrescaler().*/ + This feature can be modified afterwards using unitary + function @ref LL_SPI_SetBaudRatePrescaler().*/ uint32_t BitOrder; /*!< Specifies whether data transfers start from MSB or LSB bit. This parameter can be a value of @ref SPI_LL_EC_BIT_ORDER. - This feature can be modified afterwards using unitary function @ref LL_SPI_SetTransferBitOrder().*/ + This feature can be modified afterwards using unitary + function @ref LL_SPI_SetTransferBitOrder().*/ uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not. This parameter can be a value of @ref SPI_LL_EC_CRC_CALCULATION. - This feature can be modified afterwards using unitary functions @ref LL_SPI_EnableCRC() and @ref LL_SPI_DisableCRC().*/ + This feature can be modified afterwards using unitary + functions @ref LL_SPI_EnableCRC() and @ref LL_SPI_DisableCRC().*/ uint32_t CRCPoly; /*!< Specifies the polynomial used for the CRC calculation. This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFFFF. - This feature can be modified afterwards using unitary function @ref LL_SPI_SetCRCPolynomial().*/ + This feature can be modified afterwards using unitary + function @ref LL_SPI_SetCRCPolynomial().*/ } LL_SPI_InitTypeDef; @@ -841,7 +854,7 @@ __STATIC_INLINE void LL_SPI_ClearFlag_MODF(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval None */ -__STATIC_INLINE void LL_SPI_ClearFlag_OVR(SPI_TypeDef *SPIx) +__STATIC_INLINE void LL_SPI_ClearFlag_OVR(const SPI_TypeDef *SPIx) { __IO uint32_t tmpreg; tmpreg = SPIx->DR; @@ -857,7 +870,7 @@ __STATIC_INLINE void LL_SPI_ClearFlag_OVR(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval None */ -__STATIC_INLINE void LL_SPI_ClearFlag_FRE(SPI_TypeDef *SPIx) +__STATIC_INLINE void LL_SPI_ClearFlag_FRE(const SPI_TypeDef *SPIx) { __IO uint32_t tmpreg; tmpreg = SPIx->SR; @@ -874,7 +887,8 @@ __STATIC_INLINE void LL_SPI_ClearFlag_FRE(SPI_TypeDef *SPIx) /** * @brief Enable error interrupt - * @note This bit controls the generation of an interrupt when an error condition occurs (CRCERR, OVR, MODF in SPI mode, FRE at TI mode). + * @note This bit controls the generation of an interrupt when an error condition + * occurs (CRCERR, OVR, MODF in SPI mode, FRE at TI mode). * @rmtoll CR2 ERRIE LL_SPI_EnableIT_ERR * @param SPIx SPI Instance * @retval None @@ -908,7 +922,8 @@ __STATIC_INLINE void LL_SPI_EnableIT_TXE(SPI_TypeDef *SPIx) /** * @brief Disable error interrupt - * @note This bit controls the generation of an interrupt when an error condition occurs (CRCERR, OVR, MODF in SPI mode, FRE at TI mode). + * @note This bit controls the generation of an interrupt when an error condition + * occurs (CRCERR, OVR, MODF in SPI mode, FRE at TI mode). * @rmtoll CR2 ERRIE LL_SPI_DisableIT_ERR * @param SPIx SPI Instance * @retval None @@ -1751,7 +1766,7 @@ __STATIC_INLINE void LL_I2S_ClearFlag_OVR(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval None */ -__STATIC_INLINE void LL_I2S_ClearFlag_UDR(SPI_TypeDef *SPIx) +__STATIC_INLINE void LL_I2S_ClearFlag_UDR(const SPI_TypeDef *SPIx) { __IO uint32_t tmpreg; tmpreg = SPIx->SR; @@ -1764,7 +1779,7 @@ __STATIC_INLINE void LL_I2S_ClearFlag_UDR(SPI_TypeDef *SPIx) * @param SPIx SPI Instance * @retval None */ -__STATIC_INLINE void LL_I2S_ClearFlag_FRE(SPI_TypeDef *SPIx) +__STATIC_INLINE void LL_I2S_ClearFlag_FRE(const SPI_TypeDef *SPIx) { LL_SPI_ClearFlag_FRE(SPIx); } diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_wwdg.h b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_wwdg.h index 5cbca0d8ff..bcc4c5c45c 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_wwdg.h +++ b/system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_wwdg.h @@ -131,7 +131,7 @@ __STATIC_INLINE void LL_WWDG_Enable(WWDG_TypeDef *WWDGx) * @param WWDGx WWDG Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_WWDG_IsEnabled(WWDG_TypeDef *WWDGx) +__STATIC_INLINE uint32_t LL_WWDG_IsEnabled(const WWDG_TypeDef *WWDGx) { return ((READ_BIT(WWDGx->CR, WWDG_CR_WDGA) == (WWDG_CR_WDGA)) ? 1UL : 0UL); } @@ -158,7 +158,7 @@ __STATIC_INLINE void LL_WWDG_SetCounter(WWDG_TypeDef *WWDGx, uint32_t Counter) * @param WWDGx WWDG Instance * @retval 7 bit Watchdog Counter value */ -__STATIC_INLINE uint32_t LL_WWDG_GetCounter(WWDG_TypeDef *WWDGx) +__STATIC_INLINE uint32_t LL_WWDG_GetCounter(const WWDG_TypeDef *WWDGx) { return (READ_BIT(WWDGx->CR, WWDG_CR_T)); } @@ -191,7 +191,7 @@ __STATIC_INLINE void LL_WWDG_SetPrescaler(WWDG_TypeDef *WWDGx, uint32_t Prescale * @arg @ref LL_WWDG_PRESCALER_4 * @arg @ref LL_WWDG_PRESCALER_8 */ -__STATIC_INLINE uint32_t LL_WWDG_GetPrescaler(WWDG_TypeDef *WWDGx) +__STATIC_INLINE uint32_t LL_WWDG_GetPrescaler(const WWDG_TypeDef *WWDGx) { return (READ_BIT(WWDGx->CFR, WWDG_CFR_WDGTB)); } @@ -223,7 +223,7 @@ __STATIC_INLINE void LL_WWDG_SetWindow(WWDG_TypeDef *WWDGx, uint32_t Window) * @param WWDGx WWDG Instance * @retval 7 bit Watchdog Window value */ -__STATIC_INLINE uint32_t LL_WWDG_GetWindow(WWDG_TypeDef *WWDGx) +__STATIC_INLINE uint32_t LL_WWDG_GetWindow(const WWDG_TypeDef *WWDGx) { return (READ_BIT(WWDGx->CFR, WWDG_CFR_W)); } @@ -244,7 +244,7 @@ __STATIC_INLINE uint32_t LL_WWDG_GetWindow(WWDG_TypeDef *WWDGx) * @param WWDGx WWDG Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_WWDG_IsActiveFlag_EWKUP(WWDG_TypeDef *WWDGx) +__STATIC_INLINE uint32_t LL_WWDG_IsActiveFlag_EWKUP(const WWDG_TypeDef *WWDGx) { return ((READ_BIT(WWDGx->SR, WWDG_SR_EWIF) == (WWDG_SR_EWIF)) ? 1UL : 0UL); } @@ -286,7 +286,7 @@ __STATIC_INLINE void LL_WWDG_EnableIT_EWKUP(WWDG_TypeDef *WWDGx) * @param WWDGx WWDG Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_WWDG_IsEnabledIT_EWKUP(WWDG_TypeDef *WWDGx) +__STATIC_INLINE uint32_t LL_WWDG_IsEnabledIT_EWKUP(const WWDG_TypeDef *WWDGx) { return ((READ_BIT(WWDGx->CFR, WWDG_CFR_EWI) == (WWDG_CFR_EWI)) ? 1UL : 0UL); } diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Release_Notes.html b/system/Drivers/STM32F4xx_HAL_Driver/Release_Notes.html index 243bc466ed..5cba24b0f0 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Release_Notes.html +++ b/system/Drivers/STM32F4xx_HAL_Driver/Release_Notes.html @@ -40,10 +40,87 @@

                                                                                                    Purpose

                                                                                                    Update History

                                                                                                    - +

                                                                                                    Main Changes

                                                                                                      +
                                                                                                    • Enhance HAL code quality for MISRA-C 2012 Rule-8.13 by adding const qualifiers.
                                                                                                      • +
                                                                                                    • HAL RTC +
                                                                                                        +
                                                                                                      • Expand the cast of ‘RTC_CR_BYPSHAD’ to 32 bits when writing to the CR register in HAL_RTCEx_DisableBypassShadow() API to avoid overwriting its upper bits.
                                                                                                        • +
                                                                                                      • +
                                                                                                    • HAL HASH +
                                                                                                        +
                                                                                                      • Code quality enhancement : Fix MISRA-C 2012 Rule-10.7, Rule-10.6, Rule-10.4, Rule-11.5 and Rule-12.1.
                                                                                                        • +
                                                                                                      • +
                                                                                                    • HAL TIM +
                                                                                                        +
                                                                                                      • Fix IS_TIM_REMAP macro with TIM_TIM2_ETH_PTP remap capability.
                                                                                                        • +
                                                                                                      • Fix update flag (UIF) clearing in TIM_Base_SetConfig() function.
                                                                                                        • +
                                                                                                      • +
                                                                                                    • HAL FMC +
                                                                                                        +
                                                                                                      • Change “deviceaddress” variable as volatile in HAL_NAND_Read_Page_8b(), HAL_NAND_Read_SpareArea_8b(), HAL_NAND_Read_Page_16b() and HAL_NAND_Read_SpareArea_16b() APIs to avoid compiler optimizations and ensure correct data reads.
                                                                                                        • +
                                                                                                      • +
                                                                                                    • HAL ETH +
                                                                                                        +
                                                                                                      • Fix identical definitions of the ETH state code.
                                                                                                        • +
                                                                                                      • Fix the calculation of the tail pointer so that it points to the last updated descriptor
                                                                                                        • +
                                                                                                      • Update the HAL_ETH_PTP_SetConfig() API to comply with the steps described in the reference manual guidelines.
                                                                                                        • +
                                                                                                      • +
                                                                                                    • HAL I2C +
                                                                                                        +
                                                                                                      • Remove Redundant Condition from I2C_MasterReceive_BTF() function.
                                                                                                        • +
                                                                                                      • +
                                                                                                    • HAL SPI +
                                                                                                        +
                                                                                                      • Add note to clarify HAL_SPI_Receive() API behavior in master mode.
                                                                                                        • +
                                                                                                      • Add units to physical measurements.
                                                                                                        • +
                                                                                                      • Check data size before changing state in reception API.
                                                                                                        • +
                                                                                                      • Fix INTEGER_OVERFLOW Coverity warning.
                                                                                                        • +
                                                                                                      • Move a variable declaration before an executable instruction.
                                                                                                        • +
                                                                                                      • +
                                                                                                    • HAL IRDA +
                                                                                                        +
                                                                                                      • Fix CHECKED_RETURN/UNUSED_VALUE Coverity warnings.
                                                                                                        • +
                                                                                                      • +
                                                                                                    • HAL UART +
                                                                                                        +
                                                                                                      • Add HAL_UART_RXEVENT_IDLE event notification to user in case of HAL_UARTEx_ReceiveToIdle_DMA() API use with Circular DMA, even if occurring just after TC event.
                                                                                                        • +
                                                                                                      • Correct DMA Rx abort procedure impact on ongoing Tx transfer in polling mode.
                                                                                                        • +
                                                                                                      • Correct the IDLE reception check by replacing USART_SR_IDLE with USART_CR1_IDLEIE.
                                                                                                        • +
                                                                                                      • Fix CHECKED_RETURN/UNUSED_VALUE Coverity warnings.
                                                                                                        • +
                                                                                                      • Remove Redundant Condition from HAL_UARTEx_ReceiveToIdle_DMA() API.
                                                                                                        • +
                                                                                                      • +
                                                                                                    • HAL USART +
                                                                                                        +
                                                                                                      • Fix CHECKED_RETURN/UNUSED_VALUE Coverity warnings.
                                                                                                        • +
                                                                                                      • +
                                                                                                    • HAL CAN +
                                                                                                        +
                                                                                                      • Fix UNUSED_VALUE Coverity warning in HAL_CAN_ConfigFilter() API
                                                                                                        • +
                                                                                                      • +
                                                                                                    • HAL SDMMC +
                                                                                                        +
                                                                                                      • Add a check condition before aborting DMA in HAL_MMC_IRQHandler() API.
                                                                                                        • +
                                                                                                      • Remove Redundant Condition from HAL_SD_InitCard() API.
                                                                                                        • +
                                                                                                      • +
                                                                                                    • HAL SMARTCARD +
                                                                                                        +
                                                                                                      • Fix CHECKED_RETURN/UNUSED_VALUE Coverity warnings.
                                                                                                        • +
                                                                                                      • +
                                                                                                    • HAL USB +
                                                                                                        +
                                                                                                      • Fix the condition on EONUM flag of DOEPCTLx register in HAL_PCD_IRQHandler() API to correctly check on the frame number parity.
                                                                                                        • +
                                                                                                      • +
                                                                                                    +
                                                                                                    +
                                                                                                    +
                                                                                                    + +
                                                                                                    +

                                                                                                    Main Changes

                                                                                                    +
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                                                                                                                                                                                        diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c index 096fd16e90..eb118631e5 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c +++ b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c @@ -50,11 +50,11 @@ * @{ */ /** - * @brief STM32F4xx HAL Driver version number V1.8.3 + * @brief STM32F4xx HAL Driver version number V1.8.4 */ #define __STM32F4xx_HAL_VERSION_MAIN (0x01U) /*!< [31:24] main version */ #define __STM32F4xx_HAL_VERSION_SUB1 (0x08U) /*!< [23:16] sub1 version */ -#define __STM32F4xx_HAL_VERSION_SUB2 (0x03U) /*!< [15:8] sub2 version */ +#define __STM32F4xx_HAL_VERSION_SUB2 (0x04U) /*!< [15:8] sub2 version */ #define __STM32F4xx_HAL_VERSION_RC (0x00U) /*!< [7:0] release candidate */ #define __STM32F4xx_HAL_VERSION ((__STM32F4xx_HAL_VERSION_MAIN << 24U)\ |(__STM32F4xx_HAL_VERSION_SUB1 << 16U)\ diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc.c b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc.c index 9ad943d8d0..f37d00e1fd 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc.c +++ b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc.c @@ -1365,7 +1365,7 @@ HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef *hadc, uint32_t *pData, ui { __IO uint32_t counter = 0U; ADC_Common_TypeDef *tmpADC_Common; - + HAL_StatusTypeDef tmp_hal_status = HAL_OK; /* Check the parameters */ assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge)); @@ -1460,7 +1460,7 @@ HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef *hadc, uint32_t *pData, ui hadc->Instance->CR2 |= ADC_CR2_DMA; /* Start the DMA channel */ - HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length); + tmp_hal_status = HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length); /* Check if Multimode enabled */ if (HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_MULTI)) @@ -1500,7 +1500,7 @@ HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef *hadc, uint32_t *pData, ui } /* Return function status */ - return HAL_OK; + return tmp_hal_status; } /** diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc_ex.c b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc_ex.c index 1d8ad7b532..9e7a66998a 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc_ex.c +++ b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc_ex.c @@ -599,7 +599,7 @@ HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef *hadc, uint32_t { __IO uint32_t counter = 0U; ADC_Common_TypeDef *tmpADC_Common; - + HAL_StatusTypeDef tmp_hal_status = HAL_OK; /* Check the parameters */ assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge)); @@ -694,7 +694,7 @@ HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef *hadc, uint32_t } /* Enable the DMA Stream */ - HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&tmpADC_Common->CDR, (uint32_t)pData, Length); + tmp_hal_status = HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&tmpADC_Common->CDR, (uint32_t)pData, Length); /* if no external trigger present enable software conversion of regular channels */ if ((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET) @@ -713,7 +713,7 @@ HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef *hadc, uint32_t } /* Return function status */ - return HAL_OK; + return tmp_hal_status; } /** diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_can.c b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_can.c index f99111633b..fa95eb5ec3 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_can.c +++ b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_can.c @@ -840,7 +840,7 @@ HAL_StatusTypeDef HAL_CAN_UnRegisterCallback(CAN_HandleTypeDef *hcan, HAL_CAN_Ca HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef *hcan, const CAN_FilterTypeDef *sFilterConfig) { uint32_t filternbrbitpos; - CAN_TypeDef *can_ip = hcan->Instance; + CAN_TypeDef *can_ip; HAL_CAN_StateTypeDef state = hcan->State; if ((state == HAL_CAN_STATE_READY) || @@ -861,6 +861,7 @@ HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef *hcan, const CAN_Filter if (hcan->Instance == CAN3) { /* CAN3 is single instance with 14 dedicated filters banks */ + can_ip = hcan->Instance; /* Check the parameters */ assert_param(IS_CAN_FILTER_BANK_SINGLE(sFilterConfig->FilterBank)); @@ -885,6 +886,7 @@ HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef *hcan, const CAN_Filter assert_param(IS_CAN_FILTER_BANK_DUAL(sFilterConfig->SlaveStartFilterBank)); #else /* CAN1 is single instance with 14 dedicated filters banks */ + can_ip = hcan->Instance; /* Check the parameters */ assert_param(IS_CAN_FILTER_BANK_SINGLE(sFilterConfig->FilterBank)); diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cryp.c b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cryp.c index bb41673b2d..ba16cf2ebe 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cryp.c +++ b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cryp.c @@ -30,7 +30,8 @@ The CRYP HAL driver can be used in CRYP or TinyAES IP as follows: (#)Initialize the CRYP low level resources by implementing the HAL_CRYP_MspInit(): - (##) Enable the CRYP interface clock using __HAL_RCC_CRYP_CLK_ENABLE()or __HAL_RCC_AES_CLK_ENABLE for TinyAES IP + (##) Enable the CRYP interface clock using __HAL_RCC_CRYP_CLK_ENABLE()or + __HAL_RCC_AES_CLK_ENABLE for TinyAES IP (##) In case of using interrupts (e.g. HAL_CRYP_Encrypt_IT()) (+++) Configure the CRYP interrupt priority using HAL_NVIC_SetPriority() (+++) Enable the CRYP IRQ handler using HAL_NVIC_EnableIRQ() @@ -71,7 +72,7 @@ the CRYP peripheral is configured and processes the buffer in input. At second call, no need to Initialize the CRYP, user have to get current configuration via HAL_CRYP_GetConfig() API, then only HAL_CRYP_SetConfig() is requested to set - new parametres, finally user can start encryption/decryption. + new parameters, finally user can start encryption/decryption. (#)Call HAL_CRYP_DeInit() to deinitialize the CRYP peripheral. @@ -277,7 +278,8 @@ * @{ */ #define CRYP_TIMEOUT_KEYPREPARATION 82U /*The latency of key preparation operation is 82 clock cycles.*/ -#define CRYP_TIMEOUT_GCMCCMINITPHASE 299U /* The latency of GCM/CCM init phase to prepare hash subkey is 299 clock cycles.*/ +#define CRYP_TIMEOUT_GCMCCMINITPHASE 299U /* The latency of GCM/CCM init phase to prepare hash subkey is + 299 clock cycles.*/ #define CRYP_TIMEOUT_GCMCCMHEADERPHASE 290U /* The latency of GCM/CCM header phase is 290 clock cycles.*/ #define CRYP_PHASE_READY 0x00000001U /*!< CRYP peripheral is ready for initialization. */ @@ -1022,7 +1024,7 @@ HAL_StatusTypeDef HAL_CRYP_Encrypt(CRYP_HandleTypeDef *hcryp, uint32_t *Input, u /* AES encryption */ status = CRYP_AES_Encrypt(hcryp, Timeout); break; - #if defined (CRYP_CR_ALGOMODE_AES_GCM) +#if defined (CRYP_CR_ALGOMODE_AES_GCM) case CRYP_AES_GCM: /* AES GCM encryption */ @@ -1035,7 +1037,7 @@ HAL_StatusTypeDef HAL_CRYP_Encrypt(CRYP_HandleTypeDef *hcryp, uint32_t *Input, u /* AES CCM encryption */ status = CRYP_AESCCM_Process(hcryp, Timeout); break; - #endif /* GCM CCM defined*/ +#endif /* GCM CCM defined*/ default: hcryp->ErrorCode |= HAL_CRYP_ERROR_NOT_SUPPORTED; /* Change the CRYP peripheral state */ @@ -1197,7 +1199,7 @@ HAL_StatusTypeDef HAL_CRYP_Decrypt(CRYP_HandleTypeDef *hcryp, uint32_t *Input, u /* AES decryption */ status = CRYP_AES_Decrypt(hcryp, Timeout); break; - #if defined (CRYP_CR_ALGOMODE_AES_GCM) +#if defined (CRYP_CR_ALGOMODE_AES_GCM) case CRYP_AES_GCM: /* AES GCM decryption */ @@ -1209,7 +1211,7 @@ HAL_StatusTypeDef HAL_CRYP_Decrypt(CRYP_HandleTypeDef *hcryp, uint32_t *Input, u /* AES CCM decryption */ status = CRYP_AESCCM_Process(hcryp, Timeout); break; - #endif /* GCM CCM defined*/ +#endif /* GCM CCM defined*/ default: hcryp->ErrorCode |= HAL_CRYP_ERROR_NOT_SUPPORTED; /* Change the CRYP peripheral state */ @@ -1369,7 +1371,7 @@ HAL_StatusTypeDef HAL_CRYP_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint32_t *Input status = CRYP_AES_Encrypt_IT(hcryp); break; - #if defined (CRYP_CR_ALGOMODE_AES_GCM) +#if defined (CRYP_CR_ALGOMODE_AES_GCM) case CRYP_AES_GCM: status = CRYP_AESGCM_Process_IT(hcryp) ; @@ -1379,7 +1381,7 @@ HAL_StatusTypeDef HAL_CRYP_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint32_t *Input status = CRYP_AESCCM_Process_IT(hcryp); break; - #endif /* GCM CCM defined*/ +#endif /* GCM CCM defined*/ default: hcryp->ErrorCode |= HAL_CRYP_ERROR_NOT_SUPPORTED; /* Change the CRYP peripheral state */ @@ -1534,7 +1536,7 @@ HAL_StatusTypeDef HAL_CRYP_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint32_t *Input /* AES decryption */ status = CRYP_AES_Decrypt_IT(hcryp); break; - #if defined (CRYP_CR_ALGOMODE_AES_GCM) +#if defined (CRYP_CR_ALGOMODE_AES_GCM) case CRYP_AES_GCM: /* AES GCM decryption */ @@ -1546,7 +1548,7 @@ HAL_StatusTypeDef HAL_CRYP_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint32_t *Input /* AES CCMdecryption */ status = CRYP_AESCCM_Process_IT(hcryp); break; - #endif /* GCM CCM defined*/ +#endif /* GCM CCM defined*/ default: hcryp->ErrorCode |= HAL_CRYP_ERROR_NOT_SUPPORTED; /* Change the CRYP peripheral state */ @@ -1736,7 +1738,7 @@ HAL_StatusTypeDef HAL_CRYP_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint32_t *Inpu CRYP_SetDMAConfig(hcryp, (uint32_t)(hcryp->pCrypInBuffPtr), ((uint16_t)(hcryp->Size) / 4U), (uint32_t)(hcryp->pCrypOutBuffPtr)); break; - #if defined (CRYP_CR_ALGOMODE_AES_GCM) +#if defined (CRYP_CR_ALGOMODE_AES_GCM) case CRYP_AES_GCM: /* AES GCM encryption */ status = CRYP_AESGCM_Process_DMA(hcryp) ; @@ -1746,7 +1748,7 @@ HAL_StatusTypeDef HAL_CRYP_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint32_t *Inpu /* AES CCM encryption */ status = CRYP_AESCCM_Process_DMA(hcryp); break; - #endif /* GCM CCM defined*/ +#endif /* GCM CCM defined*/ default: hcryp->ErrorCode |= HAL_CRYP_ERROR_NOT_SUPPORTED; /* Change the CRYP peripheral state */ @@ -1806,7 +1808,8 @@ HAL_StatusTypeDef HAL_CRYP_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint32_t *Inpu hcryp->Phase = CRYP_PHASE_PROCESS; /* Start DMA process transfer for AES */ - CRYP_SetDMAConfig(hcryp, (uint32_t)(hcryp->pCrypInBuffPtr), (hcryp->Size / 4U), (uint32_t)(hcryp->pCrypOutBuffPtr)); + CRYP_SetDMAConfig(hcryp, (uint32_t)(hcryp->pCrypInBuffPtr), + (hcryp->Size / 4U), (uint32_t)(hcryp->pCrypOutBuffPtr)); break; case CRYP_AES_GCM_GMAC: @@ -1932,7 +1935,7 @@ HAL_StatusTypeDef HAL_CRYP_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint32_t *Inpu /* AES decryption */ status = CRYP_AES_Decrypt_DMA(hcryp); break; - #if defined (CRYP_CR_ALGOMODE_AES_GCM) +#if defined (CRYP_CR_ALGOMODE_AES_GCM) case CRYP_AES_GCM: /* AES GCM decryption */ status = CRYP_AESGCM_Process_DMA(hcryp) ; @@ -1942,7 +1945,7 @@ HAL_StatusTypeDef HAL_CRYP_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint32_t *Inpu /* AES CCM decryption */ status = CRYP_AESCCM_Process_DMA(hcryp); break; - #endif /* GCM CCM defined*/ +#endif /* GCM CCM defined*/ default: hcryp->ErrorCode |= HAL_CRYP_ERROR_NOT_SUPPORTED; /* Change the CRYP peripheral state */ @@ -2051,7 +2054,7 @@ void HAL_CRYP_IRQHandler(CRYP_HandleTypeDef *hcryp) { CRYP_AES_IT(hcryp); /*AES*/ } - #if defined (CRYP_CR_ALGOMODE_AES_GCM) +#if defined (CRYP_CR_ALGOMODE_AES_GCM) else if ((hcryp->Init.Algorithm == CRYP_AES_GCM) || (hcryp->Init.Algorithm == CRYP_CR_ALGOMODE_AES_CCM)) { /* if header phase */ @@ -2064,7 +2067,7 @@ void HAL_CRYP_IRQHandler(CRYP_HandleTypeDef *hcryp) CRYP_GCMCCM_SetPayloadPhase_IT(hcryp); } } - #endif /* GCM CCM defined*/ +#endif /* GCM CCM defined*/ else { /* Nothing to do */ @@ -2268,7 +2271,8 @@ static HAL_StatusTypeDef CRYP_TDES_Process(CRYP_HandleTypeDef *hcryp, uint32_t T if (((hcryp->Instance->SR & CRYP_FLAG_OFNE) != 0x0U) && (outcount < (hcryp->Size / 4U))) { - /* Read the output block from the Output FIFO and put them in temporary Buffer then get CrypOutBuff from temporary buffer */ + /* Read the output block from the Output FIFO and put them in temporary Buffer + then get CrypOutBuff from temporary buffer */ for (i = 0U; i < 2U; i++) { temp[i] = hcryp->Instance->DOUT; @@ -2337,7 +2341,8 @@ static void CRYP_TDES_IT(CRYP_HandleTypeDef *hcryp) { if (__HAL_CRYP_GET_FLAG(hcryp, CRYP_FLAG_OUTRIS) != 0x0U) { - /* Read the output block from the Output FIFO and put them in temporary Buffer then get CrypOutBuff from temporary buffer */ + /* Read the output block from the Output FIFO and put them in temporary Buffer + then get CrypOutBuff from temporary buffer */ for (i = 0U; i < 2U; i++) { temp[i] = hcryp->Instance->DOUT; @@ -2782,8 +2787,7 @@ static HAL_StatusTypeDef CRYP_AES_Decrypt_IT(CRYP_HandleTypeDef *hcryp) __HAL_UNLOCK(hcryp); return HAL_ERROR; } - } - while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)); + } while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)); /* Clear CCF Flag */ __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR); @@ -2825,8 +2829,7 @@ static HAL_StatusTypeDef CRYP_AES_Decrypt_IT(CRYP_HandleTypeDef *hcryp) __HAL_UNLOCK(hcryp); return HAL_ERROR; } - } - while (HAL_IS_BIT_SET(hcryp->Instance->SR, CRYP_FLAG_BUSY)); + } while (HAL_IS_BIT_SET(hcryp->Instance->SR, CRYP_FLAG_BUSY)); /* Turn back to ALGOMODE of the configuration */ MODIFY_REG(hcryp->Instance->CR, CRYP_CR_ALGOMODE, hcryp->Init.Algorithm); @@ -2967,8 +2970,7 @@ static HAL_StatusTypeDef CRYP_AES_Decrypt_DMA(CRYP_HandleTypeDef *hcryp) __HAL_UNLOCK(hcryp); return HAL_ERROR; } - } - while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)); + } while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)); /* Clear CCF Flag */ __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR); @@ -3012,8 +3014,7 @@ static HAL_StatusTypeDef CRYP_AES_Decrypt_DMA(CRYP_HandleTypeDef *hcryp) __HAL_UNLOCK(hcryp); return HAL_ERROR; } - } - while (HAL_IS_BIT_SET(hcryp->Instance->SR, CRYP_FLAG_BUSY)); + } while (HAL_IS_BIT_SET(hcryp->Instance->SR, CRYP_FLAG_BUSY)); /* Turn back to ALGOMODE of the configuration */ MODIFY_REG(hcryp->Instance->CR, CRYP_CR_ALGOMODE, hcryp->Init.Algorithm); @@ -3121,17 +3122,17 @@ static void CRYP_DMAOutCplt(DMA_HandleTypeDef *hdma) #if defined (CRYP) hcryp->Instance->DMACR &= (uint32_t)(~CRYP_DMACR_DOEN); - #if defined (CRYP_CR_ALGOMODE_AES_GCM) +#if defined (CRYP_CR_ALGOMODE_AES_GCM) if ((hcryp->Init.Algorithm & CRYP_AES_GCM) != CRYP_AES_GCM) { /* Disable CRYP (not allowed in GCM)*/ __HAL_CRYP_DISABLE(hcryp); } - #else /*NO GCM CCM */ +#else /*NO GCM CCM */ /* Disable CRYP */ __HAL_CRYP_DISABLE(hcryp); - #endif /* GCM CCM defined*/ +#endif /* GCM CCM defined*/ #else /* AES */ CLEAR_BIT(hcryp->Instance->CR, AES_CR_DMAOUTEN); @@ -3323,7 +3324,7 @@ static void CRYP_AES_ProcessData(CRYP_HandleTypeDef *hcryp, uint32_t Timeout) #if defined (CRYP) uint16_t incount; /* Temporary CrypInCount Value */ uint16_t outcount; /* Temporary CrypOutCount Value */ -#endif +#endif /* CRYP */ #if defined (CRYP) @@ -3369,7 +3370,8 @@ static void CRYP_AES_ProcessData(CRYP_HandleTypeDef *hcryp, uint32_t Timeout) if (((hcryp->Instance->SR & CRYP_FLAG_OFNE) != 0x0U) && (outcount < (hcryp->Size / 4U))) { - /* Read the output block from the Output FIFO and put them in temporary buffer then get CrypOutBuff from temporary buffer */ + /* Read the output block from the Output FIFO and put them in temporary buffer + then get CrypOutBuff from temporary buffer */ for (i = 0U; i < 4U; i++) { temp[i] = hcryp->Instance->DOUT; @@ -3419,7 +3421,8 @@ static void CRYP_AES_ProcessData(CRYP_HandleTypeDef *hcryp, uint32_t Timeout) /* Clear CCF Flag */ __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR); - /* Read the output block from the output FIFO and put them in temporary buffer then get CrypOutBuff from temporary buffer*/ + /* Read the output block from the output FIFO and put them in temporary buffer + then get CrypOutBuff from temporary buffer*/ for (i = 0U; i < 4U; i++) { temp[i] = hcryp->Instance->DOUTR; @@ -3449,7 +3452,7 @@ static void CRYP_AES_IT(CRYP_HandleTypeDef *hcryp) #if defined (CRYP) uint16_t incount; /* Temporary CrypInCount Value */ uint16_t outcount; /* Temporary CrypOutCount Value */ -#endif +#endif /* CRYP */ if (hcryp->State == HAL_CRYP_STATE_BUSY) { @@ -3488,7 +3491,8 @@ static void CRYP_AES_IT(CRYP_HandleTypeDef *hcryp) if (((hcryp->Instance->SR & CRYP_FLAG_OFNE) != 0x0U) && (outcount < (hcryp->Size / 4U))) { - /* Read the output block from the output FIFO and put them in temporary buffer then get CrypOutBuff from temporary buffer */ + /* Read the output block from the output FIFO and put them in temporary buffer + then get CrypOutBuff from temporary buffer */ for (i = 0U; i < 4U; i++) { temp[i] = hcryp->Instance->DOUT; @@ -3524,10 +3528,10 @@ static void CRYP_AES_IT(CRYP_HandleTypeDef *hcryp) #endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */ } } - #else /*AES*/ - /* Read the output block from the output FIFO and put them in temporary buffer then get CrypOutBuff from temporary buffer*/ + /* Read the output block from the output FIFO and put them in temporary buffer + then get CrypOutBuff from temporary buffer*/ for (i = 0U; i < 4U; i++) { temp[i] = hcryp->Instance->DOUTR; @@ -3951,8 +3955,7 @@ static HAL_StatusTypeDef CRYP_AESGCM_Process_IT(CRYP_HandleTypeDef *hcryp) __HAL_UNLOCK(hcryp); return HAL_ERROR; } - } - while ((hcryp->Instance->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN); + } while ((hcryp->Instance->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN); #else /* AES */ @@ -3989,8 +3992,7 @@ static HAL_StatusTypeDef CRYP_AESGCM_Process_IT(CRYP_HandleTypeDef *hcryp) __HAL_UNLOCK(hcryp); return HAL_ERROR; } - } - while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)); + } while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)); /* Clear CCF flag */ __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR); @@ -4228,8 +4230,7 @@ static HAL_StatusTypeDef CRYP_AESGCM_Process_DMA(CRYP_HandleTypeDef *hcryp) __HAL_UNLOCK(hcryp); return HAL_ERROR; } - } - while ((hcryp->Instance->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN); + } while ((hcryp->Instance->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN); #else /* AES */ @@ -4266,8 +4267,7 @@ static HAL_StatusTypeDef CRYP_AESGCM_Process_DMA(CRYP_HandleTypeDef *hcryp) __HAL_UNLOCK(hcryp); return HAL_ERROR; } - } - while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)); + } while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)); /* Clear CCF flag */ __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR); @@ -4300,13 +4300,15 @@ static HAL_StatusTypeDef CRYP_AESGCM_Process_DMA(CRYP_HandleTypeDef *hcryp) if (hcryp->Size != 0U) { - /* CRYP1 IP V < 2.2.1 Size should be %4 otherwise Tag will be incorrectly generated for GCM Encryption: + /* CRYP1 IP V < 2.2.1 Size should be %4 otherwise Tag will + be incorrectly generated for GCM Encryption: Workaround is implemented in polling mode, so if last block of payload <128bit don't use DMA mode otherwise TAG is incorrectly generated . */ /* Set the input and output addresses and start DMA transfer */ if ((hcryp->Size % 16U) == 0U) { - CRYP_SetDMAConfig(hcryp, (uint32_t)(hcryp->pCrypInBuffPtr), (hcryp->Size / 4U), (uint32_t)(hcryp->pCrypOutBuffPtr)); + CRYP_SetDMAConfig(hcryp, (uint32_t)(hcryp->pCrypInBuffPtr), (hcryp->Size / 4U), + (uint32_t)(hcryp->pCrypOutBuffPtr)); } else /*to compute last word<128bits, otherwise it will not be encrypted/decrypted */ { @@ -4535,7 +4537,8 @@ static HAL_StatusTypeDef CRYP_AESCCM_Process(CRYP_HandleTypeDef *hcryp, uint32_t else { /*Write Header block in the IN FIFO without last block */ - for (loopcounter = 0U; (loopcounter < ((hcryp->Init.HeaderSize) - (hcryp->Init.HeaderSize % 4U))); loopcounter += 4U) + for (loopcounter = 0U; (loopcounter < ((hcryp->Init.HeaderSize) - (hcryp->Init.HeaderSize % 4U))); + loopcounter += 4U) { /* Write the input block in the data input register */ hcryp->Instance->DINR = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount); @@ -4748,8 +4751,9 @@ static HAL_StatusTypeDef CRYP_AESCCM_Process(CRYP_HandleTypeDef *hcryp, uint32_t if ((hcryp->Size % 16U) != 0U) { - /* CRYP Workaround : CRYP1 generates correct TAG during CCM decryption only when ciphertext blocks size is multiple of - 128 bits. If lthe size of the last block of payload is inferior to 128 bits, when CCM decryption + /* CRYP Workaround : CRYP1 generates correct TAG during CCM decryption + only when ciphertext blocks size is multiple of 128 bits. If lthe size of + the last block of payload is inferior to 128 bits, when CCM decryption is selected, then the TAG message will be wrong.*/ CRYP_Workaround(hcryp, Timeout); } @@ -4867,8 +4871,7 @@ static HAL_StatusTypeDef CRYP_AESCCM_Process_IT(CRYP_HandleTypeDef *hcryp) __HAL_UNLOCK(hcryp); return HAL_ERROR; } - } - while ((hcryp->Instance->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN); + } while ((hcryp->Instance->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN); /* Select header phase */ CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); @@ -4932,7 +4935,7 @@ static HAL_StatusTypeDef CRYP_AESCCM_Process_DMA(CRYP_HandleTypeDef *hcryp) uint32_t loopcounter; uint32_t npblb; uint32_t lastwordsize; -#endif +#endif /* AES */ if (hcryp->Init.KeyIVConfigSkip == CRYP_KEYIVCONFIG_ONCE) { @@ -5029,8 +5032,7 @@ static HAL_StatusTypeDef CRYP_AESCCM_Process_DMA(CRYP_HandleTypeDef *hcryp) __HAL_UNLOCK(hcryp); return HAL_ERROR; } - } - while ((hcryp->Instance->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN); + } while ((hcryp->Instance->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN); #else /* AES */ @@ -5076,8 +5078,7 @@ static HAL_StatusTypeDef CRYP_AESCCM_Process_DMA(CRYP_HandleTypeDef *hcryp) __HAL_UNLOCK(hcryp); return HAL_ERROR; } - } - while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)); + } while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)); /* Clear CCF flag */ __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR); @@ -5122,8 +5123,7 @@ static HAL_StatusTypeDef CRYP_AESCCM_Process_DMA(CRYP_HandleTypeDef *hcryp) __HAL_UNLOCK(hcryp); return HAL_ERROR; } - } - while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)); + } while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)); /* Clear CCF flag */ __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR); } @@ -5131,7 +5131,8 @@ static HAL_StatusTypeDef CRYP_AESCCM_Process_DMA(CRYP_HandleTypeDef *hcryp) else { /*Write Header block in the IN FIFO without last block */ - for (loopcounter = 0U; (loopcounter < ((hcryp->Init.HeaderSize) - (hcryp->Init.HeaderSize % 4U))); loopcounter += 4U) + for (loopcounter = 0U; (loopcounter < ((hcryp->Init.HeaderSize) - (hcryp->Init.HeaderSize % 4U))); + loopcounter += 4U) { /* Write the input block in the data input register */ hcryp->Instance->DINR = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount); @@ -5160,8 +5161,7 @@ static HAL_StatusTypeDef CRYP_AESCCM_Process_DMA(CRYP_HandleTypeDef *hcryp) __HAL_UNLOCK(hcryp); return HAL_ERROR; } - } - while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)); + } while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)); /* Clear CCF flag */ __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR); } @@ -5195,8 +5195,7 @@ static HAL_StatusTypeDef CRYP_AESCCM_Process_DMA(CRYP_HandleTypeDef *hcryp) __HAL_UNLOCK(hcryp); return HAL_ERROR; } - } - while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)); + } while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)); /* Clear CCF flag */ __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR); } @@ -5210,7 +5209,8 @@ static HAL_StatusTypeDef CRYP_AESCCM_Process_DMA(CRYP_HandleTypeDef *hcryp) { if ((hcryp->Size % 16U) == 0U) { - CRYP_SetDMAConfig(hcryp, (uint32_t)(hcryp->pCrypInBuffPtr), (hcryp->Size / 4U), (uint32_t)(hcryp->pCrypOutBuffPtr)); + CRYP_SetDMAConfig(hcryp, (uint32_t)(hcryp->pCrypInBuffPtr), (hcryp->Size / 4U), + (uint32_t)(hcryp->pCrypOutBuffPtr)); } else /*to compute last word<128bits, otherwise it will not be encrypted/decrypted */ { @@ -5265,8 +5265,7 @@ static HAL_StatusTypeDef CRYP_AESCCM_Process_DMA(CRYP_HandleTypeDef *hcryp) __HAL_UNLOCK(hcryp); return HAL_ERROR; } - } - while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)); + } while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)); /* Clear CCF flag */ __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR); @@ -5397,7 +5396,8 @@ static void CRYP_GCMCCM_SetPayloadPhase_IT(CRYP_HandleTypeDef *hcryp) } if (hcryp->CrypOutCount < (hcryp->Size / 4U)) { - /* Read the output block from the Output FIFO and put them in temporary buffer then get CrypOutBuff from temporary buffer */ + /* Read the output block from the Output FIFO and put them in temporary buffer + then get CrypOutBuff from temporary buffer */ for (i = 0U; i < 4U; i++) { temp[i] = hcryp->Instance->DOUT; @@ -5436,7 +5436,8 @@ static void CRYP_GCMCCM_SetPayloadPhase_IT(CRYP_HandleTypeDef *hcryp) } else if ((hcryp->Size % 16U) != 0U) { - /* Size should be %4 in word and %16 in byte otherwise TAG will be incorrectly generated for GCM Encryption & CCM Decryption + /* Size should be %4 in word and %16 in byte otherwise TAG will + be incorrectly generated for GCM Encryption & CCM Decryption Workaround is implemented in polling mode, so if last block of payload <128bit don't use CRYP_AESGCM_Encrypt_IT otherwise TAG is incorrectly generated. */ @@ -5516,7 +5517,8 @@ static void CRYP_GCMCCM_SetPayloadPhase_IT(CRYP_HandleTypeDef *hcryp) } #else /* AES */ - /* Read the output block from the output FIFO and put them in temporary buffer then get CrypOutBuff from temporary buffer*/ + /* Read the output block from the output FIFO and put them in temporary buffer + then get CrypOutBuff from temporary buffer*/ for (i = 0U; i < 4U; i++) { temp[i] = hcryp->Instance->DOUTR; @@ -5578,8 +5580,9 @@ static void CRYP_GCMCCM_SetPayloadPhase_IT(CRYP_HandleTypeDef *hcryp) else /* Last block of payload < 128bit*/ { /* Workaround not implemented, Size should be %4 otherwise Tag will be incorrectly - generated for GCM Encryption & CCM Decryption. Workaround is implemented in polling mode, so if last block of - payload <128bit don't use CRYP_Encrypt_IT otherwise TAG is incorrectly generated for GCM Encryption & CCM Decryption. */ + generated for GCM Encryption & CCM Decryption. Workaround is implemented in polling mode, + so if last block of payload <128bit don't use CRYP_Encrypt_IT otherwise TAG is incorrectly + generated for GCM Encryption & CCM Decryption. */ /* Compute the number of padding bytes in last block of payload */ npblb = ((((uint32_t)(hcryp->Size) / 16U) + 1U) * 16U) - (uint32_t)(hcryp->Size); @@ -5626,7 +5629,8 @@ static HAL_StatusTypeDef CRYP_GCMCCM_SetHeaderPhase(CRYP_HandleTypeDef *hcryp, u uint32_t tmp; uint32_t mask[12] = {0x0U, 0xFF000000U, 0xFFFF0000U, 0xFFFFFF00U, /* 32-bit data type */ 0x0U, 0x0000FF00U, 0x0000FFFFU, 0xFF00FFFFU, /* 16-bit data type */ - 0x0U, 0x000000FFU, 0x0000FFFFU, 0x00FFFFFFU}; /* 8-bit data type */ + 0x0U, 0x000000FFU, 0x0000FFFFU, 0x00FFFFFFU + }; /* 8-bit data type */ /***************************** Header phase for GCM/GMAC or CCM *********************************/ @@ -5729,7 +5733,7 @@ static HAL_StatusTypeDef CRYP_GCMCCM_SetHeaderPhase(CRYP_HandleTypeDef *hcryp, u { /* Enter last bytes, padded with zeroes */ tmp = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount); - tmp &= mask[(hcryp->Init.DataType * 2U) + (size_in_bytes % 4U)]; + tmp &= mask[(((hcryp->Init.DataType) >> 5) * 2U) + (size_in_bytes % 4U)]; hcryp->Instance->DIN = tmp; loopcounter++; /* Pad the data with zeros to have a complete block */ @@ -5930,7 +5934,8 @@ static HAL_StatusTypeDef CRYP_GCMCCM_SetHeaderPhase_DMA(CRYP_HandleTypeDef *hcry uint32_t tmp; uint32_t mask[12] = {0x0U, 0xFF000000U, 0xFFFF0000U, 0xFFFFFF00U, /* 32-bit data type */ 0x0U, 0x0000FF00U, 0x0000FFFFU, 0xFF00FFFFU, /* 16-bit data type */ - 0x0U, 0x000000FFU, 0x0000FFFFU, 0x00FFFFFFU}; /* 8-bit data type */ + 0x0U, 0x000000FFU, 0x0000FFFFU, 0x00FFFFFFU + }; /* 8-bit data type */ /***************************** Header phase for GCM/GMAC or CCM *********************************/ if (hcryp->Init.HeaderWidthUnit == CRYP_HEADERWIDTHUNIT_WORD) @@ -5985,8 +5990,7 @@ static HAL_StatusTypeDef CRYP_GCMCCM_SetHeaderPhase_DMA(CRYP_HandleTypeDef *hcry __HAL_UNLOCK(hcryp); return HAL_ERROR; } - } - while (HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_IFEM)); + } while (HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_IFEM)); } } else @@ -6021,8 +6025,7 @@ static HAL_StatusTypeDef CRYP_GCMCCM_SetHeaderPhase_DMA(CRYP_HandleTypeDef *hcry __HAL_UNLOCK(hcryp); return HAL_ERROR; } - } - while (HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_IFEM)); + } while (HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_IFEM)); } /* Last block optionally pad the data with zeros*/ for (loopcounter = 0U; (loopcounter < ((headersize_in_bytes / 4U) % 4U)); loopcounter++) @@ -6044,7 +6047,7 @@ static HAL_StatusTypeDef CRYP_GCMCCM_SetHeaderPhase_DMA(CRYP_HandleTypeDef *hcry { /* Enter last bytes, padded with zeroes */ tmp = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount); - tmp &= mask[(hcryp->Init.DataType * 2U) + (headersize_in_bytes % 4U)]; + tmp &= mask[(((hcryp->Init.DataType) >> 5) * 2U) + (headersize_in_bytes % 4U)]; hcryp->Instance->DIN = tmp; loopcounter++; /* Pad the data with zeros to have a complete block */ @@ -6072,8 +6075,7 @@ static HAL_StatusTypeDef CRYP_GCMCCM_SetHeaderPhase_DMA(CRYP_HandleTypeDef *hcry __HAL_UNLOCK(hcryp); return HAL_ERROR; } - } - while (HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_IFEM)); + } while (HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_IFEM)); } /* Wait until the complete message has been processed */ count = CRYP_TIMEOUT_GCMCCMHEADERPHASE; @@ -6093,8 +6095,7 @@ static HAL_StatusTypeDef CRYP_GCMCCM_SetHeaderPhase_DMA(CRYP_HandleTypeDef *hcry __HAL_UNLOCK(hcryp); return HAL_ERROR; } - } - while (HAL_IS_BIT_SET(hcryp->Instance->SR, CRYP_FLAG_BUSY)); + } while (HAL_IS_BIT_SET(hcryp->Instance->SR, CRYP_FLAG_BUSY)); #else /* AES */ @@ -6142,8 +6143,7 @@ static HAL_StatusTypeDef CRYP_GCMCCM_SetHeaderPhase_DMA(CRYP_HandleTypeDef *hcry __HAL_UNLOCK(hcryp); return HAL_ERROR; } - } - while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)); + } while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)); /* Clear CCF flag */ __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR); @@ -6182,8 +6182,7 @@ static HAL_StatusTypeDef CRYP_GCMCCM_SetHeaderPhase_DMA(CRYP_HandleTypeDef *hcry __HAL_UNLOCK(hcryp); return HAL_ERROR; } - } - while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)); + } while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)); /* Clear CCF flag */ __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR); @@ -6236,8 +6235,7 @@ static HAL_StatusTypeDef CRYP_GCMCCM_SetHeaderPhase_DMA(CRYP_HandleTypeDef *hcry __HAL_UNLOCK(hcryp); return HAL_ERROR; } - } - while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)); + } while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)); /* Clear CCF flag */ __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR); @@ -6273,15 +6271,16 @@ static HAL_StatusTypeDef CRYP_GCMCCM_SetHeaderPhase_DMA(CRYP_HandleTypeDef *hcry static void CRYP_GCMCCM_SetHeaderPhase_IT(CRYP_HandleTypeDef *hcryp) { uint32_t loopcounter; + uint32_t headersize_in_bytes; #if defined(AES) uint32_t lastwordsize; uint32_t npblb; -#endif - uint32_t headersize_in_bytes; +#endif /* AES */ uint32_t tmp; uint32_t mask[12] = {0x0U, 0xFF000000U, 0xFFFF0000U, 0xFFFFFF00U, /* 32-bit data type */ 0x0U, 0x0000FF00U, 0x0000FFFFU, 0xFF00FFFFU, /* 16-bit data type */ - 0x0U, 0x000000FFU, 0x0000FFFFU, 0x00FFFFFFU}; /* 8-bit data type */ + 0x0U, 0x000000FFU, 0x0000FFFFU, 0x00FFFFFFU + }; /* 8-bit data type */ if (hcryp->Init.HeaderWidthUnit == CRYP_HEADERWIDTHUNIT_WORD) { @@ -6350,7 +6349,7 @@ static void CRYP_GCMCCM_SetHeaderPhase_IT(CRYP_HandleTypeDef *hcryp) { /* Enter last bytes, padded with zeros */ tmp = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount); - tmp &= mask[(hcryp->Init.DataType * 2U) + (headersize_in_bytes % 4U)]; + tmp &= mask[(((hcryp->Init.DataType) >> 5) * 2U) + (headersize_in_bytes % 4U)]; hcryp->Instance->DIN = tmp; loopcounter++; hcryp->CrypHeaderCount++; @@ -7135,8 +7134,6 @@ static HAL_StatusTypeDef CRYP_WaitOnCCFlag(CRYP_HandleTypeDef *hcryp, uint32_t T * @} */ - - /** * @} */ diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cryp_ex.c b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cryp_ex.c index 3a828473b5..fed271c4d0 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cryp_ex.c +++ b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cryp_ex.c @@ -93,7 +93,6 @@ /* Private function prototypes -----------------------------------------------*/ - /* Exported functions---------------------------------------------------------*/ /** @addtogroup CRYPEx_Exported_Functions * @{ diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dac.c b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dac.c index 8953638e5d..4fafe0bb6e 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dac.c +++ b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dac.c @@ -534,7 +534,11 @@ HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel) HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, const uint32_t *pData, uint32_t Length, uint32_t Alignment) { +#if defined(DAC_CHANNEL2_SUPPORT) + HAL_StatusTypeDef status; +#else HAL_StatusTypeDef status = HAL_ERROR; +#endif /* DAC_CHANNEL2_SUPPORT */ uint32_t tmpreg; /* Check the DAC peripheral handle */ diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dcmi.c b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dcmi.c index 67a8e102b1..c21f60c04a 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dcmi.c +++ b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dcmi.c @@ -346,6 +346,8 @@ __weak void HAL_DCMI_MspDeInit(DCMI_HandleTypeDef* hdcmi) */ HAL_StatusTypeDef HAL_DCMI_Start_DMA(DCMI_HandleTypeDef* hdcmi, uint32_t DCMI_Mode, uint32_t pData, uint32_t Length) { + HAL_StatusTypeDef status; + /* Initialize the second memory address */ uint32_t SecondMemAddress = 0U; @@ -381,7 +383,7 @@ HAL_StatusTypeDef HAL_DCMI_Start_DMA(DCMI_HandleTypeDef* hdcmi, uint32_t DCMI_Mo if(Length <= 0xFFFFU) { /* Enable the DMA Stream */ - HAL_DMA_Start_IT(hdcmi->DMA_Handle, (uint32_t)&hdcmi->Instance->DR, (uint32_t)pData, Length); + status = HAL_DMA_Start_IT(hdcmi->DMA_Handle, (uint32_t)&hdcmi->Instance->DR, (uint32_t)pData, Length); } else /* DCMI_DOUBLE_BUFFER Mode */ { @@ -408,7 +410,7 @@ HAL_StatusTypeDef HAL_DCMI_Start_DMA(DCMI_HandleTypeDef* hdcmi, uint32_t DCMI_Mo SecondMemAddress = (uint32_t)(pData + (4U*hdcmi->XferSize)); /* Start DMA multi buffer transfer */ - HAL_DMAEx_MultiBufferStart_IT(hdcmi->DMA_Handle, (uint32_t)&hdcmi->Instance->DR, (uint32_t)pData, SecondMemAddress, hdcmi->XferSize); + status = HAL_DMAEx_MultiBufferStart_IT(hdcmi->DMA_Handle, (uint32_t)&hdcmi->Instance->DR, (uint32_t)pData, SecondMemAddress, hdcmi->XferSize); } /* Enable Capture */ @@ -418,7 +420,7 @@ HAL_StatusTypeDef HAL_DCMI_Start_DMA(DCMI_HandleTypeDef* hdcmi, uint32_t DCMI_Mo __HAL_UNLOCK(hdcmi); /* Return function status */ - return HAL_OK; + return status; } /** @@ -572,7 +574,10 @@ void HAL_DCMI_IRQHandler(DCMI_HandleTypeDef *hdcmi) hdcmi->DMA_Handle->XferAbortCallback = DCMI_DMAError; /* Abort the DMA Transfer */ - HAL_DMA_Abort_IT(hdcmi->DMA_Handle); + if (HAL_DMA_Abort_IT(hdcmi->DMA_Handle) != HAL_OK) + { + DCMI_DMAError(hdcmi->DMA_Handle); + } } /* Overflow interrupt management ********************************************/ if((isr_value & DCMI_FLAG_OVRRI) == DCMI_FLAG_OVRRI) @@ -590,7 +595,10 @@ void HAL_DCMI_IRQHandler(DCMI_HandleTypeDef *hdcmi) hdcmi->DMA_Handle->XferAbortCallback = DCMI_DMAError; /* Abort the DMA Transfer */ - HAL_DMA_Abort_IT(hdcmi->DMA_Handle); + if (HAL_DMA_Abort_IT(hdcmi->DMA_Handle) != HAL_OK) + { + DCMI_DMAError(hdcmi->DMA_Handle); + } } /* Line Interrupt management ************************************************/ if((isr_value & DCMI_FLAG_LINERI) == DCMI_FLAG_LINERI) diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c index 76f2b4673e..f5b1845056 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c +++ b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c @@ -314,7 +314,7 @@ HAL_StatusTypeDef HAL_DMA2D_DeInit(DMA2D_HandleTypeDef *hdma2d) /* Before aborting any DMA2D transfer or CLUT loading, check first whether or not DMA2D clock is enabled */ - if (__HAL_RCC_DMA2D_IS_CLK_ENABLED()) + if (__HAL_RCC_DMA2D_IS_CLK_ENABLED() == 1U) { /* Abort DMA2D transfer if any */ if ((hdma2d->Instance->CR & DMA2D_CR_START) == DMA2D_CR_START) @@ -971,7 +971,8 @@ HAL_StatusTypeDef HAL_DMA2D_EnableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t Lay * DMA2D_BACKGROUND_LAYER(0) / DMA2D_FOREGROUND_LAYER(1) * @retval HAL status */ -HAL_StatusTypeDef HAL_DMA2D_CLUTStartLoad(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef *CLUTCfg, uint32_t LayerIdx) +HAL_StatusTypeDef HAL_DMA2D_CLUTStartLoad(DMA2D_HandleTypeDef *hdma2d, const DMA2D_CLUTCfgTypeDef *CLUTCfg, + uint32_t LayerIdx) { /* Check the parameters */ assert_param(IS_DMA2D_LAYER(LayerIdx)); @@ -1025,7 +1026,7 @@ HAL_StatusTypeDef HAL_DMA2D_CLUTStartLoad(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLU * DMA2D_BACKGROUND_LAYER(0) / DMA2D_FOREGROUND_LAYER(1) * @retval HAL status */ -HAL_StatusTypeDef HAL_DMA2D_CLUTStartLoad_IT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef *CLUTCfg, +HAL_StatusTypeDef HAL_DMA2D_CLUTStartLoad_IT(DMA2D_HandleTypeDef *hdma2d, const DMA2D_CLUTCfgTypeDef *CLUTCfg, uint32_t LayerIdx) { /* Check the parameters */ @@ -1728,7 +1729,7 @@ __weak void HAL_DMA2D_CLUTLoadingCpltCallback(DMA2D_HandleTypeDef *hdma2d) */ HAL_StatusTypeDef HAL_DMA2D_ConfigLayer(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx) { - DMA2D_LayerCfgTypeDef *pLayerCfg; + const DMA2D_LayerCfgTypeDef *pLayerCfg; uint32_t regMask; uint32_t regValue; @@ -2007,7 +2008,7 @@ HAL_StatusTypeDef HAL_DMA2D_ConfigDeadTime(DMA2D_HandleTypeDef *hdma2d, uint8_t * the configuration information for the DMA2D. * @retval HAL state */ -HAL_DMA2D_StateTypeDef HAL_DMA2D_GetState(DMA2D_HandleTypeDef *hdma2d) +HAL_DMA2D_StateTypeDef HAL_DMA2D_GetState(const DMA2D_HandleTypeDef *hdma2d) { return hdma2d->State; } @@ -2018,7 +2019,7 @@ HAL_DMA2D_StateTypeDef HAL_DMA2D_GetState(DMA2D_HandleTypeDef *hdma2d) * the configuration information for DMA2D. * @retval DMA2D Error Code */ -uint32_t HAL_DMA2D_GetError(DMA2D_HandleTypeDef *hdma2d) +uint32_t HAL_DMA2D_GetError(const DMA2D_HandleTypeDef *hdma2d) { return hdma2d->ErrorCode; } diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.c b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.c index f1a00e3f18..8530e8106d 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.c +++ b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.c @@ -83,6 +83,7 @@ (##) HAL_ETH_PTP_GetTime(): Get Seconds and Nanoseconds for the Ethernet PTP registers (##) HAL_ETH_PTP_SetTime(): Set Seconds and Nanoseconds for the Ethernet PTP registers (##) HAL_ETH_PTP_AddTimeOffset(): Add Seconds and Nanoseconds offset for the Ethernet PTP registers + (##) HAL_ETH_PTP_AddendUpdate(): Update the Addend register (##) HAL_ETH_PTP_InsertTxTimestamp(): Insert Timestamp in transmission (##) HAL_ETH_PTP_GetTxTimestamp(): Get transmission timestamp (##) HAL_ETH_PTP_GetRxTimestamp(): Get reception timestamp @@ -290,6 +291,11 @@ static void ETH_MACAddressConfig(ETH_HandleTypeDef *heth, uint32_t MacAddr, uint #if (USE_HAL_ETH_REGISTER_CALLBACKS == 1) static void ETH_InitCallbacksToDefault(ETH_HandleTypeDef *heth); #endif /* USE_HAL_ETH_REGISTER_CALLBACKS */ + +#ifdef HAL_ETH_USE_PTP +static HAL_StatusTypeDef HAL_ETH_PTP_AddendUpdate(ETH_HandleTypeDef *heth, int32_t timeoffset); +#endif /* HAL_ETH_USE_PTP */ + /** * @} */ @@ -1124,7 +1130,7 @@ HAL_StatusTypeDef HAL_ETH_ReadData(ETH_HandleTypeDef *heth, void **pAppBuff) heth->RxDescList.RxDataLength = 0; } - /* Get the Frame Length of the received packet: substruct 4 bytes of the CRC */ + /* Get the Frame Length of the received packet */ bufflength = ((dmarxdesc->DESC0 & ETH_DMARXDESC_FL) >> ETH_DMARXDESC_FRAMELENGTHSHIFT); /* Check if last descriptor */ @@ -1254,7 +1260,7 @@ static void ETH_UpdateDescriptor(ETH_HandleTypeDef *heth) if (heth->RxDescList.RxBuildDescCnt != desccount) { /* Set the tail pointer index */ - tailidx = (descidx + 1U) % ETH_RX_DESC_CNT; + tailidx = (ETH_RX_DESC_CNT + descidx - 1U) % ETH_RX_DESC_CNT; /* DMB instruction to avoid race condition */ __DMB(); @@ -1472,8 +1478,8 @@ HAL_StatusTypeDef HAL_ETH_ReleaseTxPacket(ETH_HandleTypeDef *heth) if ((heth->Init.TxDesc[idx].DESC0 & ETH_DMATXDESC_OWN) == 0U) { #ifdef HAL_ETH_USE_PTP - if ((heth->Init.TxDesc[idx].DESC3 & ETH_DMATXDESC_LS) - && (heth->Init.TxDesc[idx].DESC3 & ETH_DMATXDESC_TTSS)) + if ((heth->Init.TxDesc[idx].DESC0 & ETH_DMATXDESC_LS) + && (heth->Init.TxDesc[idx].DESC0 & ETH_DMATXDESC_TTSS)) { /* Get timestamp low */ timestamp->TimeStampLow = heth->Init.TxDesc[idx].DESC6; @@ -1547,6 +1553,9 @@ HAL_StatusTypeDef HAL_ETH_PTP_SetConfig(ETH_HandleTypeDef *heth, ETH_PTP_ConfigT return HAL_ERROR; } + /* Mask the Timestamp Trigger interrupt */ + CLEAR_BIT(heth->Instance->MACIMR, ETH_MACIMR_TSTIM); + tmpTSCR = ptpconfig->Timestamp | ((uint32_t)ptpconfig->TimestampUpdate << ETH_PTPTSCR_TSFCU_Pos) | ((uint32_t)ptpconfig->TimestampAll << ETH_PTPTSCR_TSSARFE_Pos) | @@ -1578,8 +1587,11 @@ HAL_StatusTypeDef HAL_ETH_PTP_SetConfig(ETH_HandleTypeDef *heth, ETH_PTP_ConfigT } } - /* Ptp Init */ - SET_BIT(heth->Instance->PTPTSCR, ETH_PTPTSCR_TSSTI); + /* Enable Update mode */ + if (ptpconfig->TimestampUpdateMode == ENABLE) + { + SET_BIT(heth->Instance->PTPTSCR, ETH_PTPTSCR_TSFCU); + } /* Set PTP Configuration done */ heth->IsPtpConfigured = HAL_ETH_PTP_CONFIGURED; @@ -1591,6 +1603,9 @@ HAL_StatusTypeDef HAL_ETH_PTP_SetConfig(ETH_HandleTypeDef *heth, ETH_PTP_ConfigT HAL_ETH_PTP_SetTime(heth, &time); + /* Ptp Init */ + SET_BIT(heth->Instance->PTPTSCR, ETH_PTPTSCR_TSSTI); + /* Return function status */ return HAL_OK; } @@ -1708,6 +1723,7 @@ HAL_StatusTypeDef HAL_ETH_PTP_GetTime(ETH_HandleTypeDef *heth, ETH_TimeTypeDef * HAL_StatusTypeDef HAL_ETH_PTP_AddTimeOffset(ETH_HandleTypeDef *heth, ETH_PtpUpdateTypeDef ptpoffsettype, ETH_TimeTypeDef *timeoffset) { + int32_t addendtime ; if (heth->IsPtpConfigured == HAL_ETH_PTP_CONFIGURED) { if (ptpoffsettype == HAL_ETH_PTP_NEGATIVE_UPDATE) @@ -1724,6 +1740,11 @@ HAL_StatusTypeDef HAL_ETH_PTP_AddTimeOffset(ETH_HandleTypeDef *heth, ETH_PtpUpda { heth->Instance->PTPTSLUR = ETH_PTPTSHR_VALUE - timeoffset->NanoSeconds + 1U; } + + /* adjust negative addend register */ + addendtime = - timeoffset->NanoSeconds; + HAL_ETH_PTP_AddendUpdate(heth, addendtime); + } else { @@ -1731,6 +1752,11 @@ HAL_StatusTypeDef HAL_ETH_PTP_AddTimeOffset(ETH_HandleTypeDef *heth, ETH_PtpUpda heth->Instance->PTPTSHUR = timeoffset->Seconds; /* Set nanoSeconds update */ heth->Instance->PTPTSLUR = timeoffset->NanoSeconds; + + /* adjust positive addend register */ + addendtime = timeoffset->NanoSeconds; + HAL_ETH_PTP_AddendUpdate(heth, addendtime); + } SET_BIT(heth->Instance->PTPTSCR, ETH_PTPTSCR_TSSTU); @@ -1745,6 +1771,40 @@ HAL_StatusTypeDef HAL_ETH_PTP_AddTimeOffset(ETH_HandleTypeDef *heth, ETH_PtpUpda } } +/** + * @brief Update the Addend register + * @param heth: Pointer to a ETH_HandleTypeDef structure that contains + * the configuration information for ETHERNET module + * @param timeoffset: The value of the time offset to be added to + * the addend register in Nanoseconds + * @retval HAL status + */ +static HAL_StatusTypeDef HAL_ETH_PTP_AddendUpdate(ETH_HandleTypeDef *heth, int32_t timeoffset) +{ + uint32_t tmpreg; + if (heth->IsPtpConfigured == HAL_ETH_PTP_CONFIGURED) + { + /* update the addend register */ + + tmpreg = READ_REG(heth->Instance->PTPTSAR); + tmpreg += timeoffset ; + WRITE_REG(heth->Instance->PTPTSAR, tmpreg); + + SET_BIT(heth->Instance->PTPTSCR, ETH_PTPTSCR_TSARU); + while ((heth->Instance->PTPTSCR & ETH_PTPTSCR_TSARU) != 0) + { + + } + + /* Return function status */ + return HAL_OK; + } + else + { + /* Return function status */ + return HAL_ERROR; + } +} /** * @brief Insert Timestamp in transmission. * @param heth: pointer to a ETH_HandleTypeDef structure that contains @@ -2398,7 +2458,7 @@ HAL_StatusTypeDef HAL_ETH_SetMACFilterConfig(ETH_HandleTypeDef *heth, const ETH_ ((uint32_t)pFilterConfig->HashMulticast << 2) | ((uint32_t)pFilterConfig->DestAddrInverseFiltering << 3) | ((uint32_t)pFilterConfig->PassAllMulticast << 4) | - ((uint32_t)((pFilterConfig->BroadcastFilter == DISABLE) ? 1U : 0U) << 5) | + ((uint32_t)((pFilterConfig->BroadcastFilter == ENABLE) ? 1U : 0U) << 5) | ((uint32_t)pFilterConfig->SrcAddrInverseFiltering << 8) | ((uint32_t)pFilterConfig->SrcAddrFiltering << 9) | ((uint32_t)pFilterConfig->HachOrPerfectFilter << 10) | @@ -2437,7 +2497,7 @@ HAL_StatusTypeDef HAL_ETH_GetMACFilterConfig(const ETH_HandleTypeDef *heth, ETH_ pFilterConfig->DestAddrInverseFiltering = ((READ_BIT(heth->Instance->MACFFR, ETH_MACFFR_DAIF) >> 3) > 0U) ? ENABLE : DISABLE; pFilterConfig->PassAllMulticast = ((READ_BIT(heth->Instance->MACFFR, ETH_MACFFR_PAM) >> 4) > 0U) ? ENABLE : DISABLE; - pFilterConfig->BroadcastFilter = ((READ_BIT(heth->Instance->MACFFR, ETH_MACFFR_BFD) >> 5) == 0U) ? ENABLE : DISABLE; + pFilterConfig->BroadcastFilter = ((READ_BIT(heth->Instance->MACFFR, ETH_MACFFR_BFD) >> 5) > 0U) ? ENABLE : DISABLE; pFilterConfig->ControlPacketsFilter = READ_BIT(heth->Instance->MACFFR, ETH_MACFFR_PCF); pFilterConfig->SrcAddrInverseFiltering = ((READ_BIT(heth->Instance->MACFFR, ETH_MACFFR_SAIF) >> 8) > 0U) ? ENABLE : DISABLE; @@ -2714,6 +2774,16 @@ uint32_t HAL_ETH_GetMACWakeUpSource(const ETH_HandleTypeDef *heth) return heth->MACWakeUpEvent; } +/** + * @brief Returns the ETH Tx Buffers in use number + * @param heth: pointer to a ETH_HandleTypeDef structure that contains + * the configuration information for ETHERNET module + * @retval ETH Tx Buffers in use number + */ +uint32_t HAL_ETH_GetTxBuffersNumber(const ETH_HandleTypeDef *heth) +{ + return heth->TxDescList.BuffersInUse; +} /** * @} */ @@ -3046,7 +3116,7 @@ static void ETH_DMARxDescListInit(ETH_HandleTypeDef *heth) * @param heth: pointer to a ETH_HandleTypeDef structure that contains * the configuration information for ETHERNET module * @param pTxConfig: Tx packet configuration - * @param ItMode: Enable or disable Tx EOT interrept + * @param ItMode: Enable or disable Tx EOT interrupt * @retval Status */ static uint32_t ETH_Prepare_Tx_Descriptors(ETH_HandleTypeDef *heth, const ETH_TxPacketConfigTypeDef *pTxConfig, diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c index 39f19f2d19..29c60e327d 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c +++ b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c @@ -153,7 +153,7 @@ HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout); */ HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data) { - HAL_StatusTypeDef status = HAL_ERROR; + HAL_StatusTypeDef status; /* Process Locked */ __HAL_LOCK(&pFlash); diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c index f919fea57e..839c91b121 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c +++ b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c @@ -159,7 +159,7 @@ extern HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout); */ HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *SectorError) { - HAL_StatusTypeDef status = HAL_ERROR; + HAL_StatusTypeDef status; uint32_t index = 0U; /* Process Locked */ @@ -456,7 +456,7 @@ void HAL_FLASHEx_AdvOBGetConfig(FLASH_AdvOBProgramInitTypeDef *pAdvOBInit) */ HAL_StatusTypeDef HAL_FLASHEx_OB_SelectPCROP(void) { - uint8_t optiontmp = 0xFF; + uint8_t optiontmp; /* Mask SPRMOD bit */ optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE3_ADDRESS) & (uint8_t)0x7F); @@ -481,7 +481,7 @@ HAL_StatusTypeDef HAL_FLASHEx_OB_SelectPCROP(void) */ HAL_StatusTypeDef HAL_FLASHEx_OB_DeSelectPCROP(void) { - uint8_t optiontmp = 0xFF; + uint8_t optiontmp; /* Mask SPRMOD bit */ optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE3_ADDRESS) & (uint8_t)0x7F); @@ -1190,7 +1190,7 @@ static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t Level) */ static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t Iwdg, uint8_t Stop, uint8_t Stdby) { - uint8_t optiontmp = 0xFF; + uint8_t optiontmp; HAL_StatusTypeDef status = HAL_OK; /* Check the parameters */ diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hash.c b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hash.c index 7362dedc41..bf90fc1e09 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hash.c +++ b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hash.c @@ -272,10 +272,10 @@ */ static void HASH_DMAXferCplt(DMA_HandleTypeDef *hdma); static void HASH_DMAError(DMA_HandleTypeDef *hdma); -static void HASH_GetDigest(uint8_t *pMsgDigest, uint8_t Size); +static void HASH_GetDigest(const uint8_t *pMsgDigest, uint8_t Size); static HAL_StatusTypeDef HASH_WaitOnFlagUntilTimeout(HASH_HandleTypeDef *hhash, uint32_t Flag, FlagStatus Status, uint32_t Timeout); -static HAL_StatusTypeDef HASH_WriteData(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); +static HAL_StatusTypeDef HASH_WriteData(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); static HAL_StatusTypeDef HASH_IT(HASH_HandleTypeDef *hhash); static uint32_t HASH_Write_Block_Data(HASH_HandleTypeDef *hhash); static HAL_StatusTypeDef HMAC_Processing(HASH_HandleTypeDef *hhash, uint32_t Timeout); @@ -766,7 +766,8 @@ HAL_StatusTypeDef HAL_HASH_UnRegisterCallback(HASH_HandleTypeDef *hhash, HAL_HAS * @param Timeout Timeout value * @retval HAL status */ -HAL_StatusTypeDef HAL_HASH_MD5_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t *pOutBuffer, +HAL_StatusTypeDef HAL_HASH_MD5_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, + uint8_t *pOutBuffer, uint32_t Timeout) { return HASH_Start(hhash, pInBuffer, Size, pOutBuffer, Timeout, HASH_ALGOSELECTION_MD5); @@ -792,7 +793,7 @@ HAL_StatusTypeDef HAL_HASH_MD5_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuff * @param Size length of the input buffer in bytes, must be a multiple of 4. * @retval HAL status */ -HAL_StatusTypeDef HAL_HASH_MD5_Accmlt(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HASH_MD5_Accmlt(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { return HASH_Accumulate(hhash, pInBuffer, Size, HASH_ALGOSELECTION_MD5); } @@ -807,7 +808,7 @@ HAL_StatusTypeDef HAL_HASH_MD5_Accmlt(HASH_HandleTypeDef *hhash, uint8_t *pInBuf * @param Timeout Timeout value * @retval HAL status */ -HAL_StatusTypeDef HAL_HASH_MD5_Accmlt_End(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASH_MD5_Accmlt_End(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer, uint32_t Timeout) { return HASH_Start(hhash, pInBuffer, Size, pOutBuffer, Timeout, HASH_ALGOSELECTION_MD5); @@ -824,7 +825,8 @@ HAL_StatusTypeDef HAL_HASH_MD5_Accmlt_End(HASH_HandleTypeDef *hhash, uint8_t *pI * @param Timeout Timeout value * @retval HAL status */ -HAL_StatusTypeDef HAL_HASH_SHA1_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t *pOutBuffer, +HAL_StatusTypeDef HAL_HASH_SHA1_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, + uint8_t *pOutBuffer, uint32_t Timeout) { return HASH_Start(hhash, pInBuffer, Size, pOutBuffer, Timeout, HASH_ALGOSELECTION_SHA1); @@ -850,7 +852,7 @@ HAL_StatusTypeDef HAL_HASH_SHA1_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuf * @param Size length of the input buffer in bytes, must be a multiple of 4. * @retval HAL status */ -HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { return HASH_Accumulate(hhash, pInBuffer, Size, HASH_ALGOSELECTION_SHA1); } @@ -865,7 +867,7 @@ HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt(HASH_HandleTypeDef *hhash, uint8_t *pInBu * @param Timeout Timeout value * @retval HAL status */ -HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt_End(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt_End(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer, uint32_t Timeout) { return HASH_Start(hhash, pInBuffer, Size, pOutBuffer, Timeout, HASH_ALGOSELECTION_SHA1); @@ -913,7 +915,7 @@ HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt_End(HASH_HandleTypeDef *hhash, uint8_t *p * @param pOutBuffer pointer to the computed digest. Digest size is 16 bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HASH_MD5_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASH_MD5_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer) { return HASH_Start_IT(hhash, pInBuffer, Size, pOutBuffer, HASH_ALGOSELECTION_MD5); @@ -937,7 +939,7 @@ HAL_StatusTypeDef HAL_HASH_MD5_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInB * @param Size length of the input buffer in bytes, must be a multiple of 4. * @retval HAL status */ -HAL_StatusTypeDef HAL_HASH_MD5_Accmlt_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HASH_MD5_Accmlt_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { return HASH_Accumulate_IT(hhash, pInBuffer, Size, HASH_ALGOSELECTION_MD5); } @@ -951,7 +953,7 @@ HAL_StatusTypeDef HAL_HASH_MD5_Accmlt_IT(HASH_HandleTypeDef *hhash, uint8_t *pIn * @param pOutBuffer pointer to the computed digest. Digest size is 16 bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HASH_MD5_Accmlt_End_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASH_MD5_Accmlt_End_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer) { return HASH_Start_IT(hhash, pInBuffer, Size, pOutBuffer, HASH_ALGOSELECTION_MD5); @@ -967,7 +969,7 @@ HAL_StatusTypeDef HAL_HASH_MD5_Accmlt_End_IT(HASH_HandleTypeDef *hhash, uint8_t * @param pOutBuffer pointer to the computed digest. Digest size is 20 bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HASH_SHA1_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASH_SHA1_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer) { return HASH_Start_IT(hhash, pInBuffer, Size, pOutBuffer, HASH_ALGOSELECTION_SHA1); @@ -992,7 +994,7 @@ HAL_StatusTypeDef HAL_HASH_SHA1_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pIn * @param Size length of the input buffer in bytes, must be a multiple of 4. * @retval HAL status */ -HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { return HASH_Accumulate_IT(hhash, pInBuffer, Size, HASH_ALGOSELECTION_SHA1); } @@ -1006,7 +1008,7 @@ HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt_IT(HASH_HandleTypeDef *hhash, uint8_t *pI * @param pOutBuffer pointer to the computed digest. Digest size is 20 bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt_End_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt_End_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer) { return HASH_Start_IT(hhash, pInBuffer, Size, pOutBuffer, HASH_ALGOSELECTION_SHA1); @@ -1079,7 +1081,7 @@ void HAL_HASH_IRQHandler(HASH_HandleTypeDef *hhash) * @param Size length of the input buffer in bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HASH_MD5_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HASH_MD5_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { return HASH_Start_DMA(hhash, pInBuffer, Size, HASH_ALGOSELECTION_MD5); } @@ -1109,7 +1111,7 @@ HAL_StatusTypeDef HAL_HASH_MD5_Finish(HASH_HandleTypeDef *hhash, uint8_t *pOutBu * @param Size length of the input buffer in bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HASH_SHA1_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HASH_SHA1_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { return HASH_Start_DMA(hhash, pInBuffer, Size, HASH_ALGOSELECTION_SHA1); } @@ -1166,7 +1168,8 @@ HAL_StatusTypeDef HAL_HASH_SHA1_Finish(HASH_HandleTypeDef *hhash, uint8_t *pOutB * @param Timeout Timeout value. * @retval HAL status */ -HAL_StatusTypeDef HAL_HMAC_MD5_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t *pOutBuffer, +HAL_StatusTypeDef HAL_HMAC_MD5_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, + uint8_t *pOutBuffer, uint32_t Timeout) { return HMAC_Start(hhash, pInBuffer, Size, pOutBuffer, Timeout, HASH_ALGOSELECTION_MD5); @@ -1185,7 +1188,8 @@ HAL_StatusTypeDef HAL_HMAC_MD5_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuff * @param Timeout Timeout value. * @retval HAL status */ -HAL_StatusTypeDef HAL_HMAC_SHA1_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t *pOutBuffer, +HAL_StatusTypeDef HAL_HMAC_SHA1_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, + uint8_t *pOutBuffer, uint32_t Timeout) { return HMAC_Start(hhash, pInBuffer, Size, pOutBuffer, Timeout, HASH_ALGOSELECTION_SHA1); @@ -1227,7 +1231,7 @@ HAL_StatusTypeDef HAL_HMAC_SHA1_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuf * @param pOutBuffer pointer to the computed digest. Digest size is 16 bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HMAC_MD5_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HMAC_MD5_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer) { return HMAC_Start_IT(hhash, pInBuffer, Size, pOutBuffer, HASH_ALGOSELECTION_MD5); @@ -1245,7 +1249,7 @@ HAL_StatusTypeDef HAL_HMAC_MD5_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInB * @param pOutBuffer pointer to the computed digest. Digest size is 20 bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HMAC_SHA1_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HMAC_SHA1_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer) { return HMAC_Start_IT(hhash, pInBuffer, Size, pOutBuffer, HASH_ALGOSELECTION_SHA1); @@ -1256,7 +1260,6 @@ HAL_StatusTypeDef HAL_HMAC_SHA1_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pIn */ - /** @defgroup HASH_Exported_Functions_Group7 HMAC processing functions in DMA mode * @brief HMAC processing functions using DMA modes. * @@ -1299,7 +1302,7 @@ HAL_StatusTypeDef HAL_HMAC_SHA1_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pIn * @param Size length of the input buffer in bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HMAC_MD5_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HMAC_MD5_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { return HMAC_Start_DMA(hhash, pInBuffer, Size, HASH_ALGOSELECTION_MD5); } @@ -1324,7 +1327,7 @@ HAL_StatusTypeDef HAL_HMAC_MD5_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pIn * @param Size length of the input buffer in bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HMAC_SHA1_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HMAC_SHA1_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { return HMAC_Start_DMA(hhash, pInBuffer, Size, HASH_ALGOSELECTION_SHA1); } @@ -1371,7 +1374,7 @@ HAL_StatusTypeDef HAL_HMAC_SHA1_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pI * @param hhash HASH handle. * @retval HAL HASH state */ -HAL_HASH_StateTypeDef HAL_HASH_GetState(HASH_HandleTypeDef *hhash) +HAL_HASH_StateTypeDef HAL_HASH_GetState(const HASH_HandleTypeDef *hhash) { return hhash->State; } @@ -1384,7 +1387,7 @@ HAL_HASH_StateTypeDef HAL_HASH_GetState(HASH_HandleTypeDef *hhash) * @param hhash HASH handle. * @retval HAL status */ -HAL_StatusTypeDef HAL_HASH_GetStatus(HASH_HandleTypeDef *hhash) +HAL_StatusTypeDef HAL_HASH_GetStatus(const HASH_HandleTypeDef *hhash) { return hhash->Status; } @@ -1402,7 +1405,7 @@ HAL_StatusTypeDef HAL_HASH_GetStatus(HASH_HandleTypeDef *hhash) * must be at least (HASH_NUMBER_OF_CSR_REGISTERS + 3) * 4 uint8 long. * @retval None */ -void HAL_HASH_ContextSaving(HASH_HandleTypeDef *hhash, uint8_t *pMemBuffer) +void HAL_HASH_ContextSaving(const HASH_HandleTypeDef *hhash, const uint8_t *pMemBuffer) { uint32_t mem_ptr = (uint32_t)pMemBuffer; uint32_t csr_ptr = (uint32_t)HASH->CSR; @@ -1448,7 +1451,7 @@ void HAL_HASH_ContextSaving(HASH_HandleTypeDef *hhash, uint8_t *pMemBuffer) * beforehand). * @retval None */ -void HAL_HASH_ContextRestoring(HASH_HandleTypeDef *hhash, uint8_t *pMemBuffer) +void HAL_HASH_ContextRestoring(HASH_HandleTypeDef *hhash, const uint8_t *pMemBuffer) { uint32_t mem_ptr = (uint32_t)pMemBuffer; uint32_t csr_ptr = (uint32_t)HASH->CSR; @@ -1627,7 +1630,7 @@ HAL_StatusTypeDef HAL_HASH_DMAFeed_ProcessSuspend(HASH_HandleTypeDef *hhash) * @param hhash pointer to a HASH_HandleTypeDef structure. * @retval HASH Error Code */ -uint32_t HAL_HASH_GetError(HASH_HandleTypeDef *hhash) +uint32_t HAL_HASH_GetError(const HASH_HandleTypeDef *hhash) { /* Return HASH Error Code */ return hhash->ErrorCode; @@ -1830,13 +1833,13 @@ static void HASH_DMAError(DMA_HandleTypeDef *hdma) * suspension time is stored in the handle for resumption later on. * @retval HAL status */ -static HAL_StatusTypeDef HASH_WriteData(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +static HAL_StatusTypeDef HASH_WriteData(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { uint32_t buffercounter; __IO uint32_t inputaddr = (uint32_t) pInBuffer; uint32_t tmp; - for (buffercounter = 0U; buffercounter < Size / 4U; buffercounter++) + for (buffercounter = 0U; buffercounter < (Size / 4U); buffercounter++) { /* Write input data 4 bytes at a time */ HASH->DIN = *(uint32_t *)inputaddr; @@ -1844,10 +1847,10 @@ static HAL_StatusTypeDef HASH_WriteData(HASH_HandleTypeDef *hhash, uint8_t *pInB /* If the suspension flag has been raised and if the processing is not about to end, suspend processing */ - if ((hhash->SuspendRequest == HAL_HASH_SUSPEND) && ((buffercounter * 4 + 4U) < Size)) + if ((hhash->SuspendRequest == HAL_HASH_SUSPEND) && (((buffercounter * 4U) + 4U) < Size)) { /* wait for flag BUSY not set before Wait for DINIS = 1*/ - if (buffercounter * 4 >= 64U) + if ((buffercounter * 4U) >= 64U) { if (HASH_WaitOnFlagUntilTimeout(hhash, HASH_FLAG_BUSY, SET, HASH_TIMEOUTVALUE) != HAL_OK) { @@ -1868,14 +1871,14 @@ static HAL_StatusTypeDef HASH_WriteData(HASH_HandleTypeDef *hhash, uint8_t *pInB /* Save current reading and writing locations of Input and Output buffers */ hhash->pHashInBuffPtr = (uint8_t *)inputaddr; /* Save the number of bytes that remain to be processed at this point */ - hhash->HashInCount = Size - (buffercounter * 4 + 4U); + hhash->HashInCount = Size - ((buffercounter * 4U) + 4U); } else if ((hhash->Phase == HAL_HASH_PHASE_HMAC_STEP_1) || (hhash->Phase == HAL_HASH_PHASE_HMAC_STEP_3)) { /* Save current reading and writing locations of Input and Output buffers */ hhash->pHashKeyBuffPtr = (uint8_t *)inputaddr; /* Save the number of bytes that remain to be processed at this point */ - hhash->HashKeyCount = Size - (buffercounter * 4 + 4U); + hhash->HashKeyCount = Size - ((buffercounter * 4U) + 4U); } else { @@ -1895,17 +1898,17 @@ static HAL_StatusTypeDef HASH_WriteData(HASH_HandleTypeDef *hhash, uint8_t *pInB /* At this point, all the data have been entered to the Peripheral: exit */ - if (Size % 4U != 0U) + if ((Size % 4U) != 0U) { if (hhash->Init.DataType == HASH_DATATYPE_16B) { /* Write remaining input data */ - if (Size % 4U <= 2) + if ((Size % 4U) <= 2U) { HASH->DIN = (uint32_t) * (uint16_t *)inputaddr; } - if (Size % 4U == 3) + if ((Size % 4U) == 3U) { HASH->DIN = *(uint32_t *)inputaddr; } @@ -1915,19 +1918,19 @@ static HAL_StatusTypeDef HASH_WriteData(HASH_HandleTypeDef *hhash, uint8_t *pInB || (hhash->Init.DataType == HASH_DATATYPE_1B)) /* byte swap or bit swap or */ { /* Write remaining input data */ - if (Size % 4U == 1) + if ((Size % 4U) == 1U) { HASH->DIN = (uint32_t) * (uint8_t *)inputaddr; } - if (Size % 4U == 2) + if ((Size % 4U) == 2U) { HASH->DIN = (uint32_t) * (uint16_t *)inputaddr; } - if (Size % 4U == 3) + if ((Size % 4U) == 3U) { tmp = *(uint8_t *)inputaddr; - tmp |= *(uint8_t *)(inputaddr + 1U) << 8U ; - tmp |= *(uint8_t *)(inputaddr + 2U) << 16U; + tmp |= (uint32_t) * (uint8_t *)(inputaddr + 1U) << 8U; + tmp |= (uint32_t) * (uint8_t *)(inputaddr + 2U) << 16U; HASH->DIN = tmp; } @@ -1936,7 +1939,6 @@ static HAL_StatusTypeDef HASH_WriteData(HASH_HandleTypeDef *hhash, uint8_t *pInB { HASH->DIN = *(uint32_t *)inputaddr; } - /*hhash->HashInCount += 4U;*/ } @@ -1949,7 +1951,7 @@ static HAL_StatusTypeDef HASH_WriteData(HASH_HandleTypeDef *hhash, uint8_t *pInB * @param Size message digest size in bytes. * @retval None */ -static void HASH_GetDigest(uint8_t *pMsgDigest, uint8_t Size) +static void HASH_GetDigest(const uint8_t *pMsgDigest, uint8_t Size) { uint32_t msgdigest = (uint32_t)pMsgDigest; @@ -2018,7 +2020,6 @@ static void HASH_GetDigest(uint8_t *pMsgDigest, uint8_t Size) } - /** * @brief Handle HASH processing Timeout. * @param hhash HASH handle. @@ -2504,10 +2505,11 @@ static HAL_StatusTypeDef HMAC_Processing(HASH_HandleTypeDef *hhash, uint32_t Tim * @param Algorithm HASH algorithm. * @retval HAL status */ -HAL_StatusTypeDef HASH_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t *pOutBuffer, +HAL_StatusTypeDef HASH_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, + uint8_t *pOutBuffer, uint32_t Timeout, uint32_t Algorithm) { - uint8_t *pInBuffer_tmp; /* input data address, input parameter of HASH_WriteData() */ + const uint8_t *pInBuffer_tmp; /* input data address, input parameter of HASH_WriteData() */ uint32_t Size_tmp; /* input data size (in bytes), input parameter of HASH_WriteData() */ HAL_HASH_StateTypeDef State_tmp = hhash->State; @@ -2539,7 +2541,7 @@ HAL_StatusTypeDef HASH_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint /* pInBuffer_tmp and Size_tmp are initialized to be used afterwards as input parameters of HASH_WriteData() */ - pInBuffer_tmp = pInBuffer; /* pInBuffer_tmp is set to the input data address */ + pInBuffer_tmp = (const uint8_t *)pInBuffer; /* pInBuffer_tmp is set to the input data address */ Size_tmp = Size; /* Size_tmp contains the input data size in bytes */ /* Set the phase */ @@ -2555,7 +2557,7 @@ HAL_StatusTypeDef HASH_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint /* Since this is resumption, pInBuffer_tmp and Size_tmp are not set to the API input parameters but to those saved beforehand by HASH_WriteData() when the processing was suspended */ - pInBuffer_tmp = hhash->pHashInBuffPtr; + pInBuffer_tmp = (const uint8_t *)hhash->pHashInBuffPtr; Size_tmp = hhash->HashInCount; } /* ... or multi-buffer HASH processing end */ @@ -2563,7 +2565,7 @@ HAL_StatusTypeDef HASH_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint { /* pInBuffer_tmp and Size_tmp are initialized to be used afterwards as input parameters of HASH_WriteData() */ - pInBuffer_tmp = pInBuffer; + pInBuffer_tmp = (const uint8_t *)pInBuffer; Size_tmp = Size; /* Configure the number of valid bits in last word of the message */ __HAL_HASH_SET_NBVALIDBITS(Size); @@ -2641,9 +2643,10 @@ HAL_StatusTypeDef HASH_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint * @param Algorithm HASH algorithm. * @retval HAL status */ -HAL_StatusTypeDef HASH_Accumulate(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint32_t Algorithm) +HAL_StatusTypeDef HASH_Accumulate(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, + uint32_t Algorithm) { - uint8_t *pInBuffer_tmp; /* input data address, input parameter of HASH_WriteData() */ + const uint8_t *pInBuffer_tmp; /* input data address, input parameter of HASH_WriteData() */ uint32_t Size_tmp; /* input data size (in bytes), input parameter of HASH_WriteData() */ HAL_HASH_StateTypeDef State_tmp = hhash->State; @@ -2675,7 +2678,7 @@ HAL_StatusTypeDef HASH_Accumulate(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, /* Since this is resumption, pInBuffer_tmp and Size_tmp are not set to the API input parameters but to those saved beforehand by HASH_WriteData() when the processing was suspended */ - pInBuffer_tmp = hhash->pHashInBuffPtr; /* pInBuffer_tmp is set to the input data address */ + pInBuffer_tmp = (const uint8_t *)hhash->pHashInBuffPtr; /* pInBuffer_tmp is set to the input data address */ Size_tmp = hhash->HashInCount; /* Size_tmp contains the input data size in bytes */ } @@ -2686,7 +2689,7 @@ HAL_StatusTypeDef HASH_Accumulate(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, /* pInBuffer_tmp and Size_tmp are initialized to be used afterwards as input parameters of HASH_WriteData() */ - pInBuffer_tmp = pInBuffer; /* pInBuffer_tmp is set to the input data address */ + pInBuffer_tmp = (const uint8_t *)pInBuffer; /* pInBuffer_tmp is set to the input data address */ Size_tmp = Size; /* Size_tmp contains the input data size in bytes */ /* Check if initialization phase has already be performed */ @@ -2744,7 +2747,8 @@ HAL_StatusTypeDef HASH_Accumulate(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, * @param Algorithm HASH algorithm. * @retval HAL status */ -HAL_StatusTypeDef HASH_Accumulate_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint32_t Algorithm) +HAL_StatusTypeDef HASH_Accumulate_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, + uint32_t Algorithm) { HAL_HASH_StateTypeDef State_tmp = hhash->State; __IO uint32_t inputaddr = (uint32_t) pInBuffer; @@ -2854,7 +2858,6 @@ HAL_StatusTypeDef HASH_Accumulate_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuff } - /** * @brief Initialize the HASH peripheral, next process pInBuffer then * read the computed digest in interruption mode. @@ -2866,7 +2869,8 @@ HAL_StatusTypeDef HASH_Accumulate_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuff * @param Algorithm HASH algorithm. * @retval HAL status */ -HAL_StatusTypeDef HASH_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t *pOutBuffer, +HAL_StatusTypeDef HASH_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, + uint8_t *pOutBuffer, uint32_t Algorithm) { HAL_HASH_StateTypeDef State_tmp = hhash->State; @@ -2915,6 +2919,19 @@ HAL_StatusTypeDef HASH_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, u hhash->pHashOutBuffPtr = pOutBuffer; /* Points at the computed digest */ } + else if ((hhash->Phase == HAL_HASH_PHASE_PROCESS) && (SizeVar < 4U)) + { + if (__HAL_HASH_GET_FLAG(HASH_FLAG_DINIS)) + { + /* It remains data to enter and the Peripheral is ready to trigger DINIE,carry on as usual. + Update HashInCount and pHashInBuffPtr accordingly. */ + hhash->HashInCount = SizeVar; + hhash->pHashInBuffPtr = (uint8_t *)inputaddr; + /* Update the configuration of the number of valid bits in last word of the message */ + __HAL_HASH_SET_NBVALIDBITS(SizeVar); + hhash->pHashOutBuffPtr = pOutBuffer; /* Points at the computed digest */ + } + } else { initialization_skipped = 1; /* info user later on in case of multi-buffer */ @@ -3024,18 +3041,19 @@ HAL_StatusTypeDef HASH_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, u * @param Algorithm HASH algorithm. * @retval HAL status */ -HAL_StatusTypeDef HASH_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint32_t Algorithm) +HAL_StatusTypeDef HASH_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, + uint32_t Algorithm) { uint32_t inputaddr; uint32_t inputSize; HAL_StatusTypeDef status ; HAL_HASH_StateTypeDef State_tmp = hhash->State; - #if defined (HASH_CR_MDMAT) +#if defined (HASH_CR_MDMAT) /* Make sure the input buffer size (in bytes) is a multiple of 4 when MDMAT bit is set (case of multi-buffer HASH processing) */ assert_param(IS_HASH_DMA_MULTIBUFFER_SIZE(Size)); - #endif /* MDMA defined*/ +#endif /* MDMA defined*/ /* If State is ready or suspended, start or resume polling-based HASH processing */ if ((State_tmp == HAL_HASH_STATE_READY) || (State_tmp == HAL_HASH_STATE_SUSPENDED)) { @@ -3201,7 +3219,8 @@ HAL_StatusTypeDef HASH_Finish(HASH_HandleTypeDef *hhash, uint8_t *pOutBuffer, ui * @param Algorithm HASH algorithm. * @retval HAL status */ -HAL_StatusTypeDef HMAC_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t *pOutBuffer, +HAL_StatusTypeDef HMAC_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, + uint8_t *pOutBuffer, uint32_t Timeout, uint32_t Algorithm) { HAL_HASH_StateTypeDef State_tmp = hhash->State; @@ -3265,7 +3284,6 @@ HAL_StatusTypeDef HMAC_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint } - /** * @brief Initialize the HASH peripheral in HMAC mode, next process pInBuffer then * read the computed digest in interruption mode. @@ -3279,7 +3297,8 @@ HAL_StatusTypeDef HMAC_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint * @param Algorithm HASH algorithm. * @retval HAL status */ -HAL_StatusTypeDef HMAC_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t *pOutBuffer, +HAL_StatusTypeDef HMAC_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, + uint8_t *pOutBuffer, uint32_t Algorithm) { HAL_HASH_StateTypeDef State_tmp = hhash->State; @@ -3374,7 +3393,6 @@ HAL_StatusTypeDef HMAC_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, u } - /** * @brief Initialize the HASH peripheral in HMAC mode then initiate the required * DMA transfers to feed the key and the input buffer to the Peripheral. @@ -3390,7 +3408,8 @@ HAL_StatusTypeDef HMAC_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, u * @param Algorithm HASH algorithm. * @retval HAL status */ -HAL_StatusTypeDef HMAC_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint32_t Algorithm) +HAL_StatusTypeDef HMAC_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, + uint32_t Algorithm) { uint32_t inputaddr; uint32_t inputSize; diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hash_ex.c b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hash_ex.c index 63cb38eaa2..619d88e32b 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hash_ex.c +++ b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hash_ex.c @@ -86,8 +86,6 @@ #include "stm32f4xx_hal.h" - - /** @addtogroup STM32F4xx_HAL_Driver * @{ */ @@ -148,7 +146,7 @@ * @param Timeout Timeout value * @retval HAL status */ -HAL_StatusTypeDef HAL_HASHEx_SHA224_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASHEx_SHA224_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer, uint32_t Timeout) { return HASH_Start(hhash, pInBuffer, Size, pOutBuffer, Timeout, HASH_ALGOSELECTION_SHA224); @@ -174,7 +172,7 @@ HAL_StatusTypeDef HAL_HASHEx_SHA224_Start(HASH_HandleTypeDef *hhash, uint8_t *pI * @param Size length of the input buffer in bytes, must be a multiple of 4. * @retval HAL status */ -HAL_StatusTypeDef HAL_HASHEx_SHA224_Accmlt(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HASHEx_SHA224_Accmlt(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { return HASH_Accumulate(hhash, pInBuffer, Size, HASH_ALGOSELECTION_SHA224); } @@ -189,7 +187,7 @@ HAL_StatusTypeDef HAL_HASHEx_SHA224_Accmlt(HASH_HandleTypeDef *hhash, uint8_t *p * @param Timeout Timeout value * @retval HAL status */ -HAL_StatusTypeDef HAL_HASHEx_SHA224_Accmlt_End(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASHEx_SHA224_Accmlt_End(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer, uint32_t Timeout) { return HASH_Start(hhash, pInBuffer, Size, pOutBuffer, Timeout, HASH_ALGOSELECTION_SHA224); @@ -206,7 +204,7 @@ HAL_StatusTypeDef HAL_HASHEx_SHA224_Accmlt_End(HASH_HandleTypeDef *hhash, uint8_ * @param Timeout Timeout value * @retval HAL status */ -HAL_StatusTypeDef HAL_HASHEx_SHA256_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASHEx_SHA256_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer, uint32_t Timeout) { return HASH_Start(hhash, pInBuffer, Size, pOutBuffer, Timeout, HASH_ALGOSELECTION_SHA256); @@ -232,7 +230,7 @@ HAL_StatusTypeDef HAL_HASHEx_SHA256_Start(HASH_HandleTypeDef *hhash, uint8_t *pI * @param Size length of the input buffer in bytes, must be a multiple of 4. * @retval HAL status */ -HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { return HASH_Accumulate(hhash, pInBuffer, Size, HASH_ALGOSELECTION_SHA256); } @@ -247,7 +245,7 @@ HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt(HASH_HandleTypeDef *hhash, uint8_t *p * @param Timeout Timeout value * @retval HAL status */ -HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt_End(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt_End(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer, uint32_t Timeout) { return HASH_Start(hhash, pInBuffer, Size, pOutBuffer, Timeout, HASH_ALGOSELECTION_SHA256); @@ -290,7 +288,7 @@ HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt_End(HASH_HandleTypeDef *hhash, uint8_ * @param pOutBuffer pointer to the computed digest. Digest size is 28 bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer) { return HASH_Start_IT(hhash, pInBuffer, Size, pOutBuffer, HASH_ALGOSELECTION_SHA224); @@ -314,7 +312,7 @@ HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_IT(HASH_HandleTypeDef *hhash, uint8_t * @param Size length of the input buffer in bytes, must be a multiple of 4. * @retval HAL status */ -HAL_StatusTypeDef HAL_HASHEx_SHA224_Accmlt_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HASHEx_SHA224_Accmlt_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { return HASH_Accumulate_IT(hhash, pInBuffer, Size, HASH_ALGOSELECTION_SHA224); } @@ -328,7 +326,8 @@ HAL_StatusTypeDef HAL_HASHEx_SHA224_Accmlt_IT(HASH_HandleTypeDef *hhash, uint8_t * @param pOutBuffer pointer to the computed digest. Digest size is 28 bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HASHEx_SHA224_Accmlt_End_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASHEx_SHA224_Accmlt_End_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, + uint32_t Size, uint8_t *pOutBuffer) { return HASH_Start_IT(hhash, pInBuffer, Size, pOutBuffer, HASH_ALGOSELECTION_SHA224); @@ -344,7 +343,7 @@ HAL_StatusTypeDef HAL_HASHEx_SHA224_Accmlt_End_IT(HASH_HandleTypeDef *hhash, uin * @param pOutBuffer pointer to the computed digest. Digest size is 32 bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer) { return HASH_Start_IT(hhash, pInBuffer, Size, pOutBuffer, HASH_ALGOSELECTION_SHA256); @@ -368,7 +367,7 @@ HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, uint8_t * @param Size length of the input buffer in bytes, must be a multiple of 4. * @retval HAL status */ -HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { return HASH_Accumulate_IT(hhash, pInBuffer, Size, HASH_ALGOSELECTION_SHA256); } @@ -382,7 +381,8 @@ HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt_IT(HASH_HandleTypeDef *hhash, uint8_t * @param pOutBuffer pointer to the computed digest. Digest size is 32 bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt_End_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt_End_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, + uint32_t Size, uint8_t *pOutBuffer) { return HASH_Start_IT(hhash, pInBuffer, Size, pOutBuffer, HASH_ALGOSELECTION_SHA256); @@ -422,8 +422,6 @@ HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt_End_IT(HASH_HandleTypeDef *hhash, uin */ - - /** * @brief Initialize the HASH peripheral in SHA224 mode then initiate a DMA transfer * to feed the input buffer to the Peripheral. @@ -434,7 +432,7 @@ HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt_End_IT(HASH_HandleTypeDef *hhash, uin * @param Size length of the input buffer in bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { return HASH_Start_DMA(hhash, pInBuffer, Size, HASH_ALGOSELECTION_SHA224); } @@ -464,7 +462,7 @@ HAL_StatusTypeDef HAL_HASHEx_SHA224_Finish(HASH_HandleTypeDef *hhash, uint8_t *p * @param Size length of the input buffer in bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { return HASH_Start_DMA(hhash, pInBuffer, Size, HASH_ALGOSELECTION_SHA256); } @@ -507,7 +505,6 @@ HAL_StatusTypeDef HAL_HASHEx_SHA256_Finish(HASH_HandleTypeDef *hhash, uint8_t *p */ - /** * @brief Initialize the HASH peripheral in HMAC SHA224 mode, next process pInBuffer then * read the computed digest. @@ -521,7 +518,7 @@ HAL_StatusTypeDef HAL_HASHEx_SHA256_Finish(HASH_HandleTypeDef *hhash, uint8_t *p * @param Timeout Timeout value. * @retval HAL status */ -HAL_StatusTypeDef HAL_HMACEx_SHA224_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HMACEx_SHA224_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer, uint32_t Timeout) { return HMAC_Start(hhash, pInBuffer, Size, pOutBuffer, Timeout, HASH_ALGOSELECTION_SHA224); @@ -540,7 +537,7 @@ HAL_StatusTypeDef HAL_HMACEx_SHA224_Start(HASH_HandleTypeDef *hhash, uint8_t *pI * @param Timeout Timeout value. * @retval HAL status */ -HAL_StatusTypeDef HAL_HMACEx_SHA256_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HMACEx_SHA256_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer, uint32_t Timeout) { return HMAC_Start(hhash, pInBuffer, Size, pOutBuffer, Timeout, HASH_ALGOSELECTION_SHA256); @@ -570,7 +567,6 @@ HAL_StatusTypeDef HAL_HMACEx_SHA256_Start(HASH_HandleTypeDef *hhash, uint8_t *pI */ - /** * @brief Initialize the HASH peripheral in HMAC SHA224 mode, next process pInBuffer then * read the computed digest in interrupt mode. @@ -583,7 +579,7 @@ HAL_StatusTypeDef HAL_HMACEx_SHA256_Start(HASH_HandleTypeDef *hhash, uint8_t *pI * @param pOutBuffer pointer to the computed digest. Digest size is 28 bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HMACEx_SHA224_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HMACEx_SHA224_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer) { return HMAC_Start_IT(hhash, pInBuffer, Size, pOutBuffer, HASH_ALGOSELECTION_SHA224); @@ -601,15 +597,13 @@ HAL_StatusTypeDef HAL_HMACEx_SHA224_Start_IT(HASH_HandleTypeDef *hhash, uint8_t * @param pOutBuffer pointer to the computed digest. Digest size is 32 bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HMACEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, +HAL_StatusTypeDef HAL_HMACEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, uint8_t *pOutBuffer) { return HMAC_Start_IT(hhash, pInBuffer, Size, pOutBuffer, HASH_ALGOSELECTION_SHA256); } - - /** * @} */ @@ -639,7 +633,6 @@ HAL_StatusTypeDef HAL_HMACEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, uint8_t */ - /** * @brief Initialize the HASH peripheral in HMAC SHA224 mode then initiate the required * DMA transfers to feed the key and the input buffer to the Peripheral. @@ -659,7 +652,7 @@ HAL_StatusTypeDef HAL_HMACEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, uint8_t * @param Size length of the input buffer in bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HMACEx_SHA224_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HMACEx_SHA224_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { return HMAC_Start_DMA(hhash, pInBuffer, Size, HASH_ALGOSELECTION_SHA224); } @@ -683,7 +676,7 @@ HAL_StatusTypeDef HAL_HMACEx_SHA224_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t * @param Size length of the input buffer in bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HMACEx_SHA256_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HMACEx_SHA256_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { return HMAC_Start_DMA(hhash, pInBuffer, Size, HASH_ALGOSELECTION_SHA256); } @@ -759,7 +752,7 @@ HAL_StatusTypeDef HAL_HMACEx_SHA256_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t * @param Size length of the input buffer in bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HMACEx_MD5_Step1_2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HMACEx_MD5_Step1_2_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { hhash->DigestCalculationDisable = SET; return HMAC_Start_DMA(hhash, pInBuffer, Size, HASH_ALGOSELECTION_MD5); @@ -780,7 +773,7 @@ HAL_StatusTypeDef HAL_HMACEx_MD5_Step1_2_DMA(HASH_HandleTypeDef *hhash, uint8_t * @param Size length of the input buffer in bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HMACEx_MD5_Step2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HMACEx_MD5_Step2_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { if (hhash->DigestCalculationDisable != SET) { @@ -806,7 +799,7 @@ HAL_StatusTypeDef HAL_HMACEx_MD5_Step2_DMA(HASH_HandleTypeDef *hhash, uint8_t *p * @param Size length of the input buffer in bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HMACEx_MD5_Step2_3_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HMACEx_MD5_Step2_3_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { hhash->DigestCalculationDisable = RESET; return HMAC_Start_DMA(hhash, pInBuffer, Size, HASH_ALGOSELECTION_MD5); @@ -829,7 +822,7 @@ HAL_StatusTypeDef HAL_HMACEx_MD5_Step2_3_DMA(HASH_HandleTypeDef *hhash, uint8_t * @param Size length of the input buffer in bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HMACEx_SHA1_Step1_2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HMACEx_SHA1_Step1_2_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { hhash->DigestCalculationDisable = SET; return HMAC_Start_DMA(hhash, pInBuffer, Size, HASH_ALGOSELECTION_SHA1); @@ -850,7 +843,7 @@ HAL_StatusTypeDef HAL_HMACEx_SHA1_Step1_2_DMA(HASH_HandleTypeDef *hhash, uint8_t * @param Size length of the input buffer in bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HMACEx_SHA1_Step2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HMACEx_SHA1_Step2_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { if (hhash->DigestCalculationDisable != SET) { @@ -876,7 +869,7 @@ HAL_StatusTypeDef HAL_HMACEx_SHA1_Step2_DMA(HASH_HandleTypeDef *hhash, uint8_t * * @param Size length of the input buffer in bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HMACEx_SHA1_Step2_3_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HMACEx_SHA1_Step2_3_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { hhash->DigestCalculationDisable = RESET; return HMAC_Start_DMA(hhash, pInBuffer, Size, HASH_ALGOSELECTION_SHA1); @@ -898,7 +891,8 @@ HAL_StatusTypeDef HAL_HMACEx_SHA1_Step2_3_DMA(HASH_HandleTypeDef *hhash, uint8_t * @param Size length of the input buffer in bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HMACEx_SHA224_Step1_2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HMACEx_SHA224_Step1_2_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, + uint32_t Size) { hhash->DigestCalculationDisable = SET; return HMAC_Start_DMA(hhash, pInBuffer, Size, HASH_ALGOSELECTION_SHA224); @@ -919,7 +913,7 @@ HAL_StatusTypeDef HAL_HMACEx_SHA224_Step1_2_DMA(HASH_HandleTypeDef *hhash, uint8 * @param Size length of the input buffer in bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HMACEx_SHA224_Step2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HMACEx_SHA224_Step2_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { if (hhash->DigestCalculationDisable != SET) { @@ -945,7 +939,8 @@ HAL_StatusTypeDef HAL_HMACEx_SHA224_Step2_DMA(HASH_HandleTypeDef *hhash, uint8_t * @param Size length of the input buffer in bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HMACEx_SHA224_Step2_3_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HMACEx_SHA224_Step2_3_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, + uint32_t Size) { hhash->DigestCalculationDisable = RESET; return HMAC_Start_DMA(hhash, pInBuffer, Size, HASH_ALGOSELECTION_SHA224); @@ -967,7 +962,8 @@ HAL_StatusTypeDef HAL_HMACEx_SHA224_Step2_3_DMA(HASH_HandleTypeDef *hhash, uint8 * @param Size length of the input buffer in bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HMACEx_SHA256_Step1_2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HMACEx_SHA256_Step1_2_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, + uint32_t Size) { hhash->DigestCalculationDisable = SET; return HMAC_Start_DMA(hhash, pInBuffer, Size, HASH_ALGOSELECTION_SHA256); @@ -988,7 +984,7 @@ HAL_StatusTypeDef HAL_HMACEx_SHA256_Step1_2_DMA(HASH_HandleTypeDef *hhash, uint8 * @param Size length of the input buffer in bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HMACEx_SHA256_Step2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HMACEx_SHA256_Step2_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size) { if (hhash->DigestCalculationDisable != SET) { @@ -1014,7 +1010,8 @@ HAL_StatusTypeDef HAL_HMACEx_SHA256_Step2_DMA(HASH_HandleTypeDef *hhash, uint8_t * @param Size length of the input buffer in bytes. * @retval HAL status */ -HAL_StatusTypeDef HAL_HMACEx_SHA256_Step2_3_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size) +HAL_StatusTypeDef HAL_HMACEx_SHA256_Step2_3_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, + uint32_t Size) { hhash->DigestCalculationDisable = RESET; return HMAC_Start_DMA(hhash, pInBuffer, Size, HASH_ALGOSELECTION_SHA256); diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c index f2884b69f6..f7f8dad4dc 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c +++ b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c @@ -5690,15 +5690,11 @@ static void I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c) /* Enable Acknowledge */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); } - else if (CurrentXferOptions != I2C_LAST_FRAME_NO_STOP) + else { /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); } - else - { - /* Do nothing */ - } /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2s.c b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2s.c index b2fce81a57..76a98ae378 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2s.c +++ b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2s.c @@ -1767,7 +1767,7 @@ __weak void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s) * the configuration information for I2S module * @retval HAL state */ -HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s) +HAL_I2S_StateTypeDef HAL_I2S_GetState(const I2S_HandleTypeDef *hi2s) { return hi2s->State; } @@ -1778,7 +1778,7 @@ HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s) * the configuration information for I2S module * @retval I2S Error Code */ -uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s) +uint32_t HAL_I2S_GetError(const I2S_HandleTypeDef *hi2s) { return hi2s->ErrorCode; } diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2s_ex.c b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2s_ex.c index 823a8cc5c7..6b13fbc338 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2s_ex.c +++ b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2s_ex.c @@ -552,6 +552,7 @@ HAL_StatusTypeDef HAL_I2SEx_TransmitReceive_DMA(I2S_HandleTypeDef *hi2s, { uint32_t *tmp = NULL; uint32_t tmp1 = 0U; + HAL_StatusTypeDef status; if (hi2s->State != HAL_I2S_STATE_READY) { @@ -616,14 +617,14 @@ HAL_StatusTypeDef HAL_I2SEx_TransmitReceive_DMA(I2S_HandleTypeDef *hi2s, { /* Enable the Rx DMA Stream */ tmp = (uint32_t *)&pRxData; - HAL_DMA_Start_IT(hi2s->hdmarx, (uint32_t)&I2SxEXT(hi2s->Instance)->DR, *(uint32_t *)tmp, hi2s->RxXferSize); + status = HAL_DMA_Start_IT(hi2s->hdmarx, (uint32_t)&I2SxEXT(hi2s->Instance)->DR, *(uint32_t *)tmp, hi2s->RxXferSize); /* Enable Rx DMA Request */ SET_BIT(I2SxEXT(hi2s->Instance)->CR2, SPI_CR2_RXDMAEN); /* Enable the Tx DMA Stream */ tmp = (uint32_t *)&pTxData; - HAL_DMA_Start_IT(hi2s->hdmatx, *(uint32_t *)tmp, (uint32_t)&hi2s->Instance->DR, hi2s->TxXferSize); + status = HAL_DMA_Start_IT(hi2s->hdmatx, *(uint32_t *)tmp, (uint32_t)&hi2s->Instance->DR, hi2s->TxXferSize); /* Enable Tx DMA Request */ SET_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN); @@ -639,14 +640,14 @@ HAL_StatusTypeDef HAL_I2SEx_TransmitReceive_DMA(I2S_HandleTypeDef *hi2s, } /* Enable the Tx DMA Stream */ tmp = (uint32_t *)&pTxData; - HAL_DMA_Start_IT(hi2s->hdmatx, *(uint32_t *)tmp, (uint32_t)&I2SxEXT(hi2s->Instance)->DR, hi2s->TxXferSize); + status = HAL_DMA_Start_IT(hi2s->hdmatx, *(uint32_t *)tmp, (uint32_t)&I2SxEXT(hi2s->Instance)->DR, hi2s->TxXferSize); /* Enable Tx DMA Request */ SET_BIT(I2SxEXT(hi2s->Instance)->CR2, SPI_CR2_TXDMAEN); /* Enable the Rx DMA Stream */ tmp = (uint32_t *)&pRxData; - HAL_DMA_Start_IT(hi2s->hdmarx, (uint32_t)&hi2s->Instance->DR, *(uint32_t *)tmp, hi2s->RxXferSize); + status = HAL_DMA_Start_IT(hi2s->hdmarx, (uint32_t)&hi2s->Instance->DR, *(uint32_t *)tmp, hi2s->RxXferSize); /* Enable Rx DMA Request */ SET_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN); @@ -662,7 +663,7 @@ HAL_StatusTypeDef HAL_I2SEx_TransmitReceive_DMA(I2S_HandleTypeDef *hi2s, __HAL_I2S_ENABLE(hi2s); } - return HAL_OK; + return status; } /** diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_irda.c b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_irda.c index 0072dc19f2..6b8cb65dac 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_irda.c +++ b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_irda.c @@ -1073,19 +1073,33 @@ HAL_StatusTypeDef HAL_IRDA_Transmit_DMA(IRDA_HandleTypeDef *hirda, const uint8_t /* Enable the IRDA transmit DMA stream */ tmp = (const uint32_t *)&pData; - HAL_DMA_Start_IT(hirda->hdmatx, *(const uint32_t *)tmp, (uint32_t)&hirda->Instance->DR, Size); + if (HAL_DMA_Start_IT(hirda->hdmatx, *(const uint32_t *)tmp, (uint32_t)&hirda->Instance->DR, Size) == HAL_OK) + { + /* Clear the TC flag in the SR register by writing 0 to it */ + __HAL_IRDA_CLEAR_FLAG(hirda, IRDA_FLAG_TC); - /* Clear the TC flag in the SR register by writing 0 to it */ - __HAL_IRDA_CLEAR_FLAG(hirda, IRDA_FLAG_TC); + /* Process Unlocked */ + __HAL_UNLOCK(hirda); - /* Process Unlocked */ - __HAL_UNLOCK(hirda); + /* Enable the DMA transfer for transmit request by setting the DMAT bit + in the USART CR3 register */ + SET_BIT(hirda->Instance->CR3, USART_CR3_DMAT); - /* Enable the DMA transfer for transmit request by setting the DMAT bit - in the USART CR3 register */ - SET_BIT(hirda->Instance->CR3, USART_CR3_DMAT); + return HAL_OK; + } + else + { + /* Set error code to DMA */ + hirda->ErrorCode = HAL_IRDA_ERROR_DMA; - return HAL_OK; + /* Process Unlocked */ + __HAL_UNLOCK(hirda); + + /* Restore hirda->gState to ready */ + hirda->gState = HAL_IRDA_STATE_READY; + + return HAL_ERROR; + } } else { @@ -1140,28 +1154,42 @@ HAL_StatusTypeDef HAL_IRDA_Receive_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData /* Enable the DMA stream */ tmp = (uint32_t *)&pData; - HAL_DMA_Start_IT(hirda->hdmarx, (uint32_t)&hirda->Instance->DR, *(uint32_t *)tmp, Size); + if (HAL_DMA_Start_IT(hirda->hdmarx, (uint32_t)&hirda->Instance->DR, *(uint32_t *)tmp, Size) == HAL_OK) + { + /* Clear the Overrun flag just before enabling the DMA Rx request: can be mandatory for the second transfer */ + __HAL_IRDA_CLEAR_OREFLAG(hirda); - /* Clear the Overrun flag just before enabling the DMA Rx request: can be mandatory for the second transfer */ - __HAL_IRDA_CLEAR_OREFLAG(hirda); + /* Process Unlocked */ + __HAL_UNLOCK(hirda); - /* Process Unlocked */ - __HAL_UNLOCK(hirda); + if (hirda->Init.Parity != IRDA_PARITY_NONE) + { + /* Enable the IRDA Parity Error Interrupt */ + SET_BIT(hirda->Instance->CR1, USART_CR1_PEIE); + } - if (hirda->Init.Parity != IRDA_PARITY_NONE) - { - /* Enable the IRDA Parity Error Interrupt */ - SET_BIT(hirda->Instance->CR1, USART_CR1_PEIE); + /* Enable the IRDA Error Interrupt: (Frame error, Noise error, Overrun error) */ + SET_BIT(hirda->Instance->CR3, USART_CR3_EIE); + + /* Enable the DMA transfer for the receiver request by setting the DMAR bit + in the USART CR3 register */ + SET_BIT(hirda->Instance->CR3, USART_CR3_DMAR); + + return HAL_OK; } + else + { + /* Set error code to DMA */ + hirda->ErrorCode = HAL_IRDA_ERROR_DMA; - /* Enable the IRDA Error Interrupt: (Frame error, Noise error, Overrun error) */ - SET_BIT(hirda->Instance->CR3, USART_CR3_EIE); + /* Process Unlocked */ + __HAL_UNLOCK(hirda); - /* Enable the DMA transfer for the receiver request by setting the DMAR bit - in the USART CR3 register */ - SET_BIT(hirda->Instance->CR3, USART_CR3_DMAR); + /* Restore hirda->RxState to ready */ + hirda->RxState = HAL_IRDA_STATE_READY; - return HAL_OK; + return HAL_ERROR; + } } else { diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c index c01eb29c0e..bc03a530b8 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c +++ b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c @@ -120,7 +120,8 @@ The timeout value is multiplied by 1000 to be converted in milliseconds. LSI startup time is also considered here by adding LSI_STARTUP_TIME converted in milliseconds. */ -#define HAL_IWDG_DEFAULT_TIMEOUT (((6UL * 256UL * 1000UL) / LSI_VALUE) + ((LSI_STARTUP_TIME / 1000UL) + 1UL)) +#define HAL_IWDG_DEFAULT_TIMEOUT (((6UL * 256UL * 1000UL) / (LSI_VALUE / 128U)) + \ + ((LSI_STARTUP_TIME / 1000UL) + 1UL)) #define IWDG_KERNEL_UPDATE_FLAGS (IWDG_SR_RVU | IWDG_SR_PVU) /** * @} diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c index f5f814820d..c5133aa0bd 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c +++ b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c @@ -279,24 +279,20 @@ HAL_StatusTypeDef HAL_LTDC_Init(LTDC_HandleTypeDef *hltdc) hltdc->Init.DEPolarity | hltdc->Init.PCPolarity); /* Set Synchronization size */ - hltdc->Instance->SSCR &= ~(LTDC_SSCR_VSH | LTDC_SSCR_HSW); tmp = (hltdc->Init.HorizontalSync << 16U); - hltdc->Instance->SSCR |= (tmp | hltdc->Init.VerticalSync); + WRITE_REG(hltdc->Instance->SSCR, (tmp | hltdc->Init.VerticalSync)); /* Set Accumulated Back porch */ - hltdc->Instance->BPCR &= ~(LTDC_BPCR_AVBP | LTDC_BPCR_AHBP); tmp = (hltdc->Init.AccumulatedHBP << 16U); - hltdc->Instance->BPCR |= (tmp | hltdc->Init.AccumulatedVBP); + WRITE_REG(hltdc->Instance->BPCR, (tmp | hltdc->Init.AccumulatedVBP)); /* Set Accumulated Active Width */ - hltdc->Instance->AWCR &= ~(LTDC_AWCR_AAH | LTDC_AWCR_AAW); tmp = (hltdc->Init.AccumulatedActiveW << 16U); - hltdc->Instance->AWCR |= (tmp | hltdc->Init.AccumulatedActiveH); + WRITE_REG(hltdc->Instance->AWCR, (tmp | hltdc->Init.AccumulatedActiveH)); /* Set Total Width */ - hltdc->Instance->TWCR &= ~(LTDC_TWCR_TOTALH | LTDC_TWCR_TOTALW); tmp = (hltdc->Init.TotalWidth << 16U); - hltdc->Instance->TWCR |= (tmp | hltdc->Init.TotalHeigh); + WRITE_REG(hltdc->Instance->TWCR, (tmp | hltdc->Init.TotalHeigh)); /* Set the background color value */ tmp = ((uint32_t)(hltdc->Init.Backcolor.Green) << 8U); @@ -916,11 +912,12 @@ HAL_StatusTypeDef HAL_LTDC_ConfigColorKeying(LTDC_HandleTypeDef *hltdc, uint32_t * LTDC_LAYER_1 (0) or LTDC_LAYER_2 (1) * @retval HAL status */ -HAL_StatusTypeDef HAL_LTDC_ConfigCLUT(LTDC_HandleTypeDef *hltdc, uint32_t *pCLUT, uint32_t CLUTSize, uint32_t LayerIdx) +HAL_StatusTypeDef HAL_LTDC_ConfigCLUT(LTDC_HandleTypeDef *hltdc, const uint32_t *pCLUT, uint32_t CLUTSize, + uint32_t LayerIdx) { uint32_t tmp; uint32_t counter; - uint32_t *pcolorlut = pCLUT; + const uint32_t *pcolorlut = pCLUT; /* Check the parameters */ assert_param(IS_LTDC_LAYER(LayerIdx)); @@ -2092,7 +2089,7 @@ HAL_StatusTypeDef HAL_LTDC_DisableCLUT_NoReload(LTDC_HandleTypeDef *hltdc, uint3 * the configuration information for the LTDC. * @retval HAL state */ -HAL_LTDC_StateTypeDef HAL_LTDC_GetState(LTDC_HandleTypeDef *hltdc) +HAL_LTDC_StateTypeDef HAL_LTDC_GetState(const LTDC_HandleTypeDef *hltdc) { return hltdc->State; } @@ -2103,7 +2100,7 @@ HAL_LTDC_StateTypeDef HAL_LTDC_GetState(LTDC_HandleTypeDef *hltdc) * the configuration information for the LTDC. * @retval LTDC Error Code */ -uint32_t HAL_LTDC_GetError(LTDC_HandleTypeDef *hltdc) +uint32_t HAL_LTDC_GetError(const LTDC_HandleTypeDef *hltdc) { return hltdc->ErrorCode; } @@ -2154,9 +2151,7 @@ static void LTDC_SetConfig(LTDC_HandleTypeDef *hltdc, LTDC_LayerCfgTypeDef *pLay tmp = ((uint32_t)(pLayerCfg->Backcolor.Green) << 8U); tmp1 = ((uint32_t)(pLayerCfg->Backcolor.Red) << 16U); tmp2 = (pLayerCfg->Alpha0 << 24U); - LTDC_LAYER(hltdc, LayerIdx)->DCCR &= ~(LTDC_LxDCCR_DCBLUE | LTDC_LxDCCR_DCGREEN | LTDC_LxDCCR_DCRED | - LTDC_LxDCCR_DCALPHA); - LTDC_LAYER(hltdc, LayerIdx)->DCCR = (pLayerCfg->Backcolor.Blue | tmp | tmp1 | tmp2); + WRITE_REG(LTDC_LAYER(hltdc, LayerIdx)->DCCR, (pLayerCfg->Backcolor.Blue | tmp | tmp1 | tmp2)); /* Specifies the constant alpha value */ LTDC_LAYER(hltdc, LayerIdx)->CACR &= ~(LTDC_LxCACR_CONSTA); @@ -2167,8 +2162,7 @@ static void LTDC_SetConfig(LTDC_HandleTypeDef *hltdc, LTDC_LayerCfgTypeDef *pLay LTDC_LAYER(hltdc, LayerIdx)->BFCR = (pLayerCfg->BlendingFactor1 | pLayerCfg->BlendingFactor2); /* Configure the color frame buffer start address */ - LTDC_LAYER(hltdc, LayerIdx)->CFBAR &= ~(LTDC_LxCFBAR_CFBADD); - LTDC_LAYER(hltdc, LayerIdx)->CFBAR = (pLayerCfg->FBStartAdress); + WRITE_REG(LTDC_LAYER(hltdc, LayerIdx)->CFBAR, pLayerCfg->FBStartAdress); if (pLayerCfg->PixelFormat == LTDC_PIXEL_FORMAT_ARGB8888) { diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_mmc.c b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_mmc.c index 859c18aada..4d60e274e6 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_mmc.c +++ b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_mmc.c @@ -1676,24 +1676,30 @@ void HAL_MMC_IRQHandler(MMC_HandleTypeDef *hmmc) else if((context & MMC_CONTEXT_DMA) != 0U) { /* Abort the MMC DMA Streams */ - if(hmmc->hdmatx != NULL) + if(((context & MMC_CONTEXT_WRITE_SINGLE_BLOCK) != 0U) || ((context & MMC_CONTEXT_WRITE_MULTIPLE_BLOCK) != 0U)) { - /* Set the DMA Tx abort callback */ - hmmc->hdmatx->XferAbortCallback = MMC_DMATxAbort; - /* Abort DMA in IT mode */ - if(HAL_DMA_Abort_IT(hmmc->hdmatx) != HAL_OK) + if(hmmc->hdmatx != NULL) { - MMC_DMATxAbort(hmmc->hdmatx); + /* Set the DMA Tx abort callback */ + hmmc->hdmatx->XferAbortCallback = MMC_DMATxAbort; + /* Abort DMA in IT mode */ + if(HAL_DMA_Abort_IT(hmmc->hdmatx) != HAL_OK) + { + MMC_DMATxAbort(hmmc->hdmatx); + } } } - else if(hmmc->hdmarx != NULL) + else if(((context & SD_CONTEXT_READ_SINGLE_BLOCK) != 0U) || ((context & SD_CONTEXT_READ_MULTIPLE_BLOCK) != 0U)) { - /* Set the DMA Rx abort callback */ - hmmc->hdmarx->XferAbortCallback = MMC_DMARxAbort; - /* Abort DMA in IT mode */ - if(HAL_DMA_Abort_IT(hmmc->hdmarx) != HAL_OK) + if(hmmc->hdmarx != NULL) { - MMC_DMARxAbort(hmmc->hdmarx); + /* Set the DMA Rx abort callback */ + hmmc->hdmarx->XferAbortCallback = MMC_DMARxAbort; + /* Abort DMA in IT mode */ + if(HAL_DMA_Abort_IT(hmmc->hdmarx) != HAL_OK) + { + MMC_DMARxAbort(hmmc->hdmarx); + } } } else @@ -2377,7 +2383,7 @@ HAL_StatusTypeDef HAL_MMC_ConfigWideBusOperation(MMC_HandleTypeDef *hmmc, uint32 if(errorstate != HAL_MMC_ERROR_NONE) { /* Clear all the static flags */ - __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS); + __HAL_MMC_CLEAR_FLAG(hmmc, SDIO_STATIC_FLAGS); hmmc->ErrorCode |= errorstate; return HAL_ERROR; } diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nand.c b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nand.c index 5cd4ab2dae..df22cad077 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nand.c +++ b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nand.c @@ -539,7 +539,7 @@ HAL_StatusTypeDef HAL_NAND_Reset(NAND_HandleTypeDef *hnand) * @param pDeviceConfig pointer to NAND_DeviceConfigTypeDef structure * @retval HAL status */ -HAL_StatusTypeDef HAL_NAND_ConfigDevice(NAND_HandleTypeDef *hnand, NAND_DeviceConfigTypeDef *pDeviceConfig) +HAL_StatusTypeDef HAL_NAND_ConfigDevice(NAND_HandleTypeDef *hnand, const NAND_DeviceConfigTypeDef *pDeviceConfig) { hnand->Config.PageSize = pDeviceConfig->PageSize; hnand->Config.SpareAreaSize = pDeviceConfig->SpareAreaSize; @@ -693,7 +693,7 @@ HAL_StatusTypeDef HAL_NAND_Read_Page_8b(NAND_HandleTypeDef *hnand, const NAND_Ad /* Get Data into Buffer */ for (index = 0U; index < hnand->Config.PageSize; index++) { - *buff = *(uint8_t *)deviceaddress; + *buff = *(__IO uint8_t *)deviceaddress; buff++; } @@ -876,7 +876,7 @@ HAL_StatusTypeDef HAL_NAND_Read_Page_16b(NAND_HandleTypeDef *hnand, const NAND_A /* Get Data into Buffer */ for (index = 0U; index < hnand->Config.PageSize; index++) { - *buff = *(uint16_t *)deviceaddress; + *buff = *(__IO uint16_t *)deviceaddress; buff++; } @@ -1395,7 +1395,7 @@ HAL_StatusTypeDef HAL_NAND_Read_SpareArea_8b(NAND_HandleTypeDef *hnand, const NA /* Get Data into Buffer */ for (index = 0U; index < hnand->Config.SpareAreaSize; index++) { - *buff = *(uint8_t *)deviceaddress; + *buff = *(__IO uint8_t *)deviceaddress; buff++; } @@ -1571,7 +1571,7 @@ HAL_StatusTypeDef HAL_NAND_Read_SpareArea_16b(NAND_HandleTypeDef *hnand, const N /* Get Data into Buffer */ for (index = 0U; index < hnand->Config.SpareAreaSize; index++) { - *buff = *(uint16_t *)deviceaddress; + *buff = *(__IO uint16_t *)deviceaddress; buff++; } diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pccard.c b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pccard.c index 14deb478fd..a568d57041 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pccard.c +++ b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pccard.c @@ -163,7 +163,8 @@ * @retval HAL status */ HAL_StatusTypeDef HAL_PCCARD_Init(PCCARD_HandleTypeDef *hpccard, FMC_NAND_PCC_TimingTypeDef *ComSpaceTiming, - FMC_NAND_PCC_TimingTypeDef *AttSpaceTiming, FMC_NAND_PCC_TimingTypeDef *IOSpaceTiming) + FMC_NAND_PCC_TimingTypeDef *AttSpaceTiming, + FMC_NAND_PCC_TimingTypeDef *IOSpaceTiming) { /* Check the PCCARD controller state */ if (hpccard == NULL) @@ -187,7 +188,7 @@ HAL_StatusTypeDef HAL_PCCARD_Init(PCCARD_HandleTypeDef *hpccard, FMC_NAND_PCC_Ti #else /* Initialize the low level hardware (MSP) */ HAL_PCCARD_MspInit(hpccard); -#endif +#endif /* USE_HAL_PCCARD_REGISTER_CALLBACKS */ } /* Initialize the PCCARD state */ @@ -234,7 +235,7 @@ HAL_StatusTypeDef HAL_PCCARD_DeInit(PCCARD_HandleTypeDef *hpccard) #else /* De-Initialize the low level hardware (MSP) */ HAL_PCCARD_MspDeInit(hpccard); -#endif +#endif /* USE_HAL_PCCARD_REGISTER_CALLBACKS */ /* Configure the PCCARD registers with their reset values */ FMC_PCCARD_DeInit(hpccard->Instance); @@ -307,8 +308,9 @@ __weak void HAL_PCCARD_MspDeInit(PCCARD_HandleTypeDef *hpccard) */ HAL_StatusTypeDef HAL_PCCARD_Read_ID(PCCARD_HandleTypeDef *hpccard, uint8_t CompactFlash_ID[], uint8_t *pStatus) { - uint32_t timeout = PCCARD_TIMEOUT_READ_ID, index = 0U; - uint8_t status = 0; + uint32_t timeout = 0U; + uint32_t index = 0U; + uint8_t status = 0U; /* Process Locked */ __HAL_LOCK(hpccard); @@ -319,6 +321,9 @@ HAL_StatusTypeDef HAL_PCCARD_Read_ID(PCCARD_HandleTypeDef *hpccard, uint8_t Comp return HAL_BUSY; } + /* Initialize timeout value */ + timeout = PCCARD_TIMEOUT_READ_ID; + /* Update the PCCARD controller state */ hpccard->State = HAL_PCCARD_STATE_BUSY; @@ -371,8 +376,9 @@ HAL_StatusTypeDef HAL_PCCARD_Read_ID(PCCARD_HandleTypeDef *hpccard, uint8_t Comp HAL_StatusTypeDef HAL_PCCARD_Read_Sector(PCCARD_HandleTypeDef *hpccard, uint16_t *pBuffer, uint16_t SectorAddress, uint8_t *pStatus) { - uint32_t timeout = PCCARD_TIMEOUT_READ_WRITE_SECTOR, index = 0U; - uint8_t status = 0; + uint32_t timeout = 0U; + uint32_t index = 0U; + uint8_t status = 0U; /* Process Locked */ __HAL_LOCK(hpccard); @@ -383,6 +389,9 @@ HAL_StatusTypeDef HAL_PCCARD_Read_Sector(PCCARD_HandleTypeDef *hpccard, uint16_t return HAL_BUSY; } + /* Initialize timeout value */ + timeout = PCCARD_TIMEOUT_READ_WRITE_SECTOR; + /* Update the PCCARD controller state */ hpccard->State = HAL_PCCARD_STATE_BUSY; @@ -448,8 +457,9 @@ HAL_StatusTypeDef HAL_PCCARD_Read_Sector(PCCARD_HandleTypeDef *hpccard, uint16_t HAL_StatusTypeDef HAL_PCCARD_Write_Sector(PCCARD_HandleTypeDef *hpccard, uint16_t *pBuffer, uint16_t SectorAddress, uint8_t *pStatus) { - uint32_t timeout = PCCARD_TIMEOUT_READ_WRITE_SECTOR, index = 0U; - uint8_t status = 0; + uint32_t timeout = 0U; + uint32_t index = 0U; + uint8_t status = 0U; /* Process Locked */ __HAL_LOCK(hpccard); @@ -460,6 +470,9 @@ HAL_StatusTypeDef HAL_PCCARD_Write_Sector(PCCARD_HandleTypeDef *hpccard, uint16_ return HAL_BUSY; } + /* Initialize timeout value */ + timeout = PCCARD_TIMEOUT_READ_WRITE_SECTOR; + /* Update the PCCARD controller state */ hpccard->State = HAL_PCCARD_STATE_BUSY; @@ -522,7 +535,7 @@ HAL_StatusTypeDef HAL_PCCARD_Write_Sector(PCCARD_HandleTypeDef *hpccard, uint16_ HAL_StatusTypeDef HAL_PCCARD_Erase_Sector(PCCARD_HandleTypeDef *hpccard, uint16_t SectorAddress, uint8_t *pStatus) { uint32_t timeout = PCCARD_TIMEOUT_ERASE_SECTOR; - uint8_t status = 0; + uint8_t status = 0U; /* Process Locked */ __HAL_LOCK(hpccard); @@ -624,7 +637,7 @@ void HAL_PCCARD_IRQHandler(PCCARD_HandleTypeDef *hpccard) hpccard->ItCallback(hpccard); #else HAL_PCCARD_ITCallback(hpccard); -#endif +#endif /* USE_HAL_PCCARD_REGISTER_CALLBACKS */ /* Clear PCCARD interrupt Rising edge pending bit */ __FMC_PCCARD_CLEAR_FLAG(hpccard->Instance, FMC_FLAG_RISING_EDGE); @@ -638,7 +651,7 @@ void HAL_PCCARD_IRQHandler(PCCARD_HandleTypeDef *hpccard) hpccard->ItCallback(hpccard); #else HAL_PCCARD_ITCallback(hpccard); -#endif +#endif /* USE_HAL_PCCARD_REGISTER_CALLBACKS */ /* Clear PCCARD interrupt Level pending bit */ __FMC_PCCARD_CLEAR_FLAG(hpccard->Instance, FMC_FLAG_LEVEL); @@ -652,7 +665,7 @@ void HAL_PCCARD_IRQHandler(PCCARD_HandleTypeDef *hpccard) hpccard->ItCallback(hpccard); #else HAL_PCCARD_ITCallback(hpccard); -#endif +#endif /* USE_HAL_PCCARD_REGISTER_CALLBACKS */ /* Clear PCCARD interrupt Falling edge pending bit */ __FMC_PCCARD_CLEAR_FLAG(hpccard->Instance, FMC_FLAG_FALLING_EDGE); @@ -666,7 +679,7 @@ void HAL_PCCARD_IRQHandler(PCCARD_HandleTypeDef *hpccard) hpccard->ItCallback(hpccard); #else HAL_PCCARD_ITCallback(hpccard); -#endif +#endif /* USE_HAL_PCCARD_REGISTER_CALLBACKS */ /* Clear PCCARD interrupt FIFO empty pending bit */ __FMC_PCCARD_CLEAR_FLAG(hpccard->Instance, FMC_FLAG_FEMPT); @@ -823,7 +836,7 @@ HAL_StatusTypeDef HAL_PCCARD_UnRegisterCallback(PCCARD_HandleTypeDef *hpccard, H __HAL_UNLOCK(hpccard); return status; } -#endif +#endif /* USE_HAL_PCCARD_REGISTER_CALLBACKS */ /** * @} @@ -866,7 +879,8 @@ HAL_PCCARD_StateTypeDef HAL_PCCARD_GetState(PCCARD_HandleTypeDef *hpccard) */ HAL_PCCARD_StatusTypeDef HAL_PCCARD_GetStatus(PCCARD_HandleTypeDef *hpccard) { - uint32_t timeout = PCCARD_TIMEOUT_STATUS, status_pccard = 0U; + uint32_t timeout = PCCARD_TIMEOUT_STATUS; + uint32_t status_pccard = 0U; /* Check the PCCARD controller state */ if (hpccard->State == HAL_PCCARD_STATE_BUSY) @@ -902,7 +916,8 @@ HAL_PCCARD_StatusTypeDef HAL_PCCARD_GetStatus(PCCARD_HandleTypeDef *hpccard) */ HAL_PCCARD_StatusTypeDef HAL_PCCARD_ReadStatus(PCCARD_HandleTypeDef *hpccard) { - uint8_t data = 0U, status_pccard = PCCARD_BUSY; + uint8_t data = 0U; + uint8_t status_pccard = PCCARD_BUSY; /* Check the PCCARD controller state */ if (hpccard->State == HAL_PCCARD_STATE_BUSY) diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd.c b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd.c index d53e0b1c5d..dacbfeb4c9 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd.c +++ b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd.c @@ -1476,7 +1476,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) if ((hpcd->OUT_ep[epnum].type == EP_TYPE_ISOC) && ((RegVal & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA) && - ((RegVal & (0x1U << 16)) == (hpcd->FrameNumber & 0x1U))) + (((RegVal & (0x1U << 16)) >> 16U) == (hpcd->FrameNumber & 0x1U))) { hpcd->OUT_ep[epnum].is_iso_incomplete = 1U; @@ -2149,6 +2149,7 @@ HAL_StatusTypeDef HAL_PCD_SetTestMode(const PCD_HandleTypeDef *hpcd, uint8_t tes case TEST_SE0_NAK: case TEST_PACKET: case TEST_FORCE_EN: + USBx_DEVICE->DCTL &= ~(0x7U << 4); USBx_DEVICE->DCTL |= (uint32_t)testmode << 4; break; diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_qspi.c b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_qspi.c index 5256d18ecb..0a93a94060 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_qspi.c +++ b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_qspi.c @@ -573,7 +573,7 @@ void HAL_QSPI_IRQHandler(QSPI_HandleTypeDef *hqspi) } /* Clear Busy bit */ - HAL_QSPI_Abort_IT(hqspi); + (void)HAL_QSPI_Abort_IT(hqspi); /* Change state of QSPI */ hqspi->State = HAL_QSPI_STATE_READY; @@ -616,7 +616,7 @@ void HAL_QSPI_IRQHandler(QSPI_HandleTypeDef *hqspi) } /* Workaround - Extra data written in the FIFO at the end of a read transfer */ - HAL_QSPI_Abort_IT(hqspi); + (void)HAL_QSPI_Abort_IT(hqspi); /* Change state of QSPI */ hqspi->State = HAL_QSPI_STATE_READY; @@ -1379,20 +1379,24 @@ HAL_StatusTypeDef HAL_QSPI_Transmit_DMA(QSPI_HandleTypeDef *hqspi, uint8_t *pDat /* Update direction mode bit */ MODIFY_REG(hqspi->hdma->Instance->CR, DMA_SxCR_DIR, hqspi->hdma->Init.Direction); + /* Enable the QSPI transfer error Interrupt */ + __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TE); + + /* Enable the DMA transfer by setting the DMAEN bit in the QSPI CR register */ + SET_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN); + + /* Enable the QSPI transmit DMA Channel */ if (HAL_DMA_Start_IT(hqspi->hdma, (uint32_t)pData, (uint32_t)&hqspi->Instance->DR, hqspi->TxXferSize) == HAL_OK) { /* Process unlocked */ __HAL_UNLOCK(hqspi); - - /* Enable the QSPI transfer error Interrupt */ - __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TE); - - /* Enable the DMA transfer by setting the DMAEN bit in the QSPI CR register */ - SET_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN); } else { + /* Disable the DMA transfer by clearing the DMAEN bit in the QSPI CR register */ + CLEAR_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN); + status = HAL_ERROR; hqspi->ErrorCode |= HAL_QSPI_ERROR_DMA; hqspi->State = HAL_QSPI_STATE_READY; @@ -1552,20 +1556,23 @@ HAL_StatusTypeDef HAL_QSPI_Receive_DMA(QSPI_HandleTypeDef *hqspi, uint8_t *pData /* Start the transfer by re-writing the address in AR register */ WRITE_REG(hqspi->Instance->AR, addr_reg); + /* Enable the QSPI transfer error Interrupt */ + __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TE); + + /* Enable the DMA transfer by setting the DMAEN bit in the QSPI CR register */ + SET_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN); + /* Enable the DMA Channel */ if(HAL_DMA_Start_IT(hqspi->hdma, (uint32_t)&hqspi->Instance->DR, (uint32_t)pData, hqspi->RxXferSize) == HAL_OK) { - /* Enable the DMA transfer by setting the DMAEN bit in the QSPI CR register */ - SET_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN); - /* Process unlocked */ __HAL_UNLOCK(hqspi); - - /* Enable the QSPI transfer error Interrupt */ - __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TE); } else { + /* Disable the DMA transfer by clearing the DMAEN bit in the QSPI CR register */ + CLEAR_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN); + status = HAL_ERROR; hqspi->ErrorCode |= HAL_QSPI_ERROR_DMA; hqspi->State = HAL_QSPI_STATE_READY; @@ -1580,26 +1587,29 @@ HAL_StatusTypeDef HAL_QSPI_Receive_DMA(QSPI_HandleTypeDef *hqspi, uint8_t *pData /* Update direction mode bit */ MODIFY_REG(hqspi->hdma->Instance->CR, DMA_SxCR_DIR, hqspi->hdma->Init.Direction); + /* Configure QSPI: CCR register with functional as indirect read */ + MODIFY_REG(hqspi->Instance->CCR, QUADSPI_CCR_FMODE, QSPI_FUNCTIONAL_MODE_INDIRECT_READ); + + /* Start the transfer by re-writing the address in AR register */ + WRITE_REG(hqspi->Instance->AR, addr_reg); + + /* Enable the QSPI transfer error Interrupt */ + __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TE); + + /* Enable the DMA transfer by setting the DMAEN bit in the QSPI CR register */ + SET_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN); + /* Enable the DMA Channel */ if(HAL_DMA_Start_IT(hqspi->hdma, (uint32_t)&hqspi->Instance->DR, (uint32_t)pData, hqspi->RxXferSize)== HAL_OK) { - /* Configure QSPI: CCR register with functional as indirect read */ - MODIFY_REG(hqspi->Instance->CCR, QUADSPI_CCR_FMODE, QSPI_FUNCTIONAL_MODE_INDIRECT_READ); - - /* Start the transfer by re-writing the address in AR register */ - WRITE_REG(hqspi->Instance->AR, addr_reg); - /* Process unlocked */ __HAL_UNLOCK(hqspi); - - /* Enable the QSPI transfer error Interrupt */ - __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TE); - - /* Enable the DMA transfer by setting the DMAEN bit in the QSPI CR register */ - SET_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN); } else { + /* Disable the DMA transfer by clearing the DMAEN bit in the QSPI CR register */ + CLEAR_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN); + status = HAL_ERROR; hqspi->ErrorCode |= HAL_QSPI_ERROR_DMA; hqspi->State = HAL_QSPI_STATE_READY; @@ -1851,7 +1861,7 @@ HAL_StatusTypeDef HAL_QSPI_MemoryMapped(QSPI_HandleTypeDef *hqspi, QSPI_CommandT assert_param(IS_QSPI_INSTRUCTION_MODE(cmd->InstructionMode)); if (cmd->InstructionMode != QSPI_INSTRUCTION_NONE) { - assert_param(IS_QSPI_INSTRUCTION(cmd->Instruction)); + assert_param(IS_QSPI_INSTRUCTION(cmd->Instruction)); } assert_param(IS_QSPI_ADDRESS_MODE(cmd->AddressMode)); @@ -1891,9 +1901,9 @@ HAL_StatusTypeDef HAL_QSPI_MemoryMapped(QSPI_HandleTypeDef *hqspi, QSPI_CommandT if (status == HAL_OK) { /* Configure QSPI: CR register with timeout counter enable */ - MODIFY_REG(hqspi->Instance->CR, QUADSPI_CR_TCEN, cfg->TimeOutActivation); + MODIFY_REG(hqspi->Instance->CR, QUADSPI_CR_TCEN, cfg->TimeOutActivation); - if (cfg->TimeOutActivation == QSPI_TIMEOUT_COUNTER_ENABLE) + if (cfg->TimeOutActivation == QSPI_TIMEOUT_COUNTER_ENABLE) { assert_param(IS_QSPI_TIMEOUT_PERIOD(cfg->TimeOutPeriod)); diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c index c04d33a6d4..c18fa09b20 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c +++ b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c @@ -216,7 +216,7 @@ __weak HAL_StatusTypeDef HAL_RCC_DeInit(void) * first and then HSE On or HSE Bypass. * @retval HAL status */ -__weak HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) +__weak HAL_StatusTypeDef HAL_RCC_OscConfig(const RCC_OscInitTypeDef *RCC_OscInitStruct) { uint32_t tickstart; uint32_t pll_config; @@ -588,7 +588,7 @@ __weak HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruc * (for more details refer to section above "Initialization/de-initialization functions") * @retval None */ -HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) +HAL_StatusTypeDef HAL_RCC_ClockConfig(const RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) { uint32_t tickstart; diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c index 7b3b20bbd4..04317181b8 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c +++ b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c @@ -3374,7 +3374,7 @@ HAL_StatusTypeDef HAL_RCC_DeInit(void) * is only available in STM32F410xx/STM32F446xx/STM32F469xx/STM32F479xx/STM32F412Zx/STM32F412Vx/STM32F412Rx/STM32F412Cx devices * @retval HAL status */ -HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) +HAL_StatusTypeDef HAL_RCC_OscConfig(const RCC_OscInitTypeDef *RCC_OscInitStruct) { uint32_t tickstart; uint32_t pll_config; diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rtc.c b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rtc.c index 0365accf00..96d70da8a2 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rtc.c +++ b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rtc.c @@ -6,8 +6,8 @@ * This file provides firmware functions to manage the following * functionalities of the Real-Time Clock (RTC) peripheral: * + Initialization and de-initialization functions - * + RTC Calendar (Time and Date) configuration functions - * + RTC Alarms (Alarm A and Alarm B) configuration functions + * + Calendar (Time and Date) configuration functions + * + Alarms (Alarm A and Alarm B) configuration functions * + Peripheral Control functions * + Peripheral State functions * @@ -124,6 +124,12 @@ *** Callback registration *** ============================================= [..] + When the compilation define USE_HAL_RTC_REGISTER_CALLBACKS is set to 0 or + not defined, the callback registration feature is not available and all + callbacks are set to the corresponding weak functions. + This is the recommended configuration in order to optimize memory/code + consumption footprint/performances. + [..] The compilation define USE_HAL_RTC_REGISTER_CALLBACKS when set to 1 allows the user to configure dynamically the driver callbacks. Use Function HAL_RTC_RegisterCallback() to register an interrupt callback. @@ -134,9 +140,11 @@ (+) TimeStampEventCallback : RTC Timestamp Event callback. (+) WakeUpTimerEventCallback : RTC WakeUpTimer Event callback. (+) Tamper1EventCallback : RTC Tamper 1 Event callback. - (+) Tamper2EventCallback : RTC Tamper 2 Event callback. + (+) Tamper2EventCallback : RTC Tamper 2 Event callback. (*) (+) MspInitCallback : RTC MspInit callback. (+) MspDeInitCallback : RTC MspDeInit callback. + + (*) value not applicable to all devices. [..] This function takes as parameters the HAL peripheral handle, the Callback ID and a pointer to the user callback function. @@ -151,31 +159,29 @@ (+) TimeStampEventCallback : RTC Timestamp Event callback. (+) WakeUpTimerEventCallback : RTC WakeUpTimer Event callback. (+) Tamper1EventCallback : RTC Tamper 1 Event callback. - (+) Tamper2EventCallback : RTC Tamper 2 Event callback. + (+) Tamper2EventCallback : RTC Tamper 2 Event callback. (*) (+) MspInitCallback : RTC MspInit callback. (+) MspDeInitCallback : RTC MspDeInit callback. + + (*) value not applicable to all devices. [..] By default, after the HAL_RTC_Init() and when the state is HAL_RTC_STATE_RESET, all callbacks are set to the corresponding weak functions: - examples AlarmAEventCallback(), WakeUpTimerEventCallback(). + examples AlarmAEventCallback(), TimeStampEventCallback(). Exception done for MspInit() and MspDeInit() callbacks that are reset to the - legacy weak function in the HAL_RTC_Init()/HAL_RTC_DeInit() only - when these callbacks are null (not registered beforehand). + legacy weak function in the HAL_RTC_Init()/HAL_RTC_DeInit() only when these + callbacks are null (not registered beforehand). If not, MspInit() or MspDeInit() are not null, HAL_RTC_Init()/HAL_RTC_DeInit() keep and use the user MspInit()/MspDeInit() callbacks (registered beforehand). [..] Callbacks can be registered/unregistered in HAL_RTC_STATE_READY state only. - Exception done MspInit()/MspDeInit() that can be registered/unregistered + Exception done for MspInit() and MspDeInit() that can be registered/unregistered in HAL_RTC_STATE_READY or HAL_RTC_STATE_RESET state. Thus registered (user) MspInit()/MspDeInit() callbacks can be used during the Init/DeInit. - In that case first register the MspInit()/MspDeInit() user callbacks - using HAL_RTC_RegisterCallback() before calling HAL_RTC_DeInit() - or HAL_RTC_Init() functions. - [..] - When The compilation define USE_HAL_RTC_REGISTER_CALLBACKS is set to 0 or - not defined, the callback registration feature is not available and all - callbacks are set to the corresponding weak functions. + In that case first register the MspInit()/MspDeInit() user callbacks using + HAL_RTC_RegisterCallback() before calling HAL_RTC_DeInit() or HAL_RTC_Init() + functions. @endverbatim ****************************************************************************** @@ -248,7 +254,7 @@ */ HAL_StatusTypeDef HAL_RTC_Init(RTC_HandleTypeDef *hrtc) { - HAL_StatusTypeDef status = HAL_ERROR; + HAL_StatusTypeDef status; /* Check RTC handler validity */ if (hrtc == NULL) @@ -362,7 +368,7 @@ HAL_StatusTypeDef HAL_RTC_Init(RTC_HandleTypeDef *hrtc) */ HAL_StatusTypeDef HAL_RTC_DeInit(RTC_HandleTypeDef *hrtc) { - HAL_StatusTypeDef status = HAL_ERROR; + HAL_StatusTypeDef status; /* Check the parameters */ assert_param(IS_RTC_ALL_INSTANCE(hrtc->Instance)); @@ -381,10 +387,10 @@ HAL_StatusTypeDef HAL_RTC_DeInit(RTC_HandleTypeDef *hrtc) /* Reset RTC registers */ hrtc->Instance->TR = 0x00000000U; hrtc->Instance->DR = (RTC_DR_WDU_0 | RTC_DR_MU_0 | RTC_DR_DU_0); - hrtc->Instance->CR &= 0x00000000U; + hrtc->Instance->CR = 0x00000000U; hrtc->Instance->WUTR = RTC_WUTR_WUT; hrtc->Instance->PRER = (uint32_t)(RTC_PRER_PREDIV_A | 0x000000FFU); - hrtc->Instance->CALIBR = 0x00000000U; + hrtc->Instance->CALIBR = 0x00000000U; hrtc->Instance->ALRMAR = 0x00000000U; hrtc->Instance->ALRMBR = 0x00000000U; hrtc->Instance->CALR = 0x00000000U; @@ -438,11 +444,12 @@ HAL_StatusTypeDef HAL_RTC_DeInit(RTC_HandleTypeDef *hrtc) * @arg @ref HAL_RTC_ALARM_B_EVENT_CB_ID Alarm B Event Callback ID * @arg @ref HAL_RTC_TIMESTAMP_EVENT_CB_ID Timestamp Event Callback ID * @arg @ref HAL_RTC_WAKEUPTIMER_EVENT_CB_ID Wakeup Timer Event Callback ID - * @arg @ref HAL_RTC_TAMPER1_EVENT_CB_ID Tamper 1 Callback ID - * @arg @ref HAL_RTC_TAMPER2_EVENT_CB_ID Tamper 2 Callback ID - * @arg @ref HAL_RTC_MSPINIT_CB_ID Msp Init callback ID - * @arg @ref HAL_RTC_MSPDEINIT_CB_ID Msp DeInit callback ID - * @note HAL_RTC_TAMPER2_EVENT_CB_ID is not applicable to all devices. + * @arg @ref HAL_RTC_TAMPER1_EVENT_CB_ID Tamper 1 Event Callback ID + * @arg @ref HAL_RTC_TAMPER2_EVENT_CB_ID Tamper 2 Event Callback ID (*) + * @arg @ref HAL_RTC_MSPINIT_CB_ID MSP Init callback ID + * @arg @ref HAL_RTC_MSPDEINIT_CB_ID MSP DeInit callback ID + * + * (*) value not applicable to all devices. * @param pCallback pointer to the Callback function * @retval HAL status */ @@ -543,11 +550,12 @@ HAL_StatusTypeDef HAL_RTC_RegisterCallback(RTC_HandleTypeDef *hrtc, HAL_RTC_Call * @arg @ref HAL_RTC_ALARM_B_EVENT_CB_ID Alarm B Event Callback ID * @arg @ref HAL_RTC_TIMESTAMP_EVENT_CB_ID Timestamp Event Callback ID * @arg @ref HAL_RTC_WAKEUPTIMER_EVENT_CB_ID Wakeup Timer Event Callback ID - * @arg @ref HAL_RTC_TAMPER1_EVENT_CB_ID Tamper 1 Callback ID - * @arg @ref HAL_RTC_TAMPER2_EVENT_CB_ID Tamper 2 Callback ID - * @arg @ref HAL_RTC_MSPINIT_CB_ID Msp Init callback ID - * @arg @ref HAL_RTC_MSPDEINIT_CB_ID Msp DeInit callback ID - * @note HAL_RTC_TAMPER2_EVENT_CB_ID is not applicable to all devices. + * @arg @ref HAL_RTC_TAMPER1_EVENT_CB_ID Tamper 1 Event Callback ID + * @arg @ref HAL_RTC_TAMPER2_EVENT_CB_ID Tamper 2 Event Callback ID (*) + * @arg @ref HAL_RTC_MSPINIT_CB_ID MSP Init callback ID + * @arg @ref HAL_RTC_MSPDEINIT_CB_ID MSP DeInit callback ID + * + * (*) value not applicable to all devices. * @retval HAL status */ HAL_StatusTypeDef HAL_RTC_UnRegisterCallback(RTC_HandleTypeDef *hrtc, HAL_RTC_CallbackIDTypeDef CallbackID) @@ -1050,7 +1058,7 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sA tmpreg = (((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Hours) << RTC_ALRMAR_HU_Pos) | \ ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Minutes) << RTC_ALRMAR_MNU_Pos) | \ ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Seconds)) | \ - ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << RTC_TR_PM_Pos) | \ + ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << RTC_ALRMAR_PM_Pos) | \ ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmDateWeekDay) << RTC_ALRMAR_DU_Pos) | \ ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \ ((uint32_t)sAlarm->AlarmMask)); @@ -1083,7 +1091,7 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sA tmpreg = (((uint32_t)(sAlarm->AlarmTime.Hours) << RTC_ALRMAR_HU_Pos) | \ ((uint32_t)(sAlarm->AlarmTime.Minutes) << RTC_ALRMAR_MNU_Pos) | \ ((uint32_t) sAlarm->AlarmTime.Seconds) | \ - ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << RTC_TR_PM_Pos) | \ + ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << RTC_ALRMAR_PM_Pos) | \ ((uint32_t)(sAlarm->AlarmDateWeekDay) << RTC_ALRMAR_DU_Pos) | \ ((uint32_t) sAlarm->AlarmDateWeekDaySel) | \ ((uint32_t) sAlarm->AlarmMask)); @@ -1096,16 +1104,15 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sA /* Disable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - /* Configure the Alarm register */ if (sAlarm->Alarm == RTC_ALARM_A) { - /* Disable the Alarm A */ + /* Disable Alarm A */ __HAL_RTC_ALARMA_DISABLE(hrtc); /* In case interrupt mode is used, the interrupt source must be disabled */ __HAL_RTC_ALARM_DISABLE_IT(hrtc, RTC_IT_ALRA); - /* Clear the Alarm flag */ + /* Clear Alarm A flag */ __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRAF); /* Get tick */ @@ -1128,21 +1135,22 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sA } } + /* Configure Alarm A register */ hrtc->Instance->ALRMAR = (uint32_t)tmpreg; - /* Configure the Alarm A Subseconds register */ + /* Configure Alarm A Subseconds register */ hrtc->Instance->ALRMASSR = subsecondtmpreg; - /* Configure the Alarm state: Enable Alarm */ + /* Enable Alarm A */ __HAL_RTC_ALARMA_ENABLE(hrtc); } else { - /* Disable the Alarm B */ + /* Disable Alarm B */ __HAL_RTC_ALARMB_DISABLE(hrtc); /* In case interrupt mode is used, the interrupt source must be disabled */ __HAL_RTC_ALARM_DISABLE_IT(hrtc, RTC_IT_ALRB); - /* Clear the Alarm flag */ + /* Clear Alarm B flag */ __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRBF); /* Get tick */ @@ -1165,10 +1173,11 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sA } } + /* Configure Alarm B register */ hrtc->Instance->ALRMBR = (uint32_t)tmpreg; - /* Configure the Alarm B Subseconds register */ + /* Configure Alarm B Subseconds register */ hrtc->Instance->ALRMBSSR = subsecondtmpreg; - /* Configure the Alarm state: Enable Alarm */ + /* Enable Alarm B */ __HAL_RTC_ALARMB_ENABLE(hrtc); } @@ -1247,7 +1256,7 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef tmpreg = (((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Hours) << RTC_ALRMAR_HU_Pos) | \ ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Minutes) << RTC_ALRMAR_MNU_Pos) | \ ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Seconds)) | \ - ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << RTC_TR_PM_Pos) | \ + ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << RTC_ALRMAR_PM_Pos) | \ ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmDateWeekDay) << RTC_ALRMAR_DU_Pos) | \ ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \ ((uint32_t)sAlarm->AlarmMask)); @@ -1280,7 +1289,7 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef tmpreg = (((uint32_t)(sAlarm->AlarmTime.Hours) << RTC_ALRMAR_HU_Pos) | \ ((uint32_t)(sAlarm->AlarmTime.Minutes) << RTC_ALRMAR_MNU_Pos) | \ ((uint32_t) sAlarm->AlarmTime.Seconds) | \ - ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << RTC_TR_PM_Pos) | \ + ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << RTC_ALRMAR_PM_Pos) | \ ((uint32_t)(sAlarm->AlarmDateWeekDay) << RTC_ALRMAR_DU_Pos) | \ ((uint32_t) sAlarm->AlarmDateWeekDaySel) | \ ((uint32_t) sAlarm->AlarmMask)); @@ -1293,13 +1302,12 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef /* Disable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - /* Configure the Alarm register */ if (sAlarm->Alarm == RTC_ALARM_A) { - /* Disable the Alarm A */ + /* Disable Alarm A */ __HAL_RTC_ALARMA_DISABLE(hrtc); - /* Clear the Alarm flag */ + /* Clear Alarm A flag */ __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRAF); /* Wait till RTC ALRAWF flag is set and if timeout is reached exit */ @@ -1320,20 +1328,21 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef } } while (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAWF) == 0U); + /* Configure Alarm A register */ hrtc->Instance->ALRMAR = (uint32_t)tmpreg; - /* Configure the Alarm A Subseconds register */ + /* Configure Alarm A Subseconds register */ hrtc->Instance->ALRMASSR = subsecondtmpreg; - /* Configure the Alarm state: Enable Alarm */ + /* Enable Alarm A */ __HAL_RTC_ALARMA_ENABLE(hrtc); - /* Configure the Alarm interrupt */ + /* Enable Alarm A interrupt */ __HAL_RTC_ALARM_ENABLE_IT(hrtc, RTC_IT_ALRA); } else { - /* Disable the Alarm B */ + /* Disable Alarm B */ __HAL_RTC_ALARMB_DISABLE(hrtc); - /* Clear the Alarm flag */ + /* Clear Alarm B flag */ __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRBF); /* Reload the counter */ @@ -1357,16 +1366,17 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef } } while (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBWF) == 0U); + /* Configure Alarm B register */ hrtc->Instance->ALRMBR = (uint32_t)tmpreg; - /* Configure the Alarm B Subseconds register */ + /* Configure Alarm B Subseconds register */ hrtc->Instance->ALRMBSSR = subsecondtmpreg; - /* Configure the Alarm state: Enable Alarm */ + /* Enable Alarm B */ __HAL_RTC_ALARMB_ENABLE(hrtc); - /* Configure the Alarm interrupt */ + /* Enable Alarm B interrupt */ __HAL_RTC_ALARM_ENABLE_IT(hrtc, RTC_IT_ALRB); } - /* RTC Alarm Interrupt Configuration: EXTI configuration */ + /* Enable and configure the EXTI line associated to the RTC Alarm interrupt */ __HAL_RTC_ALARM_EXTI_ENABLE_IT(); __HAL_RTC_ALARM_EXTI_ENABLE_RISING_EDGE(); @@ -1418,7 +1428,7 @@ HAL_StatusTypeDef HAL_RTC_DeactivateAlarm(RTC_HandleTypeDef *hrtc, uint32_t Alar /* Get tick */ tickstart = HAL_GetTick(); - /* Wait till RTC ALRxWF flag is set and if timeout is reached exit */ + /* Wait till RTC ALRAWF flag is set and if timeout is reached exit */ while (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAWF) == 0U) { if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE) @@ -1446,7 +1456,7 @@ HAL_StatusTypeDef HAL_RTC_DeactivateAlarm(RTC_HandleTypeDef *hrtc, uint32_t Alar /* Get tick */ tickstart = HAL_GetTick(); - /* Wait till RTC ALRxWF flag is set and if timeout is reached exit */ + /* Wait till RTC ALRBWF flag is set and if timeout is reached exit */ while (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBWF) == 0U) { if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE) @@ -1543,7 +1553,7 @@ HAL_StatusTypeDef HAL_RTC_GetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sA */ void HAL_RTC_AlarmIRQHandler(RTC_HandleTypeDef *hrtc) { - /* Clear the EXTI's line Flag for RTC Alarm */ + /* Clear the EXTI flag associated to the RTC Alarm interrupt */ __HAL_RTC_ALARM_EXTI_CLEAR_FLAG(); /* Get the Alarm A interrupt source enable status */ diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rtc_ex.c b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rtc_ex.c index f6aec5ea18..2a032ab52a 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rtc_ex.c +++ b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rtc_ex.c @@ -59,7 +59,7 @@ *** Tamper configuration *** ============================ [..] - (+) To Enable the RTC Tamper and configure the Tamper filter count, trigger + (+) To enable the RTC Tamper and configure the Tamper filter count, trigger Edge or Level according to the Tamper filter value (if equal to 0 Edge else Level), sampling frequency, precharge or discharge and Pull-UP use the HAL_RTCEx_SetTamper() function. @@ -99,8 +99,8 @@ 0 to 62. (+) In order to measure the clock deviation, a 512 Hz clock is output for calibration. - (+) The RTC Coarse Digital Calibration value and sign can be calibrated using - the HAL_RTCEx_SetCoarseCalib() function. + (+) To configure the RTC Coarse Digital Calibration value and sign use the + HAL_RTCEx_SetCoarseCalib() function. *** Smooth Digital Calibration configuration *** ================================================ @@ -114,9 +114,9 @@ This cycle is maintained by a 20-bit counter clocked by RTCCLK. (+) The smooth calibration register (RTC_CALR) specifies the number of RTCCLK clock cycles to be masked during the 32-second cycle. - (+) The RTC Smooth Digital Calibration value and the corresponding calibration - cycle period (32s, 16s, or 8s) can be calibrated using the - HAL_RTCEx_SetSmoothCalib() function. + (+) To configure the RTC Smooth Digital Calibration value and the corresponding + calibration cycle period (32s,16s and 8s) use the HAL_RTCEx_SetSmoothCalib() + function. @endverbatim ****************************************************************************** @@ -299,7 +299,7 @@ HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp_IT(RTC_HandleTypeDef *hrtc, uint32_t RT /* Enable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - /* RTC Timestamp Interrupt Configuration: EXTI configuration */ + /* Enable and configure the EXTI line associated to the RTC Timestamp and Tamper interrupts */ __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT(); __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_EDGE(); @@ -330,7 +330,7 @@ HAL_StatusTypeDef HAL_RTCEx_DeactivateTimeStamp(RTC_HandleTypeDef *hrtc) /* Disable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - /* In case of interrupt mode is used, the interrupt source must disabled */ + /* In case interrupt mode is used, the interrupt source must disabled */ __HAL_RTC_TIMESTAMP_DISABLE_IT(hrtc, RTC_IT_TS); /* Get the RTC_CR register and clear the bits to be configured */ @@ -553,7 +553,7 @@ HAL_StatusTypeDef HAL_RTCEx_SetTamper_IT(RTC_HandleTypeDef *hrtc, RTC_TamperType /* Copy desired configuration into configuration register */ hrtc->Instance->TAFCR = tmpreg; - /* RTC Tamper Interrupt Configuration: EXTI configuration */ + /* Enable and configure the EXTI line associated to the RTC Timestamp and Tamper interrupts */ __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT(); __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_EDGE(); @@ -573,8 +573,9 @@ HAL_StatusTypeDef HAL_RTCEx_SetTamper_IT(RTC_HandleTypeDef *hrtc, RTC_TamperType * @param Tamper Selected tamper pin. * This parameter can be any combination of the following values: * @arg RTC_TAMPER_1: Tamper 1 - * @arg RTC_TAMPER_2: Tamper 2 - * @note RTC_TAMPER_2 is not applicable to all devices. + * @arg RTC_TAMPER_2: Tamper 2 (*) + * + * (*) value not applicable to all devices. * @retval HAL status */ HAL_StatusTypeDef HAL_RTCEx_DeactivateTamper(RTC_HandleTypeDef *hrtc, uint32_t Tamper) @@ -605,7 +606,7 @@ HAL_StatusTypeDef HAL_RTCEx_DeactivateTamper(RTC_HandleTypeDef *hrtc, uint32_t T */ void HAL_RTCEx_TamperTimeStampIRQHandler(RTC_HandleTypeDef *hrtc) { - /* Clear the EXTI's Flag for RTC Timestamp and Tamper */ + /* Clear the EXTI flag associated to the RTC Timestamp and Tamper interrupts */ __HAL_RTC_TAMPER_TIMESTAMP_EXTI_CLEAR_FLAG(); /* Get the Timestamp interrupt source enable status */ @@ -1032,7 +1033,7 @@ HAL_StatusTypeDef HAL_RTCEx_SetWakeUpTimer_IT(RTC_HandleTypeDef *hrtc, uint32_t /* Configure the Wakeup Timer counter */ hrtc->Instance->WUTR = (uint32_t)WakeUpCounter; - /* RTC wakeup timer Interrupt Configuration: EXTI configuration */ + /* Enable and configure the EXTI line associated to the RTC Wakeup Timer interrupt */ __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_IT(); __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE(); @@ -1074,7 +1075,7 @@ HAL_StatusTypeDef HAL_RTCEx_DeactivateWakeUpTimer(RTC_HandleTypeDef *hrtc) /* Disable the Wakeup Timer */ __HAL_RTC_WAKEUPTIMER_DISABLE(hrtc); - /* In case of interrupt mode is used, the interrupt source must disabled */ + /* In case interrupt mode is used, the interrupt source must disabled */ __HAL_RTC_WAKEUPTIMER_DISABLE_IT(hrtc, RTC_IT_WUT); /* Get tick */ @@ -1133,7 +1134,7 @@ uint32_t HAL_RTCEx_GetWakeUpTimer(RTC_HandleTypeDef *hrtc) */ void HAL_RTCEx_WakeUpTimerIRQHandler(RTC_HandleTypeDef *hrtc) { - /* Clear the EXTI's line Flag for RTC WakeUpTimer */ + /* Clear the EXTI flag associated to the RTC Wakeup Timer interrupt */ __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG(); /* Get the pending status of the Wakeup timer Interrupt */ @@ -1252,7 +1253,7 @@ void HAL_RTCEx_BKUPWrite(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister, uint3 /* Check the parameters */ assert_param(IS_RTC_BKP(BackupRegister)); - tmp = (uint32_t) & (hrtc->Instance->BKP0R); + tmp = (uint32_t) &(hrtc->Instance->BKP0R); tmp += (BackupRegister * 4U); /* Write the specified register */ @@ -1275,7 +1276,7 @@ uint32_t HAL_RTCEx_BKUPRead(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister) /* Check the parameters */ assert_param(IS_RTC_BKP(BackupRegister)); - tmp = (uint32_t) & (hrtc->Instance->BKP0R); + tmp = (uint32_t) &(hrtc->Instance->BKP0R); tmp += (BackupRegister * 4U); /* Read the specified register */ @@ -1745,7 +1746,7 @@ HAL_StatusTypeDef HAL_RTCEx_EnableBypassShadow(RTC_HandleTypeDef *hrtc) __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); /* Set the BYPSHAD bit */ - hrtc->Instance->CR |= (uint8_t)RTC_CR_BYPSHAD; + hrtc->Instance->CR |= (uint32_t)RTC_CR_BYPSHAD; /* Enable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); @@ -1778,7 +1779,7 @@ HAL_StatusTypeDef HAL_RTCEx_DisableBypassShadow(RTC_HandleTypeDef *hrtc) __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); /* Reset the BYPSHAD bit */ - hrtc->Instance->CR &= (uint8_t)~RTC_CR_BYPSHAD; + hrtc->Instance->CR &= (uint32_t)~RTC_CR_BYPSHAD; /* Enable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sai.c b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sai.c index e881d252ac..84120c2d17 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sai.c +++ b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sai.c @@ -1663,7 +1663,18 @@ void HAL_SAI_IRQHandler(SAI_HandleTypeDef *hsai) hsai->hdmatx->XferAbortCallback = SAI_DMAAbort; /* Abort DMA in IT mode */ - HAL_DMA_Abort_IT(hsai->hdmatx); + if (HAL_DMA_Abort_IT(hsai->hdmatx) != HAL_OK) + { + /* Update SAI error code */ + hsai->ErrorCode |= HAL_SAI_ERROR_DMA; + + /* Call SAI error callback */ +#if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) + hsai->ErrorCallback(hsai); +#else + HAL_SAI_ErrorCallback(hsai); +#endif /* USE_HAL_SAI_REGISTER_CALLBACKS */ + } } else if (hsai->hdmarx != NULL) { @@ -1671,7 +1682,18 @@ void HAL_SAI_IRQHandler(SAI_HandleTypeDef *hsai) hsai->hdmarx->XferAbortCallback = SAI_DMAAbort; /* Abort DMA in IT mode */ - HAL_DMA_Abort_IT(hsai->hdmarx); + if (HAL_DMA_Abort_IT(hsai->hdmarx) != HAL_OK) + { + /* Update SAI error code */ + hsai->ErrorCode |= HAL_SAI_ERROR_DMA; + + /* Call SAI error callback */ +#if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) + hsai->ErrorCallback(hsai); +#else + HAL_SAI_ErrorCallback(hsai); +#endif /* USE_HAL_SAI_REGISTER_CALLBACKS */ + } } } else @@ -1706,7 +1728,18 @@ void HAL_SAI_IRQHandler(SAI_HandleTypeDef *hsai) hsai->hdmatx->XferAbortCallback = SAI_DMAAbort; /* Abort DMA in IT mode */ - HAL_DMA_Abort_IT(hsai->hdmatx); + if (HAL_DMA_Abort_IT(hsai->hdmatx) != HAL_OK) + { + /* Update SAI error code */ + hsai->ErrorCode |= HAL_SAI_ERROR_DMA; + + /* Call SAI error callback */ +#if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) + hsai->ErrorCallback(hsai); +#else + HAL_SAI_ErrorCallback(hsai); +#endif /* USE_HAL_SAI_REGISTER_CALLBACKS */ + } } else if (hsai->hdmarx != NULL) { @@ -1714,7 +1747,18 @@ void HAL_SAI_IRQHandler(SAI_HandleTypeDef *hsai) hsai->hdmarx->XferAbortCallback = SAI_DMAAbort; /* Abort DMA in IT mode */ - HAL_DMA_Abort_IT(hsai->hdmarx); + if (HAL_DMA_Abort_IT(hsai->hdmarx) != HAL_OK) + { + /* Update SAI error code */ + hsai->ErrorCode |= HAL_SAI_ERROR_DMA; + + /* Call SAI error callback */ +#if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) + hsai->ErrorCallback(hsai); +#else + HAL_SAI_ErrorCallback(hsai); +#endif /* USE_HAL_SAI_REGISTER_CALLBACKS */ + } } } else @@ -1749,7 +1793,18 @@ void HAL_SAI_IRQHandler(SAI_HandleTypeDef *hsai) hsai->hdmatx->XferAbortCallback = SAI_DMAAbort; /* Abort DMA in IT mode */ - HAL_DMA_Abort_IT(hsai->hdmatx); + if (HAL_DMA_Abort_IT(hsai->hdmatx) != HAL_OK) + { + /* Update SAI error code */ + hsai->ErrorCode |= HAL_SAI_ERROR_DMA; + + /* Call SAI error callback */ +#if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) + hsai->ErrorCallback(hsai); +#else + HAL_SAI_ErrorCallback(hsai); +#endif /* USE_HAL_SAI_REGISTER_CALLBACKS */ + } } else if (hsai->hdmarx != NULL) { @@ -1757,7 +1812,18 @@ void HAL_SAI_IRQHandler(SAI_HandleTypeDef *hsai) hsai->hdmarx->XferAbortCallback = SAI_DMAAbort; /* Abort DMA in IT mode */ - HAL_DMA_Abort_IT(hsai->hdmarx); + if (HAL_DMA_Abort_IT(hsai->hdmarx) != HAL_OK) + { + /* Update SAI error code */ + hsai->ErrorCode |= HAL_SAI_ERROR_DMA; + + /* Call SAI error callback */ +#if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) + hsai->ErrorCallback(hsai); +#else + HAL_SAI_ErrorCallback(hsai); +#endif /* USE_HAL_SAI_REGISTER_CALLBACKS */ + } } } else diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sd.c b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sd.c index ebafec7025..0838c9cca0 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sd.c +++ b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sd.c @@ -403,7 +403,6 @@ HAL_StatusTypeDef HAL_SD_Init(SD_HandleTypeDef *hsd) HAL_StatusTypeDef HAL_SD_InitCard(SD_HandleTypeDef *hsd) { uint32_t errorstate; - HAL_StatusTypeDef status; SD_InitTypeDef Init; /* Default SDIO peripheral configuration for SD card initialization */ @@ -415,11 +414,7 @@ HAL_StatusTypeDef HAL_SD_InitCard(SD_HandleTypeDef *hsd) Init.ClockDiv = SDIO_INIT_CLK_DIV; /* Initialize SDIO peripheral interface with default configuration */ - status = SDIO_Init(hsd->Instance, Init); - if(status != HAL_OK) - { - return HAL_ERROR; - } + SDIO_Init(hsd->Instance, Init); /* Disable SDIO Clock */ __HAL_SD_DISABLE(hsd); diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c index eb31bdeef8..da5226fa6e 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c +++ b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c @@ -1212,7 +1212,7 @@ uint32_t HAL_SDRAM_GetModeStatus(SDRAM_HandleTypeDef *hsdram) * the configuration information for SDRAM module. * @retval HAL state */ -HAL_SDRAM_StateTypeDef HAL_SDRAM_GetState(SDRAM_HandleTypeDef *hsdram) +HAL_SDRAM_StateTypeDef HAL_SDRAM_GetState(const SDRAM_HandleTypeDef *hsdram) { return hsdram->State; } @@ -1235,6 +1235,7 @@ HAL_SDRAM_StateTypeDef HAL_SDRAM_GetState(SDRAM_HandleTypeDef *hsdram) */ static void SDRAM_DMACplt(DMA_HandleTypeDef *hdma) { + /* Derogation MISRAC2012-Rule-11.5 */ SDRAM_HandleTypeDef *hsdram = (SDRAM_HandleTypeDef *)(hdma->Parent); /* Disable the DMA channel */ @@ -1257,6 +1258,7 @@ static void SDRAM_DMACplt(DMA_HandleTypeDef *hdma) */ static void SDRAM_DMACpltProt(DMA_HandleTypeDef *hdma) { + /* Derogation MISRAC2012-Rule-11.5 */ SDRAM_HandleTypeDef *hsdram = (SDRAM_HandleTypeDef *)(hdma->Parent); /* Disable the DMA channel */ @@ -1279,6 +1281,7 @@ static void SDRAM_DMACpltProt(DMA_HandleTypeDef *hdma) */ static void SDRAM_DMAError(DMA_HandleTypeDef *hdma) { + /* Derogation MISRAC2012-Rule-11.5 */ SDRAM_HandleTypeDef *hsdram = (SDRAM_HandleTypeDef *)(hdma->Parent); /* Disable the DMA channel */ diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_smartcard.c b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_smartcard.c index 2295e7ecfd..9a87cf44b7 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_smartcard.c +++ b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_smartcard.c @@ -997,19 +997,33 @@ HAL_StatusTypeDef HAL_SMARTCARD_Transmit_DMA(SMARTCARD_HandleTypeDef *hsc, const /* Enable the SMARTCARD transmit DMA stream */ tmp = (const uint32_t*)&pData; - HAL_DMA_Start_IT(hsc->hdmatx, *(const uint32_t*)tmp, (uint32_t)&hsc->Instance->DR, Size); + if (HAL_DMA_Start_IT(hsc->hdmatx, *(const uint32_t*)tmp, (uint32_t)&hsc->Instance->DR, Size) == HAL_OK) + { + /* Clear the TC flag in the SR register by writing 0 to it */ + __HAL_SMARTCARD_CLEAR_FLAG(hsc, SMARTCARD_FLAG_TC); - /* Clear the TC flag in the SR register by writing 0 to it */ - __HAL_SMARTCARD_CLEAR_FLAG(hsc, SMARTCARD_FLAG_TC); + /* Process Unlocked */ + __HAL_UNLOCK(hsc); - /* Process Unlocked */ - __HAL_UNLOCK(hsc); + /* Enable the DMA transfer for transmit request by setting the DMAT bit + in the SMARTCARD CR3 register */ + SET_BIT(hsc->Instance->CR3, USART_CR3_DMAT); - /* Enable the DMA transfer for transmit request by setting the DMAT bit - in the SMARTCARD CR3 register */ - SET_BIT(hsc->Instance->CR3, USART_CR3_DMAT); + return HAL_OK; + } + else + { + /* Set error code to DMA */ + hsc->ErrorCode = HAL_SMARTCARD_ERROR_DMA; - return HAL_OK; + /* Process Unlocked */ + __HAL_UNLOCK(hsc); + + /* Restore hsc->State to ready */ + hsc->gState = HAL_SMARTCARD_STATE_READY; + + return HAL_ERROR; + } } else { @@ -1058,25 +1072,39 @@ HAL_StatusTypeDef HAL_SMARTCARD_Receive_DMA(SMARTCARD_HandleTypeDef *hsc, uint8_ /* Enable the DMA stream */ tmp = (uint32_t*)&pData; - HAL_DMA_Start_IT(hsc->hdmarx, (uint32_t)&hsc->Instance->DR, *(uint32_t*)tmp, Size); + if (HAL_DMA_Start_IT(hsc->hdmarx, (uint32_t)&hsc->Instance->DR, *(uint32_t*)tmp, Size) == HAL_OK) + { + /* Clear the Overrun flag just before enabling the DMA Rx request: can be mandatory for the second transfer */ + __HAL_SMARTCARD_CLEAR_OREFLAG(hsc); - /* Clear the Overrun flag just before enabling the DMA Rx request: can be mandatory for the second transfer */ - __HAL_SMARTCARD_CLEAR_OREFLAG(hsc); + /* Process Unlocked */ + __HAL_UNLOCK(hsc); - /* Process Unlocked */ - __HAL_UNLOCK(hsc); + /* Enable the SMARTCARD Parity Error Interrupt */ + SET_BIT(hsc->Instance->CR1, USART_CR1_PEIE); - /* Enable the SMARTCARD Parity Error Interrupt */ - SET_BIT(hsc->Instance->CR1, USART_CR1_PEIE); + /* Enable the SMARTCARD Error Interrupt: (Frame error, noise error, overrun error) */ + SET_BIT(hsc->Instance->CR3, USART_CR3_EIE); - /* Enable the SMARTCARD Error Interrupt: (Frame error, noise error, overrun error) */ - SET_BIT(hsc->Instance->CR3, USART_CR3_EIE); + /* Enable the DMA transfer for the receiver request by setting the DMAR bit + in the SMARTCARD CR3 register */ + SET_BIT(hsc->Instance->CR3, USART_CR3_DMAR); - /* Enable the DMA transfer for the receiver request by setting the DMAR bit - in the SMARTCARD CR3 register */ - SET_BIT(hsc->Instance->CR3, USART_CR3_DMAR); + return HAL_OK; + } + else + { + /* Set error code to DMA */ + hsc->ErrorCode = HAL_SMARTCARD_ERROR_DMA; - return HAL_OK; + /* Process Unlocked */ + __HAL_UNLOCK(hsc); + + /* Restore hsc->State to ready */ + hsc->RxState = HAL_SMARTCARD_STATE_READY; + + return HAL_ERROR; + } } else { diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c index 5e4000a937..92757d857f 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c +++ b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c @@ -44,7 +44,8 @@ (+++) Configure the DMA handle parameters (+++) Configure the DMA Tx or Rx Stream/Channel (+++) Associate the initialized hdma_tx(or _rx) handle to the hspi DMA Tx or Rx handle - (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx or Rx Stream/Channel + (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx + or Rx Stream/Channel (#) Program the Mode, BidirectionalMode , Data size, Baudrate Prescaler, NSS management, Clock polarity and phase, FirstBit and CRC configuration in the hspi Init structure. @@ -190,7 +191,8 @@ @note The max SPI frequency depend on SPI data size (8bits, 16bits), SPI mode(2 Lines fullduplex, 2 lines RxOnly, 1 line TX/RX) and Process mode (Polling, IT, DMA). @note - (#) TX/RX processes are HAL_SPI_TransmitReceive(), HAL_SPI_TransmitReceive_IT() and HAL_SPI_TransmitReceive_DMA() + (#) TX/RX processes are HAL_SPI_TransmitReceive(), HAL_SPI_TransmitReceive_IT() and + HAL_SPI_TransmitReceive_DMA() (#) RX processes are HAL_SPI_Receive(), HAL_SPI_Receive_IT() and HAL_SPI_Receive_DMA() (#) TX processes are HAL_SPI_Transmit(), HAL_SPI_Transmit_IT() and HAL_SPI_Transmit_DMA() @@ -215,7 +217,7 @@ * @{ */ #define SPI_DEFAULT_TIMEOUT 100U -#define SPI_BSY_FLAG_WORKAROUND_TIMEOUT 1000U /*!< Timeout 1000 µs */ +#define SPI_BSY_FLAG_WORKAROUND_TIMEOUT 1000U /*!< Timeout 1000 us */ /** * @} */ @@ -761,9 +763,9 @@ HAL_StatusTypeDef HAL_SPI_UnRegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_Ca * @brief Transmit an amount of data in blocking mode. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. - * @param pData pointer to data buffer - * @param Size amount of data to be sent - * @param Timeout Timeout duration + * @param pData pointer to data buffer (u8 or u16 data elements) + * @param Size amount of data elements (u8 or u16) to be sent + * @param Timeout Timeout duration in ms * @retval HAL status */ HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, const uint8_t *pData, uint16_t Size, uint32_t Timeout) @@ -927,10 +929,13 @@ HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, const uint8_t *pData * @brief Receive an amount of data in blocking mode. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. - * @param pData pointer to data buffer - * @param Size amount of data to be received - * @param Timeout Timeout duration + * @param pData pointer to data buffer (u8 or u16 data elements) + * @param Size amount of data elements (u8 or u16) to be received + * @param Timeout Timeout duration in ms * @retval HAL status + * @note In master mode, if the direction is set to SPI_DIRECTION_2LINES + * the receive buffer is written to data register (DR) to generate + * clock pulses and receive data */ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout) { @@ -944,6 +949,11 @@ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint1 return HAL_BUSY; } + if ((pData == NULL) || (Size == 0U)) + { + return HAL_ERROR; + } + if ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES)) { hspi->State = HAL_SPI_STATE_BUSY_RX; @@ -954,11 +964,6 @@ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint1 /* Init tickstart for timeout management*/ tickstart = HAL_GetTick(); - if ((pData == NULL) || (Size == 0U)) - { - return HAL_ERROR; - } - /* Process Locked */ __HAL_LOCK(hspi); @@ -1126,10 +1131,10 @@ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint1 * @brief Transmit and Receive an amount of data in blocking mode. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. - * @param pTxData pointer to transmission data buffer - * @param pRxData pointer to reception data buffer - * @param Size amount of data to be sent and received - * @param Timeout Timeout duration + * @param pTxData pointer to transmission data buffer (u8 or u16 data elements) + * @param pRxData pointer to reception data buffer (u8 or u16 data elements) + * @param Size amount of data elements (u8 or u16) to be sent and received + * @param Timeout Timeout duration in ms * @retval HAL status */ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, const uint8_t *pTxData, uint8_t *pRxData, @@ -1158,7 +1163,8 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, const uint8_t initial_TxXferCount = Size; if (!((tmp_state == HAL_SPI_STATE_READY) || \ - ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_state == HAL_SPI_STATE_BUSY_RX)))) + ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && + (tmp_state == HAL_SPI_STATE_BUSY_RX)))) { return HAL_BUSY; } @@ -1378,8 +1384,8 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, const uint8_t * @brief Transmit an amount of data in non-blocking mode with Interrupt. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. - * @param pData pointer to data buffer - * @param Size amount of data to be sent + * @param pData pointer to data buffer (u8 or u16 data elements) + * @param Size amount of data elements (u8 or u16) to be sent * @retval HAL status */ HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, const uint8_t *pData, uint16_t Size) @@ -1460,8 +1466,8 @@ HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, const uint8_t *pD * @brief Receive an amount of data in non-blocking mode with Interrupt. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. - * @param pData pointer to data buffer - * @param Size amount of data to be sent + * @param pData pointer to data buffer (u8 or u16 data elements) + * @param Size amount of data elements (u8 or u16) to be received * @retval HAL status */ HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size) @@ -1472,6 +1478,11 @@ HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, ui return HAL_BUSY; } + if ((pData == NULL) || (Size == 0U)) + { + return HAL_ERROR; + } + if ((hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->Init.Mode == SPI_MODE_MASTER)) { hspi->State = HAL_SPI_STATE_BUSY_RX; @@ -1480,11 +1491,6 @@ HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, ui } - if ((pData == NULL) || (Size == 0U)) - { - return HAL_ERROR; - } - /* Process Locked */ __HAL_LOCK(hspi); @@ -1550,9 +1556,9 @@ HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, ui * @brief Transmit and Receive an amount of data in non-blocking mode with Interrupt. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. - * @param pTxData pointer to transmission data buffer - * @param pRxData pointer to reception data buffer - * @param Size amount of data to be sent and received + * @param pTxData pointer to transmission data buffer (u8 or u16 data elements) + * @param pRxData pointer to reception data buffer (u8 or u16 data elements) + * @param Size amount of data elements (u8 or u16) to be sent and received * @retval HAL status */ HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, const uint8_t *pTxData, uint8_t *pRxData, @@ -1569,7 +1575,8 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, const uint tmp_mode = hspi->Init.Mode; if (!((tmp_state == HAL_SPI_STATE_READY) || \ - ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_state == HAL_SPI_STATE_BUSY_RX)))) + ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && + (tmp_state == HAL_SPI_STATE_BUSY_RX)))) { return HAL_BUSY; } @@ -1637,8 +1644,8 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, const uint * @brief Transmit an amount of data in non-blocking mode with DMA. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. - * @param pData pointer to data buffer - * @param Size amount of data to be sent + * @param pData pointer to data buffer (u8 or u16 data elements) + * @param Size amount of data elements (u8 or u16) to be sent * @retval HAL status */ HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, const uint8_t *pData, uint16_t Size) @@ -1740,9 +1747,9 @@ HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, const uint8_t *p * @note In case of MASTER mode and SPI_DIRECTION_2LINES direction, hdmatx shall be defined. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. - * @param pData pointer to data buffer + * @param pData pointer to data buffer (u8 or u16 data elements) * @note When the CRC feature is enabled the pData Length must be Size + 1. - * @param Size amount of data to be sent + * @param Size amount of data elements (u8 or u16) to be received * @retval HAL status */ HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size) @@ -1755,6 +1762,11 @@ HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, u return HAL_BUSY; } + if ((pData == NULL) || (Size == 0U)) + { + return HAL_ERROR; + } + if ((hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->Init.Mode == SPI_MODE_MASTER)) { hspi->State = HAL_SPI_STATE_BUSY_RX; @@ -1766,11 +1778,6 @@ HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, u return HAL_SPI_TransmitReceive_DMA(hspi, pData, pData, Size); } - if ((pData == NULL) || (Size == 0U)) - { - return HAL_ERROR; - } - /* Process Locked */ __HAL_LOCK(hspi); @@ -1849,10 +1856,10 @@ HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, u * @brief Transmit and Receive an amount of data in non-blocking mode with DMA. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. - * @param pTxData pointer to transmission data buffer - * @param pRxData pointer to reception data buffer + * @param pTxData pointer to transmission data buffer (u8 or u16 data elements) + * @param pRxData pointer to reception data buffer (u8 or u16 data elements) * @note When the CRC feature is enabled the pRxData Length must be Size + 1 - * @param Size amount of data to be sent + * @param Size amount of data elements (u8 or u16) to be sent and received * @retval HAL status */ HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, const uint8_t *pTxData, uint8_t *pRxData, @@ -1873,7 +1880,8 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, const uin tmp_mode = hspi->Init.Mode; if (!((tmp_state == HAL_SPI_STATE_READY) || - ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_state == HAL_SPI_STATE_BUSY_RX)))) + ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && + (tmp_state == HAL_SPI_STATE_BUSY_RX)))) { return HAL_BUSY; } @@ -2347,9 +2355,11 @@ HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi) { HAL_StatusTypeDef errorcode = HAL_OK; /* The Lock is not implemented on this API to allow the user application - to call the HAL SPI API under callbacks HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback(): + to call the HAL SPI API under callbacks HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or + HAL_SPI_TxRxCpltCallback(): when calling HAL_DMA_Abort() API the DMA TX/RX Transfer complete interrupt is generated - and the correspond call back is executed HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback() + and the correspond call back is executed HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or + HAL_SPI_TxRxCpltCallback() */ /* Abort the SPI DMA tx Stream/Channel */ @@ -2678,7 +2688,7 @@ uint32_t HAL_SPI_GetError(const SPI_HandleTypeDef *hspi) */ static void SPI_DMATransmitCplt(DMA_HandleTypeDef *hdma) { - SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */ + SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); uint32_t tickstart; /* Init tickstart for timeout management*/ @@ -2735,7 +2745,7 @@ static void SPI_DMATransmitCplt(DMA_HandleTypeDef *hdma) */ static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma) { - SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */ + SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); uint32_t tickstart; #if (USE_SPI_CRC != 0U) __IO uint32_t tmpreg = 0U; @@ -2824,7 +2834,7 @@ static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma) */ static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma) { - SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */ + SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); uint32_t tickstart; #if (USE_SPI_CRC != 0U) __IO uint32_t tmpreg = 0U; @@ -2904,7 +2914,7 @@ static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma) */ static void SPI_DMAHalfTransmitCplt(DMA_HandleTypeDef *hdma) { - SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */ + SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Call user Tx half complete callback */ #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) @@ -2922,7 +2932,7 @@ static void SPI_DMAHalfTransmitCplt(DMA_HandleTypeDef *hdma) */ static void SPI_DMAHalfReceiveCplt(DMA_HandleTypeDef *hdma) { - SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */ + SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Call user Rx half complete callback */ #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) @@ -2940,7 +2950,7 @@ static void SPI_DMAHalfReceiveCplt(DMA_HandleTypeDef *hdma) */ static void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef *hdma) { - SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */ + SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Call user TxRx half complete callback */ #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) @@ -2958,7 +2968,7 @@ static void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef *hdma) */ static void SPI_DMAError(DMA_HandleTypeDef *hdma) { - SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */ + SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Stop the disable DMA transfer on SPI side */ CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN); @@ -2981,7 +2991,7 @@ static void SPI_DMAError(DMA_HandleTypeDef *hdma) */ static void SPI_DMAAbortOnError(DMA_HandleTypeDef *hdma) { - SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */ + SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); hspi->RxXferCount = 0U; hspi->TxXferCount = 0U; @@ -3003,7 +3013,7 @@ static void SPI_DMAAbortOnError(DMA_HandleTypeDef *hdma) */ static void SPI_DMATxAbortCallback(DMA_HandleTypeDef *hdma) { - SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */ + SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); __IO uint32_t count; hspi->hdmatx->XferAbortCallback = NULL; @@ -3068,7 +3078,7 @@ static void SPI_DMATxAbortCallback(DMA_HandleTypeDef *hdma) */ static void SPI_DMARxAbortCallback(DMA_HandleTypeDef *hdma) { - SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */ + SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Disable SPI Peripheral */ __HAL_SPI_DISABLE(hspi); @@ -3536,7 +3546,10 @@ static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi, { tmp_timeout = 0U; } - count--; + else + { + count--; + } } } @@ -3603,15 +3616,17 @@ static HAL_StatusTypeDef SPI_EndRxTransaction(SPI_HandleTypeDef *hspi, uint32_t */ static HAL_StatusTypeDef SPI_EndRxTxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart) { + __IO uint32_t count; + /* Wait until TXE flag */ - if(SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_TXE, SET, Timeout, Tickstart) != HAL_OK) + if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_TXE, SET, Timeout, Tickstart) != HAL_OK) { SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); return HAL_TIMEOUT; } - /* Timeout in µs */ - __IO uint32_t count = SPI_BSY_FLAG_WORKAROUND_TIMEOUT * (SystemCoreClock / 24U / 1000000U); + /* Timeout in us */ + count = SPI_BSY_FLAG_WORKAROUND_TIMEOUT * (SystemCoreClock / 24U / 1000000U); /* Erratasheet: BSY bit may stay high at the end of a data transfer in Slave mode */ if (hspi->Init.Mode == SPI_MODE_MASTER) { diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sram.c b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sram.c index 178843732e..96b06f1940 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sram.c +++ b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sram.c @@ -1038,6 +1038,7 @@ HAL_SRAM_StateTypeDef HAL_SRAM_GetState(const SRAM_HandleTypeDef *hsram) */ static void SRAM_DMACplt(DMA_HandleTypeDef *hdma) { + /* Derogation MISRAC2012-Rule-11.5 */ SRAM_HandleTypeDef *hsram = (SRAM_HandleTypeDef *)(hdma->Parent); /* Disable the DMA channel */ @@ -1060,6 +1061,7 @@ static void SRAM_DMACplt(DMA_HandleTypeDef *hdma) */ static void SRAM_DMACpltProt(DMA_HandleTypeDef *hdma) { + /* Derogation MISRAC2012-Rule-11.5 */ SRAM_HandleTypeDef *hsram = (SRAM_HandleTypeDef *)(hdma->Parent); /* Disable the DMA channel */ @@ -1082,6 +1084,7 @@ static void SRAM_DMACpltProt(DMA_HandleTypeDef *hdma) */ static void SRAM_DMAError(DMA_HandleTypeDef *hdma) { + /* Derogation MISRAC2012-Rule-11.5 */ SRAM_HandleTypeDef *hsram = (SRAM_HandleTypeDef *)(hdma->Parent); /* Disable the DMA channel */ diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c index d5978cca3e..f056ebf24e 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c +++ b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c @@ -6797,8 +6797,6 @@ void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure /* Set the auto-reload preload */ MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); - TIMx->CR1 = tmpcr1; - /* Set the Autoreload value */ TIMx->ARR = (uint32_t)Structure->Period ; @@ -6811,16 +6809,15 @@ void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure TIMx->RCR = Structure->RepetitionCounter; } + /* Disable Update Event (UEV) with Update Generation (UG) + by changing Update Request Source (URS) to avoid Update flag (UIF) */ + SET_BIT(TIMx->CR1, TIM_CR1_URS); + /* Generate an update event to reload the Prescaler and the repetition counter (only for advanced timer) value immediately */ TIMx->EGR = TIM_EGR_UG; - /* Check if the update flag is set after the Update Generation, if so clear the UIF flag */ - if (HAL_IS_BIT_SET(TIMx->SR, TIM_FLAG_UPDATE)) - { - /* Clear the update flag */ - CLEAR_BIT(TIMx->SR, TIM_FLAG_UPDATE); - } + TIMx->CR1 = tmpcr1; } /** diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c index 33a5f002c8..cf6d201ba4 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c +++ b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c @@ -1409,8 +1409,16 @@ HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t /* Enable the UART transmit DMA stream */ tmp = (const uint32_t *)&pData; - HAL_DMA_Start_IT(huart->hdmatx, *(const uint32_t *)tmp, (uint32_t)&huart->Instance->DR, Size); + if (HAL_DMA_Start_IT(huart->hdmatx, *(const uint32_t *)tmp, (uint32_t)&huart->Instance->DR, Size) != HAL_OK) + { + /* Set error code to DMA */ + huart->ErrorCode = HAL_UART_ERROR_DMA; + + /* Restore huart->gState to ready */ + huart->gState = HAL_UART_STATE_READY; + return HAL_ERROR; + } /* Clear the TC flag in the SR register by writing 0 to it */ __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_TC); @@ -1789,21 +1797,18 @@ HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_ status = UART_Start_Receive_DMA(huart, pData, Size); /* Check Rx process has been successfully started */ - if (status == HAL_OK) + if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) { - if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - { - __HAL_UART_CLEAR_IDLEFLAG(huart); - ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - } - else - { - /* In case of errors already pending when reception is started, - Interrupts may have already been raised and lead to reception abortion. - (Overrun error for instance). - In such case Reception Type has been reset to HAL_UART_RECEPTION_STANDARD. */ - status = HAL_ERROR; - } + __HAL_UART_CLEAR_IDLEFLAG(huart); + ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); + } + else + { + /* In case of errors already pending when reception is started, + Interrupts may have already been raised and lead to reception abortion. + (Overrun error for instance). + In such case Reception Type has been reset to HAL_UART_RECEPTION_STANDARD. */ + status = HAL_ERROR; } return status; @@ -2478,7 +2483,7 @@ void HAL_UART_IRQHandler(UART_HandleTypeDef *huart) If Reception till IDLE event has been selected : */ if ((huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) && ((isrflags & USART_SR_IDLE) != 0U) - && ((cr1its & USART_SR_IDLE) != 0U)) + && ((cr1its & USART_CR1_IDLEIE) != 0U)) { __HAL_UART_CLEAR_IDLEFLAG(huart); @@ -2529,6 +2534,28 @@ void HAL_UART_IRQHandler(UART_HandleTypeDef *huart) HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } + else + { + /* If DMA is in Circular mode, Idle event is to be reported to user + even if occurring after a Transfer Complete event from DMA */ + if (nb_remaining_rx_data == huart->RxXferSize) + { + if (huart->hdmarx->Init.Mode == DMA_CIRCULAR) + { + /* Initialize type of RxEvent that correspond to RxEvent callback execution; + In this case, Rx Event type is Idle Event */ + huart->RxEventType = HAL_UART_RXEVENT_IDLE; + +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + /*Call registered Rx Event callback*/ + huart->RxEventCallback(huart, huart->RxXferSize); +#else + /*Call legacy weak Rx Event callback*/ + HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize); +#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ + } + } + } return; } else @@ -3292,8 +3319,16 @@ HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pDa /* Enable the DMA stream */ tmp = (uint32_t *)&pData; - HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->DR, *(uint32_t *)tmp, Size); + if (HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->DR, *(uint32_t *)tmp, Size) != HAL_OK) + { + /* Set error code to DMA */ + huart->ErrorCode = HAL_UART_ERROR_DMA; + /* Restore huart->RxState to ready */ + huart->RxState = HAL_UART_STATE_READY; + + return HAL_ERROR; + } /* Clear the Overrun flag just before enabling the DMA Rx request: can be mandatory for the second transfer */ __HAL_UART_CLEAR_OREFLAG(huart); @@ -3360,7 +3395,6 @@ static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma) { UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; huart->RxXferCount = 0x00U; - huart->TxXferCount = 0x00U; #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ @@ -3593,15 +3627,16 @@ static HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart) */ static HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart) { - uint8_t *pdata8bits; - uint16_t *pdata16bits; + uint8_t *pdata8bits = NULL; + uint16_t *pdata16bits = NULL; /* Check that a Rx process is ongoing */ if (huart->RxState == HAL_UART_STATE_BUSY_RX) { if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) { - pdata8bits = NULL; + /* Unused pdata8bits */ + UNUSED(pdata8bits); pdata16bits = (uint16_t *) huart->pRxBuffPtr; *pdata16bits = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF); huart->pRxBuffPtr += 2U; @@ -3609,7 +3644,8 @@ static HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart) else { pdata8bits = (uint8_t *) huart->pRxBuffPtr; - pdata16bits = NULL; + /* Unused pdata16bits */ + UNUSED(pdata16bits); if ((huart->Init.WordLength == UART_WORDLENGTH_9B) || ((huart->Init.WordLength == UART_WORDLENGTH_8B) && (huart->Init.Parity == UART_PARITY_NONE))) { diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_usart.c b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_usart.c index 50c1b817dc..b55fb79275 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_usart.c +++ b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_usart.c @@ -1242,6 +1242,7 @@ HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, cons */ HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint16_t Size) { + HAL_StatusTypeDef status = HAL_OK; const uint32_t *tmp; if (husart->State == HAL_USART_STATE_READY) @@ -1274,19 +1275,34 @@ HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, const uint /* Enable the USART transmit DMA stream */ tmp = (const uint32_t *)&pTxData; - HAL_DMA_Start_IT(husart->hdmatx, *(const uint32_t *)tmp, (uint32_t)&husart->Instance->DR, Size); + status = HAL_DMA_Start_IT(husart->hdmatx, *(const uint32_t *)tmp, (uint32_t)&husart->Instance->DR, Size); + if (status == HAL_OK) + { + /* Clear the TC flag in the SR register by writing 0 to it */ + __HAL_USART_CLEAR_FLAG(husart, USART_FLAG_TC); - /* Clear the TC flag in the SR register by writing 0 to it */ - __HAL_USART_CLEAR_FLAG(husart, USART_FLAG_TC); + /* Process Unlocked */ + __HAL_UNLOCK(husart); - /* Process Unlocked */ - __HAL_UNLOCK(husart); + /* Enable the DMA transfer for transmit request by setting the DMAT bit + in the USART CR3 register */ + SET_BIT(husart->Instance->CR3, USART_CR3_DMAT); - /* Enable the DMA transfer for transmit request by setting the DMAT bit - in the USART CR3 register */ - SET_BIT(husart->Instance->CR3, USART_CR3_DMAT); + return HAL_OK; + } + else + { + /* Set error code to DMA */ + husart->ErrorCode = HAL_USART_ERROR_DMA; - return HAL_OK; + /* Process Unlocked */ + __HAL_UNLOCK(husart); + + /* Restore husart->State to ready */ + husart->State = HAL_USART_STATE_READY; + + return HAL_ERROR; + } } else { @@ -1309,6 +1325,7 @@ HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, const uint */ HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size) { + HAL_StatusTypeDef status = HAL_OK; uint32_t *tmp; if (husart->State == HAL_USART_STATE_READY) @@ -1354,37 +1371,56 @@ HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pR /* Enable the USART receive DMA stream */ tmp = (uint32_t *)&pRxData; - HAL_DMA_Start_IT(husart->hdmarx, (uint32_t)&husart->Instance->DR, *(uint32_t *)tmp, Size); + status = HAL_DMA_Start_IT(husart->hdmarx, (uint32_t)&husart->Instance->DR, *(uint32_t *)tmp, Size); - /* Enable the USART transmit DMA stream: the transmit stream is used in order - to generate in the non-blocking mode the clock to the slave device, - this mode isn't a simplex receive mode but a full-duplex receive one */ - HAL_DMA_Start_IT(husart->hdmatx, *(uint32_t *)tmp, (uint32_t)&husart->Instance->DR, Size); + if (status == HAL_OK) + { + /* Enable the USART transmit DMA stream: the transmit stream is used in order + to generate in the non-blocking mode the clock to the slave device, + this mode isn't a simplex receive mode but a full-duplex receive one */ + status = HAL_DMA_Start_IT(husart->hdmatx, *(uint32_t *)tmp, (uint32_t)&husart->Instance->DR, Size); + } - /* Clear the Overrun flag just before enabling the DMA Rx request: mandatory for the second transfer */ - __HAL_USART_CLEAR_OREFLAG(husart); + if (status == HAL_OK) + { + /* Clear the Overrun flag just before enabling the DMA Rx request: mandatory for the second transfer */ + __HAL_USART_CLEAR_OREFLAG(husart); - /* Process Unlocked */ - __HAL_UNLOCK(husart); + /* Process Unlocked */ + __HAL_UNLOCK(husart); - if (husart->Init.Parity != USART_PARITY_NONE) - { - /* Enable the USART Parity Error Interrupt */ - SET_BIT(husart->Instance->CR1, USART_CR1_PEIE); - } + if (husart->Init.Parity != USART_PARITY_NONE) + { + /* Enable the USART Parity Error Interrupt */ + SET_BIT(husart->Instance->CR1, USART_CR1_PEIE); + } - /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */ - SET_BIT(husart->Instance->CR3, USART_CR3_EIE); + /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */ + SET_BIT(husart->Instance->CR3, USART_CR3_EIE); - /* Enable the DMA transfer for the receiver request by setting the DMAR bit - in the USART CR3 register */ - SET_BIT(husart->Instance->CR3, USART_CR3_DMAR); + /* Enable the DMA transfer for the receiver request by setting the DMAR bit + in the USART CR3 register */ + SET_BIT(husart->Instance->CR3, USART_CR3_DMAR); - /* Enable the DMA transfer for transmit request by setting the DMAT bit - in the USART CR3 register */ - SET_BIT(husart->Instance->CR3, USART_CR3_DMAT); + /* Enable the DMA transfer for transmit request by setting the DMAT bit + in the USART CR3 register */ + SET_BIT(husart->Instance->CR3, USART_CR3_DMAT); - return HAL_OK; + return HAL_OK; + } + else + { + /* Set error code to DMA */ + husart->ErrorCode = HAL_USART_ERROR_DMA; + + /* Process Unlocked */ + __HAL_UNLOCK(husart); + + /* Restore husart->State to ready */ + husart->State = HAL_USART_STATE_READY; + + return HAL_ERROR; + } } else { @@ -1408,6 +1444,7 @@ HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pR HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint8_t *pRxData, uint16_t Size) { + HAL_StatusTypeDef status; const uint32_t *tmp; if (husart->State == HAL_USART_STATE_READY) @@ -1450,39 +1487,61 @@ HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, con /* Enable the USART receive DMA stream */ tmp = (uint32_t *)&pRxData; - HAL_DMA_Start_IT(husart->hdmarx, (uint32_t)&husart->Instance->DR, *(const uint32_t *)tmp, Size); + status = HAL_DMA_Start_IT(husart->hdmarx, (uint32_t)&husart->Instance->DR, *(const uint32_t *)tmp, Size); /* Enable the USART transmit DMA stream */ - tmp = (const uint32_t *)&pTxData; - HAL_DMA_Start_IT(husart->hdmatx, *(const uint32_t *)tmp, (uint32_t)&husart->Instance->DR, Size); + if (status == HAL_OK) + { + tmp = (const uint32_t *)&pTxData; + status = HAL_DMA_Start_IT(husart->hdmatx, *(const uint32_t *)tmp, (uint32_t)&husart->Instance->DR, Size); + } + else + { + status = HAL_ERROR; + } + if (status == HAL_OK) + { + /* Clear the TC flag in the SR register by writing 0 to it */ + __HAL_USART_CLEAR_FLAG(husart, USART_FLAG_TC); - /* Clear the TC flag in the SR register by writing 0 to it */ - __HAL_USART_CLEAR_FLAG(husart, USART_FLAG_TC); + /* Clear the Overrun flag: mandatory for the second transfer in circular mode */ + __HAL_USART_CLEAR_OREFLAG(husart); - /* Clear the Overrun flag: mandatory for the second transfer in circular mode */ - __HAL_USART_CLEAR_OREFLAG(husart); + /* Process Unlocked */ + __HAL_UNLOCK(husart); - /* Process Unlocked */ - __HAL_UNLOCK(husart); + if (husart->Init.Parity != USART_PARITY_NONE) + { + /* Enable the USART Parity Error Interrupt */ + SET_BIT(husart->Instance->CR1, USART_CR1_PEIE); + } - if (husart->Init.Parity != USART_PARITY_NONE) - { - /* Enable the USART Parity Error Interrupt */ - SET_BIT(husart->Instance->CR1, USART_CR1_PEIE); - } + /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */ + SET_BIT(husart->Instance->CR3, USART_CR3_EIE); - /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */ - SET_BIT(husart->Instance->CR3, USART_CR3_EIE); + /* Enable the DMA transfer for the receiver request by setting the DMAR bit + in the USART CR3 register */ + SET_BIT(husart->Instance->CR3, USART_CR3_DMAR); + + /* Enable the DMA transfer for transmit request by setting the DMAT bit + in the USART CR3 register */ + SET_BIT(husart->Instance->CR3, USART_CR3_DMAT); - /* Enable the DMA transfer for the receiver request by setting the DMAR bit - in the USART CR3 register */ - SET_BIT(husart->Instance->CR3, USART_CR3_DMAR); + return HAL_OK; + } + else + { + /* Set error code to DMA */ + husart->ErrorCode = HAL_USART_ERROR_DMA; - /* Enable the DMA transfer for transmit request by setting the DMAT bit - in the USART CR3 register */ - SET_BIT(husart->Instance->CR3, USART_CR3_DMAT); + /* Process Unlocked */ + __HAL_UNLOCK(husart); - return HAL_OK; + /* Restore husart->State to ready */ + husart->State = HAL_USART_STATE_READY; + + return HAL_ERROR; + } } else { @@ -2561,14 +2620,15 @@ static HAL_StatusTypeDef USART_EndTransmit_IT(USART_HandleTypeDef *husart) */ static HAL_StatusTypeDef USART_Receive_IT(USART_HandleTypeDef *husart) { - uint8_t *pdata8bits; - uint16_t *pdata16bits; + uint8_t *pdata8bits = NULL; + uint16_t *pdata16bits = NULL; if (husart->State == HAL_USART_STATE_BUSY_RX) { if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE)) { - pdata8bits = NULL; + /* Unused pdata8bits */ + UNUSED(pdata8bits); pdata16bits = (uint16_t *) husart->pRxBuffPtr; *pdata16bits = (uint16_t)(husart->Instance->DR & (uint16_t)0x01FF); husart->pRxBuffPtr += 2U; @@ -2576,7 +2636,8 @@ static HAL_StatusTypeDef USART_Receive_IT(USART_HandleTypeDef *husart) else { pdata8bits = (uint8_t *) husart->pRxBuffPtr; - pdata16bits = NULL; + /* Unused pdata16bits */ + UNUSED(pdata16bits); if ((husart->Init.WordLength == USART_WORDLENGTH_9B) || ((husart->Init.WordLength == USART_WORDLENGTH_8B) && (husart->Init.Parity == USART_PARITY_NONE))) { diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_wwdg.c b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_wwdg.c index 216ea2b92c..d66eedfc4e 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_wwdg.c +++ b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_wwdg.c @@ -95,7 +95,7 @@ and a pointer to the user callback function. (+) Use function HAL_WWDG_UnRegisterCallback() to reset a callback to - the default weak (surcharged) function. HAL_WWDG_UnRegisterCallback() + the default weak function. HAL_WWDG_UnRegisterCallback() takes as parameters the HAL peripheral handle and the Callback ID. This function allows to reset following callbacks: (++) EwiCallback : callback for Early WakeUp Interrupt. @@ -103,14 +103,14 @@ [..] When calling HAL_WWDG_Init function, callbacks are reset to the - corresponding legacy weak (surcharged) functions: + corresponding legacy weak functions: HAL_WWDG_EarlyWakeupCallback() and HAL_WWDG_MspInit() only if they have not been registered before. [..] When compilation define USE_HAL_WWDG_REGISTER_CALLBACKS is set to 0 or not defined, the callback registering feature is not available - and weak (surcharged) callbacks are used. + and weak (overridden) callbacks are used. *** WWDG HAL driver macros list *** =================================== @@ -122,7 +122,6 @@ (+) __HAL_WWDG_ENABLE_IT: Enable the WWDG early wakeup interrupt @endverbatim - ****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ @@ -241,7 +240,7 @@ __weak void HAL_WWDG_MspInit(WWDG_HandleTypeDef *hwwdg) #if (USE_HAL_WWDG_REGISTER_CALLBACKS == 1) /** * @brief Register a User WWDG Callback - * To be used instead of the weak (surcharged) predefined callback + * To be used instead of the weak (overridden) predefined callback * @param hwwdg WWDG handle * @param CallbackID ID of the callback to be registered * This parameter can be one of the following values: @@ -283,7 +282,7 @@ HAL_StatusTypeDef HAL_WWDG_RegisterCallback(WWDG_HandleTypeDef *hwwdg, HAL_WWDG_ /** * @brief Unregister a WWDG Callback - * WWDG Callback is redirected to the weak (surcharged) predefined callback + * WWDG Callback is redirected to the weak (overridden) predefined callback * @param hwwdg WWDG handle * @param CallbackID ID of the callback to be registered * This parameter can be one of the following values: diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_dma2d.c b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_dma2d.c index 9f6c8f51c8..6cb13f0ef5 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_dma2d.c +++ b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_dma2d.c @@ -122,7 +122,7 @@ * - SUCCESS: DMA2D registers are de-initialized * - ERROR: DMA2D registers are not de-initialized */ -ErrorStatus LL_DMA2D_DeInit(DMA2D_TypeDef *DMA2Dx) +ErrorStatus LL_DMA2D_DeInit(const DMA2D_TypeDef *DMA2Dx) { ErrorStatus status = SUCCESS; @@ -399,7 +399,7 @@ void LL_DMA2D_ConfigOutputColor(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_ColorTypeDef *DM * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444 * @retval Output Blue color value between Min_Data=0 and Max_Data=0xFF */ -uint32_t LL_DMA2D_GetOutputBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode) +uint32_t LL_DMA2D_GetOutputBlueColor(const DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode) { uint32_t color; @@ -443,7 +443,7 @@ uint32_t LL_DMA2D_GetOutputBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode) * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444 * @retval Output Green color value between Min_Data=0 and Max_Data=0xFF */ -uint32_t LL_DMA2D_GetOutputGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode) +uint32_t LL_DMA2D_GetOutputGreenColor(const DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode) { uint32_t color; @@ -487,7 +487,7 @@ uint32_t LL_DMA2D_GetOutputGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode) * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444 * @retval Output Red color value between Min_Data=0 and Max_Data=0xFF */ -uint32_t LL_DMA2D_GetOutputRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode) +uint32_t LL_DMA2D_GetOutputRedColor(const DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode) { uint32_t color; @@ -531,7 +531,7 @@ uint32_t LL_DMA2D_GetOutputRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode) * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444 * @retval Output Alpha color value between Min_Data=0 and Max_Data=0xFF */ -uint32_t LL_DMA2D_GetOutputAlphaColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode) +uint32_t LL_DMA2D_GetOutputAlphaColor(const DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode) { uint32_t color; diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c index 2431213940..94dd0c6007 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c +++ b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c @@ -62,7 +62,7 @@ * @{ */ #if defined(HAL_NOR_MODULE_ENABLED) || (defined(HAL_NAND_MODULE_ENABLED)) || defined(HAL_PCCARD_MODULE_ENABLED) || defined(HAL_SDRAM_MODULE_ENABLED)\ - || defined(HAL_SRAM_MODULE_ENABLED) + || defined(HAL_SRAM_MODULE_ENABLED) /** @defgroup FMC_LL FMC Low Layer * @brief FMC driver modules @@ -237,7 +237,7 @@ * @retval HAL status */ HAL_StatusTypeDef FMC_NORSRAM_Init(FMC_NORSRAM_TypeDef *Device, - FMC_NORSRAM_InitTypeDef *Init) + const FMC_NORSRAM_InitTypeDef *Init) { uint32_t flashaccess; uint32_t btcr_reg; @@ -262,7 +262,7 @@ HAL_StatusTypeDef FMC_NORSRAM_Init(FMC_NORSRAM_TypeDef *Device, assert_param(IS_FMC_WRITE_BURST(Init->WriteBurst)); #if defined(FMC_BCR1_CCLKEN) assert_param(IS_FMC_CONTINOUS_CLOCK(Init->ContinuousClock)); -#endif +#endif /* FMC_BCR1_CCLKEN */ #if defined(FMC_BCR1_WFDIS) assert_param(IS_FMC_WRITE_FIFO(Init->WriteFifo)); #endif /* FMC_BCR1_WFDIS */ @@ -324,7 +324,7 @@ HAL_StatusTypeDef FMC_NORSRAM_Init(FMC_NORSRAM_TypeDef *Device, #endif /* FMC_BCR1_WRAPMOD */ #if defined(FMC_BCR1_CCLKEN) mask |= FMC_BCR1_CCLKEN; -#endif +#endif /* FMC_BCR1_CCLKEN */ #if defined(FMC_BCR1_WFDIS) mask |= FMC_BCR1_WFDIS; #endif /* FMC_BCR1_WFDIS */ @@ -338,7 +338,7 @@ HAL_StatusTypeDef FMC_NORSRAM_Init(FMC_NORSRAM_TypeDef *Device, { MODIFY_REG(Device->BTCR[FMC_NORSRAM_BANK1], FMC_BCR1_CCLKEN, Init->ContinuousClock); } -#endif +#endif /* FMC_BCR1_CCLKEN */ #if defined(FMC_BCR1_WFDIS) if (Init->NSBank != FMC_NORSRAM_BANK1) @@ -396,11 +396,11 @@ HAL_StatusTypeDef FMC_NORSRAM_DeInit(FMC_NORSRAM_TypeDef *Device, * @retval HAL status */ HAL_StatusTypeDef FMC_NORSRAM_Timing_Init(FMC_NORSRAM_TypeDef *Device, - FMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank) + const FMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank) { #if defined(FMC_BCR1_CCLKEN) uint32_t tmpr; -#endif +#endif /* FMC_BCR1_CCLKEN */ /* Check the parameters */ assert_param(IS_FMC_NORSRAM_DEVICE(Device)); @@ -414,13 +414,14 @@ HAL_StatusTypeDef FMC_NORSRAM_Timing_Init(FMC_NORSRAM_TypeDef *Device, assert_param(IS_FMC_NORSRAM_BANK(Bank)); /* Set FMC_NORSRAM device timing parameters */ - MODIFY_REG(Device->BTCR[Bank + 1U], BTR_CLEAR_MASK, (Timing->AddressSetupTime | - ((Timing->AddressHoldTime) << FMC_BTR1_ADDHLD_Pos) | - ((Timing->DataSetupTime) << FMC_BTR1_DATAST_Pos) | - ((Timing->BusTurnAroundDuration) << FMC_BTR1_BUSTURN_Pos) | - (((Timing->CLKDivision) - 1U) << FMC_BTR1_CLKDIV_Pos) | - (((Timing->DataLatency) - 2U) << FMC_BTR1_DATLAT_Pos) | - (Timing->AccessMode))); + Device->BTCR[Bank + 1U] = + (Timing->AddressSetupTime << FMC_BTR1_ADDSET_Pos) | + (Timing->AddressHoldTime << FMC_BTR1_ADDHLD_Pos) | + (Timing->DataSetupTime << FMC_BTR1_DATAST_Pos) | + (Timing->BusTurnAroundDuration << FMC_BTR1_BUSTURN_Pos) | + ((Timing->CLKDivision - 1U) << FMC_BTR1_CLKDIV_Pos) | + ((Timing->DataLatency - 2U) << FMC_BTR1_DATLAT_Pos) | + Timing->AccessMode; #if defined(FMC_BCR1_CCLKEN) /* Configure Clock division value (in NORSRAM bank 1) when continuous clock is enabled */ @@ -431,7 +432,7 @@ HAL_StatusTypeDef FMC_NORSRAM_Timing_Init(FMC_NORSRAM_TypeDef *Device, MODIFY_REG(Device->BTCR[FMC_NORSRAM_BANK1 + 1U], FMC_BTR1_CLKDIV, tmpr); } -#endif +#endif /* FMC_BCR1_CCLKEN */ return HAL_OK; } @@ -448,7 +449,7 @@ HAL_StatusTypeDef FMC_NORSRAM_Timing_Init(FMC_NORSRAM_TypeDef *Device, * @retval HAL status */ HAL_StatusTypeDef FMC_NORSRAM_Extended_Timing_Init(FMC_NORSRAM_EXTENDED_TypeDef *Device, - FMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank, + const FMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank, uint32_t ExtendedMode) { /* Check the parameters */ @@ -595,7 +596,7 @@ HAL_StatusTypeDef FMC_NORSRAM_WriteOperation_Disable(FMC_NORSRAM_TypeDef *Device * @param Init Pointer to NAND Initialization structure * @retval HAL status */ -HAL_StatusTypeDef FMC_NAND_Init(FMC_NAND_TypeDef *Device, FMC_NAND_InitTypeDef *Init) +HAL_StatusTypeDef FMC_NAND_Init(FMC_NAND_TypeDef *Device, const FMC_NAND_InitTypeDef *Init) { /* Check the parameters */ assert_param(IS_FMC_NAND_DEVICE(Device)); @@ -640,7 +641,7 @@ HAL_StatusTypeDef FMC_NAND_Init(FMC_NAND_TypeDef *Device, FMC_NAND_InitTypeDef * Init->ECCPageSize | ((Init->TCLRSetupTime) << FMC_PCR_TCLR_Pos) | ((Init->TARSetupTime) << FMC_PCR_TAR_Pos))); -#endif +#endif /* FMC_Bank2_3 */ return HAL_OK; } @@ -654,7 +655,7 @@ HAL_StatusTypeDef FMC_NAND_Init(FMC_NAND_TypeDef *Device, FMC_NAND_InitTypeDef * * @retval HAL status */ HAL_StatusTypeDef FMC_NAND_CommonSpace_Timing_Init(FMC_NAND_TypeDef *Device, - FMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank) + const FMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank) { /* Check the parameters */ assert_param(IS_FMC_NAND_DEVICE(Device)); @@ -669,29 +670,29 @@ HAL_StatusTypeDef FMC_NAND_CommonSpace_Timing_Init(FMC_NAND_TypeDef *Device, if (Bank == FMC_NAND_BANK2) { /* NAND bank 2 registers configuration */ - MODIFY_REG(Device->PMEM2, PMEM_CLEAR_MASK, (Timing->SetupTime | - ((Timing->WaitSetupTime) << FMC_PMEM2_MEMWAIT2_Pos) | - ((Timing->HoldSetupTime) << FMC_PMEM2_MEMHOLD2_Pos) | - ((Timing->HiZSetupTime) << FMC_PMEM2_MEMHIZ2_Pos))); + WRITE_REG(Device->PMEM2, (Timing->SetupTime | + ((Timing->WaitSetupTime) << FMC_PMEM2_MEMWAIT2_Pos) | + ((Timing->HoldSetupTime) << FMC_PMEM2_MEMHOLD2_Pos) | + ((Timing->HiZSetupTime) << FMC_PMEM2_MEMHIZ2_Pos))); } else { /* NAND bank 3 registers configuration */ - MODIFY_REG(Device->PMEM3, PMEM_CLEAR_MASK, (Timing->SetupTime | - ((Timing->WaitSetupTime) << FMC_PMEM2_MEMWAIT2_Pos) | - ((Timing->HoldSetupTime) << FMC_PMEM2_MEMHOLD2_Pos) | - ((Timing->HiZSetupTime) << FMC_PMEM2_MEMHIZ2_Pos))); + WRITE_REG(Device->PMEM3, (Timing->SetupTime | + ((Timing->WaitSetupTime) << FMC_PMEM2_MEMWAIT2_Pos) | + ((Timing->HoldSetupTime) << FMC_PMEM2_MEMHOLD2_Pos) | + ((Timing->HiZSetupTime) << FMC_PMEM2_MEMHIZ2_Pos))); } #else /* Prevent unused argument(s) compilation warning if no assert_param check */ UNUSED(Bank); /* NAND bank 3 registers configuration */ - MODIFY_REG(Device->PMEM, PMEM_CLEAR_MASK, (Timing->SetupTime | - ((Timing->WaitSetupTime) << FMC_PMEM_MEMWAIT2_Pos) | - ((Timing->HoldSetupTime) << FMC_PMEM_MEMHOLD2_Pos) | - ((Timing->HiZSetupTime) << FMC_PMEM_MEMHIZ2_Pos))); -#endif + Device->PMEM = (Timing->SetupTime | + ((Timing->WaitSetupTime) << FMC_PMEM_MEMWAIT2_Pos) | + ((Timing->HoldSetupTime) << FMC_PMEM_MEMHOLD2_Pos) | + ((Timing->HiZSetupTime) << FMC_PMEM_MEMHIZ2_Pos)); +#endif /* FMC_Bank2_3 */ return HAL_OK; } @@ -705,7 +706,7 @@ HAL_StatusTypeDef FMC_NAND_CommonSpace_Timing_Init(FMC_NAND_TypeDef *Device, * @retval HAL status */ HAL_StatusTypeDef FMC_NAND_AttributeSpace_Timing_Init(FMC_NAND_TypeDef *Device, - FMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank) + const FMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank) { /* Check the parameters */ assert_param(IS_FMC_NAND_DEVICE(Device)); @@ -720,29 +721,29 @@ HAL_StatusTypeDef FMC_NAND_AttributeSpace_Timing_Init(FMC_NAND_TypeDef *Device, if (Bank == FMC_NAND_BANK2) { /* NAND bank 2 registers configuration */ - MODIFY_REG(Device->PATT2, PATT_CLEAR_MASK, (Timing->SetupTime | - ((Timing->WaitSetupTime) << FMC_PATT2_ATTWAIT2_Pos) | - ((Timing->HoldSetupTime) << FMC_PATT2_ATTHOLD2_Pos) | - ((Timing->HiZSetupTime) << FMC_PATT2_ATTHIZ2_Pos))); + WRITE_REG(Device->PATT2, (Timing->SetupTime | + ((Timing->WaitSetupTime) << FMC_PATT2_ATTWAIT2_Pos) | + ((Timing->HoldSetupTime) << FMC_PATT2_ATTHOLD2_Pos) | + ((Timing->HiZSetupTime) << FMC_PATT2_ATTHIZ2_Pos))); } else { /* NAND bank 3 registers configuration */ - MODIFY_REG(Device->PATT3, PATT_CLEAR_MASK, (Timing->SetupTime | - ((Timing->WaitSetupTime) << FMC_PATT2_ATTWAIT2_Pos) | - ((Timing->HoldSetupTime) << FMC_PATT2_ATTHOLD2_Pos) | - ((Timing->HiZSetupTime) << FMC_PATT2_ATTHIZ2_Pos))); + WRITE_REG(Device->PATT3, (Timing->SetupTime | + ((Timing->WaitSetupTime) << FMC_PATT2_ATTWAIT2_Pos) | + ((Timing->HoldSetupTime) << FMC_PATT2_ATTHOLD2_Pos) | + ((Timing->HiZSetupTime) << FMC_PATT2_ATTHIZ2_Pos))); } #else /* Prevent unused argument(s) compilation warning if no assert_param check */ UNUSED(Bank); /* NAND bank 3 registers configuration */ - MODIFY_REG(Device->PATT, PATT_CLEAR_MASK, (Timing->SetupTime | - ((Timing->WaitSetupTime) << FMC_PATT_ATTWAIT2_Pos) | - ((Timing->HoldSetupTime) << FMC_PATT_ATTHOLD2_Pos) | - ((Timing->HiZSetupTime) << FMC_PATT_ATTHIZ2_Pos))); -#endif + Device->PATT = (Timing->SetupTime | + ((Timing->WaitSetupTime) << FMC_PATT_ATTWAIT2_Pos) | + ((Timing->HoldSetupTime) << FMC_PATT_ATTHOLD2_Pos) | + ((Timing->HiZSetupTime) << FMC_PATT_ATTHIZ2_Pos)); +#endif /* FMC_Bank2_3 */ return HAL_OK; } @@ -790,7 +791,7 @@ HAL_StatusTypeDef FMC_NAND_DeInit(FMC_NAND_TypeDef *Device, uint32_t Bank) WRITE_REG(Device->SR, 0x00000040U); WRITE_REG(Device->PMEM, 0xFCFCFCFCU); WRITE_REG(Device->PATT, 0xFCFCFCFCU); -#endif +#endif /* FMC_Bank2_3 */ return HAL_OK; } @@ -842,7 +843,7 @@ HAL_StatusTypeDef FMC_NAND_ECC_Enable(FMC_NAND_TypeDef *Device, uint32_t Bank) UNUSED(Bank); SET_BIT(Device->PCR, FMC_PCR_ECCEN); -#endif +#endif /* FMC_Bank2_3 */ return HAL_OK; } @@ -875,7 +876,7 @@ HAL_StatusTypeDef FMC_NAND_ECC_Disable(FMC_NAND_TypeDef *Device, uint32_t Bank) UNUSED(Bank); CLEAR_BIT(Device->PCR, FMC_PCR_ECCEN); -#endif +#endif /* FMC_Bank2_3 */ return HAL_OK; } @@ -888,7 +889,7 @@ HAL_StatusTypeDef FMC_NAND_ECC_Disable(FMC_NAND_TypeDef *Device, uint32_t Bank) * @param Timeout Timeout wait value * @retval HAL status */ -HAL_StatusTypeDef FMC_NAND_GetECC(FMC_NAND_TypeDef *Device, uint32_t *ECCval, uint32_t Bank, +HAL_StatusTypeDef FMC_NAND_GetECC(const FMC_NAND_TypeDef *Device, uint32_t *ECCval, uint32_t Bank, uint32_t Timeout) { uint32_t tickstart; @@ -930,7 +931,7 @@ HAL_StatusTypeDef FMC_NAND_GetECC(FMC_NAND_TypeDef *Device, uint32_t *ECCval, ui /* Get the ECCR register value */ *ECCval = (uint32_t)Device->ECCR; -#endif +#endif /* FMC_Bank2_3 */ return HAL_OK; } @@ -989,7 +990,7 @@ HAL_StatusTypeDef FMC_NAND_GetECC(FMC_NAND_TypeDef *Device, uint32_t *ECCval, ui * @param Init Pointer to PCCARD Initialization structure * @retval HAL status */ -HAL_StatusTypeDef FMC_PCCARD_Init(FMC_PCCARD_TypeDef *Device, FMC_PCCARD_InitTypeDef *Init) +HAL_StatusTypeDef FMC_PCCARD_Init(FMC_PCCARD_TypeDef *Device, const FMC_PCCARD_InitTypeDef *Init) { /* Check the parameters */ assert_param(IS_FMC_PCCARD_DEVICE(Device)); @@ -1023,7 +1024,7 @@ HAL_StatusTypeDef FMC_PCCARD_Init(FMC_PCCARD_TypeDef *Device, FMC_PCCARD_InitTyp * @retval HAL status */ HAL_StatusTypeDef FMC_PCCARD_CommonSpace_Timing_Init(FMC_PCCARD_TypeDef *Device, - FMC_NAND_PCC_TimingTypeDef *Timing) + const FMC_NAND_PCC_TimingTypeDef *Timing) { /* Check the parameters */ assert_param(IS_FMC_PCCARD_DEVICE(Device)); @@ -1035,11 +1036,10 @@ HAL_StatusTypeDef FMC_PCCARD_CommonSpace_Timing_Init(FMC_PCCARD_TypeDef *Device, #endif /* FMC_Bank3) || defined(FMC_Bank2_3 */ /* Set PCCARD timing parameters */ - MODIFY_REG(Device->PMEM4, PMEM4_CLEAR_MASK, - (Timing->SetupTime | - ((Timing->WaitSetupTime) << FMC_PMEM4_MEMWAIT4_Pos) | - ((Timing->HoldSetupTime) << FMC_PMEM4_MEMHOLD4_Pos) | - ((Timing->HiZSetupTime) << FMC_PMEM4_MEMHIZ4_Pos))); + WRITE_REG(Device->PMEM4, (Timing->SetupTime | + ((Timing->WaitSetupTime) << FMC_PMEM4_MEMWAIT4_Pos) | + ((Timing->HoldSetupTime) << FMC_PMEM4_MEMHOLD4_Pos) | + ((Timing->HiZSetupTime) << FMC_PMEM4_MEMHIZ4_Pos))); return HAL_OK; } @@ -1052,7 +1052,7 @@ HAL_StatusTypeDef FMC_PCCARD_CommonSpace_Timing_Init(FMC_PCCARD_TypeDef *Device, * @retval HAL status */ HAL_StatusTypeDef FMC_PCCARD_AttributeSpace_Timing_Init(FMC_PCCARD_TypeDef *Device, - FMC_NAND_PCC_TimingTypeDef *Timing) + const FMC_NAND_PCC_TimingTypeDef *Timing) { /* Check the parameters */ assert_param(IS_FMC_PCCARD_DEVICE(Device)); @@ -1064,11 +1064,10 @@ HAL_StatusTypeDef FMC_PCCARD_AttributeSpace_Timing_Init(FMC_PCCARD_TypeDef *Devi #endif /* FMC_Bank3) || defined(FMC_Bank2_3 */ /* Set PCCARD timing parameters */ - MODIFY_REG(Device->PATT4, PATT4_CLEAR_MASK, - (Timing->SetupTime | - ((Timing->WaitSetupTime) << FMC_PATT4_ATTWAIT4_Pos) | - ((Timing->HoldSetupTime) << FMC_PATT4_ATTHOLD4_Pos) | - ((Timing->HiZSetupTime) << FMC_PATT4_ATTHIZ4_Pos))); + WRITE_REG(Device->PATT4, (Timing->SetupTime | + ((Timing->WaitSetupTime) << FMC_PATT4_ATTWAIT4_Pos) | + ((Timing->HoldSetupTime) << FMC_PATT4_ATTHOLD4_Pos) | + ((Timing->HiZSetupTime) << FMC_PATT4_ATTHIZ4_Pos))); return HAL_OK; } @@ -1081,7 +1080,7 @@ HAL_StatusTypeDef FMC_PCCARD_AttributeSpace_Timing_Init(FMC_PCCARD_TypeDef *Devi * @retval HAL status */ HAL_StatusTypeDef FMC_PCCARD_IOSpace_Timing_Init(FMC_PCCARD_TypeDef *Device, - FMC_NAND_PCC_TimingTypeDef *Timing) + const FMC_NAND_PCC_TimingTypeDef *Timing) { /* Check the parameters */ assert_param(IS_FMC_PCCARD_DEVICE(Device)); @@ -1093,11 +1092,10 @@ HAL_StatusTypeDef FMC_PCCARD_IOSpace_Timing_Init(FMC_PCCARD_TypeDef *Device, #endif /* FMC_Bank3) || defined(FMC_Bank2_3 */ /* Set FMC_PCCARD device timing parameters */ - MODIFY_REG(Device->PIO4, PIO4_CLEAR_MASK, - (Timing->SetupTime | - (Timing->WaitSetupTime << FMC_PIO4_IOWAIT4_Pos) | - (Timing->HoldSetupTime << FMC_PIO4_IOHOLD4_Pos) | - (Timing->HiZSetupTime << FMC_PIO4_IOHIZ4_Pos))); + WRITE_REG(Device->PIO4, (Timing->SetupTime | + (Timing->WaitSetupTime << FMC_PIO4_IOWAIT4_Pos) | + (Timing->HoldSetupTime << FMC_PIO4_IOHOLD4_Pos) | + (Timing->HiZSetupTime << FMC_PIO4_IOHIZ4_Pos))); return HAL_OK; } @@ -1178,7 +1176,7 @@ HAL_StatusTypeDef FMC_PCCARD_DeInit(FMC_PCCARD_TypeDef *Device) * @param Init Pointer to SDRAM Initialization structure * @retval HAL status */ -HAL_StatusTypeDef FMC_SDRAM_Init(FMC_SDRAM_TypeDef *Device, FMC_SDRAM_InitTypeDef *Init) +HAL_StatusTypeDef FMC_SDRAM_Init(FMC_SDRAM_TypeDef *Device, const FMC_SDRAM_InitTypeDef *Init) { /* Check the parameters */ assert_param(IS_FMC_SDRAM_DEVICE(Device)); @@ -1241,7 +1239,7 @@ HAL_StatusTypeDef FMC_SDRAM_Init(FMC_SDRAM_TypeDef *Device, FMC_SDRAM_InitTypeDe * @retval HAL status */ HAL_StatusTypeDef FMC_SDRAM_Timing_Init(FMC_SDRAM_TypeDef *Device, - FMC_SDRAM_TimingTypeDef *Timing, uint32_t Bank) + const FMC_SDRAM_TimingTypeDef *Timing, uint32_t Bank) { /* Check the parameters */ assert_param(IS_FMC_SDRAM_DEVICE(Device)); @@ -1371,7 +1369,7 @@ HAL_StatusTypeDef FMC_SDRAM_WriteProtection_Disable(FMC_SDRAM_TypeDef *Device, u * @retval HAL state */ HAL_StatusTypeDef FMC_SDRAM_SendCommand(FMC_SDRAM_TypeDef *Device, - FMC_SDRAM_CommandTypeDef *Command, uint32_t Timeout) + const FMC_SDRAM_CommandTypeDef *Command, uint32_t Timeout) { uint32_t tickstart = 0U; /* Check the parameters */ diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fsmc.c b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fsmc.c index ff79111818..435c7c179d 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fsmc.c +++ b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fsmc.c @@ -60,7 +60,7 @@ * @{ */ #if defined(HAL_NOR_MODULE_ENABLED) || defined(HAL_NAND_MODULE_ENABLED) || defined(HAL_PCCARD_MODULE_ENABLED) \ - || defined(HAL_SRAM_MODULE_ENABLED) + || defined(HAL_SRAM_MODULE_ENABLED) /** @defgroup FSMC_LL FSMC Low Layer * @brief FSMC driver modules @@ -218,7 +218,7 @@ * @retval HAL status */ HAL_StatusTypeDef FSMC_NORSRAM_Init(FSMC_NORSRAM_TypeDef *Device, - FSMC_NORSRAM_InitTypeDef *Init) + const FSMC_NORSRAM_InitTypeDef *Init) { uint32_t flashaccess; uint32_t btcr_reg; @@ -243,7 +243,7 @@ HAL_StatusTypeDef FSMC_NORSRAM_Init(FSMC_NORSRAM_TypeDef *Device, assert_param(IS_FSMC_WRITE_BURST(Init->WriteBurst)); #if defined(FSMC_BCR1_CCLKEN) assert_param(IS_FSMC_CONTINOUS_CLOCK(Init->ContinuousClock)); -#endif +#endif /* FSMC_BCR1_CCLKEN */ #if defined(FSMC_BCR1_WFDIS) assert_param(IS_FSMC_WRITE_FIFO(Init->WriteFifo)); #endif /* FSMC_BCR1_WFDIS */ @@ -305,7 +305,7 @@ HAL_StatusTypeDef FSMC_NORSRAM_Init(FSMC_NORSRAM_TypeDef *Device, #endif /* FSMC_BCR1_WRAPMOD */ #if defined(FSMC_BCR1_CCLKEN) mask |= FSMC_BCR1_CCLKEN; -#endif +#endif /* FSMC_BCR1_CCLKEN */ #if defined(FSMC_BCR1_WFDIS) mask |= FSMC_BCR1_WFDIS; #endif /* FSMC_BCR1_WFDIS */ @@ -319,7 +319,7 @@ HAL_StatusTypeDef FSMC_NORSRAM_Init(FSMC_NORSRAM_TypeDef *Device, { MODIFY_REG(Device->BTCR[FSMC_NORSRAM_BANK1], FSMC_BCR1_CCLKEN, Init->ContinuousClock); } -#endif +#endif /* FSMC_BCR1_CCLKEN */ #if defined(FSMC_BCR1_WFDIS) if (Init->NSBank != FSMC_NORSRAM_BANK1) @@ -340,7 +340,7 @@ HAL_StatusTypeDef FSMC_NORSRAM_Init(FSMC_NORSRAM_TypeDef *Device, * @retval HAL status */ HAL_StatusTypeDef FSMC_NORSRAM_DeInit(FSMC_NORSRAM_TypeDef *Device, - FSMC_NORSRAM_EXTENDED_TypeDef *ExDevice, uint32_t Bank) + FSMC_NORSRAM_EXTENDED_TypeDef *ExDevice, uint32_t Bank) { /* Check the parameters */ assert_param(IS_FSMC_NORSRAM_DEVICE(Device)); @@ -377,11 +377,11 @@ HAL_StatusTypeDef FSMC_NORSRAM_DeInit(FSMC_NORSRAM_TypeDef *Device, * @retval HAL status */ HAL_StatusTypeDef FSMC_NORSRAM_Timing_Init(FSMC_NORSRAM_TypeDef *Device, - FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank) + const FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank) { #if defined(FSMC_BCR1_CCLKEN) uint32_t tmpr; -#endif +#endif /* FSMC_BCR1_CCLKEN */ /* Check the parameters */ assert_param(IS_FSMC_NORSRAM_DEVICE(Device)); @@ -395,13 +395,14 @@ HAL_StatusTypeDef FSMC_NORSRAM_Timing_Init(FSMC_NORSRAM_TypeDef *Device, assert_param(IS_FSMC_NORSRAM_BANK(Bank)); /* Set FSMC_NORSRAM device timing parameters */ - MODIFY_REG(Device->BTCR[Bank + 1U], BTR_CLEAR_MASK, (Timing->AddressSetupTime | - ((Timing->AddressHoldTime) << FSMC_BTR1_ADDHLD_Pos) | - ((Timing->DataSetupTime) << FSMC_BTR1_DATAST_Pos) | - ((Timing->BusTurnAroundDuration) << FSMC_BTR1_BUSTURN_Pos) | - (((Timing->CLKDivision) - 1U) << FSMC_BTR1_CLKDIV_Pos) | - (((Timing->DataLatency) - 2U) << FSMC_BTR1_DATLAT_Pos) | - (Timing->AccessMode))); + Device->BTCR[Bank + 1U] = + (Timing->AddressSetupTime << FSMC_BTR1_ADDSET_Pos) | + (Timing->AddressHoldTime << FSMC_BTR1_ADDHLD_Pos) | + (Timing->DataSetupTime << FSMC_BTR1_DATAST_Pos) | + (Timing->BusTurnAroundDuration << FSMC_BTR1_BUSTURN_Pos) | + ((Timing->CLKDivision - 1U) << FSMC_BTR1_CLKDIV_Pos) | + ((Timing->DataLatency - 2U) << FSMC_BTR1_DATLAT_Pos) | + Timing->AccessMode; #if defined(FSMC_BCR1_CCLKEN) /* Configure Clock division value (in NORSRAM bank 1) when continuous clock is enabled */ @@ -412,7 +413,7 @@ HAL_StatusTypeDef FSMC_NORSRAM_Timing_Init(FSMC_NORSRAM_TypeDef *Device, MODIFY_REG(Device->BTCR[FSMC_NORSRAM_BANK1 + 1U], FSMC_BTR1_CLKDIV, tmpr); } -#endif +#endif /* FSMC_BCR1_CCLKEN */ return HAL_OK; } @@ -429,8 +430,8 @@ HAL_StatusTypeDef FSMC_NORSRAM_Timing_Init(FSMC_NORSRAM_TypeDef *Device, * @retval HAL status */ HAL_StatusTypeDef FSMC_NORSRAM_Extended_Timing_Init(FSMC_NORSRAM_EXTENDED_TypeDef *Device, - FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank, - uint32_t ExtendedMode) + const FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank, + uint32_t ExtendedMode) { /* Check the parameters */ assert_param(IS_FSMC_EXTENDED_MODE(ExtendedMode)); @@ -576,7 +577,7 @@ HAL_StatusTypeDef FSMC_NORSRAM_WriteOperation_Disable(FSMC_NORSRAM_TypeDef *Devi * @param Init Pointer to NAND Initialization structure * @retval HAL status */ -HAL_StatusTypeDef FSMC_NAND_Init(FSMC_NAND_TypeDef *Device, FSMC_NAND_InitTypeDef *Init) +HAL_StatusTypeDef FSMC_NAND_Init(FSMC_NAND_TypeDef *Device, const FSMC_NAND_InitTypeDef *Init) { /* Check the parameters */ assert_param(IS_FSMC_NAND_DEVICE(Device)); @@ -624,7 +625,7 @@ HAL_StatusTypeDef FSMC_NAND_Init(FSMC_NAND_TypeDef *Device, FSMC_NAND_InitTypeDe * @retval HAL status */ HAL_StatusTypeDef FSMC_NAND_CommonSpace_Timing_Init(FSMC_NAND_TypeDef *Device, - FSMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank) + const FSMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank) { /* Check the parameters */ assert_param(IS_FSMC_NAND_DEVICE(Device)); @@ -638,18 +639,18 @@ HAL_StatusTypeDef FSMC_NAND_CommonSpace_Timing_Init(FSMC_NAND_TypeDef *Device, if (Bank == FSMC_NAND_BANK2) { /* NAND bank 2 registers configuration */ - MODIFY_REG(Device->PMEM2, PMEM_CLEAR_MASK, (Timing->SetupTime | - ((Timing->WaitSetupTime) << FSMC_PMEM2_MEMWAIT2_Pos) | - ((Timing->HoldSetupTime) << FSMC_PMEM2_MEMHOLD2_Pos) | - ((Timing->HiZSetupTime) << FSMC_PMEM2_MEMHIZ2_Pos))); + WRITE_REG(Device->PMEM2, (Timing->SetupTime | + ((Timing->WaitSetupTime) << FSMC_PMEM2_MEMWAIT2_Pos) | + ((Timing->HoldSetupTime) << FSMC_PMEM2_MEMHOLD2_Pos) | + ((Timing->HiZSetupTime) << FSMC_PMEM2_MEMHIZ2_Pos))); } else { /* NAND bank 3 registers configuration */ - MODIFY_REG(Device->PMEM3, PMEM_CLEAR_MASK, (Timing->SetupTime | - ((Timing->WaitSetupTime) << FSMC_PMEM2_MEMWAIT2_Pos) | - ((Timing->HoldSetupTime) << FSMC_PMEM2_MEMHOLD2_Pos) | - ((Timing->HiZSetupTime) << FSMC_PMEM2_MEMHIZ2_Pos))); + WRITE_REG(Device->PMEM3, (Timing->SetupTime | + ((Timing->WaitSetupTime) << FSMC_PMEM2_MEMWAIT2_Pos) | + ((Timing->HoldSetupTime) << FSMC_PMEM2_MEMHOLD2_Pos) | + ((Timing->HiZSetupTime) << FSMC_PMEM2_MEMHIZ2_Pos))); } return HAL_OK; @@ -664,7 +665,7 @@ HAL_StatusTypeDef FSMC_NAND_CommonSpace_Timing_Init(FSMC_NAND_TypeDef *Device, * @retval HAL status */ HAL_StatusTypeDef FSMC_NAND_AttributeSpace_Timing_Init(FSMC_NAND_TypeDef *Device, - FSMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank) + const FSMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank) { /* Check the parameters */ assert_param(IS_FSMC_NAND_DEVICE(Device)); @@ -678,18 +679,18 @@ HAL_StatusTypeDef FSMC_NAND_AttributeSpace_Timing_Init(FSMC_NAND_TypeDef *Device if (Bank == FSMC_NAND_BANK2) { /* NAND bank 2 registers configuration */ - MODIFY_REG(Device->PATT2, PATT_CLEAR_MASK, (Timing->SetupTime | - ((Timing->WaitSetupTime) << FSMC_PATT2_ATTWAIT2_Pos) | - ((Timing->HoldSetupTime) << FSMC_PATT2_ATTHOLD2_Pos) | - ((Timing->HiZSetupTime) << FSMC_PATT2_ATTHIZ2_Pos))); + WRITE_REG(Device->PATT2, (Timing->SetupTime | + ((Timing->WaitSetupTime) << FSMC_PATT2_ATTWAIT2_Pos) | + ((Timing->HoldSetupTime) << FSMC_PATT2_ATTHOLD2_Pos) | + ((Timing->HiZSetupTime) << FSMC_PATT2_ATTHIZ2_Pos))); } else { /* NAND bank 3 registers configuration */ - MODIFY_REG(Device->PATT3, PATT_CLEAR_MASK, (Timing->SetupTime | - ((Timing->WaitSetupTime) << FSMC_PATT2_ATTWAIT2_Pos) | - ((Timing->HoldSetupTime) << FSMC_PATT2_ATTHOLD2_Pos) | - ((Timing->HiZSetupTime) << FSMC_PATT2_ATTHIZ2_Pos))); + WRITE_REG(Device->PATT3, (Timing->SetupTime | + ((Timing->WaitSetupTime) << FSMC_PATT2_ATTWAIT2_Pos) | + ((Timing->HoldSetupTime) << FSMC_PATT2_ATTHOLD2_Pos) | + ((Timing->HiZSetupTime) << FSMC_PATT2_ATTHIZ2_Pos))); } return HAL_OK; @@ -811,8 +812,8 @@ HAL_StatusTypeDef FSMC_NAND_ECC_Disable(FSMC_NAND_TypeDef *Device, uint32_t Bank * @param Timeout Timeout wait value * @retval HAL status */ -HAL_StatusTypeDef FSMC_NAND_GetECC(FSMC_NAND_TypeDef *Device, uint32_t *ECCval, uint32_t Bank, - uint32_t Timeout) +HAL_StatusTypeDef FSMC_NAND_GetECC(const FSMC_NAND_TypeDef *Device, uint32_t *ECCval, uint32_t Bank, + uint32_t Timeout) { uint32_t tickstart; @@ -904,7 +905,7 @@ HAL_StatusTypeDef FSMC_NAND_GetECC(FSMC_NAND_TypeDef *Device, uint32_t *ECCval, * @param Init Pointer to PCCARD Initialization structure * @retval HAL status */ -HAL_StatusTypeDef FSMC_PCCARD_Init(FSMC_PCCARD_TypeDef *Device, FSMC_PCCARD_InitTypeDef *Init) +HAL_StatusTypeDef FSMC_PCCARD_Init(FSMC_PCCARD_TypeDef *Device, const FSMC_PCCARD_InitTypeDef *Init) { /* Check the parameters */ assert_param(IS_FSMC_PCCARD_DEVICE(Device)); @@ -938,7 +939,7 @@ HAL_StatusTypeDef FSMC_PCCARD_Init(FSMC_PCCARD_TypeDef *Device, FSMC_PCCARD_Init * @retval HAL status */ HAL_StatusTypeDef FSMC_PCCARD_CommonSpace_Timing_Init(FSMC_PCCARD_TypeDef *Device, - FSMC_NAND_PCC_TimingTypeDef *Timing) + const FSMC_NAND_PCC_TimingTypeDef *Timing) { /* Check the parameters */ assert_param(IS_FSMC_PCCARD_DEVICE(Device)); @@ -950,11 +951,10 @@ HAL_StatusTypeDef FSMC_PCCARD_CommonSpace_Timing_Init(FSMC_PCCARD_TypeDef *Devic #endif /* FSMC_Bank2_3 */ /* Set PCCARD timing parameters */ - MODIFY_REG(Device->PMEM4, PMEM4_CLEAR_MASK, - (Timing->SetupTime | - ((Timing->WaitSetupTime) << FSMC_PMEM4_MEMWAIT4_Pos) | - ((Timing->HoldSetupTime) << FSMC_PMEM4_MEMHOLD4_Pos) | - ((Timing->HiZSetupTime) << FSMC_PMEM4_MEMHIZ4_Pos))); + WRITE_REG(Device->PMEM4, (Timing->SetupTime | + ((Timing->WaitSetupTime) << FSMC_PMEM4_MEMWAIT4_Pos) | + ((Timing->HoldSetupTime) << FSMC_PMEM4_MEMHOLD4_Pos) | + ((Timing->HiZSetupTime) << FSMC_PMEM4_MEMHIZ4_Pos))); return HAL_OK; } @@ -967,7 +967,7 @@ HAL_StatusTypeDef FSMC_PCCARD_CommonSpace_Timing_Init(FSMC_PCCARD_TypeDef *Devic * @retval HAL status */ HAL_StatusTypeDef FSMC_PCCARD_AttributeSpace_Timing_Init(FSMC_PCCARD_TypeDef *Device, - FSMC_NAND_PCC_TimingTypeDef *Timing) + const FSMC_NAND_PCC_TimingTypeDef *Timing) { /* Check the parameters */ assert_param(IS_FSMC_PCCARD_DEVICE(Device)); @@ -979,11 +979,10 @@ HAL_StatusTypeDef FSMC_PCCARD_AttributeSpace_Timing_Init(FSMC_PCCARD_TypeDef *De #endif /* FSMC_Bank2_3 */ /* Set PCCARD timing parameters */ - MODIFY_REG(Device->PATT4, PATT4_CLEAR_MASK, - (Timing->SetupTime | - ((Timing->WaitSetupTime) << FSMC_PATT4_ATTWAIT4_Pos) | - ((Timing->HoldSetupTime) << FSMC_PATT4_ATTHOLD4_Pos) | - ((Timing->HiZSetupTime) << FSMC_PATT4_ATTHIZ4_Pos))); + WRITE_REG(Device->PATT4, (Timing->SetupTime | + ((Timing->WaitSetupTime) << FSMC_PATT4_ATTWAIT4_Pos) | + ((Timing->HoldSetupTime) << FSMC_PATT4_ATTHOLD4_Pos) | + ((Timing->HiZSetupTime) << FSMC_PATT4_ATTHIZ4_Pos))); return HAL_OK; } @@ -996,7 +995,7 @@ HAL_StatusTypeDef FSMC_PCCARD_AttributeSpace_Timing_Init(FSMC_PCCARD_TypeDef *De * @retval HAL status */ HAL_StatusTypeDef FSMC_PCCARD_IOSpace_Timing_Init(FSMC_PCCARD_TypeDef *Device, - FSMC_NAND_PCC_TimingTypeDef *Timing) + const FSMC_NAND_PCC_TimingTypeDef *Timing) { /* Check the parameters */ assert_param(IS_FSMC_PCCARD_DEVICE(Device)); @@ -1008,11 +1007,10 @@ HAL_StatusTypeDef FSMC_PCCARD_IOSpace_Timing_Init(FSMC_PCCARD_TypeDef *Device, #endif /* FSMC_Bank2_3 */ /* Set FSMC_PCCARD device timing parameters */ - MODIFY_REG(Device->PIO4, PIO4_CLEAR_MASK, - (Timing->SetupTime | - (Timing->WaitSetupTime << FSMC_PIO4_IOWAIT4_Pos) | - (Timing->HoldSetupTime << FSMC_PIO4_IOHOLD4_Pos) | - (Timing->HiZSetupTime << FSMC_PIO4_IOHIZ4_Pos))); + WRITE_REG(Device->PIO4, (Timing->SetupTime | + (Timing->WaitSetupTime << FSMC_PIO4_IOWAIT4_Pos) | + (Timing->HoldSetupTime << FSMC_PIO4_IOHOLD4_Pos) | + (Timing->HiZSetupTime << FSMC_PIO4_IOHIZ4_Pos))); return HAL_OK; } diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_spi.c b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_spi.c index 1371e911ea..3912398d68 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_spi.c +++ b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_spi.c @@ -204,8 +204,9 @@ ErrorStatus LL_SPI_DeInit(const SPI_TypeDef *SPIx) /** * @brief Initialize the SPI registers according to the specified parameters in SPI_InitStruct. - * @note As some bits in SPI configuration registers can only be written when the SPI is disabled (SPI_CR1_SPE bit =0), - * SPI peripheral should be in disabled state prior calling this function. Otherwise, ERROR result will be returned. + * @note As some bits in SPI configuration registers can only be written when the + * SPI is disabled (SPI_CR1_SPE bit = 0), SPI peripheral should be in disabled state prior + * calling this function. Otherwise, ERROR result will be returned. * @param SPIx SPI Instance * @param SPI_InitStruct pointer to a @ref LL_SPI_InitTypeDef structure * @retval An ErrorStatus enumeration value. (Return always SUCCESS) diff --git a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c index 40b6d83a49..7d98361be8 100644 --- a/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c +++ b/system/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c @@ -799,12 +799,12 @@ HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef else { pktcnt = (uint16_t)((ep->xfer_len + ep->maxpacket - 1U) / ep->maxpacket); - USBx_INEP(epnum)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & (pktcnt << 19)); + USBx_INEP(epnum)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & ((uint32_t)pktcnt << 19)); if (ep->type == EP_TYPE_ISOC) { USBx_INEP(epnum)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_MULCNT); - USBx_INEP(epnum)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_MULCNT & (pktcnt << 29)); + USBx_INEP(epnum)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_MULCNT & ((uint32_t)pktcnt << 29)); } } @@ -1335,8 +1335,8 @@ void USB_ClearInterrupts(USB_OTG_GlobalTypeDef *USBx, uint32_t interrupt) * @param USBx Selected device * @retval return core mode : Host or Device * This parameter can be one of these values: - * 0 : Host - * 1 : Device + * 1 : Host + * 0 : Device */ uint32_t USB_GetMode(const USB_OTG_GlobalTypeDef *USBx) { @@ -1418,8 +1418,15 @@ static HAL_StatusTypeDef USB_CoreReset(USB_OTG_GlobalTypeDef *USBx) } } while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_AHBIDL) == 0U); + count = 10U; + + /* few cycles before setting core reset */ + while (count > 0U) + { + count--; + } + /* Core Soft Reset */ - count = 0U; USBx->GRSTCTL |= USB_OTG_GRSTCTL_CSRST; do @@ -1637,13 +1644,13 @@ HAL_StatusTypeDef USB_DriveVbus(const USB_OTG_GlobalTypeDef *USBx, uint8_t state } /** - * @brief Return Host Core speed + * @brief Return Host Port speed * @param USBx Selected device - * @retval speed : Host speed + * @retval speed : Host port device speed * This parameter can be one of these values: - * @arg HCD_SPEED_HIGH: High speed mode - * @arg HCD_SPEED_FULL: Full speed mode - * @arg HCD_SPEED_LOW: Low speed mode + * @arg HCD_DEVICE_SPEED_HIGH: High speed mode + * @arg HCD_DEVICE_SPEED_FULL: Full speed mode + * @arg HCD_DEVICE_SPEED_LOW: Low speed mode */ uint32_t USB_GetHostSpeed(USB_OTG_GlobalTypeDef const *USBx) { diff --git a/system/Drivers/STM32YYxx_HAL_Driver_version.md b/system/Drivers/STM32YYxx_HAL_Driver_version.md index 15152f4b0b..10e2673d4f 100644 --- a/system/Drivers/STM32YYxx_HAL_Driver_version.md +++ b/system/Drivers/STM32YYxx_HAL_Driver_version.md @@ -5,7 +5,7 @@ * STM32F1: 1.1.10 * STM32F2: 1.2.9 * STM32F3: 1.5.8 - * STM32F4: 1.8.3 + * STM32F4: 1.8.4 * STM32F7: 1.3.2 * STM32G0: 1.4.6 * STM32G4: 1.2.5 From ca9fdaa9ef5659e4f5c16b8e224f4873c8656942 Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Tue, 27 May 2025 10:19:39 +0200 Subject: [PATCH 43/44] system(f4): update STM32F4xx CMSIS Drivers to v2.6.11 Included in STM32CubeF4 FW v1.28.2 Signed-off-by: Frederic Pillon --- .../Device/ST/STM32F4xx/Include/stm32f401xc.h | 226 ++++++------- .../Device/ST/STM32F4xx/Include/stm32f401xe.h | 226 ++++++------- .../Device/ST/STM32F4xx/Include/stm32f405xx.h | 223 ++++++------- .../Device/ST/STM32F4xx/Include/stm32f407xx.h | 237 +++++++------- .../Device/ST/STM32F4xx/Include/stm32f410cx.h | 104 +++--- .../Device/ST/STM32F4xx/Include/stm32f410rx.h | 104 +++--- .../Device/ST/STM32F4xx/Include/stm32f410tx.h | 98 +++--- .../Device/ST/STM32F4xx/Include/stm32f411xe.h | 222 ++++++------- .../Device/ST/STM32F4xx/Include/stm32f412cx.h | 264 +++++++-------- .../Device/ST/STM32F4xx/Include/stm32f412rx.h | 266 +++++++-------- .../Device/ST/STM32F4xx/Include/stm32f412vx.h | 266 +++++++-------- .../Device/ST/STM32F4xx/Include/stm32f412zx.h | 266 +++++++-------- .../Device/ST/STM32F4xx/Include/stm32f413xx.h | 292 ++++++++--------- .../Device/ST/STM32F4xx/Include/stm32f415xx.h | 231 ++++++------- .../Device/ST/STM32F4xx/Include/stm32f417xx.h | 245 +++++++------- .../Device/ST/STM32F4xx/Include/stm32f423xx.h | 294 ++++++++--------- .../Device/ST/STM32F4xx/Include/stm32f427xx.h | 256 +++++++-------- .../Device/ST/STM32F4xx/Include/stm32f429xx.h | 262 +++++++-------- .../Device/ST/STM32F4xx/Include/stm32f437xx.h | 264 +++++++-------- .../Device/ST/STM32F4xx/Include/stm32f439xx.h | 270 ++++++++-------- .../Device/ST/STM32F4xx/Include/stm32f446xx.h | 282 ++++++++-------- .../Device/ST/STM32F4xx/Include/stm32f469xx.h | 298 ++++++++--------- .../Device/ST/STM32F4xx/Include/stm32f479xx.h | 306 +++++++++--------- .../Device/ST/STM32F4xx/Include/stm32f4xx.h | 4 +- .../Device/ST/STM32F4xx/Release_Notes.html | 77 +++-- .../Source/Templates/system_stm32f4xx.c | 10 +- .../Device/ST/STM32YYxx_CMSIS_version.md | 2 +- 27 files changed, 2848 insertions(+), 2747 deletions(-) diff --git a/system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xc.h b/system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xc.h index bf0ee64bbc..5d7a281e77 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xc.h +++ b/system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xc.h @@ -129,7 +129,7 @@ typedef enum I2C3_EV_IRQn = 72, /*!< I2C3 event interrupt */ I2C3_ER_IRQn = 73, /*!< I2C3 error interrupt */ FPU_IRQn = 81, /*!< FPU global interrupt */ - SPI4_IRQn = 84 /*!< SPI4 global Interrupt */ + SPI4_IRQn = 84 /*!< SPI4 global Interrupt */ } IRQn_Type; /** @@ -1419,9 +1419,9 @@ typedef struct #define DMA_SxCR_CHSEL_Pos (25U) #define DMA_SxCR_CHSEL_Msk (0x7UL << DMA_SxCR_CHSEL_Pos) /*!< 0x0E000000 */ #define DMA_SxCR_CHSEL DMA_SxCR_CHSEL_Msk -#define DMA_SxCR_CHSEL_0 0x02000000U -#define DMA_SxCR_CHSEL_1 0x04000000U -#define DMA_SxCR_CHSEL_2 0x08000000U +#define DMA_SxCR_CHSEL_0 (0x1UL << DMA_SxCR_CHSEL_Pos) /*!< 0x02000000 */ +#define DMA_SxCR_CHSEL_1 (0x2UL << DMA_SxCR_CHSEL_Pos) /*!< 0x04000000 */ +#define DMA_SxCR_CHSEL_2 (0x4UL << DMA_SxCR_CHSEL_Pos) /*!< 0x08000000 */ #define DMA_SxCR_MBURST_Pos (23U) #define DMA_SxCR_MBURST_Msk (0x3UL << DMA_SxCR_MBURST_Pos) /*!< 0x01800000 */ #define DMA_SxCR_MBURST DMA_SxCR_MBURST_Msk @@ -2302,62 +2302,56 @@ typedef struct #define FLASH_ACR_PRFTEN_Pos (8U) -#define FLASH_ACR_PRFTEN_Msk (0x1UL << FLASH_ACR_PRFTEN_Pos) /*!< 0x00000100 */ +#define FLASH_ACR_PRFTEN_Msk (0x1UL << FLASH_ACR_PRFTEN_Pos) /*!< 0x00000100 */ #define FLASH_ACR_PRFTEN FLASH_ACR_PRFTEN_Msk #define FLASH_ACR_ICEN_Pos (9U) -#define FLASH_ACR_ICEN_Msk (0x1UL << FLASH_ACR_ICEN_Pos) /*!< 0x00000200 */ +#define FLASH_ACR_ICEN_Msk (0x1UL << FLASH_ACR_ICEN_Pos) /*!< 0x00000200 */ #define FLASH_ACR_ICEN FLASH_ACR_ICEN_Msk #define FLASH_ACR_DCEN_Pos (10U) -#define FLASH_ACR_DCEN_Msk (0x1UL << FLASH_ACR_DCEN_Pos) /*!< 0x00000400 */ +#define FLASH_ACR_DCEN_Msk (0x1UL << FLASH_ACR_DCEN_Pos) /*!< 0x00000400 */ #define FLASH_ACR_DCEN FLASH_ACR_DCEN_Msk #define FLASH_ACR_ICRST_Pos (11U) -#define FLASH_ACR_ICRST_Msk (0x1UL << FLASH_ACR_ICRST_Pos) /*!< 0x00000800 */ +#define FLASH_ACR_ICRST_Msk (0x1UL << FLASH_ACR_ICRST_Pos) /*!< 0x00000800 */ #define FLASH_ACR_ICRST FLASH_ACR_ICRST_Msk #define FLASH_ACR_DCRST_Pos (12U) -#define FLASH_ACR_DCRST_Msk (0x1UL << FLASH_ACR_DCRST_Pos) /*!< 0x00001000 */ +#define FLASH_ACR_DCRST_Msk (0x1UL << FLASH_ACR_DCRST_Pos) /*!< 0x00001000 */ #define FLASH_ACR_DCRST FLASH_ACR_DCRST_Msk -#define FLASH_ACR_BYTE0_ADDRESS_Pos (10U) -#define FLASH_ACR_BYTE0_ADDRESS_Msk (0x10008FUL << FLASH_ACR_BYTE0_ADDRESS_Pos) /*!< 0x40023C00 */ -#define FLASH_ACR_BYTE0_ADDRESS FLASH_ACR_BYTE0_ADDRESS_Msk -#define FLASH_ACR_BYTE2_ADDRESS_Pos (0U) -#define FLASH_ACR_BYTE2_ADDRESS_Msk (0x40023C03UL << FLASH_ACR_BYTE2_ADDRESS_Pos) /*!< 0x40023C03 */ -#define FLASH_ACR_BYTE2_ADDRESS FLASH_ACR_BYTE2_ADDRESS_Msk /******************* Bits definition for FLASH_SR register ******************/ #define FLASH_SR_EOP_Pos (0U) -#define FLASH_SR_EOP_Msk (0x1UL << FLASH_SR_EOP_Pos) /*!< 0x00000001 */ +#define FLASH_SR_EOP_Msk (0x1UL << FLASH_SR_EOP_Pos) /*!< 0x00000001 */ #define FLASH_SR_EOP FLASH_SR_EOP_Msk -#define FLASH_SR_SOP_Pos (1U) -#define FLASH_SR_SOP_Msk (0x1UL << FLASH_SR_SOP_Pos) /*!< 0x00000002 */ -#define FLASH_SR_SOP FLASH_SR_SOP_Msk +#define FLASH_SR_OPERR_Pos (1U) +#define FLASH_SR_OPERR_Msk (0x1UL << FLASH_SR_OPERR_Pos) /*!< 0x00000002 */ +#define FLASH_SR_OPERR FLASH_SR_OPERR_Msk #define FLASH_SR_WRPERR_Pos (4U) -#define FLASH_SR_WRPERR_Msk (0x1UL << FLASH_SR_WRPERR_Pos) /*!< 0x00000010 */ +#define FLASH_SR_WRPERR_Msk (0x1UL << FLASH_SR_WRPERR_Pos) /*!< 0x00000010 */ #define FLASH_SR_WRPERR FLASH_SR_WRPERR_Msk #define FLASH_SR_PGAERR_Pos (5U) -#define FLASH_SR_PGAERR_Msk (0x1UL << FLASH_SR_PGAERR_Pos) /*!< 0x00000020 */ +#define FLASH_SR_PGAERR_Msk (0x1UL << FLASH_SR_PGAERR_Pos) /*!< 0x00000020 */ #define FLASH_SR_PGAERR FLASH_SR_PGAERR_Msk #define FLASH_SR_PGPERR_Pos (6U) -#define FLASH_SR_PGPERR_Msk (0x1UL << FLASH_SR_PGPERR_Pos) /*!< 0x00000040 */ +#define FLASH_SR_PGPERR_Msk (0x1UL << FLASH_SR_PGPERR_Pos) /*!< 0x00000040 */ #define FLASH_SR_PGPERR FLASH_SR_PGPERR_Msk #define FLASH_SR_PGSERR_Pos (7U) -#define FLASH_SR_PGSERR_Msk (0x1UL << FLASH_SR_PGSERR_Pos) /*!< 0x00000080 */ +#define FLASH_SR_PGSERR_Msk (0x1UL << FLASH_SR_PGSERR_Pos) /*!< 0x00000080 */ #define FLASH_SR_PGSERR FLASH_SR_PGSERR_Msk #define FLASH_SR_RDERR_Pos (8U) -#define FLASH_SR_RDERR_Msk (0x1UL << FLASH_SR_RDERR_Pos) /*!< 0x00000100 */ +#define FLASH_SR_RDERR_Msk (0x1UL << FLASH_SR_RDERR_Pos) /*!< 0x00000100 */ #define FLASH_SR_RDERR FLASH_SR_RDERR_Msk #define FLASH_SR_BSY_Pos (16U) -#define FLASH_SR_BSY_Msk (0x1UL << FLASH_SR_BSY_Pos) /*!< 0x00010000 */ +#define FLASH_SR_BSY_Msk (0x1UL << FLASH_SR_BSY_Pos) /*!< 0x00010000 */ #define FLASH_SR_BSY FLASH_SR_BSY_Msk /******************* Bits definition for FLASH_CR register ******************/ #define FLASH_CR_PG_Pos (0U) -#define FLASH_CR_PG_Msk (0x1UL << FLASH_CR_PG_Pos) /*!< 0x00000001 */ +#define FLASH_CR_PG_Msk (0x1UL << FLASH_CR_PG_Pos) /*!< 0x00000001 */ #define FLASH_CR_PG FLASH_CR_PG_Msk #define FLASH_CR_SER_Pos (1U) -#define FLASH_CR_SER_Msk (0x1UL << FLASH_CR_SER_Pos) /*!< 0x00000002 */ +#define FLASH_CR_SER_Msk (0x1UL << FLASH_CR_SER_Pos) /*!< 0x00000002 */ #define FLASH_CR_SER FLASH_CR_SER_Msk #define FLASH_CR_MER_Pos (2U) -#define FLASH_CR_MER_Msk (0x1UL << FLASH_CR_MER_Pos) /*!< 0x00000004 */ +#define FLASH_CR_MER_Msk (0x1UL << FLASH_CR_MER_Pos) /*!< 0x00000004 */ #define FLASH_CR_MER FLASH_CR_MER_Msk #define FLASH_CR_SNB_Pos (3U) #define FLASH_CR_SNB_Msk (0x1FUL << FLASH_CR_SNB_Pos) /*!< 0x000000F8 */ @@ -2450,6 +2444,16 @@ typedef struct #define FLASH_OPTCR1_nWRP_9 (0x200UL << FLASH_OPTCR1_nWRP_Pos) /*!< 0x02000000 */ #define FLASH_OPTCR1_nWRP_10 (0x400UL << FLASH_OPTCR1_nWRP_Pos) /*!< 0x04000000 */ #define FLASH_OPTCR1_nWRP_11 (0x800UL << FLASH_OPTCR1_nWRP_Pos) /*!< 0x08000000 */ +/* Legacy defines */ +#define FLASH_SR_SOP_Pos FLASH_SR_OPERR_Pos +#define FLASH_SR_SOP_Msk FLASH_SR_OPERR_Msk +#define FLASH_SR_SOP FLASH_SR_OPERR +#define FLASH_ACR_BYTE0_ADDRESS_Pos (10U) +#define FLASH_ACR_BYTE0_ADDRESS_Msk (0x10008FUL << FLASH_ACR_BYTE0_ADDRESS_Pos) /*!< 0x40023C00 */ +#define FLASH_ACR_BYTE0_ADDRESS FLASH_ACR_BYTE0_ADDRESS_Msk +#define FLASH_ACR_BYTE2_ADDRESS_Pos (0U) +#define FLASH_ACR_BYTE2_ADDRESS_Msk (0x40023C03UL << FLASH_ACR_BYTE2_ADDRESS_Pos) /*!< 0x40023C03 */ +#define FLASH_ACR_BYTE2_ADDRESS FLASH_ACR_BYTE2_ADDRESS_Msk /******************************************************************************/ /* */ @@ -4234,28 +4238,28 @@ typedef struct #define RCC_APB2RSTR_USART6RST_Msk (0x1UL << RCC_APB2RSTR_USART6RST_Pos) /*!< 0x00000020 */ #define RCC_APB2RSTR_USART6RST RCC_APB2RSTR_USART6RST_Msk #define RCC_APB2RSTR_ADCRST_Pos (8U) -#define RCC_APB2RSTR_ADCRST_Msk (0x1UL << RCC_APB2RSTR_ADCRST_Pos) /*!< 0x00000100 */ +#define RCC_APB2RSTR_ADCRST_Msk (0x1UL << RCC_APB2RSTR_ADCRST_Pos) /*!< 0x00000100 */ #define RCC_APB2RSTR_ADCRST RCC_APB2RSTR_ADCRST_Msk #define RCC_APB2RSTR_SDIORST_Pos (11U) -#define RCC_APB2RSTR_SDIORST_Msk (0x1UL << RCC_APB2RSTR_SDIORST_Pos) /*!< 0x00000800 */ +#define RCC_APB2RSTR_SDIORST_Msk (0x1UL << RCC_APB2RSTR_SDIORST_Pos) /*!< 0x00000800 */ #define RCC_APB2RSTR_SDIORST RCC_APB2RSTR_SDIORST_Msk #define RCC_APB2RSTR_SPI1RST_Pos (12U) -#define RCC_APB2RSTR_SPI1RST_Msk (0x1UL << RCC_APB2RSTR_SPI1RST_Pos) /*!< 0x00001000 */ +#define RCC_APB2RSTR_SPI1RST_Msk (0x1UL << RCC_APB2RSTR_SPI1RST_Pos) /*!< 0x00001000 */ #define RCC_APB2RSTR_SPI1RST RCC_APB2RSTR_SPI1RST_Msk #define RCC_APB2RSTR_SPI4RST_Pos (13U) -#define RCC_APB2RSTR_SPI4RST_Msk (0x1UL << RCC_APB2RSTR_SPI4RST_Pos) /*!< 0x00002000 */ +#define RCC_APB2RSTR_SPI4RST_Msk (0x1UL << RCC_APB2RSTR_SPI4RST_Pos) /*!< 0x00002000 */ #define RCC_APB2RSTR_SPI4RST RCC_APB2RSTR_SPI4RST_Msk #define RCC_APB2RSTR_SYSCFGRST_Pos (14U) #define RCC_APB2RSTR_SYSCFGRST_Msk (0x1UL << RCC_APB2RSTR_SYSCFGRST_Pos) /*!< 0x00004000 */ #define RCC_APB2RSTR_SYSCFGRST RCC_APB2RSTR_SYSCFGRST_Msk #define RCC_APB2RSTR_TIM9RST_Pos (16U) -#define RCC_APB2RSTR_TIM9RST_Msk (0x1UL << RCC_APB2RSTR_TIM9RST_Pos) /*!< 0x00010000 */ +#define RCC_APB2RSTR_TIM9RST_Msk (0x1UL << RCC_APB2RSTR_TIM9RST_Pos) /*!< 0x00010000 */ #define RCC_APB2RSTR_TIM9RST RCC_APB2RSTR_TIM9RST_Msk #define RCC_APB2RSTR_TIM10RST_Pos (17U) -#define RCC_APB2RSTR_TIM10RST_Msk (0x1UL << RCC_APB2RSTR_TIM10RST_Pos) /*!< 0x00020000 */ +#define RCC_APB2RSTR_TIM10RST_Msk (0x1UL << RCC_APB2RSTR_TIM10RST_Pos) /*!< 0x00020000 */ #define RCC_APB2RSTR_TIM10RST RCC_APB2RSTR_TIM10RST_Msk #define RCC_APB2RSTR_TIM11RST_Pos (18U) -#define RCC_APB2RSTR_TIM11RST_Msk (0x1UL << RCC_APB2RSTR_TIM11RST_Pos) /*!< 0x00040000 */ +#define RCC_APB2RSTR_TIM11RST_Msk (0x1UL << RCC_APB2RSTR_TIM11RST_Pos) /*!< 0x00040000 */ #define RCC_APB2RSTR_TIM11RST RCC_APB2RSTR_TIM11RST_Msk /* Old SPI1RST bit definition, maintained for legacy purpose */ @@ -4392,7 +4396,7 @@ typedef struct #define RCC_AHB1LPENR_GPIOHLPEN_Msk (0x1UL << RCC_AHB1LPENR_GPIOHLPEN_Pos) /*!< 0x00000080 */ #define RCC_AHB1LPENR_GPIOHLPEN RCC_AHB1LPENR_GPIOHLPEN_Msk #define RCC_AHB1LPENR_CRCLPEN_Pos (12U) -#define RCC_AHB1LPENR_CRCLPEN_Msk (0x1UL << RCC_AHB1LPENR_CRCLPEN_Pos) /*!< 0x00001000 */ +#define RCC_AHB1LPENR_CRCLPEN_Msk (0x1UL << RCC_AHB1LPENR_CRCLPEN_Pos) /*!< 0x00001000 */ #define RCC_AHB1LPENR_CRCLPEN RCC_AHB1LPENR_CRCLPEN_Msk #define RCC_AHB1LPENR_FLITFLPEN_Pos (15U) #define RCC_AHB1LPENR_FLITFLPEN_Msk (0x1UL << RCC_AHB1LPENR_FLITFLPEN_Pos) /*!< 0x00008000 */ @@ -4401,10 +4405,10 @@ typedef struct #define RCC_AHB1LPENR_SRAM1LPEN_Msk (0x1UL << RCC_AHB1LPENR_SRAM1LPEN_Pos) /*!< 0x00010000 */ #define RCC_AHB1LPENR_SRAM1LPEN RCC_AHB1LPENR_SRAM1LPEN_Msk #define RCC_AHB1LPENR_DMA1LPEN_Pos (21U) -#define RCC_AHB1LPENR_DMA1LPEN_Msk (0x1UL << RCC_AHB1LPENR_DMA1LPEN_Pos) /*!< 0x00200000 */ +#define RCC_AHB1LPENR_DMA1LPEN_Msk (0x1UL << RCC_AHB1LPENR_DMA1LPEN_Pos) /*!< 0x00200000 */ #define RCC_AHB1LPENR_DMA1LPEN RCC_AHB1LPENR_DMA1LPEN_Msk #define RCC_AHB1LPENR_DMA2LPEN_Pos (22U) -#define RCC_AHB1LPENR_DMA2LPEN_Msk (0x1UL << RCC_AHB1LPENR_DMA2LPEN_Pos) /*!< 0x00400000 */ +#define RCC_AHB1LPENR_DMA2LPEN_Msk (0x1UL << RCC_AHB1LPENR_DMA2LPEN_Pos) /*!< 0x00400000 */ #define RCC_AHB1LPENR_DMA2LPEN RCC_AHB1LPENR_DMA2LPEN_Msk @@ -4441,13 +4445,13 @@ typedef struct #define RCC_APB1LPENR_USART2LPEN_Msk (0x1UL << RCC_APB1LPENR_USART2LPEN_Pos) /*!< 0x00020000 */ #define RCC_APB1LPENR_USART2LPEN RCC_APB1LPENR_USART2LPEN_Msk #define RCC_APB1LPENR_I2C1LPEN_Pos (21U) -#define RCC_APB1LPENR_I2C1LPEN_Msk (0x1UL << RCC_APB1LPENR_I2C1LPEN_Pos) /*!< 0x00200000 */ +#define RCC_APB1LPENR_I2C1LPEN_Msk (0x1UL << RCC_APB1LPENR_I2C1LPEN_Pos) /*!< 0x00200000 */ #define RCC_APB1LPENR_I2C1LPEN RCC_APB1LPENR_I2C1LPEN_Msk #define RCC_APB1LPENR_I2C2LPEN_Pos (22U) -#define RCC_APB1LPENR_I2C2LPEN_Msk (0x1UL << RCC_APB1LPENR_I2C2LPEN_Pos) /*!< 0x00400000 */ +#define RCC_APB1LPENR_I2C2LPEN_Msk (0x1UL << RCC_APB1LPENR_I2C2LPEN_Pos) /*!< 0x00400000 */ #define RCC_APB1LPENR_I2C2LPEN RCC_APB1LPENR_I2C2LPEN_Msk #define RCC_APB1LPENR_I2C3LPEN_Pos (23U) -#define RCC_APB1LPENR_I2C3LPEN_Msk (0x1UL << RCC_APB1LPENR_I2C3LPEN_Pos) /*!< 0x00800000 */ +#define RCC_APB1LPENR_I2C3LPEN_Msk (0x1UL << RCC_APB1LPENR_I2C3LPEN_Pos) /*!< 0x00800000 */ #define RCC_APB1LPENR_I2C3LPEN RCC_APB1LPENR_I2C3LPEN_Msk #define RCC_APB1LPENR_PWRLPEN_Pos (28U) #define RCC_APB1LPENR_PWRLPEN_Msk (0x1UL << RCC_APB1LPENR_PWRLPEN_Pos) /*!< 0x10000000 */ @@ -6474,8 +6478,8 @@ typedef struct /******************* Bit definition for TIM_CNT register ********************/ #define TIM_CNT_CNT_Pos (0U) -#define TIM_CNT_CNT_Msk (0xFFFFFFFFUL << TIM_CNT_CNT_Pos) /*!< 0xFFFFFFFF */ -#define TIM_CNT_CNT TIM_CNT_CNT_Msk /*!Purpose

                                                                                                                                                                                        Update History

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                                                                                                                                                                                                                            • Add support of STM32F412Cx, STM32F412Rx, STM32F412Vx and STM32F412Zx devices
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                                                                                                                                                                                                                                        • “stm32f469xx.h”, “stm32f479xx.h”
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                                                                                                                                                                                                                                            • Add support of STM32F469xx and STM32F479xx devices
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                                                                                                                                                                                                                                                • “stm32f405xx.h”, “stm32f407xx.h”, “stm32f415xx.h” and “stm32f417xx.h”
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                                                                                                                                                                                                                                                        • Add support of STM32F446xx devices
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                                                                                                                                                                                                                                                            • stm32f4xx.h
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                                                                                                                                                                                                                                                                • Add support of STM32F411xExx devices
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                                                                                                                                                                                                                                                                    • Update based on STM32Cube specification
                                                                                                                                                                                                                                                                    • This version and later has to be used only with STM32CubeF4 based development
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                                                                                                                                                                                                                                                                      • Add support of STM32F401xExx devices
                                                                                                                                                                                                                                                                      • Update startup files “startup_stm32f401xx.s” for EWARM, MDK-ARM, TrueSTUDIO and Ride toolchains: Add SPI4 interrupt handler entry in the vector table
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                                                                                                                                                                                                                                                                        • system_stm32f4xx.c : Update FMC SDRAM configuration (RBURST mode activation)
                                                                                                                                                                                                                                                                        • Update startup files “startup_stm32f427_437xx.s” and “startup_stm32f429_439xx.s” for TrueSTUDIO and Ride toolchains and maintain the old name of startup files for legacy purpose
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                                                                                                                                                                                                                                                                          • Add support of STM32F429/439xx and STM32F401xCxx devices
                                                                                                                                                                                                                                                                          • Update definition of STM32F427/437xx devices : extension of the features to include system clock up to 180MHz, dual bank Flash, reduced STOP Mode current, SAI, PCROP, SDRAM and DMA2D
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                                                                                                                                                                                                                                                                            • Official release for STM32F427x/437x devices.
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                                                                                                                                                                                                                                                                              • All source files: license disclaimer text update and add link to the License file on ST Internet.
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                                                                                                                                                                                                                                                                                • First official release for STM32F40x/41x devices
                                                                                                                                                                                                                                                                                • Add startup file for TASKING toolchain
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                                                                                                                                                                                                                                                                                  • Official version (V1.0.0) Release Candidate2 for STM32F40x/41x devices
                                                                                                                                                                                                                                                                                  • stm32f4xx.h @@ -814,7 +827,7 @@

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                                                                                                                                                                                                                                                                                    • Official version (V1.0.0) Release Candidate1 for STM32F4xx devices
                                                                                                                                                                                                                                                                                    diff --git a/system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c b/system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c index d26d96f4c3..c7071c0642 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c +++ b/system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c @@ -100,14 +100,14 @@ #if defined(VECT_TAB_SRAM) #define VECT_TAB_BASE_ADDRESS SRAM_BASE /*!< Vector Table base address field. This value must be a multiple of 0x200. */ -#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field. - This value must be a multiple of 0x200. */ #else #define VECT_TAB_BASE_ADDRESS FLASH_BASE /*!< Vector Table base address field. This value must be a multiple of 0x200. */ -#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field. - This value must be a multiple of 0x200. */ #endif /* VECT_TAB_SRAM */ +#if !defined(VECT_TAB_OFFSET) +#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table offset field. + This value must be a multiple of 0x200. */ +#endif /* VECT_TAB_OFFSET */ #endif /* USER_VECT_TAB_ADDRESS */ /******************************************************************************/ @@ -219,7 +219,7 @@ void SystemInit(void) */ void SystemCoreClockUpdate(void) { - uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2; + uint32_t tmp, pllvco, pllp, pllsource, pllm; /* Get SYSCLK source -------------------------------------------------------*/ tmp = RCC->CFGR & RCC_CFGR_SWS; diff --git a/system/Drivers/CMSIS/Device/ST/STM32YYxx_CMSIS_version.md b/system/Drivers/CMSIS/Device/ST/STM32YYxx_CMSIS_version.md index 2cfef5be44..3812dee38f 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32YYxx_CMSIS_version.md +++ b/system/Drivers/CMSIS/Device/ST/STM32YYxx_CMSIS_version.md @@ -5,7 +5,7 @@ * STM32F1: 4.3.5 * STM32F2: 2.2.6 * STM32F3: 2.3.8 - * STM32F4: 2.6.10 + * STM32F4: 2.6.11 * STM32F7: 1.2.10 * STM32G0: 1.4.4 * STM32G4: 1.2.5 From 6bc71e27359a7510dfc7c2e6b3765f29262277d6 Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Mon, 26 May 2025 17:12:08 +0200 Subject: [PATCH 44/44] system(f4): update STM32F4xx system Signed-off-by: Frederic Pillon --- system/STM32F4xx/system_stm32f4xx.c | 16 +++++++--------- 1 file changed, 7 insertions(+), 9 deletions(-) diff --git a/system/STM32F4xx/system_stm32f4xx.c b/system/STM32F4xx/system_stm32f4xx.c index b9304c559b..e8a5fe0dcb 100644 --- a/system/STM32F4xx/system_stm32f4xx.c +++ b/system/STM32F4xx/system_stm32f4xx.c @@ -22,13 +22,12 @@ ****************************************************************************** * @attention * -*

                                                                                                                                                                                                                                                                                    © Copyright (c) 2017 STMicroelectronics. - * All rights reserved.

                                                                                                                                                                                                                                                                                    + * Copyright (c) 2017 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -87,7 +86,7 @@ /* #define VECT_TAB_BASE_ADDRESS 0x08000000 */ /*!< Uncomment the following line if you need to relocate your vector Table - in Sram else user remap will be done by default in Flash. */ + in Sram else user remap will be done in Flash. */ /* #define VECT_TAB_SRAM */ #ifndef VECT_TAB_OFFSET @@ -235,7 +234,7 @@ void SystemInit(void) */ void SystemCoreClockUpdate(void) { - uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2; + uint32_t tmp, pllvco, pllp, pllsource, pllm; /* Get SYSCLK source -------------------------------------------------------*/ tmp = RCC->CFGR & RCC_CFGR_SWS; @@ -761,4 +760,3 @@ void SystemInit_ExtMemCtl(void) /** * @} */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/