add to board definition

showengineer · showengineer · commit 96be3f835c78 · 2025-05-22T14:28:35.000+02:00
diff --git a/boards.txt b/boards.txt
@@ -492,6 +492,21 @@ Nucleo_64.menu.pnum.NUCLEO_C071RB.build.st_extra_flags=-D{build.product_line} {b
 Nucleo_64.menu.pnum.NUCLEO_C071RB.openocd.target=stm32c0x
 Nucleo_64.menu.pnum.NUCLEO_C071RB.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C0xx/STM32C071.svd
 
+# NUCLEO_C092RC board
+Nucleo_64.menu.pnum.NUCLEO_C092RC=Nucleo C092RC
+Nucleo_64.menu.pnum.NUCLEO_C092RC.node="NOD_C092RC"
+Nucleo_64.menu.pnum.NUCLEO_C092RC.upload.maximum_size=262144
+Nucleo_64.menu.pnum.NUCLEO_C092RC.upload.maximum_data_size=30720
+Nucleo_64.menu.pnum.NUCLEO_C092RC.build.mcu=cortex-m0plus
+Nucleo_64.menu.pnum.NUCLEO_C092RC.build.board=NUCLEO_C092RC
+Nucleo_64.menu.pnum.NUCLEO_C092RC.build.series=STM32C0xx
+Nucleo_64.menu.pnum.NUCLEO_C092RC.build.product_line=STM32C092xx
+Nucleo_64.menu.pnum.NUCLEO_C092RC.build.variant=STM32C0xx/C092CBT_C092RBT_C092RC(I-T)
+Nucleo_64.menu.pnum.NUCLEO_C092RC.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
+Nucleo_64.menu.pnum.NUCLEO_C092RC.build.st_extra_flags=-DSTM32C092xx  {build.xSerial} -D__CORTEX_SC=0
+Nucleo_64.menu.pnum.NUCLEO_C092RC.openocd.target=stm32c0x
+Nucleo_64.menu.pnum.NUCLEO_C092RC.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C0xx/STM32C092.svd
+
 # NUCLEO_F030R8 board
 Nucleo_64.menu.pnum.NUCLEO_F030R8=Nucleo F030R8
 Nucleo_64.menu.pnum.NUCLEO_F030R8.node="NODE_F030R8,NUCLEO"
