8000 [F0] Update STM32F0xx HAL Drivers to v1.7.3 · stm32duino/Arduino_Core_STM32@5b05a47 · GitHub
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[F0] Update STM32F0xx HAL Drivers to v1.7.3
Included in STM32CubeF0 FW V1.11.0 Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
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‎system/Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h

Lines changed: 123 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -7,7 +7,7 @@
77
******************************************************************************
88
* @attention
99
*
10-
* <h2><center>&copy; Copyright (c) 2018 STMicroelectronics.
10+
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
1111
* All rights reserved.</center></h2>
1212
*
1313
* This software component is licensed by ST under BSD 3-Clause license,
@@ -460,7 +460,9 @@
460460
#define FLASH_FLAG_SNECCE_BANK2RR FLASH_FLAG_SNECCERR_BANK2
461461
#define FLASH_FLAG_DBECCE_BANK2RR FLASH_FLAG_DBECCERR_BANK2
462462
#define FLASH_FLAG_STRBER_BANK2R FLASH_FLAG_STRBERR_BANK2
463-
#endif
463+
#define FLASH_FLAG_WDW FLASH_FLAG_WBNE
464+
#define OB_WRP_SECTOR_All OB_WRP_SECTOR_ALL
465+
#endif /* STM32H7 */
464466

465467
/**
466468
* @}
@@ -623,6 +625,118 @@
623625
#define HAL_HRTIM_ExternalEventCounterDisable HAL_HRTIM_ExtEventCounterDisable
624626
#define HAL_HRTIM_ExternalEventCounterReset HAL_HRTIM_ExtEventCounterReset
625627
#endif /* STM32G4 */
628+
629+
#if defined(STM32H7)
630+
#define HRTIM_OUTPUTSET_TIMAEV1_TIMBCMP1 HRTIM_OUTPUTSET_TIMEV_1
631+
#define HRTIM_OUTPUTSET_TIMAEV2_TIMBCMP2 HRTIM_OUTPUTSET_TIMEV_2
632+
#define HRTIM_OUTPUTSET_TIMAEV3_TIMCCMP2 HRTIM_OUTPUTSET_TIMEV_3
633+
#define HRTIM_OUTPUTSET_TIMAEV4_TIMCCMP3 HRTIM_OUTPUTSET_TIMEV_4
634+
#define HRTIM_OUTPUTSET_TIMAEV5_TIMDCMP1 HRTIM_OUTPUTSET_TIMEV_5
635+
#define HRTIM_OUTPUTSET_TIMAEV6_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_6
636+
#define HRTIM_OUTPUTSET_TIMAEV7_TIMECMP3 HRTIM_OUTPUTSET_TIMEV_7
637+
#define HRTIM_OUTPUTSET_TIMAEV8_TIMECMP4 HRTIM_OUTPUTSET_TIMEV_8
638+
#define HRTIM_OUTPUTSET_TIMAEV9_TIMFCMP4 HRTIM_OUTPUTSET_TIMEV_9
639+
#define HRTIM_OUTPUTSET_TIMBEV1_TIMACMP1 HRTIM_OUTPUTSET_TIMEV_1
640+
#define HRTIM_OUTPUTSET_TIMBEV2_TIMACMP2 HRTIM_OUTPUTSET_TIMEV_2
641+
#define HRTIM_OUTPUTSET_TIMBEV3_TIMCCMP3 HRTIM_OUTPUTSET_TIMEV_3
642+
#define HRTIM_OUTPUTSET_TIMBEV4_TIMCCMP4 HRTIM_OUTPUTSET_TIMEV_4
643+
#define HRTIM_OUTPUTSET_TIMBEV5_TIMDCMP3 HRTIM_OUTPUTSET_TIMEV_5
644+
#define HRTIM_OUTPUTSET_TIMBEV6_TIMDCMP4 HRTIM_OUTPUTSET_TIMEV_6
645+
#define HRTIM_OUTPUTSET_TIMBEV7_TIMECMP1 HRTIM_OUTPUTSET_TIMEV_7
646+
#define HRTIM_OUTPUTSET_TIMBEV8_TIMECMP2 HRTIM_OUTPUTSET_TIMEV_8
647+
#define HRTIM_OUTPUTSET_TIMBEV9_TIMFCMP3 HRTIM_OUTPUTSET_TIMEV_9
648+
#define HRTIM_OUTPUTSET_TIMCEV1_TIMACMP1 HRTIM_OUTPUTSET_TIMEV_1
649+
#define HRTIM_OUTPUTSET_TIMCEV2_TIMACMP2 HRTIM_OUTPUTSET_TIMEV_2
650+
#define HRTIM_OUTPUTSET_TIMCEV3_TIMBCMP2 HRTIM_OUTPUTSET_TIMEV_3
651+
#define HRTIM_OUTPUTSET_TIMCEV4_TIMBCMP3 HRTIM_OUTPUTSET_TIMEV_4
652+
#define HRTIM_OUTPUTSET_TIMCEV5_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_5
653+
#define HRTIM_OUTPUTSET_TIMCEV6_TIMDCMP4 HRTIM_OUTPUTSET_TIMEV_6
654+
#define HRTIM_OUTPUTSET_TIMCEV7_TIMECMP3 HRTIM_OUTPUTSET_TIMEV_7
655+
#define HRTIM_OUTPUTSET_TIMCEV8_TIMECMP4 HRTIM_OUTPUTSET_TIMEV_8
656+
#define HRTIM_OUTPUTSET_TIMCEV9_TIMFCMP2 HRTIM_OUTPUTSET_TIMEV_9
657+
#define HRTIM_OUTPUTSET_TIMDEV1_TIMACMP1 HRTIM_OUTPUTSET_TIMEV_1
658+
#define HRTIM_OUTPUTSET_TIMDEV2_TIMACMP4 HRTIM_OUTPUTSET_TIMEV_2
659+
#define HRTIM_OUTPUTSET_TIMDEV3_TIMBCMP2 HRTIM_OUTPUTSET_TIMEV_3
660+
#define HRTIM_OUTPUTSET_TIMDEV4_TIMBCMP4 HRTIM_OUTPUTSET_TIMEV_4
661+
#define HRTIM_OUTPUTSET_TIMDEV5_TIMCCMP4 HRTIM_OUTPUTSET_TIMEV_5
662+
#define HRTIM_OUTPUTSET_TIMDEV6_TIMECMP1 HRTIM_OUTPUTSET_TIMEV_6
663+
#define HRTIM_OUTPUTSET_TIMDEV7_TIMECMP4 HRTIM_OUTPUTSET_TIMEV_7
664+
#define HRTIM_OUTPUTSET_TIMDEV8_TIMFCMP1 HRTIM_OUTPUTSET_TIMEV_8
665+
#define HRTIM_OUTPUTSET_TIMDEV9_TIMFCMP3 HRTIM_OUTPUTSET_TIMEV_9
666+
#define HRTIM_OUTPUTSET_TIMEEV1_TIMACMP4 HRTIM_OUTPUTSET_TIMEV_1
667+
#define HRTIM_OUTPUTSET_TIMEEV2_TIMBCMP3 HRTIM_OUTPUTSET_TIMEV_2
668+
#define HRTIM_OUTPUTSET_TIMEEV3_TIMBCMP4 HRTIM_OUTPUTSET_TIMEV_3
669+
#define HRTIM_OUTPUTSET_TIMEEV4_TIMCCMP1 HRTIM_OUTPUTSET_TIMEV_4
670+
#define HRTIM_OUTPUTSET_TIMEEV5_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_5
671+
#define HRTIM_OUTPUTSET_TIMEEV6_TIMDCMP1 HRTIM_OUTPUTSET_TIMEV_6
672+
#define HRTIM_OUTPUTSET_TIMEEV7_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_7
673+
#define HRTIM_OUTPUTSET_TIMEEV8_TIMFCMP3 HRTIM_OUTPUTSET_TIMEV_8
674+
#define HRTIM_OUTPUTSET_TIMEEV9_TIMFCMP4 HRTIM_OUTPUTSET_TIMEV_9
675+
#define HRTIM_OUTPUTSET_TIMFEV1_TIMACMP3 HRTIM_OUTPUTSET_TIMEV_1
676+
#define HRTIM_OUTPUTSET_TIMFEV2_TIMBCMP1 HRTIM_OUTPUTSET_TIMEV_2
677+
#define HRTIM_OUTPUTSET_TIMFEV3_TIMBCMP4 HRTIM_OUTPUTSET_TIMEV_3
678+
#define HRTIM_OUTPUTSET_TIMFEV4_TIMCCMP1 HRTIM_OUTPUTSET_TIMEV_4
679+
#define HRTIM_OUTPUTSET_TIMFEV5_TIMCCMP4 HRTIM_OUTPUTSET_TIMEV_5
680+
#define HRTIM_OUTPUTSET_TIMFEV6_TIMDCMP3 HRTIM_OUTPUTSET_TIMEV_6
681+
#define HRTIM_OUTPUTSET_TIMFEV7_TIMDCMP4 HRTIM_OUTPUTSET_TIMEV_7
682+
#define HRTIM_OUTPUTSET_TIMFEV8_TIMECMP2 HRTIM_OUTPUTSET_TIMEV_8
683+
#define HRTIM_OUTPUTSET_TIMFEV9_TIMECMP3 HRTIM_OUTPUTSET_TIMEV_9
684+
685+
#define HRTIM_OUTPUTRESET_TIMAEV1_TIMBCMP1 HRTIM_OUTPUTSET_TIMEV_1
686+
#define HRTIM_OUTPUTRESET_TIMAEV2_TIMBCMP2 HRTIM_OUTPUTSET_TIMEV_2
687+
#define HRTIM_OUTPUTRESET_TIMAEV3_TIMCCMP2 HRTIM_OUTPUTSET_TIMEV_3
688+
#define HRTIM_OUTPUTRESET_TIMAEV4_TIMCCMP3 HRTIM_OUTPUTSET_TIMEV_4
689+
#define HRTIM_OUTPUTRESET_TIMAEV5_TIMDCMP1 HRTIM_OUTPUTSET_TIMEV_5
690+
#define HRTIM_OUTPUTRESET_TIMAEV6_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_6
691+
#define HRTIM_OUTPUTRESET_TIMAEV7_TIMECMP3 HRTIM_OUTPUTSET_TIMEV_7
692+
#define HRTIM_OUTPUTRESET_TIMAEV8_TIMECMP4 HRTIM_OUTPUTSET_TIMEV_8
693+
#define HRTIM_OUTPUTRESET_TIMAEV9_TIMFCMP4 HRTIM_OUTPUTSET_TIMEV_9
694+
#define HRTIM_OUTPUTRESET_TIMBEV1_TIMACMP1 HRTIM_OUTPUTSET_TIMEV_1
695+
#define HRTIM_OUTPUTRESET_TIMBEV2_TIMACMP2 HRTIM_OUTPUTSET_TIMEV_2
696+
#define HRTIM_OUTPUTRESET_TIMBEV3_TIMCCMP3 HRTIM_OUTPUTSET_TIMEV_3
697+
#define HRTIM_OUTPUTRESET_TIMBEV4_TIMCCMP4 HRTIM_OUTPUTSET_TIMEV_4
698+
#define HRTIM_OUTPUTRESET_TIMBEV5_TIMDCMP3 HRTIM_OUTPUTSET_TIMEV_5
699+
#define HRTIM_OUTPUTRESET_TIMBEV6_TIMDCMP4 HRTIM_OUTPUTSET_TIMEV_6
700+
#define HRTIM_OUTPUTRESET_TIMBEV7_TIMECMP1 HRTIM_OUTPUTSET_TIMEV_7
701+
#define HRTIM_OUTPUTRESET_TIMBEV8_TIMECMP2 HRTIM_OUTPUTSET_TIMEV_8
702+
#define HRTIM_OUTPUTRESET_TIMBEV9_TIMFCMP3 HRTIM_OUTPUTSET_TIMEV_9
703+
#define HRTIM_OUTPUTRESET_TIMCEV1_TIMACMP1 HRTIM_OUTPUTSET_TIMEV_1
704+
#define HRTIM_OUTPUTRESET_TIMCEV2_TIMACMP2 HRTIM_OUTPUTSET_TIMEV_2
705+
#define HRTIM_OUTPUTRESET_TIMCEV3_TIMBCMP2 HRTIM_OUTPUTSET_TIMEV_3
706+
#define HRTIM_OUTPUTRESET_TIMCEV4_TIMBCMP3 HRTIM_OUTPUTSET_TIMEV_4
707+
#define HRTIM_OUTPUTRESET_TIMCEV5_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_5
708+
#define HRTIM_OUTPUTRESET_TIMCEV6_TIMDCMP4 HRTIM_OUTPUTSET_TIME 10000 V_6
709+
#define HRTIM_OUTPUTRESET_TIMCEV7_TIMECMP3 HRTIM_OUTPUTSET_TIMEV_7
710+
#define HRTIM_OUTPUTRESET_TIMCEV8_TIMECMP4 HRTIM_OUTPUTSET_TIMEV_8
711+
#define HRTIM_OUTPUTRESET_TIMCEV9_TIMFCMP2 HRTIM_OUTPUTSET_TIMEV_9
712+
#define HRTIM_OUTPUTRESET_TIMDEV1_TIMACMP1 HRTIM_OUTPUTSET_TIMEV_1
713+
#define HRTIM_OUTPUTRESET_TIMDEV2_TIMACMP4 HRTIM_OUTPUTSET_TIMEV_2
714+
#define HRTIM_OUTPUTRESET_TIMDEV3_TIMBCMP2 HRTIM_OUTPUTSET_TIMEV_3
715+
#define HRTIM_OUTPUTRESET_TIMDEV4_TIMBCMP4 HRTIM_OUTPUTSET_TIMEV_4
716+
#define HRTIM_OUTPUTRESET_TIMDEV5_TIMCCMP4 HRTIM_OUTPUTSET_TIMEV_5
717+
#define HRTIM_OUTPUTRESET_TIMDEV6_TIMECMP1 HRTIM_OUTPUTSET_TIMEV_6
718+
#define HRTIM_OUTPUTRESET_TIMDEV7_TIMECMP4 HRTIM_OUTPUTSET_TIMEV_7
719+
#define HRTIM_OUTPUTRESET_TIMDEV8_TIMFCMP1 HRTIM_OUTPUTSET_TIMEV_8
720+
#define HRTIM_OUTPUTRESET_TIMDEV9_TIMFCMP3 HRTIM_OUTPUTSET_TIMEV_9
721+
#define HRTIM_OUTPUTRESET_TIMEEV1_TIMACMP4 HRTIM_OUTPUTSET_TIMEV_1
722+
#define HRTIM_OUTPUTRESET_TIMEEV2_TIMBCMP3 HRTIM_OUTPUTSET_TIMEV_2
723+
#define HRTIM_OUTPUTRESET_TIMEEV3_TIMBCMP4 HRTIM_OUTPUTSET_TIMEV_3
724+
#define HRTIM_OUTPUTRESET_TIMEEV4_TIMCCMP1 HRTIM_OUTPUTSET_TIMEV_4
725+
#define HRTIM_OUTPUTRESET_TIMEEV5_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_5
726+
#define HRTIM_OUTPUTRESET_TIMEEV6_TIMDCMP1 HRTIM_OUTPUTSET_TIMEV_6
727+
#define HRTIM_OUTPUTRESET_TIMEEV7_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_7
728+
#define HRTIM_OUTPUTRESET_TIMEEV8_TIMFCMP3 HRTIM_OUTPUTSET_TIMEV_8
729+
#define HRTIM_OUTPUTRESET_TIMEEV9_TIMFCMP4 HRTIM_OUTPUTSET_TIMEV_9
730+
#define HRTIM_OUTPUTRESET_TIMFEV1_TIMACMP3 HRTIM_OUTPUTSET_TIMEV_1
731+
#define HRTIM_OUTPUTRESET_TIMFEV2_TIMBCMP1 HRTIM_OUTPUTSET_TIMEV_2
732+
#define HRTIM_OUTPUTRESET_TIMFEV3_TIMBCMP4 HRTIM_OUTPUTSET_TIMEV_3
733+
#define HRTIM_OUTPUTRESET_TIMFEV4_TIMCCMP1 HRTIM_OUTPUTSET_TIMEV_4
734+
#define HRTIM_OUTPUTRESET_TIMFEV5_TIMCCMP4 HRTIM_OUTPUTSET_TIMEV_5
735+
#define HRTIM_OUTPUTRESET_TIMFEV6_TIMDCMP3 HRTIM_OUTPUTSET_TIMEV_6
736+
#define HRTIM_OUTPUTRESET_TIMFEV7_TIMDCMP4 HRTIM_OUTPUTSET_TIMEV_7
737+
#define HRTIM_OUTPUTRESET_TIMFEV8_TIMECMP2 HRTIM_OUTPUTSET_TIMEV_8
738+
#define HRTIM_OUTPUTRESET_TIMFEV9_TIMECMP3 HRTIM_OUTPUTSET_TIMEV_9
739+
#endif /* STM32H7 */
626740
/**
627741
* @}
628742
*/
@@ -1297,16 +1411,18 @@
12971411

12981412
#define HAL_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus, cmd) (((cmd)==ENABLE)? HAL_I2CEx_EnableFastModePlus(SYSCFG_I2CFastModePlus): HAL_I2CEx_DisableFastModePlus(SYSCFG_I2CFastModePlus))
12991413

1300-
#if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4)
1414+
#if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F0) || defined(STM32F1) || defined(STM32F2) || defined(STM32F3) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4) || defined(STM32L5) || defined(STM32G4)
13011415
#define HAL_I2C_Master_Sequential_Transmit_IT HAL_I2C_Master_Seq_Transmit_IT
13021416
#define HAL_I2C_Master_Sequential_Receive_IT HAL_I2C_Master_Seq_Receive_IT
13031417
#define HAL_I2C_Slave_Sequential_Transmit_IT HAL_I2C_Slave_Seq_Transmit_IT
13041418
#define HAL_I2C_Slave_Sequential_Receive_IT HAL_I2C_Slave_Seq_Receive_IT
1419+
#endif /* STM32H7 || STM32WB || STM32G0 || STM32F0 || STM32F1 || STM32F2 || STM32F3 || STM32F4 || STM32F7 || STM32L0 || STM32L4 || STM32L5 || STM32G4 */
1420+
#if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4) || defined(STM32L5) || defined(STM32G4)
13051421
#define HAL_I2C_Master_Sequential_Transmit_DMA HAL_I2C_Master_Seq_Transmit_DMA
13061422
#define HAL_I2C_Master_Sequential_Receive_DMA HAL_I2C_Master_Seq_Receive_DMA
13071423
#define HAL_I2C_Slave_Sequential_Transmit_DMA HAL_I2C_Slave_Seq_Transmit_DMA
13081424
#define HAL_I2C_Slave_Sequential_Receive_DMA HAL_I2C_Slave_Seq_Receive_DMA
1309-
#endif /* STM32H7 || STM32WB || STM32G0 || STM32F4 || STM32F7 || STM32L0 || STM32L4 */
1425+
#endif /* STM32H7 || STM32WB || STM32G0 || STM32F4 || STM32F7 || STM32L0 || STM32L4 || STM32L5 || STM32G4 */
13101426

13111427
#if defined(STM32F4)
13121428
#define HAL_FMPI2C_Master_Sequential_Transmit_IT HAL_FMPI2C_Master_Seq_Transmit_IT
@@ -1397,14 +1513,14 @@
13971513
#define HAL_TIM_DMAError TIM_DMAError
13981514
#define HAL_TIM_DMACaptureCplt TIM_DMACaptureCplt
13991515
#define HAL_TIMEx_DMACommutationCplt TIMEx_DMACommutationCplt
1400-
#if defined(STM32H7) || defined(STM32G0) || defined(STM32F7) || defined(STM32F4) || defined(STM32L0) || defined(STM32L4)
1516+
#if defined(STM32H7) || defined(STM32G0) || defined(STM32F0) || defined(STM32F1) || defined(STM32F2) || defined(STM32F3) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4)
14011517
#define HAL_TIM_SlaveConfigSynchronization HAL_TIM_SlaveConfigSynchro
14021518
#define HAL_TIM_SlaveConfigSynchronization_IT HAL_TIM_SlaveConfigSynchro_IT
14031519
#define HAL_TIMEx_CommutationCallback HAL_TIMEx_CommutCallback
14041520
#define HAL_TIMEx_ConfigCommutationEvent HAL_TIMEx_ConfigCommutEvent
14051521
#define HAL_TIMEx_ConfigCommutationEvent_IT HAL_TIMEx_ConfigCommutEvent_IT
14061522
#define HAL_TIMEx_ConfigCommutationEvent_DMA HAL_TIMEx_ConfigCommutEvent_DMA
1407-
#endif /* STM32H7 || STM32G0 || STM32F7 || STM32F4 || STM32L0 */
1523+
#endif /* STM32H7 || STM32G0 || STM32F0 || STM32F1 || STM32F2 || STM32F3 || STM32F4 || STM32F7 || STM32L0 */
14081524
/**
14091525
* @}
14101526
*/
@@ -3246,7 +3362,7 @@
32463362
#define SDIO_IRQHandler SDMMC1_IRQHandler
32473363
#endif
32483364

3249-
#if defined(STM32F7) || defined(STM32F4) || defined(STM32F2) || defined(STM32L4)
3365+
#if defined(STM32F7) || defined(STM32F4) || defined(STM32F2) || defined(STM32L4) || defined(STM32H7)
32503366
#define HAL_SD_CardCIDTypedef HAL_SD_CardCIDTypeDef
32513367
#define HAL_SD_CardCSDTypedef HAL_SD_CardCSDTypeDef
32523368
#define HAL_SD_CardStatusTypedef HAL_SD_CardStatusTypeDef

‎system/Drivers/STM32F0xx_HAL_Driver/Inc/stm32_assert_template.h

Lines changed: 8 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -8,29 +8,13 @@
88
******************************************************************************
99
* @attention
1010
*
11-
* <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
11+
* <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
12+
* All rights reserved.</center></h2>
1213
*
13-
* Redistribution and use in source and binary forms, with or without modification,
14-
* are permitted provided that the following conditions are met:
15-
* 1. Redistributions of source code must retain the above copyright notice,
16-
* this list of conditions and the following disclaimer.
17-
* 2. Redistributions in binary form must reproduce the above copyright notice,
18-
* this list of conditions and the following disclaimer in the documentation
19-
* and/or other materials provided with the distribution.
20-
* 3. Neither the name of STMicroelectronics nor the names of its contributors
21-
* may be used to endorse or promote products derived from this software
22-
* without specific prior written permission.
23-
*
24-
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25-
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26-
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27-
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28-
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29-
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30-
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31-
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32-
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33-
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
14+
* This software component is licensed by ST under BSD 3-Clause license,
15+
* the "License"; You may not use this file except in compliance with the
16+
* License. You may obtain a copy of the License at:
17+
* opensource.org/licenses/BSD-3-Clause
3418
*
3519
******************************************************************************
3620
*/
@@ -56,9 +40,9 @@
5640
* If expr is true, it returns no value.
5741
* @retval None
5842
*/
59-
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((char *)__FILE__, __LINE__))
43+
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
6044
/* Exported functions ------------------------------------------------------- */
61-
void assert_failed(char* file, uint32_t line);
45+
void assert_failed(uint8_t* file, uint32_t line);
6246
#else
6347
#define assert_param(expr) ((void)0U)
6448
#endif /* USE_FULL_ASSERT */

‎system/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h

Lines changed: 65 additions & 42 deletions
Original file line numberDiff line numberDiff line change
@@ -7,32 +7,16 @@
77
******************************************************************************
88
* @attention
99
*
10-
* <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
10+
* <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
11+
* All rights reserved.</center></h2>
1112
*
12-
* Redistribution and use in source and binary forms, with or without modification,
13-
* are permitted provided that the following conditions are met:
14-
* 1. Redistributions of source code must retain the above copyright notice,
15-
* this list of conditions and the following disclaimer.
16-
* 2. Redistributions in binary form must reproduce the above copyright notice,
17-
* this list of conditions and the following disclaimer in the documentation
18-
* and/or other materials provided with the distribution.
19-
* 3. Neither the name of STMicroelectronics nor the names of its contributors
20-
* may be used to endorse or promote products derived from this software
21-
* without specific prior written permission.
22-
*
23-
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24-
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25-
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26-
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
27-
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28-
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
29-
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
30-
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
31-
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
32-
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
13+
* This software component is licensed by ST under BSD 3-Clause license,
14+
* the "License"; You may not use this file except in compliance with the
15+
* License. You may obtain a copy of the License at:
16+
* opensource.org/licenses/BSD-3-Clause
3317
*
3418
******************************************************************************
35-
*/
19+
*/
3620

3721
/* Define to prevent recursive inclusion -------------------------------------*/
3822
#ifndef __STM32F0xx_HAL_H
@@ -89,7 +73,22 @@
8973
/** @defgroup HAL_Exported_Constants HAL Exported Constants
9074
* @{
9175
*/
92-
76+
77+
/** @defgroup HAL_TICK_FREQ Tick Frequency
78+
* @{
79+
*/
80+
typedef enum
81+
{
82+
HAL_TICK_FREQ_10HZ = 100U,
83+
HAL_TICK_FREQ_100HZ = 10U,
84+
HAL_TICK_FREQ_1KHZ = 1U,
85+
HAL_TICK_FREQ_DEFAULT = HAL_TICK_FREQ_1KHZ
86+
} HAL_TickFreqTypeDef;
87+
88+
/**
89+
* @}
90+
*/
91+
9392
#if defined(SYSCFG_CFGR1_PA11_PA12_RMP)
9493
/** @defgroup HAL_Pin_remapping HAL Pin remapping
9594
* @{
@@ -496,8 +495,18 @@
496495

497496
/**
498497
* @}
499-
*/
500-
498+
*/
499+
500+
/** @defgroup HAL_Private_Macros HAL Private Macros
501+
* @{
502+
*/
503+
#define IS_TICKFREQ(FREQ) (((FREQ) == HAL_TICK_FREQ_10HZ) || \
504+
((FREQ) == HAL_TICK_FREQ_100HZ) || \
505+
((FREQ) == HAL_TICK_FREQ_1KHZ))
506+
/**
507+
* @}
508+
*/
509+
501510
/* Exported functions --------------------------------------------------------*/
502511

503512
/** @addtogroup HAL_Exported_Functions
@@ -515,28 +524,42 @@ void HAL_MspDeInit(void);
515524
HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority);
516525
/**
517526
* @}
518-
*/
527+
*/
528+
529+
/* Exported variables ---------------------------------------------------------*/
530+
/** @addtogroup HAL_Exported_Variables
531+
* @{
532+
*/
533+
extern __IO uint32_t uwTick;
534+
extern uint32_t uwTickPrio;
535+
extern HAL_TickFreqTypeDef uwTickFreq;
536+
/**
537+
* @}
538+
*/
519539

520540
/** @addtogroup HAL_Exported_Functions_Group2
521541
* @{
522542
*/
523543

524544
/* Peripheral Control functions ************************************************/
525-
void HAL_IncTick(void);
526-
void HAL_Delay(__IO uint32_t Delay);
527-
uint32_t HAL_GetTick(void);
528-
void HAL_SuspendTick(void);
529-
void HAL_ResumeTick(void);
530-
uint32_t HAL_GetHalVersion(void);
531-
uint32_t HAL_GetREVID(void);
532-
uint32_t HAL_GetDEVID(void);
533-
uint32_t HAL_GetUIDw0(void);
534-
uint32_t HAL_GetUIDw1(void);
535-
uint32_t HAL_GetUIDw2(void);
536-
void HAL_DBGMCU_EnableDBGStopMode(void);
537-
void HAL_DBGMCU_DisableDBGStopMode(void);
538-
void HAL_DBGMCU_EnableDBGStandbyMode(void);
539-
void HAL_DBGMCU_DisableDBGStandbyMode(void);
545+
void HAL_IncTick(void);
546+
void HAL_Delay(uint32_t Delay);
547+
uint32_t HAL_GetTick(void);
548+
uint32_t HAL_GetTickPrio(void);
549+
HAL_StatusTypeDef HAL_SetTickFreq(HAL_TickFreqTypeDef Freq);
550+
HAL_TickFreqTypeDef HAL_GetTickFreq(void);
551+
void HAL_SuspendTick(void);
552+
void HAL_ResumeTick(void);
553+
uint32_t HAL_GetHalVersion(void);
554+
uint32_t HAL_GetREVID(void);
555+
uint32_t HAL_GetDEVID(void);
556+
uint32_t HAL_GetUIDw0(void);
557+
uint32_t HAL_GetUIDw1(void);
558+
uint32_t HAL_GetUIDw2(void);
559+
void HAL_DBGMCU_EnableDBGStopMode(void);
560+
void HAL_DBGMCU_DisableDBGStopMode(void);
561+
void HAL_DBGMCU_EnableDBGStandbyMode(void);
562+
void HAL_DBGMCU_DisableDBGStandbyMode(void);
540563
/**
541564
* @}
542565
*/

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