Fix uart TX flushing (espressif#2029)

bertmelis · me-no-dev · commit 44ca2ee97650 · 2018-11-19T17:04:05.000+01:00
wait for FSM to return idle
diff --git a/cores/esp32/esp32-hal-uart.c b/cores/esp32/esp32-hal-uart.c
@@ -333,7 +333,7 @@ void uartFlush(uart_t* uart)
     }
 
     UART_MUTEX_LOCK();
-    while(uart->dev->status.txfifo_cnt);
+    while(uart->dev->status.txfifo_cnt || uart->dev->status.st_utx_out);
 
     //Due to hardware issue, we can not use fifo_rst to reset uart fifo.
     //See description about UART_TXFIFO_RST and UART_RXFIFO_RST in <<esp32_technical_reference_manual>> v2.6 or later.

Original file line number	Diff line number	Diff line change
`@@ -333,7 +333,7 @@ void uartFlush(uart_t* uart)`
`333`	`333`	`}`
`334`	`334`
`335`	`335`	`UART_MUTEX_LOCK();`
`336`		`- while(uart->dev->status.txfifo_cnt);`
	`336`	`+ while(uart->dev->status.txfifo_cnt \|\| uart->dev->status.st_utx_out);`
`337`	`337`
`338`	`338`	`//Due to hardware issue, we can not use fifo_rst to reset uart fifo.`
`339`	`339`	`//See description about UART_TXFIFO_RST and UART_RXFIFO_RST in <<esp32_technical_reference_manual>> v2.6 or later.`