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| 1 | +/* |
| 2 | + * This file is part of the Micro Python project, http://micropython.org/ |
| 3 | + * |
| 4 | + * The MIT License (MIT) |
| 5 | + * |
| 6 | + * Copyright (c) 2013, 2014 Fabian Vogt |
| 7 | + * |
| 8 | + * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 9 | + * of this software and associated documentation files (the "Software"), to deal |
| 10 | + * in the Software without restriction, including without limitation the rights |
| 11 | + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
| 12 | + * copies of the Software, and to permit persons to whom the Software is |
| 13 | + * furnished to do so, subject to the following conditions: |
| 14 | + * |
| 15 | + * The above copyright notice and this permission notice shall be included in |
| 16 | + * all copies or substantial portions of the Software. |
| 17 | + * |
| 18 | + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 19 | + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 20 | + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
| 21 | + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 22 | + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 23 | + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 24 | + * THE SOFTWARE. |
| 25 | + */ |
| 26 | + |
| 27 | +#include <stdio.h> |
| 28 | +#include <assert.h> |
| 29 | +#include <string.h> |
| 30 | + |
| 31 | +#include "mpconfig.h" |
| 32 | +#include "misc.h" |
| 33 | +#include "asmarm.h" |
| 34 | + |
| 35 | +// wrapper around everything in this file |
| 36 | +#if MICROPY_EMIT_ARM |
| 37 | + |
| 38 | +#define SIGNED_FIT24(x) (((x) & 0xff800000) == 0) || (((x) & 0xff000000) == 0xff000000) |
| 39 | + |
| 40 | +struct _asm_arm_t { |
| 41 | + uint pass; |
| 42 | + uint code_offset; |
| 43 | + uint code_size; |
| 44 | + byte *code_base; |
| 45 | + byte dummy_data[4]; |
| 46 | + |
| 47 | + uint max_num_labels; |
| 48 | + int *label_offsets; |
| 49 | + int num_locals; |
| 50 | + uint push_reglist; |
| 51 | + uint stack_adjust; |
| 52 | +}; |
| 53 | + |
| 54 | +asm_arm_t *asm_arm_new(uint max_num_labels) { |
| 55 | + asm_arm_t *as; |
| 56 | + |
| 57 | + as = m_new0(asm_arm_t, 1); |
| 58 | + as->max_num_labels = max_num_labels; |
| 59 | + as->label_offsets = m_new(int, max_num_labels); |
| 60 | + |
| 61 | + return as; |
| 62 | +} |
| 63 | + |
| 64 | +void asm_arm_free(asm_arm_t *as, bool free_code) { |
| 65 | + if (free_code) { |
| 66 | + m_del(byte, as->code_base, as->code_size); |
| 67 | + } |
| 68 | + |
| 69 | + m_del_obj(asm_arm_t, as); |
| 70 | +} |
| 71 | + |
| 72 | +void asm_arm_start_pass(asm_arm_t *as, uint pass) { |
| 73 | + as->pass = pass; |
| 74 | + as->code_offset = 0; |
| 75 | + if (pass == ASM_ARM_PASS_COMPUTE) { |
| 76 | + memset(as->label_offsets, -1, as->max_num_labels * sizeof(int)); |
| 77 | + } |
| 78 | +} |
| 79 | + |
| 80 | +void asm_arm_end_pass(asm_arm_t *as) { |
| 81 | + if (as->pass == ASM_ARM_PASS_COMPUTE) { |
| 82 | + // calculate size of code in bytes |
| 83 | + as->code_size = as->code_offset; |
| 84 | + as->code_base = m_new(byte, as->code_size); |
| 85 | + } |
| 86 | +} |
| 87 | + |
| 88 | +// all functions must go through this one to emit bytes |
| 89 | +// if as->pass < ASM_ARM_PASS_EMIT, then this function only returns a buffer of 4 bytes length |
| 90 | +STATIC byte *asm_arm_get_cur_to_write_bytes(asm_arm_t *as, int num_bytes_to_write) { |
| 91 | + if (as->pass < ASM_ARM_PASS_EMIT) { |
| 92 | + as->code_offset += num_bytes_to_write; |
| 93 | + return as->dummy_data; |
| 94 | + } else { |
| 95 | + assert(as->code_offset + num_bytes_to_write <= as->code_size); |
| 96 | + byte *c = as->code_base + as->code_offset; |
| 97 | + as->code_offset += num_bytes_to_write; |
| 98 | + return c; |
| 99 | + } |
| 100 | +} |
| 101 | + |
| 102 | +uint asm_arm_get_code_size(asm_arm_t *as) { |
| 103 | + return as->code_size; |
| 104 | +} |
| 105 | + |
| 106 | +void *asm_arm_get_code(asm_arm_t *as) { |
| 107 | + return as->code_base; |
| 108 | +} |
| 109 | + |
| 110 | +// Insert word into instruction flow |
| 111 | +STATIC void emit(asm_arm_t *as, uint op) { |
| 112 | + *(uint*)asm_arm_get_cur_to_write_bytes(as, 4) = op; |
| 113 | +} |
| 114 | + |
| 115 | +// Insert word into instruction flow, add "ALWAYS" condition code |
| 116 | +STATIC void emit_al(asm_arm_t *as, uint op) { |
| 117 | + emit(as, op | ARM_CC_AL); |
| 118 | +} |
| 119 | + |
| 120 | +// Basic instructions without condition code |
| 121 | +STATIC uint asm_arm_op_push(uint reglist) { |
| 122 | + // stmfd sp!, {reglist} |
| 123 | + return 0x92d0000 | (reglist & 0xFFFF); |
| 124 | +} |
| 125 | + |
| 126 | +STATIC uint asm_arm_op_pop(uint reglist) { |
| 127 | + // ldmfd sp!, {reglist} |
| 128 | + return 0x8bd0000 | (reglist & 0xFFFF); |
| 129 | +} |
| 130 | + |
| 131 | +STATIC uint asm_arm_op_mov_reg(uint rd, uint rn) { |
| 132 | + // mov rd, rn |
| 133 | + return 0x1a00000 | (rd << 12) | rn; |
| 134 | +} |
| 135 | + |
| 136 | +STATIC uint asm_arm_op_mov_imm(uint rd, uint imm) { |
| 137 | + // mov rd, #imm |
| 138 | + return 0x3a00000 | (rd << 12) | imm; |
| 139 | +} |
| 140 | + |
| 141 | +STATIC uint asm_arm_op_mvn_imm(uint rd, uint imm) { |
| 142 | + // mvn rd, #imm |
| 143 | + return 0x3e00000 | (rd << 12) | imm; |
| 144 | +} |
| 145 | + |
| 146 | +STATIC uint asm_arm_op_add_imm(uint rd, uint rn, uint imm) { |
| 147 | + // add rd, rn, #imm |
| 148 | + return 0x2800000 | (rn << 16) | (rd << 12) | (imm & 0xFF); |
| 149 | +} |
| 150 | + |
| 151 | +STATIC uint asm_arm_op_add_reg(uint rd, uint rn, uint rm) { |
| 152 | + // add rd, rn, rm |
| 153 | + return 0x0800000 | (rn << 16) | (rd << 12) | rm; |
| 154 | +} |
| 155 | + |
| 156 | +STATIC uint asm_arm_op_sub_imm(uint rd, uint rn, uint imm) { |
| 157 | + // sub rd, rn, #imm |
| 158 | + return 0x2400000 | (rn << 16) | (rd << 12) | (imm & 0xFF); |
| 159 | +} |
| 160 | + |
| 161 | +void asm_arm_bkpt(asm_arm_t *as) { |
| 162 | + // bkpt #0 |
| 163 | + emit_al(as, 0x1200070); |
| 164 | +} |
| 165 | + |
| 166 | +// locals: |
| 167 | +// - stored on the stack in ascending order |
| 168 | +// - numbered 0 through as->num_locals-1 |
| 169 | +// - SP points to first local |
| 170 | +// |
| 171 | +// | SP |
| 172 | +// v |
| 173 | +// l0 l1 l2 ... l(n-1) |
| 174 | +// ^ ^ |
| 175 | +// | low address | high address in RAM |
| 176 | + |
| 177 | +void asm_arm_entry(asm_arm_t *as, int num_locals) { |
| 178 | + |
| 179 | + if (num_locals < 0) { |
| 180 | + num_locals = 0; |
| 181 | + } |
| 182 | + |
| 183 | + as->stack_adjust = 0; |
| 184 | + as->num_locals = num_locals; |
| 185 | + as->push_reglist = 1 << REG_R1 | 1 << REG_R2 | 1 << REG_R3 | 1 << REG_R4 |
| 186 | + | 1 << REG_R5 | 1 << REG_R6 | 1 << REG_R7 | 1 << REG_R8; |
| 187 | + |
| 188 | + // Only adjust the stack if there are more locals than usable registers |
| 189 | + if(num_locals > 3) { |
| 190 | + as->stack_adjust = num_locals * 4; |
| 191 | + // Align stack to 8 bytes |
| 192 | + if(as->num_locals & 1) |
| 193 | + as->stack_adjust += 4; |
| 194 | + } |
| 195 | + |
| 196 | + emit_al(as, asm_arm_op_push(as->push_reglist | 1 << REG_LR)); |
| 197 | + if (as->stack_adjust > 0) { |
| 198 | + emit_al(as, asm_arm_op_sub_imm(REG_SP, REG_SP, as->stack_adjust)); |
| 199 | + } |
| 200 | +} |
| 201 | + |
| 202 | +void asm_arm_exit(asm_arm_t *as) { |
| 203 | + if (as->stack_adjust > 0) { |
| 204 | + emit_al(as, asm_arm_op_add_imm(REG_SP, REG_SP, as->stack_adjust)); |
| 205 | + } |
| 206 | + |
| 207 | + emit_al(as, asm_arm_op_pop(as->push_reglist | (1 << REG_PC))); |
| 208 | +} |
| 209 | + |
| 210 | +void asm_arm_label_assign(asm_arm_t *as, uint label) { |
| 211 | + assert(label < as->max_num_labels); |
| 212 | + if (as->pass < ASM_ARM_PASS_EMIT) { |
| 213 | + // assign label offset |
| 214 | + assert(as->label_offsets[label] == -1); |
| 215 | + as->label_offsets[label] = as->code_offset; |
| 216 | + } else { |
| 217 | + // ensure label offset has not changed from PASS_COMPUTE to PASS_EMIT |
| 218 | + assert(as->label_offsets[label] == as->code_offset); |
| 219 | + } |
| 220 | +} |
| 221 | + |
| 222 | +void asm_arm_align(asm_arm_t* as, uint align) { |
| 223 | + // TODO fill unused data with NOPs? |
| 224 | + as->code_offset = (as->code_offset + align - 1) & (~(align - 1)); |
| 225 | +} |
| 226 | + |
| 227 | +void asm_arm_data(asm_arm_t* as, uint bytesize, uint val) { |
| 228 | + byte *c = asm_arm_get_cur_to_write_bytes(as, bytesize); |
| 229 | + // only write to the buffer in the emit pass (otherwise we overflow dummy_data) |
| 230 | + if (as->pass == ASM_ARM_PASS_EMIT) { |
| 231 | + // little endian |
| 232 | + for (uint i = 0; i < bytesize; i++) { |
| 233 | + *c++ = val; |
| 234 | + val >>= 8; |
| 235 | + } |
| 236 | + } |
| 237 | +} |
| 238 | + |
| 239 | +void asm_arm_mov_reg_reg(asm_arm_t *as, uint reg_dest, uint reg_src) { |
| 240 | + emit_al(as, asm_arm_op_mov_reg(reg_dest, reg_src)); |
| 241 | +} |
| 242 | + |
| 243 | +void asm_arm_mov_reg_i32(asm_arm_t *as, uint rd, int imm) { |
| 244 | + // TODO: There are more variants of immediate values |
| 245 | + if ((imm & 0xFF) == imm) { |
| 246 | + emit_al(as, asm_arm_op_mov_imm(rd, imm)); |
| 247 | + } else if (imm < 0 && ((-imm) & 0xFF) == -imm) { |
| 248 | + emit_al(as, asm_arm_op_mvn_imm(rd, -imm)); |
| 249 | + } else { |
| 250 | + //Insert immediate into code and jump over it |
| 251 | + emit_al(as, 0x59f0000 | (rd << 12)); // ldr rd, [pc] |
| 252 | + emit_al(as, 0xa000000); // b pc |
| 253 | + emit(as, imm); |
| 254 | + } |
| 255 | +} |
| 256 | + |
| 257 | +void asm_arm_mov_local_reg(asm_arm_t *as, int local_num, uint rd) { |
| 258 | + // str rd, [sp, #local_num*4] |
| 259 | + emit_al(as, 0x58d0000 | (rd << 12) | (local_num << 2)); |
| 260 | +} |
| 261 | + |
| 262 | +void asm_arm_mov_reg_local(asm_arm_t *as, uint rd, int local_num) { |
| 263 | + // ldr rd, [sp, #local_num*4] |
| 264 | + emit_al(as, 0x59d0000 | (rd << 12) | (local_num << 2)); |
| 265 | +} |
| 266 | + |
| 267 | +void asm_arm_cmp_reg_i8(asm_arm_t *as, uint rd, int imm) { |
| 268 | + // cmp rd, #imm |
| 269 | + emit_al(as, 0x3500000 | (rd << 16) | (imm & 0xFF)); |
| 270 | +} |
| 271 | + |
| 272 | +void asm_arm_cmp_reg_reg(asm_arm_t *as, uint rd, uint rn) { |
| 273 | + // cmp rd, rn |
| 274 | + emit_al(as, 0x1500000 | (rd << 16) | rn); |
| 275 | +} |
| 276 | + |
| 277 | +void asm_arm_less_op(asm_arm_t *as, uint rd, uint rn) { |
| 278 | + asm_arm_cmp_reg_reg(as, rd, rn); // cmp rd, rn |
| 279 | + emit(as, asm_arm_op_mov_imm(REG_RET, 1) | ARM_CC_LT); // movlt REG_RET, #1 |
| 280 | + emit(as, asm_arm_op_mov_imm(REG_RET, 0) | ARM_CC_GE); // movge REG_RET, #0 |
| 281 | +} |
| 282 | + |
| 283 | +void asm_arm_add_reg(asm_arm_t *as, uint rd, uint rn, uint rm) { |
| 284 | + // add rd, rn, rm |
| 285 | + emit_al(as, asm_arm_op_add_reg(rd, rn, rm)); |
| 286 | +} |
| 287 | + |
| 288 | +void asm_arm_mov_reg_local_addr(asm_arm_t *as, uint rd, int local_num) { |
| 289 | + // add rd, sp, #local_num*4 |
| 290 | + emit_al(as, asm_arm_op_add_imm(rd, REG_SP, local_num << 2)); |
| 291 | +} |
| 292 | + |
| 293 | +void asm_arm_bcc_label(asm_arm_t *as, int cond, uint label) { |
| 294 | + assert(label < as->max_num_labels); |
| 295 | + int dest = as->label_offsets[label]; |
| 296 | + int rel = dest - as->code_offset; |
| 297 | + rel -= 8; // account for instruction prefetch, PC is 8 bytes ahead of this instruction |
| 298 | + rel >>= 2; // in ARM mode the branch target is 32-bit aligned, so the 2 LSB are omitted |
| 299 | + |
| 300 | + if (SIGNED_FIT24(rel)) { |
| 301 | + emit(as, cond | 0xa000000 | (rel & 0xffffff)); |
| 302 | + } else { |
| 303 | + printf("asm_arm_bcc: branch does not fit in 24 bits\n"); |
| 304 | + } |
| 305 | +} |
| 306 | + |
| 307 | +void asm_arm_b_label(asm_arm_t *as, uint label) { |
| 308 | + asm_arm_bcc_label(as, ARM_CC_AL, label); |
| 309 | +} |
| 310 | + |
| 311 | +void asm_arm_bl_ind(asm_arm_t *as, void *fun_ptr, uint fun_id, uint reg_temp) { |
| 312 | + // If the table offset fits into the ldr instruction |
| 313 | + if(fun_id < (0x1000 / 4)) { |
| 314 | + emit_al(as, asm_arm_op_mov_reg(REG_LR, REG_PC)); // mov lr, pc |
| 315 | + emit_al(as, 0x597f000 | (fun_id << 2)); // ldr pc, [r7, #fun_id*4] |
| 316 | + return; |
| 317 | + } |
| 318 | + |
| 319 | + emit_al(as, 0x59f0004 | (reg_temp << 12)); // ldr rd, [pc, #4] |
| 320 | + // Set lr after fun_ptr |
| 321 | + emit_al(as, asm_arm_op_add_imm(REG_LR, REG_PC, 4)); // add lr, pc, #4 |
| 322 | + emit_al(as, asm_arm_op_mov_reg(REG_PC, reg_temp)); // mov pc, reg_temp |
| 323 | + emit(as, (uint) fun_ptr); |
| 324 | +} |
| 325 | + |
| 326 | +#endif // MICROPY_EMIT_ARM |
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