@@ -1637,12 +1637,14 @@ impl Emu {
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self.force_break = true;
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}
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+ let bits = self.get_size(operand);
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+
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if self.cfg.trace_mem {
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let memory_operation = MemoryOperation {
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pos: self.pos,
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rip: self.regs.rip,
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op: "write".to_string(),
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- bits: 32 ,
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+ bits: bits as u32 ,
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address: addr,
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old_value: 0, // TODO
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new_value: value as u64,
@@ -1651,8 +1653,7 @@ impl Emu {
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self.memory_operations.push(memory_operation);
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println!("\tmem_trace: pos = {} rip = {:x} op = write bits = {} address = 0x{:x} value = 0x{:x} name = '{}'", self.pos, self.regs.rip, 32, addr, value, name);
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}
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-
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- let bits = self.get_size(operand);
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+
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let ret = match bits {
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64 => self.maps.write_qword(addr, value),
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32 => self.maps.write_dword(addr, (value & 0xffffffff) as u32),
@@ -4202,6 +4203,7 @@ impl Emu {
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let instruction = self.instruction.unwrap();
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let instruction_bytes = &self.instruction_bytes;
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+ // dump all registers on first, only differences on next
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let mut registers = String::new();
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if index == 0 {
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/*
@@ -4248,7 +4250,14 @@ impl Emu {
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);
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}
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- let flags = format!("rflags: {:x}-> {:x}", self.pre_op_flags.dump(), self.post_op_flags.dump());
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+ let mut flags = String::new();
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+ if index == 0 {
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+ flags = format!("rflags: {:x}-> {:x}", self.pre_op_flags.dump(), self.post_op_flags.dump());
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+ } else {
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+ if self.pre_op_flags.dump() != self.post_op_flags.dump() {
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+ flags = format!("rflags: {:x}-> {:x}", self.pre_op_flags.dump(), self.post_op_flags.dump());
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+ }
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+ }
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let mut memory = String::new();
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for memory_op in self.memory_operations.iter() {
@@ -4262,7 +4271,7 @@ impl Emu {
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let mut trace_file = self.cfg.trace_file.as_ref().unwrap();
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writeln!(
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trace_file,
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- " {index:02X}, {address:016X}, {bytes:02x?}, {disassembly}, {registers}, {memory}, {comments}",
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+ r#"" {index:02X}"," {address:016X}"," {bytes:02x?}"," {disassembly}"," {registers}"," {memory}"," {comments}""# ,
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index = index,
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address = self.pre_op_regs.rip,
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bytes = instruction_bytes,
@@ -4272,7 +4281,7 @@ impl Emu {
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comments = ""
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).expect("failed to write to trace file");
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- if index > 10 {
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+ if index > 32 {
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panic!("OUT");
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}
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}
@@ -4423,19 +4432,22 @@ impl Emu {
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let mut formatter = IntelFormatter::new();
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formatter.options_mut().set_digit_separator("");
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formatter.options_mut().set_first_operand_char_index(6);
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+
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// get first instruction from iterator
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- let ins = decoder.iter().next().unwrap();
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- // size
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+ let ins = decoder.decode();
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let sz = ins.len();
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+ let addr = ins.ip();
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+ let position = decoder.position();
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+ let instruction_bytes = block[position-sz..position].to_vec();
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// clear
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self.out.clear();
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+ self.memory_operations.clear();
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// format
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formatter.format(&ins, &mut self.out);
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self.instruction = Some(ins);
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- self.instruction_bytes = vec![]; // TODO
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- self.memory_operations.clear();
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+ self.instruction_bytes = instruction_bytes;
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// emulate
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let result_ok = self.emulate_instruction(&ins, sz, true);
@@ -4509,17 +4521,17 @@ impl Emu {
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Decoder::with_ip(32, &block, self.regs.get_eip(), DecoderOptions::NONE);
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}
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- for ins in decoder.iter() {
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+ while decoder.can_decode() {
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+ let ins = decoder.decode();
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let sz = ins.len();
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let addr = ins.ip();
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- let position = ins.ip() - self.regs.rip ;
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- let instruction_bytes = block[position as usize ..position as usize + sz ].to_vec();
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+ let position = decoder.position() ;
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+ let instruction_bytes = block[position-sz ..position].to_vec();
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if !end_addr.is_none() && Some(addr) == end_addr {
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return Ok(self.regs.rip);
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}
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-
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self.out.clear();
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formatter.format(&ins, &mut self.out);
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self.instruction = Some(ins);
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