8000 ZJIT: Add codegen for SideExit by tekknolagi · Pull Request #13602 · ruby/ruby · GitHub
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ZJIT: Add codegen for SideExit #13602

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Merged
merged 2 commits into from
Jun 13, 2025
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ZJIT: Add codegen for SideExit #13602

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6555d20
ZJIT: Add codegen for SideExit
tekknolagi Jun 12, 2025
925cdb5
ZJIT: Only write LIR output of HIR instructions with output
tekknolagi Jun 12, 2025
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16 changes: 13 additions & 3 deletions zjit/src/codegen.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -277,13 +277,16 @@ fn gen_insn(cb: &mut CodeBlock, jit: &mut JITState, asm: &mut Assembler, functio
Insn::GetIvar { self_val, id, state: _ } => gen_getivar(asm, opnd!(self_val), *id),
Insn::SetGlobal { id, val, state: _ } => gen_setglobal(asm, *id, opnd!(val)),
Insn::GetGlobal { id, state: _ } => gen_getglobal(asm, *id),
Insn::SetIvar { self_val, id, val, state: _ } => gen_setivar(asm, opnd!(self_val), *id, opnd!(val)),
Insn::SetIvar { self_val, id, val, state: _ } => return gen_setivar(asm, opnd!(self_val), *id, opnd!(val)),
Insn::SideExit { state } => return gen_side_exit(jit, asm, &function.frame_state(*state)),
_ => {
debug!("ZJIT: gen_function: unexpected insn {:?}", insn);
return None;
}
};

assert!(insn.has_output(), "Cannot write LIR output of HIR instruction with no output");

// If the instruction has an output, remember it in jit.opnds
jit.opnds[insn_id.0] = Some(out_opnd);

Expand Down Expand Up @@ -311,12 +314,13 @@ fn gen_getivar(asm: &mut Assembler, recv: Opnd, id: ID) -> Opnd {
}

/// Emit an uncached instance variable store
fn gen_setivar(asm: &mut Assembler, recv: Opnd, id: ID, val: Opnd) -> Opnd {
fn gen_setivar(asm: &mut Assembler, recv: Opnd, id: ID, val: Opnd) -> Option<()> {
asm_comment!(asm, "call rb_ivar_set");
asm.ccall(
rb_ivar_set as *const u8,
vec![recv, Opnd::UImm(id.0), val],
)
);
Some(())
}

/// Look up global variables
Expand All @@ -337,6 +341,12 @@ fn gen_setglobal(asm: &mut Assembler, id: ID, val: Opnd) -> Opnd {
)
}

/// Side-exit into the interpreter
fn gen_side_exit(jit: &mut JITState, asm: &mut Assembler, state: &FrameState) -> Option<()> {
asm.jmp(side_exit(jit, state)?);
Some(())
}

/// Compile an interpreter entry block to be inserted into an ISEQ
fn gen_entry_prologue(asm: &mut Assembler, iseq: IseqPtr) {
asm_comment!(asm, "ZJIT entry point: {}", iseq_get_location(iseq, 0));
Expand Down
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