8000 Merge pull request #8 from howjmay/ci · plctlab/numpy@c9ad0e5 · GitHub
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Merge pull request #8 from howjmay/ci
feat: Enable CI in cross compiled environment
2 parents 1017a35 + 28f47db commit c9ad0e5

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+32
-10
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4 files changed

+32
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.github/workflows/github_actions.yml

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@@ -1,11 +1,31 @@
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name: Github Actions
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on:
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push:
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branches: [main]
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pull_request:
8000
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branches: [main]
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jobs:
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# for validate test cases
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# run riscv tests
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host_x86:
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runs-on: ubuntu-20.04
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steps:
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- name: checkout code
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uses: actions/checkout@v3.2.0
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- name: setup riscv toolchain
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run: |
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mkdir /opt/riscv
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export PATH=$PATH:/opt/riscv/bin
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wget https://github.com/riscv-collab/riscv-gnu-toolchain/releases/download/2023.10.18/riscv64-elf-ubuntu-20.04-gcc-nightly-2023.10.18-nightly.tar.gz
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sudo tar -xzf riscv64-elf-ubuntu-20.04-gcc-nightly-2023.10.18-nightly.tar.gz -C /opt/
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- name: run tests
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run: |
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export PATH=$PATH:/opt/riscv/bin
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sh scripts/cross-test.sh qemu
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10000 # for validate test cases only
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host_arm:
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runs-on: ubuntu-20.04
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strategy:

Makefile

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@@ -29,13 +29,15 @@ else # CROSS_COMPILE was set
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endif
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ARCH_CFLAGS = -march=$(processor)gcv_zba
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EXEC_WRAPPER_FLAGS = --isa=$(processor)gcv_zba
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endif
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EXEC_WRAPPER =
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ifdef CROSS_COMPILE
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EXEC_WRAPPER = spike
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PROXY_KERNEL = pk
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ifeq ($(SIMULATOR_TYPE), qemu)
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SIMULATOR += qemu-riscv64
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SIMULATOR_FLAGS = -cpu $(processor),v=true,zba=true,vlen=128
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else
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SIMULATOR = spike
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SIMULATOR_FLAGS = --isa=$(processor)gcv_zba
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PROXY_KERNEL = pk
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endif
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endif
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CXXFLAGS += -Wall -Wcast-qual -I. $(ARCH_CFLAGS)
@@ -60,7 +62,7 @@ test: tests/main
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ifeq ($(processor),$(filter $(processor),rv32 rv64))
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$(CC) $(ARCH_CFLAGS) -c neon2rvv.h
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endif
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$(EXEC_WRAPPER) $(EXEC_WRAPPER_FLAGS) $(PROXY_KERNEL) $^
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$(SIMULATOR) $(SIMULATOR_FLAGS) $(PROXY_KERNEL) $^
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build-test: tests/main
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ifeq ($(processor),$(filter $(processor),rv32 rv64))

neon2rvv.h

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@@ -174,7 +174,7 @@ FORCE_INLINE uint32x4_t vaddq_u32(uint32x4_t __a, uint32x4_t __b) { return __ris
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FORCE_INLINE uint64x2_t vaddq_u64(uint64x2_t __a, uint64x2_t __b) { return __riscv_vadd_vv_u64m1(__a, __b, 2); }
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FORCE_INLINE int16x8_t vaddl_s8(int8x8_t __a, int8x8_t __b) {
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return __riscv_vget_v_i16m2_i16m1(__riscv_vwadd_vv_i16m2(__a, __b, 8), 0);
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return __riscv_vwadd_vv_i16m1(__a, __b, 8);
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}
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// FORCE_INLINE int32x4_t vaddl_s16(int16x4_t __a, int16x4_t __b);

scripts/cross-test.sh

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@@ -10,7 +10,7 @@ fi
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set -x
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make clean
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make CROSS_COMPILE=riscv64-unknown-elf- test || exit 1 # riscv64
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make CROSS_COMPILE=riscv64-unknown-elf- SIMULATOR_TYPE=$1 test || exit 1 # riscv64
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# make clean
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# make CROSS_COMPILE=riscv32-unknown-elf- test || exit 1 # riscv32

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