8000 stm32/uart_repl: Disable irq flash erase/write if uart repl enabled. · micropython/micropython@f19f880 · GitHub
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stm32/uart_repl: Disable irq flash erase/write if uart repl enabled.
Uart repl stdin loses data when the background flash erase / cache flush happens during communication. This change forces all erase / write operations to happen during file sync/close instead. This change can be overridden in board config etc. with: #define MICROPY_HW_FLASH_BACKGROUND_CACHE (1) For more details see #8386
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ports/stm32/flashbdev.c

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@@ -89,7 +89,9 @@ int32_t flash_bdev_ioctl(uint32_t op, uint32_t arg) {
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return FLASH_MEM_SEG1_NUM_BLOCKS + FLASH_MEM_SEG2_NUM_BLOCKS;
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case BDEV_IOCTL_IRQ_HANDLER:
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#if MICROPY_HW_FLASH_BACKGROUND_CACHE
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flash_bdev_irq_handler();
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#endif
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return 0;
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case BDEV_IOCTL_SYNC: {

ports/stm32/mpconfigport.h

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@@ -144,6 +144,16 @@
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#define MICROPY_PY_UPLATFORM (1)
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#endif
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#ifndef MICROPY_HW_FLASH_BACKGROUND_CACHE
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#if defined(MICROPY_HW_UART_REPL)
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// When UART repl is in use background erase / cache flush of
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// internal flash is unsafe.
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#define MICROPY_HW_FLASH_BACKGROUND_CACHE (0)
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#else
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#define MICROPY_HW_FLASH_BACKGROUND_CACHE (1)
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#endif
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#endif
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// fatfs configuration used in ffconf.h
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#define MICROPY_FATFS_ENABLE_LFN (1)
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#define MICROPY_FATFS_LFN_CODE_PAGE 437 /* 1=SFN/ANSI 437=LFN/U.S.(OEM) */

ports/stm32/storage.c

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@@ -64,7 +64,9 @@ void storage_init(void) {
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// Enable the flash IRQ, which is used to also call our storage IRQ handler
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// It must go at the same priority as USB (see comment in irq.h).
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NVIC_SetPriority(FLASH_IRQn, IRQ_PRI_FLASH);
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#if (MICROPY_HW_FLASH_BACKGROUND_CACHE) || defined(MICROPY_HW_BDEV2_IOCTL)
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HAL_NVIC_EnableIRQ(FLASH_IRQn);
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#endif
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}
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}
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