@@ -72,6 +72,158 @@ For running PIO programs, see :class:`rp2.StateMachine`.
72
72
an error assembling a PIO program.
73
73
74
74
75
+ PIO assembly language instructions
76
+ ----------------------------------
77
+
78
+ PIO state machines are programmed in a custom assembly language with nine core
79
+ PIO-machine instructions. In MicroPython, PIO assembly routines are written as
80
+ a Python function with the decorator ``@rp2.asm_pio() ``, and they use Python
81
+ syntax. Such routines support standard Python variables and arithmetic, as well
82
+ as the following custom functions that encode PIO instructions and direct the
83
+ assembler. See sec 3.4 of the RP2040 datasheet for further details.
84
+
85
+ wrap_target()
86
+ Specify the location where execution continues after program wrapping.
87
+ By default this is the start of the PIO routine.
88
+
89
+ wrap()
90
+ Specify the location where the program finishes and wraps around.
91
+ If this directive is not used then it is added automatically at the end of
92
+ the PIO routine. Wrapping does not cost any execution cycles.
93
+
94
+ label(label)
95
+ Define a label called *label * at the current location. *label * can be a
96
+ string or integer.
97
+
98
+ word(instr, label=None)
99
+ Insert an arbitrary 16-bit word in the assembled output.
100
+
101
+ - *instr *: the 16-bit value
102
+ - *label *: if given, look up the label and logical-or the label's value with
103
+ *instr *
104
+
105
+ jmp(...)
106
+ This instruction takes two forms:
107
+
108
+ jmp(label)
109
+ - *label *: label to jump to unconditionally
110
+
111
+ jmp(cond, label)
112
+ - *cond *: the condition to check, one of:
113
+
114
+ - ``not_x ``, ``not_y ``: true if register is zero
115
+ - ``x_dec ``, ``y_dec ``: true if register is non-zero, and do post
116
+ decrement
117
+ - ``x_not_y ``: true if X is not equal to Y
118
+ - ``pin ``: true if the input pin is set
119
+ - ``not_osre ``: true if OSR is not empty (hasn't reached its
120
+ threshold)
121
+
122
+ - *label *: label to jump to if condition is true
123
+
124
+ wait(polarity, src, index)
125
+ Block, waiting for high/low on a pin or IRQ line.
126
+
127
+ - *polarity *: 0 or 1, whether to wait for a low or high value
128
+ - *src *: one of: ``gpio `` (absolute pin), ``pin `` (pin relative to
129
+ StateMachine's ``in_base `` argument), ``irq ``
130
+ - *index *: 0-31, the index for *src *
131
+
132
+ in_(src, bit_count)
133
+ Shift data in from *src * to ISR.
134
+
135
+ - *src *: one of: ``pins ``, ``x ``, ``y ``, ``null ``, ``isr ``, ``osr ``
136
+ - *bit_count *: number of bits to shift in (1-32)
137
+
138
+ out(dest, bit_count)
139
+ Shift data out from OSR to *dest *.
140
+
141
+ - *dest *: one of: ``pins ``, ``x ``, ``y ``, ``pindirs ``, ``pc ``, ``isr ``,
142
+ ``exec ``
143
+ - *bit_count *: number of bits to shift out (1-32)
144
+
145
+ push(...)
146
+ Push ISR to the RX FIFO, then clear ISR to zero.
147
+ This instruction takes the following forms:
148
+
149
+ - push()
150
+ - push(block)
151
+ - push(noblock)
152
+ - push(iffull)
153
+ - push(iffull, block)
154
+ - push(iffull, noblock)
155
+
156
+ If ``block `` is used then the instruction stalls if the RX FIFO is full.
157
+ The default is to block. If ``iffull `` is used then it only pushes if the
158
+ input shift count has reached its threshold.
159
+
160
+ pull(...)
161
+ Pull from the TX FIFO into OSR.
162
+ This instruction takes the following forms:
163
+
164
+ - pull()
165
+ - pull(block)
166
+ - pull(noblock)
167
+ - pull(ifempty)
168
+ - pull(ifempty, block)
169
+ - pull(ifempty, noblock)
170
+
171
+ If ``block `` is used then the instruction stalls if the TX FIFO is empty.
172
+ The default is to block. If ``ifempty `` is used then it only pulls if the
173
+ output shift count has reached its threshold.
174
+
175
+ mov(dest, src)
176
+ Move into *dest * the value from *src *.
177
+
178
+ - *dest *: one of: ``pins ``, ``x ``, ``y ``, ``exec ``, ``pc ``, ``isr ``, ``osr ``
179
+ - *src *: one of: ``pins ``, ``x ``, ``y ``, ``null ``, ``status ``, ``isr ``,
180
+ ``osr ``; this argument can be optionally modified by wrapping it in
181
+ ``invert() `` or ``reverse() `` (but not both together)
182
+
183
+ irq(...)
184
+ Set or clear an IRQ flag.
185
+ This instruction takes two forms:
186
+
187
+ irq(index)
188
+ - *index *: 0-7, or ``rel(0) `` to ``rel(7) ``
189
+
190
+ irq(mode, index)
191
+ - *mode *: one of: ``block ``, ``clear ``
192
+ - *index *: 0-7, or ``rel(0) `` to ``rel(7) ``
193
+
194
+ If ``block `` is used then the instruction stalls until the flag is cleared
195
+ by another entity. If ``clear `` is used then the flag is cleared instead of
196
+ being set. Relative IRQ indices add the state machine ID to the IRQ index
197
+ with modulo-4 addition. IRQs 0-3 are visible from to the processor, 4-7 are
198
+ internal to the state machines.
199
+
200
+ set(dest, data)
201
+ Set *dest * with the value *data *.
202
+
203
+ - *dest *: ``pins ``, ``x ``, ``y ``, ``pindirs ``
204
+ - *data *: value (0-31)
205
+
206
+ nop()
207
+ This is a pseudoinstruction that assembles to ``mov(y, y) `` and has no side
208
+ effect.
209
+
210
+ .side(value)
211
+ This is a modifier which can be applied to any instruction, and is used to
212
+ control side-set pin values.
213
+
214
+ - *value *: the value (bits) to output on the side-set pins
215
+
216
+ .delay(value)
217
+ This is a modifier which can be applied to any instruction, and specifies
218
+ how many cycles to delay for after the instruction executes.
219
+
220
+ - *value *: cycles to delay, 0-31 (maximum value reduced if side-set pins are
221
+ used)
222
+
223
+ [value]
224
+ This is a modifier and is equivalent to ``.delay(value) ``.
225
+
226
+
75
227
Classes
76
228
-------
77
229
0 commit comments