8000 py/nlrriscv32: Add floating-point support. · micropython/micropython@b2d8092 · GitHub
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esmilesmil
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py/nlrriscv32: Add floating-point support.
This should work, but for now it has only been compile-tested
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‎py/nlr.h

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Original file line numberDiff line numberDiff line change
@@ -78,7 +78,15 @@
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#define MICROPY_NLR_NUM_REGS (128)
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#elif defined(__riscv_xlen) && __riscv_xlen == 32
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#define MICROPY_NLR_RISCV32 (1)
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#ifndef __riscv_flen
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#define MICROPY_NLR_NUM_REGS (14)
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#elif __riscv_flen == 32
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#define MICROPY_NLR_NUM_REGS (14 + 12)
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#elif __riscv_flen == 64
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#define MICROPY_NLR_NUM_REGS (14 + 24)
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#else
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#error Unimplemented __riscv_flen
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#endif
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#else
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#define MICROPY_NLR_SETJMP (1)
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//#warning "No native NLR support for this arch, using setjmp implementation"

‎py/nlrriscv32.c

Lines changed: 57 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -31,7 +31,7 @@
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#undef nlr_push
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// For reference, riscv callee save regs are:
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// s0-s11, ra and sp
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// s0-s11, ra, sp and fs0-fs11
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__attribute__((naked)) unsigned int nlr_push(nlr_buf_t *nlr) {
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@@ -50,6 +50,34 @@ __attribute__((naked)) unsigned int nlr_push(nlr_buf_t *nlr) {
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"sw s11, 44+%0 \n" // store s11 into nlr->regs
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"sw ra, 48+%0 \n" // store ra into nlr->regs
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"sw sp, 52+%0 \n" // store sp into nlr->regs
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#ifndef __riscv_flen
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#elif __riscv_flen == 32
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"fsw fs0, 56+%0 \n" // store fs0 into nlr->regs
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"fsw fs1, 60+%0 \n" // store fs1 into nlr->regs
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"fsw fs2, 64+%0 \n" // store fs2 into nlr->regs
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"fsw fs3, 68+%0 \n" // store fs3 into nlr->regs
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"fsw fs4, 72+%0 \n" // store fs4 into nlr->regs
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"fsw fs5, 76+%0 \n" // store fs5 into nlr->regs
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"fsw fs6, 80+%0 \n" // store fs6 into nlr->regs
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"fsw fs7, 84+%0 \n" // store fs7 into nlr->regs
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"fsw fs8, 88+%0 \n" // store fs8 into nlr->regs
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"fsw fs9, 92+%0 \n" // store fs9 into nlr->regs
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"fsw fs10, 96+%0 \n" // store fs10 into nlr->regs
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"fsw fs11, 100+%0 \n" // store fs11 into nlr->regs
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#elif __riscv_flen == 64
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"fsd fs0, 56+%0 \n" // store fs0 into nlr->regs
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"fsd fs1, 64+%0 \n" // store fs1 into nlr->regs
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"fsd fs2, 72+%0 \n" // store fs2 into nlr->regs
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"fsd fs3, 80+%0 \n" // store fs3 into nlr->regs
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"fsd fs4, 88+%0 \n" // store fs4 into nlr->regs
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"fsd fs5, 96+%0 \n" // store fs5 into nlr->regs
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"fsd fs6, 104+%0 \n" // store fs6 into nlr->regs
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"fsd fs7, 112+%0 \n" // store fs7 into nlr->regs
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"fsd fs8, 120+%0 \n" // store fs8 into nlr->regs
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"fsd fs9, 128+%0 \n" // store fs9 into nlr->regs
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"fsd fs10, 136+%0 \n" // store fs10 into nlr->regs
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"fsd fs11, 144+%0 \n" // store fs11 into nlr->regs
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#endif
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"tail nlr_push_tail \n" // do the rest in C
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: "=o" (nlr->regs)
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);
@@ -77,6 +105,34 @@ NORETURN void nlr_jump(void *val) {
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"lw s10, 40+%0 \n" // load s10 from top->regs
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"lw s11, 44+%0 \n" // load s11 from top->regs
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"lw ra, 48+%0 \n" // load ra from top->regs
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#ifndef __riscv_flen
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#elif __riscv_flen == 32
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"flw fs0, 56+%0 \n" // load fs0 from top->regs
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"flw fs1, 60+%0 \n" // load fs1 from top->regs
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"flw fs2, 64+%0 \n" // load fs2 from top->regs
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"flw fs3, 68+%0 \n" // load fs3 from top->regs
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"flw fs4, 72+%0 \n" // load fs4 from top->regs
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"flw fs5, 76+%0 \n" // load fs5 from top->regs
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"flw fs6, 80+%0 \n" // load fs6 from top->regs
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"flw fs7, 84+%0 \n" // load fs7 from top->regs
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"flw fs8, 88+%0 \n" // load fs8 from top->regs
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"flw fs9, 92+%0 \n" // load fs9 from top->regs
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"flw fs10, 96+%0 \n" // load fs10 from top->regs
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"flw fs11, 100+%0 \n" // load fs11 from top->regs
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#elif __riscv_flen == 64
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"fld fs0, 56+%0 \n" // load fs0 from top->regs
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"fld fs1, 64+%0 \n" // load fs1 from top->regs
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"fld fs2, 72+%0 \n" // load fs2 from top->regs
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"fld fs3, 80+%0 \n" // load fs3 from top->regs
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"fld fs4, 88+%0 \n" 7753 // load fs4 from top->regs
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"fld fs5, 96+%0 \n" // load fs5 from top->regs
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"fld fs6, 104+%0 \n" // load fs6 from top->regs
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"fld fs7, 112+%0 \n" // load fs7 from top->regs
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"fld fs8, 120+%0 \n" // load fs8 from top->regs
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"fld fs9, 128+%0 \n" // load fs9 from top->regs
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"fld fs10, 136+%0 \n" // load fs10 from top->regs
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"fld fs11, 144+%0 \n" // load fs11 from top->regs
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#endif
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"lw sp, 52+%0 \n" // load sp from top->regs
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"li a0, 1 \n" // return 1, non-local return
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"ret \n" // return

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