8000 stm32/qspi: Support common flash sizes in MPU configuration. · micropython/micropython@b288394 · GitHub
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iabdalkaderdpgeorge
iabdalkader
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dpgeorge
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stm32/qspi: Support common flash sizes in MPU configuration.
Add MPU configuration for common flash sizes up to 256MiB.
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‎ports/stm32/qspi.c

Lines changed: 32 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -52,6 +52,10 @@
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#define MICROPY_HW_QSPI_CS_HIGH_CYCLES 2 // nCS stays high for 2 cycles
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#endif
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55+
#ifndef MICROPY_HW_QSPI_MPU_REGION_SIZE
56+
#define MICROPY_HW_QSPI_MPU_REGION_SIZE ((1 << (MICROPY_HW_QSPIFLASH_SIZE_BITS_LOG2 - 3)) >> 20)
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#endif
58+
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#if (MICROPY_HW_QSPIFLASH_SIZE_BITS_LOG2 - 3 - 1) >= 24
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#define QSPI_CMD 0xec
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#define QSPI_ADSIZE 3
@@ -74,11 +78,37 @@ static inline void qspi_mpu_enable_mapped(void) {
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// for the memory-mapped region, so 3 MPU regions are used to disable access
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// to everything except the valid address space, using holes in the bottom
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// of the regions and nesting them.
77-
// At the moment this is hard-coded to 2MiB of QSPI address space.
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// Note: Disabling a subregion (by setting its corresponding SRD bit to 1)
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// means another region overlapping the disabled range matches instead. If no
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// other enabled region overlaps the disabled subregion, and the access is
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// unprivileged or the background region is disabled, the MPU issues a fault.
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uint32_t irq_state = mpu_config_start();
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#if MICROPY_HW_QSPI_MPU_REGION_SIZE > 128
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mpu_config_region(MPU_REGION_QSPI1, QSPI_MAP_ADDR, MPU_CONFIG_DISABLE(0xFF, MPU_REGION_SIZE_256MB));
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#elif MICROPY_HW_QSPI_MPU_REGION_SIZE > 64
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mpu_config_region(MPU_REGION_QSPI1, QSPI_MAP_ADDR, MPU_CONFIG_DISABLE(0x0F, MPU_REGION_SIZE_256MB));
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#elif MICROPY_HW_QSPI_MPU_REGION_SIZE > 32
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mpu_config_region(MPU_REGION_QSPI1, QSPI_MAP_ADDR, MPU_CONFIG_DISABLE(0x03, MPU_REGION_SIZE_256MB));
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#elif MICROPY_HW_QSPI_MPU_REGION_SIZE > 16
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mpu_config_region(MPU_REGION_QSPI1, QSPI_MAP_ADDR, MPU_CONFIG_DISABLE(0x01, MPU_REGION_SIZE_256MB));
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#elif MICROPY_HW_QSPI_MPU_REGION_SIZE > 8
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mpu_config_region(MPU_REGION_QSPI1, QSPI_MAP_ADDR, MPU_CONFIG_DISABLE(0x01, MPU_REGION_SIZE_256MB));
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mpu_config_region(MPU_REGION_QSPI2, QSPI_MAP_ADDR, MPU_CONFIG_DISABLE(0x0F, MPU_REGION_SIZE_32MB));
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#elif MICROPY_HW_QSPI_MPU_REGION_SIZE > 4
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mpu_config_region(MPU_REGION_QSPI1, QSPI_MAP_ADDR, MPU_CONFIG_DISABLE(0x01, MPU_REGION_SIZE_256MB));
80-
mpu_config_region(MPU_REGION_QSPI2, QSPI_MAP_ADDR, MPU_CONFIG_DISABLE(0x0f, MPU_REGION_SIZE_32MB));
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mpu_config_region(MPU_REGION_QSPI2, QSPI_MAP_ADDR, MPU_CONFIG_DISABLE(0x03, MPU_REGION_SIZE_32MB));
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#elif MICROPY_HW_QSPI_MPU_REGION_SIZE > 2
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mpu_config_region(MPU_REGION_QSPI1, QSPI_MAP_ADDR, MPU_CONFIG_DISABLE(0x01, MPU_REGION_SIZE_256MB));
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mpu_config_region(MPU_REGION_QSPI2, QSPI_MAP_ADDR, MPU_CONFIG_DISABLE(0x01, MPU_REGION_SIZE_32MB));
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#elif MICROPY_HW_QSPI_MPU_REGION_SIZE > 1
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mpu_config_region(MPU_REGION_QSPI1, QSPI_MAP_ADDR, MPU_CONFIG_DISABLE(0x01, MPU_REGION_SIZE_256MB));
105+
mpu_config_region(MPU_REGION_QSPI2, QSPI_MAP_ADDR, MPU_CONFIG_DISABLE(0x0F, MPU_REGION_SIZE_32MB));
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mpu_config_region(MPU_REGION_QSPI3, QSPI_MAP_ADDR, MPU_CONFIG_DISABLE(0x01, MPU_REGION_SIZE_16MB));
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#else
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mpu_config_region(MPU_REGION_QSPI1, QSPI_MAP_ADDR, MPU_CONFIG_DISABLE(0x01, MPU_REGION_SIZE_256MB));
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mpu_config_region(MPU_REGION_QSPI2, QSPI_MAP_ADDR, MPU_CONFIG_DISABLE(0x01, MPU_REGION_SIZE_32MB));
110+
mpu_config_region(MPU_REGION_QSPI3, QSPI_MAP_ADDR, MPU_CONFIG_DISABLE(0x03, MPU_REGION_SIZE_4MB));
111+
#endif
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mpu_config_end(irq_state);
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}
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