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esp32/esp32c2: Adapt to target chip ESP32C2.
esp32/esp32c2: Fix heap size is too small to enable Bluetooth. Signed-off-by: TianShuangKe <qinyun575@gmail.com>
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‎ports/esp32/boards/ESP32_GENERIC_C2/board.json

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{
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"deploy": [
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"../deploy_c2.md"
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],
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"docs": "",
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"features": [
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"BLE",
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"External Flash",
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"WiFi"
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],
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"images": [
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"esp32c2_devkitmini.jpg"
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],
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"mcu": "esp32c2",
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"product": "ESP32-C2",
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"thumbnail": "",
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"url": "https://www.espressif.com/en/products/modules",
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"vendor": "Espressif"
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}

‎ports/esp32/boards/ESP32_GENERIC_C2/board.md

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The following files are firmware images that should work on most
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ESP32-C2-based boards with 4MiB of flash, including WROOM and MINI modules,
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that use the revision 1 silicon (or newer).

‎ports/esp32/boards/ESP32_GENERIC_C2/mpconfigboard.cmake

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set(IDF_TARGET esp32c2)
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set(SDKCONFIG_DEFAULTS
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boards/sdkconfig.base
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${SDKCONFIG_IDF_VERSION_SPECIFIC}
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boards/sdkconfig.ble
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boards/sdkconfig.c2
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)

‎ports/esp32/boards/ESP32_GENERIC_C2/mpconfigboard.h

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// This configuration is for a generic ESP32C2 board with 4MiB (or more) of flash.
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#define MICROPY_HW_BOARD_NAME "ESP32C2 module"
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#define MICROPY_HW_MCU_NAME "ESP32C2"
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#define MICROPY_HW_ENABLE_SDCARD (0)
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#define MICROPY_PY_MACHINE_I2S (0)
8 6D40 +
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// Network config
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#define MICROPY_PY_NETWORK_HOSTNAME_DEFAULT "esp32c2"
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// Enable UART REPL for modules that have an external USB-UART and don't use native USB.
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#define MICROPY_HW_ENABLE_UART_REPL (1)

‎ports/esp32/boards/deploy_c2.md

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Program your board using the esptool.py program, found [here](https://github.com/espressif/esptool).
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If you are putting MicroPython on your board for the first time then you should
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first erase the entire flash using:
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```bash
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esptool.py --chip esp32c2 --port /dev/ttyUSB0 erase_flash
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```
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From then on program the firmware starting at address 0x0:
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```bash
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esptool.py --chip esp32c2 --port /dev/ttyUSB0 --baud 460800 write_flash -z 0x0 esp32c2-20240627-v1.23.bin
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```

‎ports/esp32/boards/sdkconfig.c2

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#
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# Main XTAL Config
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#
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CONFIG_XTAL_FREQ_26=y
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# CONFIG_XTAL_FREQ_40 is not set
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CONFIG_XTAL_FREQ=26
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CONFIG_BT_NIMBLE_TASK_STACK_SIZE=4096

‎ports/esp32/esp32_rmt.c

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@@ -47,9 +47,12 @@
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// This current MicroPython implementation lacks some major features, notably receive pulses
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// and carrier output.
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#if SOC_RMT_SUPPORTED
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// Last available RMT channel that can transmit.
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#define RMT_LAST_TX_CHANNEL (SOC_RMT_TX_CANDIDATES_PER_GROUP - 1)
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#else
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#define RMT_LAST_TX_CHANNEL (-1)
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#endif
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// Forward declaration
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extern const mp_obj_type_t esp32_rmt_type;
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‎ports/esp32/machine_adc.c

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@@ -87,7 +87,7 @@ static const machine_adc_obj_t madc_obj[] = {
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{{&machine_adc_type}, ADCBLOCK2, ADC_CHANNEL_7, GPIO_NUM_27},
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{{&machine_adc_type}, ADCBLOCK2, ADC_CHANNEL_8, GPIO_NUM_25},
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{{&machine_adc_type}, ADCBLOCK2, ADC_CHANNEL_9, GPIO_NUM_26},
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#elif CONFIG_IDF_TARGET_ESP32C3
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#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32C2
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{{&machine_adc_type}, ADCBLOCK1, ADC_CHANNEL_0, GPIO_NUM_0},
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{{&machine_adc_type}, ADCBLOCK1, ADC_CHANNEL_1, GPIO_NUM_1},
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{{&machine_adc_type}, ADCBLOCK1, ADC_CHANNEL_2, GPIO_NUM_2},

‎ports/esp32/machine_bitstream.c

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@@ -90,6 +90,7 @@ static void IRAM_ATTR machine_bitstream_high_low_bitbang(mp_hal_pin_obj_t pin, u
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mp_hal_quiet_timing_exit(irq_state);
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}
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#if SOC_RMT_SUPPORTED
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/******************************************************************************/
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// RMT implementation
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@@ -172,16 +173,20 @@ static void machine_bitstream_high_low_rmt(mp_hal_pin_obj_t pin, uint32_t *timin
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// Cancel RMT output to GPIO pin.
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esp_rom_gpio_connect_out_signal(pin, SIG_GPIO_OUT_IDX, false, false);
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}
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#endif
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/******************************************************************************/
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// Interface to machine.bitstream
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void machine_bitstream_high_low(mp_hal_pin_obj_t pin, uint32_t *timing_ns, const uint8_t *buf, size_t len) {
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#if SOC_RMT_SUPPORTED
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if (esp32_rmt_bitstream_channel_id < 0) {
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machine_bitstream_high_low_bitbang(pin, timing_ns, buf, len);
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} else {
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machine_bitstream_high_low_rmt(pin, timing_ns, buf, len, esp32_rmt_bitstream_channel_id);
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}
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#else
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machine_bitstream_high_low_bitbang(pin, timing_ns, buf, len);
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#endif
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}
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#endif // MICROPY_PY_MACHINE_BITSTREAM

‎ports/esp32/machine_i2c.c

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#endif
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#if SOC_I2C_SUPPORT_XTAL
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#if CONFIG_IDF_TARGET_ESP32C2
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#define I2C_SCLK_FREQ APB_CLK_FREQ
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#else
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#define I2C_SCLK_FREQ XTAL_CLK_FREQ
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#endif
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#elif SOC_I2C_SUPPORT_APB
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#define I2C_SCLK_FREQ APB_CLK_FREQ
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#else

‎ports/esp32/machine_pin.c

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@@ -152,7 +152,7 @@ static mp_obj_t machine_pin_obj_init_helper(const machine_pin_obj_t *self, size_
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// reset the pin to digital if this is a mode-setting init (grab it back from ADC)
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if (args[ARG_mode].u_obj != mp_const_none) {
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if (rtc_gpio_is_valid_gpio(index)) {
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#if !(CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6)
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#if !(CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32C2)
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rtc_gpio_deinit(index);
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#endif
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}

‎ports/esp32/machine_pin.h

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#define MICROPY_HW_ENABLE_GPIO23 (1)
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// GPIO 24-30 are used for spi/sip flash.
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#elif CONFIG_IDF_TARGET_ESP32C2
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#define MICROPY_HW_ENABLE_GPIO0 (1)
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#define MICROPY_HW_ENABLE_GPIO1 (1)
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#define MICROPY_HW_ENABLE_GPIO2 (1)
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#define MICROPY_HW_ENABLE_GPIO3 (1)
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#define MICROPY_HW_ENABLE_GPIO4 (1)
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#define MICROPY_HW_ENABLE_GPIO5 (1)
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#define MICROPY_HW_ENABLE_GPIO6 (1)
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#define MICROPY_HW_ENABLE_GPIO7 (1)
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#define MICROPY_HW_ENABLE_GPIO8 (1)
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#define MICROPY_HW_ENABLE_GPIO9 (1)
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#define MICROPY_HW_ENABLE_GPIO10 (1)
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#define MICROPY_HW_ENABLE_GPIO18 (1)
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#define MICROPY_HW_ENABLE_GPIO19 (1) // UART0_RXD
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#define MICROPY_HW_ENABLE_GPIO20 (1) // UART0_TXD
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#elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
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#define MICROPY_HW_ENABLE_GPIO0 (1)

‎ports/esp32/main_esp32c2/CMakeLists.txt

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# Set location of base MicroPython directory.
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if(NOT MICROPY_DIR)
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get_filename_component(MICROPY_DIR ${CMAKE_CURRENT_LIST_DIR}/../../.. ABSOLUTE)
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endif()
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# Set location of the ESP32 port directory.
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if(NOT MICROPY_PORT_DIR)
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get_filename_component(MICROPY_PORT_DIR ${MICROPY_DIR}/ports/esp32 ABSOLUTE)
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endif()
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list(APPEND MICROPY_SOURCE_LIB ${MICROPY_DIR}/shared/runtime/gchelper_generic.c)
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include(${MICROPY_PORT_DIR}/esp32_common.cmake)

‎ports/esp32/main_esp32c2/idf_component.yml

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## IDF Component Manager Manifest File
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dependencies:
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espressif/mdns: "~1.1.0"
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idf:
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version: ">=5.2.0"

‎ports/esp32/main_esp32c2/linker.lf

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# Empty linker fragment (no workaround required for C2, see main_esp32/linker.lf).

‎ports/esp32/modesp32.c

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@@ -231,7 +231,9 @@ static const mp_rom_map_elem_t esp32_module_globals_table[] = {
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{ MP_ROM_QSTR(MP_QSTR_NVS), MP_ROM_PTR(&esp32_nvs_type) },
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{ MP_ROM_QSTR(MP_QSTR_Partition), MP_ROM_PTR(&esp32_partition_type) },
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#if SOC_RMT_SUPPORTED
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{ MP_ROM_QSTR(MP_QSTR_RMT), MP_ROM_PTR(&esp32_rmt_type) },
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#endif
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#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
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{ MP_ROM_QSTR(MP_QSTR_ULP), MP_ROM_PTR(&esp32_ulp_type) },
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#endif

‎ports/esp32/modmachine.c

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@@ -99,6 +99,11 @@ static mp_obj_t mp_machine_get_freq(void) {
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static void mp_machine_set_freq(size_t n_args, const mp_obj_t *args) {
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mp_int_t freq = mp_obj_get_int(args[0]) / 1000000;
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#if CONFIG_IDF_TARGET_ESP32C2
103+
if (freq != 80 && freq != 120) {
104+
mp_raise_ValueError(MP_ERROR_TEXT("frequency must be 80MHz or 120MHz"));
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}
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#else
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if (freq != 20 && freq != 40 && freq != 80 && freq != 160
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#if !(CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6)
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&& freq != 240
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mp_raise_ValueError(MP_ERROR_TEXT("frequency must be 20MHz, 40MHz, 80Mhz, 160MHz or 240MHz"));
111116
#endif
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}
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#endif
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esp_pm_config_t pm = {
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.max_freq_mhz = freq,
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.min_freq_mhz = freq,

‎ports/esp32/mpconfigport.h

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#define MICROPY_GC_INITIAL_HEAP_SIZE (56 * 1024)
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#elif CONFIG_IDF_TARGET_ESP32S2 && !CONFIG_SPIRAM
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#define MICROPY_GC_INITIAL_HEAP_SIZE (36 * 1024)
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#elif CONFIG_IDF_TARGET_ESP32C2
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#define MICROPY_GC_INITIAL_HEAP_SIZE (40 * 1024)
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#else
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#define MICROPY_GC_INITIAL_HEAP_SIZE (64 * 1024)
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#endif

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