@@ -39,46 +39,75 @@ MP_DECLARE_CONST_FUN_OBJ(pyb_disable_irq_obj);
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MP_DECLARE_CONST_FUN_OBJ (pyb_enable_irq_obj );
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// IRQ priority definitions.
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+ //
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// Lower number implies higher interrupt priority.
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-
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- #define IRQ_PRI_CAN 0x7
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- #define IRQ_SUBPRI_CAN 0x0
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-
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- #define IRQ_PRI_DMA 0x6
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- #define IRQ_SUBPRI_DMA 0x0
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-
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- #define IRQ_PRI_EXTINT 0xf
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- #define IRQ_SUBPRI_EXTINT 0xf
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+ //
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+ // The default priority grouping is set to NVIC_PRIORITYGROUP_4 in the
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+ // HAL_Init function. This corresponds to 4 bits for the priority field
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+ // and 0 bits for the sub-priority field (which means that for all intensive
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+ // purposes that the sub-priorities below are ignored).
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+ //
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+ // While a given interrupt is being processed, only higher priority (lower number)
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+ // interrupts will preempt a given interrupt. If sub-priorities are active
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+ // then the sub-priority determines the order that pending interrupts of
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+ // a given priority are executed. This is only meaningful if 2 or more
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+ // interrupts of the same priority are pending at the same time.
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+ //
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+ // The priority of the SysTick timer is determined from the TICK_INT_PRIORITY
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+ // value which is normally set to 0 in the stm32f4xx_hal_conf.h file.
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+ //
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+ // The following interrupts are arranged from highest priority to lowest
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+ // priority to make it a bit easier to figure out.
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+
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+ // Priority Sub-Priority
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+ // -------- ------------
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+ //#def IRQ_PRI_SYSTICK 0
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+ //#def IRQ_SUBPRI_SYSTICK 0
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// Flash IRQ must be higher priority than interrupts of all those components
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// that rely on the flash storage.
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- #define IRQ_PRI_FLASH 0x1
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- #define IRQ_SUBPRI_FLASH 0x1
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+ #define IRQ_PRI_FLASH 1
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+ #define IRQ_SUBPRI_FLASH 1
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- #define IRQ_PRI_OTG_FS 0x6
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- #define IRQ_SUBPRI_OTG_FS 0x0
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+ #define IRQ_PRI_SDIO 4
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+ #define IRQ_SUBPRI_SDIO 0
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- #define IRQ_PRI_OTG_HS 0x6
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- #define IRQ_SUBPRI_OTG_HS 0x0
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+ // DMA should be higher priority than USB, since USB Mass Storage calls
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+ // into the sdcard driver which waits for the DMA to complete.
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+ #define IRQ_PRI_DMA 5
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+ #define IRQ_SUBPRI_DMA 0
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- // PENDSV should be at the lowst priority so that other interrupts complete
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- // before exception is raised.
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- #define IRQ_PRI_PENDSV 0xf
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- #define IRQ_SUBPRI_PENDSV 0xf
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+ #define IRQ_PRI_OTG_FS 6
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+ #define IRQ_SUBPRI_OTG_FS 0
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+
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+ #define IRQ_PRI_OTG_HS 6
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+ #define IRQ_SUBPRI_OTG_HS 0
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- #define IRQ_PRI_RTC_WKUP 0xf
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- #define IRQ_SUBPRI_RTC_WKUP 0xf
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+ #define IRQ_PRI_TIM3 6
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+ #define IRQ_SUBPRI_TIM3 0
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- #define IRQ_PRI_TIM3 0x6
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- #define IRQ_SUBPRI_TIM3 0x0
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+ #define IRQ_PRI_TIM5 6
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+ #define IRQ_SUBPRI_TIM5 0
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- #define IRQ_PRI_TIM5 0x6
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- #define IRQ_SUBPRI_TIM5 0x0
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+ #define IRQ_PRI_CAN 7
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+ #define IRQ_SUBPRI_CAN 0
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+
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+ #define IRQ_PRI_UART 13
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+ #define IRQ_SUBPRI_UART 13
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// Interrupt priority for non-special timers.
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- #define IRQ_PRI_TIMX 0xe
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- #define IRQ_SUBPRI_TIMX 0xe
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+ #define IRQ_PRI_TIMX 14
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+ #define IRQ_SUBPRI_TIMX 14
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+
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+ #define IRQ_PRI_EXTINT 15
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+ #define IRQ_SUBPRI_EXTINT 15
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+
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+ // PENDSV should be at the lowst priority so that other int
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errupts complete
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+ // before exception is raised.
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+ #define IRQ_PRI_PENDSV 15
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+ #define IRQ_SUBPRI_PENDSV 15
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+
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+ #define IRQ_PRI_RTC_WKUP 15
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+ #define IRQ_SUBPRI_RTC_WKUP 15
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- #define IRQ_PRI_UART 0xd
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- #define IRQ_SUBPRI_UART 0xd
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