8000 adapt spi pin definition for MIMXRT1015_EVK et MIMXRT1170_EVK · micropython/micropython@9c71d71 · GitHub
[go: up one dir, main page]
Skip to content

Commit 9c71d71

Browse files
Romaric-RILLETRomaric-RILLET
committed
adapt spi pin definition for MIMXRT1015_EVK et MIMXRT1170_EVK
1 parent 3e9ee86 commit 9c71d71

File tree

2 files changed

+8
-8
lines changed

2 files changed

+8
-8
lines changed

‎ports/mimxrt/boards/MIMXRT1015_EVK/mpconfigboard.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -31,8 +31,8 @@
3131
#define MICROPY_HW_SPI_INDEX { 1 }
3232

3333
#define IOMUX_TABLE_SPI \
34-
{ IOMUXC_GPIO_AD_B0_10_LPSPI1_SCK }, { IOMUXC_GPIO_AD_B0_11_LPSPI1_PCS0 }, \
35-
{ IOMUXC_GPIO_AD_B0_12_LPSPI1_SDO }, { IOMUXC_GPIO_AD_B0_13_LPSPI1_SDI }, \
34+
{ &pin_GPIO_AD_B0_10, IOMUXC_GPIO_AD_B0_10_LPSPI1_SCK }, { &pin_GPIO_AD_B0_11, IOMUXC_GPIO_AD_B0_11_LPSPI1_PCS0 }, \
35+
{ &pin_GPIO_AD_B0_12, IOMUXC_GPIO_AD_B0_12_LPSPI1_SDO }, { &pin_GPIO_AD_B0_13, IOMUXC_GPIO_AD_B0_13_LPSPI1_SDI }, \
3636
{ 0 }
3737

3838
#define DMA_REQ_SRC_RX { 0, kDmaRequestMuxLPSPI1Rx, kDmaRequestMuxLPSPI2Rx }
Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -49,18 +49,18 @@
4949
#define MICROPY_HW_SPI_INDEX { 1, 6, 5 }
5050

5151
#define IOMUX_TABLE_SPI \
52-
{ IOMUXC_GPIO_AD_28_LPSPI1_SCK }, { IOMUXC_GPIO_AD_29_LPSPI1_PCS0 }, \
53-
{ IOMUXC_GPIO_AD_30_LPSPI1_SOUT }, { IOMUXC_GPIO_AD_31_LPSPI1_SIN }, \
52+
{ &pin_GPIO_AD_28, IOMUXC_GPIO_AD_28_LPSPI1_SCK }, { &pin_GPIO_AD_29, IOMUXC_GPIO_AD_29_LPSPI1_PCS0 }, \
53+
{ &pin_GPIO_AD_30, IOMUXC_GPIO_AD_30_LPSPI1_SOUT }, { &pin_GPIO_AD_31, IOMUXC_GPIO_AD_31_LPSPI1_SIN }, \
5454
{ 0 }, { 0 }, \
5555
{ 0 }, { 0 }, \
5656
{ 0 }, { 0 }, \
5757
{ 0 }, { 0 }, \
5858
{ 0 }, { 0 }, \
5959
{ 0 }, { 0 }, \
60-
{ IOMUXC_GPIO_LPSR_12_LPSPI5_SCK }, { IOMUXC_GPIO_LPSR_13_LPSPI5_PCS0 }, \
61-
{ IOMUXC_GPIO_LPSR_04_LPSPI5_SOUT }, { IOMUXC_GPIO_LPSR_05_LPSPI5_SIN }, \
62-
{ IOMUXC_GPIO_LPSR_10_LPSPI6_SCK }, { IOMUXC_GPIO_LPSR_09_LPSPI6_PCS0 }, \
63-
{ IOMUXC_GPIO_LPSR_11_LPSPI6_SOUT }, { IOMUXC_GPIO_LPSR_12_LPSPI6_SIN },
60+
{ &pin_GPIO_LPSR_12, IOMUXC_GPIO_LPSR_12_LPSPI5_SCK }, { &pin_GPIO_LPSR_13, IOMUXC_GPIO_LPSR_13_LPSPI5_PCS0 }, \
61+
{ &pin_GPIO_LPSR_04, IOMUXC_GPIO_LPSR_04_LPSPI5_SOUT }, { &pin_GPIO_LPSR_05, IOMUXC_GPIO_LPSR_05_LPSPI5_SIN }, \
62+
{ &pin_GPIO_LPSR_10, IOMUXC_GPIO_LPSR_10_LPSPI6_SCK }, { &pin_GPIO_LPSR_09, IOMUXC_GPIO_LPSR_09_LPSPI6_PCS0 }, \
63+
{ &pin_GPIO_LPSR_11, IOMUXC_GPIO_LPSR_11_LPSPI6_SOUT }, { &pin_GPIO_LPSR_12, IOMUXC_GPIO_LPSR_12_LPSPI6_SIN },
6464

6565

6666
#define DMA_REQ_SRC_RX { 0, kDmaRequestMuxLPSPI1Rx, kDmaRequestMuxLPSPI2Rx, \

0 commit comments

Comments
 (0)
0