8000 mimxrt: Fix cycle counter for time.ticks_cpu() and machine.bitstream(). · micropython/micropython@99221cd · GitHub
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robert-hhdpgeorge
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mimxrt: Fix cycle counter for time.ticks_cpu() and machine.bitstream().
Prior to this commit mp_hal_ticks_cpu() was not started properly. It only started when the code was executed with a debugger attached, except for the Teensy (i.MXRT1062) boards. As an additional fix, the CYYCNT timer is now started at boot time. Also rename mp_hal_ticks_cpu_init() to mp_hal_ticks_cpu_enable().
1 parent 06d1b02 commit 99221cd

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3 files changed

+6
-2
lines changed

3 files changed

+6
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lines changed

ports/mimxrt/machine_bitstream.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -48,7 +48,7 @@ void machine_bitstream_high_low(mp_hal_pin_obj_t pin, uint32_t *timing_ns, const
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}
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}
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// Enable the CPU cycle counter, which is not always enabled.
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mp_hal_ticks_cpu_init();
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mp_hal_ticks_cpu_enable();
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uint32_t irq_state = mp_hal_quiet_timing_enter();
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ports/mimxrt/mphalport.h

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -75,7 +75,10 @@ static inline void mp_hal_delay_us(mp_uint_t us) {
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#define mp_hal_delay_us_fast(us) mp_hal_delay_us(us)
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static inline void mp_hal_ticks_cpu_init(void) {
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static inline void mp_hal_ticks_cpu_enable(void) {
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CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
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DWT->LAR = 0xc5acce55;
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DWT->CYCCNT = 0;
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DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk;
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}
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ports/mimxrt/ticks.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -56,6 +56,7 @@ void ticks_init(void) {
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NVIC_EnableIRQ(GPTx_IRQn);
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GPT_StartTimer(GPTx);
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mp_hal_ticks_cpu_enable();
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}
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void GPTx_IRQHandler(void) {

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