8000 ports/renesas-ra/boards/VK-RA6M3: New Board. · micropython/micropython@7f2cefa · GitHub
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Commit 7f2cefa

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mbedNoobNinjambedNoobNinja
committed
ports/renesas-ra/boards/VK-RA6M3: New Board.
ports/renesas-ra/boards: New processor RA6M3. ports/renesas-ra: Integration to the existing RA family. Signed-off-by: mbedNoobNinja <novoltage@gmail.com>
1 parent 4937174 commit 7f2cefa

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lines changed

‎lib/cyw43-driver

‎lib/pico-sdk

Submodule pico-sdk updated 247 files

‎ports/renesas-ra/Makefile

Lines changed: 32 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -51,6 +51,13 @@ CMSIS_MCU_CAP = RA6M2
5151
USE_FSP_LPM = 1
5252
endif
5353

54+
ifeq ($(BOARD),VK_RA6M3)
55+
BOARD_LOW = vk_ra6m3
56+
CMSIS_MCU_LOW = ra6m3
57+
CMSIS_MCU_CAP = RA6M3
58+
USE_FSP_LPM = 1
59+
endif
60+
5461
# select use wrapper function of FSP library
5562
USE_FSP_FLASH = 1
5663

@@ -99,7 +106,7 @@ INC += -I$(TOP)/$(HAL_DIR)/ra/fsp/inc/api
99106
INC += -I$(TOP)/$(HAL_DIR)/ra/fsp/inc/instances
100107
INC += -I$(TOP)/$(HAL_DIR)/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include
101108
#INC += -Ilwip_inc
102-
ifeq ($(CMSIS_MCU),$(filter $(CMSIS_MCU),RA4M1 RA4W1 RA6M1 RA6M2))
109+
ifeq ($(CMSIS_MCU),$(filter $(CMSIS_MCU),RA4M1 RA4W1 RA6M1 RA6M2 RA6M3))
103110
INC += -Ira
104111
endif
105112
INC += -I$(BOARD_DIR)/ra_gen
@@ -108,7 +115,11 @@ INC += -I$(BOARD_DIR)/ra_cfg/fsp_cfg/bsp
108115
INC += -Idebug
109116

110117
CFLAGS += -D$(CMSIS_MCU)
118+
ifeq ($(BOARD),$(filter $(BOARD),VK_RA4W1 VK_RA6M3))
119+
CFLAGS += -DRA_HAL_H='<VK_$(CMSIS_MCU)_hal.h>'
120+
else
111121
CFLAGS += -DRA_HAL_H='<$(CMSIS_MCU)_hal.h>'
122+
endif
112123

113124
# Basic Cortex-M flags
114125
CFLAGS_CORTEX_M = -mthumb
@@ -126,6 +137,7 @@ CFLAGS_MCU_RA4M1 = $(CFLAGS_CORTEX_M) -mtune=cortex-m4 -mcpu=cortex-m4
126137
CFLAGS_MCU_RA4W1 = $(CFLAGS_CORTEX_M) -mtune=cortex-m4 -mcpu=cortex-m4
127138
CFLAGS_MCU_RA6M1 = $(CFLAGS_CORTEX_M) -mtune=cortex-m4 -mcpu=cortex-m4
128139
CFLAGS_MCU_RA6M2 = $(CFLAGS_CORTEX_M) -mtune=cortex-m4 -mcpu=cortex-m4
140+
CFLAGS_MCU_RA6M3 = $(CFLAGS_CORTEX_M) -mtune=cortex-m4 -mcpu=cortex-m4
129141

130142
CFLAGS += $(INC) -Wall -Wpointer-arith -Werror -Wdouble-promotion -Wfloat-conversion -std=gnu99 -nostdlib $(CFLAGS_EXTRA)
131143
#CFLAGS += -D$(CMSIS_MCU)
@@ -328,6 +340,11 @@ SRC_C += \
328340
$(BOARD_DIR)/src/hal_entry.c \
329341
$(wildcard $(BOARD_DIR)/*.c)
330342

343+
ifeq ($(BOARD),$(filter $(BOARD),VK_RA4W1 VK_RA6M3))
344+
SRC_C += \
345+
machine_dac.c
346+
endif
347+
331348
SRC_C += $(addprefix $(BOARD_DIR)/ra_gen/,\
332349
common_data.c \
333350
hal_data.c \
@@ -343,10 +360,12 @@ SRC_O += \
343360
SRC_O += \
344361
shared/runtime/gchelper_thumb2.o
345362

363+
ifneq ($(BOARD),$(filter $(BOARD),VK_RA4W1 VK_RA6M3))
346364
HAL_SRC_C += $(addprefix $(HAL_DIR)/ra/board/$(BOARD_LOW)/,\
347365
board_init.c \
348366
board_leds.c \
349367
)
368+
endif
350369

351370
HAL_SRC_C += $(addprefix $(HAL_DIR)/ra/fsp/src/bsp/mcu/all/,\
352371
bsp_clocks.c \
@@ -378,14 +397,14 @@ HAL_SRC_C += $(HAL_DIR)/ra/fsp/src/r_flash_lp/r_flash_lp.c
378397
endif
379398
endif
380399

381-
ifeq ($(CMSIS_MCU),$(filter $(CMSIS_MCU),RA6M1 RA6M2))
400+
ifeq ($(CMSIS_MCU),$(filter $(CMSIS_MCU),RA6M1 RA6M2 RA6M3))
382401
ifeq ($(USE_FSP_FLASH), 1)
383402
CFLAGS += -DUSE_FSP_FLASH
384403
HAL_SRC_C += $(HAL_DIR)/ra/fsp/src/r_flash_hp/r_flash_hp.c
385404
endif
386405
endif
387406

388-
ifeq ($(CMSIS_MCU),$(filter $(CMSIS_MCU),RA4M1 RA4W1 RA6M1 RA6M2))
407+
ifeq ($(CMSIS_MCU),$(filter $(CMSIS_MCU),RA4M1 RA4W1 RA6M1 RA6M2 RA6M3))
389408
HAL_SRC_C += $(addprefix ra/,\
390409
ra_adc.c \
391410
ra_flash.c \
@@ -403,6 +422,13 @@ HAL_SRC_C += $(addprefix ra/,\
403422

404423
endif
405424

425+
ifeq ($(BOARD),$(filter $(BOARD),VK_RA4W1 VK_RA6M3))
426+
HAL_SRC_C += $(addprefix ra/,\
427+
ra_gpt.c \
428+
ra_dac.c \
429+
)
430+
endif
431+
406432
OBJ += $(PY_O)
407433
OBJ += $(addprefix $(BUILD)/, $(LIB_SRC_C:.c=.o))
408434
OBJ += $(LIBM_O)
@@ -500,6 +526,9 @@ endif
500526
ifeq ($(CMSIS_MCU),$(filter $(CMSIS_MCU),RA6M2))
501527
AF_FILE = boards/ra6m2_af.csv
502528
endif
529+
ifeq ($(CMSIS_MCU),$(filter $(CMSIS_MCU),RA6M3))
530+
AF_FILE = boards/ra6m3_af.csv
531+
endif
503532
GEN_PINS_SRC = $(BUILD)/pins_$(BOARD).c
504533
GEN_PINS_HDR = $(HEADER_BUILD)/pins.h
505534
GEN_PINS_QSTR = $(BUILD)/pins_qstr.h

‎ports/renesas-ra/VK_RA6M3_hal.h

Lines changed: 106 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,106 @@
1+
/*
2+
* The MIT License (MIT)
3+
*
4+
* Copyright (c) 2021 Renesas Electronics Corporation
5+
* Copyright (c) 2023 Vekatech Ltd.
6+
*
7+
* Permission is hereby granted, free of charge, to any person obtaining a copy
8+
* of this software and associated documentation files (the "Software"), to deal
9+
* in the Software without restriction, including without limitation the rights
10+
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11+
* copies of the Software, and to permit persons to whom the Software is
12+
* furnished to do so, subject to the following conditions:
13+
*
14+
* The above copyright notice and this permission notice shall be included in
15+
* all copies or substantial portions of the Software.
16+
*
17+
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18+
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19+
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
20+
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21+
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22+
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23+
* THE SOFTWARE.
24+
*/
25+
26+
#ifndef PORTS_RA_RA6M3_HAL_H_
27+
#define PORTS_RA_RA6M3_HAL_H_
28+
29+
#include <stdio.h>
30+
#include <stdint.h>
31+
#include <stdbool.h>
32+
// #include "hal_data.h"
33+
#include "bsp_api.h"
34+
#include "common_data.h"
35+
36+
#define SCI_CH 9
37+
#define SCI_BAUD 115200
38+
#define UART_CH SCI_CH
39+
#define UART_TxStr sci_tx_str
40+
#define PCLK 120000000
41+
42+
#define RA_PRI_SYSTICK (0)
43+
#define RA_PRI_UART (1)
44+
#define RA_PRI_SDIO (4)
45+
#define RA_PRI_DMA (5)
46+
#define RA_PRI_FLASH (6)
47+
#define RA_PRI_OTG_FS (6)
48+
#define RA_PRI_OTG_HS (6)
49+
#define RA_PRI_TIM5 (6)
50+
#define RA_PRI_CAN (7)
51+
#define RA_PRI_SPI (8)
52+
#define RA_PRI_I2C (8)
53+
#define RA_PRI_TIMX (13)
54+
#define RA_PRI_EXTINT (14)
55+
#define RA_PRI_PENDSV (15)
56+
#define RA_PRI_RTC_WKUP (15)
57+
58+
#include "ra_config.h"
59+
#include "ra_adc.h"
60+
#include "ra_dac.h"
61+
#include "ra_flash.h"
62+
#include "ra_gpio.h"
63+
#include "ra_gpt.h"
64+
#include "ra_i2c.h"
65+
#include "ra_icu.h"
66+
#include "ra_init.h"
67+
#include "ra_int.h"
68+
#include "ra_rtc.h"
69+
#include "ra_sci.h"
70+
#include "ra_spi.h"
71+
#include "ra_timer.h"
72+
#include "ra_utils.h"
73+
74+
typedef enum {
75+
HAL_OK = 0x00,
76+
HAL_ERROR = 0x01,
77+
HAL_BUSY = 0x02,
78+
HAL_TIMEOUT = 0x03
79+
} HAL_StatusTypeDef;
80+
81+
#define __IO volatile
82+
83+
#if defined(USE_DBG_PRINT)
84+
#if !defined(DEBUG_CH)
85+
#define DEBUG_CH SCI_CH
86+
#endif
87+
#if (DEBUG_CH == 7)
88+
#define DEBUG_TX_PIN P613
89+
#define DEBUG_RX_PIN P614
90+
#endif
91+
#if (DEBUG_CH == 8)
92+
#define DEBUG_TX_PIN P105
93+
#define DEBUG_RX_PIN P104
94+
#endif
95+
#if (DEBUG_CH == 9)
96+
#define DEBUG_TX_PIN P109
97+
#define DEBUG_RX_PIN P110
98+
#endif
99+
#define DEBUG_TXSTR(s) ra_sci_tx_str(DEBUG_CH, (unsigned char *)s)
100+
#define DEBUG_TXCH(c) ra_sci_tx_ch(DEBUG_CH, c)
101+
#else
102+
#define DEBUG_TXSTR(s)
103+
#define DEBUG_TXCH(c)
104+
#endif
105+
106+
#endif /* PORTS_RA_RA6M3_HAL_H_ */

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