10000 stm32/boards/OPENMV_N6: Update board configuration. · micropython/micropython@6cb319e · GitHub
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stm32/boards/OPENMV_N6: Update board configuration.
Signed-off-by: Damien George <damien@micropython.org>
1 parent 1ef9c46 commit 6cb319e

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6 files changed

+60
-31
lines changed
  • ports/stm32/boards/OPENMV_N6
    • bdev.c
    • < 10000 div class="PRIVATE_TreeView-item-container prc-TreeView-TreeViewItemContainer--2Rkn" style="--level:2">
      board.ld
  • mboot_memory.ld
  • mpconfigboard.h
  • mpconfigboard.mk
  • pins.csv

    • 6 files changed

    +60
    -31
    lines changed

    ‎ports/stm32/boards/OPENMV_N6/bdev.c

    Lines changed: 13 additions & 15 deletions
    Original file line numberDiff line numberDiff line change
    @@ -27,6 +27,7 @@
    2727
    #include "py/obj.h"
    2828
    #include "storage.h"
    2929
    #include "spi.h"
    30+
    #include "xspi.h"
    3031

    3132
    #if BUILDING_MBOOT
    3233

    @@ -52,23 +53,20 @@ mp_spiflash_t board_mboot_spiflash;
    5253

    5354
    #elif defined(MICROPY_HW_BDEV_SPIFLASH)
    5455

    55-
    static const mp_soft_spi_obj_t soft_spi_bus = {
    56-
    .delay_half = MICROPY_HW_SOFTSPI_MIN_DELAY,
    57-
    .polarity = 0,
    58-
    .phase = 0,
    59-
    .sck = MBOOT_SPIFLASH_SCK,
    60-
    .mosi = MBOOT_SPIFLASH_MOSI,
    61-
    .miso = MBOOT_SPIFLASH_MISO,
    62-
    };
    63-
    64-
    static mp_spiflash_cache_t spi_bdev_cache;
    56+
    #if MICROPY_HW_SPIFLASH_ENABLE_CACHE
    57+
    #error "Cannot enable MICROPY_HW_SPIFLASH_ENABLE_CACHE"
    58+
    //static mp_spiflash_cache_t spi_bdev_cache;
    59+
    #endif
    6560

    61+
    // External SPI flash uses hardware XSPI interface (in 1-line mode).
    6662
    const mp_spiflash_config_t spiflash_config = {
    67-
    .bus_kind = MP_SPIFLASH_BUS_SPI,
    68-
    .bus.u_spi.cs = MBOOT_SPIFLASH_CS,
    69-
    .bus.u_spi.data = (void *)&soft_spi_bus,
    70-
    .bus.u_spi.proto = &mp_soft_spi_proto,
    71-
    .cache = &spi_bdev_cache,
    63+
    .bus_kind = MP_SPIFLASH_BUS_QSPI, // spiflash driver doesn't yet support XSPI directly
    64+
    .bus.u_qspi.data = (void *)&xspi_flash2,
    65+
    .bus.u_qspi.proto = &xspi_proto,
    66+
    //#if MICROPY_HW_SPIFLASH_ENABLE_CACHE
    67+
    //.cache = &spi_bdev_cache,
    68+
    //#endif
    69+
    //.cache = &spi_bdev_cache,
    7270
    };
    7371

    7472
    spi_bdev_t spi_bdev;

    ‎ports/stm32/boards/OPENMV_N6/board.ld

    Lines changed: 12 additions & 0 deletions
    Original file line numberDiff line numberDiff line change
    @@ -0,0 +1,12 @@
    1+
    /*
    2+
    Linker script for OPENMV_N6.
    3+
    */
    4+
    5+
    MEMORY
    6+
    {
    7+
    EXT_FLASH_ROMFS (rx) : ORIGIN = 0x70200000, LENGTH = 14M
    8+
    }
    9+
    10+
    /* ROMFS location */
    11+
    _micropy_hw_romfs_part0_start = ORIGIN(EXT_FLASH_ROMFS);
    12+
    _micropy_hw_romfs_part0_size = LENGTH(EXT_FLASH_ROMFS);

    ‎ports/stm32/boards/OPENMV_N6/mboot_memory.ld

    Lines changed: 2 additions & 2 deletions
    Original file line numberDiff line numberDiff line change
    @@ -9,8 +9,8 @@
    99

    1010
    MEMORY
    1111
    {
    12-
    FLASH_BL (rx) : ORIGIN = 0x34180400, LENGTH = 32K /* AXISRAM1_S */
    13-
    RAM (xrw) : ORIGIN = 0x341e0000, LENGTH = 128K /* AXISRAM1_S */
    12+
    FLASH_BL (rx) : ORIGIN = 0x34180400, LENGTH = 32K /* AXISRAM2_S */
    13+
    RAM (xrw) : ORIGIN = 0x341e0000, LENGTH = 128K /* AXISRAM2_S */
    1414
    }
    1515

    1616
    /* Location of protected flash area which must not be modified, because mboot lives there. */

    ‎ports/stm32/boards/OPENMV_N6/mpconfigboard.h

    Lines changed: 16 additions & 9 deletions
    Original file line numberDiff line numberDiff line change
    @@ -5,10 +5,10 @@
    55
    #define MICROPY_ALLOC_GC_STACK_SIZE (128)
    66

    77
    #define MICROPY_HW_HAS_SWITCH (0)
    8-
    #define MICROPY_HW_HAS_FLASH (0)
    9-
    #define MICROPY_HW_FLASH_MOUNT_AT_BOOT (0) // TODO enable
    8+
    #define MICROPY_HW_HAS_FLASH (1)
    9+
    #define MICROPY_HW_FLASH_MOUNT_AT_BOOT (1) // TODO enable
    1010
    #define MICROPY_HW_ENABLE_RNG (0)
    11-
    #define MICROPY_HW_ENABLE_RTC (0)
    11+
    #define MICROPY_HW_ENABLE_RTC (1)
    1212
    #define MICROPY_HW_ENABLE_ADC (0)
    1313
    #define MICROPY_HW_ENABLE_DAC (0)
    1414
    #define MICROPY_HW_ENABLE_USB (1)
    @@ -26,18 +26,25 @@
    2626
    #define MICROPY_HW_CLK_PLLP2 (1)
    2727
    #define MICROPY_HW_CLK_PLLFRAC (0)
    2828

    29+
    // The LSE is a 32kHz crystal.
    30+
    #define MICROPY_HW_RTC_USE_LSE (1)
    31+
    #define MICROPY_HW_RTC_USE_US (1)
    32+
    2933
    // External SPI flash.
    3034
    #define MICROPY_HW_XSPIFLASH_SIZE_BITS_LOG2 (28) // 256Mbit
    3135

    32-
    #if 0
    36+
    // ROMFS config
    37+
    #define MICROPY_HW_ROMFS_ENABLE_EXTERNAL_XSPI (1)
    38+
    #define MICROPY_HW_ROMFS_XSPI_SPIFLASH_OBJ (&spi_bdev.spiflash)
    39+
    #define MICROPY_HW_ROMFS_ENABLE_PART0 (1)
    40+
    41+
    #if 1
    3342
    // SPI flash, block device config.
    34-
    #if !BUILDING_MBOOT
    35-
    #define MICROPY_HW_SPIFLASH_ENABLE_CACHE (1)
    36-
    #endif
    3743
    #define MICROPY_HW_BDEV_SPIFLASH (&spi_bdev)
    38-
    #define MICROPY_HW_BDEV_SPIFLASH_CONFIG (&spiflash_config)
    39-
    #define MICROPY_HW_BDEV_SPIFLASH_SIZE_BYTES (32 * 1024 * 1024)
    4044
    #define MICROPY_HW_BDEV_SPIFLASH_EXTENDED (&spi_bdev)
    45+
    #define MICROPY_HW_BDEV_SPIFLASH_CONFIG (&spiflash_config)
    46+
    #define MICROPY_HW_BDEV_SPIFLASH_OFFSET_BYTES (16 * 1024 * 1024)
    47+
    #define MICROPY_HW_BDEV_SPIFLASH_SIZE_BYTES (16 * 1024 * 1024)
    4148
    #endif
    4249

    4350
    // UART buses

    ‎ports/stm32/boards/OPENMV_N6/mpconfigboard.mk

    Lines changed: 14 additions & 3 deletions
    Original file line numberDiff line numberDiff line change
    @@ -12,15 +12,26 @@ STM32_N6_HEADER_VERSION = 2.3
    1212
    DKEL = $(CUBE_PROG_BASE)/bin/ExternalLoader/MX25UM51245G_STM32N6570-NUCLEO.stldr
    1313

    1414
    ifeq ($(USE_MBOOT),1)
    15-
    LD_FILES = boards/stm32n657x0.ld boards/common_bl.ld
    15+
    LD_FILES = boards/stm32n657x0.ld boards/OPENMV_N6/board.ld boards/common_bl.ld
    1616
    TEXT0_ADDR = 0x70080000
    17+
    ifneq ($(BUILDING_MBOOT),1)
    18+
    CFLAGS += -DMICROPY_HW_RUNS_FROM_EXT_FLASH=1
    19+
    endif
    1720
    else
    18-
    LD_FILES = boards/stm32n657x0.ld boards/common_basic.ld
    21+
    LD_FILES = boards/stm32n657x0.ld boards/OPENMV_N6/board.ld boards/common_basic.ld
    1922
    TEXT0_ADDR = 0x34180400
    2023
    endif
    2124

    2225
    # Bootloader settings
    2326
    MBOOT_TEXT0_ADDR = 0x34180400
    24-
    #MBOOT_TEXT0_ADDR = 0x70080000
    2527
    MBOOT_LD_FILES = ../boards/OPENMV_N6/mboot_memory.ld stm32_sections.ld
    2628

    29+
    # MicroPython settings
    30+
    MICROPY_PY_BLUETOOTH ?= 1
    31+
    MICROPY_BLUETOOTH_NIMBLE ?= 1
    32+
    MICROPY_BLUETOOTH_BTSTACK ?= 0
    33+
    MICROPY_PY_LWIP = 1
    34+
    MICROPY_PY_NETWORK_CYW43 = 1
    35+
    MICROPY_PY_SSL = 1
    36+
    MICROPY_SSL_MBEDTLS = 1
    37+
    MICROPY_VFS_LFS2 = 1

    ‎ports/stm32/boards/OPENMV_N6/pins.csv

    Lines changed: 3 additions & 2 deletions
    Original file line numberDiff line numberDiff line change
    @@ -43,7 +43,7 @@ I2C2_SDA,PB11
    4343
    ,PC10
    4444
    ,PC11
    4545
    ,PC12
    46-
    ,PC13
    46+
    P11,PC13
    4747
    ,PC14
    4848
    ,PC15
    4949
    ,PD0
    @@ -78,6 +78,7 @@ SPI4_SCK,PE12
    7878
    I2C4_SCL,PE13
    7979
    I2C4_SDA,PE14
    8080
    ,PE15
    81+
    P9,PG12
    8182

    8283
    BUTTON,PF4
    8384
    LED_RED,PG10
    @@ -105,7 +106,7 @@ LED_BLUE,PB1
    105106
    -WL_SDIO_D2,PB9
    106107
    -WL_SDIO_D3,PB4
    107108
    -WL_SDIO_CMD,PA0
    108-
    -WL_SDIO_CLK,PD2
    109+
    -WL_SDIO_CK,PD2
    109110
    -WL_I2S_SDO,PG14
    110111
    -WL_I2S_WS,PB15
    111112
    -WL_I2S_SCLK,PB13

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