8000 rp2/clocks_extra: Implement custom clocks_init function. · micropython/micropython@5dcffb5 · GitHub
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rp2/clocks_extra: Implement custom clocks_init function.
Adapts pico-sdk clocks_init() into clocks_init_optional_usb() which takes an argument to initialise USB clocks or not. To avoid a code size increase the SDK clocks_init() function is linker wrapped to become clocks_init_optional_usb(true). This work was funded through GitHub Sponsors. Signed-off-by: Angus Gratton <angus@redyak.com.au>
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‎LICENSE

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@@ -73,6 +73,7 @@ used during the build process and is not part of the compiled source code.
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/ppp_set_auth.* (Apache-2.0)
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/rp2
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/mutex_extra.c (BSD-3-clause)
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/clocks_extra.c (BSD-3-clause)
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/stm32
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/usbd*.c (MCD-ST Liberty SW License Agreement V2)
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/stm32_it.* (MIT + BSD-3-clause)

‎ports/rp2/CMakeLists.txt

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@@ -117,6 +117,7 @@ set(MICROPY_SOURCE_DRIVERS
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)
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set(MICROPY_SOURCE_PORT
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clocks_extra.c
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fatfs_port.c
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help.c
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machine_bitstream.c
@@ -453,6 +454,7 @@ target_compile_options(${MICROPY_TARGET} PRIVATE
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target_link_options(${MICROPY_TARGET} PRIVATE
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-Wl,--defsym=__micropy_c_heap_size__=${MICROPY_C_HEAP_SIZE}
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-Wl,--wrap=dcd_event_handler
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-Wl,--wrap=clocks_init
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)
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# Apply optimisations to performance-critical source code.

‎ports/rp2/clocks_extra.c

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/*
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* Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include "pico.h"
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#include "clocks_extra.h"
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#include "hardware/regs/clocks.h"
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#include "hardware/platform_defs.h"
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#include "hardware/clocks.h"
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#include "hardware/watchdog.h"
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#include "hardware/pll.h"
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#include "hardware/xosc.h"
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#include "hardware/irq.h"
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#include "hardware/gpio.h"
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#define RTC_CLOCK_FREQ_HZ (USB_CLK_KHZ * KHZ / 1024)
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// Wrap the SDK's clocks_init() function to save code size
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void __wrap_clocks_init(void) {
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clocks_init_optional_usb(true);
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}
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// Copy of clocks_init() from pico-sdk, with USB
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// PLL and clock init made optional (for light sleep wakeup).
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void clocks_init_optional_usb(bool init_usb) {
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// Start tick in watchdog, the argument is in 'cycles per microsecond' i.e. MHz
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watchdog_start_tick(XOSC_KHZ / KHZ);
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// Modification: removed FPGA check here
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// Disable resus that may be enabled from previous software
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clocks_hw->resus.ctrl = 0;
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// Enable the xosc
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xosc_init();
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// Before we touch PLLs, switch sys and ref cleanly away from their aux sources.
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hw_clear_bits(&clocks_hw->clk[clk_sys].ctrl, CLOCKS_CLK_SYS_CTRL_SRC_BITS);
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while (clocks_hw->clk[clk_sys].selected != 0x1) {
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tight_loop_contents();
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}
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hw_clear_bits(&clocks_hw->clk[clk_ref].ctrl, CLOCKS_CLK_REF_CTRL_SRC_BITS);
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while (clocks_hw->clk[clk_ref].selected != 0x1) {
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tight_loop_contents();
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}
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/// \tag::pll_init[]
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pll_init(pll_sys, PLL_COMMON_REFDIV, PLL_SYS_VCO_FREQ_KHZ * KHZ, PLL_SYS_POSTDIV1, PLL_SYS_POSTDIV2);
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if (init_usb) {
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pll_init(pll_usb, PLL_COMMON_REFDIV, PLL_USB_VCO_FREQ_KHZ * KHZ, PLL_USB_POSTDIV1, PLL_USB_POSTDIV2);
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}
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/// \end::pll_init[]
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// Configure clocks
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// CLK_REF = XOSC (usually) 12MHz / 1 = 12MHz
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clock_configure(clk_ref,
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CLOCKS_CLK_REF_CTRL_SRC_VALUE_XOSC_CLKSRC,
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0, // No aux mux
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XOSC_KHZ * KHZ,
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XOSC_KHZ * KHZ);
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/// \tag::configure_clk_sys[]
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// CLK SYS = PLL SYS (usually) 125MHz / 1 = 125MHz
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clock_configure(clk_sys,
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CLOCKS_CLK_SYS_CTRL_SRC_VALUE_CLKSRC_CLK_SYS_AUX,
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CLOCKS_CLK_SYS_CTRL_AUXSRC_VALUE_CLKSRC_PLL_SYS,
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SYS_CLK_KHZ * KHZ,
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SYS_CLK_KHZ * KHZ);
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/// \end::configure_clk_sys[]
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if (init_usb) {
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// CLK USB = PLL USB 48MHz / 1 = 48MHz
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clock_configure(clk_usb,
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0, // No GLMUX
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CLOCKS_CLK_USB_CTRL_AUXSRC_VALUE_CLKSRC_PLL_USB,
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USB_CLK_KHZ * KHZ,
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USB_CLK_KHZ * KHZ);
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}
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// CLK ADC = PLL USB 48MHZ / 1 = 48MHz
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clock_configure(clk_adc,
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0, // No GLMUX
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CLOCKS_CLK_ADC_CTRL_AUXSRC_VALUE_CL A8C6 KSRC_PLL_USB,
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USB_CLK_KHZ * KHZ,
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USB_CLK_KHZ * KHZ);
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// CLK RTC = PLL USB 48MHz / 1024 = 46875Hz
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clock_configure(clk_rtc,
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0, // No GLMUX
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CLOCKS_CLK_RTC_CTRL_AUXSRC_VALUE_CLKSRC_PLL_USB,
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USB_CLK_KHZ * KHZ,
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RTC_CLOCK_FREQ_HZ);
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// CLK PERI = clk_sys. Used as reference clock for Peripherals. No dividers so just select and enable
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// Normally choose clk_sys or clk_usb
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clock_configure(clk_peri,
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0,
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CLOCKS_CLK_PERI_CTRL_AUXSRC_VALUE_CLK_SYS,
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SYS_CLK_KHZ * KHZ,
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SYS_CLK_KHZ * KHZ);
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}

‎ports/rp2/clocks_extra.h

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/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2024 Angus Gratton
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#ifndef MICROPY_INCLUDED_RP2_CLOCKS_EXTRA_H
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#define MICROPY_INCLUDED_RP2_CLOCKS_EXTRA_H
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#include "hardware/clocks.h"
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void clocks_init_optional_usb(bool init_usb);
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#endif // MICROPY_INCLUDED_RP2_CLOCKS_EXTRA_H

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